From 0053a840b71aa5b7a97cb13efc34ef50496f3209 Mon Sep 17 00:00:00 2001
From: Wayne Warthen <wwarthen@gmail.com>
Date: Sun, 7 Mar 2021 16:21:49 -0800
Subject: [PATCH] Support ZZRCC

---
 Doc/ChangeLog.txt                      |   3 ++
 Source/BPBIOS/diskdefs                 |  13 +++++
 Source/CBIOS/cbios.asm                 |  63 +++++++++++++++++++------
 Source/HBIOS/Build.ps1                 |  12 +++--
 Source/HBIOS/Build.sh                  |   8 ++--
 Source/HBIOS/Config/RCZ280_nat_zz.asm  |   2 +
 Source/HBIOS/Config/RCZ280_nat_zzr.asm |  44 +++++++++++++++++
 Source/HBIOS/Makefile                  |   2 +
 Source/HBIOS/cfg_dyno.asm              |   4 ++
 Source/HBIOS/cfg_ezz80.asm             |   4 ++
 Source/HBIOS/cfg_master.asm            |   8 +++-
 Source/HBIOS/cfg_mk4.asm               |   4 ++
 Source/HBIOS/cfg_n8.asm                |   4 ++
 Source/HBIOS/cfg_rcz180.asm            |   4 ++
 Source/HBIOS/cfg_rcz280.asm            |   4 ++
 Source/HBIOS/cfg_rcz80.asm             |   4 ++
 Source/HBIOS/cfg_sbc.asm               |   4 ++
 Source/HBIOS/cfg_scz180.asm            |   4 ++
 Source/HBIOS/cfg_una.asm               |   2 +
 Source/HBIOS/cfg_zeta.asm              |   4 ++
 Source/HBIOS/cfg_zeta2.asm             |   4 ++
 Source/HBIOS/diskdefs                  |  13 +++++
 Source/HBIOS/game.asm                  |   6 +++
 Source/HBIOS/md.asm                    |  58 ++++++++++++++++-------
 Source/HBIOS/std.asm                   |  10 ++--
 Source/HBIOS/usrrom.asm                |  13 ++++-
 Source/Images/diskdefs                 |  13 +++++
 Source/Images/hd1024_prefix.dat        | Bin 131072 -> 1048576 bytes
 Source/RomDsk/ROM_256KB/ASM.COM        | Bin 0 -> 8192 bytes
 Source/RomDsk/ROM_256KB/CLRDIR.COM     | Bin 0 -> 1704 bytes
 Source/RomDsk/ROM_256KB/DDT.COM        | Bin 0 -> 4864 bytes
 Source/RomDsk/ROM_256KB/DDTZ.COM       | Bin 0 -> 7424 bytes
 Source/RomDsk/ROM_256KB/DUMP.COM       | Bin 0 -> 512 bytes
 Source/RomDsk/ROM_256KB/ED.COM         | Bin 0 -> 6656 bytes
 Source/RomDsk/ROM_256KB/FLASH.COM      | Bin 0 -> 14076 bytes
 Source/RomDsk/ROM_256KB/LOAD.COM       | Bin 0 -> 1792 bytes
 Source/RomDsk/ROM_256KB/PIP.COM        | Bin 0 -> 7424 bytes
 Source/RomDsk/ROM_256KB/RELOG.COM      | Bin 0 -> 256 bytes
 Source/RomDsk/ROM_256KB/STAT.COM       | Bin 0 -> 5248 bytes
 Source/RomDsk/ROM_256KB/SUBMIT.COM     | Bin 0 -> 1280 bytes
 Source/RomDsk/ROM_256KB/XSUB.COM       | Bin 0 -> 768 bytes
 Source/ZRC/zrc_ptbl.bin                | Bin 256 -> 256 bytes
 Source/ver.inc                         |   2 +-
 Source/ver.lib                         |   2 +-
 Tools/cpmtools/diskdefs                |  13 +++++
 45 files changed, 281 insertions(+), 50 deletions(-)
 create mode 100644 Source/HBIOS/Config/RCZ280_nat_zzr.asm
 create mode 100644 Source/RomDsk/ROM_256KB/ASM.COM
 create mode 100644 Source/RomDsk/ROM_256KB/CLRDIR.COM
 create mode 100644 Source/RomDsk/ROM_256KB/DDT.COM
 create mode 100644 Source/RomDsk/ROM_256KB/DDTZ.COM
 create mode 100644 Source/RomDsk/ROM_256KB/DUMP.COM
 create mode 100644 Source/RomDsk/ROM_256KB/ED.COM
 create mode 100644 Source/RomDsk/ROM_256KB/FLASH.COM
 create mode 100644 Source/RomDsk/ROM_256KB/LOAD.COM
 create mode 100644 Source/RomDsk/ROM_256KB/PIP.COM
 create mode 100644 Source/RomDsk/ROM_256KB/RELOG.COM
 create mode 100644 Source/RomDsk/ROM_256KB/STAT.COM
 create mode 100644 Source/RomDsk/ROM_256KB/SUBMIT.COM
 create mode 100644 Source/RomDsk/ROM_256KB/XSUB.COM

diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt
index 947ddb71..1ffeef76 100644
--- a/Doc/ChangeLog.txt
+++ b/Doc/ChangeLog.txt
@@ -19,6 +19,9 @@ Version 3.1.1
 - WBW: Add support Z80-512K (watchdog and LED)
 - WBW: Add support for ZZ80MB address map
 - PLS: Add support for Z180 invalid opcode trap
+- WBW: Add support for ZZRCC
+- WBW: Allow selection of RAM/ROM disk individually in build
+- WBW: Support 256KB ROM size
 
 Version 3.1
 -----------
diff --git a/Source/BPBIOS/diskdefs b/Source/BPBIOS/diskdefs
index db9ef4b2..c35156b3 100644
--- a/Source/BPBIOS/diskdefs
+++ b/Source/BPBIOS/diskdefs
@@ -271,6 +271,19 @@ diskdef interak
   os 2.2
 end
 
+# RomWBW 256KB ROM (128KB reserved, 128KB ROM Disk)
+
+diskdef wbw_rom256
+  seclen 512
+  tracks 4
+  sectrk 64
+  blocksize 2048
+  maxdir 256
+  skew 0
+  boottrk 0
+  os 2.2
+end
+
 # RomWBW 512KB ROM (128KB reserved, 384KB ROM Disk)
 
 diskdef wbw_rom512
diff --git a/Source/CBIOS/cbios.asm b/Source/CBIOS/cbios.asm
index 34d8647d..43a7d4c8 100644
--- a/Source/CBIOS/cbios.asm
+++ b/Source/CBIOS/cbios.asm
@@ -2166,6 +2166,37 @@ INIT2:
 	CALL	MD_INIT		; INITIALIZE MEMORY DISK DRIVER (RAM/ROM)
 	CALL	DRV_INIT	; INITIALIZE DRIVE MAP
 	CALL	DPH_INIT	; INITIALIZE DPH TABLE AND BUFFERS
+;
+	; SET THE DEFAULT DRIVE
+	XOR	A		; ZERO ACCUM
+	LD	(DEFDRIVE),A	; SET DEFAULT DRIVE TO A: TO START
+;
+#IFDEF PLTWBW
+;
+	; IF WE HAVE MULTIPLE DRIVES AND THE FIRST DRIVE IS RAM DRIVE
+	; THEN MAKE OUR DEFAULT STARTUP DRIVE THE SECOND DRIVE (B:)
+	LD	HL,(DRVMAPADR)	; POINT TO DRIVE MAP
+	DEC	HL		; BUMP BACK TO DRIVE COUNT
+	LD	A,(HL)		; GET IT
+	CP 	2		; COMPARE TO 2
+	JR	C,INIT2X	; IF LESS THAN 2, THEN DONE
+;
+	LD	B,BF_DIODEVICE	; HBIOS FUNC: REPORT DEVICE INFO
+	INC	HL		; POINT TO UNIT FIELD
+	LD	C,(HL)		; ... OF FIRST DRIVE
+	RST	08		; CALL HBIOS
+	LD	A,D		; DEVICE TYPE TO A
+	CP	DIODEV_MD	; MEMORY DISK DEVICE?
+	JR	NZ,INIT2X	; IF NOT, THEN DONE
+	LD	A,C		; GET ATTRIBUTES
+	CP	%00101000	; TYPE = RAM?
+	JR	NZ,INIT2X	; IF NOT THEN DONE
+	LD	A,1		; USE SECOND DRIVE AS DEFAULT
+	LD	(DEFDRIVE),A	; RECORD DEFAULT DRIVE
+;
+INIT2X:
+;
+#ENDIF
 ;
 #IFDEF PLTUNA
 	; USE A DEDICATED BUFFER FOR UNA PHYSICAL DISK I/O
@@ -2419,7 +2450,7 @@ MD_INIT4:
 	LD	BC,$01FB		; UNA FUNC = SET BANK
 	LD	DE,(BNKRAMD)		; FIRST BANK OF RAM DISK
 	CALL	$FFFD			; DO IT (RST 08 NOT SAFE HERE)
-
+;
 #IF (CLRRAMDISK == CLR_AUTO)
 	; CHECK FIRST 32 DIRECTORY ENTRIES.  IF ANY START WITH AN INVALID
 	; VALUE, INIT THE RAM DISK.  VALID ENTRIES ARE E5 (EMPTY ENTRY) OR
@@ -2444,15 +2475,15 @@ CLRRAM2:
 	LD	BC,$01FB		; UNA FUNC = SET BANK
 	LD	DE,(BNKUSER)		; SWITCH BACK TO EXEC BANK FOR WRITESTR
 	CALL	$FFFD			; DO IT (RST 08 NOT SAFE HERE)
-
+;
 	CALL	NEWLINE2		; FORMATTING
 	LD	DE,STR_INITRAMDISK	; RAM DISK INIT MESSAGE
 	CALL	WRITESTR		; DISPLAY IT
-
+;
 	LD	BC,$01FB		; UNA FUNC = SET BANK
 	LD	DE,(BNKRAMD)		; FIRST BANK OF RAM DISK
 	CALL	$FFFD			; DO IT (RST 08 NOT SAFE HERE)
-
+;
 	LD	HL,0			; SOURCE ADR FOR FILL
 	LD	BC,$2000		; LENGTH OF FILL IS 8K
 	LD	A,$E5			; FILL VALUE
@@ -2462,17 +2493,19 @@ CLRRAM3:
 	LD	DE,(BNKUSER)		; SWITCH BACK TO EXEC BANK
 	CALL	$FFFD			; DO IT (RST 08 NOT SAFE HERE)
 	EI				; RESUME INTERRUPTS
-
+;
 #ENDIF
-
+;
 #ELSE
 ;
 ; INITIALIZE RAM DISK BY FILLING DIRECTORY WITH 'E5' BYTES
 ; FILL FIRST 8K OF RAM DISK TRACK 1 WITH 'E5'
 ;
 #IF (CLRRAMDISK != CLR_NEVER)
-	DI				; NO INTERRUPTS
 	LD	A,(BNKRAMD)		; FIRST BANK OF RAM DISK
+	CP	$FF			; $FF SIGNIFIES NO RAM DISK
+	RET	Z			; BAIL OUT IF NO RAM DISK
+	DI				; NO INTERRUPTS
 	CALL	HB_BNKSEL		; SELECT BANK
 
 #IF (CLRRAMDISK == CLR_AUTO)
@@ -2679,14 +2712,14 @@ DRV_INIT:
 	; GET BOOT UNIT/SLICE INFO
 	LD	DE,(HCB + HCB_BOOTVOL)	; BOOT VOLUME (UNIT, SLICE)
 	LD	(BOOTVOL),DE		; D -> UNIT, E -> SLICE
-;
-	; INIT DEFAULT
-	LD	A,D			; BOOT UNIT?
-	CP	1			; IF ROM BOOT, DEF DRIVE SHOULD BE B:
-	JR	Z,DRV_INIT1		; ... SO LEAVE AS IS AND SKIP AHEAD
-	XOR	A			; ELSE FORCE TO DRIVE A:
-DRV_INIT1:
-	LD	(DEFDRIVE),A		; STORE IT
+;;
+;	; INIT DEFAULT
+;	LD	A,D			; BOOT UNIT?
+;	CP	1			; IF ROM BOOT, DEF DRIVE SHOULD BE B:
+;	JR	Z,DRV_INIT1		; ... SO LEAVE AS IS AND SKIP AHEAD
+;	XOR	A			; ELSE FORCE TO DRIVE A:
+;DRV_INIT1:
+;	LD	(DEFDRIVE),A		; STORE IT
 ;
 	; SETUP THE DRVMAP STRUCTURE
 	LD	HL,(HEAPTOP)		; GET CURRENT HEAP TOP
diff --git a/Source/HBIOS/Build.ps1 b/Source/HBIOS/Build.ps1
index eb60585a..d9928e2f 100644
--- a/Source/HBIOS/Build.ps1
+++ b/Source/HBIOS/Build.ps1
@@ -65,8 +65,8 @@ while ($true)
 #
 while ($true)
 {
-	if (($RomSize -eq "512") -or ($RomSize -eq "1024")) {break}
-	$RomSize = (Read-Host -prompt "ROM Size [512|1024]").Trim()
+	if (($RomSize -eq "256") -or ($RomSize -eq "512") -or ($RomSize -eq "1024")) {break}
+	$RomSize = (Read-Host -prompt "ROM Size [256|512|1024]").Trim()
 }
 
 #
@@ -227,8 +227,12 @@ foreach ($App in $RomApps)
 }
 
 # Add the CP/M and ZSystem system images to the ROM disk (used by SYSCOPY)
-cpmcp -f $RomFmt $RomDiskFile ..\cpm22\cpm_${Bios}.sys 0:cpm.sys
-cpmcp -f $RomFmt $RomDiskFile ..\zsdos\zsys_${Bios}.sys 0:zsys.sys
+if ($RomSize -ne "256")
+{
+	cpmcp -f $RomFmt $RomDiskFile ..\cpm22\cpm_${Bios}.sys 0:cpm.sys
+	cpmcp -f $RomFmt $RomDiskFile ..\zsdos\zsys_${Bios}.sys 0:zsys.sys
+}
+
 
 # Set all the files in the ROM disk image to read only for extra protection under flash file system.
 cpmchattr -f $RomFmt $RomDiskFile r 0:*.*
diff --git a/Source/HBIOS/Build.sh b/Source/HBIOS/Build.sh
index e63a9510..df6e703c 100755
--- a/Source/HBIOS/Build.sh
+++ b/Source/HBIOS/Build.sh
@@ -42,7 +42,7 @@ while ! echo ${configs[@]} | grep -s -w -q "$config" ; do
 done
 configfile=Config/${platform}_${config}.asm
 
-while [ ! '(' "$romsize" = 1024 -o "$romsize" = 512 ')' ] ; do
+while [ ! '(' "$romsize" = 1024 -o "$romsize" = 512 -o "$romsize" = 256 ')' ] ; do
 	echo -n "Romsize :"
 	read romsize
 done
@@ -142,8 +142,10 @@ for i in ${Apps[@]} ; do
 done
 
 echo "copying systems to $romdiskfile"
-$CPMCP -f $romfmt $romdiskfile ../CPM22/cpm_$BIOS.sys 0:cpm.sys
-$CPMCP -f $romfmt $romdiskfile ../ZSDOS/zsys_$BIOS.sys 0:zsys.sys
+if [ $romsize != 256 ] ; then
+	$CPMCP -f $romfmt $romdiskfile ../CPM22/cpm_$BIOS.sys 0:cpm.sys
+	$CPMCP -f $romfmt $romdiskfile ../ZSDOS/zsys_$BIOS.sys 0:zsys.sys
+fi
 
 echo "setting files in the ROM disk image to read only"
 $CPMCH -f $romfmt $romdiskfile  r 0:*.*
diff --git a/Source/HBIOS/Config/RCZ280_nat_zz.asm b/Source/HBIOS/Config/RCZ280_nat_zz.asm
index e74f9d28..d1ed2895 100644
--- a/Source/HBIOS/Config/RCZ280_nat_zz.asm
+++ b/Source/HBIOS/Config/RCZ280_nat_zz.asm
@@ -22,6 +22,8 @@
 ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
 ; DIRECTORIES ABOVE THIS ONE).
 ;
+#DEFINE	PLATFORM_NAME	"ZZ80MB"
+;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
 ;
 #include "Config/RCZ280_nat.asm"
diff --git a/Source/HBIOS/Config/RCZ280_nat_zzr.asm b/Source/HBIOS/Config/RCZ280_nat_zzr.asm
new file mode 100644
index 00000000..ac12b876
--- /dev/null
+++ b/Source/HBIOS/Config/RCZ280_nat_zzr.asm
@@ -0,0 +1,44 @@
+;
+;==================================================================================================
+;   RC2014 Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZRCC)
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE	PLATFORM_NAME	"ZZRCC"
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "Config/RCZ280_nat.asm"
+;
+;CPUOSC		.SET	29491200	; CPU OSC FREQ IN MHZ
+CPUOSC		.SET	24000000	; CPU OSC FREQ IN MHZ
+;
+RAMSIZE		.SET	384		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAM_RESERVE	.SET	128		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+ROM_RESERVE	.SET	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+;
+RAMLOC		.SET	23		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.SET	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+;
+MDROM		.SET	FALSE		; MD: ENABLE ROM DISK
+MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
+;
+Z2U0HFC		.SET	TRUE		; Z2U 0: ENABLE HARDWARE FLOW CONTROL
diff --git a/Source/HBIOS/Makefile b/Source/HBIOS/Makefile
index 117c4996..a5a480f8 100644
--- a/Source/HBIOS/Makefile
+++ b/Source/HBIOS/Makefile
@@ -15,6 +15,7 @@ else
 	OBJECTS += RCZ280_ext.rom RCZ280_ext.com RCZ280_ext.upd
 	OBJECTS += RCZ280_nat.rom RCZ280_nat.com RCZ280_nat.upd
 	OBJECTS += RCZ280_nat_zz.rom RCZ280_nat_zz.com RCZ280_nat_zz.upd
+	OBJECTS += RCZ280_nat_zzr.rom RCZ280_nat_zzr.com RCZ280_nat_zzr.upd
 	OBJECTS += RCZ80_kio.rom RCZ80_kio.com RCZ80_kio.upd
 	OBJECTS += RCZ80_mt.rom RCZ80_mt.com RCZ80_mt.upd
 	OBJECTS += RCZ80_duart.rom RCZ80_duart.com RCZ80_duart.upd
@@ -53,6 +54,7 @@ DIFFPATH = $(DIFFTO)/Binary
 ROMSIZE=512
 
 N8_std.rom: ROMSIZE=512
+RCZ280_nat_zzr.rom: ROMSIZE=256
 
 %.rom:
 	bash Build.sh $(DIFFBUILD) $(shell echo $* | sed 's/_/ /') $(ROMSIZE)
diff --git a/Source/HBIOS/cfg_dyno.asm b/Source/HBIOS/cfg_dyno.asm
index 6c513e3e..2ba312e0 100644
--- a/Source/HBIOS/cfg_dyno.asm
+++ b/Source/HBIOS/cfg_dyno.asm
@@ -28,6 +28,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -107,6 +109,8 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
 ;
diff --git a/Source/HBIOS/cfg_ezz80.asm b/Source/HBIOS/cfg_ezz80.asm
index e4559c0d..c8319829 100644
--- a/Source/HBIOS/cfg_ezz80.asm
+++ b/Source/HBIOS/cfg_ezz80.asm
@@ -28,6 +28,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@@ -138,6 +140,8 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
 ;
diff --git a/Source/HBIOS/cfg_master.asm b/Source/HBIOS/cfg_master.asm
index b202f09c..fa902178 100644
--- a/Source/HBIOS/cfg_master.asm
+++ b/Source/HBIOS/cfg_master.asm
@@ -25,7 +25,9 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-MEMMGR		.SET	MM_NONE		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
+RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+MEMMGR		.EQU	MM_NONE		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
@@ -189,8 +191,10 @@ VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
 FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_NONE	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
diff --git a/Source/HBIOS/cfg_mk4.asm b/Source/HBIOS/cfg_mk4.asm
index 32f611b3..4a05026f 100644
--- a/Source/HBIOS/cfg_mk4.asm
+++ b/Source/HBIOS/cfg_mk4.asm
@@ -28,6 +28,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -125,6 +127,8 @@ VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
 ;
diff --git a/Source/HBIOS/cfg_n8.asm b/Source/HBIOS/cfg_n8.asm
index 0e2e49b8..aaf967a1 100644
--- a/Source/HBIOS/cfg_n8.asm
+++ b/Source/HBIOS/cfg_n8.asm
@@ -28,6 +28,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_N8		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 RAMBIAS		.EQU	0		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 RAMLOC		.EQU	0		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
@@ -128,6 +130,8 @@ VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
 ;
diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm
index 4e182511..5f9e9648 100644
--- a/Source/HBIOS/cfg_rcz180.asm
+++ b/Source/HBIOS/cfg_rcz180.asm
@@ -28,6 +28,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -143,6 +145,8 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
 ;
diff --git a/Source/HBIOS/cfg_rcz280.asm b/Source/HBIOS/cfg_rcz280.asm
index b2bbbe68..aa70891d 100644
--- a/Source/HBIOS/cfg_rcz280.asm
+++ b/Source/HBIOS/cfg_rcz280.asm
@@ -28,6 +28,8 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -160,6 +162,8 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
 ;
diff --git a/Source/HBIOS/cfg_rcz80.asm b/Source/HBIOS/cfg_rcz80.asm
index 88eb0531..45efe340 100644
--- a/Source/HBIOS/cfg_rcz80.asm
+++ b/Source/HBIOS/cfg_rcz80.asm
@@ -28,6 +28,8 @@ INTMODE		.EQU	1		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@@ -150,6 +152,8 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
 ;
diff --git a/Source/HBIOS/cfg_sbc.asm b/Source/HBIOS/cfg_sbc.asm
index fbdc125b..e3ec540e 100644
--- a/Source/HBIOS/cfg_sbc.asm
+++ b/Source/HBIOS/cfg_sbc.asm
@@ -28,6 +28,8 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@@ -128,6 +130,8 @@ VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
 ;
diff --git a/Source/HBIOS/cfg_scz180.asm b/Source/HBIOS/cfg_scz180.asm
index 96c87a87..653e1c15 100644
--- a/Source/HBIOS/cfg_scz180.asm
+++ b/Source/HBIOS/cfg_scz180.asm
@@ -28,6 +28,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -138,6 +140,8 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
 ;
diff --git a/Source/HBIOS/cfg_una.asm b/Source/HBIOS/cfg_una.asm
index 10821319..b815f41b 100644
--- a/Source/HBIOS/cfg_una.asm
+++ b/Source/HBIOS/cfg_una.asm
@@ -22,6 +22,8 @@ CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 ;
 RTCIO		.EQU	$70		; RTC LATCH REGISTER ADR
 ;
diff --git a/Source/HBIOS/cfg_zeta.asm b/Source/HBIOS/cfg_zeta.asm
index 1eda52df..6e1f0f33 100644
--- a/Source/HBIOS/cfg_zeta.asm
+++ b/Source/HBIOS/cfg_zeta.asm
@@ -28,6 +28,8 @@ INTMODE		.EQU	0		; INTERRUPT MODE: 0=NONE, 1=MODE 1, 2=MODE 2
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@@ -103,6 +105,8 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
 ;
diff --git a/Source/HBIOS/cfg_zeta2.asm b/Source/HBIOS/cfg_zeta2.asm
index 44783270..d010f660 100644
--- a/Source/HBIOS/cfg_zeta2.asm
+++ b/Source/HBIOS/cfg_zeta2.asm
@@ -28,6 +28,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@@ -114,6 +116,8 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
 ;
diff --git a/Source/HBIOS/diskdefs b/Source/HBIOS/diskdefs
index db9ef4b2..c35156b3 100644
--- a/Source/HBIOS/diskdefs
+++ b/Source/HBIOS/diskdefs
@@ -271,6 +271,19 @@ diskdef interak
   os 2.2
 end
 
+# RomWBW 256KB ROM (128KB reserved, 128KB ROM Disk)
+
+diskdef wbw_rom256
+  seclen 512
+  tracks 4
+  sectrk 64
+  blocksize 2048
+  maxdir 256
+  skew 0
+  boottrk 0
+  os 2.2
+end
+
 # RomWBW 512KB ROM (128KB reserved, 384KB ROM Disk)
 
 diskdef wbw_rom512
diff --git a/Source/HBIOS/game.asm b/Source/HBIOS/game.asm
index 43d90b87..66a618a7 100644
--- a/Source/HBIOS/game.asm
+++ b/Source/HBIOS/game.asm
@@ -1182,10 +1182,12 @@ PRTSTR:
 COUT:	PUSH	AF
 	PUSH	BC
 	PUSH	DE
+	PUSH	HL
 	LD	B,01H
 	LD	C,0
 	LD	E,A
 	RST	08
+	POP	HL
 	POP	DE
 	POP	BC
 	POP	AF
@@ -1202,10 +1204,14 @@ COUTE:	PUSH	AF
 ; WAIT FOR A CHARACTER FROM THE CONSOLE DEVICE AND RETURN IT IN A
 ;
 CIN:	PUSH	BC
+	PUSH	DE
+	PUSH	HL
 	LD	B,00H
 	LD	C,00H
 	RST	08
 	LD	A,E
+	POP	HL
+	POP	DE
 	POP	BC
 	RET
 
diff --git a/Source/HBIOS/md.asm b/Source/HBIOS/md.asm
index eb4c2446..b6c2d8eb 100644
--- a/Source/HBIOS/md.asm
+++ b/Source/HBIOS/md.asm
@@ -12,7 +12,7 @@
 ;	0x00 MEMORY DISK	0x01 ROM DRIVE		%00100000 HD STYLE, NON-REMOVABLE, TYPE-ROM
 ;	0x00 MEMORY DISK	0x01 ROM DRIVE		%00111000 HD STYLE, NON-REMOVABLE, TYPE-FLASH
 ;
-MD_DEVCNT	.EQU	2		; NUMBER OF MD DEVICES SUPPORTED
+;MD_DEVCNT	.EQU	2		; NUMBER OF MD DEVICES SUPPORTED
 MD_CFGSIZ	.EQU	8		; SIZE OF CFG TBL ENTRIES
 ;
 MD_DEV		.EQU	0		; OFFSET OF DEVICE NUMBER (BYTE)
@@ -32,18 +32,25 @@ MD_FVAR		.EQU	1		; FLASH VERIFY AFTER WRITE
 ; DEVICE CONFIG TABLE (RAM DEVICE FIRST TO MAKE IT ALWAYS FIRST DRIVE)
 ;
 MD_CFGTBL:
+#IF (MDRAM)
 	; DEVICE 1 (RAM)
 	.DB	1			; DRIVER DEVICE NUMBER
 	.DB	0			; DEVICE STATUS
 	.DW	0,0			; CURRENT LBA
 	.DB	MID_MDRAM		; DEVICE MEDIA ID
 	.DB	MD_ARAM			; DEVICE ATTRIBUTE
+#ENDIF
+;
+#IF (MDROM)
 	; DEVICE 0 (ROM)
 	.DB	0			; DEVICE NUMBER
 	.DB	0			; DEVICE STATUS
 	.DW	0,0			; CURRENT LBA
 	.DB	MID_MDROM		; DEVICE MEDIA ID
 	.DB	MD_AROM			; DEVICE ATTRIBUTE
+#ENDIF
+;
+MD_DEVCNT	.EQU	($ - MD_CFGTBL) / MD_CFGSIZ
 ;
 #IF ($ - MD_CFGTBL) != (MD_DEVCNT * MD_CFGSIZ)
 	.ECHO	"*** INVALID MD CONFIG TABLE ***\n"
@@ -59,35 +66,54 @@ MD_INIT:
 #ENDIF
 
 	CALL	NEWLINE			; FORMATTING
-	PRTS("MD: UNITS=2 $")
-	PRTS("ROMDISK=$")
+	PRTS("MD: UNITS=$")
+	LD	A,MD_DEVCNT
+	CALL	PRTDECB
+;
+#IF (MDROM)
+	PRTS(" ROMDISK=$")
 	LD	HL,ROMSIZE - 128
 	CALL	PRTDEC
-	PRTS("KB RAMDISK=$")
+	PRTS("KB$")
+#ENDIF
+;
+#IF (MDRAM)
+	PRTS(" RAMDISK=$")
 	LD	HL,RAMSIZE - 256
 	CALL	PRTDEC
 	PRTS("KB$")
+#ENDIF
 ;
 ; SETUP THE DIO TABLE ENTRIES
 ;
-#IF (MDFFENABLE)
+#IF (MDROM & MDFFENABLE)
 	LD	A,(MD_FFSEN)		; IF FLASH 
 	OR	A			; FILESYSTEM 
-	JR	NZ,MD_IN1		; CAPABLE, 
+	JR	NZ,MD_INIT1		; CAPABLE, 
 	LD	A,MD_AFSH		; UPDATE ROM DIO
 	LD	(MD_CFGTBL + MD_CFGSIZ + MD_ATTRIB),A
-MD_IN1:
+MD_INIT1:
 #ENDIF
-	LD	BC,MD_FNTBL
+;
 	LD	DE,MD_CFGTBL
-	PUSH	BC
-	CALL	DIO_ADDENT		; ADD FIRST ENTRY
-	POP	BC
-	LD	DE,MD_CFGTBL + MD_CFGSIZ
-	CALL	DIO_ADDENT		; ADD SECOND ENTRY
-
-	XOR	A			; INIT SUCCEEDED
-	RET				; RETURN
+;
+MD_INIT2:
+	LD	A,(DE)			; FIRST BYTE OF CONFIG
+	CP	$FF			; END OF TABLE?
+	JR	NZ,MD_INIT3		; IF NOT END OF TABLE, CONTINUE
+	XOR	A			; SIGNAL SUCCESS
+	RET				; AND RETURN
+;
+MD_INIT3:
+	LD	BC,MD_FNTBL		; BC IS FUNT TBL
+	PUSH	DE			; SAVE CFG PTR
+	CALL	DIO_ADDENT		; ADD DIO TBL ENTRY
+	POP	DE			; RECOVER CFG PTR
+	EX	DE,HL			; CFG PTR TO HL
+	LD	BC,MD_CFGSIZ		; ENTRY SIZ TO BC
+	ADD	HL,BC			; BUMP TO NEXT ENTRY
+	EX	DE,HL			; CFG PTR BACK TO DE
+	JR	MD_INIT2		; REPEAT
 ;
 ;
 ;
diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm
index b4f0fe6b..25131225 100644
--- a/Source/HBIOS/std.asm
+++ b/Source/HBIOS/std.asm
@@ -454,21 +454,19 @@ SYSTIM	.SET	TM_Z280
 ; MEMORY BANK CONFIGURATION
 ;
 #IF (BIOS == BIOS_UNA)
-BID_ROM0	.EQU	$0000
-BID_RAM0	.EQU	$8000
+BID_ROM0	.EQU	$0000 + (ROM_RESERVE / 32)
+BID_RAM0	.EQU	$8000 + (RAM_RESERVE / 32)
 #ENDIF
 ;
 #IF (BIOS == BIOS_WBW)
-BID_ROM0	.EQU	$00
-BID_RAM0	.EQU	$80
+BID_ROM0	.EQU	$00 + (ROM_RESERVE / 32)
+BID_RAM0	.EQU	$80 + (RAM_RESERVE / 32)
 #ENDIF
 
 BID_ROMN	.EQU	(BID_ROM0 + ((ROMSIZE / 32) - 1))
 BID_RAMN	.EQU	(BID_RAM0 + ((RAMSIZE / 32) - 1))
 
 BID_BOOT	.EQU	BID_ROM0	; BOOT BANK
-;BID_BIOSIMG	.EQU	BID_ROM0 + 1	; BIOS IMAGE BANK
-;BID_OSIMG	.EQU	BID_ROM0 + 2	; ROM LOADER AND IMAGES BANK
 BID_IMG0	.EQU	BID_ROM0 + 1	; ROM LOADER AND FIRST IMAGES BANK
 BID_IMG1	.EQU	BID_ROM0 + 2	; SECOND IMAGES BANK
 BID_FSFAT	.EQU	BID_ROM0 + 3	; FAT FILESYSTEM DRIVER BANK
diff --git a/Source/HBIOS/usrrom.asm b/Source/HBIOS/usrrom.asm
index ead329be..908f0b93 100644
--- a/Source/HBIOS/usrrom.asm
+++ b/Source/HBIOS/usrrom.asm
@@ -7,10 +7,12 @@ CR	.EQU    0DH
 LF	.EQU    0AH
 ;
 	.ORG    USR_LOC
-;           
+;
+	LD	SP,USR_END
+;
 	LD	HL,BOOTMSG		; INTRODUCTION
 	CALL	PRTSTR
-
+;
 	CALL	CIN			; DO STUFF
 ;
 	LD	B,BF_SYSRESET		; SYSTEM RESTART
@@ -40,10 +42,13 @@ PRTSTR:	LD	A,(HL)
 COUT:	PUSH	AF
 	PUSH	BC
 	PUSH	DE
+	PUSH	HL
 	LD	B,01H
 	LD	C,0
 	LD	E,A
 	RST	08
+	CALL	$FFF0
+	POP	HL
 	POP	DE
 	POP	BC
 	POP	AF
@@ -60,10 +65,14 @@ COUTE:	PUSH	AF
 ; WAIT FOR A CHARACTER FROM THE CONSOLE DEVICE AND RETURN IT IN A
 ;
 CIN:	PUSH	BC
+	PUSH	DE
+	PUSH	HL
 	LD	B,00H
 	LD	C,00H
 	RST	08
 	LD	A,E
+	POP	HL
+	POP	DE
 	POP	BC
 	RET
 ;
diff --git a/Source/Images/diskdefs b/Source/Images/diskdefs
index db9ef4b2..c35156b3 100644
--- a/Source/Images/diskdefs
+++ b/Source/Images/diskdefs
@@ -271,6 +271,19 @@ diskdef interak
   os 2.2
 end
 
+# RomWBW 256KB ROM (128KB reserved, 128KB ROM Disk)
+
+diskdef wbw_rom256
+  seclen 512
+  tracks 4
+  sectrk 64
+  blocksize 2048
+  maxdir 256
+  skew 0
+  boottrk 0
+  os 2.2
+end
+
 # RomWBW 512KB ROM (128KB reserved, 384KB ROM Disk)
 
 diskdef wbw_rom512
diff --git a/Source/Images/hd1024_prefix.dat b/Source/Images/hd1024_prefix.dat
index 1ec28fa126734d65e8ebb640dad2ca1cf7f6ba63..f4f1aa3baf9b7071ed76827c0b2cfcf63ece709e 100644
GIT binary patch
delta 118
zcmZo@;Am)Y*l>_hhC`44!hZ%11|Sds;)DO$z<eP42meGy#pZvE+y5~#GW}~7VA?Lg
P#Q5Pad5p~hOa*)Z>#HaU

delta 50
zcmZo@aA;`Y*l>_hhEb3I!hZ%v1|Sds;)DO$z<eP4KmSBV#pZvE+y5~#GW`PpexMJe

diff --git a/Source/RomDsk/ROM_256KB/ASM.COM b/Source/RomDsk/ROM_256KB/ASM.COM
new file mode 100644
index 0000000000000000000000000000000000000000..a63e5aec663546b7aac7b330a9ebe8be3a46ba33
GIT binary patch
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literal 0
HcmV?d00001

diff --git a/Source/RomDsk/ROM_256KB/CLRDIR.COM b/Source/RomDsk/ROM_256KB/CLRDIR.COM
new file mode 100644
index 0000000000000000000000000000000000000000..ca65cbed7f56d8047b7274079c2ba398417c0df7
GIT binary patch
literal 1704
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literal 0
HcmV?d00001

diff --git a/Source/RomDsk/ROM_256KB/DDT.COM b/Source/RomDsk/ROM_256KB/DDT.COM
new file mode 100644
index 0000000000000000000000000000000000000000..70e4ebfe97229d3ed348abb9632a2d40a663e8b6
GIT binary patch
literal 4864
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literal 0
HcmV?d00001

diff --git a/Source/RomDsk/ROM_256KB/SUBMIT.COM b/Source/RomDsk/ROM_256KB/SUBMIT.COM
new file mode 100644
index 0000000000000000000000000000000000000000..f651bfee6be78c05670bef3a1976d7212f66061c
GIT binary patch
literal 1280
zcmbVMOK2Nc6n#%KPeBGx|AC4&ej`ttbd*wOk|=nPRj|^KLR^KUpG_Mxk;ayYJmZYV
z`uHQu-INBhDqXa+gl<wOWYJAyQwUg-1jck09jF%lIQ_-_nBdShlq@RuzNff!(N!N}
z?mg$;d+z1Ei@Y0{=IzP4QyMS2d-6}weS?P%?WKj%c*!-&)G?<_!^szEZ;$ev<Jb<(
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zbjHed^&kF4+os2CYg{>QIL3tOLQc2vd8=ZSO9h&>E!VNjG+Ts(Jj9`gW9D7ksna9V
z<+74BEX#Ijwro$Cd+7<&C_Iz1%JpXz8KJ?%Z6d!V-3>mA1m}dHBL;5}U;c(nCeNy0
zlMN{roCEwV$2S1q7n~>B8c^SJ>N}wB-===#)DJ*C#H-dhz6tnYNb%*LIsOUoBOL$A
z@h^aPZcA*EsU);ce!c?VFZ4|^q-~PU*6PKGx<PKLx5!FQ6}<k$1_98YxJA5$h%f)n
zl<*!L{E2are?KAMtG|)MBh20=cYVBwuI*aDe~@4@qBhZ!2;5i-VI5!FC14W)jbBB<
zj)=Yn9b1Bchj8#=M0TU8rk_~=dnJ5AU@1e94qBx`ChoH!(%ooUbE8AKD3Y5f*3hP-
zo!-`IL0=+iZHeSEgUjJ*L0%%Mfn+0H-Nu(0KA=xW+eRlIx&nCXqfiUh$Dfj5gmrmS
zz$e)hzFdJ$@Lq|EB+p4Htj|e(VN;ZAQVInzL7SJ_@#|X`?&#q3g0ph;gTC;L2(Z($
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z!pB7KK@kF8ROEQSsMfn;3DN5|JJm8+v$nx?A6*V#7V-OB_Y~7h=UD5axIM&0fe+rs
z7qmG^t#!rT6?}C@>ONFMt4nPP@jE&=2%MFpANPIv5gYPA2KyQGuiOr8c|71<5`B4A
zI;&Qsez>^@wsr*XkZ?`J1vUz>xDt)&vr<*BNolPHH!!~({w3l$e&_5Jo{q?05!e!N
zU%R&%j}v^E#e*55H6(Z>ljsdeYa+G)iwJf~ZLq0d2Up1;xglK%M+sziX;_gea0k6%
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N*@3?x$cq23^EXeRr}6**

literal 0
HcmV?d00001

diff --git a/Source/RomDsk/ROM_256KB/XSUB.COM b/Source/RomDsk/ROM_256KB/XSUB.COM
new file mode 100644
index 0000000000000000000000000000000000000000..15e86abfc94ac7ae15b0db899aec96d711d56e58
GIT binary patch
literal 768
zcmaJ-Ur19?82`SZbGy2mb7AblcK>F2M6D4sMuW6^oJmsllHu|`jC9jEbE6uwq?cZL
z2z=-{=%I+BkU|FA#fN+0K1^AGK_H?ad+MRr*>|<)&cpe>^E<!q_xqiL8)!_TbUmNb
z(=+;vG_jPNOXZ~7dUjEY44%KUxRjJeX0!VAOhFpY>Wg|hr`^;SmQvJ9SI37E$JA6N
z?XaaxR+^p8=~-<v=7y%bT0rIoRaN~zk#7;o)n}*%d{zOC2grN<BHFD`G5HQEO=)Y*
z!7iR)avK!m-#wMhmy=<r%izj?w7y__u`8e&Z?RU{PZID0+aDdYRV~~rs(YCyXEIyc
zD6Dn`jIUT5gu^^#Pqu<7r^EC83v4dj;Je8waxZMk^T$vo+%SAV6yq*9Y=)o=fII{W
z0tHw4L8jdeyUGS08USEk_~nF5fXzTIf$|OQm46&Y6d%{?$Vk)obE$`VpSHXIxOue2
zpwQ&3H_#NS3>q}kFc|QHe;7%{<ON2E({0x6Jk%=G{vp-hCV$G`jrI$;Y}W19P~$nv
zhxOQ5T(=m+BT?i}pWMsCIMoe7HR@BNoEp_A;3Y?TmmGxh&H)s=Zgi-^GJSpZ5cp1-
zl6eS5Ar{4Wg!HOj<O5`6vH|DilnymblbkhiYm}b7P>=PB@kp=OJhH|(riuHkN33wm
z)TxRl(m_>vMB^N1$^gn(n0*c<>?w~u?3MdO@_84cTHYyhY%JVhpF+WF3H!Mh*F(19
zi7>GV)_X2S6|FT6U%BiLULq>vC)}t&^N~K$Sm*pDpo<_mkX{L-lIFTn8XeI(0X(wb
Y+cM%=k)A5D2B>txs!Q>=Q276^zh*|>DF6Tf

literal 0
HcmV?d00001

diff --git a/Source/ZRC/zrc_ptbl.bin b/Source/ZRC/zrc_ptbl.bin
index ca19be4cf59067adde7344193c6ce429c4d6434d..5e3a2a4d5810860783a54d96f0114ee66e39c27d 100644
GIT binary patch
delta 14
VcmZo*YG9hMgGIMZapuH5E&wD=1y29~

delta 12
TcmZo*YG9hMW1;}Z!~+fh90df2

diff --git a/Source/ver.inc b/Source/ver.inc
index 0e2b5687..0525fbc7 100644
--- a/Source/ver.inc
+++ b/Source/ver.inc
@@ -2,4 +2,4 @@
 #DEFINE	RMN	1
 #DEFINE	RUP	1
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.1.1-pre.55"
+#DEFINE BIOSVER	"3.1.1-pre.56"
diff --git a/Source/ver.lib b/Source/ver.lib
index 8e71dfa2..c8ed827a 100644
--- a/Source/ver.lib
+++ b/Source/ver.lib
@@ -3,5 +3,5 @@ rmn	equ	1
 rup	equ	1
 rtp	equ	0
 biosver	macro
-	db	"3.1.1-pre.55"
+	db	"3.1.1-pre.56"
 	endm
diff --git a/Tools/cpmtools/diskdefs b/Tools/cpmtools/diskdefs
index db9ef4b2..c35156b3 100644
--- a/Tools/cpmtools/diskdefs
+++ b/Tools/cpmtools/diskdefs
@@ -271,6 +271,19 @@ diskdef interak
   os 2.2
 end
 
+# RomWBW 256KB ROM (128KB reserved, 128KB ROM Disk)
+
+diskdef wbw_rom256
+  seclen 512
+  tracks 4
+  sectrk 64
+  blocksize 2048
+  maxdir 256
+  skew 0
+  boottrk 0
+  os 2.2
+end
+
 # RomWBW 512KB ROM (128KB reserved, 384KB ROM Disk)
 
 diskdef wbw_rom512