mirror of
https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 14:11:48 -06:00
Update sd.asm
Refinements to sd.asm for RC2014 WizNet Module (SDMODE_MT).
This commit is contained in:
@@ -9,14 +9,14 @@
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; - TEST XC CARD TYPE DETECTION
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; - TRY TO GET INIT TO FAIL, REMOVE DELAYS AT START OF GOIDLE?
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;
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;--------------------------------------------------------------------------------------
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; SD Signal Active JUHA N8 CSIO PPI UART DSD MK4 SC
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; ------------ ------- ------- ------- ------- ------- ------- ------- ------- -------
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; CS (DAT3) LO -> RTC:2 RTC:2 RTC:2 ~PC:4 ~MCR:3 OPR:2 SD:2 ~RTC:2
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; CLK HI -> RTC:1 RTC:1 CSIO PC:1 ~MCR:2 OPR:1 CSIO CSIO
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; DI (CMD) HI -> RTC:0 RTC:0 CSIO PC:0 ~MCR:0 OPR:0 CSIO CSIO
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; DO (DAT0) HI -> RTC:7 RTC:6 CSIO PB:7 ~MSR:5 OPR:0 CSIO CSIO
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;--------------------------------------------------------------------------------------
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;----------------------------------------------------------------------------------------------
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; SD Signal Active JUHA N8 CSIO PPI UART DSD MK4 SC MT
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; ------------ ------- ------- ------- ------- ------- ------- ------- ------- ------- -------
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; CS (DAT3) LO -> RTC:2 RTC:2 RTC:2 ~PC:4 ~MCR:3 OPR:2 SD:2 ~RTC:2/3OPR:4/5
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; CLK HI -> RTC:1 RTC:1 CSIO PC:1 ~MCR:2 OPR:1 CSIO CSIO SPI
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; DI (CMD) HI -> RTC:0 RTC:0 CSIO PC:0 ~MCR:0 OPR:0 CSIO CSIO SPI
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; DO (DAT0) HI -> RTC:7 RTC:6 CSIO PB:7 ~MSR:5 OPR:0 CSIO CSIO SPI
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;----------------------------------------------------------------------------------------------
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;
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; CS = CHIP SELECT (AKA DAT3 FOR NON-SPI MODE)
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; CLK = CLOCK
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@@ -120,7 +120,7 @@ SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
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SD_OPRREG .EQU RTCIO ; USES RTC LATCHES FOR OPERATION
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SD_OPRDEF .EQU %00000001 ; QUIESCENT STATE
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SD_INPREG .EQU RTCIO ; INPUT REGISTER IS RTC
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SD_CS .EQU %00000100 ; RTC:2 IS SELECT
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SD_CS0 .EQU %00000100 ; RTC:2 IS SELECT
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SD_CLK .EQU %00000010 ; RTC:1 IS CLOCK
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SD_DI .EQU %00000001 ; RTC:0 IS DATA IN (CARD <- CPU)
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SD_DO .EQU %10000000 ; RTC:7 IS DATA OUT (CARD -> CPU)
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@@ -131,7 +131,7 @@ SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
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SD_OPRREG .EQU RTCIO ; USES RTC LATCHES FOR OPERATION
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SD_OPRDEF .EQU %00000001 ; QUIESCENT STATE
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SD_INPREG .EQU RTCIO ; INPUT REGISTER IS RTC
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SD_CS .EQU %00000100 ; RTC:2 IS SELECT
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SD_CS0 .EQU %00000100 ; RTC:2 IS SELECT
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SD_CLK .EQU %00000010 ; RTC:1 IS CLOCK
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SD_DI .EQU %00000001 ; RTC:0 IS DATA IN (CARD <- CPU)
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SD_DO .EQU %01000000 ; RTC:6 IS DATA OUT (CARD -> CPU)
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@@ -141,7 +141,7 @@ SD_DO .EQU %01000000 ; RTC:6 IS DATA OUT (CARD -> CPU)
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SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
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SD_OPRREG .EQU RTCIO ; USES RTC LATCHES FOR OPERATION
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SD_OPRDEF .EQU %00000000 ; QUIESCENT STATE
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SD_CS .EQU %00000100 ; RTC:2 IS SELECT
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SD_CS0 .EQU %00000100 ; RTC:2 IS SELECT
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SD_CNTR .EQU Z180_CNTR
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SD_TRDR .EQU Z180_TRDR
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#ENDIF
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@@ -155,7 +155,7 @@ SD_PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT
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SD_OPRREG .EQU SD_PPIC ; PPI PORT C IS OPR REG
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SD_OPRDEF .EQU %00110001 ; CS HI, DI HI
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SD_INPREG .EQU SD_PPIB ; INPUT REGISTER IS PPI PORT B
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SD_CS .EQU %00010000 ; PPIC:4 IS SELECT
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SD_CS0 .EQU %00010000 ; PPIC:4 IS SELECT
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SD_CLK .EQU %00000010 ; PPIC:1 IS CLOCK
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SD_DI .EQU %00000001 ; PPIC:0 IS DATA IN (CARD <- CPU)
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SD_DO .EQU %10000000 ; PPIB:7 IS DATA OUT (CARD -> CPU)
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@@ -166,7 +166,7 @@ SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
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SD_OPRREG .EQU SIO_MCR ; UART MCR PORT (OUTPUT: CS, CLK, DIN)
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SD_OPRDEF .EQU %00001100 ; QUIESCENT STATE
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SD_INPREG .EQU SIO_MSR ; INPUT REGISTER IS MSR
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SD_CS .EQU %00001000 ; UART MCR:3 IS SELECT
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SD_CS0 .EQU %00001000 ; UART MCR:3 IS SELECT
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SD_CLK .EQU %00000100 ; UART MCR:2 IS CLOCK
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SD_DI .EQU %00000001 ; UART MCR:0 IS DATA IN (CARD <- CPU)
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SD_DO .EQU %00100000 ; UART MSR:5 IS DATA OUT (CARD -> CPU)
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@@ -179,7 +179,7 @@ SD_OPRDEF .EQU %00000001 ; QUIESCENT STATE
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SD_INPREG .EQU SD_OPRREG ; INPUT REGISTER IS OPRREG
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SD_SELREG .EQU SD_OPRREG + 1 ; DEDICATED SELECTION REGISTER
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SD_SELDEF .EQU %00000000 ; SELECTION REGISTER DEFAULT
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SD_CS .EQU %00000100 ; RTC:2 IS SELECT
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SD_CS0 .EQU %00000100 ; RTC:2 IS SELECT
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SD_CLK .EQU %00000010 ; RTC:1 IS CLOCK
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SD_DI .EQU %00000001 ; RTC:6 IS DATA IN (CARD <- CPU)
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SD_DO .EQU %00000001 ; RTC:0 IS DATA OUT (CARD -> CPU)
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@@ -189,7 +189,7 @@ SD_DO .EQU %00000001 ; RTC:0 IS DATA OUT (CARD -> CPU)
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SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
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SD_OPRREG .EQU $89 ; DEDICATED MK4 SDCARD REGISTER
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SD_OPRDEF .EQU %00000000 ; QUIESCENT STATE
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SD_CS .EQU %00000100 ; SELECT ACTIVE
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SD_CS0 .EQU %00000100 ; SELECT ACTIVE
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SD_CNTR .EQU Z180_CNTR
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SD_TRDR .EQU Z180_TRDR
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#ENDIF
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@@ -205,19 +205,25 @@ SD_TRDR .EQU Z180_TRDR
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#ENDIF
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;
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#IF (SDMODE == SDMODE_MT) ; MT shift register for RC2014 (ref SDMODE_CSIO)
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SD_BASE .EQU %01011100 ; Dedicated base address $5C
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SD_DEVCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
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SD_OPRREG .EQU SD_BASE+2 ; SD CHIP SELECTOR
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SD_OPRDEF .EQU %00100000 ; QUIESCENT STATE
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SD_CD0 .EQU %00000001 ; IN/OUT:SD_OPREG:0 = CD0, PMOD pull CD0 low
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SD_CD1 .EQU %00000010 ; IN:SD_OPREG:1 = CD1, IN=0 Card detect switch
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SD_CD2 .EQU %00000100 ; IN:SD_OPREG:2 = CD2, IN=0 Card detect switch
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ENETCS0 .EQU %00001000 ; IN/OUT:SD_OPREG:3 = CS0, PMOD SPI CS
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SDCS1 .EQU %00010000 ; IN/OUT:SD_OPREG:4 = CS1, SDCARD1 CS, IN=1 Card present
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PARK .EQU %00100000 ; IN/OUT:SD_OPREG:5 = CS2, SDCARD2 CS, IN=1 Card present
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SD_WRTR .EQU %01011100 ; Write data and transfer
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SD_RDTR .EQU %01011101 ; Read data and transfer
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SD_RDNTR .EQU %01011100 ; Read data and NO transfer
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;
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; 3 SPI CHANNELS. CHANNEL 0 (CDX & CSX) IS A DEDICATED CONNECTION TO ONBOARD
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; WIZNET W5500 AND IS NOT USED HERE. CHANNEL 1 (CD0 & CS0) & 2 (CD1 & CS1)
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; ARE ASSUMED TO BE CONNECTED TO SD CARDS.
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;
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SD_BASE .EQU $5C ; Module base address
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SD_DEVCNT .EQU 2 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
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SD_WRTR .EQU SD_BASE + 0 ; Write data and transfer
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SD_RDTR .EQU SD_BASE + 1 ; Read data and transfer
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SD_RDNTR .EQU SD_BASE + 0 ; Read data and NO transfer
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SD_OPRREG .EQU SD_BASE + 2 ; SD CHIP SELECTOR
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SD_OPRDEF .EQU %00000000 ; QUIESCENT STATE
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SD_CDX .EQU %00000001 ; IN/OUT:SD_OPREG:0 = CD0, PMOD pull CD0 low
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SD_CD0 .EQU %00000010 ; IN:SD_OPREG:1 = CD1, IN=0 Card detect switch
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SD_CD1 .EQU %00000100 ; IN:SD_OPREG:2 = CD2, IN=0 Card detect switch
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SD_CSX .EQU %00001000 ; IN/OUT:SD_OPREG:3 = CS0, PMOD SPI CS
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SD_CS0 .EQU %00010000 ; IN/OUT:SD_OPREG:4 = CS1, SDCARD1 CS, IN=1 Card present
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SD_CS1 .EQU %00100000 ; IN/OUT:SD_OPREG:5 = CS2, SDCARD2 CS, IN=1 Card present
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#ENDIF
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;
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; SD CARD COMMANDS
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@@ -413,7 +419,7 @@ SD_INIT:
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#IF (SDMODE == SDMODE_MT)
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PRTS(" MODE=MT$")
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PRTS(" IO=0x$")
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LD A,SD_OPRREG
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LD A,SD_BASE
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CALL PRTHEXBYTE
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#ENDIF
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;
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@@ -577,50 +583,51 @@ SD_PROBE:
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RET ; RETURN W/ ZF SET AS NEEDED
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#ENDIF
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;
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#IF (SDMODE == SDMODE_MT)
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LD A,SD_OPRDEF
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OUT (SD_OPRREG),A ; MAKE SURE CONTROL REGISTER IS CLEARED
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; TEST WITH PMOD NOT CONNECTED
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; IN A,(SD_OPRREG)
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; AND SD_CD0+SD_CS0 ; ISOLATE CD0 AND CS0
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; CP SD_CD0+SD_CS0 ; BOTH SHOULD BE HIGH
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; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT
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; TEST CD0
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; LD A,SD_CD0 ; D1=DNP CANNOT TEST
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; OUT (SD_OPRREG),A
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; IN A,(SD_OPRREG)
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; AND SD_CD0
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; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
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; TEST CS0
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; LD A,SD_CS0 ; D2=DNP CANNOT TEST
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; OUT (SD_OPRREG),A
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; IN A,(SD_OPRREG)
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; AND SD_CS0
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; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
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; TEST CS1
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; LD A,SD_CS1
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; OUT (SD_OPRREG),A
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; IN A,(SD_OPRREG)
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; AND SD_CS1
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; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
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; ; TEST CS2
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; LD A,SD_CS2
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; OUT (SD_OPRREG),A
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; IN A,(SD_OPRREG)
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; AND SD_CS2
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; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
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LD A,SD_OPRDEF
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OUT (SD_OPRREG),A ; MAKE SURE CONTROL REGISTER IS CLEARED
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#ENDIF
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;#IF (SDMODE == SDMODE_MT)
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; LD A,SD_OPRDEF
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; OUT (SD_OPRREG),A ; MAKE SURE CONTROL REGISTER IS CLEARED
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;;
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; ; TEST WITH PMOD NOT CONNECTED
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;; IN A,(SD_OPRREG)
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;; AND SD_CD0+SD_CS0 ; ISOLATE CD0 AND CS0
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;; CP SD_CD0+SD_CS0 ; BOTH SHOULD BE HIGH
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;; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT
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; ; TEST CD0
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;; LD A,SD_CD0 ; D1=DNP CANNOT TEST
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;; OUT (SD_OPRREG),A
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;; IN A,(SD_OPRREG)
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;; AND SD_CD0
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;; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
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; ; TEST CS0
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;; LD A,SD_CS0 ; D2=DNP CANNOT TEST
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;; OUT (SD_OPRREG),A
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;; IN A,(SD_OPRREG)
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;; AND SD_CS0
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;; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
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; ; TEST CS1
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;; LD A,SD_CS1
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;; OUT (SD_OPRREG),A
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;; IN A,(SD_OPRREG)
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;; AND SD_CS1
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;; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
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;; ; TEST CS2
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;; LD A,SD_CS2
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;; OUT (SD_OPRREG),A
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;; IN A,(SD_OPRREG)
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;; AND SD_CS2
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;; JR NZ,SD_PROBE_FAIL ; FAIL IF NOT PULLED LOW
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;
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; LD A,SD_OPRDEF
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; OUT (SD_OPRREG),A ; MAKE SURE CONTROL REGISTER IS CLEARED
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;#ENDIF
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;
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XOR A ; SIGNAL SUCCESS
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;
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#IF (SDMODE == SDMODE_MT)
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SD_PROBE_FAIL:
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LD A,SD_OPRDEF
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OUT (SD_OPRREG),A ; MAKE SURE CONTROL REGISTER IS CLEARED
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#ENDIF
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;#IF (SDMODE == SDMODE_MT)
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;SD_PROBE_FAIL:
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; LD A,SD_OPRDEF
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; OUT (SD_OPRREG),A ; MAKE SURE CONTROL REGISTER IS CLEARED
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;#ENDIF
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RET ; AND RETURN
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;
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;=============================================================================
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@@ -830,13 +837,6 @@ SD_INITCARD:
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JP Z,SD_NOMEDIA ; Z=NO MEDIA, HANDLE IF SO
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;
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; WAKE UP THE CARD, KEEP DIN HI (ASSERTED) AND /CS HI (DEASSERTED)
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#IF (SDMODE == SDMODE_MT)
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LD A,$FF
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LD B,$10 ; MIN 74 CLOCKS REQUIRED, WE USE 128 ($10 * 8)
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SD_INITCARD1:
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OUT (SD_WRTR),A ; SEND 8 CLOCKS
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DJNZ SD_INITCARD1
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#ELSE
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LD B,$10 ; MIN 74 CLOCKS REQUIRED, WE USE 128 ($10 * 8)
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SD_INITCARD1:
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LD A,$FF ; KEEP DIN HI
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@@ -844,7 +844,6 @@ SD_INITCARD1:
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CALL SD_PUT ; SEND 8 CLOCKS
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POP BC ; RESTORE LOOP CONTROL
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DJNZ SD_INITCARD1 ; LOOP AS NEEDED
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#ENDIF
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;
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; PUT CARD IN IDLE STATE
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CALL SD_GOIDLE ; GO TO IDLE
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@@ -875,9 +874,9 @@ SD_INITCARD3:
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CALL VDELAY ; CPU SPEED NORMALIZED DELAY
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; SEND APP CMD INTRODUCER
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CALL SD_EXECACMD ; SEND APP COMMAND INTRODUCER
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#IF (SDMODE == SDMODE_MT)
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CALL NZ,SD_EXECACMD ; retry any fail
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#ENDIF
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;#IF (SDMODE == SDMODE_MT)
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; CALL NZ,SD_EXECACMD ; retry any fail
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;#ENDIF
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CP SD_STCMDERR ; COMMAND ERROR?
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JR Z,SD_INITCARD3A ; IF SO, TRY MMC CARD INIT
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OR A ; SET FLAGS
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@@ -936,11 +935,7 @@ SD_INITCARD4:
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CALL SD_EXECCMD ; EXECUTE COMMAND
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RET NZ ; ABORT ON ERROR
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; CMD58 WORKED, GET OCR DATA AND SET CARD TYPE
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#IF (SDMODE == SDMODE_MT)
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IN A,(SD_RDTR) ; BITS 31-24
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#ELSE
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CALL SD_GET ; BITS 31-24
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#ENDIF
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CALL SD_DONE ; FINISH THE TRANSACTION
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AND $40 ; ISOLATE BIT 30 (CCS)
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LD C,SD_TYPESDSC ; ASSUME V1 CARD
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@@ -1303,16 +1298,6 @@ SD_EXECCMD:
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SD_EXECCMD0:
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; SEND THE COMMAND
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LD HL,SD_CMDBUF ; POINT TO COMMAND BUFFER
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#IF (SDMODE == SDMODE_MT)
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; OUT (SD_WRTR),A ; SEND IT
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LD C,SD_WRTR
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OUTI
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OUTI
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OUTI
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OUTI
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OUTI
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OUTI
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#ELSE
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LD E,6 ; COMMANDS ARE 6 BYTES
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SD_EXECCMD1:
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LD A,(HL) ; PREPARE TO SEND NEXT BYTE
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@@ -1320,31 +1305,15 @@ SD_EXECCMD1:
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INC HL ; POINT TO NEXT BYTE
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DEC E ; DEC LOOP COUNTER
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JR NZ,SD_EXECCMD1 ; LOOP TILL DONE W/ ALL 6 BYTES
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#ENDIF
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;
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#IF (SD_NOPULLUP)
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; THE FIRST FILL BYTE IS DISCARDED! THIS HACK IS REQUIRED BY
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; STUPID SD CARD ADAPTERS THAT NOW OMIT THE MISO PULL-UP. SEE
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; COMMENTS AT TOP OF THIS FILE.
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#IF (SDMODE == SDMODE_MT)
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IN A,(SD_RDTR) ; GET A BYTE AND DISCARD IT
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#ELSE
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CALL SD_GET ; GET A BYTE AND DISCARD IT
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#ENDIF
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#ENDIF
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;
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; GET RESULT
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#IF (SDMODE == SDMODE_MT)
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; 256 loops might not be long enough timeout
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; when only IN is required to read data
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LD E,0 ; INIT TIMEOUT LOOP COUNTER
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SD_EXECCMD2:
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IN A,(SD_RDTR) ; GET A BYTE FROM THE CARD
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OR A ; SET FLAGS
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JP P,SD_EXECCMD3 ; IF HIGH BIT IS 0, WE HAVE RESULT
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DEC E ; OTHERWISE DECREMENT LOOP COUNTER
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JR NZ,SD_EXECCMD2 ; AND LOOP UNTIL TIMEOUT
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#ELSE
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LD E,0 ; INIT TIMEOUT LOOP COUNTER
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SD_EXECCMD2:
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CALL SD_GET ; GET A BYTE FROM THE CARD
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@@ -1352,7 +1321,6 @@ SD_EXECCMD2:
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JP P,SD_EXECCMD3 ; IF HIGH BIT IS 0, WE HAVE RESULT
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DEC E ; OTHERWISE DECREMENT LOOP COUNTER
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JR NZ,SD_EXECCMD2 ; AND LOOP UNTIL TIMEOUT
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#ENDIF
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JP SD_ERRCMDTO
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;
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SD_EXECCMD3:
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@@ -1524,11 +1492,7 @@ SD_PUTDATA3:
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SD_WAITRDY:
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LD DE,$FFFF ; LOOP MAX (TIMEOUT)
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SD_WAITRDY1:
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#IF (SDMODE == SDMODE_MT)
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IN A,(SD_RDTR)
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#ELSE
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CALL SD_GET
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#ENDIF
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INC A ; $FF -> $00
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RET Z ; IF READY, RETURN
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DEC DE
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@@ -1552,11 +1516,7 @@ SD_WAITRDY1:
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SD_DONE:
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PUSH AF
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LD A,$FF
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#IF (SDMODE == SDMODE_MT)
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OUT (SD_WRTR),A
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#ELSE
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CALL SD_PUT
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#ENDIF
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CALL SD_DESELECT
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POP AF
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RET
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@@ -1589,14 +1549,14 @@ SD_SETUP:
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OUT (SD_OPRREG),A
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#ENDIF
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;
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#IF ((SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_DSD) | (SDMODE == SDMODE_PPI))
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#IF ((SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_DSD) | (SDMODE == SDMODE_PPI)| (SDMODE == SDMODE_MT))
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LD A,SD_OPRDEF
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LD (SD_OPRVAL),A
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OUT (SD_OPRREG),A
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#ENDIF
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||||
;
|
||||
#IF (SDMODE == SDMODE_UART)
|
||||
SD_OPRMSK .EQU (SD_CS | SD_CLK | SD_DI)
|
||||
SD_OPRMSK .EQU (SD_CS0 | SD_CLK | SD_DI)
|
||||
IN A,(SD_OPRREG) ; OPRREG == SIO_MCR
|
||||
AND ~SD_OPRMSK ; MASK OFF SD CONTROL BITS
|
||||
OR SD_OPRDEF ; SET DEFAULT BITS
|
||||
@@ -1645,34 +1605,29 @@ SD_CHKWP:
|
||||
; SELECT CARD
|
||||
;
|
||||
SD_SELECT:
|
||||
LD A,(SD_OPRVAL)
|
||||
#IF ((SDMODE == SDMODE_PPI) | (SDMODE == SDMODE_UART) | (SDMODE == SDMODE_SC))
|
||||
#IF (SDMODE == SDMODE_SC)
|
||||
LD A,(IY+SD_DEV) ; GET CURRENT DEVICE
|
||||
OR A ; SET FLAGS
|
||||
LD A,(SD_OPRVAL) ; GET CURRENT OPRVAL BACK
|
||||
JR NZ,SD_SELECT1 ; IF NOT ZERO, DO SECONDARY
|
||||
; ASSERT PRIMARY CS, DEASSERT SECONDARY
|
||||
AND ~SD_CS0
|
||||
OR SD_CS1
|
||||
; ASSERT PRIMARY CS, DEASSERT SECONDARY (IF ANY)
|
||||
OR SD_CS0
|
||||
#IF (SD_DEVCNT > 1)
|
||||
AND ~SD_CS1
|
||||
#ENDIF
|
||||
JR SD_SELECT2
|
||||
SD_SELECT1:
|
||||
; DEASSERT PRIMARY CS, ASSERT SECONDARY
|
||||
OR SD_CS0
|
||||
AND ~SD_CS1
|
||||
; DEASSERT PRIMARY CS, ASSERT SECONDARY (IF ANY)
|
||||
AND ~SD_CS0
|
||||
#IF (SD_DEVCNT > 1)
|
||||
OR SD_CS1
|
||||
#ENDIF
|
||||
SD_SELECT2:
|
||||
; ADJUST BIT(S) FOR INTERFACES USING INVERTED CS BITS
|
||||
#IF ((SDMODE == SDMODE_PPI) | (SDMODE == SDMODE_UART) | (SDMODE == SDMODE_SC))
|
||||
#IF (SD_DEVCNT > 1)
|
||||
XOR SD_CS0 | SD_CS1
|
||||
#ELSE
|
||||
AND ~SD_CS ; SET SD_CS (CHIP SELECT)
|
||||
#ENDIF
|
||||
#ELSE
|
||||
#IF (SDMODE == SDMODE_MT)
|
||||
LD A,SDCS1
|
||||
SD_SELECT3:
|
||||
LD D,A
|
||||
LD A,(SD_OPRVAL)
|
||||
OR D
|
||||
#ELSE
|
||||
OR SD_CS ; SET SD_CS (CHIP SELECT)
|
||||
XOR SD_CS0
|
||||
#ENDIF
|
||||
#ENDIF
|
||||
LD (SD_OPRVAL),A
|
||||
@@ -1683,18 +1638,17 @@ SD_SELECT3:
|
||||
;
|
||||
SD_DESELECT:
|
||||
LD A,(SD_OPRVAL)
|
||||
#IF ((SDMODE == SDMODE_PPI) | (SDMODE == SDMODE_UART) | (SDMODE == SDMODE_SC))
|
||||
#IF (SDMODE == SDMODE_SC)
|
||||
OR SD_CS0 ; RESET PRIMARY CHIP SELECT
|
||||
OR SD_CS1 ; RESET SECONDARY CHIP SELECT
|
||||
#ELSE
|
||||
OR SD_CS ; RESET SD_CS (CHIP SELECT)
|
||||
#ENDIF
|
||||
#IF (SD_DEVCNT > 1)
|
||||
AND ~(SD_CS0 | SD_CS1)
|
||||
#ELSE
|
||||
#IF (SDMODE == SDMODE_MT)
|
||||
LD A,PARK ; WHY IS PARK (CS2) BEING ASSERTED HERE???
|
||||
AND ~SD_CS0
|
||||
#ENDIF
|
||||
; ADJUST BIT(S) FOR INTERFACES USING INVERTED CS BITS
|
||||
#IF ((SDMODE == SDMODE_PPI) | (SDMODE == SDMODE_UART) | (SDMODE == SDMODE_SC))
|
||||
#IF (SD_DEVCNT > 1)
|
||||
XOR SD_CS0 | SD_CS1
|
||||
#ELSE
|
||||
AND ~SD_CS ; RESET SD_CS (CHIP SELECT)
|
||||
XOR SD_CS0
|
||||
#ENDIF
|
||||
#ENDIF
|
||||
LD (SD_OPRVAL),A
|
||||
@@ -1723,9 +1677,12 @@ SD_WAITRX:
|
||||
;
|
||||
; SEND ONE BYTE
|
||||
;
|
||||
#IF (SDMODE != SDMODE_MT) ; SDMODE_MT uses "OUT (SD_WRTR),A"
|
||||
;
|
||||
SD_PUT:
|
||||
;
|
||||
#IF (SDMODE == SDMODE_MT)
|
||||
OUT (SD_WRTR),A
|
||||
#ELSE
|
||||
;
|
||||
#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC))
|
||||
CALL MIRROR ; MSB<-->LSB MIRROR BITS, RESULT IN C
|
||||
CALL SD_WAITTX ; MAKE SURE WE ARE DONE SENDING
|
||||
@@ -1753,14 +1710,17 @@ SD_PUT1:
|
||||
LD A,(SD_OPRVAL) ; LOAD CURRENT OPR VALUE
|
||||
OUT (SD_OPRREG),A ; LEAVE WITH CLOCK LOW
|
||||
#ENDIF
|
||||
RET ; DONE
|
||||
#ENDIF
|
||||
RET ; DONE
|
||||
;
|
||||
; RECEIVE ONE BYTE
|
||||
;
|
||||
#IF (SDMODE != SDMODE_MT) ; SDMODE_MT uses "IN A,(SD_RDTR)"
|
||||
;
|
||||
SD_GET:
|
||||
;
|
||||
#IF (SDMODE == SDMODE_MT)
|
||||
IN A,(SD_RDTR)
|
||||
#ELSE
|
||||
#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_SC))
|
||||
CALL SD_WAITTX ; MAKE SURE WE ARE DONE SENDING
|
||||
IN0 A,(Z180_CNTR) ; GET CSIO STATUS
|
||||
@@ -1801,8 +1761,8 @@ SD_GET1:
|
||||
XOR $FF ; DO IS INVERTED ON UART
|
||||
#ENDIF
|
||||
#ENDIF
|
||||
RET
|
||||
#ENDIF
|
||||
RET
|
||||
;
|
||||
;=============================================================================
|
||||
; ERROR HANDLING AND DIAGNOSTICS
|
||||
@@ -1857,7 +1817,9 @@ SD_ERR2:
|
||||
CALL SD_PRTSTAT
|
||||
CALL SD_REGDUMP
|
||||
#ENDIF
|
||||
PUSH AF
|
||||
CALL SD_DESELECT ; De-select if there was an error
|
||||
POP AF
|
||||
OR A ; SET FLAGS
|
||||
RET
|
||||
;
|
||||
|
||||
Reference in New Issue
Block a user