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ez80: request CPU speed from ez80 firmware

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This commit is contained in:
Dean Netherton
2024-07-20 12:58:59 +10:00
parent 53198e066c
commit 026fa3d0d7
2 changed files with 51 additions and 33 deletions
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6
Source/HBIOS/ez80instr.inc
View File

@@ -11,9 +11,9 @@
#DEFINE EZ80_FN .DB $49, $D7 ; RST.L $10
#DEFINE EZ80_BNKSEL .DB $49, $DF ; RST.L $18
#DEFINE EZ80_UTIL_INIT LD A, 0 \ LD B, 0 \ EZ80_FN
#DEFINE EZ80_UTIL_EHL_TO_HL LD A, 0 \ LD B, 1 \ EZ80_FN
#DEFINE EZ80_UTIL_HL_TO_EHL LD A, 0 \ LD B, 2 \ EZ80_FN
#DEFINE EZ80_UTIL_INIT XOR A \ LD B, 0 \ EZ80_FN
#DEFINE EZ80_UTIL_EHL_TO_HL XOR A \ LD B, 1 \ EZ80_FN
#DEFINE EZ80_UTIL_HL_TO_EHL XOR A \ LD B, 2 \ EZ80_FN
#DEFINE EZ80_RTC_INIT LD A, 1 \ LD B, 0 \ EZ80_FN
#DEFINE EZ80_RTC_GET_TIME LD A, 1 \ LD B, 1 \ EZ80_FN

78
Source/HBIOS/hbios.asm
View File

@@ -1431,32 +1431,6 @@ BOOTWAIT:
OUT0 (RPH_ACR),A ; ... REGISTER IS INITIALIZED
#ENDIF
#IF (CPUFAM == CPU_EZ80)
; PROVIDE THE EZ80 FIRMWARE WITH PLATFORM CONFIGUATIONS
XOR A ; FUNCTION CODE TO INIT FIRMWARE
LD HL, PLT_DESCR
EZ80_UTIL_INIT() ; PROVIDE FIRMWARE DETAILS OF BUILD CONFIGURATION
JR PLT_DESCR_END
PLT_DESCR:
.DB PLT_RCZ80
.DB MEMMGR
.DW RAMSIZE
.DW ROMSIZE
.DB MPGSEL_0
.DB MPGSEL_1
.DB MPGSEL_2
.DB MPGSEL_3
.DB MPGENA
PLT_DESCR_END:
#ENDIF
;
; INITIALIZE DIAGNOSTIC AND/OR FRONT PANEL LED(S) TO INDICATE THE
; SYSTEM IS ALIVE. WE HAVE NO RAM AT THIS TIME, SO WE CANNOT USE
@@ -2157,9 +2131,52 @@ HB_CLRIVT_Z:
; 2: Z8S180 - ORIGINAL S-CLASS, REV. K, AKA SL1960, NO ASCI BRG
; 3: Z8S180 - REVISED S-CLASS, REV. N, W/ ASCI BRG
; 4: Z8280
; 5: eZ80
;
LD HL,0 ; L = 0 MEANS Z80
;
#IF (CPUFAM == CPU_EZ80)
; PROVIDE THE EZ80 FIRMWARE WITH PLATFORM CONFIGUATIONS
LD HL, PLT_DESCR
EZ80_UTIL_INIT() ; PROVIDE FIRMWARE DETAILS OF BUILD CONFIGURATION
LD A, (EZ80_PLT_CPUMHZ)
LD (CB_CPUMHZ), A
LD HL, (EZ80_PLT_CPUKHZ)
LD (CB_CPUKHZ), HL
LD (HB_CPUOSC), HL
JR PLT_DESCR_END
PLT_DESCR:
EZ80_PLT_EZ80VER:
.DB RMJ
.DB RMN
.DB RUP
.DB RTP
EZ80_PLT_CPUOSC:
.DW CPUOSC & $FFFF
.DW CPUOSC >> 16
EZ80_PLT_CPUMHZ:
.DB PLATFORM
EZ80_PLT_CPUKHZ:
.DB MEMMGR
.DB RAMSIZE & $FF
EZ80_PLT_CHIP_ID:
.DB RAMSIZE >> 8
EZ80_PLT_RESVRD:
.DB ROMSIZE & $FF
.DB ROMSIZE >> 8
.DB 0 ; RESERVED
.DB 0 ; RESERVED
PLT_DESCR_END:
LD HL,5
#ENDIF
;
#IF (CPUFAM == CPU_Z180)
;
; TEST FOR ORIGINAL Z180 USING MLT
@@ -2198,10 +2215,6 @@ HB_CLRIVT_Z:
LD L,4 ; WE ARE Z280
;
#ENDIF
#IF (CPUFAM == CPU_EZ80)
LD L,5
#ENDIF
;
HB_CPU1:
LD A,L
@@ -2261,6 +2274,7 @@ HB_CPU1:
;
; INIT OSCILLATOR SPEED FROM CONFIG
;
#IF (CPUFAM != CPU_EZ80)
LD HL,CPUOSC / 1000 ; OSC SPD IN KHZ
LD (HB_CPUOSC),HL ; INIT HB_CPUOSC DEFAULT
;
@@ -2285,6 +2299,7 @@ HB_CPU1:
LD (HB_CPUOSC),HL ; RECORD MEASURED SPEED
;
HB_CPU2:
#ENDIF
;
;--------------------------------------------------------------------------------------------------
; FINALIZE OPERATING CPU SPEED
@@ -7254,6 +7269,8 @@ FP_GETSWITCHES:
FP_ACTIVE:
FPSW_ACTIVE .DB TRUE
FPLED_ACTIVE .DB TRUE
#IF (CPUFAM != CPU_EZ80) ; eZ80 WILL RETURNED ITS MEASURED CPUOSC - SO NO NEED FOR DETECTION HERE
;
;==================================================================================================
; CPU SPEED DETECTION USING DS-1302 RTC
@@ -7372,6 +7389,7 @@ HB_CPUSPD2:
; HANDLE NO RTC OR NOT TICKING
OR $FF ; SIGNAL ERROR
RET ; AND DONE
#ENDIF ; CPUFAM != CPU_EZ80
;
HB_UTIL_END .EQU $
;