Update dsrtc.asm

Make it easier to define customer battery or supercapacitor charge rates.
This commit is contained in:
b1ackmai1er
2019-08-18 21:07:06 +08:00
parent a9780aa8be
commit 03c6cf9d51

View File

@@ -95,6 +95,15 @@ DSRTC_CE .EQU %00010000 ; BIT 4 IS CHIP ENABLE (CE)
DSRTC_MASK .EQU %11110000 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
DSRTC_IDLE .EQU %00100000 ; QUIESCENT STATE
;
; VALUES FOR DIFFERENT BATTERY OR SUPERCAPACITOR CHARGE RATES
;
DS1d2k .EQU %10100101 ; 1 DIODE 2K RESISTOR (DEFAULT)
DS1d4k .EQU %10100110 ; 1 DIODE 4K RESISTOR
DS1d8k .EQU %10100111 ; 1 DOIDE 8K RESISTOR
DS2d2k .EQU %10101001 ; 2 DIODES 2K RESISTOR
DS2d4k .EQU %10101010 ; 2 DIODES 4K RESISTOR
DS2d8k .EQU %10101011 ; 2 DIODES 8K RESISTOR
;
#ENDIF
;
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
@@ -161,7 +170,7 @@ DSRTC_INIT1:
LD E,$90 ; ACCESS CHARGE REGISTER
CALL DSRTC_CMD ;
LD E,$A5 ; STD CHARGE VALUES
LD E,DS1d2k ; STD CHARGE VALUES
CALL DSRTC_PUT ;
CALL DSRTC_END ; FINISH REG WRITE