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https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 22:43:15 -06:00
Update dsrtc.asm
Make it easier to define customer battery or supercapacitor charge rates.
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@@ -95,6 +95,15 @@ DSRTC_CE .EQU %00010000 ; BIT 4 IS CHIP ENABLE (CE)
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DSRTC_MASK .EQU %11110000 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
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DSRTC_IDLE .EQU %00100000 ; QUIESCENT STATE
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;
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; VALUES FOR DIFFERENT BATTERY OR SUPERCAPACITOR CHARGE RATES
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;
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DS1d2k .EQU %10100101 ; 1 DIODE 2K RESISTOR (DEFAULT)
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DS1d4k .EQU %10100110 ; 1 DIODE 4K RESISTOR
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DS1d8k .EQU %10100111 ; 1 DOIDE 8K RESISTOR
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DS2d2k .EQU %10101001 ; 2 DIODES 2K RESISTOR
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DS2d4k .EQU %10101010 ; 2 DIODES 4K RESISTOR
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DS2d8k .EQU %10101011 ; 2 DIODES 8K RESISTOR
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;
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#ENDIF
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;
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#IF (DSRTCMODE == DSRTCMODE_MFPIC)
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@@ -161,7 +170,7 @@ DSRTC_INIT1:
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LD E,$90 ; ACCESS CHARGE REGISTER
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CALL DSRTC_CMD ;
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LD E,$A5 ; STD CHARGE VALUES
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LD E,DS1d2k ; STD CHARGE VALUES
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CALL DSRTC_PUT ;
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CALL DSRTC_END ; FINISH REG WRITE
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