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Preliminary Support for S100 FPGA Z80 Platform
- S100 FPGA Z80 Platform - Simple Serial Driver
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@@ -2408,14 +2408,19 @@ to see if it is incrementing.
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|----------------------------------------|----------------------------------------|
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| B: 0xF8 | A: Status |
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| C: 0xD1 | DEHL: Seconds Count |
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| | C: Ticks per Second |
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| | C: Remainder Ticks |
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Return the a Seconds Count (DEHL) with the number of seconds that have
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Return the Seconds Count (DEHL) with the number of seconds that have
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elapsed since the system was started. This is a double-word binary
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value. Additionally, the number of Ticks per Second (C) is returned.
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The returned Status (A) is a standard HBIOS result code.
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value. Additionally, Remainder Ticks (C) is returned and contains the number
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of ticks that have elapsed within the current second.
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This availability of the Seconds Count (DEHL) is dependent on having a
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Note that Remainder Ticks (C) will have a value from 0 to 49 since there are
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50 ticks per second. So, Remainder Ticks does not represent a fraction of the
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current second. Remainder Ticks (C) can be doubled to derive the hundredths of
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milliseconds elapsed within the current second.
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The availability of the Seconds Count (DEHL) is dependent on having a
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system timer active. If the hardware configuration has no system timer,
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then Seconds Count (DEHL) will not increment.
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@@ -264,6 +264,7 @@ is discussed in [Customizing RomWBW].
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| [Heath H8 Z80 System]^10^ | H8 | HEATH_std.rom | 115200 |
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| [EP Mini-ITX Z180]^11^ | RCBus? | EPITX_std.rom | 115200 |
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| [NABU w/ RomWBW Option Board]^10^ | NABU | NABU_std.rom | 115200 |
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| [S100 FPGA Z80]^9^ | S100 | FZ80_std.rom | 9600 |
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| ^1^Designed by Andrew Lynch
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| ^2^Designed by Sergey Kiselev
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@@ -5891,6 +5892,33 @@ S- MD: TYPE=RAM
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`\clearpage`{=latex}
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### S100 FPGA Z80
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#### ROM Image File: FZ80_std.rom
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| | |
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|-------------------|---------------|
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| Default CPU Speed | 8.000 MHz |
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| Interrupts | None |
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| System Timer | None |
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| Serial Default | 9600 Baud |
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| Memory Manager | Z2 |
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| ROM Size | 0 KB |
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| RAM Size | 512 KB |
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##### Supported Hardware (see [Appendix B - Device Summary]):
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FP: LEDIO=255
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SSER: IO=52
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SCON: IO=0
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MD: TYPE=RAM
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PPIDE: IO=48, MASTER
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PPIDE: IO=48, SLAVE
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##### Notes:
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- Requires matching FPGA code
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## Appendix B - Device Summary
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The table below briefly describes each of the possible devices that
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