Preliminary Support for S100 FPGA Z80 Platform

- S100 FPGA Z80 Platform
- Simple Serial Driver
This commit is contained in:
Wayne Warthen
2024-06-30 19:32:17 -07:00
parent 40f2a9f35a
commit 058a67dd40
50 changed files with 882 additions and 43 deletions

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@@ -2408,14 +2408,19 @@ to see if it is incrementing.
|----------------------------------------|----------------------------------------|
| B: 0xF8 | A: Status |
| C: 0xD1 | DEHL: Seconds Count |
| | C: Ticks per Second |
| | C: Remainder Ticks |
Return the a Seconds Count (DEHL) with the number of seconds that have
Return the Seconds Count (DEHL) with the number of seconds that have
elapsed since the system was started. This is a double-word binary
value. Additionally, the number of Ticks per Second (C) is returned.
The returned Status (A) is a standard HBIOS result code.
value. Additionally, Remainder Ticks (C) is returned and contains the number
of ticks that have elapsed within the current second.
This availability of the Seconds Count (DEHL) is dependent on having a
Note that Remainder Ticks (C) will have a value from 0 to 49 since there are
50 ticks per second. So, Remainder Ticks does not represent a fraction of the
current second. Remainder Ticks (C) can be doubled to derive the hundredths of
milliseconds elapsed within the current second.
The availability of the Seconds Count (DEHL) is dependent on having a
system timer active. If the hardware configuration has no system timer,
then Seconds Count (DEHL) will not increment.

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@@ -264,6 +264,7 @@ is discussed in [Customizing RomWBW].
| [Heath H8 Z80 System]^10^ | H8 | HEATH_std.rom | 115200 |
| [EP Mini-ITX Z180]^11^ | RCBus? | EPITX_std.rom | 115200 |
| [NABU w/ RomWBW Option Board]^10^ | NABU | NABU_std.rom | 115200 |
| [S100 FPGA Z80]^9^ | S100 | FZ80_std.rom | 9600 |
| ^1^Designed by Andrew Lynch
| ^2^Designed by Sergey Kiselev
@@ -5891,6 +5892,33 @@ S- MD: TYPE=RAM
`\clearpage`{=latex}
### S100 FPGA Z80
#### ROM Image File: FZ80_std.rom
| | |
|-------------------|---------------|
| Default CPU Speed | 8.000 MHz |
| Interrupts | None |
| System Timer | None |
| Serial Default | 9600 Baud |
| Memory Manager | Z2 |
| ROM Size | 0 KB |
| RAM Size | 512 KB |
##### Supported Hardware (see [Appendix B - Device Summary]):
FP: LEDIO=255
SSER: IO=52
SCON: IO=0
MD: TYPE=RAM
PPIDE: IO=48, MASTER
PPIDE: IO=48, SLAVE
##### Notes:
- Requires matching FPGA code
## Appendix B - Device Summary
The table below briefly describes each of the possible devices that