diff --git a/Doc/RomWBW Applications.pdf b/Doc/RomWBW Applications.pdf
index 00c59874..ff7ebba0 100644
Binary files a/Doc/RomWBW Applications.pdf and b/Doc/RomWBW Applications.pdf differ
diff --git a/Doc/RomWBW Disk Catalog.pdf b/Doc/RomWBW Disk Catalog.pdf
index 7e307136..456cdbb8 100644
Binary files a/Doc/RomWBW Disk Catalog.pdf and b/Doc/RomWBW Disk Catalog.pdf differ
diff --git a/Doc/RomWBW Errata.pdf b/Doc/RomWBW Errata.pdf
index a7d10936..67906bef 100644
Binary files a/Doc/RomWBW Errata.pdf and b/Doc/RomWBW Errata.pdf differ
diff --git a/Doc/RomWBW System Guide.pdf b/Doc/RomWBW System Guide.pdf
index ad427664..979a51f3 100644
Binary files a/Doc/RomWBW System Guide.pdf and b/Doc/RomWBW System Guide.pdf differ
diff --git a/Doc/RomWBW User Guide.pdf b/Doc/RomWBW User Guide.pdf
index 2b155cd2..22f008ee 100644
Binary files a/Doc/RomWBW User Guide.pdf and b/Doc/RomWBW User Guide.pdf differ
diff --git a/ReadMe.md b/ReadMe.md
index 20f5fed2..b624707f 100644
--- a/ReadMe.md
+++ b/ReadMe.md
@@ -3,7 +3,7 @@
 **RomWBW ReadMe** \
 Version 3.5 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-22 Dec 2024
+31 Dec 2024
 
 # Overview
 
diff --git a/ReadMe.txt b/ReadMe.txt
index 05ba015c..185fcb48 100644
--- a/ReadMe.txt
+++ b/ReadMe.txt
@@ -1,6 +1,6 @@
 RomWBW ReadMe
 Wayne Warthen (wwarthen@gmail.com)
-22 Dec 2024
+31 Dec 2024
 
 
 
diff --git a/Source/Doc/UserGuide.md b/Source/Doc/UserGuide.md
index a4fac849..f0c7ea11 100644
--- a/Source/Doc/UserGuide.md
+++ b/Source/Doc/UserGuide.md
@@ -253,6 +253,7 @@ is discussed in [Customizing RomWBW].
 | [Z80 ZRC CPU Module]^7^ ROMless                             | RCBus   | RCZ80_zrc_ram_std.rom        | 115200        |
 | [Z80 ZRC512 CPU Module]^7^                                  | RCBus   | RCZ80_zrc512_std.rom         | 115200        |
 | [Z80 EaZy80-512 CPU Module]^7^                              | RCBus   | RCZ80_ez512_std.rom          | 115200        |
+| [Z80 K80W CPU Module]^7^                                    | RCBus   | RCZ80_k8w_std.rom            | 115200        |
 | [Z180 Z1RCC CPU Module]^7^                                  | RCBus   | RCZ180_z1rcc_std.rom         | 115200        |
 | [Z280 ZZRCC CPU Module]^7^                                  | RCBus   | RCZ280_zzrcc_std.rom         | 115200        |
 | [Z280 ZZRCC CPU Module]^7^ ROMless                          | RCBus   | RCZ280_zzrcc_ram_std.rom     | 115200        |
@@ -6168,6 +6169,51 @@ the RomWBW HBIOS configuration.
 
 `\clearpage`{=latex}
 
+#### ROM Image File:  RCZ80_k8w_std.rom
+
+|                   |               |
+|-------------------|---------------|
+| Default CPU Speed | 22.000 MHz    |
+| Interrupts        | Mode 2        |
+| System Timer      | CTC           |
+| Serial Default    | 115200 Baud   |
+| Memory Manager    | Z2            |
+| ROM Size          | 512 KB        |
+| RAM Size          | 512 KB        |
+
+##### Supported Hardware (see [Appendix B - Device Summary]):
+
+FP: LEDIO=0, SWIO=0
+LCD: IO=218, SIZE=20X4
+DSRTC: MODE=K80W, IO=192
+UART: IO=128
+UART: IO=136
+UART: IO=160
+UART: IO=168
+SIO MODE=STD, IO=136, CHANNEL A, INTERRUPTS ENABLED
+SIO MODE=STD, IO=136, CHANNEL B, INTERRUPTS ENABLED
+CH: IO=62
+CH: IO=60
+CHUSB: IO=62
+CHUSB: IO=60
+MD: TYPE=RAM
+MD: TYPE=ROM
+FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
+FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD
+IDE: MODE=RC, IO=16, MASTER
+IDE: MODE=RC, IO=16, SLAVE
+PPIDE: IO=32, MASTER
+PPIDE: IO=32, SLAVE
+SD: MODE=EZ512, IO=130, UNITS=1
+KIO: IO=128
+CTC: IO=132, TIMER MODE=TIMER/16, DIVISOR=9216, HI=256, LO=36, INTERRUPTS ENABLED
+
+##### Notes:
+
+- CPU speed will be dynamically measured at startup if DSRTC is present
+
+`\clearpage`{=latex}
+
 ### Z180 Z1RCC CPU Module
 
 #### ROM Image File:  RCZ180_z1rcc_std.rom
diff --git a/Source/HBIOS/Build.cmd b/Source/HBIOS/Build.cmd
index 224fa05c..920b8d1a 100644
--- a/Source/HBIOS/Build.cmd
+++ b/Source/HBIOS/Build.cmd
@@ -235,6 +235,7 @@ call Build RCZ80 zrc_std || exit /b
 call Build RCZ80 zrc_ram_std || exit /b
 call Build RCZ80 zrc512_std || exit /b
 call Build RCZ80 ez512_std || exit /b
+call Build RCZ80 k80w_std || exit /b
 call Build RCZ180 ext_std || exit /b
 call Build RCZ180 nat_std || exit /b
 call Build RCZ180 z1rcc_std || exit /b
diff --git a/Source/HBIOS/Build.sh b/Source/HBIOS/Build.sh
index ad82b78c..d1c6d38a 100755
--- a/Source/HBIOS/Build.sh
+++ b/Source/HBIOS/Build.sh
@@ -27,6 +27,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
 	ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc_ram_std"; bash Build.sh
 	ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc512_std"; bash Build.sh
 	ROM_PLATFORM="RCZ80"; ROM_CONFIG="ez512_std"; bash Build.sh
+	ROM_PLATFORM="RCZ80"; ROM_CONFIG="k80w_std"; bash Build.sh
 	ROM_PLATFORM="RCZ180"; ROM_CONFIG="ext_std"; bash Build.sh
 	ROM_PLATFORM="RCZ180"; ROM_CONFIG="nat_std"; bash Build.sh
 	ROM_PLATFORM="RCZ180"; ROM_CONFIG="z1rcc_std"; bash Build.sh
diff --git a/Source/HBIOS/Config/GMZ180_std.asm b/Source/HBIOS/Config/GMZ180_std.asm
index c3adcacc..fd1954be 100644
--- a/Source/HBIOS/Config/GMZ180_std.asm
+++ b/Source/HBIOS/Config/GMZ180_std.asm
@@ -82,7 +82,7 @@ FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_GM	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_GM	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
diff --git a/Source/HBIOS/Config/MK4_std.asm b/Source/HBIOS/Config/MK4_std.asm
index b98860bd..42c0d707 100644
--- a/Source/HBIOS/Config/MK4_std.asm
+++ b/Source/HBIOS/Config/MK4_std.asm
@@ -70,6 +70,6 @@ FDMODE		.SET	FDMODE_DIDE	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 ;
 PRPENABLE	.SET	TRUE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
diff --git a/Source/HBIOS/Config/N8_std.asm b/Source/HBIOS/Config/N8_std.asm
index cd7ab9a0..ee47a051 100644
--- a/Source/HBIOS/Config/N8_std.asm
+++ b/Source/HBIOS/Config/N8_std.asm
@@ -61,6 +61,6 @@ FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 ;
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-SDMODE		.SET	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 ;
 AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
diff --git a/Source/HBIOS/Config/RCEZ80_std.asm b/Source/HBIOS/Config/RCEZ80_std.asm
index a5c44fef..fc14ade3 100644
--- a/Source/HBIOS/Config/RCEZ80_std.asm
+++ b/Source/HBIOS/Config/RCEZ80_std.asm
@@ -69,7 +69,7 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 ;
diff --git a/Source/HBIOS/Config/RCZ80_ez512_std.asm b/Source/HBIOS/Config/RCZ80_ez512_std.asm
index cc926d55..87fe49fd 100644
--- a/Source/HBIOS/Config/RCZ80_ez512_std.asm
+++ b/Source/HBIOS/Config/RCZ80_ez512_std.asm
@@ -100,7 +100,7 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_EZ512	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_EZ512	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
diff --git a/Source/HBIOS/Config/RCZ80_k80w_std.asm b/Source/HBIOS/Config/RCZ80_k80w_std.asm
new file mode 100644
index 00000000..6275e198
--- /dev/null
+++ b/Source/HBIOS/Config/RCZ80_k80w_std.asm
@@ -0,0 +1,76 @@
+;
+;==================================================================================================
+;   ROMWBW DEFAULT BUILD SETTINGS FOR RCBUS Z80 K80W
+;==================================================================================================
+;
+; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
+; INDICATED ABOVE.  THESE SETTINGS DEFINE THE OFFICIAL BUILD FOR THIS
+; PLATFORM AS DISTRIBUTED IN ROMWBW RELEASES.
+;
+; ROMWBW USES CASCADING CONFIGURATION FILES AS INDICATED BELOW:
+;
+; cfg_MASTER.asm			- MASTER: CONFIGURATION FILE DEFINES ALL POSSIBLE ROMWBW SETTINGS
+; |
+; +-> cfg_<platform>.asm		- PLATFORM: DEFAULT SETTINGS FOR SPECIFIC PLATFORM
+;     |
+;     +-> Config/<plt>_std.asm		- BUILD: SETTINGS FOR EACH OFFICIAL DIST BUILD
+;         |
+;         +-> Config/<plt>_<cust>.asm	- USER: CUSTOM USER BUILD SETTINGS
+;
+; THE TOP (MASTER CONFIGURATION) FILE DEFINES ALL POSSIBLE ROMWBW
+; CONFIGURATION SETTINGS. EACH FILE BELOW THE MASTER CONFIGURATION FILE
+; INHERITS THE CUMULATIVE SETTINGS OF THE FILES ABOVE IT AND MAY
+; OVERRIDE THESE SETTINGS AS DESIRED.
+;
+; OTHER THAN THE TOP MASTER FILE, EACH FILE MUST "#INCLUDE" ITS PARENT
+; FILE (SEE #INCLUDE STATEMENT BELOW).  THE TOP TWO FILES SHOULD NOT BE
+; MODIFIED.
+;
+; TO CUSTOMIZE YOUR BUILD SETTINGS YOU SHOULD MODIFY THIS FILE, THE
+; DEFAULT BUILD SETTINGS (Config/<platform>_std.asm) OR PREFERABLY
+; CREATE AN OPTIONAL CUSTOM USER SETTINGS FILE THAT INCLUDES THE DEFAULT
+; BUILD SETTINGS FILE (SEE EXAMPLE Config/SBC_user.asm).
+;
+; BY CREATING A CUSTOM USER SETTINGS FILE, YOU ARE LESS LIKELY TO BE
+; IMPACTED BY FUTURE CHANGES BECAUSE YOU WILL BE INHERITING MOST
+; OF YOUR SETTINGS WHICH WILL BE UPDATED BY AUTHORS AS ROMWBW EVOLVES.
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE
+; SOURCE DIRECTORY (TWO DIRECTORIES ABOVE THIS ONE).
+;
+; *** WARNING: ASIDE FROM THE MASTER CONFIGURATION FILE, YOU MUST USE
+; ".SET" TO OVERRIDE SETTINGS.  THE ASSEMBLER WILL ERROR IF YOU ATTEMPT
+; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
+#DEFINE AUTO_CMD	""		; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
+;
+#INCLUDE "Config/RCZ80_std.asm"
+;
+INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+;
+CPUOSC		.SET	22000000	; CPU OSC FREQ IN MHZ
+;
+KIOENABLE	.SET	TRUE		; ENABLE ZILOG KIO SUPPORT
+;
+DSRTCMODE	.SET	DSRTCMODE_K80W	; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
+;
+AUTOCON		.SET	FALSE		; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
+;
+CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
+CTCBASE		.SET	KIOBASE+$04	; CTC BASE I/O ADDRESS
+CTCTIMER	.SET	TRUE		; ENABLE CTC PERIODIC TIMER
+;
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+;
+SIOCNT		.SET	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SIO0MODE	.SET	SIOMODE_STD	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO0BASE	.SET	KIOBASE+$08	; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.SET	1843200		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACTCC	.SET	0		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCLK	.SET	1843200		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCTCC	.SET	1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+;
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_K80W	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
diff --git a/Source/HBIOS/Config/RCZ80_std.asm b/Source/HBIOS/Config/RCZ80_std.asm
index fb0ab625..2df45d5d 100644
--- a/Source/HBIOS/Config/RCZ80_std.asm
+++ b/Source/HBIOS/Config/RCZ80_std.asm
@@ -77,7 +77,7 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
diff --git a/Source/HBIOS/Config/S100_std.asm b/Source/HBIOS/Config/S100_std.asm
index 03478ddc..a02c156b 100644
--- a/Source/HBIOS/Config/S100_std.asm
+++ b/Source/HBIOS/Config/S100_std.asm
@@ -63,5 +63,5 @@ SCONENABLE	.SET	TRUE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
diff --git a/Source/HBIOS/Config/SBC_std.asm b/Source/HBIOS/Config/SBC_std.asm
index 9899af06..fb16a37a 100644
--- a/Source/HBIOS/Config/SBC_std.asm
+++ b/Source/HBIOS/Config/SBC_std.asm
@@ -66,6 +66,6 @@ FDMODE		.SET	FDMODE_DIO3	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 ;
 PRPENABLE	.SET	TRUE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
diff --git a/Source/HBIOS/Config/SCZ180_sc126_std.asm b/Source/HBIOS/Config/SCZ180_sc126_std.asm
index e5ced623..c7b1c494 100644
--- a/Source/HBIOS/Config/SCZ180_sc126_std.asm
+++ b/Source/HBIOS/Config/SCZ180_sc126_std.asm
@@ -84,7 +84,7 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
diff --git a/Source/HBIOS/Config/SCZ180_sc130_std.asm b/Source/HBIOS/Config/SCZ180_sc130_std.asm
index 2445bf2e..a71904a2 100644
--- a/Source/HBIOS/Config/SCZ180_sc130_std.asm
+++ b/Source/HBIOS/Config/SCZ180_sc130_std.asm
@@ -85,7 +85,7 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
diff --git a/Source/HBIOS/Config/SCZ180_sc131_std.asm b/Source/HBIOS/Config/SCZ180_sc131_std.asm
index 8b57c938..3bc85725 100644
--- a/Source/HBIOS/Config/SCZ180_sc131_std.asm
+++ b/Source/HBIOS/Config/SCZ180_sc131_std.asm
@@ -74,7 +74,7 @@ SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 CHENABLE	.SET	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
diff --git a/Source/HBIOS/Config/SCZ180_sc700_std.asm b/Source/HBIOS/Config/SCZ180_sc700_std.asm
index 4bc041b7..eaecddb0 100644
--- a/Source/HBIOS/Config/SCZ180_sc700_std.asm
+++ b/Source/HBIOS/Config/SCZ180_sc700_std.asm
@@ -84,7 +84,7 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
diff --git a/Source/HBIOS/Makefile.new b/Source/HBIOS/Makefile.new
index c12b94bc..b20fee7d 100644
--- a/Source/HBIOS/Makefile.new
+++ b/Source/HBIOS/Makefile.new
@@ -9,7 +9,8 @@ DIST_OBJECTS := \
 #	RCZ80_mt RCZ80_duart MON_std
 
 OBJECTS := $(DIST_OBJECTS)
-# OBJECTS := SBC_std MK4_std UNA_std S100_std
+OBJECTS := RCZ80_std
+# OBJECTS := DUO_std
 
 OBJECTS := $(OBJECTS:=.rom) $(OBJECTS:=.com) $(OBJECTS:=.upd)
 OBJECTS := $(filter-out UNA_%.com UNA_%.upd,$(OBJECTS))
@@ -23,15 +24,18 @@ FONTS := font8x11c.asm font8x11u.asm font8x16c.asm font8x16u.asm
 FONTS += font8x8c.asm font8x8u.asm fontcgac.asm fontcgau.asm
 FONTS += fontvgarcc.asm fontvgarcu.asm
 
-BUILD_COMPONENT = \
-	cp $(*F).build.inc build.inc ; \
-	$(TASM) $(TASMFLAGS) $< $@ $(@:.bin=.lst) ; \
-	rm build.inc
+define BUILD_COMPONENT
+ 	cp $(*F).build.inc build.inc
+ 	$(TASM) $(TASMFLAGS) $1 $< $@ $(@:.bin=.lst)
+ 	rm build.inc
+endef
 
 SHELL=/bin/bash
 
 include $(TOOLS)/Makefile.inc
 
+all:: sysconf.com
+
 font%.asm:
 	cp ../Fonts/$@ .
 
@@ -56,13 +60,18 @@ s100mon.bin:
 	echo ";" >>$@
 	cat $@
 
-%.usrrom.bin: usrrom.asm %.build.inc ; $(BUILD_COMPONENT)
-%.updater.bin: updater.asm %.build.inc ; $(BUILD_COMPONENT)
-%.eastaegg.bin: eastaegg.asm %.build.inc ; $(BUILD_COMPONENT)
-%.game.bin: game.asm %.build.inc ; $(BUILD_COMPONENT)
-%.nascom.bin: nascom.asm %.build.inc ; $(BUILD_COMPONENT)
-%.romldr.bin: romldr.asm %.build.inc ; $(BUILD_COMPONENT)
-%.dbgmon.bin: dbgmon.asm %.build.inc ; $(BUILD_COMPONENT)
+%.usrrom.bin: usrrom.asm %.build.inc ; $(call BUILD_COMPONENT)
+%.updater.bin: updater.asm %.build.inc ; $(call BUILD_COMPONENT)
+%.eastaegg.bin: eastaegg.asm %.build.inc ; $(call BUILD_COMPONENT)
+%.game.bin: game.asm %.build.inc ; $(call BUILD_COMPONENT)
+%.nascom.bin: nascom.asm %.build.inc ; $(call BUILD_COMPONENT)
+%.romldr.bin: romldr.asm %.build.inc ; $(call BUILD_COMPONENT)
+%.dbgmon.bin: dbgmon.asm %.build.inc ; $(call BUILD_COMPONENT)
+%.sysconf.bin: sysconf.asm %.build.inc ; $(call BUILD_COMPONENT, -dROMWBW)
+
+sysconf.com: sysconf.asm
+	$(TASM) -dCPM sysconf.asm sysconf.com sysconf_com.lst
+	cp $@ $(DEST)/Apps
 
 %.hbios_env.com: hbios_env.asm %.build.inc
 	cp $(*F).build.inc build.inc
@@ -73,20 +82,20 @@ s100mon.bin:
 	$(ZXCC) $< >$@
 
 %.hbios_rom.bin: hbios.asm %.build.inc %.hbios_env.sh $(FONTS)
-	. ./$(*F).hbios_env.sh ; \
-	TARGETS=("" "z80" "hd64180" "z280") ; \
-	CPU=$${TARGETS[$$CPUFAM]} ; \
-	cp $(*F).build.inc build.inc ; \
-	$(BINDIR)/uz80as -t $$CPU -dROMBOOT $< $@ $(@:.bin=.lst) ; \
-	srec_cat $@ -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $@ -Binary ; \
+	. ./$(*F).hbios_env.sh
+	TARGETS=("" "z80" "hd64180" "z280")
+	CPU=$${TARGETS[$$CPUFAM]}
+	cp $(*F).build.inc build.inc
+	$(BINDIR)/uz80as -t $$CPU -dROMBOOT $< $@ $(@:.bin=.lst)
+	srec_cat $@ -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $@ -Binary
 	rm build.inc
 
 %.hbios_app.bin: hbios.asm %.build.inc %.hbios_env.sh $(FONTS)
-	. ./$(*F).hbios_env.sh ; \
-	TARGETS=("" "z80" "hd64180" "z280") ; \
-	CPU=$${TARGETS[$$CPUFAM]} ; \
-	cp $(*F).build.inc build.inc ; \
-	$(BINDIR)/uz80as -t $$CPU -dAPPBOOT $< $@ $(@:.bin=.lst) ; \
+	. ./$(*F).hbios_env.sh
+	TARGETS=("" "z80" "hd64180" "z280")
+	CPU=$${TARGETS[$$CPUFAM]}
+	cp $(*F).build.inc build.inc
+	$(BINDIR)/uz80as -t $$CPU -dAPPBOOT $< $@ $(@:.bin=.lst)
 	rm build.inc
 
 UNA_%.osimg.bin: UNA_%.romldr.bin UNA_%.dbgmon.bin
@@ -100,8 +109,12 @@ UNA_%.osimg.bin: UNA_%.romldr.bin UNA_%.dbgmon.bin
 %.osimg_small.bin: %.romldr.bin %.dbgmon.bin
 	cat $(*F).romldr.bin $(*F).dbgmon.bin ../ZSDOS/zsys_wbw.bin >$@
 
-%.osimg1.bin: camel80.bin %.nascom.bin tastybasic.bin %.game.bin %.eastaegg.bin netboot.mod %.updater.bin sysconf.bin %.usrrom.bin
-	cat camel80.bin $(*F).nascom.bin tastybasic.bin $(*F).game.bin $(*F).eastaegg.bin netboot.mod $(*F).updater.bin sysconf.bin $(*F).usrrom.bin >$@
+DUO_%.osimg1.bin: NETBOOT=netboot-duo.mod
+
+%.osimg1.bin: NETBOOT=netboot-mt.mod
+
+%.osimg1.bin: camel80.bin %.nascom.bin tastybasic.bin %.game.bin %.eastaegg.bin $(NETBOOT) %.updater.bin %.sysconf.bin %.usrrom.bin
+	cat camel80.bin $(*F).nascom.bin tastybasic.bin $(*F).game.bin $(*F).eastaegg.bin $(NETBOOT) $(*F).updater.bin $(*F).sysconf.bin $(*F).usrrom.bin >$@
 	srec_cat $@ -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $@ -Binary
 
 S100_%.imgpad2.bin: s100mon.bin
@@ -115,14 +128,14 @@ S100_%.imgpad2.bin: s100mon.bin
 	rm build.inc
 
 UNA_%.rom: UNA_%.osimg.bin UNA_%.hbios_env.sh
-	. ./UNA_$(*F).hbios_env.sh ; \
-	cat ../UBIOS/UNA-BIOS.BIN UNA_$(*F).osimg.bin ../UBIOS/FSFAT.BIN ../RomDsk/rom$${ROMDISKSIZE}_una.dat >$@ ; \
-	cp UNA_$(*F).osimg.bin $(DEST)/UNA_WBW_SYS.bin ; \
+	. ./UNA_$(*F).hbios_env.sh
+	cat ../UBIOS/UNA-BIOS.BIN UNA_$(*F).osimg.bin ../UBIOS/FSFAT.BIN ../RomDsk/rom$${ROMDISKSIZE}_una.dat >$@
+	cp UNA_$(*F).osimg.bin $(DEST)/UNA_WBW_SYS.bin
 	cp ../RomDsk/rom$${ROMDISKSIZE}_una.dat $(DEST)/UNA_WBW_ROM$${ROMDISKSIZE}.bin
 
 %.rom: %.hbios_rom.bin %.osimg.bin %.osimg1.bin %.imgpad2.bin %.hbios_env.sh
-	. ./$(*F).hbios_env.sh ; \
-	if [ $$ROMSIZE -gt 0 ] ; then RD="rom$$ROMDISKSIZE" ; else RD="rom$$RAMDISKSIZE" ; fi ; \
+	. ./$(*F).hbios_env.sh
+	if [ $$ROMSIZE -gt 0 ] ; then RD="rom$$ROMDISKSIZE" ; else RD="rom$$RAMDISKSIZE" ; fi
 	cat $(*F).hbios_rom.bin $(*F).osimg.bin $(*F).osimg1.bin $(*F).imgpad2.bin ../RomDsk/$${RD}_wbw.dat >$@
 
 %.com: %.hbios_app.bin %.osimg_small.bin
diff --git a/Source/HBIOS/cfg_DUO.asm b/Source/HBIOS/cfg_DUO.asm
index c88363aa..c95f46c9 100644
--- a/Source/HBIOS/cfg_DUO.asm
+++ b/Source/HBIOS/cfg_DUO.asm
@@ -287,7 +287,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_DYNO.asm b/Source/HBIOS/cfg_DYNO.asm
index 423b8216..446670e7 100644
--- a/Source/HBIOS/cfg_DYNO.asm
+++ b/Source/HBIOS/cfg_DYNO.asm
@@ -302,7 +302,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_EPITX.asm b/Source/HBIOS/cfg_EPITX.asm
index d9bedf05..b9efcb2a 100644
--- a/Source/HBIOS/cfg_EPITX.asm
+++ b/Source/HBIOS/cfg_EPITX.asm
@@ -298,7 +298,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_EPITX	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_EPITX	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$40		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	2		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_FZ80.asm b/Source/HBIOS/cfg_FZ80.asm
index d90945cd..827d5731 100644
--- a/Source/HBIOS/cfg_FZ80.asm
+++ b/Source/HBIOS/cfg_FZ80.asm
@@ -307,7 +307,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_FZ80	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_FZ80	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_GMZ180.asm b/Source/HBIOS/cfg_GMZ180.asm
index cea26b9b..ed4a884a 100644
--- a/Source/HBIOS/cfg_GMZ180.asm
+++ b/Source/HBIOS/cfg_GMZ180.asm
@@ -303,7 +303,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_GM	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_GM	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_HEATH.asm b/Source/HBIOS/cfg_HEATH.asm
index 2e673475..41815276 100644
--- a/Source/HBIOS/cfg_HEATH.asm
+++ b/Source/HBIOS/cfg_HEATH.asm
@@ -307,7 +307,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_MASTER.asm b/Source/HBIOS/cfg_MASTER.asm
index 2577c33b..45720b91 100644
--- a/Source/HBIOS/cfg_MASTER.asm
+++ b/Source/HBIOS/cfg_MASTER.asm
@@ -360,7 +360,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_NONE	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.EQU	SDMODE_NONE	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_MBC.asm b/Source/HBIOS/cfg_MBC.asm
index 79842e8e..8047d9e3 100644
--- a/Source/HBIOS/cfg_MBC.asm
+++ b/Source/HBIOS/cfg_MBC.asm
@@ -283,7 +283,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_MK4.asm b/Source/HBIOS/cfg_MK4.asm
index dd6ffd2e..598059af 100644
--- a/Source/HBIOS/cfg_MK4.asm
+++ b/Source/HBIOS/cfg_MK4.asm
@@ -292,7 +292,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_MON.asm b/Source/HBIOS/cfg_MON.asm
index fa2ff07b..186b28f4 100644
--- a/Source/HBIOS/cfg_MON.asm
+++ b/Source/HBIOS/cfg_MON.asm
@@ -302,7 +302,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_N8.asm b/Source/HBIOS/cfg_N8.asm
index a323d85e..ce13eb48 100644
--- a/Source/HBIOS/cfg_N8.asm
+++ b/Source/HBIOS/cfg_N8.asm
@@ -294,7 +294,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	N8_PPI0		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_NABU.asm b/Source/HBIOS/cfg_NABU.asm
index abef00d2..5c962223 100644
--- a/Source/HBIOS/cfg_NABU.asm
+++ b/Source/HBIOS/cfg_NABU.asm
@@ -307,7 +307,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_RCEZ80.asm b/Source/HBIOS/cfg_RCEZ80.asm
index a74dc278..de46099b 100644
--- a/Source/HBIOS/cfg_RCEZ80.asm
+++ b/Source/HBIOS/cfg_RCEZ80.asm
@@ -307,7 +307,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_RCZ180.asm b/Source/HBIOS/cfg_RCZ180.asm
index 0d5a6e04..39e39b03 100644
--- a/Source/HBIOS/cfg_RCZ180.asm
+++ b/Source/HBIOS/cfg_RCZ180.asm
@@ -302,7 +302,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_RCZ280.asm b/Source/HBIOS/cfg_RCZ280.asm
index 145888b1..4d2e6c84 100644
--- a/Source/HBIOS/cfg_RCZ280.asm
+++ b/Source/HBIOS/cfg_RCZ280.asm
@@ -312,7 +312,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_RCZ80.asm b/Source/HBIOS/cfg_RCZ80.asm
index 6db1de93..4d784d46 100644
--- a/Source/HBIOS/cfg_RCZ80.asm
+++ b/Source/HBIOS/cfg_RCZ80.asm
@@ -307,7 +307,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_RPH.asm b/Source/HBIOS/cfg_RPH.asm
index 8bc43aca..58f44e82 100644
--- a/Source/HBIOS/cfg_RPH.asm
+++ b/Source/HBIOS/cfg_RPH.asm
@@ -282,7 +282,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	RPH_PPI0	; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_S100.asm b/Source/HBIOS/cfg_S100.asm
index d7b84c3b..11d9e173 100644
--- a/Source/HBIOS/cfg_S100.asm
+++ b/Source/HBIOS/cfg_S100.asm
@@ -302,7 +302,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_SBC.asm b/Source/HBIOS/cfg_SBC.asm
index 0843ea61..1caba12f 100644
--- a/Source/HBIOS/cfg_SBC.asm
+++ b/Source/HBIOS/cfg_SBC.asm
@@ -282,7 +282,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_SCZ180.asm b/Source/HBIOS/cfg_SCZ180.asm
index c0ea3f2a..e6495b4f 100644
--- a/Source/HBIOS/cfg_SCZ180.asm
+++ b/Source/HBIOS/cfg_SCZ180.asm
@@ -302,7 +302,7 @@ PPIDE2A8BIT	.SET	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_Z80RETRO.asm b/Source/HBIOS/cfg_Z80RETRO.asm
index dfb57f2b..3138b954 100644
--- a/Source/HBIOS/cfg_Z80RETRO.asm
+++ b/Source/HBIOS/cfg_Z80RETRO.asm
@@ -262,7 +262,7 @@ PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_Z80R	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_Z80R	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.SET	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
diff --git a/Source/HBIOS/cfg_ZETA.asm b/Source/HBIOS/cfg_ZETA.asm
index 674924d3..f7c44e30 100644
--- a/Source/HBIOS/cfg_ZETA.asm
+++ b/Source/HBIOS/cfg_ZETA.asm
@@ -231,7 +231,7 @@ PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/cfg_ZETA2.asm b/Source/HBIOS/cfg_ZETA2.asm
index d87a58ff..7fecae4a 100644
--- a/Source/HBIOS/cfg_ZETA2.asm
+++ b/Source/HBIOS/cfg_ZETA2.asm
@@ -242,7 +242,7 @@ PPIDE0A8BIT	.SET	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.SET	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.SET	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
+SDMODE		.SET	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
 SDPPIBASE	.SET	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.SET	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
diff --git a/Source/HBIOS/sd.asm b/Source/HBIOS/sd.asm
index 36090bb6..9456310b 100644
--- a/Source/HBIOS/sd.asm
+++ b/Source/HBIOS/sd.asm
@@ -455,6 +455,26 @@ SD_DDRVAL	.EQU	%11100110	; DATA DIRECTION REGISTER VALUE
 SD_INVCS	.EQU	TRUE		; INVERT CS
 		DEVECHO	"EZ512"
 #ENDIF
+;
+#IF (SDMODE == SDMODE_K80W)		; Z80 PIO ON K80W
+;
+;	Equivalent to PIO mode, but with different port addresses
+;
+SD_DEVMAX	.EQU	1		; NUMBER OF PHYSICAL UNITS (SOCKETS)
+SD_IOBASE	.EQU	$82		; IO BASE ADDRESS FOR SD INTERFACE
+SD_OPRREG	.EQU	SD_IOBASE	; OUTPUT PORT (OUTPUT: CS, CLK, DIN)
+SD_OPRDEF	.EQU	%11101111	; OUTPUT PORT DEFAULT STATE
+SD_INPREG	.EQU	SD_IOBASE	; INPUT REGISTER
+SD_CS0		.EQU	%00001000	; SELECT
+SD_CLK		.EQU	%00010000	; CLOCK
+SD_DI		.EQU	%00000001	; DATA IN (CARD <- CPU) MOSI
+SD_DO		.EQU	%10000000	; DATA OUT (CARD -> CPU) MISO
+SD_CINIT	.EQU	TRUE		; INITIALIZE OUTPUT PORT
+SD_DDR		.EQU	$83		; DATA DIRECTION REGISTER
+SD_DDRVAL	.EQU	%11100110	; DATA DIRECTION REGISTER VALUE
+SD_INVCS	.EQU	TRUE		; INVERT CS
+		DEVECHO	"EZ512"
+#ENDIF
 ;
 		DEVECHO	", IO="
 		DEVECHO	SD_IOBASE
diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm
index a88de464..d5c1ee46 100644
--- a/Source/HBIOS/std.asm
+++ b/Source/HBIOS/std.asm
@@ -243,6 +243,7 @@ SDMODE_EPITX	.EQU	13		; Mini ITX Z180
 SDMODE_FZ80	.EQU	14		; S100 FPGA Z80
 SDMODE_GM	.EQU	15		; Genesis SD Driver
 SDMODE_EZ512	.EQU	16		; EZ512 SD
+SDMODE_K80W	.EQU	17		; K80W SD
 ;
 ; AY SOUND CHIP MODE SELECTIONS
 ;