From 8ad2bdbb29fc76ae7d1efa4d742ee5fc6f57c77e Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Fri, 17 Apr 2020 11:25:28 -0700 Subject: [PATCH 001/339] SIO driver now CTC aware The SIO driver can now use a CTC (if available) to provide much more flexible baud rate programming. --- Doc/ChangeLog.txt | 1 + Doc/RomWBW Applications.pdf | Bin 140215 -> 140215 bytes Doc/RomWBW Architecture.pdf | Bin 371105 -> 371105 bytes Doc/RomWBW Getting Started.pdf | Bin 166095 -> 166096 bytes ReadMe.md | 4 +- ReadMe.txt | 4 +- Source/Doc/GettingStarted.md | 2 +- Source/HBIOS/Config/RCZ80_kio.asm | 5 +- Source/HBIOS/cfg_ezz80.asm | 14 +- Source/HBIOS/cfg_master.asm | 14 +- Source/HBIOS/cfg_rcz180.asm | 14 +- Source/HBIOS/cfg_rcz80.asm | 14 +- Source/HBIOS/cfg_sbc.asm | 10 +- Source/HBIOS/cfg_scz180.asm | 14 +- Source/HBIOS/sd.asm | 17 +- Source/HBIOS/sio.asm | 352 ++++++++++++++++++++---------- Source/HBIOS/std.asm | 8 +- Source/Images/Common/COMP.COM | Bin 0 -> 1024 bytes Source/Images/Common/COMPARE.COM | Bin 2560 -> 0 bytes Source/ver.inc | 2 +- Source/ver.lib | 2 +- 21 files changed, 291 insertions(+), 186 deletions(-) create mode 100644 Source/Images/Common/COMP.COM delete mode 100644 Source/Images/Common/COMPARE.COM diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt index 8d28bd22..e177cbc8 100644 --- a/Doc/ChangeLog.txt +++ b/Doc/ChangeLog.txt @@ -6,6 +6,7 @@ Version 3.1 - WBW: Added support dual 16C550 UART on RC2014 platform - WBW: Made .com images smaller (contain only Z-System now) - WBW: Support automatic clock hardware detection and fallback +- WBW: Support use of CTC for SIO baud rate divisors Version 3.0.1 ------------- diff --git a/Doc/RomWBW Applications.pdf b/Doc/RomWBW Applications.pdf index ed1cd38b7583a0bc5acf95f7c116d582d8ea70c9..4fdbaee45f2fef4c43fd928b2e3d648a992e9479 100644 GIT binary patch delta 111 zcmdmfoMZcOj)pCa8o$_04J=Iz3=OC2|6-JZakdBjVr12HHn((ibTxA{G%z-HvM_cs fb}?|ZFm^UKv~aX=HFhyKuv4%hq-6RmWhPkw^PwFL delta 111 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z0g=FI(Y<9d&_GNWxRQJ@q$CnC4CCP`wjrNt?a#SOU5QdLqUH=T6;4&qhatm22_2SI(8@LtPz7Xw5gP_76yaht2mL6CG2p2Ifm%qLB$$V_fSns^0nUXvdjn~zg+Z+f zEEZ7125&G3vdaK1iGYN)xK)58S2HB6D^W5FO+Z5lVKIJK06r`XXqr$ztYy*Lrwnfw z4SfOh5BDH%0*e_mCjma3f}jJy2SX`rcoEf$3z|sD@KnYUB?=A(T#FV1wkK&Y?I!FA zl^dWq;$u+#1=LjwoY|jQT(ua7qUtLPv>_KeAP_o0k$iK2@D4`!pN zN0MO%g#ryCw>s*4 zXr1aYR`W^l(1K_%5<|3xlkNZ3!jlilCo>A_>|j2D0EH||!!+R&-rTUC2 zK1eM@U;s@Z2T4GaP&C7Y9%}{$$K*TqPh(OzS%rmBmpCZIz}=Ad)8N2_fB>BEj2>tRJb};{T&fBjscNWNWTJr= zUMRujsBnZYLy@V-UxvCyQ{`a%u1hiMUR78oow z2OtIs2&jSd84j8{(lI&c$4Q#PL3>K%Wte(lC*%M(U_JqV=9_tLl-7 z)B=1xKu)&divl#70U8*u_Tc|QmRI28BhrxoRv=%1PYB6D5zWJQUZht;RwgIqzz2wm zJQyB^RZch=a&(>g0cs+3u@aUVUeQUfhJ1 @@ -311,7 +311,7 @@ media. You can think of slices as a way to refer to any of the first 256 Of course, the problem is that CP/M-like operating systems have only 16 drive letters (A:-P:) available. Under the covers, RomWBW allows you to use any drive letter to refer to any slice of any media. The `ASSIGN` -command is allows you to view or change the drive letter mappings at any +command allows you to view or change the drive letter mappings at any time. At startup, the operating system will automatically allocate a reasonable number of drive letters to the available storage devices. The allocation will depend on the number of large storage devices available diff --git a/ReadMe.txt b/ReadMe.txt index f47dcf47..e0241d40 100644 --- a/ReadMe.txt +++ b/ReadMe.txt @@ -3,7 +3,7 @@ RomWBW Z80/Z180 System Software Version 3.1 Pre-release -Saturday 11 April 2020 +Wednesday 15 April 2020 Wayne Warthen wwarthen@gmail.com @@ -325,7 +325,7 @@ media. You can think of slices as a way to refer to any of the first 256 Of course, the problem is that CP/M-like operating systems have only 16 drive letters (A:-P:) available. Under the covers, RomWBW allows you to use any drive letter to refer to any slice of any media. The ASSIGN -command is allows you to view or change the drive letter mappings at any +command allows you to view or change the drive letter mappings at any time. At startup, the operating system will automatically allocate a reasonable number of drive letters to the available storage devices. The allocation will depend on the number of large storage devices available diff --git a/Source/Doc/GettingStarted.md b/Source/Doc/GettingStarted.md index 345c768b..a92b189a 100644 --- a/Source/Doc/GettingStarted.md +++ b/Source/Doc/GettingStarted.md @@ -346,7 +346,7 @@ the first 256 8MB chunks of space on a single media. Of course, the problem is that CP/M-like operating systems have only 16 drive letters (A:-P:) available. Under the covers, RomWBW allows you to use any drive letter to refer to any slice of any media. The -`ASSIGN` command is allows you to view or change the drive letter +`ASSIGN` command allows you to view or change the drive letter mappings at any time. At startup, the operating system will automatically allocate a reasonable number of drive letters to the available storage devices. The allocation will depend on the number of diff --git a/Source/HBIOS/Config/RCZ80_kio.asm b/Source/HBIOS/Config/RCZ80_kio.asm index a83052f4..91ef5e73 100644 --- a/Source/HBIOS/Config/RCZ80_kio.asm +++ b/Source/HBIOS/Config/RCZ80_kio.asm @@ -39,8 +39,9 @@ ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) ; SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIOCNT .SET 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP -SIO0MODE .SET SIOMODE_EZZ80 ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] +SIO0MODE .SET SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0BASE .SET KIOBASE+$08 ; SIO 0: REGISTERS BASE ADR -SIO0CTCC .SET 0 ; SIO 0: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE SIO0ACLK .SET 1843200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SIO0ACTCC .SET 0 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE SIO0BCLK .SET 1843200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SIO0BCTCC .SET 1 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE diff --git a/Source/HBIOS/cfg_ezz80.asm b/Source/HBIOS/cfg_ezz80.asm index 1c64c652..b7a190f8 100644 --- a/Source/HBIOS/cfg_ezz80.asm +++ b/Source/HBIOS/cfg_ezz80.asm @@ -86,24 +86,22 @@ ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP -SIO0MODE .EQU SIOMODE_EZZ80 ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] -SIO0CTCC .EQU -1 ; SIO 0: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0MODE .EQU SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .EQU 1843200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0ADIV .EQU 1 ; SIO 0A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG +SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE SIO0BCLK .EQU 1843200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0BDIV .EQU 1 ; SIO 0B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG -SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] -SIO1CTCC .EQU -1 ; SIO 1: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1ADIV .EQU 1 ; SIO 1A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG +SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE SIO1BCLK .EQU 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1BDIV .EQU 1 ; SIO 1B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG +SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE ; XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG ; diff --git a/Source/HBIOS/cfg_master.asm b/Source/HBIOS/cfg_master.asm index 55806745..b5f4ce33 100644 --- a/Source/HBIOS/cfg_master.asm +++ b/Source/HBIOS/cfg_master.asm @@ -121,24 +121,22 @@ ACIA1CFG .EQU DEFSERCFG ; ACIA 1: SERIAL LINE CONFIG (SEE STD.ASM) SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP -SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] -SIO0CTCC .EQU -1 ; SIO 0: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0ADIV .EQU 1 ; SIO 0A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG +SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0BDIV .EQU 1 ; SIO 0B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG -SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] -SIO1CTCC .EQU -1 ; SIO 1: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1ADIV .EQU 1 ; SIO 1A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG +SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE SIO1BCLK .EQU CPUOSC ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1BDIV .EQU 1 ; SIO 1B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG +SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE ; XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG ; diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm index ee65373f..746446f2 100644 --- a/Source/HBIOS/cfg_rcz180.asm +++ b/Source/HBIOS/cfg_rcz180.asm @@ -91,24 +91,22 @@ ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP -SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] -SIO0CTCC .EQU -1 ; SIO 0: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0ADIV .EQU 1 ; SIO 0A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO0ACFG .EQU SER_115200_8N1 ; SER_115200_8N1 0A: SERIAL LINE CONFIG +SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0BDIV .EQU 1 ; SIO 0B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG -SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] -SIO1CTCC .EQU -1 ; SIO 1: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1ADIV .EQU 1 ; SIO 1A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO1ACFG .EQU SER_115200_8N1 ; SER_115200_8N1 1A: SERIAL LINE CONFIG +SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE SIO1BCLK .EQU 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1BDIV .EQU 1 ; SIO 1B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO1BCFG .EQU SER_115200_8N1 ; SIO 1B: SERIAL LINE CONFIG +SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE ; XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG ; diff --git a/Source/HBIOS/cfg_rcz80.asm b/Source/HBIOS/cfg_rcz80.asm index 40b3d129..971216b3 100644 --- a/Source/HBIOS/cfg_rcz80.asm +++ b/Source/HBIOS/cfg_rcz80.asm @@ -95,24 +95,22 @@ ACIA1CFG .EQU DEFSERCFG ; ACIA 1: SERIAL LINE CONFIG (SEE STD.ASM) SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP -SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] -SIO0CTCC .EQU -1 ; SIO 0: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0ADIV .EQU 1 ; SIO 0A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG +SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0BDIV .EQU 1 ; SIO 0B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG -SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] -SIO1CTCC .EQU -1 ; SIO 1: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1ADIV .EQU 1 ; SIO 1A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG +SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE SIO1BCLK .EQU CPUOSC ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1BDIV .EQU 1 ; SIO 1B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG +SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE ; XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG ; diff --git a/Source/HBIOS/cfg_sbc.asm b/Source/HBIOS/cfg_sbc.asm index e451213d..0121cce9 100644 --- a/Source/HBIOS/cfg_sbc.asm +++ b/Source/HBIOS/cfg_sbc.asm @@ -88,15 +88,15 @@ ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP -SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] +SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0CTCC .EQU -1 ; SIO 0: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE SIO0BASE .EQU $B0 ; SIO 0: REGISTERS BASE ADR -SIO0ACLK .EQU 4915200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0ADIV .EQU 8 ; SIO 0A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) +SIO0ACLK .EQU (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG -SIO0BCLK .EQU 4915200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0BDIV .EQU 8 ; SIO 0B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) +SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0BCLK .EQU (4915200/8) ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG +SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE ; XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG ; diff --git a/Source/HBIOS/cfg_scz180.asm b/Source/HBIOS/cfg_scz180.asm index a92c4105..cc92824b 100644 --- a/Source/HBIOS/cfg_scz180.asm +++ b/Source/HBIOS/cfg_scz180.asm @@ -86,24 +86,22 @@ ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP -SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] -SIO0CTCC .EQU -1 ; SIO 0: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0ADIV .EQU 1 ; SIO 0A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO0ACFG .EQU SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG +SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0BDIV .EQU 1 ; SIO 0B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG -SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] -SIO1CTCC .EQU -1 ; SIO 1: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1ADIV .EQU 1 ; SIO 1A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO1ACFG .EQU SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG +SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE SIO1BCLK .EQU 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1BDIV .EQU 1 ; SIO 1B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) SIO1BCFG .EQU SER_115200_8N1 ; SIO 1B: SERIAL LINE CONFIG +SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE ; XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG ; diff --git a/Source/HBIOS/sd.asm b/Source/HBIOS/sd.asm index b0b2e379..ef187081 100644 --- a/Source/HBIOS/sd.asm +++ b/Source/HBIOS/sd.asm @@ -41,7 +41,7 @@ ; THE CLOCK IS LOW. THE DATA IS CAPTURED ON THE CLOCK'S LOW-TO-HIGH ; TRANSITION AND PROPAGATED ON HIGH-TO-LOW CLOCK TRANSITION. ; -; NOTE: THE CSIO IMPLEMENTATION (INCLUDE MK4) USES SPI MODE 4 +; NOTE: THE CSIO IMPLEMENTATION (INCLUDE MK4) USES SPI MODE 3 ; (CPOL=1, CPHA=1) BECAUSE THAT IS THE WAY THAT THE Z180 CSIO ; INTERFACE WORKS. ALL OF THE CLOCK TRANSITIONS LISTED ABOVE ; ARE REVERSED FOR CSIO. @@ -104,7 +104,7 @@ ; IS FLOATING IT IS IMPOSSIBLE TO DETERMINE IF THE BYTE RECEIVED IS A FILL ; BYTE OR NOT. BASED ON WHAT I HAVE READ, THERE WILL ALWAYS BE AT LEAST ; ONE FILL BYTE PRIOR TO THE ACTUAL RESULT. ADDITIONALLY, THE SD CARD WILL -; START DRIVING MISO SOMETIME WITHING THAT FIRST FILL BYTE. SO, WE NOW +; START DRIVING MISO SOMETIME WITHIN THAT FIRST FILL BYTE. SO, WE NOW ; JUST DISCARD THE FIRST BYTE RECEIVED AFTER A COMMAND IS SENT WITH THE ; ASSUMPTION THAT IT MUST BE A FILL BYTE AND IS NOT RELIABLE DUE TO FLOATING ; MISO. @@ -1025,6 +1025,7 @@ SD_INITCARD5: ; PER SPEC, THE CARD SHOULD NOW BE ABLE TO HANDLE FULL SPEED OPERATION ; SO, FOR CSIO OPERATION, WE SET CSIO TO MAXIMUM SPEED CALL SD_WAITTX ; MAKE SURE WE ARE DONE SENDING + CALL DLY4 ; WAIT A BIT MORE FOR FINAL BIT XOR A ; ZERO MEANS MAX SPEED OUT (Z180_CNTR),A ; NOW SET CSIO PORT #ENDIF @@ -1703,19 +1704,19 @@ SD_DESELECT: ; ; CSIO WAIT FOR TRANSMIT READY (TX REGSITER EMPTY) ; -SD_WAITTX: ; WAIT FOR TX EMPTY +SD_WAITTX: IN0 A,(SD_CNTR) ; GET CSIO STATUS BIT 4,A ; TX EMPTY? - JR NZ,SD_WAITTX - RET + JR NZ,SD_WAITTX ; LOOP WHILE BUSY + RET ; DONE ; ; CSIO WAIT FOR RECEIVER READY (BYTE AVAILABLE) ; SD_WAITRX: IN0 A,(SD_CNTR) ; WAIT FOR RECEIVER TO FINISH - BIT 5,A - JR NZ,SD_WAITRX - RET + BIT 5,A ; RX EMPTY? + JR NZ,SD_WAITRX ; LOOP WHILE BUSY + RET ; DONE ; #ENDIF ; diff --git a/Source/HBIOS/sio.asm b/Source/HBIOS/sio.asm index 31000849..ae4129df 100644 --- a/Source/HBIOS/sio.asm +++ b/Source/HBIOS/sio.asm @@ -39,6 +39,13 @@ SIO1_VEC .EQU VEC(INT_SIO1) ; #ENDIF ; +#IF (SIO0MODE == SIOMODE_STD) +SIO0A_CMD .EQU SIO0BASE + $01 +SIO0A_DAT .EQU SIO0BASE + $00 +SIO0B_CMD .EQU SIO0BASE + $03 +SIO0B_DAT .EQU SIO0BASE + $02 +#ENDIF +; #IF (SIO0MODE == SIOMODE_RC) SIO0A_CMD .EQU SIO0BASE + $00 SIO0A_DAT .EQU SIO0BASE + $01 @@ -60,15 +67,15 @@ SIO0B_CMD .EQU SIO0BASE + $07 SIO0B_DAT .EQU SIO0BASE + $05 #ENDIF ; -#IF (SIO0MODE == SIOMODE_EZZ80) -SIO0A_CMD .EQU SIO0BASE + $01 -SIO0A_DAT .EQU SIO0BASE + $00 -SIO0B_CMD .EQU SIO0BASE + $03 -SIO0B_DAT .EQU SIO0BASE + $02 -#ENDIF -; #IF (SIOCNT >= 2) ; +#IF (SIO1MODE == SIOMODE_STD) +SIO1A_CMD .EQU SIO1BASE + $01 +SIO1A_DAT .EQU SIO1BASE + $00 +SIO1B_CMD .EQU SIO1BASE + $03 +SIO1B_DAT .EQU SIO1BASE + $02 +#ENDIF +; #IF (SIO1MODE == SIOMODE_RC) SIO1A_CMD .EQU SIO1BASE + $00 SIO1A_DAT .EQU SIO1BASE + $01 @@ -90,13 +97,6 @@ SIO1B_CMD .EQU SIO1BASE + $07 SIO1B_DAT .EQU SIO1BASE + $05 #ENDIF ; -#IF (SIO1MODE == SIOMODE_EZZ80) -SIO1A_CMD .EQU SIO1BASE + $01 -SIO1A_DAT .EQU SIO1BASE + $00 -SIO1B_CMD .EQU SIO1BASE + $03 -SIO1B_DAT .EQU SIO1BASE + $02 -#ENDIF -; #ENDIF ; SIO_PREINIT: @@ -158,44 +158,6 @@ SIO_PREINIT2: ; #ENDIF ; -; FOR NOW, THIS IS SPECIFICALLY FOR A CTC TO DRIVE AN SIO -; AT 1:1 USING CTC CHANNELS A & B. IN OTHER WORDS, IT JUST -; PASSES THE INCOMING TRIGGER OUT AT 1:1. -; -#IF (SIOCNT >= 1) - #IF (SIO0CTCC >= 0) - LD A,%01010111 ; CTCC CONTROL WORD VALUE - ; |||||||+-- 1=CONTROL WORD FLAG - ; ||||||+--- 1=SOFTWARE RESET - ; |||||+---- 1=TIME CONSTANT FOLLOWS - ; ||||+----- 0=AUTO TRIGGER WHEN TIME CONST LOADED - ; |||+------ 1=RISING EDGE TRIGGER - ; ||+------- 0=PRESCALER OF 16 (NOT USED) - ; |+-------- 1=COUNTER MODE - ; +--------- 0=NO INTERRUPTS - OUT (CTCA + SIO0CTCC),A ; SETUP CTCC - LD A,1 ; CTC TIMER CONSTANT = 1 - OUT (CTCA + SIO0CTCC),A ; SETUP CTC TIMER CONSTANT - #ENDIF -#ENDIF -; -#IF (SIOCNT >= 2) - #IF (SIO1CTCC >= 0) - LD A,%01010111 ; CTCC CONTROL WORD VALUE - ; |||||||+-- 1=CONTROL WORD FLAG - ; ||||||+--- 1=SOFTWARE RESET - ; |||||+---- 1=TIME CONSTANT FOLLOWS - ; ||||+----- 0=AUTO TRIGGER WHEN TIME CONST LOADED - ; |||+------ 1=RISING EDGE TRIGGER - ; ||+------- 0=PRESCALER OF 16 (NOT USED) - ; |+-------- 1=COUNTER MODE - ; +--------- 0=NO INTERRUPTS - OUT (CTCA + SIO1CTCC),A ; SETUP CTCC - LD A,1 ; CTC TIMER CONSTANT = 1 - OUT (CTCA + SIO1CTCC),A ; SETUP CTC TIMER CONSTANT - #ENDIF -#ENDIF -; SIO_PREINIT3: XOR A ; SIGNAL SUCCESS RET ; AND RETURN @@ -538,72 +500,195 @@ SIO_INITDEV1: CALL PRTHEXWORD #ENDIF ; - LD A,E ; GET CONFIG LSB - AND $E0 ; CHECK FOR DTR, XON, PARITY=MARK/SPACE - JR NZ,SIO_INITFAIL ; IF ANY BIT SET, FAIL, NOT SUPPORTED + PUSH DE ; SAVE TARGET CONFIG +; + ; WE WANT TO DETERMINE A DIVISOR FOR THE SIO CLOCK + ; THAT RESULTS IN THE DESIRED BAUD RATE. + ; BAUD RATE = SIO CLK / DIVISOR, OR TO SOLVE FOR DIVISOR + ; DIVISOR = SIO CLK / BAUDRATE. + ; TAKE ADVANTAGE OF ENCODED BAUD RATES ALWAYS BEING A FACTOR OF 75. + ; SO, WE CAN USE (SIO OSC / 75) / (BAUDRATE / 75) +; + ; GET SERIAL CLOCK VALUE AND DIVIDE IT BY 75 + PUSH IY ; GET CONFIG TABLE ENTRY PTR + POP HL ; MOVE TO HL + LD A,9 ; OFFSET TO CLK VALUE + CALL ADDHLA ; HL IS NOW PTR TO 32 BIT CLK + CALL LD32 ; LOAD DE:HL W/ RAW CLK VAL + LD C,75 ; DIVIDE BY 75 LIKE BAUD RATE + CALL DIV32X8 ; HL NOW HAS (CLK / 75) +; + #IF (SIODEBUG) + PRTS(" CLK75=$") + CALL PRTHEX32 + #ENDIF +; + ; SCALE DOWN THE 32 BIT VALUE TO FIT IN 16 BITS KEEPING + ; TRACK OF THE NUMBER OF BITS SHIFTED OUT IN B + LD B,0 +SIO_INITDEV1A: + LD A,D + OR E + JR Z,SIO_INITDEV1B + SRL D + RR E + RR H + RR L + INC B + JR SIO_INITDEV1A +SIO_INITDEV1B: +; + #IF (SIODEBUG) + PRTS(" CLK=$") + CALL PRTHEX32 + #ENDIF ; + POP DE ; RECOVER INCOMING TARGET CFG + PUSH DE ; RESAVE IT + PUSH HL ; SAVE CLK VALUE + PUSH BC ; SAVE BITS SHIFTED + + ; NOW DECODE THE BAUDRATE, BUT WE USE A CONSTANT OF 1 INSTEAD + ; OF THE NORMAL 75. THIS PRODUCES (BAUDRATE / 75). LD A,D ; GET CONFIG MSB AND $1F ; ISOLATE ENCODED BAUD RATE + LD L,A ; PUT IN L + LD H,0 ; H IS ALWAYS ZERO + LD DE,1 ; USE 1 FOR ENCODING CONSTANT + CALL DECODE ; DE:HL := BAUD RATE, ERRORS IGNORED +; + #IF (SIODEBUG) + PRTS(" BAUD75=$") + CALL PRTHEX32 + #ENDIF +; + ; SCALE DOWN CLK BY SAME AMOUNT AS BAUD RATE + POP BC ; RESTORE BITS TO SHIFT + LD A,B + OR A + JR Z,SIO_INITDEV1D +SIO_INITDEV1C: + SRL D + RR E + RR H + RR L + DJNZ SIO_INITDEV1C +SIO_INITDEV1D: +; + #IF (SIODEBUG) + PRTS(" BAUD=$") + CALL PRTHEX32 + #ENDIF +; + POP DE ; RECOVER CLOCK + EX DE,HL ; SWAP CLOCK & BAUD FOR DIV + ; *** HANDLE DIVIDE BY ZERO??? *** + CALL DIV16 ; BC := HL/DE == TARGET DIVISOR ; -#IF (SIODEBUG) - PRTS(" ENC=$") + #IF (SIODEBUG) + PRTS(" DIV=$") + CALL PRTHEXWORD + #ENDIF +; + ; NOW THAT WE HAVE THE TARGET BAUD RATE DIVISOR, WE WILL + ; ATTEMPT TO IMPLEMENT IT. THE SIO ITSELF CAN APPLY + ; A DIVISOR OF 1, 16, 32, OR 64. IF A CTC CHANNEL IS + ; CONFIGURED FOR THIS SERIAL PORT, THEN WE CAN ADDITIONALLY + ; APPLY A SCALER OF 1-256. +; + ; WE START BY DETERMINING THE MAXIMUM POSSIBLE SIO + ; SCALING. +; + ; WARNING: IF THE INCOMING SIO CLOCK IS THE SAME AS THE + ; CPU CLOCK AND WE USE THE 1:1 DIVISOR, THE SIO WILL NOT + ; WORK WELL. +; + PUSH BC ; MOVE WORKING DIVISOR VALUE + POP HL ; ... TO HL + LD A,L ; LOAD LSB OF DIVISOR + LD BC,$0004 ; SHIFT 0 BITS / SIO WR4 DIV 1 + LD A,L ; LOAD LSB OF DIVISOR + AND %00001111 ; DIV 16 POSSIBLE? + JR NZ,SIO_INITDEV2 ; NOPE, DONE TRYING + LD BC,$0444 ; SHIFT 4 BITS / SIO WR4 DIV 16 + LD A,L ; LOAD LSB OF DIVISOR + AND %00011111 ; DIV 32 POSSIBLE? + JR NZ,SIO_INITDEV2 ; NOPE, DONE TRYING + LD BC,$0584 ; SHIFT 5 BITS / SIO WR4 DIV 32 + LD A,L ; LOAD LSB OF DIVISOR + AND %00111111 ; DIV 32 POSSIBLE? + JR NZ,SIO_INITDEV2 ; NOPE, DONE TRYING + LD BC,$06C4 ; SHIFT 6 BITS / SIO WR4 DIV 64 +; + ; NOW APPLY THE SIO DIVISOR TO THE WORKING DIVISOR + ; AND SAVE THE RESULTANT SIO REGISTER VALUE TO APPLY LATER. +SIO_INITDEV2: + ; SHIFT BITS + XOR A ; ZERO ACCUM + OR B ; ZERO BITS TO SHIFT? + JR Z,SIO_INITDEV4 ; BYPASS SHIFTING IF SO +SIO_INITDEV3: + RR H ; SHIFT HL RIGHT BY + RR L ; ONE BIT + DJNZ SIO_INITDEV3 ; UNTIL ALL BITS DONE +SIO_INITDEV4: + LD B,C ; MOVE SIO WR4 VALUE TO B +; + POP DE ; RESTORE DE = SERIAL CONFIG +; + #IF (SIODEBUG) + PUSH BC + PUSH HL + POP BC + PRTS(" CTCDIV=$") + CALL PRTHEXWORD + POP BC + #ENDIF +; +#IF (CTCENABLE) + LD A,(IY+13) ; GET CTC CHANNEL + INC A ; $FF -> 0 + JR Z,SIO_NOCTC ; NO CTC CHANNEL, BYPASS +; + ; HL HAS THE DIVISOR THAT WE WANT TO PROGRAM INTO THE + ; DESIGNATED CTC CHANNEL. HOWEVER, THE CTC REGISTER IS ONE + ; BYTE. A VALUE OF 0 MEANS 256. SO WE NEED TO VALIDATE + ; THAT HL IS BETWEEN 1 AND 256. + DEC HL ; 1-256 -> 0-255 + LD A,H ; MSB NOW MUST BE ZERO + OR A ; SET FLAGS + JR NZ,SIO_INITFAIL ; IF ANY BIT SET, FAIL + INC HL ; RESTORE HL +; + ; ALL GOOD. PROGRAM THE CTC CHANNEL + LD A,(IY+13) ; GET CTC CHANNEL + ADD A,CTCA ; ADD TO CTC BASE PORT ADR + #IF (SIODEBUG) + PRTS(" CTC=$") CALL PRTHEXBYTE + #ENDIF + LD C,A ; AND PUT IN C FOR I/O + LD A,%01010111 ; CTCC CONTROL WORD VALUE + ; |||||||+-- 1=CONTROL WORD FLAG + ; ||||||+--- 1=SOFTWARE RESET + ; |||||+---- 1=TIME CONSTANT FOLLOWS + ; ||||+----- 0=AUTO TRIGGER WHEN TIME CONST LOADED + ; |||+------ 1=RISING EDGE TRIGGER + ; ||+------- 0=PRESCALER OF 16 (NOT USED) + ; |+-------- 1=COUNTER MODE + ; +--------- 0=NO INTERRUPTS + OUT (C),A ; PREP CTC CHANNEL + OUT (C),L ; SET CTC TIMER CONSTANT + JR SIO_INITBROK ; AND REJOIN MAIN SETUP +; #ENDIF ; - PUSH DE ; SAVE REQUESTED CONFIG - LD L,(IY+9) ; LOAD CLK FREQ - LD H,(IY+10) ; ... INTO DE:HL - LD E,(IY+11) ; ... " - LD D,(IY+12) ; ... " - LD C,75 ; BAUD RATE ENCODING CONSTANT - CALL ENCODE ; C = TEST BAUD RATE (ENCODED) = BAUDTST - POP DE ; GET REQ CONFIG BACK, D = BAUDREQ -; - ; BIT 4 (DIV 3) OF BAUDREQ AND BAUDTST MUST MATCH! - LD A,C ; A = BAUDTST - XOR D ; XOR WITH BAUDREQ - BIT 4,A ; DO BIT 4 VALS MATCH? - JR NZ,SIO_INITFAIL ; IF NOT, BAIL OUT -; - LD A,C ; BAUDTST TO A - AND $0F ; ISOLATE DIV 2 BAUD BITS - LD C,A ; C = BAUDTST -; - LD A,D ; MSB W/ BAUD RATE TO A - AND $0F ; ISOLATE DIV 2 BAUD BITS - LD L,A ; L = BAUDREQ -; -; PUSH AF ; *DEBUG* -; CALL NEWLINE ; *DEBUG* -; LD A,L ; *DEBUG* -; CALL PRTHEXBYTE ; *DEBUG* -; LD A,C ; *DEBUG* -; CALL PRTHEXBYTE ; *DEBUG* -; CALL NEWLINE ; *DEBUG* -; POP AF ; *DEBUG* -; - LD A,C ; A = BAUDTST - LD B,$04 ; SIO R4 VAL FOR DIV 1 - CP L ; BAUDTST = BAUDREQ? - JR Z,SIO_INITBROK ; IF MATCH, WE ARE DONE -; - SUB 4 ; DIVIDE BY 16 (NOW DIV 16 TOT) - JR C,SIO_INITFAIL ; FAIL IF UNDERFLOW - LD B,$44 ; SIO R4 VAL FOR DIV 16 - CP L ; BAUDTST = BAUDREQ? - JR Z,SIO_INITBROK ; IF MATCH, WE ARE DONE -; - SUB 1 ; DIVIDE BY 2 (NOW DIV 32 TOT) - JR C,SIO_INITFAIL ; FAIL IF UNDERFLOW - LD B,$84 ; SIO R4 VAL FOR DIV 32 - CP L ; BAUDTST = BAUDREQ? - JR Z,SIO_INITBROK ; IF MATCH, WE ARE DONE -; - SUB 1 ; DIVIDE BY 2 (NOW DIV 64 TOT) - JR C,SIO_INITFAIL ; FAIL IF UNDERFLOW - LD B,$C4 ; SIO R4 VAL FOR DIV 64 - CP L ; BAUDTST = BAUDREQ? - JR Z,SIO_INITBROK ; IF MATCH, WE ARE DONE +SIO_NOCTC: + ; IF THERE IS NO CTC, THEN THE REMAINING DIVISOR + ; NEEDS TO BE EXACTLY 1 OR WE HAVE A PROBLEM. + LD A,L ; GET REMAINING DIVISOR + DEC A ; 1 -> 0 + JR Z,SIO_INITBROK ; FAIL IF NOT 1 ; SIO_INITFAIL: ; @@ -665,6 +750,28 @@ SIO_INITBROK: ; FAILS. ; SIO_INITSAFE: +; +#IF (CTCENABLE) +; + ; CHECK IF A CTC CHANNEL IS CONFIGURED + LD A,(IY+13) ; GET CTC CHANNEL + INC A ; $FF -> 0 + JR Z,SIO_INITSAFE2 ; NO CTC CHANNEL, BYPASS +; + ; IF A CTC CHANNEL IS CONFIGURED, PROGRAM IT FOR + ; SIMPLE 1:1 SCALING. + LD A,(IY+13) ; GET CTC CHANNEL + ADD A,CTCA ; ADD TO CTC BASE PORT ADR + LD C,A ; AND PUT IN C FOR I/O + LD A,%01010111 ; CTCC CONTROL WORD VALUE + OUT (C),A ; PREP CTC CHANNEL + LD A,1 ; TIMER CONSTANT IS 1 + OUT (C),A ; SET CTC TIMER CONSTANT +; +#ENDIF +; +SIO_INITSAFE2: + ; SETUP DEFAULT VALUES FOR SIO REGISTERS LD HL,SIO_INITDEFS LD DE,SIO_INITVALS LD BC,SIO_INITLEN @@ -764,7 +871,8 @@ SIO_INITLEN .EQU $ - SIO_INITVALS ; SIO_INITDEFS: .DB $00, $18 ; WR0: CHANNEL RESET CMD - .DB $04, $C4 ; WR4: CLK BAUD PARITY STOP BIT + ;.DB $04, $C4 ; WR4: CLK BAUD PARITY STOP BIT + .DB $04, $44 ; WR4: CLK BAUD PARITY STOP BIT .DB $01, SIO_WR1VAL ; WR1: INTERRUPT STYLE .DB $02, $00 ; WR2: IM2 VEC OFFSET .DB $03, $E1 ; WR3: 8 BIT RCV, CTS/DCD AUTO, RX ENABLE @@ -984,8 +1092,9 @@ SIO0A_CFG: .DB SIO0A_DAT ; DATA PORT .DW SIO0ACFG ; LINE CONFIGURATION .DW SIO0A_RCVBUF ; POINTER TO RCV BUFFER STRUCT - .DW (SIO0ACLK / SIO0ADIV) & $FFFF ; CLOCK FREQ AS - .DW (SIO0ACLK / SIO0ADIV) >> 16 ; ... DWORD VALUE + .DW SIO0ACLK & $FFFF ; CLOCK FREQ AS + .DW SIO0ACLK >> 16 ; ... DWORD VALUE + .DB SIO0ACTCC ; CTC CHANNEL ; SIO_CFGSIZ .EQU $ - SIO_CFG ; SIZE OF ONE CFG TABLE ENTRY ; @@ -998,8 +1107,9 @@ SIO0B_CFG: .DB SIO0B_DAT ; DATA PORT .DW SIO0BCFG ; LINE CONFIGURATION .DW SIO0B_RCVBUF ; POINTER TO RCV BUFFER STRUCT - .DW (SIO0BCLK / SIO0BDIV) & $FFFF ; CLOCK FREQ AS - .DW (SIO0BCLK / SIO0BDIV) >> 16 ; ... DWORD VALUE + .DW SIO0BCLK & $FFFF ; CLOCK FREQ AS + .DW SIO0BCLK >> 16 ; ... DWORD VALUE + .DB SIO0BCTCC ; CTC CHANNEL ; #IF (SIOCNT >= 2) ; @@ -1012,8 +1122,9 @@ SIO1A_CFG: .DB SIO1A_DAT ; DATA PORT .DW SIO1ACFG ; LINE CONFIGURATION .DW SIO1A_RCVBUF ; POINTER TO RCV BUFFER STRUCT - .DW (SIO1ACLK / SIO1ADIV) & $FFFF ; CLOCK FREQ AS - .DW (SIO1ACLK / SIO1ADIV) >> 16 ; ... DWORD VALUE + .DW SIO1ACLK & $FFFF ; CLOCK FREQ AS + .DW SIO1ACLK >> 16 ; ... DWORD VALUE + .DB SIO1ACTCC ; CTC CHANNEL ; ; SIO1 CHANNEL B SIO1B_CFG: @@ -1024,8 +1135,9 @@ SIO1B_CFG: .DB SIO1B_DAT ; DATA PORT .DW SIO1BCFG ; LINE CONFIGURATION .DW SIO1B_RCVBUF ; POINTER TO RCV BUFFER STRUCT - .DW (SIO1BCLK / SIO1BDIV) & $FFFF ; CLOCK FREQ AS - .DW (SIO1BCLK / SIO1BDIV) >> 16 ; ... DWORD VALUE + .DW SIO1BCLK & $FFFF ; CLOCK FREQ AS + .DW SIO1BCLK >> 16 ; ... DWORD VALUE + .DB SIO1BCTCC ; CTC CHANNEL ; #ENDIF ; diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm index f0aa880d..af024490 100644 --- a/Source/HBIOS/std.asm +++ b/Source/HBIOS/std.asm @@ -119,10 +119,10 @@ DSRTCMODE_MFPIC .EQU 2 ; MF/PIC VARIANT ; SIO MODE SELECTIONS ; SIOMODE_NONE .EQU 0 -SIOMODE_RC .EQU 1 ; RC2014 SIO MODULE (SPENCER OWEN) -SIOMODE_SMB .EQU 2 ; RC2014 SIO MODULE (SCOTT BAKER) -SIOMODE_ZP .EQU 3 ; ECB-ZILOG PERIPHERALS BOARD -SIOMODE_EZZ80 .EQU 4 ; EASY Z80 ON-BOARD SIO/0 +SIOMODE_STD .EQU 1 ; STD SIO REG CFG (EZZ80, KIO) +SIOMODE_RC .EQU 2 ; RC2014 SIO MODULE (SPENCER OWEN) +SIOMODE_SMB .EQU 3 ; RC2014 SIO MODULE (SCOTT BAKER) +SIOMODE_ZP .EQU 4 ; ECB-ZILOG PERIPHERALS BOARD ; ; TYPE OF CONSOLE BELL TO USE ; diff --git a/Source/Images/Common/COMP.COM b/Source/Images/Common/COMP.COM new file mode 100644 index 0000000000000000000000000000000000000000..d91f079fc8756f8ff331854380b94959580d54d7 GIT binary patch literal 1024 zcmaJ;O=uHA6yBN56dKvY(t?1n~i8ea1OKIzW2@dzV{vzgbSw~ z5_Jemi1s8_rUZx9nCM)D%ih91f5&%^O@xt}$gxOV+>YPMn8-mQcM~~8M&uq6Cvq=g zg3v4}-DLZr^&BZZWYl_!DriaQ5ZV~Xbm7*|7z3Ryyti6gMl3|WK1TOqa(NlWq9sSD zy~CU?jB(MWQK%63@UejHDQvyLb_I!@!SW<()+={?7|fJ58`UOT7t5bez2a-LzaeWE zg(d3?D(|92hg#bxJ~&czl(qO^vC7%drF}vy`*D-)@MkO~mb*pvh~IqXUmHmZSQXOLJ5?l}B;66&nQ62aI+Fg9LYT-mT!5tzhW z=olz$qk~!w`w+mr#%8J7tk^$LqucHi?N>Np4~X__+*st_7g*_qsXgNk-HBF#0ogb$ zuOf)CUB09WM=v>IHFs$tvQqP7*6!hMhCo6Z|1+!>XI!~doYbw<}xNAi;Q zMj<<`=BYkQrx#4spfh?lm&~gvN)_s!L6G@N%BGEM(wvzG=B!@OQb$OVH{rfb8{jpq znQA^?$eC&?B1qoJc|8vSUdEhPsae!%+EA!4#+^n%q=jUTS}IV0Gc&3-XU@|kxCZN{ zszIZm0q=Q}20c?S3du}nfkt3dlGhEMjZixN$LBek%;?%2Ev7+-OD0pPylNN}x}>SJ tk;^0(z$BmMEu9t&RpGGJ`<1x6fU#@WuSR(RdRgIEZWV*U{O9bx{{?|ZNuU4# literal 0 HcmV?d00001 diff --git a/Source/Images/Common/COMPARE.COM b/Source/Images/Common/COMPARE.COM deleted file mode 100644 index 29fa41e620a8411a9327359272f7a2b403aefa7b..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 2560 zcmd^A?@tqV82{c~?+aIGp<=dxbNiO^LMxJTW-i{aq{tOqpmlA@BuL0<3p6X#^@oK` zE1E4b-!02#Voa80yfJ%$Q4@?IPVRuTO)e2KiK*EO;^4)|UKqo&Y{|LjuAnaQKk#0B zzt8u%=lOh|&vVb+t=2y@w8iZ66YtS3vDsJ~tVAf|2K0LffjvnNC@ezu z7_wcVOSsj=~{?Z9@1dd-_=|3Lbnd0rvlQJ?pfLa!JzvmnxCQ73~*IL68J#(6RW z6F=_pbPZL{3U0T=)G3jhdNbE~ZU2cs;S)I3$_GyzDav7Y5N z?f;Z#|8litG(q;74!ZU!2Tf1&?q2>`Imm!i(eK^jZX`Z`sATg1sDQ3H`o8e2TbcGL;8I2Q>3WrBF8bKTvPGAYU{_p^w6|LyY39}kD`oj7n^|BqJ{e)w z@$^Z4;o;hVRUentrMbM7y!#wXzKpY9M79%1ongoMNqUSwfwCGZ++ZEHSjjoTjPWs) zhgXN6VDfIn-^99o3qM@TIy9m1h}9YkBG&9h5i9fTYF6_UEqKMFRTs#Sy8UT6Jd zmo80Qy3nEQ#$y@*2k-rujzbB{r*RFgaFZQ1tlW=0jrBGzT*oz`(l-_C^R%}I z`up{qaN2;2pH4;Nqf(576VWpfB8`SgIvGjm_arhHPmt7bq{QB2F&ogK-eV-1-0~-q zDUu$QMovbD((!cCh$L{1l%n~jSE7@VQ*j;sb>TX(#hi)8ppeL*l#ZoHDo$SV4U+h1 zY@CGCyr7d0L9L@eVKIlGycZg#g8I$ViRg%wh(fqtzwvj3JsBN|#-v0^i^Z%9HRyuF z@eGlGR|eyY diff --git a/Source/ver.inc b/Source/ver.inc index 91ca16d7..26c4f45a 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,4 +2,4 @@ #DEFINE RMN 1 #DEFINE RUP 0 #DEFINE RTP 0 -#DEFINE BIOSVER "3.1-pre.2" +#DEFINE BIOSVER "3.1-pre.3" diff --git a/Source/ver.lib b/Source/ver.lib index bc39cfbf..a650a444 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 1 rup equ 0 rtp equ 0 biosver macro - db "3.1-pre.2" + db "3.1-pre.3" endm From 57f78d1a6b1283a3ed82a8887050fb6eea440256 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Fri, 17 Apr 2020 15:53:17 -0700 Subject: [PATCH 002/339] CTC driver fine tuning --- Source/HBIOS/Config/RCZ80_kio.asm | 4 +- Source/HBIOS/cfg_ezz80.asm | 11 +++--- Source/HBIOS/cfg_master.asm | 11 +++--- Source/HBIOS/cfg_mk4.asm | 3 ++ Source/HBIOS/cfg_n8.asm | 3 ++ Source/HBIOS/cfg_rcz180.asm | 11 ++++-- Source/HBIOS/cfg_rcz80.asm | 11 +++--- Source/HBIOS/cfg_sbc.asm | 10 ++--- Source/HBIOS/cfg_scz180.asm | 11 ++++-- Source/HBIOS/cfg_zeta2.asm | 3 +- Source/HBIOS/ctc.asm | 66 +++++++++++++++++++++++-------- Source/ver.inc | 2 +- Source/ver.lib | 2 +- 13 files changed, 98 insertions(+), 50 deletions(-) diff --git a/Source/HBIOS/Config/RCZ80_kio.asm b/Source/HBIOS/Config/RCZ80_kio.asm index 91ef5e73..06cbd81e 100644 --- a/Source/HBIOS/Config/RCZ80_kio.asm +++ b/Source/HBIOS/Config/RCZ80_kio.asm @@ -42,6 +42,6 @@ SIOCNT .SET 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIO0MODE .SET SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0BASE .SET KIOBASE+$08 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .SET 1843200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0ACTCC .SET 0 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0ACTCC .SET 0 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO0BCLK .SET 1843200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0BCTCC .SET 1 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0BCTCC .SET 1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE diff --git a/Source/HBIOS/cfg_ezz80.asm b/Source/HBIOS/cfg_ezz80.asm index b7a190f8..f46a39d1 100644 --- a/Source/HBIOS/cfg_ezz80.asm +++ b/Source/HBIOS/cfg_ezz80.asm @@ -41,8 +41,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU TRUE ; ENABLE ZILOG CTC SUPPORT -CTCMODE .EQU CTCMODE_EZ ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS +CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER +CTCMODE .EQU CTCMODE_EZ ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS @@ -90,18 +91,18 @@ SIO0MODE .EQU SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .EQU 1843200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG -SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO0BCLK .EQU 1843200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG -SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG -SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO1BCLK .EQU 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG -SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE ; XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG ; diff --git a/Source/HBIOS/cfg_master.asm b/Source/HBIOS/cfg_master.asm index b5f4ce33..72fb0604 100644 --- a/Source/HBIOS/cfg_master.asm +++ b/Source/HBIOS/cfg_master.asm @@ -59,8 +59,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS +CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER CTCMODE .EQU CTCMODE_ZP ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] -CTCBASE .EQU $20 ; CTC BASE I/O ADDRESS ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS @@ -125,18 +126,18 @@ SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG -SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG -SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG -SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO1BCLK .EQU CPUOSC ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG -SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE ; XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG ; diff --git a/Source/HBIOS/cfg_mk4.asm b/Source/HBIOS/cfg_mk4.asm index 6ee68e4e..82ef4709 100644 --- a/Source/HBIOS/cfg_mk4.asm +++ b/Source/HBIOS/cfg_mk4.asm @@ -46,6 +46,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS +CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER +CTCMODE .EQU CTCMODE_ZP ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_n8.asm b/Source/HBIOS/cfg_n8.asm index cd18db22..1175c67c 100644 --- a/Source/HBIOS/cfg_n8.asm +++ b/Source/HBIOS/cfg_n8.asm @@ -49,6 +49,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS +CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER +CTCMODE .EQU CTCMODE_ZP ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm index 746446f2..eede7d4c 100644 --- a/Source/HBIOS/cfg_rcz180.asm +++ b/Source/HBIOS/cfg_rcz180.asm @@ -46,6 +46,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS +CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER +CTCMODE .EQU CTCMODE_RC ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS @@ -95,18 +98,18 @@ SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0ACFG .EQU SER_115200_8N1 ; SER_115200_8N1 0A: SERIAL LINE CONFIG -SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG -SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO1ACFG .EQU SER_115200_8N1 ; SER_115200_8N1 1A: SERIAL LINE CONFIG -SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO1BCLK .EQU 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO1BCFG .EQU SER_115200_8N1 ; SIO 1B: SERIAL LINE CONFIG -SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE ; XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG ; diff --git a/Source/HBIOS/cfg_rcz80.asm b/Source/HBIOS/cfg_rcz80.asm index 971216b3..54340bb1 100644 --- a/Source/HBIOS/cfg_rcz80.asm +++ b/Source/HBIOS/cfg_rcz80.asm @@ -40,8 +40,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT -CTCMODE .EQU CTCMODE_RC ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS +CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER +CTCMODE .EQU CTCMODE_RC ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS @@ -99,18 +100,18 @@ SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG -SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG -SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG -SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO1BCLK .EQU CPUOSC ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG -SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE ; XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG ; diff --git a/Source/HBIOS/cfg_sbc.asm b/Source/HBIOS/cfg_sbc.asm index 0121cce9..70a6921c 100644 --- a/Source/HBIOS/cfg_sbc.asm +++ b/Source/HBIOS/cfg_sbc.asm @@ -38,8 +38,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT -CTCMODE .EQU CTCMODE_ZP ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] -CTCBASE .EQU $80 ; CTC BASE I/O ADDRESS +CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS +CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER +CTCMODE .EQU CTCMODE_ZP ; CTC TIMER MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS @@ -89,14 +90,13 @@ SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] -SIO0CTCC .EQU -1 ; SIO 0: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE SIO0BASE .EQU $B0 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .EQU (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG -SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO0BCLK .EQU (4915200/8) ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG -SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE ; XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG ; diff --git a/Source/HBIOS/cfg_scz180.asm b/Source/HBIOS/cfg_scz180.asm index cc92824b..c129bb1a 100644 --- a/Source/HBIOS/cfg_scz180.asm +++ b/Source/HBIOS/cfg_scz180.asm @@ -41,6 +41,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS +CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER +CTCMODE .EQU CTCMODE_RC ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $0D ; DIAGNOSTIC PORT ADDRESS @@ -90,18 +93,18 @@ SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0ACFG .EQU SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG -SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG -SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO1ACFG .EQU SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG -SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO1BCLK .EQU 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO1BCFG .EQU SER_115200_8N1 ; SIO 1B: SERIAL LINE CONFIG -SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE +SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE ; XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG ; diff --git a/Source/HBIOS/cfg_zeta2.asm b/Source/HBIOS/cfg_zeta2.asm index 35eaddbe..45fe1ced 100644 --- a/Source/HBIOS/cfg_zeta2.asm +++ b/Source/HBIOS/cfg_zeta2.asm @@ -41,8 +41,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU TRUE ; ENABLE ZILOG CTC SUPPORT -CTCMODE .EQU CTCMODE_Z2 ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] CTCBASE .EQU $20 ; CTC BASE I/O ADDRESS +CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER +CTCMODE .EQU CTCMODE_Z2 ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/ctc.asm b/Source/HBIOS/ctc.asm index 814fd110..011d3caa 100644 --- a/Source/HBIOS/ctc.asm +++ b/Source/HBIOS/ctc.asm @@ -5,53 +5,76 @@ ; DISPLAY CONFIGURATION DETAILS ;______________________________________________________________________________________________________________________ ; +#IF (CTCTIMER) +; ; ONLY IM2 IMPLEMENTED BELOW. I DON'T SEE ANY REASONABLE WAY TO ; IMPLEMENT AN IM1 TIMER BECAUSE THE CTC PROVIDES NO WAY TO ; DETERMINE IF IT WAS THE CAUSE OF AN INTERRUPT OR A WAY TO ; DETERMINE WHICH CHANNEL CAUSED AN INTERRUPT. ; -#IF (INTMODE != 2) + #IF (INTMODE != 2) .ECHO "*** ERROR: CTC REQUIRES INTMODE 2!!!\n" !!! ; FORCE AN ASSEMBLY ERROR -#ENDIF + #ENDIF ; ; CONFIGURATION ; -#IF (CTCMODE == CTCMODE_ZP) + #IF (CTCMODE == CTCMODE_ZP) CTCPC .EQU CTCC ; PRESCALE CHANNEL CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT CTCTC .EQU CTCD ; TIMER CHANNEL CTCTCC .EQU 48 ; TIMER CHANNEL CONSTANT CTCTIVT .EQU INT_CTC0D ; TIMER CHANNEL IVT ENTRY -#ENDIF + #ENDIF ; -#IF (CTCMODE == CTCMODE_Z2) + #IF (CTCMODE == CTCMODE_Z2) CTCPC .EQU CTCA ; PRESCALE CHANNEL CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT CTCTC .EQU CTCB ; TIMER CHANNEL CTCTCC .EQU 72 ; TIMER CHANNEL CONSTANT CTCTIVT .EQU INT_CTC0B ; TIMER CHANNEL IVT ENTRY -#ENDIF + #ENDIF ; -#IF (CTCMODE == CTCMODE_EZ) + #IF (CTCMODE == CTCMODE_EZ) CTCPC .EQU CTCC ; PRESCALE CHANNEL CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT CTCTC .EQU CTCD ; TIMER CHANNEL CTCTCC .EQU 72 ; TIMER CHANNEL CONSTANT CTCTIVT .EQU INT_CTC0D ; TIMER CHANNEL IVT ENTRY -#ENDIF + #ENDIF ; -#IF (CTCMODE == CTCMODE_RC) + #IF (CTCMODE == CTCMODE_RC) CTCPC .EQU CTCC ; PRESCALE CHANNEL CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT CTCTC .EQU CTCD ; TIMER CHANNEL CTCTCC .EQU 144 ; TIMER CHANNEL CONSTANT CTCTIVT .EQU INT_CTC0D ; TIMER CHANNEL IVT ENTRY + #ENDIF +; #ENDIF ; ; ; CTC_PREINIT: +; + ; RESET ALL CTC CHANNELS + LD B,4 ; 4 CHANNELS + LD C,CTCBASE ; FIRST CHANNEL PORT +CTC_PREINIT1: + LD A,%01010011 ; CTCC CONTROL WORD VALUE + ; |||||||+-- 1=CONTROL WORD FLAG + ; ||||||+--- 1=SOFTWARE RESET + ; |||||+---- 0=TIME CONSTANT DOES NOT FOLLOW + ; ||||+----- 0=AUTO TRIGGER WHEN TIME CONST LOADED + ; |||+------ 1=RISING EDGE TRIGGER + ; ||+------- 0=PRESCALER OF 16 + ; |+-------- 1=COUNTER MODE + ; +--------- 0=NO INTERRUPTS + OUT (C),A ; CTC COMMAND + INC C ; NEXT CHANNEL PORT + DJNZ CTC_PREINIT1 +; +#IF (CTCTIMER) ; SETUP TIMER INTERRUPT IVT SLOT LD HL,HB_TIMINT ; TIMER INT HANDLER ADR LD (IVT(CTCTIVT)),HL ; IVT ENTRY FOR TIMER CHANNEL @@ -93,6 +116,8 @@ CTC_PREINIT: OUT (CTCTC),A ; SETUP TIMER CHANNEL LD A,CTCTCC ; TIMER CHANNEL CONSTANT OUT (CTCTC),A ; SET TIMER CONSTANT +; +#ENDIF ; XOR A RET @@ -103,19 +128,26 @@ CTC_INIT: ; MINIMAL INIT CTC_PRTCFG: ; ANNOUNCE PORT CALL NEWLINE ; FORMATTING - PRTS("CTC: MODE=$") ; FORMATTING -#IF (CTCMODE == CTCMODE_ZP) + PRTS("CTC:$") ; FORMATTING +; +#IF (CTCTIMER) +; + PRTS(" TIMER MODE=$") ; FORMATTING + #IF (CTCMODE == CTCMODE_ZP) PRTS("ZP$") -#ENDIF -#IF (CTCMODE == CTCMODE_Z2) + #ENDIF + #IF (CTCMODE == CTCMODE_Z2) PRTS("Z2$") -#ENDIF -#IF (CTCMODE == CTCMODE_EZ) + #ENDIF + #IF (CTCMODE == CTCMODE_EZ) PRTS("EZ$") -#ENDIF -#IF (CTCMODE == CTCMODE_RC) + #ENDIF + #IF (CTCMODE == CTCMODE_RC) PRTS("RC$") + #ENDIF +; #ENDIF +; PRTS(" IO=0x$") ; FORMATTING LD A,CTCBASE ; GET BASE PORT CALL PRTHEXBYTE ; PRINT BASE PORT diff --git a/Source/ver.inc b/Source/ver.inc index 26c4f45a..2e263f01 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,4 +2,4 @@ #DEFINE RMN 1 #DEFINE RUP 0 #DEFINE RTP 0 -#DEFINE BIOSVER "3.1-pre.3" +#DEFINE BIOSVER "3.1-pre.4" diff --git a/Source/ver.lib b/Source/ver.lib index a650a444..1455dbb1 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 1 rup equ 0 rtp equ 0 biosver macro - db "3.1-pre.3" + db "3.1-pre.4" endm From fd8a9195fbfbbac5d88f1fc679ced60c53353b11 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Sat, 18 Apr 2020 10:16:37 -0700 Subject: [PATCH 003/339] Update xmdm125.asm Fixed a small issue in core XM125 code that caused a file write error message to not be displayed when it should be. --- Source/Apps/XM/xmdm125.asm | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/Source/Apps/XM/xmdm125.asm b/Source/Apps/XM/xmdm125.asm index ac881800..8d3ed10b 100644 --- a/Source/Apps/XM/xmdm125.asm +++ b/Source/Apps/XM/xmdm125.asm @@ -3457,9 +3457,18 @@ RSDMA: LXI D,TBUF ; Reset DMA address WRERR: CALL RSDMA ; Reset DMA to normal MVI C,CAN ; Cancel CALL SEND ; Sender +; WBW BEGIN: RCVSABT does not return, so file write error +; message was never being displayed. Swapped things around +; to fix this. +; CALL RCVSABT ; Kill receive file +; CALL ERXIT ; Exit with msg: +; DB '++ Error writing file ++$' +; WBW: ----- + CALL ILPRT ; Dispaly error msg + DB CR,LF,'++ Error writing file ++',CR,LF,0 CALL RCVSABT ; Kill receive file - CALL ERXIT ; Exit with msg: - DB '++ Error writing file ++$' +; WBW END + ; ; Receive a character - timeout time is in 'B' in seconds. Entry via ; 'RECVDG' deletes garbage characters on the line. For example, having From 7d022f709b917349469c56102e79002f42e75e8a Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Sat, 18 Apr 2020 15:19:10 -0700 Subject: [PATCH 004/339] CF Card compatibility improvement Older CF Cards did not reset IDE registers to defaults values when reset. Implemented a work around. --- Doc/ChangeLog.txt | 1 + Readme.unix | 80 ++++++++++++++++++---------- Source/HBIOS/ide.asm | 62 +++++++++++---------- Source/HBIOS/ppide.asm | 21 ++++++++ Source/Images/d_cpm22/u0/KERMIT.COM | Bin 0 -> 29440 bytes Source/Images/d_cpm3/u0/KERMIT.COM | Bin 0 -> 29312 bytes Source/Images/d_nzcom/u0/KERMIT.COM | Bin 0 -> 29440 bytes Source/Images/d_zpm3/u15/kermit.com | Bin 0 -> 29312 bytes Source/Images/d_zsdos/u0/KERMIT.COM | Bin 0 -> 29440 bytes Source/ver.inc | 2 +- Source/ver.lib | 2 +- 11 files changed, 111 insertions(+), 57 deletions(-) create mode 100644 Source/Images/d_cpm22/u0/KERMIT.COM create mode 100644 Source/Images/d_cpm3/u0/KERMIT.COM create mode 100644 Source/Images/d_nzcom/u0/KERMIT.COM create mode 100644 Source/Images/d_zpm3/u15/kermit.com create mode 100644 Source/Images/d_zsdos/u0/KERMIT.COM diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt index e177cbc8..80ec7510 100644 --- a/Doc/ChangeLog.txt +++ b/Doc/ChangeLog.txt @@ -7,6 +7,7 @@ Version 3.1 - WBW: Made .com images smaller (contain only Z-System now) - WBW: Support automatic clock hardware detection and fallback - WBW: Support use of CTC for SIO baud rate divisors +- WBW: Updated IDE and PPIDE drivers to improve old CF Card compatibility Version 3.0.1 ------------- diff --git a/Readme.unix b/Readme.unix index 710487c6..e7633897 100644 --- a/Readme.unix +++ b/Readme.unix @@ -1,41 +1,67 @@ -this tree now contains makefiles and tools to build on Linux and MacosX -Linux is rather more thoroughly tested compared to os-x. - -to get here, TASM and the propeller generation tools needed to be replaced, -and since the unix filesystem is usually case-sensitive, and CP/M and windows -are not, the cpm tools were made case-insensitive. - -TASM was replaced with uz80as, which implements a subset of TASM and fixes some -bugs. however, I needed to add some functionality to make it build the sources -as they exist in this tree. in particular, one thing to be very careful of is -that TASM is not entirely consistent with respect to the .DS directive. -it's usually a bad idea to mix .DS, .FILL, .DB with .ORG. +This tree now contains makefiles and tools to build on Linux and +MacosX Linux is rather more thoroughly tested compared to os-x. + +To get here, TASM and the propeller generation tools needed to be +replaced, and since the unix filesystem is usually case-sensitive, +and CP/M and windows are not, the cpm tools were made case-insensitive. + +TASM was replaced with uz80as, which implements a subset of TASM and +fixes some bugs. however, I needed to add some functionality to make +it build the sources as they exist in this tree. in particular, one +thing to be very careful of is that TASM is not entirely consistent +with respect to the .DS directive. it's usually a bad idea to mix +.DS, .FILL, .DB with .ORG. + .DS n is best thought of as .ORG $ + n - .ORG changes the memory pointer, but does not change the file output point. - it works a lot more like M80, SLR* .phase + .ORG changes the memory pointer, but does not change the file + output point. It works a lot more like M80, SLR* .PHASE + +It assumes that you have some standard system tools and libraries +installed specifically: gcc, gnu make, libncurses + +To build: + cd to the top directory and type "make". + +By default, this will generate all of the standard configurations of +RomWBW for all platforms. If you want to customize the process to +only build one (or a subset) of the configurations, edit the "makefile" +in the HBIOS directory. If you create your own, custom configuration, +you can add it there as well. + +For MacOS users, you may encounter a failure reading or writing files. +This is caused by protection features in MacOS (at least, in Catalina) +that prevent programs built on your local system (unsigned) from +running. To disable this feature: -it assumes that you have some standard system tools and libraries installed -specifically: gcc, gnu make, libncurses +1) Make sure you exit System Preferences. +2) Open a terminal session and type the following. You will need to + authenticate with an admin account. sudo spctl --master-disable +3) Exit terminal +4) Go into System Preferences and choose Security and Privacy +5) Select the General tab if it isn't already selected +6) You should now see a third selection under + "Allow apps downloaded from:" of Anywhere - select this. +7) Now you can run the build successfully. -to build: - cd to the top directory and type make. +DISCLAIMER: You do this at your own risk. I highly recommend that you +return the settings back to normal immediately after doing a build. -heavy use is made of make's include facility and pattern rules. -the master rule set is in Tools/Makefile.inc. changes here will affect -almost every Makefile, and where exceptions are needed, the overrides are -applied in the lower Makefiles. +Heavy use is made of make's include facility and pattern rules. the +master rule set is in Tools/Makefile.inc. changes here will affect +almost every Makefile, and where exceptions are needed, the overrides +are applied in the lower Makefiles. -these tools can run a windows-linux regression test, where all the binaries are -compared to a baseline windows build. +These tools can run a windows-linux regression test, where all the +binaries are compared to a baseline windows build. Credit: uz80as was written by Jorge Giner Cordero, jorge.giner@hotmail.com, and the original source can be found at https://github.com/jorgicor/uz80as - the propeller tools use bstc and openspin, parallax tools from + the propeller tools use bstc and openspin, parallax tools from http://www.fnarfbargle.com/bst.html https://github.com/parallaxinc/OpenSpin - note that bst is not open source or even currently maintained, so I could + note that bst is not open source or even currently maintained, so I could not generate a version for 64 bit osx. cpmtools were the most current I could find, and it has been hacked to do @@ -45,5 +71,5 @@ Credit: both zx and cpmtools ship with an overly complicated makefile generation system and this is ignored. - this whole linux build framework is the work of Curt Mayer, curt@zen-room.org. + This whole linux build framework is the work of Curt Mayer, curt@zen-room.org. use it for whatever you like; this is not my day job. diff --git a/Source/HBIOS/ide.asm b/Source/HBIOS/ide.asm index c018384a..02f3d813 100644 --- a/Source/HBIOS/ide.asm +++ b/Source/HBIOS/ide.asm @@ -922,36 +922,15 @@ IDE_RESET: PRTS(" RESET$") #ENDIF ; -;#IF (IDEMODE == IDEMODE_MK4) -; - LD A,(IY+IDE_MODE) ; GET MODE - CP IDEMODE_MK4 ; MK4? - JR NZ,IDE_RESET1 ; IF NOT, BYPASS -; - ; USE HARDWARE RESET LINE -#IF (IDETRACE >= 3) - PRTS(" HARD$") -#ENDIF - LD A,$80 ; HIGH BIT OF XAR IS IDE RESET - ;OUT (IDE_IO_XAR),A - CALL IDE_OUT - .DB IDE_REG_XAR - LD DE,2 ; DELAY 32US (SPEC IS >= 25US) - CALL VDELAY - XOR A ; CLEAR RESET BIT - ;OUT (IDE_IO_XAR),A - CALL IDE_OUT - .DB IDE_REG_XAR -; -IDE_RESET1: -; -;#ENDIF -; ;#IF (IDEMODE == IDEMODE_RC) ; - LD A,(IY+IDE_MODE) ; GET MODE - CP IDEMODE_RC ; RC2014? - JR NZ,IDE_RESET2 ; IF NOT, BYPASS + ; OLDER CF CARDS DO NOT SEEM TO SET THE + ; REGISTERS ON RESET, SO HERE WE FAKE THINGS BY + ; SETTING THEM AS A RESET WOULD. SO WE ALWAYS + ; DO THE FAKE. + ;LD A,(IY+IDE_MODE) ; GET MODE + ;CP IDEMODE_RC ; RC2014? + ;JR NZ,IDE_RESET2 ; IF NOT, BYPASS ; ; RC2014 CANNOT ADDRESS THE DEVICE CONTROL PORT AND ; HAS NO WAY TO PERFORM A HARD RESET FROM SOFTWARE, @@ -979,6 +958,33 @@ IDE_RESET2: ; ;#ENDIF ; +;#IF (IDEMODE == IDEMODE_MK4) +; + LD A,(IY+IDE_MODE) ; GET MODE + CP IDEMODE_MK4 ; MK4? + JR NZ,IDE_RESET1 ; IF NOT, BYPASS +; + ; USE HARDWARE RESET LINE +#IF (IDETRACE >= 3) + PRTS(" HARD$") +#ENDIF + LD A,$80 ; HIGH BIT OF XAR IS IDE RESET + ;OUT (IDE_IO_XAR),A + CALL IDE_OUT + .DB IDE_REG_XAR + LD DE,20 ; DELAY 32US (SPEC IS >= 25US) + CALL VDELAY + XOR A ; CLEAR RESET BIT + ;OUT (IDE_IO_XAR),A + CALL IDE_OUT + .DB IDE_REG_XAR + LD DE,20 + CALL VDELAY +; +IDE_RESET1: +; +;#ENDIF +; ;#IF ((IDEMODE != IDEMODE_MK4) & (IDEMODE != IDEMODE_RC)) ; LD A,(IY+IDE_MODE) ; GET MODE diff --git a/Source/HBIOS/ppide.asm b/Source/HBIOS/ppide.asm index 637ed394..a15d35a5 100644 --- a/Source/HBIOS/ppide.asm +++ b/Source/HBIOS/ppide.asm @@ -974,6 +974,27 @@ PPIDE_RESET: CALL PPIDE_PRTPREFIX PRTS(" RESET$") #ENDIF +; + ; OLDER CF CARDS DO NOT SEEM TO SET THE + ; REGISTERS ON RESET, SO HERE WE FAKE THINGS BY + ; SETTING THEM AS A RESET WOULD +#IF (IDETRACE >= 3) + PRTS(" FAKE$") +#ENDIF + XOR A + ;OUT (IDE_IO_CYLLO),A + CALL PPIDE_OUT + .DB PPIDE_REG_CYLLO + ;OUT (IDE_IO_CYLHI),A + CALL PPIDE_OUT + .DB PPIDE_REG_CYLHI + INC A + ;OUT (IDE_IO_COUNT),A + CALL PPIDE_OUT + .DB PPIDE_REG_COUNT + ;OUT (IDE_IO_SECT),A + CALL PPIDE_OUT + .DB PPIDE_REG_SECT ; ; SETUP PPI TO READ LD A,PPIDE_DIR_READ ; SET DATA BUS DIRECTION TO READ diff --git a/Source/Images/d_cpm22/u0/KERMIT.COM b/Source/Images/d_cpm22/u0/KERMIT.COM new file mode 100644 index 0000000000000000000000000000000000000000..b24df273d412a4a4428797ea2b9e4814a94acf0d GIT binary patch literal 29440 zcmeHwdt6(`mA`mDY-C^K7ud#E=o(`Iwz=S!4B{y;<{>QbGqG6^0%Hjz1OzZKcAB)w zwoNvvn{AS&O`J6ArcFY&O@BD)uUY$ECu^y>-8x;TzotpM?q{LDmbR&#I8A9+{(aBf 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in the system. --- Source/HBIOS/Config/SCZ180_130.asm | 2 +- Source/HBIOS/acia.asm | 2 +- Source/HBIOS/cfg_rcz180.asm | 7 +- Source/HBIOS/sio.asm | 107 ++++++++++++++--------------- 4 files changed, 59 insertions(+), 59 deletions(-) diff --git a/Source/HBIOS/Config/SCZ180_130.asm b/Source/HBIOS/Config/SCZ180_130.asm index cf84881b..13fc2f03 100644 --- a/Source/HBIOS/Config/SCZ180_130.asm +++ b/Source/HBIOS/Config/SCZ180_130.asm @@ -43,7 +43,7 @@ DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; -UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) +UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) diff --git a/Source/HBIOS/acia.asm b/Source/HBIOS/acia.asm index 2e030a76..f4f95b45 100644 --- a/Source/HBIOS/acia.asm +++ b/Source/HBIOS/acia.asm @@ -584,7 +584,7 @@ ACIA_DEVICE: ; ACIA_DETECT: LD A,(IY+3) ; BASE PORT ADDRESS - ADD A,$20 ; OFFSET (SEE ABOVE) + ADD A,$18 ; OFFSET (SEE ABOVE) LD C,A ; PUT IN C FOR I/O CALL ACIA_DETECT2 ; CHECK IT JR Z,ACIA_DETECT1 ; FOUND IT, RECORD IT diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm index eede7d4c..f8a3dab6 100644 --- a/Source/HBIOS/cfg_rcz180.asm +++ b/Source/HBIOS/cfg_rcz180.asm @@ -97,7 +97,7 @@ SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0ACFG .EQU SER_115200_8N1 ; SER_115200_8N1 0A: SERIAL LINE CONFIG +SIO0ACFG .EQU SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG @@ -105,7 +105,7 @@ SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1ACFG .EQU SER_115200_8N1 ; SER_115200_8N1 1A: SERIAL LINE CONFIG +SIO1ACFG .EQU SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO1BCLK .EQU 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO1BCFG .EQU SER_115200_8N1 ; SIO 1B: SERIAL LINE CONFIG @@ -169,7 +169,8 @@ PPIDE1A8BIT .EQU FALSE ; PPIDE 1A (MASTER): 8 BIT XFER PPIDE1B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2BASE .EQU $00 ; PPIDE 2: PPI REGISTERS BASE ADR PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER -PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER; +PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER +; SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT] SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY diff --git a/Source/HBIOS/sio.asm b/Source/HBIOS/sio.asm index ae4129df..eceea12d 100644 --- a/Source/HBIOS/sio.asm +++ b/Source/HBIOS/sio.asm @@ -69,33 +69,33 @@ SIO0B_DAT .EQU SIO0BASE + $05 ; #IF (SIOCNT >= 2) ; -#IF (SIO1MODE == SIOMODE_STD) + #IF (SIO1MODE == SIOMODE_STD) SIO1A_CMD .EQU SIO1BASE + $01 SIO1A_DAT .EQU SIO1BASE + $00 SIO1B_CMD .EQU SIO1BASE + $03 SIO1B_DAT .EQU SIO1BASE + $02 -#ENDIF + #ENDIF ; -#IF (SIO1MODE == SIOMODE_RC) + #IF (SIO1MODE == SIOMODE_RC) SIO1A_CMD .EQU SIO1BASE + $00 SIO1A_DAT .EQU SIO1BASE + $01 SIO1B_CMD .EQU SIO1BASE + $02 SIO1B_DAT .EQU SIO1BASE + $03 -#ENDIF + #ENDIF ; -#IF (SIO1MODE == SIOMODE_SMB) + #IF (SIO1MODE == SIOMODE_SMB) SIO1A_CMD .EQU SIO1BASE + $02 SIO1A_DAT .EQU SIO1BASE + $00 SIO1B_CMD .EQU SIO1BASE + $03 SIO1B_DAT .EQU SIO1BASE + $01 -#ENDIF + #ENDIF ; -#IF (SIO1MODE == SIOMODE_ZP) + #IF (SIO1MODE == SIOMODE_ZP) SIO1A_CMD .EQU SIO1BASE + $06 SIO1A_DAT .EQU SIO1BASE + $04 SIO1B_CMD .EQU SIO1BASE + $07 SIO1B_DAT .EQU SIO1BASE + $05 -#ENDIF + #ENDIF ; #ENDIF ; @@ -138,23 +138,23 @@ SIO_PREINIT2: OR A ; SET FLAGS JR Z,SIO_PREINIT3 ; IF ZERO, NO SIO DEVICES, ABORT ; -#IF (INTMODE == 1) + #IF (INTMODE == 1) ; ADD IM1 INT CALL LIST ENTRY LD HL,SIO_INT ; GET INT VECTOR CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST -#ENDIF + #ENDIF ; -#IF (INTMODE == 2) + #IF (INTMODE == 2) ; SETUP IM2 VECTORS LD HL,SIO_INT0 LD (SIO0_IVT),HL ; IVT INDEX ; -#IF (SIOCNT >= 2) + #IF (SIOCNT >= 2) LD HL,SIO_INT1 LD (SIO1_IVT),HL ; IVT INDEX -#ENDIF + #ENDIF ; -#ENDIF + #ENDIF ; #ENDIF ; @@ -220,12 +220,12 @@ SIO_INT: CALL NZ,SIO_INT0 ; CALL IF CARD EXISTS RET NZ ; DONE IF INT HANDLED ; -#IF (SIOCNT >= 2) + #IF (SIOCNT >= 2) ; CHECK/HANDLE SECOND CARD (SIO1) IF IT EXISTS LD A,(SIO1A_CFG + 1) ; GET SIO TYPE FOR FIRST CHANNEL OF SECOND SIO OR A ; SET FLAGS CALL NZ,SIO_INT1 ; CALL IF CARD EXISTS -#ENDIF + #ENDIF ; RET ; DONE ; @@ -239,7 +239,7 @@ SIO_INT0: LD IY,SIO0B_CFG ; POINT TO SIO0B CFG JR SIO_INTRCV ; TRY TO RECEIVE FROM IT AND RETURN ; -#IF (SIOCNT >= 2) + #IF (SIOCNT >= 2) ; SIO_INT1: ; INTERRUPT HANDLER FOR SECOND SIO (SIO1) @@ -249,7 +249,7 @@ SIO_INT1: LD IY,SIO1B_CFG ; POINT TO SIO1B CFG JR SIO_INTRCV ; TRY TO RECEIVE FROM IT AND RETURN ; -#ENDIF + #ENDIF ; ; HANDLE INT FOR A SPECIFIC CHANNEL ; BASED ON UNIT CFG POINTED TO BY IY @@ -518,30 +518,30 @@ SIO_INITDEV1: LD C,75 ; DIVIDE BY 75 LIKE BAUD RATE CALL DIV32X8 ; HL NOW HAS (CLK / 75) ; - #IF (SIODEBUG) +#IF (SIODEBUG) PRTS(" CLK75=$") CALL PRTHEX32 - #ENDIF +#ENDIF ; ; SCALE DOWN THE 32 BIT VALUE TO FIT IN 16 BITS KEEPING ; TRACK OF THE NUMBER OF BITS SHIFTED OUT IN B - LD B,0 + LD B,0 ; SHIFT COUNTER SIO_INITDEV1A: - LD A,D - OR E - JR Z,SIO_INITDEV1B - SRL D - RR E - RR H - RR L - INC B - JR SIO_INITDEV1A + LD A,D ; TEST MSB + OR E ; ... FOR ZERO + JR Z,SIO_INITDEV1B ; IF SO, DONE + SRL D ; 32 BIT RIGHT SHIFT + RR E ; ... + RR H ; ... + RR L ; ... + INC B ; INCREMENT SHIFT COUNTER + JR SIO_INITDEV1A ; AND LOOP SIO_INITDEV1B: ; - #IF (SIODEBUG) +#IF (SIODEBUG) PRTS(" CLK=$") CALL PRTHEX32 - #ENDIF +#ENDIF ; POP DE ; RECOVER INCOMING TARGET CFG PUSH DE ; RESAVE IT @@ -557,38 +557,38 @@ SIO_INITDEV1B: LD DE,1 ; USE 1 FOR ENCODING CONSTANT CALL DECODE ; DE:HL := BAUD RATE, ERRORS IGNORED ; - #IF (SIODEBUG) +#IF (SIODEBUG) PRTS(" BAUD75=$") CALL PRTHEX32 - #ENDIF +#ENDIF ; ; SCALE DOWN CLK BY SAME AMOUNT AS BAUD RATE POP BC ; RESTORE BITS TO SHIFT - LD A,B - OR A - JR Z,SIO_INITDEV1D + LD A,B ; PUT IN ACCUM + OR A ; TEST FOR ZERO + JR Z,SIO_INITDEV1D ; IF ZERO, NO SHIFT, SKIP SIO_INITDEV1C: - SRL D - RR E - RR H - RR L - DJNZ SIO_INITDEV1C + SRL D ; 32 BIT RIGHT SHIFT + RR E ; ... + RR H ; ... + RR L ; ... + DJNZ SIO_INITDEV1C ; LOOP UNTIL DONE SHIFTING SIO_INITDEV1D: ; - #IF (SIODEBUG) +#IF (SIODEBUG) PRTS(" BAUD=$") CALL PRTHEX32 - #ENDIF +#ENDIF ; POP DE ; RECOVER CLOCK EX DE,HL ; SWAP CLOCK & BAUD FOR DIV ; *** HANDLE DIVIDE BY ZERO??? *** CALL DIV16 ; BC := HL/DE == TARGET DIVISOR ; - #IF (SIODEBUG) +#IF (SIODEBUG) PRTS(" DIV=$") CALL PRTHEXWORD - #ENDIF +#ENDIF ; ; NOW THAT WE HAVE THE TARGET BAUD RATE DIVISOR, WE WILL ; ATTEMPT TO IMPLEMENT IT. THE SIO ITSELF CAN APPLY @@ -636,14 +636,14 @@ SIO_INITDEV4: ; POP DE ; RESTORE DE = SERIAL CONFIG ; - #IF (SIODEBUG) +#IF (SIODEBUG) PUSH BC PUSH HL POP BC PRTS(" CTCDIV=$") CALL PRTHEXWORD POP BC - #ENDIF +#ENDIF ; #IF (CTCENABLE) LD A,(IY+13) ; GET CTC CHANNEL @@ -871,8 +871,7 @@ SIO_INITLEN .EQU $ - SIO_INITVALS ; SIO_INITDEFS: .DB $00, $18 ; WR0: CHANNEL RESET CMD - ;.DB $04, $C4 ; WR4: CLK BAUD PARITY STOP BIT - .DB $04, $44 ; WR4: CLK BAUD PARITY STOP BIT + .DB $04, $C4 ; WR4: CLK BAUD PARITY STOP BIT .DB $01, SIO_WR1VAL ; WR1: INTERRUPT STYLE .DB $02, $00 ; WR2: IM2 VEC OFFSET .DB $03, $E1 ; WR3: 8 BIT RCV, CTS/DCD AUTO, RX ENABLE @@ -1039,10 +1038,10 @@ SIO_MAP .DB 0 ; CHIP PRESENCE BITMAP SIO0A_RCVBUF .EQU 0 SIO0B_RCVBUF .EQU 0 ; -#IF (SIOCNT >= 2) + #IF (SIOCNT >= 2) SIO1A_RCVBUF .EQU 0 SIO1B_RCVBUF .EQU 0 -#ENDIF + #ENDIF ; #ELSE ; @@ -1060,7 +1059,7 @@ SIO0B_HD .DW SIO0B_BUF ; BUFFER HEAD POINTER SIO0B_TL .DW SIO0B_BUF ; BUFFER TAIL POINTER SIO0B_BUF .FILL SIO_BUFSZ,0 ; RECEIVE RING BUFFER ; -#IF (SIOCNT >= 2) + #IF (SIOCNT >= 2) ; ; SIO1 CHANNEL A RECEIVE BUFFER SIO1A_RCVBUF: @@ -1076,7 +1075,7 @@ SIO1B_HD .DW SIO1B_BUF ; BUFFER HEAD POINTER SIO1B_TL .DW SIO1B_BUF ; BUFFER TAIL POINTER SIO1B_BUF .FILL SIO_BUFSZ,0 ; RECEIVE RING BUFFER ; -#ENDIF + #ENDIF ; #ENDIF ; From 4ce0e1f657bc5fc46e84d5951089de9cd049707a Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Mon, 20 Apr 2020 13:08:49 -0700 Subject: [PATCH 006/339] Handle CTC anomaly Small update to accommodate CTC behavior that occurs when the CTC trigger is more than half the CTC clock. --- Source/HBIOS/sio.asm | 52 +++++++++++++++++++++++++++++++++++++++++++- Source/ver.inc | 2 +- Source/ver.lib | 2 +- 3 files changed, 53 insertions(+), 3 deletions(-) diff --git a/Source/HBIOS/sio.asm b/Source/HBIOS/sio.asm index eceea12d..631cb605 100644 --- a/Source/HBIOS/sio.asm +++ b/Source/HBIOS/sio.asm @@ -589,6 +589,55 @@ SIO_INITDEV1D: PRTS(" DIV=$") CALL PRTHEXWORD #ENDIF +; +#IF (CTCENABLE) +; + LD A,(IY+13) ; GET CTC CHANNEL + INC A ; $FF -> 0 + JR Z,SIO_ADJDONE ; NO CTC CHANNEL, BYPASS +; + ; HERE WE NEED TO ACCOUNT FOR A SPECIAL CASE OF THE CTC. + ; IF THE CTC TRIGGER RATE IS MORE THAN HALF OF THE CTC CLOCK, + ; THEN THE CTC WILL ONLY COUNT EVERY OTHER TRIGGER PULSE. + ; IN THIS SITUATION, WE NEED TO CUT THE DIVISOR IN HALF + ; TO ACCOUNT FOR THIS. + ; FOR NOW, I JUST TEST TO SEE IF THE CTC TRIGGER AND THE CTC + ; CLOCK ARE THE SAME. I DOUBT THERE IS ANY REALISTIC + ; SCENARIO WHERE THE TRIGGER IS GREATER THAN HALF THE + ; CLOCK BUT ALSO NOT EQUAL TO THE CLOCK. + ; I DON'T DEFINITELY KNOW THE CTC CLOCK FREQ, BUT ASSUME IT + ; IS THE SAME AS THE CPU CLOCK, WHICH IT SHOULD BE. + ; FINALLY, NOTE THAT I AM COMPARING AGAINST THE CPU SPEED + ; DECLARED IN THE BUILD CONFIG, NOT THE DYNAMICALLY MEASURED + ; CPU SPEED. THIS IS CORRECT BECAUSE WE ARE REALLY TRYING TO + ; TEST IF THE CPU CLOCK AND THE TRIGGER FREQ ARE THE *SAME*. + ; ONLY COMPARING THE HIGH WORD VALUES, THAT SHOULD BE ENOUGH. +; + LD A,$FF & (CPUOSC >> 24) ; HIGH BYTE OF CPU FREQ + CP (IY+12) ; CP TO HIGH BYTE OF TRG + JR NZ,SIO_ADJDONE ; IF NE, SKIP ADJUSTMENT + LD A,$FF & (CPUOSC >> 16) ; HIGH BYTE OF CPU FREQ + CP (IY+11) ; CP TO HIGH BYTE OF TRG + JR NZ,SIO_ADJDONE ; IF NE, SKIP ADJUSTMENT +; + SRL B ; RIGHT SHIFT HL + RR C ; ... TO DIVIDE BY 2 + JR NC,SIO_ADJDONE ; DONE IF NO CARRY +; + ; IF CARRY, RESULTANT CIVISOR IS UNWORKABLE + POP DE ; POP STACK + JR SIO_INITFAIL ; AND FAIL + + ; *** CHECK FOR CARRY??? *** +; + #IF (SIODEBUG) + PRTS(" DIV=$") + CALL PRTHEXWORD + #ENDIF +; +SIO_ADJDONE: +; +#ENDIF ; ; NOW THAT WE HAVE THE TARGET BAUD RATE DIVISOR, WE WILL ; ATTEMPT TO IMPLEMENT IT. THE SIO ITSELF CAN APPLY @@ -628,7 +677,7 @@ SIO_INITDEV2: OR B ; ZERO BITS TO SHIFT? JR Z,SIO_INITDEV4 ; BYPASS SHIFTING IF SO SIO_INITDEV3: - RR H ; SHIFT HL RIGHT BY + SRL H ; SHIFT HL RIGHT BY RR L ; ONE BIT DJNZ SIO_INITDEV3 ; UNTIL ALL BITS DONE SIO_INITDEV4: @@ -646,6 +695,7 @@ SIO_INITDEV4: #ENDIF ; #IF (CTCENABLE) +; LD A,(IY+13) ; GET CTC CHANNEL INC A ; $FF -> 0 JR Z,SIO_NOCTC ; NO CTC CHANNEL, BYPASS diff --git a/Source/ver.inc b/Source/ver.inc index 6dd55708..000b172a 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,4 +2,4 @@ #DEFINE RMN 1 #DEFINE RUP 0 #DEFINE RTP 0 -#DEFINE BIOSVER "3.1-pre.5" +#DEFINE BIOSVER "3.1-pre.6" diff --git a/Source/ver.lib b/Source/ver.lib index 9d060b23..ec372ea7 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 1 rup equ 0 rtp equ 0 biosver macro - db "3.1-pre.5" + db "3.1-pre.6" endm From c6eee95a5524a0e6022d8a4476cb6c2000f11475 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Mon, 20 Apr 2020 14:14:56 -0700 Subject: [PATCH 007/339] Update acia.asm Updated ACIA detection to use primary ACIA port instead of phantom port. --- Source/HBIOS/acia.asm | 7 ------- 1 file changed, 7 deletions(-) diff --git a/Source/HBIOS/acia.asm b/Source/HBIOS/acia.asm index f4f95b45..9adeb985 100644 --- a/Source/HBIOS/acia.asm +++ b/Source/HBIOS/acia.asm @@ -576,15 +576,8 @@ ACIA_DEVICE: ; ; ACIA DETECTION ROUTINE ; -; NOTE THAT THE ACIA MODULES ONLY QUALIFY ADDRESS BITS 7 & 6, SO -; THE ACIA'S TWO PORTS APPEAR REPEATEDLY OVER AN ADDRESS RANGE -; OF $40 STARTING FROM THE REAL BASE PORT. -; WE TAKE ADVANTAGE OF THIS TO AVOID CONFLICTING WITH SIO -; AND COMPACT FLASH MODULES DURING DETECTION PROBES. -; ACIA_DETECT: LD A,(IY+3) ; BASE PORT ADDRESS - ADD A,$18 ; OFFSET (SEE ABOVE) LD C,A ; PUT IN C FOR I/O CALL ACIA_DETECT2 ; CHECK IT JR Z,ACIA_DETECT1 ; FOUND IT, RECORD IT From 1b3e85f0fb1db54d03b7c6b5c25d9d77e3badcf9 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Mon, 20 Apr 2020 14:39:46 -0700 Subject: [PATCH 008/339] Update acia.asm Fix bug in ACIA detection. Thanks Alan! --- Source/HBIOS/acia.asm | 1 + 1 file changed, 1 insertion(+) diff --git a/Source/HBIOS/acia.asm b/Source/HBIOS/acia.asm index 9adeb985..4f7f0ee8 100644 --- a/Source/HBIOS/acia.asm +++ b/Source/HBIOS/acia.asm @@ -598,6 +598,7 @@ ACIA_DETECT2: RET NZ ; RETURN IF NOT ZERO LD A,$02 ; CLEAR MASTER RESET OUT (C),A ; DO IT + IN A,(C) ; GET STATUS AGAIN ; CHECK FOR EXPECTED BITS: ; TDRE=1, DCD & CTS = 0 AND %00001110 ; BIT MASK FOR "STABLE" BITS From aac4a51f23cca34b0a384ca9fc50a4c421cd7553 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Mon, 20 Apr 2020 14:59:27 -0700 Subject: [PATCH 009/339] MacOS Build Improvement Build script updated to improve compatibility with MacOS. Credit to Fredrik Axtelius for this. --- Source/HBIOS/Build.sh | 2 +- Source/ver.inc | 2 +- Source/ver.lib | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Source/HBIOS/Build.sh b/Source/HBIOS/Build.sh index 86f8c05a..e9ff4abd 100755 --- a/Source/HBIOS/Build.sh +++ b/Source/HBIOS/Build.sh @@ -65,7 +65,7 @@ romfmt=wbw_rom${romsize} outdir=../../Binary echo "creating empty rom disk of size $romsize in $blankfile" -LANG=en_US.US-ASCII tr '\000' '\345' build.inc ; RomWBW Configured for $platform $config $timestamp diff --git a/Source/ver.inc b/Source/ver.inc index 000b172a..2fc8980c 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,4 +2,4 @@ #DEFINE RMN 1 #DEFINE RUP 0 #DEFINE RTP 0 -#DEFINE BIOSVER "3.1-pre.6" +#DEFINE BIOSVER "3.1-pre.7" diff --git a/Source/ver.lib b/Source/ver.lib index ec372ea7..575efc46 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 1 rup equ 0 rtp equ 0 biosver macro - db "3.1-pre.6" + db "3.1-pre.7" endm From 92a3501c818de7b277bb31d6cf8a5ed1220045e2 Mon Sep 17 00:00:00 2001 From: Dean Netherton Date: Sun, 1 Mar 2020 14:21:47 +1100 Subject: [PATCH 010/339] HBIOS Makefile - use env vars for target Allow build ROM targets to be restricted to just one platform thru use of ENV vars: ROM_PLATFORM - if defined to a known platform, only this platform is build - defaults to std config ROM_CONFIG - sets the desired platform config - defaults to std if the above ENVs are not defined, builds all ROMs --- Source/HBIOS/Makefile | 44 ++++++++++++++++++++++--------------------- 1 file changed, 23 insertions(+), 21 deletions(-) diff --git a/Source/HBIOS/Makefile b/Source/HBIOS/Makefile index 6ee90216..316fb027 100644 --- a/Source/HBIOS/Makefile +++ b/Source/HBIOS/Makefile @@ -1,25 +1,27 @@ -OBJECTS = +ifndef ROM_CONFIG + ROM_CONFIG=std +endif -ifeq (1,1) -OBJECTS += DYNO_std.rom DYNO_std.com -OBJECTS += EZZ80_std.rom EZZ80_std.com -OBJECTS += MK4_std.rom MK4_std.com -OBJECTS += N8_std.rom N8_std.com -OBJECTS += RCZ180_ext.rom RCZ180_ext.com -OBJECTS += RCZ180_nat.rom RCZ180_nat.com -OBJECTS += RCZ80_kio.rom RCZ80_kio.com -OBJECTS += RCZ80_mt.rom RCZ80_mt.com -OBJECTS += RCZ80_std.rom RCZ80_std.com -OBJECTS += SBC_simh.rom SBC_simh.com -OBJECTS += SBC_std.rom SBC_std.com -OBJECTS += SCZ180_126.rom SCZ180_126.com -OBJECTS += SCZ180_130.rom SCZ180_130.com -OBJECTS += SCZ180_131.rom SCZ180_131.com -OBJECTS += UNA_std.rom -OBJECTS += ZETA_std.rom ZETA_std.com -OBJECTS += ZETA2_std.rom ZETA2_std.com +ifdef ROM_PLATFORM + OBJECTS = ${ROM_PLATFORM}_${ROM_CONFIG}.rom ${ROM_PLATFORM}_${ROM_CONFIG}.com else -OBJECTS += ZETA2_std.rom ZETA2_std.com + OBJECTS += DYNO_std.rom DYNO_std.com + OBJECTS += EZZ80_std.rom EZZ80_std.com + OBJECTS += MK4_std.rom MK4_std.com + OBJECTS += N8_std.rom N8_std.com + OBJECTS += RCZ180_ext.rom RCZ180_ext.com + OBJECTS += RCZ180_nat.rom RCZ180_nat.com + OBJECTS += RCZ80_kio.rom RCZ80_kio.com + OBJECTS += RCZ80_mt.rom RCZ80_mt.com + OBJECTS += RCZ80_std.rom RCZ80_std.com + OBJECTS += SBC_simh.rom SBC_simh.com + OBJECTS += SBC_std.rom SBC_std.com + OBJECTS += SCZ180_126.rom SCZ180_126.com + OBJECTS += SCZ180_130.rom SCZ180_130.com + OBJECTS += SCZ180_131.rom SCZ180_131.com + OBJECTS += UNA_std.rom + OBJECTS += ZETA_std.rom ZETA_std.com + OBJECTS += ZETA2_std.rom ZETA2_std.com endif MOREDIFF = camel80.bin game.bin hbios_rom.bin nascom.bin prefix.bin usrrom.bin \ @@ -27,7 +29,7 @@ MOREDIFF = camel80.bin game.bin hbios_rom.bin nascom.bin prefix.bin usrrom.bin \ eastaegg.bin hbios_img.bin imgpad.bin osimg.bin tastybasic.bin \ game.bin usrrom.bin -SUBDIRS = +SUBDIRS = DEST = ../../Binary TOOLS =../../Tools OTHERS = *.img *.rom *.com *.bin *.z80 cpm.sys zsys.sys Build.inc RomDisk.tmp font*.asm *.dat From 8198da1aa4069670d44a66d0c76001e6ad664b07 Mon Sep 17 00:00:00 2001 From: Dean Netherton Date: Tue, 17 Mar 2020 19:56:48 +1100 Subject: [PATCH 011/339] Added some more gitignores --- .gitignore | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/.gitignore b/.gitignore index 4782ed5c..32d51319 100644 --- a/.gitignore +++ b/.gitignore @@ -49,6 +49,9 @@ Source/Images/blankhd Source/Prop/Spin/ParPortProp.list Source/Prop/Spin/PropIO.list Source/Prop/Spin/PropIO2.list +Source/Prop/ParPortProp.list +Source/Prop/PropIO.list +Source/Prop/PropIO2.list Source/ZPM3/bnkbios3.spr Source/ZPM3/gencpm.com Source/ZPM3/gencpm.com @@ -94,3 +97,6 @@ Source/ZPM3/gencpm.com Source/ZPM3/startzpm.com Source/ZPM3/zccp.com Source/ZPM3/zpmldr.com +Source/ZPM3/genbnk.dat + +Source/ZSDOS/zsdos.err \ No newline at end of file From 8c08f55d8f9a4aedc59fa14481b9795a8a91e376 Mon Sep 17 00:00:00 2001 From: Dean Netherton Date: Sat, 21 Mar 2020 22:16:50 +1100 Subject: [PATCH 012/339] Whitespace changes (crlf) --- Source/HBIOS/cvdu.asm | 56 +++++++++++++++++++++---------------------- Source/HBIOS/util.asm | 30 +++++++++++------------ Source/HBIOS/vdu.asm | 56 +++++++++++++++++++++---------------------- Source/HBIOS/vga.asm | 56 +++++++++++++++++++++---------------------- 4 files changed, 99 insertions(+), 99 deletions(-) diff --git a/Source/HBIOS/cvdu.asm b/Source/HBIOS/cvdu.asm index 9ee98c40..96272b4f 100644 --- a/Source/HBIOS/cvdu.asm +++ b/Source/HBIOS/cvdu.asm @@ -112,11 +112,11 @@ CVDU_VDAQRY: LD HL,0 ; EXTRACTION OF CURRENT BITMAP DATA NOT SUPPORTED YET XOR A ; SIGNAL SUCCESS RET - + CVDU_VDARES: LD A,$0E ; ATTRIBUTE IS STANDARD WHITE ON BLACK LD (CVDU_ATTR),A ; SAVE IT - + LD DE,0 ; ROW = 0, COL = 0 CALL CVDU_XY ; SEND CURSOR TO TOP LEFT LD A,' ' ; BLANK THE SCREEN @@ -124,7 +124,7 @@ CVDU_VDARES: CALL CVDU_FILL ; DO IT LD DE,0 ; ROW = 0, COL = 0 CALL CVDU_XY ; SEND CURSOR TO TOP LEFT - + XOR A RET @@ -133,15 +133,15 @@ CVDU_VDADEV: LD E,0 ; E := PHYSICAL UNIT IS ALWAYS ZERO XOR A ; SIGNAL SUCCESS RET - + CVDU_VDASCS: CALL PANIC ; NOT IMPLEMENTED (YET) - + CVDU_VDASCP: CALL CVDU_XY ; SET CURSOR POSITION XOR A ; SIGNAL SUCCESS RET - + CVDU_VDASAT: ; INCOMING IS: -----RUB (R=REVERSE, U=UNDERLINE, B=BLINK) ; TRANSFORM TO: -RUB---- @@ -158,7 +158,7 @@ CVDU_VDASAT: LD (CVDU_ATTR),A ; AND SAVE THE RESULT XOR A ; SIGNAL SUCCESS RET - + CVDU_VDASCO: ; INCOMING IS: IBGRIBGR (I=INTENSITY, B=BLUE, G=GREEN, R=RED) ; TRANSFORM TO: ----RGBI (DISCARD BACKGROUND COLOR IN HIGH NIBBLE) @@ -175,13 +175,13 @@ CVDU_VDASCO1: LD (CVDU_ATTR),A ; AND SAVE THE RESULT XOR A ; SIGNAL SUCCESS RET - + CVDU_VDAWRC: LD A,E ; CHARACTER TO WRITE GOES IN A CALL CVDU_PUTCHAR ; PUT IT ON THE SCREEN XOR A ; SIGNAL SUCCESS RET - + CVDU_VDAFIL: LD A,E ; FILL CHARACTER GOES IN A EX DE,HL ; FILL LENGTH GOES IN DE @@ -197,7 +197,7 @@ CVDU_VDACPY: POP BC ; RECOVER LENGTH IN BC LD DE,(CVDU_POS) ; PUT DEST IN DE JP CVDU_BLKCPY ; DO A BLOCK COPY - + CVDU_VDASCR: LD A,E ; LOAD E INTO A OR A ; SET FLAGS @@ -246,7 +246,7 @@ CVDU_WRX: ;---------------------------------------------------------------------- ; READ M8563 REGISTERS ; CVDU_RD READS VDU REGISTER SPECIFIED IN C AND RETURNS VALUE IN A -; CVDU_RDX READS VDU REGISTER PAIR SPECIFIED BY C, C+1 +; CVDU_RDX READS VDU REGISTER PAIR SPECIFIED BY C, C+1 ; AND RETURNS VALUE IN HL ;---------------------------------------------------------------------- ; @@ -317,7 +317,7 @@ CVDU_CRTINIT1: ; ASSUMES THAT VDU RAM SIZE IS SET FOR 64KB ABOVE ; A. WRITE ZERO TO ADDRESS $0000 ; B. WRITE NON-ZERO TO ADDRESS $0100 -; C. CHECK THE VALUE IN ADDRESS $0000; IF IT CHANGED, +; C. CHECK THE VALUE IN ADDRESS $0000; IF IT CHANGED, ; 16K DRAM CHIPS INSTALLED; IF NOT, 64K DRAM CHIPS INSTALLED ; IF 16KB RAM DETECTED, ADJUST VDU REGISTERS APPROPRIATELY ; @@ -367,7 +367,7 @@ CVDU_LOADFONT: LD (CVDU_STACK),SP ; SAVE STACK LD HL,(CVDU_STACK) ; AND SHIFT IT LD DE,$2000 ; DOWN 4KB TO - CCF ; CREATE A + CCF ; CREATE A SBC HL,DE ; DECOMPRESSION BUFFER LD SP,HL ; HL POINTS TO BUFFER EX DE,HL ; START OF STACK BUFFER @@ -475,19 +475,19 @@ CVDU_FILL: POP DE ; RECOVER FILL COUNT LD A,(CVDU_ATTR) ; SET ATTRIBUTE VALUE FOR ATTRIBUTE FILL JR CVDU_FILL1 ; DO ATTRIBUTE FILL AND RETURN - + CVDU_FILL1: LD B,A ; SAVE REQUESTED FILL VALUE - + ; CHECK FOR VALID FILL LENGTH LD A,D ; LOAD D OR E ; OR WITH E RET Z ; BAIL OUT IF LENGTH OF ZERO SPECIFIED - + ; POINT TO BUFFER LOCATION TO START FILL LD C,18 ; UPDATE ADDRESS REGISTER PAIR CALL CVDU_WRX ; DO IT - + ; SET MODE TO BLOCK WRITE LD C,24 ; BLOCK MODE CONTROL REGISTER CALL CVDU_RD ; GET CURRENT VALUE @@ -499,7 +499,7 @@ CVDU_FILL1: LD C,31 ; DATA REGISTER CALL CVDU_WR ; DO IT DEC DE ; REFLECT ONE CHARACTER WRITTEN - + ; LOOP TO DO BULK WRITE (UP TO 255 BYTES PER LOOP) EX DE,HL ; NOW USE HL FOR COUNT LD C,30 ; BYTE COUNT REGISTER @@ -527,7 +527,7 @@ CVDU_SCROLL: LD A,' ' ; CHAR VALUE TO FILL NEW EXPOSED LINE LD HL,0 ; SOURCE ADDRESS OF CHARACER BUFFER CALL CVDU_SCROLL1 ; SCROLL CHARACTER BUFFER - + ; SCROLL THE ATTRIBUTE BUFFER LD A,(CVDU_ATTR) ; ATTRIBUTE VALUE TO FILL NEW EXPOSED LINE LD HL,$800 ; SOURCE ADDRESS OF ATTRIBUTE BUFFER @@ -535,7 +535,7 @@ CVDU_SCROLL: CVDU_SCROLL1: PUSH AF ; SAVE FILL VALUE FOR NOW - + ; SET MODE TO BLOCK COPY LD C,24 ; BLOCK MODE CONTROL REGISTER CALL CVDU_RD ; GET CURRENT VALUE @@ -563,13 +563,13 @@ CVDU_SCROLL2: ; LOOP TILL DONE WITH ALL LINES DJNZ CVDU_SCROLL2 ; REPEAT FOR ALL LINES - + ; SET MODE TO BLOCK WRITE TO CLEAR NEW LINE EXPOSED BY SCROLL LD C,24 ; BLOCK MODE CONTROL REGISTER CALL CVDU_RD ; GET CURRENT VALUE AND $7F ; CLEAR BIT 7 FOR FILL MODE CALL CVDU_WR ; DO IT - + ; SET VALUE TO WRITE POP AF ; RESTORE THE FILL VALUE PASSED IN LD C,31 ; DATA REGISTER @@ -579,7 +579,7 @@ CVDU_SCROLL2: LD A,CVDU_COLS - 1 ; SET WRITE COUNT TO LINE LENGTH - 1 (1 CHAR ALREADY WRITTEN) LD C,30 ; WORD COUNT REGISTER CALL CVDU_WR ; DO IT - + RET ; ;---------------------------------------------------------------------- @@ -591,7 +591,7 @@ CVDU_RSCROLL: LD A,' ' ; CHAR VALUE TO FILL NEW EXPOSED LINE LD HL,$0 + ((CVDU_ROWS - 1) * CVDU_COLS) ; SOURCE ADDRESS OF CHARACER BUFFER CALL CVDU_RSCROLL1 ; SCROLL CHARACTER BUFFER - + ; SCROLL THE ATTRIBUTE BUFFER LD A,(CVDU_ATTR) ; ATTRIBUTE VALUE TO FILL NEW EXPOSED LINE LD HL,$800 + ((CVDU_ROWS - 1) * CVDU_COLS) ; SOURCE ADDRESS OF ATTRIBUTE BUFFER @@ -599,7 +599,7 @@ CVDU_RSCROLL: CVDU_RSCROLL1: PUSH AF ; SAVE FILL VALUE FOR NOW - + ; SET MODE TO BLOCK COPY LD C,24 ; BLOCK MODE CONTROL REGISTER CALL CVDU_RD ; GET CURRENT VALUE @@ -629,7 +629,7 @@ CVDU_RSCROLL2: CALL CVDU_WR ; DO IT DJNZ CVDU_RSCROLL2 ; REPEAT FOR ALL LINES - + ; SET FILL DESTINATION (USING HL PASSED IN) LD C,18 ; UPDATE ADDRESS (DESTINATION) REGISTER CALL CVDU_WRX ; DO IT @@ -639,7 +639,7 @@ CVDU_RSCROLL2: CALL CVDU_RD ; GET CURRENT VALUE AND $7F ; CLEAR BIT 7 FOR FILL MODE CALL CVDU_WR ; DO IT - + ; SET VALUE TO WRITE POP AF ; RESTORE THE FILL VALUE PASSED IN LD C,31 ; DATA REGISTER @@ -649,7 +649,7 @@ CVDU_RSCROLL2: LD A,CVDU_COLS - 1 ; SET WRITE COUNT TO LINE LENGTH - 1 (1 CHAR ALREADY WRITTEN) LD C,30 ; WORD COUNT REGISTER CALL CVDU_WR ; DO IT - + RET ; ;---------------------------------------------------------------------- diff --git a/Source/HBIOS/util.asm b/Source/HBIOS/util.asm index 3d9ee4d5..f647a5a4 100644 --- a/Source/HBIOS/util.asm +++ b/Source/HBIOS/util.asm @@ -295,7 +295,7 @@ DB_CONTD: JP DB_BLKRD ; DB_END: - RET + RET ; ; PRINT THE nTH STRING IN A LIST OF STRINGS WHERE EACH IS TERMINATED BY $ ; C REGISTER CONTAINS THE INDEX TO THE STRING TO BE DISPLAYED. @@ -322,7 +322,7 @@ PRTIDXMSK1: POP BC ; ; PRINT THE nTH STRING IN A LIST OF STRINGS WHERE EACH IS TERMINATED BY $ -; A REGISTER DEFINES THE nTH STRING IN THE LIST TO PRINT AND DE POINTS +; A REGISTER DEFINES THE nTH STRING IN THE LIST TO PRINT AND DE POINTS ; TO THE START OF THE STRING LIST. ; ; SLOW BUT IMPROVES CODE SIZE, READABILITY AND ELIMINATES THE NEED HAVE @@ -410,7 +410,7 @@ XREGDMP: LD A,'@' CALL COUT POP AF - + PUSH BC LD BC,(REGDMP_PC) CALL PRTHEXWORD ; PC @@ -434,7 +434,7 @@ XREGDMP: CALL PC_COLON LD BC,(REGDMP_SP) CALL PRTHEXWORD ; SP - + CALL PC_COLON PUSH IX POP BC @@ -454,7 +454,7 @@ XREGDMP: POP AF ;LD SP,(RD_STKSAV) ; BACK TO ORIGINAL STACK FRAME - + JP $FFFF ; RETURN, $FFFF IS DYNAMICALLY UPDATED REGDMP_RET .EQU $-2 ; RETURN ADDRESS GOES HERE ; @@ -666,8 +666,8 @@ DELAY_INIT: #IF (BIOS == BIOS_UNA) LD C,$F8 ; UNA BIOS GET PHI FUNCTION RST 08 ; RETURNS SPEED IN HZ IN DE:HL - LD B,4 ; DIVIDE MHZ IN DE:HL BY 100000H -DELAY_INIT0: + LD B,4 ; DIVIDE MHZ IN DE:HL BY 100000H +DELAY_INIT0: SRL D ; ... TO GET APPROX CPU SPEED IN RR E ; ...MHZ. THROW AWAY HL, AND DJNZ DELAY_INIT0 ; ...RIGHT SHIFT DE BY 4. @@ -772,13 +772,13 @@ DIV16: DIV16A: SCF RL C - RLA - ADC HL,HL - SBC HL,DE - JR NC,DIV16B - ADD HL,DE - DEC C -DIV16B: + RLA + ADC HL,HL + SBC HL,DE + JR NC,DIV16B + ADD HL,DE + DEC C +DIV16B: DJNZ DIV16A ; LOOP AS NEEDED LD B,A ; AC -> BC LD A,H ; SET ZF @@ -985,7 +985,7 @@ SUB32: RET ; ; INC32 (HL) -; INCREMENT 32 BIT BINARY AT ADDRESS +; INCREMENT 32 BIT BINARY AT ADDRESS ; INC32HL: INC (HL) diff --git a/Source/HBIOS/vdu.asm b/Source/HBIOS/vdu.asm index bc888aa5..b8cbec60 100644 --- a/Source/HBIOS/vdu.asm +++ b/Source/HBIOS/vdu.asm @@ -47,40 +47,40 @@ VDU_BLNK .EQU VDU_NOBL ; DEFAULT BLINK RATE TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER ; #IF (VDUSIZ=V80X24) -DLINES .EQU 24 +DLINES .EQU 24 DROWS .EQU 80 DSCANL .EQU 10 #ENDIF #IF (VDUSIZ=V80X25) -DLINES .EQU 25 +DLINES .EQU 25 DROWS .EQU 80 DSCANL .EQU 10 #ENDIF #IF (VDUSIZ=V80X30) -DLINES .EQU 30 +DLINES .EQU 30 DROWS .EQU 80 DSCANL .EQU 8 #ENDIF #IF (VDUSIZ=V80X25B) -DLINES .EQU 25 +DLINES .EQU 25 DROWS .EQU 80 DSCANL .EQU 12 #ENDIF #IF (VDUSIZ=V80X24B) -DLINES .EQU 24 +DLINES .EQU 24 DROWS .EQU 80 DSCANL .EQU 12 #ENDIF ; #IF VDU_CSTY=VDU_BLOK -VDU_R10 .EQU (VDU_BLNK + $00) +VDU_R10 .EQU (VDU_BLNK + $00) VDU_R11 .EQU DSCANL-1 #ENDIF ; #IF VDU_CSTY=VDU_ULIN -VDU_R10 .EQU (VDU_BLNK + DSCANL-1) +VDU_R10 .EQU (VDU_BLNK + DSCANL-1) VDU_R11 .EQU DSCANL-1 -#ENDIF +#ENDIF ; ;====================================================================== ; VDU DRIVER - INITIALIZATION @@ -127,7 +127,7 @@ VDU_INIT1: XOR A ; SIGNAL SUCCESS RET -; +; ;====================================================================== ; VDU DRIVER - VIDEO DISPLAY ADAPTER (VDA) FUNCTIONS ;====================================================================== @@ -165,7 +165,7 @@ VDU_VDAQRY: LD HL,0 ; EXTRACTION OF CURRENT BITMAP DATA NOT SUPPORTED XOR A ; SIGNAL SUCCESS RET - + VDU_VDARES: LD DE,0 LD (VDU_OFFSET),DE @@ -202,26 +202,26 @@ VDU_VDASCS: XOR A RET - + VDU_VDASCP: CALL VDU_XY XOR A RET - + VDU_VDASAT: XOR A RET - + VDU_VDASCO: XOR A RET - + VDU_VDAWRC: LD A,E CALL VDU_PUTCHAR XOR A RET - + VDU_VDAFIL: LD A,E ; FILL CHARACTER GOES IN A EX DE,HL ; FILL LENGTH GOES IN DE @@ -236,9 +236,9 @@ VDU_VDACPY: POP BC ; RECOVER LENGTH IN BC LD DE,(VDU_POS) ; PUT DEST IN DE JP VDU_BLKCPY ; DO A BLOCK COPY - + RET - + VDU_VDASCR: LD A,E ; LOAD E INTO A OR A ; SET FLAGS @@ -293,7 +293,7 @@ VDU_WRREGX: ;---------------------------------------------------------------------- ; READ SY6845 REGISTERS ; VDU_RDREG READS VDU REGISTER SPECIFIED IN C AND RETURNS VALUE IN A -; VDU_RDREGX READS VDU REGISTER PAIR SPECIFIED BY C, C+1 +; VDU_RDREGX READS VDU REGISTER PAIR SPECIFIED BY C, C+1 ; AND RETURNS VALUE IN HL ;---------------------------------------------------------------------- ; @@ -398,13 +398,13 @@ VDU_PUTCHAR: INC HL ; NEW CURSOR POSITION LD C,14 ; CURSOR POSITION REGISTER PAIR CALL VDU_WRREGX ; DO IT - + LD A,31 ; PREP VDU FOR DATA R/W OUT (VDU_REG),A CALL VDU_WAITRDY ; WAIT FOR VDU TO BE READY LD A,B OUT (VDU_RAMWR),A ; OUTPUT CHAR TO VDU - + RET ; ;---------------------------------------------------------------------- @@ -431,7 +431,7 @@ VDU_FILL: OUT (VDU_REG),A VDU_FILL1: LD A,D ; CHECK NUMBER OF FILL CHARS LEFT - OR E + OR E RET Z ; ALL DONE, RETURN CALL VDU_WAITRDY ; WAIT FOR VDU TO BE READY LD A,B @@ -481,7 +481,7 @@ VDU_BLKCPY1: ; VIDEO RAM -> BUFFER COPY LOOP OUT (VDU_REG),A ; DO IT LD HL,VDU_BUF ; HL POINTS TO WORK BUFFER LD C,VDU_RAMWR ; LOAD C WITH VDU WRITE REGISTER - + VDU_BLKCPY2: ; BUFFER -> VIDEO RAM COPY LOOP CALL VDU_WAITRDY ; WAIT FOR VDU OUTI ; WRITE BYTE, DEC B, INC HL @@ -501,7 +501,7 @@ VDU_SCROLL: LD (VDU_OFFSET),HL LD C,12 CALL VDU_WRREGX - + ; FILL EXPOSED LINE LD HL,(VDU_POS) PUSH HL @@ -512,7 +512,7 @@ VDU_SCROLL: CALL VDU_FILL POP HL LD (VDU_POS),HL - + ; ADJUST CURSOR POSITION AND RETURN LD HL,(VDU_OFFSET) LD DE,(VDU_POS) @@ -543,7 +543,7 @@ VDU_RSCROLL: CALL VDU_FILL POP HL LD (VDU_POS),HL - + ; ADJUST CURSOR POSITION AND RETURN LD HL,(VDU_OFFSET) LD DE,(VDU_POS) @@ -566,7 +566,7 @@ VDU_BUF .FILL 256,0 ; COPY BUFFER ; CCIR 625/50 VERSION (USED IN MOST OF THE WORLD) ; JUMPER K1 2-3, K2 1-2 FOR 2MHz CHAR CLOCK ; -; THE CCIR 625/50 TELEVISION STANDARD HAS 625 LINES INTERLACED AT 50 FIELDS PER SECOND. THIS WORKS +; THE CCIR 625/50 TELEVISION STANDARD HAS 625 LINES INTERLACED AT 50 FIELDS PER SECOND. THIS WORKS ; OUT AS 50 FIELDS OF 312.5 LINES PER SECOND NON-INTERLACED AS USED HERE. ; HORIZONTAL LINE WIDTH IS 64uS. FOR A 2 MHz CHARACTER CLOCK (R0+1)/2000000 = 64uS ; NEAREST NUMBER OF LINES IS 312 = (R4+1) * (R9+1) + R5. @@ -658,7 +658,7 @@ VDU_INIT6845: .DB 00CH ; R3 SYNC WIDTHS .DB 19H ; R4 VERTICAL TOTAL (TOTAL CHARS IN A FRAME -1) (312/DLINES)-1 .DB 00H ; R5 VERTICAL TOTAL ADJUST (312-(R4+1)*DSCANL) - .DB DLINES ; R6 VERTICAL DISPLAY + .DB DLINES ; R6 VERTICAL DISPLAY .DB 019H ; R7 VERTICAL SYNC (DLINES .. R4) .DB 078H ; R8 MODE .DB DSCANL-1 ; R9 SCAN LINE (LINES PER CHAR AND SPACING -1) @@ -680,7 +680,7 @@ VDU_INIT6845: .DB 00CH ; R3 SYNC WIDTHS .DB 19H ; R4 VERTICAL TOTAL (TOTAL CHARS IN A FRAME -1) (312/DLINES)-1 .DB 00H ; R5 VERTICAL TOTAL ADJUST (312-(R4+1)*DSCANL) - .DB DLINES ; R6 VERTICAL DISPLAY + .DB DLINES ; R6 VERTICAL DISPLAY .DB 018H ; R7 VERTICAL SYNC (DLINES .. R4) .DB 078H ; R8 MODE .DB DSCANL-1 ; R9 SCAN LINE (LINES PER CHAR AND SPACING -1) diff --git a/Source/HBIOS/vga.asm b/Source/HBIOS/vga.asm index 5a285376..8bbd8d85 100644 --- a/Source/HBIOS/vga.asm +++ b/Source/HBIOS/vga.asm @@ -70,12 +70,12 @@ VGA_89BIT .EQU VGA_8BIT #ENDIF ; #IF VGA_CSTY=VGA_BLOK -VGA_R10 .EQU (VGA_BLNK + $00) +VGA_R10 .EQU (VGA_BLNK + $00) VGA_R11 .EQU VGA_SCANL-1 #ENDIF ; #IF VGA_CSTY=VGA_ULIN -VGA_R10 .EQU (VGA_BLNK + VGA_SCANL-1) +VGA_R10 .EQU (VGA_BLNK + VGA_SCANL-1) VGA_R11 .EQU VGA_SCANL-1 #ENDIF ; @@ -85,7 +85,7 @@ TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER ; ; DRIVER UTILIZES THE MULTIPLE DISPLAY WINDOW FEATURE OF THE CRTC TO ACCOMPLISH ; FULL SCREEN SCROLLING WITHOUT THE NEED TO MOVE DISPLAY RAM BYTES. -; +; ; SCREEN 1 IMPLICITLY STARTS AT PHYSICAL ROW 0 ; SCREEN 1 RAM ADDRESS POINTER POINTS TO SCREEN OFFSET (R12/R13) ; SCREEN 2 ROW DEFINES WHERE BUFFER BYTE 0 WILL BE DISPLAYED (R18) @@ -179,13 +179,13 @@ VGA_VDAQRY: LD HL,0 ; EXTRACTION OF CURRENT BITMAP DATA NOT SUPPORTED YET XOR A ; SIGNAL SUCCESS RET - + VGA_VDARES: LD A,$07 ; ATTRIBUTE IS STANDARD WHITE ON BLACK LD (VGA_ATTR),A ; SAVE IT XOR A ; ZERO (REVERSE, UNDERLINE, BLINK) LD (VGA_RUB),A ; SAVE IT - + LD DE,0 ; ROW = 0, COL = 0 CALL VGA_XY ; SEND CURSOR TO TOP LEFT LD A,' ' ; BLANK THE SCREEN @@ -193,10 +193,10 @@ VGA_VDARES: CALL VGA_FILL ; DO IT LD DE,0 ; ROW = 0, COL = 0 CALL VGA_XY ; SEND CURSOR TO TOP LEFT - + LD HL,$0404 | VGA_89BIT; SET VIDEO ENABLE BIT CALL VGA_SETCFG ; DO IT - + XOR A RET @@ -205,15 +205,15 @@ VGA_VDADEV: LD E,0 ; E := PHYSICAL UNIT IS ALWAYS ZERO XOR A ; SIGNAL SUCCESS RET - + VGA_VDASCS: CALL PANIC ; NOT IMPLEMENTED (YET) - + VGA_VDASCP: CALL VGA_XY ; SET CURSOR POSITION XOR A ; SIGNAL SUCCESS RET - + VGA_VDASAT: ; INCOMING IS: -----RUB (R=REVERSE, U=UNDERLINE, B=BLINK) ; @@ -222,7 +222,7 @@ VGA_VDASAT: LD A,E LD (VGA_RUB),A ; SAVE IT JR VGA_VDASCO2 ; IMPLEMENT SETTING - + VGA_VDASCO: ; INCOMING IS: IBGRIBGR (I=INTENSITY, B=BLUE, G=GREEN, R=RED) ; TRANSFORM TO: -RGBIRGB (DISCARD INTENSITY BIT IN HIGH NIBBLE) @@ -269,13 +269,13 @@ VGA_VDASCO2: VGA_VDASCO3: XOR A ; SIGNAL SUCCESS RET - + VGA_VDAWRC: LD A,E ; CHARACTER TO WRITE GOES IN A CALL VGA_PUTCHAR ; PUT IT ON THE SCREEN XOR A ; SIGNAL SUCCESS RET - + VGA_VDAFIL: LD A,E ; FILL CHARACTER GOES IN A EX DE,HL ; FILL LENGTH GOES IN DE @@ -291,7 +291,7 @@ VGA_VDACPY: POP BC ; RECOVER LENGTH IN BC LD DE,(VGA_POS) ; PUT DEST IN DE JP VGA_BLKCPY ; DO A BLOCK COPY - + VGA_VDASCR: LD A,E ; LOAD E INTO A OR A ; SET FLAGS @@ -522,7 +522,7 @@ VGA_LOADFONT: LD (VGA_STACK),SP ; SAVE STACK LD HL,(VGA_STACK) ; AND SHIFT IT LD DE,$2000 ; DOWN 4KB TO - CCF ; CREATE A + CCF ; CREATE A SBC HL,DE ; DECOMPRESSION BUFFER LD SP,HL ; HL POINTS TO BUFFER EX DE,HL ; START OF STACK BUFFER @@ -543,7 +543,7 @@ VGA_LOADFONT2: INC HL ; NEXT FONT BYTE INC DE ; NEXT MEM BYTE DJNZ VGA_LOADFONT2 - + LD BC,16-VGA_SCANL ; MOVE TO NEXT EX DE,HL ; 16 BYTE ADD HL,BC ; CHARACTER @@ -586,7 +586,7 @@ VGA_XY2IDX: CALL MULT8 ; MULTIPLY TO GET ROW OFFSET LD E,A ; GET COLUMN BACK ADD HL,DE ; ADD IT IN - + LD DE,(VGA_OFF) ; SCREEN OFFSET ADD HL,DE ; ADJUST ; @@ -651,7 +651,7 @@ VGA_FILL: LD HL,(VGA_POS) ; GET CURRENT POSITION SLA L ; MULTIPLY BY 2 RL H ; ... 2 BYTES PER CHAR - + VGA_FILL1: ; FILL ONE POSITION (CHAR & ATTR) LD C,VGA_HI ; C := VGA ADR HI @@ -669,7 +669,7 @@ VGA_FILL1: #ENDIF LD A,(VGA_ATTR) ; GET CUR ATTR OUT (C),A ; OUTPUT ATTR - + ; CHECK COUNT DEC DE ; DECREMENT COUNT LD A,D ; TEST FOR @@ -755,7 +755,7 @@ VGA_SCROLL6: LD (VGA_POS),HL ; SAVE IT LD C,14 ; CURSOR 1 POS REG CALL VGA_REGWRX ; COMMIT - + RET ; ;---------------------------------------------------------------------- @@ -822,13 +822,13 @@ VGA_BLKCPY: SLA C RL B PUSH BC ; COUNT ==> TOS - + ; ADJUST HL & DE FOR SCREEN OFFSET/WRAP CALL VGA_BLKCPY4 ; DO HL EX DE,HL ; SWAP CALL VGA_BLKCPY4 ; DO OTHER EX DE,HL ; SWAP BACK - + VGA_BLKCPY1: #IF (VGA_NICE) CALL VGA_WAITSB ; WAIT FOR RETRACE @@ -842,7 +842,7 @@ VGA_BLKCPY1: INC C ; C := VGA_DATA IN A,(C) ; A := (HL) - ; COPY TO DESTINATION + ; COPY TO DESTINATION LD C,VGA_HI ; C := VGA_HI OUT (C),D ; VGA_HI := SOURCE HI (H) INC C ; C := VGA_LO @@ -945,7 +945,7 @@ REGS_VGA: .DB 18,-1 ; S2 ROW - 1 .DB 27,12 ; VERT SYNC POS ADJ .DB 30,$01 | $08 ; CTL 1, 2 WINDOWS & ENABLE R27 VSYNC FINE ADJ - + .DB $FF ; END MARKER #ENDIF #IF (VGASIZ=V80X30) @@ -966,7 +966,7 @@ REGS_VGA: .DB 10,VGA_R10 ; CURSOR START & CURSOR BLINK .DB 11,VGA_R11 ; CURSOR END .DB 12,0 ; SCRN 1 START (HI) - .DB 13,0 ; SCRN 1 START (LO) + .DB 13,0 ; SCRN 1 START (LO) .DB 18,-1 ; S2 ROW - 1 .DB 27,0 ; VERT SYNC POS ADJ .DB 30,$01 | $08 ; CTL 1, 2 WINDOWS & ENABLE R27 VSYNC FINE ADJ @@ -990,7 +990,7 @@ REGS_VGA: .DB 10,VGA_R10 ; CURSOR START & CURSOR BLINK .DB 11,VGA_R11 ; CURSOR END .DB 12,0 ; SCRN 1 START (HI) - .DB 13,0 ; SCRN 1 START (LO) + .DB 13,0 ; SCRN 1 START (LO) .DB 18,-1 ; S2 ROW - 1 .DB 27,0 ; VERT SYNC POS ADJ .DB 30,$01 | $08 ; CTL 1, 2 WINDOWS & ENABLE R27 VSYNC FINE ADJ @@ -998,7 +998,7 @@ REGS_VGA: #ENDIF #IF (VGASIZ=V80X60) ;=============================================================================== -; 80x60X8 60hz REGISTER VALUES +; 80x60X8 60hz REGISTER VALUES ;=============================================================================== ; REGS_VGA: @@ -1014,7 +1014,7 @@ REGS_VGA: .DB 10,VGA_R10 ; CURSOR START & CURSOR BLINK .DB 11,VGA_R11 ; CURSOR END .DB 12,0 ; SCRN 1 START (HI) - .DB 13,0 ; SCRN 1 START (LO) + .DB 13,0 ; SCRN 1 START (LO) .DB 18,-1 ; S2 ROW - 1 .DB 27,0 ; VERT SYNC POS ADJ .DB 30,$01 | $08 ; CTL 1, 2 WINDOWS & ENABLE R27 VSYNC FINE ADJ From d4ebc44a98019315e2c9c29d0152cb6f79d614ed Mon Sep 17 00:00:00 2001 From: Dean Netherton Date: Sat, 21 Mar 2020 22:26:04 +1100 Subject: [PATCH 013/339] HBIOS: Force the assembly to fail for vdu drivers if function table count is not correct --- Source/HBIOS/cvdu.asm | 1 + Source/HBIOS/tms.asm | 1 + Source/HBIOS/vdu.asm | 1 + Source/HBIOS/vga.asm | 1 + 4 files changed, 4 insertions(+) diff --git a/Source/HBIOS/cvdu.asm b/Source/HBIOS/cvdu.asm index 96272b4f..4b51dfa2 100644 --- a/Source/HBIOS/cvdu.asm +++ b/Source/HBIOS/cvdu.asm @@ -96,6 +96,7 @@ CVDU_FNTBL: .DW KBD_READ #IF (($ - CVDU_FNTBL) != (VDA_FNCNT * 2)) .ECHO "*** INVALID CVDU FUNCTION TABLE ***\n" + FAIL #ENDIF CVDU_VDAINI: diff --git a/Source/HBIOS/tms.asm b/Source/HBIOS/tms.asm index 4759cf61..832e99e0 100644 --- a/Source/HBIOS/tms.asm +++ b/Source/HBIOS/tms.asm @@ -136,6 +136,7 @@ TMS_FNTBL: #ENDIF #IF (($ - TMS_FNTBL) != (VDA_FNCNT * 2)) .ECHO "*** INVALID TMS FUNCTION TABLE ***\n" + FAIL #ENDIF TMS_VDAINI: diff --git a/Source/HBIOS/vdu.asm b/Source/HBIOS/vdu.asm index b8cbec60..1c2a2ca1 100644 --- a/Source/HBIOS/vdu.asm +++ b/Source/HBIOS/vdu.asm @@ -150,6 +150,7 @@ VDU_FNTBL: .DW PPK_READ #IF (($ - VDU_FNTBL) != (VDA_FNCNT * 2)) .ECHO "*** INVALID VDU FUNCTION TABLE ***\n" + FAIL #ENDIF VDU_VDAINI: diff --git a/Source/HBIOS/vga.asm b/Source/HBIOS/vga.asm index 8bbd8d85..dde15dae 100644 --- a/Source/HBIOS/vga.asm +++ b/Source/HBIOS/vga.asm @@ -163,6 +163,7 @@ VGA_FNTBL: .DW KBD_READ #IF (($ - VGA_FNTBL) != (VDA_FNCNT * 2)) .ECHO "*** INVALID VGA FUNCTION TABLE ***\n" + FAIL #ENDIF VGA_VDAINI: From 74c7d865d75b33f9df9e8641d35ce58b3d2f8a61 Mon Sep 17 00:00:00 2001 From: Dean Netherton Date: Tue, 21 Apr 2020 16:37:29 +1000 Subject: [PATCH 014/339] Whitespace: trailing whitespaces --- Source/CBIOS/cbios.asm | 142 ++++++++++++++++++++-------------------- Source/HBIOS/romldr.asm | 2 +- 2 files changed, 72 insertions(+), 72 deletions(-) diff --git a/Source/CBIOS/cbios.asm b/Source/CBIOS/cbios.asm index 5f627426..47c2ca47 100644 --- a/Source/CBIOS/cbios.asm +++ b/Source/CBIOS/cbios.asm @@ -251,10 +251,10 @@ DEVMAP: ; +----8+-----8+------8+-+-16+-----8+------8+-+-16+ +-----8+------8+-+-16+ ; | | | ; +--------------------+ +-> [DPH] +-> [DPH] -; | -; V-----+-------+-------+-------+--------+-----+-----+-----+ -; DPH: | XLT | 0000H | 0000H | 0000H | DIRBUF | DPB | CSV | ALV | -; +---16+-----16+-----16+-----16+------16+-+-16+-+-16+-+-16+ +; | +; V-----+-------+-------+-------+--------+-----+-----+-----+ +; DPH: | XLT | 0000H | 0000H | 0000H | DIRBUF | DPB | CSV | ALV | +; +---16+-----16+-----16+-----16+------16+-+-16+-+-16+-+-16+ ; (ONE DPH PER DRIVE) | | | ; | | +----------+ ; | | | @@ -263,9 +263,9 @@ DEVMAP: ; | +-------------+ +-------------+ ; | (CSZ BYTES) (ASZ BYTES) ; | -; +-----+-----+-----V-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+ -; DPB: | CSZ | ASZ | BLS | SPT | BSH | BLM | EXM | DSM | DRM | AL0 | AL1 | CKS | OFF | -; +---16+---16+----8+---16+----8+----8+----8+---16+---16+----8+----8+---16+---16+ +; +-----+-----+-----V-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+ +; DPB: | CSZ | ASZ | BLS | SPT | BSH | BLM | EXM | DSM | DRM | AL0 | AL1 | CKS | OFF | +; +---16+---16+----8+---16+----8+----8+----8+---16+---16+----8+----8+---16+---16+ ; |<--- PREFIX ---->|<------------------- STANDARD CP/M DPB ------------------->| ; ;================================================================================================== @@ -353,7 +353,7 @@ WBOOT: LD DE,(BNKBIOS) ; UBIOS_PAGE (SEE PAGES.INC) RST 08 ; DO IT PUSH DE ; SAVE PREVIOUS BANK - + LD HL,(CCPBUF) ; ADDRESS OF CCP BUF IN BIOS MEM LD DE,CCP_LOC ; ADDRESS IN HI MEM OF CCP LD BC,CCP_SIZ ; SIZE OF CCP @@ -383,11 +383,11 @@ WBOOT: LD BC,6 XOR A CALL FILL -; +; CALL RESCPM ; RESET CPM JR GOCPM ; THEN OFF TO CP/M WE GO... ; -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ RESCPM: ; LD A,$C3 ; LOAD A WITH 'JP' INSTRUCTION (USED BELOW) @@ -406,7 +406,7 @@ RESCPM: ; LD ($0038),A ; LD HL,PANIC ; PANIC ROUTINE ADDRESS ; LD ($0039),HL ; POKE IT - + ; CALL 5 -> INVOKE BDOS LD ($0005),A ; JP OPCODE AT $0005 LD HL,BDOS_LOC + 6 ; GET BDOS ENTRY ADDRESS @@ -427,7 +427,7 @@ RESCPM: ; RET ; -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ GOCPM: ; ; ENSURE VALID DISK AND JUMP TO CCP @@ -444,7 +444,7 @@ GOCCP: LD C,A ; SETUP C WITH CURRENT USER/DISK, ASSUME IT IS OK JP CCP_LOC ; JUMP TO COMMAND PROCESSOR ; -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ GOMON: CALL PANIC ; @@ -460,7 +460,7 @@ GOMON: ; LD BC,MON_SIZ ; LDIR ; CALL RAMPGZ - + ; ; JUMP TO MONITOR WARM ENTRY ; JP MON_UART ; @@ -479,7 +479,7 @@ CONST: LD HL,CIOST ; HL = ADDRESS OF COMPLETION ROUTINE JR CONIO ; -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ CONIN: ; CONSOLE CHARACTER INTO REGISTER A ; @@ -487,7 +487,7 @@ CONIN: LD HL,CIOIN ; HL = ADDRESS OF COMPLETION ROUTINE JR CONIO -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ CONOUT: ; CONSOLE CHARACTER OUTPUT FROM REGISTER C ; @@ -496,7 +496,7 @@ CONOUT: LD E,C ; E = CHARACTER TO SEND ; JR CONIO ; COMMENTED OUT, FALL THROUGH OK ; -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ CONIO: ; LD A,(IOBYTE) ; GET IOBYTE @@ -504,8 +504,8 @@ CONIO: ;OR $00 ; PUT LOGICAL DEVICE IN BITS 2-3 (CON:=$00, RDR:=$04, PUN:=$08, LST:=$0C JR CIO_DISP ; -;__________________________________________________________________________________________________ -LIST: +;__________________________________________________________________________________________________ +LIST: ; LIST CHARACTER FROM REGISTER C ; LD B,BF_CIOOUT ; B = FUNCTION @@ -513,7 +513,7 @@ LIST: LD E,C ; E = CHARACTER TO SEND JR LISTIO ; -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ LISTST: ; RETURN LIST STATUS (0 IF NOT READY, 1 IF READY) ; @@ -521,7 +521,7 @@ LISTST: LD HL,CIOST ; HL = ADDRESS OF COMPLETION ROUTINE ;JR LISTIO ; COMMENTED OUT, FALL THROUGH OK ; -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ LISTIO: ; LD A,(IOBYTE) ; GET IOBYTE @@ -531,7 +531,7 @@ LISTIO: OR $0C ; PUT LOGICAL DEVICE IN BITS 2-3 (CON:=$00, RDR:=$04, PUN:=$08, LST:=$0C JR CIO_DISP ; -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ PUNCH: ; PUNCH CHARACTER FROM REGISTER C ; @@ -540,7 +540,7 @@ PUNCH: LD E,C ; E = CHARACTER TO SEND ;JR PUNCHIO ; COMMENTED OUT, FALL THROUGH OK ; -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ PUNCHIO: ; LD A,(IOBYTE) ; GET IOBYTE @@ -552,7 +552,7 @@ PUNCHIO: OR $08 ; PUT LOGICAL DEVICE IN BITS 2-3 (CON:=$00, RDR:=$04, PUN:=$08, LST:=$0C JR CIO_DISP ; -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ READER: ; READ CHARACTER INTO REGISTER A FROM READER DEVICE ; @@ -560,7 +560,7 @@ READER: LD HL,CIOIN ; HL = ADDRESS OF COMPLETION ROUTINE JR READERIO ; -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ READERST: ; RETURN READER STATUS (0 IF NOT READY, 1 IF READY) ; @@ -568,7 +568,7 @@ READERST: LD HL,CIOST ; HL = ADDRESS OF COMPLETION ROUTINE ; JR READERIO ; COMMENTED OUT, FALL THROUGH OK ; -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ READERIO: ; LD A,(IOBYTE) ; GET IOBYTE @@ -578,20 +578,20 @@ READERIO: OR $04 ; PUT LOGICAL DEVICE IN BITS 2-3 (CON:=$00, RDR:=$04, PUN:=$08, LST:=$0C JR CIO_DISP ; -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ CIOIN: ; COMPLETION ROUTINE FOR CHARACTER INPUT FUNCTIONS ; LD A,E ; MOVE CHARACTER RETURNED TO A RET ; FALL THRU ;; -;;__________________________________________________________________________________________________ +;;__________________________________________________________________________________________________ ;CIOOUT: ;; COMPLETION ROUTINE FOR CHARACTER OUTPUT FUNCTIONS ;; ; RET ; -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ CIOST: ; COMPLETION ROUTINE FOR CHARACTER STATUS FUNCTIONS (IST/OST) ; @@ -621,7 +621,7 @@ CIO_DISP: LD HL,DEVMAP ; HL = ADDRESS OF DEVICE MAP CALL ADDHLA ; ADD OFFSET - + LD A,(HL) ; LOOKUP DEVICE CODE #IFDEF PLTUNA LD C,B ; MOVE FUNCTION TO C @@ -695,13 +695,13 @@ SELDSK: ; JP DSK_SELECT ; -;__________________________________________________________________________________________________ +;__________________________________________________________________________________________________ HOME: ; SELECT TRACK 0 (BC = 0) AND FALL THRU TO SETTRK #IF DSKTRACE CALL PRTHOME #ENDIF -; +; LD A,(HSTWRT) ; CHECK FOR PENDING WRITE OR A ; SET FLAGS JR NZ,HOMED ; BUFFER IS DIRTY @@ -764,7 +764,7 @@ BLKRES: XOR A LD (HSTACT),A ; BUFFER NO LONGER VALID LD (UNACNT),A ; CLEAR UNALLOC COUNT - + RET ;__________________________________________________________________________________________________ ; @@ -812,7 +812,7 @@ BLKRW: XOR A ; ZERO TO A LD (WRTYPE),A ; SET WRITE TYPE = 0 (WRT_ALC) TO ENSURE READ OCCURS LD (UNACNT),A ; SET UNACNT TO ABORT SEQ WRITE PROCESSING - + JR BLKRW4 ; GO TO I/O BLKRW1: @@ -821,7 +821,7 @@ BLKRW1: LD A,(WRTYPE) ; GET WRITE TYPE CP WRT_UNA ; IS IT WRITE TO UNALLOC? JR NZ,BLKRW2 ; NOPE, BYPASS - + ; INITIALIZE START OF SEQUENTIAL WRITING TO UNALLOCATED BLOCK ; AND THEN TREAT SUBSEQUENT PROCESSING AS A NORMAL WRITE CALL UNA_INI ; INITIALIZE SEQUENTIAL WRITE TRACKING @@ -835,11 +835,11 @@ BLKRW2: CALL UNA_CHK ; CHECK FOR CONTINUATION OF SEQ WRITES TO UNALLOCATED BLOCK JR NZ,BLKRW3 ; NOPE, ABORT - + ; WE MATCHED EVERYTHING, TREAT AS WRITE TO UNALLOCATED BLOCK LD A,WRT_UNA ; WRITE TO UNALLOCATED LD (WRTYPE),A ; SAVE WRITE TYPE - + CALL UNA_INC ; INCREMENT SEQUENTIAL WRITE TRACKING JR BLKRW4 ; PROCEED TO I/O PROCESSING @@ -870,16 +870,16 @@ BLKRW4: ; IMPLEMENT THE TRANSLATED VALUES CALL BLK_SAV ; SAVE XLAT VALUES: XLT... -> HST... - + ; IF WRITE TO UNALLOC BLOCK, BYPASS READ, LEAVES BUFFER UNDEFINED LD A,(WRTYPE) CP 2 JR Z,BLKRW6 - + ; DO THE ACTUAL READ CALL DSK_READ ; READ PHYSICAL SECTOR INTO BUFFER JR Z,BLKRW6 ; GOOD READ, CONTINUE - + ; IF READ FAILED, RESET (DE)BLOCKING ALGORITHM AND RETURN ERROR PUSH AF ; SAVE ERROR STATUS CALL BLKRES ; INVALIDATE (DE)BLOCKING BUFFER @@ -896,7 +896,7 @@ BLKRW6: CALL BLK_DEBLOCK ; EXTRACT DATA FROM BLOCK XOR A ; NO ERROR RET ; ALL DONE - + BLKRW7: ; THIS IS A WRITE OPERATION, INSERT DATA INTO BLOCK CALL BLK_BLOCK ; INSERT DATA INTO BLOCK @@ -904,7 +904,7 @@ BLKRW7: ; MARK THE BUFFER AS WRITTEN LD A,TRUE ; BUFFER DIRTY = TRUE LD (HSTWRT),A ; SAVE IT - + ; CHECK WRITE TYPE, IF WRT_DIR, FORCE THE PHYSICAL WRITE LD A,(WRTYPE) ; GET WRITE TYPE CP WRT_DIR ; 1 = DIRECTORY WRITE @@ -974,24 +974,24 @@ UNA_INC: ; DECREMENT THE BLOCK RECORD COUNT LD HL,UNACNT DEC (HL) - + ; INCREMENT THE SECTOR LD DE,(UNASEC) INC DE LD (UNASEC),DE - + ; CHECK FOR END OF TRACK LD HL,(UNASPT) XOR A SBC HL,DE RET NZ - + ; HANDLE END OF TRACK LD (UNASEC),HL ; SECTOR BACK TO 0 (NOTE: HL=0 AT THIS POINT) LD HL,(UNATRK) ; GET CURRENT TRACK INC HL ; BUMP IT LD (UNATRK),HL ; SAVE IT - + RET #ELSE ; @@ -1022,15 +1022,15 @@ BLKRW1: CALL BLK_DEBLOCK ; EXTRACT DATA FROM BLOCK XOR A ; NO ERROR RET ; ALL DONE - + BLKRW2: CALL BLK_BLOCK ; INSERT DATA INTO BLOCK CALL DSK_WRITE ; WRITE PHYSICAL SECTOR FROM BUFFER RET NZ ; BAIL OUT ON ERROR - + LD A,TRUE ; BUFFER IS NOW VALID LD (HSTACT),A ; SAVE IT - + XOR A ; ALL IS WELL, SET RETURN CODE 0 RET ; RETURN #ENDIF @@ -1247,7 +1247,7 @@ DSK_SELECT: LD E,(HL) ; DEREFERENCE HL... INC HL ; INTO DE... LD D,(HL) ; DE = ADDRESS OF DESIRED DPB -; +; ; PLUG DPB INTO THE ACTIVE DPH LD HL,(SEKDPH) LD BC,10 ; OFFSET OF DPB IN DPH @@ -1272,7 +1272,7 @@ DSK_STATUS: ; C HAS CPM DRIVE, LOOKUP UNIT AND CHECK FOR INVALID DRIVE CALL DSK_GETINF ; B := UNIT RET NZ ; INVALID DRIVE ERROR - + ; VALID DRIVE, DISPATCH TO DRIVER LD C,D ; C := UNIT LD B,BF_DIOSTATUS ; B := FUNCTION: STATUS @@ -1360,7 +1360,7 @@ CHS: ; ; FLOPPY SPECIFIC TRANSLATION ASSUMES FLOPPY IS DOUBLE-SIDED AND ; USES LOW ORDER BIT OF TRACK AS HEAD VALUE -; +; ; HBIOS SEEK: HL=CYLINDER, D=HEAD, E=SECTOR ; LD DE,(HSTSEC) ; SECTOR -> DE, HEAD(D) BECOMES ZERO @@ -1846,12 +1846,12 @@ INIT: LD DE,(BNKBIOS) ; UBIOS_PAGE (SEE PAGES.INC) CALL $FFFD ; DO IT (RST 08 NOT YET INSTALLED) PUSH DE ; SAVE PREVIOUS BANK - + LD HL,0 ; FROM ADDRESS 0 (PAGE ZERO) LD DE,SECBUF ; USE SECBUF AS BOUNCE BUFFER LD BC,256 ; ONE PAGE IS 256 BYTES LDIR ; DO IT - + LD BC,$01FB ; UNA FUNC = SET BANK POP DE ; RECOVER OPERATING BANK CALL $FFFD ; DO IT (RST 08 NOT YET INSTALLED) @@ -1860,7 +1860,7 @@ INIT: LD DE,0 ; TO PAGE ZERO OF OPERATING BANK LD BC,256 ; ONE PAGE IS 256 BYTES LDIR ; DO IT - + ; INSTALL UNA INVOCATION VECTOR FOR RST 08 LD A,$C3 ; JP INSTRUCTION LD (8),A ; STORE AT 0x0008 @@ -1880,7 +1880,7 @@ INIT: ; SOFT RESET HBIOS LD B,BF_SYSRESET ; HB FUNC: RESET RST 08 ; DO IT - + ; CREATE A TEMP COPY OF THE HBIOS CONFIG BLOCK (HCB) ; FOR REFERENCE USE DURING INIT LD B,BF_SYSSETCPY ; HBIOS FUNC: SETUP BANK COPY @@ -1891,7 +1891,7 @@ INIT: LD HL,HCB_LOC ; COPY FROM FIXED LOCATION IN HB BANK LD DE,HCB ; TO TEMP LOCATION IN USR BANK RST 08 ; DO IT - + ; CAPTURE RAM DRIVE STARTING BANK LD A,(HCB + HCB_BIDRAMD0) LD (BNKRAMD),A @@ -1905,7 +1905,7 @@ INIT: CALL NEWLINE2 ; FORMATTING LD DE,STR_BANNER ; POINT TO BANNER CALL WRITESTR ; DISPLAY IT - + #IFDEF PLTUNA ; SAVE COMMAND PROCESSOR IMAGE TO MALLOCED CACHE IN UNA BIOS PAGE LD C,$F7 ; UNA MALLOC @@ -1978,7 +1978,7 @@ INIT: CALL PRTDEC ; PRINT IT LD DE,STR_MEMFREE ; ADD DESCRIPTION CALL WRITESTR ; AND PRINT IT -; +; LD A,(DEFDRIVE) ; GET DEFAULT DRIVE LD (CDISK),A ; ... AND SETUP CDISK ; @@ -1997,7 +1997,7 @@ INIT2: CALL PRTDECB ; PRINT IT CALL PC_PERIOD ; DECIMAL POINT LD A,0 + (((BDOS_LOC % 1024) * 100) / 1024) - CALL PRTDECB ; MANTISSA + CALL PRTDECB ; MANTISSA LD DE,STR_TPA2 ; AND TPA SUFFIX CALL WRITESTR CALL NEWLINE ; FORMATTING @@ -2510,7 +2510,7 @@ DRV_INIT3A: PUSH DE ; SAVE DE (HARD DISK VOLUME COUNTER) PUSH HL ; SAVE DRIVE LIST PTR PUSH BC ; SAVE LOOP CONTROL - + LD B,BF_DIOMEDIA ; HBIOS FUNC: SENSE MEDIA LD E,1 ; PERFORM MEDIA DISCOVERY RST 08 @@ -2518,9 +2518,9 @@ DRV_INIT3A: POP BC ; RESTORE LOOP CONTROL POP HL ; RESTORE DRIVE LIST PTR POP DE ; RESTORE DE - + RET NZ ; IF NO MEDIA, JUST RETURN - + ; IF ACTIVE... LD (HL),C ; SAVE UNIT NUM IN LIST INC HL ; BUMP PTR @@ -2677,7 +2677,7 @@ DPH_INIT1: CALL PRTDRV ; PRINT DRIVE INFO LD A,D ; A := UNIT PUSH HL ; SAVE DRIVE MAP POINTER -DPH_INIT1A: +DPH_INIT1A: LD DE,(DPHTOP) ; GET ADDRESS OF NEXT DPH PUSH DE ; ... AND SAVE IT ; INVOKE THE DPH BUILD ROUTINE @@ -2776,7 +2776,7 @@ MAKDPH1: POP HL ; HL := START OF DPH LD A,8 ; SIZE OF DPH RESERVED AREA CALL ADDHLA ; LEAVE IT ALONE (ZERO FILLED) - + LD BC,(DIRBUF) ; ADDRESS OF DIRBUF LD (HL),C ; PLUG DIRBUF INC HL ; ... INTO DPH @@ -2813,7 +2813,7 @@ MAKDPH2: LD (HL),C ; SAVE CKS/ALS BUF INC HL ; ... ADDRESS IN LD (HL),B ; ... DPH AND BUMP - INC HL ; ... TO NEXT DPH ENTRY + INC HL ; ... TO NEXT DPH ENTRY XOR A ; SIGNAL SUCCESS RET ; @@ -2831,9 +2831,9 @@ ALLOC: EX DE,HL ; DE=NEW HEAPTOP, HL=HEAPLIM SBC HL,DE ; HEAPLIM - HEAPTOP JR C,ALLOCX ; C SET ON OVERFLOW ERROR - ; ALLOCATION SUCCEEDED, COMMIT NEW HEAPTOP + ; ALLOCATION SUCCEEDED, COMMIT NEW HEAPTOP LD (HEAPTOP),DE ; SAVE NEW HEAPTOP -ALLOCX: +ALLOCX: POP HL ; RETURN VALUE TO HL POP DE ; RECOVER DE RET @@ -2862,15 +2862,15 @@ PRTDRV: PUSH BC ; PRESERVE BC PUSH DE ; PRESERVE DE PUSH HL ; PRESERVE HL - + LD B,D ; B := UNIT LD C,$48 ; UNA FUNC: GET DISK TYPE CALL $FFFD ; CALL UNA LD A,D ; DISK TYPE TO A - + CP $40 JR Z,PRTDRV1 ; IF SO, HANDLE RAM/ROM - + LD DE,DEVIDE ; IDE STRING CP $41 ; IDE? JR Z,PRTDRVX ; IF YES, PRINT diff --git a/Source/HBIOS/romldr.asm b/Source/HBIOS/romldr.asm index 747dd032..9cf31c0c 100644 --- a/Source/HBIOS/romldr.asm +++ b/Source/HBIOS/romldr.asm @@ -738,7 +738,7 @@ diskboot5: ; ; Compute number of sectors to load ld hl,(bb_cpmend) ; hl := end - ld de,(bb_cpmloc) ; de := start + ld de,(bb_cpmloc) ; de := start or a ; clear carry sbc hl,de ; hl := length to load ld a,h ; determine 512 byte sector count From 66c893e25170744207d2a6eff437c3753f3ade49 Mon Sep 17 00:00:00 2001 From: Dean Netherton Date: Sun, 5 Apr 2020 20:06:34 +1000 Subject: [PATCH 015/339] makefile: updated some make scripts to use when calling subdir makefiles --- Makefile | 20 ++++++++++---------- Tools/Makefile.inc | 4 +++- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/Makefile b/Makefile index 44d7847e..8253467c 100644 --- a/Makefile +++ b/Makefile @@ -1,19 +1,19 @@ all: - cd Tools/unix ; make - cd Source ; make - cd Source/Images ; make + $(MAKE) --directory Tools/unix + $(MAKE) --directory Source + $(MAKE) --directory Source/Images clean: - cd Tools/unix ; make clean - cd Source ; make clean - cd Binary ; make clean + $(MAKE) --directory Tools/unix clean + $(MAKE) --directory Source clean + $(MAKE) --directory Binary clean clobber: - cd Tools/unix ; make clobber - cd Source ; make clobber - cd Binary ; make clobber + $(MAKE) --directory Tools/unix clobber + $(MAKE) --directory Source clobber + $(MAKE) --directory Binary clobber rm -f typescript diff: - cd Source ; make diff + $(MAKE) --directory diff diff --git a/Tools/Makefile.inc b/Tools/Makefile.inc index 4d0c5583..0de5bc5e 100644 --- a/Tools/Makefile.inc +++ b/Tools/Makefile.inc @@ -94,6 +94,8 @@ ifeq ($(UNAME), Linux) $(BSTC) -e -l $< endif +.ONESHELL: + # # darwin bstc won't run, since mac os does not do 32 bit binaries any more # openspin ought to work @@ -108,7 +110,7 @@ endif # all:: $(OBJECTS) @for dir in $(SUBDIRS) ; do \ - ( echo "building in `pwd`/$$dir" ; cd "$$dir" ; make all ) ; \ + ( echo "building in `pwd`/$$dir" ; $(MAKE) --directory "$$dir" all ) ; \ done @if [ "$(DEST)" ] ; then for file in $(OBJECTS) ; do \ mkdir -p $(DEST) ; \ From ae7714aeff4c8bae332677804a89159a4673b955 Mon Sep 17 00:00:00 2001 From: Dean Netherton Date: Mon, 6 Apr 2020 19:51:34 +1000 Subject: [PATCH 016/339] linux build: update to Build.sh fix for some platforms The initialization of the Rom dat file used the pipe (|) operator to build an initial empty file. But the pipe operator | may sometimes return a non-zero exit code for some linux platforms, if the the streams are closed before dd has fully processed the stream. This issue occured on a travis linux ubuntu image. Solution was to change to redirection. --- Source/HBIOS/Build.sh | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Source/HBIOS/Build.sh b/Source/HBIOS/Build.sh index e9ff4abd..992afbcb 100755 --- a/Source/HBIOS/Build.sh +++ b/Source/HBIOS/Build.sh @@ -13,9 +13,9 @@ if [ $1 == '-d' ] ; then diffdir=$1 shift if [ -f $diffdir/build.inc ] ; then - timestamp=$(grep TIMESTAMP $diffdir/build.inc | awk '{print $3}' | tr -d '\015"') + timestamp=$(grep TIMESTAMP $diffdir/build.inc | awk '{print $3}' | tr -d '\015"') echo diff build using $timestamp - fi + fi fi # positional arguments @@ -65,7 +65,7 @@ romfmt=wbw_rom${romsize} outdir=../../Binary echo "creating empty rom disk of size $romsize in $blankfile" -LC_CTYPE=en_US.US-ASCII tr '\000' '\345' build.inc ; RomWBW Configured for $platform $config $timestamp From 08b112a20ff463cc789457e3594ce76946b4e0d2 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Tue, 21 Apr 2020 09:43:31 -0700 Subject: [PATCH 017/339] Bump version --- Source/HBIOS/cfg_rcz80.asm | 2 +- Source/ver.inc | 2 +- Source/ver.lib | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Source/HBIOS/cfg_rcz80.asm b/Source/HBIOS/cfg_rcz80.asm index 54340bb1..3a4f7ade 100644 --- a/Source/HBIOS/cfg_rcz80.asm +++ b/Source/HBIOS/cfg_rcz80.asm @@ -41,7 +41,7 @@ KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS -CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER +CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER CTCMODE .EQU CTCMODE_RC ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT diff --git a/Source/ver.inc b/Source/ver.inc index 2fc8980c..5f23cbdf 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,4 +2,4 @@ #DEFINE RMN 1 #DEFINE RUP 0 #DEFINE RTP 0 -#DEFINE BIOSVER "3.1-pre.7" +#DEFINE BIOSVER "3.1-pre.8" diff --git a/Source/ver.lib b/Source/ver.lib index 575efc46..71115fb6 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 1 rup equ 0 rtp equ 0 biosver macro - db "3.1-pre.7" + db "3.1-pre.8" endm From f57e3bed00ba6a8905e01b98b4dc02b30d09f608 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Tue, 21 Apr 2020 12:46:31 -0700 Subject: [PATCH 018/339] Enhance CTC periodic timer Add ability to use TIMER mode in CTC driver to generate priodic interrupts. --- Doc/ChangeLog.txt | 1 + Source/HBIOS/Config/RCZ80_kio.asm | 1 + Source/HBIOS/cfg_ezz80.asm | 6 +- Source/HBIOS/cfg_master.asm | 6 +- Source/HBIOS/cfg_mk4.asm | 2 +- Source/HBIOS/cfg_n8.asm | 2 +- Source/HBIOS/cfg_rcz180.asm | 2 +- Source/HBIOS/cfg_rcz80.asm | 6 +- Source/HBIOS/cfg_sbc.asm | 6 +- Source/HBIOS/cfg_scz180.asm | 2 +- Source/HBIOS/cfg_zeta2.asm | 6 +- Source/HBIOS/ctc.asm | 149 +++++++++++++++--------------- Source/HBIOS/std.asm | 7 +- Source/ver.inc | 2 +- Source/ver.lib | 2 +- 15 files changed, 110 insertions(+), 90 deletions(-) diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt index 80ec7510..1d48213c 100644 --- a/Doc/ChangeLog.txt +++ b/Doc/ChangeLog.txt @@ -8,6 +8,7 @@ Version 3.1 - WBW: Support automatic clock hardware detection and fallback - WBW: Support use of CTC for SIO baud rate divisors - WBW: Updated IDE and PPIDE drivers to improve old CF Card compatibility +- WBW: Support TIMER mode in CTC driver Version 3.0.1 ------------- diff --git a/Source/HBIOS/Config/RCZ80_kio.asm b/Source/HBIOS/Config/RCZ80_kio.asm index 06cbd81e..d27d0a2d 100644 --- a/Source/HBIOS/Config/RCZ80_kio.asm +++ b/Source/HBIOS/Config/RCZ80_kio.asm @@ -33,6 +33,7 @@ INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2 KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT ; CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT +CTCTIMER .SET TRUE ; ENABLE CTC PERIODIC TIMER CTCBASE .SET KIOBASE+$04 ; CTC BASE I/O ADDRESS ; ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) diff --git a/Source/HBIOS/cfg_ezz80.asm b/Source/HBIOS/cfg_ezz80.asm index f46a39d1..9784be32 100644 --- a/Source/HBIOS/cfg_ezz80.asm +++ b/Source/HBIOS/cfg_ezz80.asm @@ -41,9 +41,13 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU TRUE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_EZ ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] +CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] +CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3) +CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3) +CTCOSC .EQU 921600 ; CTC CLOCK FREQUENCY ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_master.asm b/Source/HBIOS/cfg_master.asm index 72fb0604..52bd69d2 100644 --- a/Source/HBIOS/cfg_master.asm +++ b/Source/HBIOS/cfg_master.asm @@ -59,9 +59,13 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_ZP ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] +CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] +CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3) +CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3) +CTCOSC .EQU 614400 ; CTC CLOCK FREQUENCY ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_mk4.asm b/Source/HBIOS/cfg_mk4.asm index 82ef4709..6cfd61bc 100644 --- a/Source/HBIOS/cfg_mk4.asm +++ b/Source/HBIOS/cfg_mk4.asm @@ -46,9 +46,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_ZP ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_n8.asm b/Source/HBIOS/cfg_n8.asm index 1175c67c..26ff3331 100644 --- a/Source/HBIOS/cfg_n8.asm +++ b/Source/HBIOS/cfg_n8.asm @@ -49,9 +49,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_ZP ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm index f8a3dab6..f099c2cf 100644 --- a/Source/HBIOS/cfg_rcz180.asm +++ b/Source/HBIOS/cfg_rcz180.asm @@ -46,9 +46,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_RC ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_rcz80.asm b/Source/HBIOS/cfg_rcz80.asm index 3a4f7ade..f94c1694 100644 --- a/Source/HBIOS/cfg_rcz80.asm +++ b/Source/HBIOS/cfg_rcz80.asm @@ -40,9 +40,13 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_RC ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] +CTCMODE .EQU CTCMODE_TIM16 ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] +CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3) +CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3) +CTCOSC .EQU CPUOSC ; CTC CLOCK FREQUENCY ; DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_sbc.asm b/Source/HBIOS/cfg_sbc.asm index 70a6921c..0c7e2170 100644 --- a/Source/HBIOS/cfg_sbc.asm +++ b/Source/HBIOS/cfg_sbc.asm @@ -38,9 +38,13 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_ZP ; CTC TIMER MODE: CTCMODE_[ZP|Z2|EZ|RC] +CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] +CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3) +CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3) +CTCOSC .EQU 614400 ; CTC CLOCK FREQUENCY ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_scz180.asm b/Source/HBIOS/cfg_scz180.asm index c129bb1a..41af5fb4 100644 --- a/Source/HBIOS/cfg_scz180.asm +++ b/Source/HBIOS/cfg_scz180.asm @@ -41,9 +41,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_RC ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $0D ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_zeta2.asm b/Source/HBIOS/cfg_zeta2.asm index 45fe1ced..1192d8d5 100644 --- a/Source/HBIOS/cfg_zeta2.asm +++ b/Source/HBIOS/cfg_zeta2.asm @@ -41,9 +41,13 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU TRUE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $20 ; CTC BASE I/O ADDRESS CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_Z2 ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] +CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] +CTCPRECH .EQU 0 ; PRESCALE CHANNEL (0-3) +CTCTIMCH .EQU 1 ; TIMER CHANNEL (0-3) +CTCOSC .EQU 921600 ; CTC CLOCK FREQUENCY ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/ctc.asm b/Source/HBIOS/ctc.asm index 011d3caa..0f056946 100644 --- a/Source/HBIOS/ctc.asm +++ b/Source/HBIOS/ctc.asm @@ -16,39 +16,51 @@ .ECHO "*** ERROR: CTC REQUIRES INTMODE 2!!!\n" !!! ; FORCE AN ASSEMBLY ERROR #ENDIF +; +CTC_PREIO .EQU CTCBASE + CTCPRECH +CTC_SCLIO .EQU CTCBASE + CTCTIMCH ; -; CONFIGURATION -; - #IF (CTCMODE == CTCMODE_ZP) -CTCPC .EQU CTCC ; PRESCALE CHANNEL -CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT -CTCTC .EQU CTCD ; TIMER CHANNEL -CTCTCC .EQU 48 ; TIMER CHANNEL CONSTANT -CTCTIVT .EQU INT_CTC0D ; TIMER CHANNEL IVT ENTRY + #IF (CTCMODE == CTCMODE_CTR) +CTC_DIV .EQU CTCOSC / 50 #ENDIF -; - #IF (CTCMODE == CTCMODE_Z2) -CTCPC .EQU CTCA ; PRESCALE CHANNEL -CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT -CTCTC .EQU CTCB ; TIMER CHANNEL -CTCTCC .EQU 72 ; TIMER CHANNEL CONSTANT -CTCTIVT .EQU INT_CTC0B ; TIMER CHANNEL IVT ENTRY + #IF (CTCMODE == CTCMODE_TIM16) +CTC_DIV .EQU CTCOSC / 16 / 50 #ENDIF -; - #IF (CTCMODE == CTCMODE_EZ) -CTCPC .EQU CTCC ; PRESCALE CHANNEL -CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT -CTCTC .EQU CTCD ; TIMER CHANNEL -CTCTCC .EQU 72 ; TIMER CHANNEL CONSTANT -CTCTIVT .EQU INT_CTC0D ; TIMER CHANNEL IVT ENTRY + #IF (CTCMODE == CTCMODE_TIM256) +CTC_DIV .EQU CTCOSC / 256 / 50 #ENDIF ; - #IF (CTCMODE == CTCMODE_RC) -CTCPC .EQU CTCC ; PRESCALE CHANNEL -CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT -CTCTC .EQU CTCD ; TIMER CHANNEL -CTCTCC .EQU 144 ; TIMER CHANNEL CONSTANT -CTCTIVT .EQU INT_CTC0D ; TIMER CHANNEL IVT ENTRY + .ECHO "CTC DIVISOR: " + .ECHO CTC_DIV + .ECHO "\n" +; +CTC_DIVHI .EQU ((CTC_DIV >> 8) & $FF) +CTC_DIVLO .EQU (CTC_DIV & $FF) +; +CTCTIVT .EQU INT_CTC0A + CTCTIMCH +; +CTC_DEFCFG .EQU %01010011 ; CTC DEFAULT CONFIG +CTC_CTRCFG .EQU %01010111 ; CTC COUNTER MODE CONFIG +CTC_TIM16CFG .EQU %00010111 ; CTC TIMER/16 MODE CONFIG +CTC_TIM256CFG .EQU %00110111 ; CTC TIMER/256 MODE CONFIG +CTC_TIMCFG .EQU %11010111 ; CTC TIMER CHANNEL CONFIG + ; |||||||+-- CONTROL WORD FLAG + ; ||||||+--- SOFTWARE RESET + ; |||||+---- TIME CONSTANT FOLLOWS + ; ||||+----- AUTO TRIGGER WHEN TIME CONST LOADED + ; |||+------ RISING EDGE TRIGGER + ; ||+------- TIMER MODE PRESCALER (0=16, 1=256) + ; |+-------- COUNTER MODE + ; +--------- INTERRUPT ENABLE +; + #IF (CTCMODE == CTCMODE_CTR) +CTC_PRECFG .EQU CTC_CTRCFG + #ENDIF + #IF (CTCMODE == CTCMODE_TIM16) +CTC_PRECFG .EQU CTC_TIM16CFG + #ENDIF + #IF (CTCMODE == CTCMODE_TIM256) +CTC_PRECFG .EQU CTC_TIM256CFG #ENDIF ; #ENDIF @@ -61,15 +73,7 @@ CTC_PREINIT: LD B,4 ; 4 CHANNELS LD C,CTCBASE ; FIRST CHANNEL PORT CTC_PREINIT1: - LD A,%01010011 ; CTCC CONTROL WORD VALUE - ; |||||||+-- 1=CONTROL WORD FLAG - ; ||||||+--- 1=SOFTWARE RESET - ; |||||+---- 0=TIME CONSTANT DOES NOT FOLLOW - ; ||||+----- 0=AUTO TRIGGER WHEN TIME CONST LOADED - ; |||+------ 1=RISING EDGE TRIGGER - ; ||+------- 0=PRESCALER OF 16 - ; |+-------- 1=COUNTER MODE - ; +--------- 0=NO INTERRUPTS + LD A,CTC_DEFCFG ; CTC DEFAULT CONFIG OUT (C),A ; CTC COMMAND INC C ; NEXT CHANNEL PORT DJNZ CTC_PREINIT1 @@ -82,7 +86,7 @@ CTC_PREINIT1: ; CTC USES 4 CONSECUTIVE VECTOR POSITIONS, ONE FOR ; EACH CHANNEL. BELOW WE SET THE BASE VECTOR TO THE ; START OF THE IVT, SO THE FIRST FOUR ENTIRES OF THE - ; IVT CORRESPOND TO CTC CHANNELS A-D + ; IVT CORRESPOND TO CTC CHANNELS A-D. LD A,0 OUT (CTCBASE),A ; SETUP CTC BASE INT VECTOR ; @@ -91,31 +95,15 @@ CTC_PREINIT1: ; CTC CHANNEL AS A PRESCALER AND ANOTHER AS THE ACTUAL ; TIMER INTERRUPT. THE PRESCALE CHANNEL OUTPUT MUST BE WIRED ; TO THE TIMER CHANNEL TRIGGER INPUT VIA HARDWARE. - LD A,%01010111 ; PRESCALE CHANNEL CONTROL WORD VALUE - ; |||||||+-- 1=CONTROL WORD FLAG - ; ||||||+--- 1=SOFTWARE RESET - ; |||||+---- 1=TIME CONSTANT FOLLOWS - ; ||||+----- 0=AUTO TRIGGER WHEN TIME CONST LOADED - ; |||+------ 1=RISING EDGE TRIGGER - ; ||+------- 0=PRESCALER OF 16 (NOT USED) - ; |+-------- 1=COUNTER MODE - ; +--------- 0=NO INTERRUPTS - OUT (CTCPC),A ; SETUP PRESCALE CHANNEL - LD A,CTCPCC ; PRESCALE CHANNEL CONSTANT - OUT (CTCPC),A ; SET PRESCALE CONSTANT - ; - LD A,%11010111 ; TIMER CHANNEL CONTROL WORD VALUE - ; |||||||+-- 1=CONTROL WORD FLAG - ; ||||||+--- 1=SOFTWARE RESET - ; |||||+---- 1=TIME CONSTANT FOLLOWS - ; ||||+----- 0=AUTO TRIGGER WHEN TIME CONST LOADED - ; |||+------ 1=RISING EDGE TRIGGER - ; ||+------- 0=PRESCALER OF 16 (NOT USED) - ; |+-------- 1=COUNTER MODE - ; +--------- 1=ENABLE INTERRUPTS - OUT (CTCTC),A ; SETUP TIMER CHANNEL - LD A,CTCTCC ; TIMER CHANNEL CONSTANT - OUT (CTCTC),A ; SET TIMER CONSTANT + LD A,CTC_PRECFG ; PRESCALE CHANNEL CONFIGURATION + OUT (CTC_PREIO),A ; SETUP PRESCALE CHANNEL + LD A,CTC_DIVHI ; PRESCALE CHANNEL CONSTANT + OUT (CTC_PREIO),A ; SET PRESCALE CONSTANT +; + LD A,CTC_TIMCFG ; TIMER CHANNEL CONTROL WORD VALUE + OUT (CTC_SCLIO),A ; SETUP TIMER CHANNEL + LD A,CTC_DIVLO ; TIMER CHANNEL CONSTANT + OUT (CTC_SCLIO),A ; SET TIMER CONSTANT ; #ENDIF ; @@ -129,28 +117,39 @@ CTC_PRTCFG: ; ANNOUNCE PORT CALL NEWLINE ; FORMATTING PRTS("CTC:$") ; FORMATTING +; + PRTS(" IO=0x$") ; FORMATTING + LD A,CTCBASE ; GET BASE PORT + CALL PRTHEXBYTE ; PRINT BASE PORT ; #IF (CTCTIMER) ; PRTS(" TIMER MODE=$") ; FORMATTING - #IF (CTCMODE == CTCMODE_ZP) - PRTS("ZP$") + #IF (CTCMODE == CTCMODE_CTR) + PRTS("COUNTER$") #ENDIF - #IF (CTCMODE == CTCMODE_Z2) - PRTS("Z2$") + #IF (CTCMODE == CTCMODE_TIM16) + PRTS("TIMER/16$") #ENDIF - #IF (CTCMODE == CTCMODE_EZ) - PRTS("EZ$") + #IF (CTCMODE == CTCMODE_TIM256) + PRTS("TIMER/256$") #ENDIF - #IF (CTCMODE == CTCMODE_RC) - PRTS("RC$") +; + #IF (CTCDEBUG) + PRTS(" PREIO=$") + LD A,CTC_PREIO + CALL PRTHEXBYTE +; + PRTS(" SCLIO=$") + LD A,CTC_SCLIO + CALL PRTHEXBYTE +; + PRTS(" DIV=$") + LD BC,CTC_DIV + CALL PRTHEXWORD #ENDIF ; #ENDIF -; - PRTS(" IO=0x$") ; FORMATTING - LD A,CTCBASE ; GET BASE PORT - CALL PRTHEXBYTE ; PRINT BASE PORT ; XOR A RET diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm index af024490..1ba9f27f 100644 --- a/Source/HBIOS/std.asm +++ b/Source/HBIOS/std.asm @@ -105,10 +105,9 @@ MID_FD111 .EQU 9 ; ZILOG CTC MODE SELECTIONS ; CTCMODE_NONE .EQU 0 ; NO CTC -CTCMODE_ZP .EQU 1 ; ZILOG PERIPHERALS ECB CTC -CTCMODE_Z2 .EQU 2 ; ZETA2 ONBOARD CTC -CTCMODE_EZ .EQU 3 ; EASY Z80 ONBOARD CTC -CTCMODE_RC .EQU 4 ; RC2014 CTC MODULE (ALSO KIO) +CTCMODE_CTR .EQU 1 ; CTC COUNTER +CTCMODE_TIM16 .EQU 2 ; CTC TIMER W/ DIV 16 +CTCMODE_TIM256 .EQU 3 ; CTC TIMER W/ DIV 256 ; ; DS RTC MODE SELECTIONS ; diff --git a/Source/ver.inc b/Source/ver.inc index 5f23cbdf..c6cdf73b 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,4 +2,4 @@ #DEFINE RMN 1 #DEFINE RUP 0 #DEFINE RTP 0 -#DEFINE BIOSVER "3.1-pre.8" +#DEFINE BIOSVER "3.1-pre.9" diff --git a/Source/ver.lib b/Source/ver.lib index 71115fb6..1524ad08 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 1 rup equ 0 rtp equ 0 biosver macro - db "3.1-pre.8" + db "3.1-pre.9" endm From 890f9262e01297b404dba6d8e0ff5904e044d3db Mon Sep 17 00:00:00 2001 From: Dean Netherton Date: Wed, 22 Apr 2020 21:12:41 +1000 Subject: [PATCH 019/339] HBIOS: Added support for sound drivers New sound driver support with initial support for the SN76489 chip New build configuration entry: * SN76489ENABLE Ports are currently locked in with: * SN76489_PORT_LEFT .EQU $FC ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT) * SN76489_PORT_RIGHT .EQU $F8 ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT) --- Source/Doc/Architecture.md | 83 +++++ Source/HBIOS/Config/RCZ80_std.asm | 2 + Source/HBIOS/audio.inc | 26 ++ Source/HBIOS/cfg_dyno.asm | 3 + Source/HBIOS/cfg_ezz80.asm | 3 + Source/HBIOS/cfg_master.asm | 3 + Source/HBIOS/cfg_mk4.asm | 3 + Source/HBIOS/cfg_n8.asm | 3 + Source/HBIOS/cfg_rcz180.asm | 3 + Source/HBIOS/cfg_rcz80.asm | 3 + Source/HBIOS/cfg_sbc.asm | 3 + Source/HBIOS/cfg_scz180.asm | 3 + Source/HBIOS/cfg_zeta.asm | 3 + Source/HBIOS/cfg_zeta2.asm | 3 + Source/HBIOS/hbios.asm | 72 +++- Source/HBIOS/hbios.inc | 16 + Source/HBIOS/sn76489.asm | 588 ++++++++++++++++++++++++++++++ Source/HBIOS/std.asm | 89 ++--- Source/Makefile | 2 +- 19 files changed, 865 insertions(+), 46 deletions(-) create mode 100644 Source/HBIOS/audio.inc create mode 100644 Source/HBIOS/sn76489.asm diff --git a/Source/Doc/Architecture.md b/Source/Doc/Architecture.md index 90d531ba..eb962567 100644 --- a/Source/Doc/Architecture.md +++ b/Source/Doc/Architecture.md @@ -1292,6 +1292,81 @@ codes as described at the start of this section. `\clearpage`{=latex} +Sound (SND) +------------ + +### Function 0x50 -- Sound Reset (SNDRESET) + +| _Entry Parameters_ +| B: 0x50 +| C: The audio device unit number + +| _Exit Results_ +| A: Status (0=OK, else error) + +Reset the sound chip. Turn off all sounds and set volume on all +channels to silence. + +### Function 0x51 -- Sound Volume (SNDVOL) + +| _Entry Parameters_ +| B: 0x51 +| C: The audio device unit number +| L: The volume to be applied (00=Silence, FF=Maximum) + +| _Exit Results_ +| A: Status (0=OK, else error) + +This function set the volume configuration command. The volume will +be applied when the SNDPLAY function is invoked. + +### Function 0x52 -- Sound Volume (SNDPIT) + +| _Entry Parameters_ +| B: 0x52 +| C: The audio device unit number +| HL: The pitch to be applied (0000=lowest note, FFFF=highest note) + +This function set the pitch configuration command. The pitch will +be applied when the SNDPLAY function is invoked. + +### Function 0x53 -- Sound Volume (SNDNOTE) + +| _Entry Parameters_ +| B: 0x52 +| C: The audio device unit number +| L: A number from 0 to 255 selecting quarter notes + +This function will apply a pitch value to the sound chip. + +The value correspond to standard musical notes. The value allows for selection +of a quarter of a semitone by giving a value between 0 and upto the drivers maximum +supported value. The lowest note is (0). + +For the SN76490 chip, 0 corresponds to note A1# and the value 249 is the maximum +supported value, and it corresponds to note C7. + +### Function 0x54 -- Sound Play (SNDPLAY) + +| _Entry Parameters_ +| B: 0x53 +| C: The audio device unit number +| D: The channel to play the previously configured tone + +This function set the pitch and volume previously configured with the SNDPIT +and SNDVOL functions. + +For example, to play a specific note, on the first installed driver, the following +HBIOS calls would need to be made + +``` +HBIOS B=51 C=00 L=80 ; Set volume to half level +HBIOS B=53 C=00 L=69 ; Select Middle C (C4) assuming SN76489 +HBIOS B=54 C=00 D=01 ; Play note on Channel 1 +``` + +`\clearpage`{=latex} + System (SYS) ------------ @@ -1573,6 +1648,14 @@ available along with the registers/information used as input. | _Returned Values_ | A: Status (0=OK, else error) +#### SYSSET Subfunction 0xD2 -- Inc Timer (TIMER) + +| _Entry Parameters_ +| BC: 0xF9D2 + +| _Returned Values_ +| A: Status (0=OK, else error) + #### SYSSET Subfunction 0xE0 -- Set Boot Information (BOOTINFO) diff --git a/Source/HBIOS/Config/RCZ80_std.asm b/Source/HBIOS/Config/RCZ80_std.asm index da88345f..5b120cb7 100644 --- a/Source/HBIOS/Config/RCZ80_std.asm +++ b/Source/HBIOS/Config/RCZ80_std.asm @@ -38,3 +38,5 @@ FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) ; PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) + +SN76489ENABLE .SET FALSE ; SN76489 SOUND DRIVER diff --git a/Source/HBIOS/audio.inc b/Source/HBIOS/audio.inc new file mode 100644 index 00000000..e171eb41 --- /dev/null +++ b/Source/HBIOS/audio.inc @@ -0,0 +1,26 @@ +#IF AUDIOTRACE +#DEFINE AUDTRACE(STR) PUSH DE \ LD DE, STR \ CALL WRITESTR \ POP DE +#DEFINE AUDTRACE_A CALL PRTHEXBYTE +#DEFINE AUDTRACE_B PUSH AF \ LD A, B \ CALL PRTHEXBYTE \ POP AF +#DEFINE AUDTRACE_D PUSH AF \ LD A, D \ CALL PRTHEXBYTE \ POP AF +#DEFINE AUDTRACE_E PUSH AF \ LD A, E \ CALL PRTHEXBYTE \ POP AF +#DEFINE AUDTRACE_L PUSH AF \ LD A, L \ CALL PRTHEXBYTE \ POP AF +#DEFINE AUDTRACE_HL CALL PRTHEXWORDHL +#DEFINE AUDTRACE_DE PUSH DE \ PUSH DE \ POP HL \ CALL PRTHEXWORDHL \ POP DE +#DEFINE AUDTRACE_IY PUSH HL \ PUSH IY \ POP HL \ CALL PRTHEXWORDHL \ POP HL + +#DEFINE AUDDEBUG(S) CALL PRTSTRD \ .TEXT S \ .TEXT "$" ; $$$$$$ PRINT STRING S TO CONSOLE - PRTD("HELLO") - NO TRAILING $ REQUIRED + +#ELSE +#DEFINE AUDTRACE(S) +#DEFINE AUDTRACE_A +#DEFINE AUDTRACE_B +#DEFINE AUDTRACE_D +#DEFINE AUDTRACE_E +#DEFINE AUDTRACE_L +#DEFINE AUDTRACE_HL +#DEFINE AUDTRACE_DE +#DEFINE AUDTRACE_IY + +#DEFINE AUDDEBUG(STR) +#ENDIF diff --git a/Source/HBIOS/cfg_dyno.asm b/Source/HBIOS/cfg_dyno.asm index 13714081..01c0f32b 100644 --- a/Source/HBIOS/cfg_dyno.asm +++ b/Source/HBIOS/cfg_dyno.asm @@ -154,3 +154,6 @@ PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) + +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file diff --git a/Source/HBIOS/cfg_ezz80.asm b/Source/HBIOS/cfg_ezz80.asm index 9784be32..385ca6d7 100644 --- a/Source/HBIOS/cfg_ezz80.asm +++ b/Source/HBIOS/cfg_ezz80.asm @@ -179,3 +179,6 @@ PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) + +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file diff --git a/Source/HBIOS/cfg_master.asm b/Source/HBIOS/cfg_master.asm index 52bd69d2..a4cf63d5 100644 --- a/Source/HBIOS/cfg_master.asm +++ b/Source/HBIOS/cfg_master.asm @@ -234,3 +234,6 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .EQU $0C ; UF: REGISTERS BASE ADR + +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file diff --git a/Source/HBIOS/cfg_mk4.asm b/Source/HBIOS/cfg_mk4.asm index 6cfd61bc..191128bd 100644 --- a/Source/HBIOS/cfg_mk4.asm +++ b/Source/HBIOS/cfg_mk4.asm @@ -188,3 +188,6 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .EQU $0C ; UF: REGISTERS BASE ADR + +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file diff --git a/Source/HBIOS/cfg_n8.asm b/Source/HBIOS/cfg_n8.asm index 26ff3331..48362ebf 100644 --- a/Source/HBIOS/cfg_n8.asm +++ b/Source/HBIOS/cfg_n8.asm @@ -188,3 +188,6 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) FIFO_BASE .EQU $0C ; UF: REGISTERS BASE ADR + +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm index f099c2cf..18037ad3 100644 --- a/Source/HBIOS/cfg_rcz180.asm +++ b/Source/HBIOS/cfg_rcz180.asm @@ -188,3 +188,6 @@ PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) + +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file diff --git a/Source/HBIOS/cfg_rcz80.asm b/Source/HBIOS/cfg_rcz80.asm index f94c1694..02a35956 100644 --- a/Source/HBIOS/cfg_rcz80.asm +++ b/Source/HBIOS/cfg_rcz80.asm @@ -194,3 +194,6 @@ PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) + +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_sbc.asm b/Source/HBIOS/cfg_sbc.asm index 0c7e2170..60b8675d 100644 --- a/Source/HBIOS/cfg_sbc.asm +++ b/Source/HBIOS/cfg_sbc.asm @@ -190,3 +190,6 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .EQU $0C ; UF: REGISTERS BASE ADR + +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file diff --git a/Source/HBIOS/cfg_scz180.asm b/Source/HBIOS/cfg_scz180.asm index 41af5fb4..e16892a0 100644 --- a/Source/HBIOS/cfg_scz180.asm +++ b/Source/HBIOS/cfg_scz180.asm @@ -183,3 +183,6 @@ PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) + +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file diff --git a/Source/HBIOS/cfg_zeta.asm b/Source/HBIOS/cfg_zeta.asm index ca9dfb7e..6a3982a7 100644 --- a/Source/HBIOS/cfg_zeta.asm +++ b/Source/HBIOS/cfg_zeta.asm @@ -134,3 +134,6 @@ PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) + +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file diff --git a/Source/HBIOS/cfg_zeta2.asm b/Source/HBIOS/cfg_zeta2.asm index 1192d8d5..e5422759 100644 --- a/Source/HBIOS/cfg_zeta2.asm +++ b/Source/HBIOS/cfg_zeta2.asm @@ -144,3 +144,6 @@ PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) + +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index 55ed757e..81404dcf 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -1647,6 +1647,9 @@ HB_PCINITTBLLEN .EQU (($ - HB_PCINITTBL) / 2) ;================================================================================================== ; HB_INITTBL: +#IF (SN76489ENABLE) + .DW SN76489_INIT +#ENDIF #IF (CTCENABLE) .DW CTC_INIT #ENDIF @@ -1731,6 +1734,7 @@ HB_INITTBL: #IF (UFENABLE) .DW UF_INIT #ENDIF + ; HB_INITTBLLEN .EQU (($ - HB_INITTBL) / 2) ; @@ -1794,6 +1798,10 @@ HB_DISPCALL: CALL C,PANIC ; OBSOLETE! CP BF_VDA + $10 ; $40-$4F: VIDEO DISPLAY ADAPTER JP C,VDA_DISPATCH + + CP BF_SND + $08 ; $50-$58: SOUND DRIVERS + JP C,SND_DISPATCH + CP BF_SYS ; SKIP TO BF_SYS VALUE AT $F0 CALL C,PANIC ; PANIC IF LESS THAN BF_SYS JP SYS_DISPATCH ; OTHERWISE SYS CALL @@ -2154,7 +2162,7 @@ HB_IOBNK .DB 0 ; CURRENT IO BUFFER BANK ID ; RTC_DISPATCH: PUSH HL ; SAVE INCOMING HL - LD HL,(RTC_DISPADR) ; + LD HL,(RTC_DISPADR) ; EX (SP),HL RET ; @@ -2219,6 +2227,51 @@ VDA_SIZ .EQU VDA_MAX * 4 ; EACH ENTRY IS 4 BYTES .DB VDA_MAX ; MAX ENTRY COUNT TABLE PREFIX VDA_CNT .DB 0 ; ENTRY COUNT PREFIX VDA_TBL .FILL VDA_SIZ,0 ; SPACE FOR ENTRIES + +; +; +;================================================================================================== +; SOUND ADAPTER DEVICE DISPATCHER +;================================================================================================== +; +; ROUTE CALL TO SPECIFIED SOUND DEVICE DRIVER +; B: FUNCTION +; C: UNIT NUMBER +; +SND_DISPATCH: + PUSH IY ; SAVE INCOMING IY + + LD IY, SND_TBL ; POINT IY TO START OF DIO TABLE + CALL HB_DISPCALL ; GO TO GENERIC API CALL CODE + + POP IY ; RESTORE IY + RET ; AND DONE +; +; ADD AN ENTRY TO THE SND UNIT TABLE (SEE HB_ADDENT FOR DETAILS) +; +SND_ADDENT: + LD HL, SND_TBL ; POINT TO SND TABLE + JP HB_ADDENT ; ... AND GO TO COMMON CODE +; +; HBIOS VIDEO DEVICE UNIT TABLE +; +; TABLE IS BUILT DYNAMICALLY BY EACH DRIVER DURING INITIALIZATION. +; THE TABLE IS PREFIXED BY TWO BYTES. TABLE - 1 CONTAINS THE CURRENT +; NUMBER OF ENTRIES. TABLE - 2 CONTAINS THE MAXIMUM NUMBER OF ENTRIES. +; TABLE - 3 CONTAINS THE NUMBER OF SND FUNCTION IDS +; EACH ENTRY IS DEFINED AS: +; +; WORD DRIVER FUNCTION TABLE ADDRESS +; WORD UNIT SPECIFIC DATA (TYPICALLY A DEVICE INSTANCE DATA ADDRESS) +; +SND_FNCNT .EQU 6 ; NUMBER OF SND FUNCS (FOR RANGE CHECK) +SND_MAX .EQU 2 ; UP TO 2 UNITS +SND_SIZ .EQU SND_MAX * 4 ; EACH ENTRY IS 4 BYTES +; + .DB SND_FNCNT ; SND FUNCTION COUNT (FOR RANGE CHECK) + .DB SND_MAX ; MAX ENTRY COUNT TABLE PREFIX +SND_CNT .DB 0 ; ENTRY COUNT PREFIX +SND_TBL .FILL SND_SIZ,0 ; SPACE FOR ENTRIES ; ;================================================================================================== ; SYSTEM FUNCTION DISPATCHER @@ -2359,6 +2412,8 @@ SYS_GET: JR Z,SYS_GETDIOCNT CP BF_SYSGET_VDACNT JR Z,SYS_GETVDACNT + CP BF_SYSGET_SNDCNT + JR Z, SYS_GETSNDCNT CP BF_SYSGET_TIMER JR Z,SYS_GETTIMER CP BF_SYSGET_SECS @@ -2477,6 +2532,13 @@ SYS_GETVDACNT: LD E,A ; PUT IT IN E XOR A ; SIGNALS SUCCESS RET + +SYS_GETSNDCNT: + LD A,(SND_CNT) ; GET DEVICE COUNT (FIRST BYTE OF LIST) + LD E,A ; PUT IT IN E + XOR A ; SIGNALS SUCCESS + RET + ; ; SET SYSTEM PARAMETERS ; PARAMETER(S) TO SET INDICATED IN C @@ -3250,6 +3312,14 @@ SIZ_CTC .EQU $ - ORG_CTC .ECHO SIZ_CTC .ECHO " bytes.\n" #ENDIF +#IF (SN76489ENABLE) +ORG_SN76489 .EQU $ + #INCLUDE "sn76489.asm" +SIZ_SN76489 .EQU $ - ORG_SN76489 + .ECHO "SN76489 occupies " + .ECHO SIZ_SN76489 + .ECHO " bytes.\n" +#ENDIF ; #DEFINE USEDELAY #INCLUDE "util.asm" diff --git a/Source/HBIOS/hbios.inc b/Source/HBIOS/hbios.inc index 6c166307..477fcdfe 100644 --- a/Source/HBIOS/hbios.inc +++ b/Source/HBIOS/hbios.inc @@ -51,6 +51,21 @@ BF_VDASCR .EQU BF_VDA + 11 ; SCROLL BF_VDAKST .EQU BF_VDA + 12 ; GET KEYBOARD STATUS BF_VDAKFL .EQU BF_VDA + 13 ; FLUSH KEYBOARD BUFFER BF_VDAKRD .EQU BF_VDA + 14 ; READ KEYBOARD + +BF_SND .EQU $50 +BF_SNDRESET .EQU BF_SND + 0 ; RESET SOUND SYSTEM +BF_SNDVOL .EQU BF_SND + 1 ; REQUEST SOUND VOL - L CONTAINS VOLUME (255 MAX, 0 SILENT) - SCALED AS REQUIRED BY DRIVER (EG: MAPS TO JUST 4 BIT RESOLUTION FOR SN76489) +BF_SNDPIT .EQU BF_SND + 2 ; REQUEST SOUND PITCH - HL CONTAINS PITCH DRIVER SPECIFIC VALUE +BF_SNDNOTE .EQU BF_SND + 3 ; REQUEST NOTE - L CONTAINS NOTE - EACH VALUE IS QUARTER NOTE +BF_SNDPLAY .EQU BF_SND + 4 ; INITIATE THE REQUESTED SOUND COMMAND +BF_SNDQUERY .EQU BF_SND + 5 ; D IS CHANNEL, E IS SUBCOMMAND + +; BF_SNDQUERY SUBCOMMANDS +SND_STATUS .EQU 0 +SND_CHCNT .EQU SND_STATUS + 1 ; RETURN COUNT OF CHANNELS +SND_SVOLUME .EQU SND_STATUS + 2 ; 8 BIT NUMBER +SND_SPITCH .EQU SND_STATUS + 3 ; 16 BIT NUMBER + ; BF_SYS .EQU $F0 BF_SYSRESET .EQU BF_SYS + 0 ; SOFT RESET HBIOS @@ -70,6 +85,7 @@ BF_SYSINT .EQU BF_SYS + 12 ; MANAGE INTERRUPT VECTORS BF_SYSGET_CIOCNT .EQU $00 ; GET CHAR UNIT COUNT BF_SYSGET_DIOCNT .EQU $10 ; GET DISK UNIT COUNT BF_SYSGET_VDACNT .EQU $40 ; GET VDA UNIT COUNT +BF_SYSGET_SNDCNT .EQU $50 ; GET VDA UNIT COUNT BF_SYSGET_TIMER .EQU $D0 ; GET CURRENT TIMER VALUE BF_SYSGET_SECS .EQU $D1 ; GET CURRENT SECONDS VALUE BF_SYSGET_BOOTINFO .EQU $E0 ; GET BOOT INFORMATION diff --git a/Source/HBIOS/sn76489.asm b/Source/HBIOS/sn76489.asm new file mode 100644 index 00000000..68928dfb --- /dev/null +++ b/Source/HBIOS/sn76489.asm @@ -0,0 +1,588 @@ +;====================================================================== +; SN76489 sound driver +; +; WRITTEN BY: DEAN NETHERTON +;====================================================================== +; +; TODO: +; +;====================================================================== +; CONSTANTS +;====================================================================== +; + +SN76489_PORT_LEFT .EQU $FC ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT) +SN76489_PORT_RIGHT .EQU $F8 ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT) +SN7_IDAT .EQU 0 +SN7_TONECNT .EQU 3 ; COUNT NUMBER OF TONE CHANNELS +SN7_NOISECNT .EQU 1 ; COUNT NUMBER OF NOISE CHANNELS +SN7_CHCNT .EQU SN7_TONECNT + SN7_NOISECNT +CHANNEL_0_SILENT .EQU $9F +CHANNEL_1_SILENT .EQU $BF +CHANNEL_2_SILENT .EQU $DF +CHANNEL_3_SILENT .EQU $FF + +SN7CLKDIVIDER .EQU 4 +SN7CLK .EQU CPUOSC / SN7CLKDIVIDER +SN7RATIO .EQU SN7CLK * 100 / 32 + + +SN7_FIRST_NOTE .EQU 5827 ; A1# +SN7_LAST_NODE .EQU 209300 ; C7 + +A1S .equ SN7RATIO / SN7_FIRST_NOTE +C7 .EQU SN7RATIO / SN7_LAST_NODE + + .echo "SN76489: range of A1# (pitch: " + .echo A1S + .echo ") to C7 (pitch: " + .echo C7 + .echo ")\n" + +#include "audio.inc" + +SN76489_INIT: + LD IY, SN7_IDAT ; POINTER TO INSTANCE DATA + + LD DE,STR_MESSAGELT + CALL WRITESTR + LD A, SN76489_PORT_LEFT + CALL PRTHEXBYTE + + LD DE,STR_MESSAGERT + CALL WRITESTR + LD A, SN76489_PORT_RIGHT + CALL PRTHEXBYTE +; +SN7_INIT1: + LD BC, SN7_FNTBL ; BC := FUNCTION TABLE ADDRESS + LD DE, SN7_IDAT ; DE := SN7 INSTANCE DATA PTR + CALL SND_ADDENT ; ADD ENTRY, A := UNIT ASSIGNED + + CALL SN7_VOLUME_OFF + XOR A ; SIGNAL SUCCESS + RET + +;====================================================================== +; SN76489 DRIVER - SOUND ADAPTER (SND) FUNCTIONS +;====================================================================== +; + +SN7_RESET: + AUDTRACE(TRACE_INIT) + CALL SN7_VOLUME_OFF + XOR A ; SIGNAL SUCCESS + RET + +SN7_VOLUME_OFF: + AUDTRACE(TRACE_VOLUME_OFF) + + LD A, CHANNEL_0_SILENT + OUT (SN76489_PORT_LEFT), A + OUT (SN76489_PORT_RIGHT), A + + LD A, CHANNEL_1_SILENT + OUT (SN76489_PORT_LEFT), A + OUT (SN76489_PORT_RIGHT), A + + LD A, CHANNEL_2_SILENT + OUT (SN76489_PORT_LEFT), A + OUT (SN76489_PORT_RIGHT), A + + LD A, CHANNEL_3_SILENT + OUT (SN76489_PORT_LEFT), A + OUT (SN76489_PORT_RIGHT), A + + RET + +; BITS MAPING +; SET TONE: +; 1 CC 0 PPPP (LOW) +; 0 0 PPPPPP (HIGH) + +; 1 CC 1 VVVV + +SN7_VOLUME: + AUDDEBUG("SN7VOL ") + AUDTRACE_L + AUDDEBUG("\r\n") + LD A, L + LD (PENDING_VOLUME), A + + XOR A ; SIGNAL SUCCESS + RET + + + +SN7_NOTE: + AUDDEBUG("SN7NOT ") + AUDTRACE_L + AUDDEBUG("\r\n") + + ADD HL, HL ; SHIFT RIGHT (MULT 2) -INDEX INTO SN7NOTETBL TABLE OF WORDS + ; TEST IF HL IS LARGER THAN SN7NOTETBL SIZE + OR A ; CLEAR CARRY FLAG + LD DE, SIZ_SN7NOTETBL + SBC HL, DE + JR NC, SN7_NOTE1 ; INCOMING HL DOES NOT MAP INTO SN7NOTETBL + + ADD HL, DE ; RESTORE HL + LD E, L ; HL = SN7NOTETBL + HL + LD D, H + LD HL, SN7NOTETBL + ADD HL, DE + + LD A, (HL) ; RETRIEVE PITCH COUNT FROM SN7NOTETBL + INC HL + LD H, (HL) + LD L, A + + JR SN7_PITCH ; APPLY PITCH + +SN7_NOTE1: + OR $FF ; not implemented yet + RET + +SN7_PITCH: + AUDDEBUG("SN7PIT ") + AUDTRACE_HL + AUDDEBUG("\r\n") + LD (PENDING_PITCH), HL + + XOR A ; SIGNAL SUCCESS + RET + +SN7_PLAY: + AUDDEBUG("SN7PLY ") + AUDTRACE_D + AUDDEBUG("\r\n") + + CALL SN7_APPLY_VOL + CALL SN7_APPLY_PIT + + XOR A ; SIGNAL SUCCESS + RET + +SN7_QUERY: + LD A, E + CP SND_CHCNT + JR Z, SN7_QUERY_CHCNT + + CP SND_SPITCH + JR Z, SN7_QUERY_PITCH + + CP SND_SVOLUME + JR Z, SN7_QUERY_VOLUME + + OR $FF ; SIGNAL FAILURE + RET + +SN7_QUERY_CHCNT: + LD B, SN7_TONECNT + LD C, SN7_NOISECNT + XOR A + RET + +SN7_QUERY_PITCH: + LD HL, (PENDING_PITCH) + + XOR A + RET + +SN7_QUERY_VOLUME: + LD A, (PENDING_VOLUME) + LD L, A + LD H, 0 + + XOR A + RET + +; +; UTIL FUNCTIONS +; + +SN7_APPLY_VOL: ; APPLY VOLUME TO BOTH LEFT AND RIGHT CHANNELS + PUSH BC ; D CONTAINS THE CHANNEL NUMBER + PUSH AF + LD A, D + AND $3 + RLCA + RLCA + RLCA + RLCA + RLCA + OR $90 + LD B, A + + LD A, (PENDING_VOLUME) + RRCA + RRCA + RRCA + RRCA + + AND $0F + LD C, A + LD A, $0F + SUB C + AND $0F + OR B ; A CONTAINS COMMAND TO SET VOLUME FOR CHANNEL + + AUDTRACE(TRACE_PORT_WR) + AUDTRACE_A + AUDTRACE(TRACE_NEWLINE) + + OUT (SN76489_PORT_LEFT), A + OUT (SN76489_PORT_RIGHT), A + + POP AF + POP BC + RET + +SN7_APPLY_PIT: + PUSH DE + PUSH BC + PUSH AF + LD HL, (PENDING_PITCH) + + LD A, D + AND $3 + RLCA + RLCA + RLCA + RLCA + RLCA + OR $80 + LD B, A ; PITCH COMMAND 1 - CONTAINS CHANNEL ONLY + + LD A, L ; GET LOWER 4 BITS FOR COMMAND 1 + AND $F + OR B ; A NOW CONATINS FIRST PITCH COMMAND + + AUDTRACE(TRACE_PORT_WR) + AUDTRACE_A + AUDTRACE(TRACE_NEWLINE) + + OUT (SN76489_PORT_LEFT), A + OUT (SN76489_PORT_RIGHT), A + + LD A, L ; RIGHT SHIFT OUT THE LOWER 4 BITS + RRCA + RRCA + RRCA + RRCA + AND $F + LD B, A + + LD A, H + AND $3 + RLCA + RLCA + RLCA + RLCA ; AND PLACE IN BITS 5 AND 6 + OR B ; OR THE TWO SETS OF BITS TO MAKE 2ND PITCH COMMAND + + AUDTRACE(TRACE_PORT_WR) + AUDTRACE_A + AUDTRACE(TRACE_NEWLINE) + + OUT (SN76489_PORT_LEFT), A + OUT (SN76489_PORT_RIGHT), A + + POP AF + POP BC + POP DE + RET + + +SN7_FNTBL: + .DW SN7_RESET + .DW SN7_VOLUME + .DW SN7_PITCH + .DW SN7_NOTE + .DW SN7_PLAY + .DW SN7_QUERY + +#IF (($ - SN7_FNTBL) != (SND_FNCNT * 2)) + .ECHO "*** INVALID SND FUNCTION TABLE ***\n" + FAIL +#ENDIF + +PENDING_PITCH + .DW 0 ; PENDING PITCH (10 BITS) +PENDING_VOLUME + .DB 0 ; PENDING VOL (8 BITS -> downoverted to 4 BITS and inverted) + +STR_MESSAGELT .DB "\r\nSN76489: LEFT IO=0x$" +STR_MESSAGERT .DB ", RIGHT IO=0x$" + +#IF AUDIOTRACE +TRACE_INIT .DB "\r\nSN7_INIT CALLED\r\n$" +TRACE_VOLUME_OFF .DB "\r\nSN7_VOLUME_OFF\r\n$" +TRACE_VOLUME_SET .DB "\r\nSN7_VOLUME_SET CH: $" +TRACE_PLAY .DB "\r\nPLAY\r\n$" +TRACE_VOLUME .DB ", VOL: $" +TRACE_PORT_WR .DB "\r\nOUT SN76489, $" +TRACE_PITCH_SET .DB "\r\nSN7_PITCH_SET CH: $" +TRACE_PITCH .DB ", PITCH: $" +TRACE_NEWLINE .DB "\r\n$" +#ENDIF + +; THE FREQUENCY BY QUATER TONE STARTING AT A1# +SN7NOTETBL: + .dw A1S + .dw SN7RATIO / 5912 + .dw SN7RATIO / 5998 + .dw SN7RATIO / 6085 + .dw SN7RATIO / 6174 + .dw SN7RATIO / 6264 + .dw SN7RATIO / 6355 + .dw SN7RATIO / 6447 + .dw SN7RATIO / 6541 + .dw SN7RATIO / 6636 + .dw SN7RATIO / 6733 + .dw SN7RATIO / 6831 + .dw SN7RATIO / 6930 + .dw SN7RATIO / 7031 + .dw SN7RATIO / 7133 + .dw SN7RATIO / 7237 + .dw SN7RATIO / 7342 + .dw SN7RATIO / 7449 + .dw SN7RATIO / 7557 + .dw SN7RATIO / 7667 + .dw SN7RATIO / 7778 + .dw SN7RATIO / 7891 + .dw SN7RATIO / 8006 + .dw SN7RATIO / 8122 + .dw SN7RATIO / 8241 + .dw SN7RATIO / 8361 + .dw SN7RATIO / 8482 + .dw SN7RATIO / 8606 + .dw SN7RATIO / 8731 + .dw SN7RATIO / 8858 + .dw SN7RATIO / 8987 + .dw SN7RATIO / 9118 + .dw SN7RATIO / 9250 + .dw SN7RATIO / 9385 + .dw SN7RATIO / 9521 + .dw SN7RATIO / 9660 + .dw SN7RATIO / 9800 + .dw SN7RATIO / 9943 + .dw SN7RATIO / 10087 + .dw SN7RATIO / 10234 + .dw SN7RATIO / 10383 + .dw SN7RATIO / 10534 + .dw SN7RATIO / 10687 + .dw SN7RATIO / 10843 + .dw SN7RATIO / 11000 + .dw SN7RATIO / 11160 + .dw SN7RATIO / 11322 + .dw SN7RATIO / 11487 + .dw SN7RATIO / 11654 + .dw SN7RATIO / 11824 + .dw SN7RATIO / 11995 + .dw SN7RATIO / 12170 + .dw SN7RATIO / 12347 + .dw SN7RATIO / 12527 + .dw SN7RATIO / 12709 + .dw SN7RATIO / 12894 + .dw SN7RATIO / 13081 + .dw SN7RATIO / 13271 + .dw SN7RATIO / 13464 + .dw SN7RATIO / 13660 + .dw SN7RATIO / 13859 + .dw SN7RATIO / 14061 + .dw SN7RATIO / 14265 + .dw SN7RATIO / 14473 + .dw SN7RATIO / 14683 + .dw SN7RATIO / 14897 + .dw SN7RATIO / 15113 + .dw SN7RATIO / 15333 + .dw SN7RATIO / 15556 + .dw SN7RATIO / 15782 + .dw SN7RATIO / 16012 + .dw SN7RATIO / 16245 + .dw SN7RATIO / 16481 + .dw SN7RATIO / 16721 + .dw SN7RATIO / 16964 + .dw SN7RATIO / 17211 + .dw SN7RATIO / 17461 + .dw SN7RATIO / 17715 + .dw SN7RATIO / 17973 + .dw SN7RATIO / 18234 + .dw SN7RATIO / 18500 + .dw SN7RATIO / 18769 + .dw SN7RATIO / 19042 + .dw SN7RATIO / 19319 + .dw SN7RATIO / 19600 + .dw SN7RATIO / 19885 + .dw SN7RATIO / 20174 + .dw SN7RATIO / 20468 + .dw SN7RATIO / 20765 + .dw SN7RATIO / 21067 + .dw SN7RATIO / 21373 + .dw SN7RATIO / 21684 + .dw SN7RATIO / 22000 + .dw SN7RATIO / 22320 + .dw SN7RATIO / 22645 + .dw SN7RATIO / 22974 + .dw SN7RATIO / 23308 + .dw SN7RATIO / 23647 + .dw SN7RATIO / 23991 + .dw SN7RATIO / 24340 + .dw SN7RATIO / 24694 + .dw SN7RATIO / 25053 + .dw SN7RATIO / 25418 + .dw SN7RATIO / 25787 + .dw SN7RATIO / 26163 + .dw SN7RATIO / 26544 + .dw SN7RATIO / 26930 + .dw SN7RATIO / 27321 + .dw SN7RATIO / 27718 + .dw SN7RATIO / 28121 + .dw SN7RATIO / 28530 + .dw SN7RATIO / 28945 + .dw SN7RATIO / 29366 + .dw SN7RATIO / 29793 + .dw SN7RATIO / 30226 + .dw SN7RATIO / 30666 + .dw SN7RATIO / 31113 + .dw SN7RATIO / 31566 + .dw SN7RATIO / 32025 + .dw SN7RATIO / 32490 + .dw SN7RATIO / 32963 + .dw SN7RATIO / 33442 + .dw SN7RATIO / 33929 + .dw SN7RATIO / 34422 + .dw SN7RATIO / 34923 + .dw SN7RATIO / 35431 + .dw SN7RATIO / 35946 + .dw SN7RATIO / 36469 + .dw SN7RATIO / 36999 + .dw SN7RATIO / 37537 + .dw SN7RATIO / 38083 + .dw SN7RATIO / 38637 + .dw SN7RATIO / 39200 + .dw SN7RATIO / 39770 + .dw SN7RATIO / 40349 + .dw SN7RATIO / 40936 + .dw SN7RATIO / 41530 + .dw SN7RATIO / 42134 + .dw SN7RATIO / 42747 + .dw SN7RATIO / 43369 + .dw SN7RATIO / 44000 + .dw SN7RATIO / 44640 + .dw SN7RATIO / 45289 + .dw SN7RATIO / 45948 + .dw SN7RATIO / 46616 + .dw SN7RATIO / 47294 + .dw SN7RATIO / 47982 + .dw SN7RATIO / 48680 + .dw SN7RATIO / 49388 + .dw SN7RATIO / 50106 + .dw SN7RATIO / 50835 + .dw SN7RATIO / 51575 + .dw SN7RATIO / 52325 + .dw SN7RATIO / 53086 + .dw SN7RATIO / 53858 + .dw SN7RATIO / 54642 + .dw SN7RATIO / 55437 + .dw SN7RATIO / 56243 + .dw SN7RATIO / 57061 + .dw SN7RATIO / 57891 + .dw SN7RATIO / 58733 + .dw SN7RATIO / 59587 + .dw SN7RATIO / 60454 + .dw SN7RATIO / 61333 + .dw SN7RATIO / 62225 + .dw SN7RATIO / 63130 + .dw SN7RATIO / 64048 + .dw SN7RATIO / 64980 + .dw SN7RATIO / 65925 + .dw SN7RATIO / 66884 + .dw SN7RATIO / 67857 + .dw SN7RATIO / 68844 + .dw SN7RATIO / 69846 + .dw SN7RATIO / 70862 + .dw SN7RATIO / 71893 + .dw SN7RATIO / 72938 + .dw SN7RATIO / 73999 + .dw SN7RATIO / 75075 + .dw SN7RATIO / 76167 + .dw SN7RATIO / 77275 + .dw SN7RATIO / 78399 + .dw SN7RATIO / 79539 + .dw SN7RATIO / 80696 + .dw SN7RATIO / 81870 + .dw SN7RATIO / 83061 + .dw SN7RATIO / 84269 + .dw SN7RATIO / 85495 + .dw SN7RATIO / 86738 + .dw SN7RATIO / 88000 + .dw SN7RATIO / 89280 + .dw SN7RATIO / 90579 + .dw SN7RATIO / 91896 + .dw SN7RATIO / 93233 + .dw SN7RATIO / 94589 + .dw SN7RATIO / 95965 + .dw SN7RATIO / 97361 + .dw SN7RATIO / 98777 + .dw SN7RATIO / 100214 + .dw SN7RATIO / 101671 + .dw SN7RATIO / 103150 + .dw SN7RATIO / 104650 + .dw SN7RATIO / 106172 + .dw SN7RATIO / 107716 + .dw SN7RATIO / 109283 + .dw SN7RATIO / 110873 + .dw SN7RATIO / 112486 + .dw SN7RATIO / 114122 + .dw SN7RATIO / 115782 + .dw SN7RATIO / 117466 + .dw SN7RATIO / 119175 + .dw SN7RATIO / 120908 + .dw SN7RATIO / 122667 + .dw SN7RATIO / 124451 + .dw SN7RATIO / 126261 + .dw SN7RATIO / 128098 + .dw SN7RATIO / 129961 + .dw SN7RATIO / 131851 + .dw SN7RATIO / 133769 + .dw SN7RATIO / 135715 + .dw SN7RATIO / 137689 + .dw SN7RATIO / 139691 + .dw SN7RATIO / 141723 + .dw SN7RATIO / 143784 + .dw SN7RATIO / 145876 + .dw SN7RATIO / 147998 + .dw SN7RATIO / 150151 + .dw SN7RATIO / 152335 + .dw SN7RATIO / 154550 + .dw SN7RATIO / 156798 + .dw SN7RATIO / 159079 + .dw SN7RATIO / 161393 + .dw SN7RATIO / 163740 + .dw SN7RATIO / 166122 + .dw SN7RATIO / 168538 + .dw SN7RATIO / 170990 + .dw SN7RATIO / 173477 + .dw SN7RATIO / 176000 + .dw SN7RATIO / 178560 + .dw SN7RATIO / 181157 + .dw SN7RATIO / 183792 + .dw SN7RATIO / 186466 + .dw SN7RATIO / 189178 + .dw SN7RATIO / 191930 + .dw SN7RATIO / 194722 + .dw SN7RATIO / 197553 + .dw SN7RATIO / 200426 + .dw SN7RATIO / 203342 + .dw SN7RATIO / 206299 + .dw C7 + +SIZ_SN7NOTETBL .EQU $ - SN7NOTETBL + .ECHO "SN76489 approx " + .ECHO SIZ_SN7NOTETBL / 2 / 4 /12 + .ECHO " Octaves. Last note index supported: " + + .echo SIZ_SN7NOTETBL / 2 + .echo "\n" diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm index 1ba9f27f..93015bd8 100644 --- a/Source/HBIOS/std.asm +++ b/Source/HBIOS/std.asm @@ -12,7 +12,7 @@ ; 8. RCZ180 RC2014 based system with Z180 CPU ; 9. EZZ80 Easy Z80, Z80 SBC w/ RC2014 bus and CTC ; 10. SCZ180 Steve Cousins Z180 based system -; 11. DYNO Steve Garcia's Dyno Micro-ATX Motherboard +; 11. DYNO Steve Garcia's Dyno Micro-ATX Motherboard ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; @@ -207,7 +207,7 @@ SER_STOP2 .EQU 1 << 2 ; AND STORED AS 5 BITS: YXXXX ; SER_BAUD75 .EQU $00 << 8 -SER_BAUD150 .EQU $01 << 8 +SER_BAUD150 .EQU $01 << 8 SER_BAUD300 .EQU $02 << 8 SER_BAUD600 .EQU $03 << 8 SER_BAUD1200 .EQU $04 << 8 @@ -217,34 +217,34 @@ SER_BAUD9600 .EQU $07 << 8 SER_BAUD19200 .EQU $08 << 8 SER_BAUD38400 .EQU $09 << 8 SER_BAUD76800 .EQU $0A << 8 -SER_BAUD153600 .EQU $0B << 8 -SER_BAUD307200 .EQU $0C << 8 -SER_BAUD614400 .EQU $0D << 8 -SER_BAUD1228800 .EQU $0E << 8 -SER_BAUD2457600 .EQU $0F << 8 -SER_BAUD225 .EQU $10 << 8 -SER_BAUD450 .EQU $11 << 8 -SER_BAUD900 .EQU $12 << 8 -SER_BAUD1800 .EQU $13 << 8 -SER_BAUD3600 .EQU $14 << 8 -SER_BAUD7200 .EQU $15 << 8 -SER_BAUD14400 .EQU $16 << 8 -SER_BAUD28800 .EQU $17 << 8 -SER_BAUD57600 .EQU $18 << 8 +SER_BAUD153600 .EQU $0B << 8 +SER_BAUD307200 .EQU $0C << 8 +SER_BAUD614400 .EQU $0D << 8 +SER_BAUD1228800 .EQU $0E << 8 +SER_BAUD2457600 .EQU $0F << 8 +SER_BAUD225 .EQU $10 << 8 +SER_BAUD450 .EQU $11 << 8 +SER_BAUD900 .EQU $12 << 8 +SER_BAUD1800 .EQU $13 << 8 +SER_BAUD3600 .EQU $14 << 8 +SER_BAUD7200 .EQU $15 << 8 +SER_BAUD14400 .EQU $16 << 8 +SER_BAUD28800 .EQU $17 << 8 +SER_BAUD57600 .EQU $18 << 8 SER_BAUD115200 .EQU $19 << 8 SER_BAUD230400 .EQU $1A << 8 SER_BAUD460800 .EQU $1B << 8 -SER_BAUD921600 .EQU $1C << 8 -SER_BAUD1843200 .EQU $1D << 8 -SER_BAUD3686400 .EQU $1E << 8 -SER_BAUD7372800 .EQU $1F << 8 +SER_BAUD921600 .EQU $1C << 8 +SER_BAUD1843200 .EQU $1D << 8 +SER_BAUD3686400 .EQU $1E << 8 +SER_BAUD7372800 .EQU $1F << 8 ; SER_XON .EQU 1 << 6 SER_DTR .EQU 1 << 7 SER_RTS .EQU 1 << 13 ; -SER_75_8N1 .EQU SER_BAUD75 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_150_8N1 .EQU SER_BAUD150 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_75_8N1 .EQU SER_BAUD75 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_150_8N1 .EQU SER_BAUD150 | SER_DATA8 | SER_PARNONE | SER_STOP1 SER_300_8N1 .EQU SER_BAUD300 | SER_DATA8 | SER_PARNONE | SER_STOP1 SER_600_8N1 .EQU SER_BAUD600 | SER_DATA8 | SER_PARNONE | SER_STOP1 SER_1200_8N1 .EQU SER_BAUD1200 | SER_DATA8 | SER_PARNONE | SER_STOP1 @@ -254,27 +254,27 @@ SER_9600_8N1 .EQU SER_BAUD9600 | SER_DATA8 | SER_PARNONE | SER_STOP1 SER_19200_8N1 .EQU SER_BAUD19200 | SER_DATA8 | SER_PARNONE | SER_STOP1 SER_38400_8N1 .EQU SER_BAUD38400 | SER_DATA8 | SER_PARNONE | SER_STOP1 SER_76800_8N1 .EQU SER_BAUD76800 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_153600_8N1 .EQU SER_BAUD153600 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_307200_8N1 .EQU SER_BAUD307200 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_614400_8N1 .EQU SER_BAUD614400 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_1228800_8N1 .EQU SER_BAUD1228800 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_2457600_8N1 .EQU SER_BAUD2457600 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_225_8N1 .EQU SER_BAUD225 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_450_8N1 .EQU SER_BAUD450 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_900_8N1 .EQU SER_BAUD900 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_1800_8N1 .EQU SER_BAUD1800 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_3600_8N1 .EQU SER_BAUD3600 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_7200_8N1 .EQU SER_BAUD7200 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_14400_8N1 .EQU SER_BAUD14400 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_28800_8N1 .EQU SER_BAUD28800 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_57600_8N1 .EQU SER_BAUD57600 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_153600_8N1 .EQU SER_BAUD153600 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_307200_8N1 .EQU SER_BAUD307200 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_614400_8N1 .EQU SER_BAUD614400 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_1228800_8N1 .EQU SER_BAUD1228800 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_2457600_8N1 .EQU SER_BAUD2457600 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_225_8N1 .EQU SER_BAUD225 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_450_8N1 .EQU SER_BAUD450 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_900_8N1 .EQU SER_BAUD900 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_1800_8N1 .EQU SER_BAUD1800 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_3600_8N1 .EQU SER_BAUD3600 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_7200_8N1 .EQU SER_BAUD7200 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_14400_8N1 .EQU SER_BAUD14400 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_28800_8N1 .EQU SER_BAUD28800 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_57600_8N1 .EQU SER_BAUD57600 | SER_DATA8 | SER_PARNONE | SER_STOP1 SER_115200_8N1 .EQU SER_BAUD115200 | SER_DATA8 | SER_PARNONE | SER_STOP1 SER_230400_8N1 .EQU SER_BAUD230400 | SER_DATA8 | SER_PARNONE | SER_STOP1 SER_460800_8N1 .EQU SER_BAUD460800 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_921600_8N1 .EQU SER_BAUD921600 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_1843200_8N1 .EQU SER_BAUD1843200 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_3686400_8N1 .EQU SER_BAUD3686400 | SER_DATA8 | SER_PARNONE | SER_STOP1 -SER_7372800_8N1 .EQU SER_BAUD7372800 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_921600_8N1 .EQU SER_BAUD921600 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_1843200_8N1 .EQU SER_BAUD1843200 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_3686400_8N1 .EQU SER_BAUD3686400 | SER_DATA8 | SER_PARNONE | SER_STOP1 +SER_7372800_8N1 .EQU SER_BAUD7372800 | SER_DATA8 | SER_PARNONE | SER_STOP1 ; ; TERMENABLE CONTROLS INCLUSION OF TERMINAL PSEUDO-DEVICE DRIVER ; IT IS SET TO TRUE BY THE INCLUSION OF ANY VDA DRIVER. @@ -304,7 +304,7 @@ EMUTYP_ANSI .EQU 2 ; ANSI ; ; DEVICE DRIVER TO BE INITIALIZED FIRST. FIRST CIO DRIVER, UNIT 0 INITIALIZED BECOMES PRIMARY CONSOLE. ; IS AN INDEX INTO THE ENABLED INITIALIZATION DRIVER LIST i.e. ASCI, UART, SIO, ACIA, PIO, UF ETC. -; EXAMPLE: IF ONLY UART, SIO AND PIO ARE ENABLE AND THE SIO IS DESIRED AS THE PRIMARY CONSOLE, +; EXAMPLE: IF ONLY UART, SIO AND PIO ARE ENABLE AND THE SIO IS DESIRED AS THE PRIMARY CONSOLE, ; SET FORCECON TO 2 IN YOUR CUSTOM CONFIGURATION FILE i.e. "FORCECON: .SET 2" ; FORCECON .EQU 0 ; DEFAULT IS TO FOLLOW NORMAL SEQUENCE @@ -430,7 +430,7 @@ GAM_LOC .EQU $0200 ; GAME 2048 GAM_SIZ .EQU $0900 GAM_END .EQU GAM_LOC + GAM_SIZ -USR_LOC .EQU $0200 ; USER +USR_LOC .EQU $0200 ; USER USR_SIZ .EQU $1000 USR_END .EQU USR_LOC + USR_SIZ @@ -462,7 +462,7 @@ INT_SIO0 .EQU 13 ; ZILOG SIO 0, CHANNEL A & B INT_SIO1 .EQU 14 ; ZILOG SIO 1, CHANNEL A & B #ELSE - + ; Z80-BASED SYSTEMS INT_CTC0A .EQU 0 ; ZILOG CTC 0, CHANNEL A @@ -477,7 +477,7 @@ INT_PIO1A .EQU 11 ; ZILOG PIO 1, CHANNEL A INT_PIO1B .EQU 12 ; ZILOG PIO 1, CHANNEL B #ENDIF - + #DEFINE IVT(INTX) HB_IVT+(INTX * 4)+1 #DEFINE VEC(INTX) INTX*2 @@ -488,6 +488,7 @@ INT_PIO1B .EQU 12 ; ZILOG PIO 1, CHANNEL B #DEFINE PRTC(C) CALL PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X') #DEFINE PRTS(S) CALL PRTSTRD \ .TEXT S ; PRINT STRING S TO CONSOLE - PRTD("HELLO") #DEFINE PRTX(X) CALL PRTSTRI \ .DW X ; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO) +#DEFINE DEBUG(S) CALL PRTSTRD \ .TEXT S \ .TEXT "$" ; $$$$$$ PRINT STRING S TO CONSOLE - PRTD("HELLO") - NO TRAILING $ REQUIRED ; #DEFINE XIO_PRTC(C) CALL XIO_PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X') #DEFINE XIO_PRTS(S) CALL XIO_PRTSTRD \ .DB S ; PRINT STRING S TO CONSOLE - PRTD("HELLO") diff --git a/Source/Makefile b/Source/Makefile index 166bb4c1..63c4204f 100644 --- a/Source/Makefile +++ b/Source/Makefile @@ -2,7 +2,7 @@ # order is actually important, because of build dependencies # SUBDIRS = Prop -SUBDIRS += Apps +SUBDIRS += Apps SUBDIRS += CBIOS SUBDIRS += Forth SUBDIRS += Fonts From d14cf27acfec0f14803d873505486e826bbbf6d5 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Wed, 22 Apr 2020 11:26:32 -0700 Subject: [PATCH 020/339] Miscellaneous Cleanup No functional changes. --- Doc/ChangeLog.txt | 2 + Doc/RomWBW Applications.pdf | Bin 140215 -> 140215 bytes Doc/RomWBW Architecture.pdf | Bin 371105 -> 396943 bytes Doc/RomWBW Getting Started.pdf | Bin 166096 -> 166220 bytes ReadMe.md | 7 +- ReadMe.txt | 7 +- Source/Doc/Architecture.md | 72 ++-- Source/Doc/GettingStarted.md | 5 +- Source/HBIOS/Config/RCZ80_std.asm | 2 +- Source/HBIOS/audio.inc | 52 +-- Source/HBIOS/cfg_dyno.asm | 4 +- Source/HBIOS/cfg_ezz80.asm | 4 +- Source/HBIOS/cfg_master.asm | 4 +- Source/HBIOS/cfg_mk4.asm | 4 +- Source/HBIOS/cfg_n8.asm | 4 +- Source/HBIOS/cfg_rcz180.asm | 4 +- Source/HBIOS/cfg_sbc.asm | 4 +- Source/HBIOS/cfg_scz180.asm | 4 +- Source/HBIOS/cfg_zeta.asm | 4 +- Source/HBIOS/cfg_zeta2.asm | 4 +- Source/HBIOS/hbios.asm | 20 +- Source/HBIOS/hbios.inc | 13 +- Source/HBIOS/sn76489.asm | 552 +++++++++++++++--------------- Source/HBIOS/std.asm | 24 +- Source/HBIOS/util.asm | 11 + Source/ver.inc | 2 +- Source/ver.lib | 2 +- 27 files changed, 425 insertions(+), 386 deletions(-) diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt index 1d48213c..50f5f407 100644 --- a/Doc/ChangeLog.txt +++ b/Doc/ChangeLog.txt @@ -9,6 +9,8 @@ Version 3.1 - WBW: Support use of CTC for SIO baud rate divisors - WBW: Updated IDE and PPIDE drivers to improve old CF Card compatibility - WBW: Support TIMER mode in CTC driver +- D?N: Added sound driver support +- D?N: Added SN76489 sound chip driver Version 3.0.1 ------------- diff --git a/Doc/RomWBW Applications.pdf b/Doc/RomWBW Applications.pdf index 4fdbaee45f2fef4c43fd928b2e3d648a992e9479..8bc1135e2ed68689ef93bf92ab3df4f12e39df52 100644 GIT binary patch delta 113 zcmdmfoMZcOj)pCa>c2RQj0_D8O-u}?>;GbuhV!-u{bFR*bT%|Hbu}^pLPujKBPUlg fQ$sUHR~J)9V>e?XQ%4skI|Um;N~X_JW|9Q}87CcE delta 113 zcmdmfoMZcOj)pCa>c2P)O${tf3=9pY>;GbuhV!-u{bFR*bT+qibaXXyG&C?acCs*b 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z)4YHKqc{Tj9jvf=0$pbRUTsJ~g_Kppa>ZMc(Dj*IDf7LG>SjM0~(n2_*NiL*fIq1 zqk8n#c@(r-{OKCl1vEJP3rQS;8?cLjnh7xI^Cv>kN$_SWV1Gb_O9cW(N64Qv%CB1} z*s1WL1<+`yZh=OrZ-XI|%U~GCFBKp@_{a_z;rFk^pfe&D|oj@xd88!XBLr7MR53Nj5ZzO}3|PaXUK}bkH<8 miMAA3{J$)oB1=ofh)Cb?$W`I~0gAGu#tB7ZV|(YxivI_887f8q diff --git a/ReadMe.md b/ReadMe.md index 030e20e5..0ef34b7f 100644 --- a/ReadMe.md +++ b/ReadMe.md @@ -3,7 +3,7 @@ ## Z80/Z180 System Software Version 3.1 Pre-release -Wednesday 15 April 2020 +Wednesday 22 April 2020 Wayne Warthen @@ -1141,8 +1141,11 @@ applications are no longer provided. list of general code enhancements. - Phillip Stevens contributed support for FreeRTOS. - Curt Mayer contributed the Linux / MacOS build process. - - UNA BIOS and FDISK80 is a product of John Coffman. + - UNA BIOS and FDISK80 are the products of John Coffman. - FLASH4 is a product of Will Sowerbutts. + - CLRDIR is a product of Max Scane. + - Dean Netherton contributed the sound driver interface and the + SN76489 sound driver. Contributions of all kinds to RomWBW are very welcome. diff --git a/ReadMe.txt b/ReadMe.txt index e0241d40..4337d2cb 100644 --- a/ReadMe.txt +++ b/ReadMe.txt @@ -3,7 +3,7 @@ RomWBW Z80/Z180 System Software Version 3.1 Pre-release -Wednesday 15 April 2020 +Wednesday 22 April 2020 Wayne Warthen wwarthen@gmail.com @@ -1173,8 +1173,11 @@ applications are no longer provided. list of general code enhancements. - Phillip Stevens contributed support for FreeRTOS. - Curt Mayer contributed the Linux / MacOS build process. -- UNA BIOS and FDISK80 is a product of John Coffman. +- UNA BIOS and FDISK80 are the products of John Coffman. - FLASH4 is a product of Will Sowerbutts. +- CLRDIR is a product of Max Scane. +- Dean Netherton contributed the sound driver interface and the + SN76489 sound driver. Contributions of all kinds to RomWBW are very welcome. diff --git a/Source/Doc/Architecture.md b/Source/Doc/Architecture.md index eb962567..94c9a85d 100644 --- a/Source/Doc/Architecture.md +++ b/Source/Doc/Architecture.md @@ -1299,7 +1299,7 @@ Sound (SND) | _Entry Parameters_ | B: 0x50 -| C: The audio device unit number +| C: Audio Device Unit ID | _Exit Results_ | A: Status (0=OK, else error) @@ -1311,53 +1311,62 @@ channels to silence. | _Entry Parameters_ | B: 0x51 -| C: The audio device unit number -| L: The volume to be applied (00=Silence, FF=Maximum) +| C: Audio Device Unit ID +| L: Volume (00=Silence, FF=Maximum) | _Exit Results_ | A: Status (0=OK, else error) -This function set the volume configuration command. The volume will -be applied when the SNDPLAY function is invoked. +This function sets the sound chip volume parameter. The volume will +be applied when the next SNDPLAY function is invoked. -### Function 0x52 -- Sound Volume (SNDPIT) +Note that not all sounds chips implement 256 volume levels. The +driver will scale the volume to the closest possible level the +chip provides. + +### Function 0x52 -- Sound Pitch (SNDPIT) | _Entry Parameters_ | B: 0x52 -| C: The audio device unit number -| HL: The pitch to be applied (0000=lowest note, FFFF=highest note) +| C: Audio Device Unit ID +| HL: Pitch (0000=lowest note, FFFF=highest note) + +This function sets the sound chip pitch parameter. The pitch will +be applied when the next SNDPLAY function is invoked. -This function set the pitch configuration command. The pitch will -be applied when the SNDPLAY function is invoked. +The pitch value is a driver specific value. To play standardized +notes, use the SNDNOTE function. -### Function 0x53 -- Sound Volume (SNDNOTE) +### Function 0x53 -- Sound Note (SNDNOTE) | _Entry Parameters_ -| B: 0x52 -| C: The audio device unit number -| L: A number from 0 to 255 selecting quarter notes +| B: 0x53 +| C: Audio Device Unit ID +| L: Note (0 to 255 quarter notes) -This function will apply a pitch value to the sound chip. +This function sets the sound chip pitch parameter according to +standardized notes. -The value correspond to standard musical notes. The value allows for selection -of a quarter of a semitone by giving a value between 0 and upto the drivers maximum -supported value. The lowest note is (0). +The value corresponds to standard musical notes. The value allows +for selection of a quarter of a semitone by giving a value between 0 +and up to the drivers maximum supported value. The lowest note is (0). -For the SN76490 chip, 0 corresponds to note A1# and the value 249 is the maximum -supported value, and it corresponds to note C7. +For the SN76490 chip, 0 corresponds to note A1# and the value 249 is +the maximum supported value, and it corresponds to note C7. ### Function 0x54 -- Sound Play (SNDPLAY) | _Entry Parameters_ -| B: 0x53 -| C: The audio device unit number -| D: The channel to play the previously configured tone +| B: 0x54 +| C: Audio Device Unit ID +| D: Channel -This function set the pitch and volume previously configured with the SNDPIT -and SNDVOL functions. +This function applies the previously specified volume and pitch by +programming the sound chip with the appropriate values. The values +are applied to the specified channel of the chip. -For example, to play a specific note, on the first installed driver, the following -HBIOS calls would need to be made +For example, to play a specific note on Audio Device UNit 0, +the following HBIOS calls would need to be made: ``` HBIOS B=51 C=00 L=80 ; Set volume to half level @@ -1555,6 +1564,15 @@ available along with the registers/information returned. | A: Status (0=OK, else error) | E: Count of Video Device Units +#### SYSGET Subfunction 0x50 -- Get Sound Device Unit Count (SNDCNT) + +| _Entry Parameters_ +| BC: 0xF850 + +| _Returned Values_ +| A: Status (0=OK, else error) +| E: Count of Sound Device Units + #### SYSGET Subfunction 0xD0 -- Get Timer Tick Count (TIMER) | _Entry Parameters_ diff --git a/Source/Doc/GettingStarted.md b/Source/Doc/GettingStarted.md index a92b189a..4148a245 100644 --- a/Source/Doc/GettingStarted.md +++ b/Source/Doc/GettingStarted.md @@ -1194,8 +1194,11 @@ platform. list of general code enhancements. * Phillip Stevens contributed support for FreeRTOS. * Curt Mayer contributed the Linux / MacOS build process. -* UNA BIOS and FDISK80 is a product of John Coffman. +* UNA BIOS and FDISK80 are the products of John Coffman. * FLASH4 is a product of Will Sowerbutts. +* CLRDIR is a product of Max Scane. +* Dean Netherton contributed the sound driver interface and +the SN76489 sound driver. Contributions of all kinds to RomWBW are very welcome. diff --git a/Source/HBIOS/Config/RCZ80_std.asm b/Source/HBIOS/Config/RCZ80_std.asm index 5b120cb7..5766331e 100644 --- a/Source/HBIOS/Config/RCZ80_std.asm +++ b/Source/HBIOS/Config/RCZ80_std.asm @@ -38,5 +38,5 @@ FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) ; PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) - +; SN76489ENABLE .SET FALSE ; SN76489 SOUND DRIVER diff --git a/Source/HBIOS/audio.inc b/Source/HBIOS/audio.inc index e171eb41..e1a9fbe4 100644 --- a/Source/HBIOS/audio.inc +++ b/Source/HBIOS/audio.inc @@ -1,26 +1,26 @@ -#IF AUDIOTRACE -#DEFINE AUDTRACE(STR) PUSH DE \ LD DE, STR \ CALL WRITESTR \ POP DE -#DEFINE AUDTRACE_A CALL PRTHEXBYTE -#DEFINE AUDTRACE_B PUSH AF \ LD A, B \ CALL PRTHEXBYTE \ POP AF -#DEFINE AUDTRACE_D PUSH AF \ LD A, D \ CALL PRTHEXBYTE \ POP AF -#DEFINE AUDTRACE_E PUSH AF \ LD A, E \ CALL PRTHEXBYTE \ POP AF -#DEFINE AUDTRACE_L PUSH AF \ LD A, L \ CALL PRTHEXBYTE \ POP AF -#DEFINE AUDTRACE_HL CALL PRTHEXWORDHL -#DEFINE AUDTRACE_DE PUSH DE \ PUSH DE \ POP HL \ CALL PRTHEXWORDHL \ POP DE -#DEFINE AUDTRACE_IY PUSH HL \ PUSH IY \ POP HL \ CALL PRTHEXWORDHL \ POP HL - -#DEFINE AUDDEBUG(S) CALL PRTSTRD \ .TEXT S \ .TEXT "$" ; $$$$$$ PRINT STRING S TO CONSOLE - PRTD("HELLO") - NO TRAILING $ REQUIRED - -#ELSE -#DEFINE AUDTRACE(S) -#DEFINE AUDTRACE_A -#DEFINE AUDTRACE_B -#DEFINE AUDTRACE_D -#DEFINE AUDTRACE_E -#DEFINE AUDTRACE_L -#DEFINE AUDTRACE_HL -#DEFINE AUDTRACE_DE -#DEFINE AUDTRACE_IY - -#DEFINE AUDDEBUG(STR) -#ENDIF +#IF AUDIOTRACE +#DEFINE AUDTRACE(STR) PUSH DE \ LD DE, STR \ CALL WRITESTR \ POP DE +#DEFINE AUDTRACE_A CALL PRTHEXBYTE +#DEFINE AUDTRACE_B PUSH AF \ LD A, B \ CALL PRTHEXBYTE \ POP AF +#DEFINE AUDTRACE_D PUSH AF \ LD A, D \ CALL PRTHEXBYTE \ POP AF +#DEFINE AUDTRACE_E PUSH AF \ LD A, E \ CALL PRTHEXBYTE \ POP AF +#DEFINE AUDTRACE_L PUSH AF \ LD A, L \ CALL PRTHEXBYTE \ POP AF +#DEFINE AUDTRACE_HL CALL PRTHEXWORDHL +#DEFINE AUDTRACE_DE PUSH DE \ PUSH DE \ POP HL \ CALL PRTHEXWORDHL \ POP DE +#DEFINE AUDTRACE_IY PUSH HL \ PUSH IY \ POP HL \ CALL PRTHEXWORDHL \ POP HL + +#DEFINE AUDDEBUG(S) CALL PRTSTRD \ .TEXT S \ .TEXT "$" ; $$$$$$ PRINT STRING S TO CONSOLE - PRTD("HELLO") - NO TRAILING $ REQUIRED + +#ELSE +#DEFINE AUDTRACE(S) +#DEFINE AUDTRACE_A +#DEFINE AUDTRACE_B +#DEFINE AUDTRACE_D +#DEFINE AUDTRACE_E +#DEFINE AUDTRACE_L +#DEFINE AUDTRACE_HL +#DEFINE AUDTRACE_DE +#DEFINE AUDTRACE_IY + +#DEFINE AUDDEBUG(STR) +#ENDIF diff --git a/Source/HBIOS/cfg_dyno.asm b/Source/HBIOS/cfg_dyno.asm index 01c0f32b..8226482d 100644 --- a/Source/HBIOS/cfg_dyno.asm +++ b/Source/HBIOS/cfg_dyno.asm @@ -155,5 +155,5 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) -SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER -AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_ezz80.asm b/Source/HBIOS/cfg_ezz80.asm index 385ca6d7..990d2e1d 100644 --- a/Source/HBIOS/cfg_ezz80.asm +++ b/Source/HBIOS/cfg_ezz80.asm @@ -180,5 +180,5 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) -SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER -AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_master.asm b/Source/HBIOS/cfg_master.asm index a4cf63d5..faafae4e 100644 --- a/Source/HBIOS/cfg_master.asm +++ b/Source/HBIOS/cfg_master.asm @@ -235,5 +235,5 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .EQU $0C ; UF: REGISTERS BASE ADR -SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER -AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_mk4.asm b/Source/HBIOS/cfg_mk4.asm index 191128bd..8e23bf25 100644 --- a/Source/HBIOS/cfg_mk4.asm +++ b/Source/HBIOS/cfg_mk4.asm @@ -189,5 +189,5 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .EQU $0C ; UF: REGISTERS BASE ADR -SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER -AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_n8.asm b/Source/HBIOS/cfg_n8.asm index 48362ebf..7cb9a714 100644 --- a/Source/HBIOS/cfg_n8.asm +++ b/Source/HBIOS/cfg_n8.asm @@ -189,5 +189,5 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) FIFO_BASE .EQU $0C ; UF: REGISTERS BASE ADR -SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER -AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm index 18037ad3..fcdf9d72 100644 --- a/Source/HBIOS/cfg_rcz180.asm +++ b/Source/HBIOS/cfg_rcz180.asm @@ -189,5 +189,5 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) -SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER -AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_sbc.asm b/Source/HBIOS/cfg_sbc.asm index 60b8675d..e682bc01 100644 --- a/Source/HBIOS/cfg_sbc.asm +++ b/Source/HBIOS/cfg_sbc.asm @@ -191,5 +191,5 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .EQU $0C ; UF: REGISTERS BASE ADR -SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER -AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_scz180.asm b/Source/HBIOS/cfg_scz180.asm index e16892a0..07d679ce 100644 --- a/Source/HBIOS/cfg_scz180.asm +++ b/Source/HBIOS/cfg_scz180.asm @@ -184,5 +184,5 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) -SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER -AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_zeta.asm b/Source/HBIOS/cfg_zeta.asm index 6a3982a7..93dcb107 100644 --- a/Source/HBIOS/cfg_zeta.asm +++ b/Source/HBIOS/cfg_zeta.asm @@ -135,5 +135,5 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) -SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER -AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_zeta2.asm b/Source/HBIOS/cfg_zeta2.asm index e5422759..e42d0503 100644 --- a/Source/HBIOS/cfg_zeta2.asm +++ b/Source/HBIOS/cfg_zeta2.asm @@ -145,5 +145,5 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) -SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER -AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER \ No newline at end of file +SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index 81404dcf..3af09e56 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -1030,7 +1030,7 @@ SAVE_REC_M: LD (HB_BOOT_REC),A ; SAVE FOR LATER #ENDIF #IF (BT_REC_TYPE == BT_REC_SBCRI) - IN A,($68 + 6) ; UART_MSR MODEM + IN A,($68 + 6) ; UART_MSR MODEM BIT 6,A ; STATUS REGISTER LD A,0 ; BIT 6 JR Z,SAVE_REC_M ; IS RECOVERY MODE @@ -1098,17 +1098,17 @@ SAVE_REC_M: INC L ; FLAG Z80180 OR BETTER ; ; TEST FOR OLDER S-CLASS (REV K) - IN0 A,(Z180_CCR) ; SUPPOSEDLY ONLY ON S-CLASS - INC A ; FF -> 0 + IN0 A,(Z180_CCR) ; SUPPOSEDLY ONLY ON S-CLASS + INC A ; FF -> 0 JR Z,HB_CPU1 INC L ; FLAG Z8S180 REV K (SL1960) OR BETTER ; ; TEST FOR NEWER S-CLASS (REV N) ; ON OLDER S-CLASS, ASCI TIME CONSTANT REG DOES NOT EXIST ; AND WILL ALWYAS READ BACK AS $FF - OUT0 (Z180_ASTC1L),D ; D = 0 AT THIS POINT - IN0 A,(Z180_ASTC1L) ; ASCI TIME CONSTANT REG - INC A ; FF -> 0 + OUT0 (Z180_ASTC1L),D ; D = 0 AT THIS POINT + IN0 A,(Z180_ASTC1L) ; ASCI TIME CONSTANT REG + INC A ; FF -> 0 JR Z,HB_CPU1 INC L ; FLAG Z8S180 REV N W/ ASCI BRG ; @@ -1647,9 +1647,6 @@ HB_PCINITTBLLEN .EQU (($ - HB_PCINITTBL) / 2) ;================================================================================================== ; HB_INITTBL: -#IF (SN76489ENABLE) - .DW SN76489_INIT -#ENDIF #IF (CTCENABLE) .DW CTC_INIT #ENDIF @@ -1659,6 +1656,9 @@ HB_INITTBL: #IF (AYENABLE) .DW AY_INIT ; AUDIBLE INDICATOR OF BOOT START #ENDIF +#IF (SN76489ENABLE) + .DW SN76489_INIT +#ENDIF #IF (ASCIENABLE) .DW ASCI_INIT #ENDIF @@ -3959,7 +3959,7 @@ PS_FLP_FSTR: .TEXT "8\",$" ; PS_FLP8 PS_FLP_SSTR: .TEXT "SS/$" ; PS_FLPSS .TEXT "DS/$" ; PS_FLPDS ; -PS_FLP_DSTR: .TEXT "SD$" ; PS_FLPSD +PS_FLP_DSTR: .TEXT "SD$" ; PS_FLPSD .TEXT "DD$" ; PS_FLPDD .TEXT "HD$" ; PS_FLPHD .TEXT "ED$" ; PS_FLPED diff --git a/Source/HBIOS/hbios.inc b/Source/HBIOS/hbios.inc index 477fcdfe..17a9ae23 100644 --- a/Source/HBIOS/hbios.inc +++ b/Source/HBIOS/hbios.inc @@ -51,7 +51,7 @@ BF_VDASCR .EQU BF_VDA + 11 ; SCROLL BF_VDAKST .EQU BF_VDA + 12 ; GET KEYBOARD STATUS BF_VDAKFL .EQU BF_VDA + 13 ; FLUSH KEYBOARD BUFFER BF_VDAKRD .EQU BF_VDA + 14 ; READ KEYBOARD - +; BF_SND .EQU $50 BF_SNDRESET .EQU BF_SND + 0 ; RESET SOUND SYSTEM BF_SNDVOL .EQU BF_SND + 1 ; REQUEST SOUND VOL - L CONTAINS VOLUME (255 MAX, 0 SILENT) - SCALED AS REQUIRED BY DRIVER (EG: MAPS TO JUST 4 BIT RESOLUTION FOR SN76489) @@ -59,13 +59,12 @@ BF_SNDPIT .EQU BF_SND + 2 ; REQUEST SOUND PITCH - HL CONTAINS PITCH DRIVER SPECI BF_SNDNOTE .EQU BF_SND + 3 ; REQUEST NOTE - L CONTAINS NOTE - EACH VALUE IS QUARTER NOTE BF_SNDPLAY .EQU BF_SND + 4 ; INITIATE THE REQUESTED SOUND COMMAND BF_SNDQUERY .EQU BF_SND + 5 ; D IS CHANNEL, E IS SUBCOMMAND - +; ; BF_SNDQUERY SUBCOMMANDS -SND_STATUS .EQU 0 -SND_CHCNT .EQU SND_STATUS + 1 ; RETURN COUNT OF CHANNELS -SND_SVOLUME .EQU SND_STATUS + 2 ; 8 BIT NUMBER -SND_SPITCH .EQU SND_STATUS + 3 ; 16 BIT NUMBER - +BF_SNDQ_STATUS .EQU 0 +BF_SNDQ_CHCNT .EQU BF_SNDQ_STATUS + 1 ; RETURN COUNT OF CHANNELS +BF_SNDQ_SVOLUME .EQU BF_SNDQ_STATUS + 2 ; 8 BIT NUMBER +BF_SNDQ_SPITCH .EQU BF_SNDQ_STATUS + 3 ; 16 BIT NUMBER ; BF_SYS .EQU $F0 BF_SYSRESET .EQU BF_SYS + 0 ; SOFT RESET HBIOS diff --git a/Source/HBIOS/sn76489.asm b/Source/HBIOS/sn76489.asm index 68928dfb..18f7f649 100644 --- a/Source/HBIOS/sn76489.asm +++ b/Source/HBIOS/sn76489.asm @@ -11,9 +11,9 @@ ;====================================================================== ; -SN76489_PORT_LEFT .EQU $FC ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT) -SN76489_PORT_RIGHT .EQU $F8 ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT) -SN7_IDAT .EQU 0 +SN76489_PORT_LEFT .EQU $FC ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT) +SN76489_PORT_RIGHT .EQU $F8 ; PORTS FOR ACCESSING THE SN76489 CHIP (RIGHT) +SN7_IDAT .EQU 0 SN7_TONECNT .EQU 3 ; COUNT NUMBER OF TONE CHANNELS SN7_NOISECNT .EQU 1 ; COUNT NUMBER OF NOISE CHANNELS SN7_CHCNT .EQU SN7_TONECNT + SN7_NOISECNT @@ -23,33 +23,33 @@ CHANNEL_2_SILENT .EQU $DF CHANNEL_3_SILENT .EQU $FF SN7CLKDIVIDER .EQU 4 -SN7CLK .EQU CPUOSC / SN7CLKDIVIDER +SN7CLK .EQU CPUOSC / SN7CLKDIVIDER SN7RATIO .EQU SN7CLK * 100 / 32 SN7_FIRST_NOTE .EQU 5827 ; A1# -SN7_LAST_NODE .EQU 209300 ; C7 +SN7_LAST_NOTE .EQU 209300 ; C7 -A1S .equ SN7RATIO / SN7_FIRST_NOTE -C7 .EQU SN7RATIO / SN7_LAST_NODE +A1S .EQU SN7RATIO / SN7_FIRST_NOTE +C7 .EQU SN7RATIO / SN7_LAST_NOTE - .echo "SN76489: range of A1# (pitch: " - .echo A1S - .echo ") to C7 (pitch: " - .echo C7 - .echo ")\n" + .ECHO "SN76489: range of A1# (pitch: " + .ECHO A1S + .ECHO ") to C7 (pitch: " + .ECHO C7 + .ECHO ")\n" -#include "audio.inc" +#INCLUDE "audio.inc" SN76489_INIT: LD IY, SN7_IDAT ; POINTER TO INSTANCE DATA - LD DE,STR_MESSAGELT + LD DE,STR_MESSAGELT CALL WRITESTR LD A, SN76489_PORT_LEFT CALL PRTHEXBYTE - LD DE,STR_MESSAGERT + LD DE,STR_MESSAGERT CALL WRITESTR LD A, SN76489_PORT_RIGHT CALL PRTHEXBYTE @@ -95,7 +95,7 @@ SN7_VOLUME_OFF: RET -; BITS MAPING +; BIT MAPPING ; SET TONE: ; 1 CC 0 PPPP (LOW) ; 0 0 PPPPPP (HIGH) @@ -121,10 +121,10 @@ SN7_NOTE: ADD HL, HL ; SHIFT RIGHT (MULT 2) -INDEX INTO SN7NOTETBL TABLE OF WORDS ; TEST IF HL IS LARGER THAN SN7NOTETBL SIZE - OR A ; CLEAR CARRY FLAG + OR A ; CLEAR CARRY FLAG LD DE, SIZ_SN7NOTETBL - SBC HL, DE - JR NC, SN7_NOTE1 ; INCOMING HL DOES NOT MAP INTO SN7NOTETBL + SBC HL, DE + JR NC, SN7_NOTE1 ; INCOMING HL DOES NOT MAP INTO SN7NOTETBL ADD HL, DE ; RESTORE HL LD E, L ; HL = SN7NOTETBL + HL @@ -140,7 +140,7 @@ SN7_NOTE: JR SN7_PITCH ; APPLY PITCH SN7_NOTE1: - OR $FF ; not implemented yet + OR $FF ; NOT IMPLEMENTED YET RET SN7_PITCH: @@ -165,13 +165,13 @@ SN7_PLAY: SN7_QUERY: LD A, E - CP SND_CHCNT + CP BF_SNDQ_CHCNT JR Z, SN7_QUERY_CHCNT - CP SND_SPITCH + CP BF_SNDQ_SPITCH JR Z, SN7_QUERY_PITCH - CP SND_SVOLUME + CP BF_SNDQ_SVOLUME JR Z, SN7_QUERY_VOLUME OR $FF ; SIGNAL FAILURE @@ -310,7 +310,7 @@ SN7_FNTBL: PENDING_PITCH .DW 0 ; PENDING PITCH (10 BITS) PENDING_VOLUME - .DB 0 ; PENDING VOL (8 BITS -> downoverted to 4 BITS and inverted) + .DB 0 ; PENDING VOL (8 BITS -> DOWNOVERTED TO 4 BITS AND INVERTED) STR_MESSAGELT .DB "\r\nSN76489: LEFT IO=0x$" STR_MESSAGERT .DB ", RIGHT IO=0x$" @@ -324,265 +324,265 @@ TRACE_VOLUME .DB ", VOL: $" TRACE_PORT_WR .DB "\r\nOUT SN76489, $" TRACE_PITCH_SET .DB "\r\nSN7_PITCH_SET CH: $" TRACE_PITCH .DB ", PITCH: $" -TRACE_NEWLINE .DB "\r\n$" +TRACE_NEWLINE .DB "\r\n$" #ENDIF ; THE FREQUENCY BY QUATER TONE STARTING AT A1# SN7NOTETBL: - .dw A1S - .dw SN7RATIO / 5912 - .dw SN7RATIO / 5998 - .dw SN7RATIO / 6085 - .dw SN7RATIO / 6174 - .dw SN7RATIO / 6264 - .dw SN7RATIO / 6355 - .dw SN7RATIO / 6447 - .dw SN7RATIO / 6541 - .dw SN7RATIO / 6636 - .dw SN7RATIO / 6733 - .dw SN7RATIO / 6831 - .dw SN7RATIO / 6930 - .dw SN7RATIO / 7031 - .dw SN7RATIO / 7133 - .dw SN7RATIO / 7237 - .dw SN7RATIO / 7342 - .dw SN7RATIO / 7449 - .dw SN7RATIO / 7557 - .dw SN7RATIO / 7667 - .dw SN7RATIO / 7778 - .dw SN7RATIO / 7891 - .dw SN7RATIO / 8006 - .dw SN7RATIO / 8122 - .dw SN7RATIO / 8241 - .dw SN7RATIO / 8361 - .dw SN7RATIO / 8482 - .dw SN7RATIO / 8606 - .dw SN7RATIO / 8731 - .dw SN7RATIO / 8858 - .dw SN7RATIO / 8987 - .dw SN7RATIO / 9118 - .dw SN7RATIO / 9250 - .dw SN7RATIO / 9385 - .dw SN7RATIO / 9521 - .dw SN7RATIO / 9660 - .dw SN7RATIO / 9800 - .dw SN7RATIO / 9943 - .dw SN7RATIO / 10087 - .dw SN7RATIO / 10234 - .dw SN7RATIO / 10383 - .dw SN7RATIO / 10534 - .dw SN7RATIO / 10687 - .dw SN7RATIO / 10843 - .dw SN7RATIO / 11000 - .dw SN7RATIO / 11160 - .dw SN7RATIO / 11322 - .dw SN7RATIO / 11487 - .dw SN7RATIO / 11654 - .dw SN7RATIO / 11824 - .dw SN7RATIO / 11995 - .dw SN7RATIO / 12170 - .dw SN7RATIO / 12347 - .dw SN7RATIO / 12527 - .dw SN7RATIO / 12709 - .dw SN7RATIO / 12894 - .dw SN7RATIO / 13081 - .dw SN7RATIO / 13271 - .dw SN7RATIO / 13464 - .dw SN7RATIO / 13660 - .dw SN7RATIO / 13859 - .dw SN7RATIO / 14061 - .dw SN7RATIO / 14265 - .dw SN7RATIO / 14473 - .dw SN7RATIO / 14683 - .dw SN7RATIO / 14897 - .dw SN7RATIO / 15113 - .dw SN7RATIO / 15333 - .dw SN7RATIO / 15556 - .dw SN7RATIO / 15782 - .dw SN7RATIO / 16012 - .dw SN7RATIO / 16245 - .dw SN7RATIO / 16481 - .dw SN7RATIO / 16721 - .dw SN7RATIO / 16964 - .dw SN7RATIO / 17211 - .dw SN7RATIO / 17461 - .dw SN7RATIO / 17715 - .dw SN7RATIO / 17973 - .dw SN7RATIO / 18234 - .dw SN7RATIO / 18500 - .dw SN7RATIO / 18769 - .dw SN7RATIO / 19042 - .dw SN7RATIO / 19319 - .dw SN7RATIO / 19600 - .dw SN7RATIO / 19885 - .dw SN7RATIO / 20174 - .dw SN7RATIO / 20468 - .dw SN7RATIO / 20765 - .dw SN7RATIO / 21067 - .dw SN7RATIO / 21373 - .dw SN7RATIO / 21684 - .dw SN7RATIO / 22000 - .dw SN7RATIO / 22320 - .dw SN7RATIO / 22645 - .dw SN7RATIO / 22974 - .dw SN7RATIO / 23308 - .dw SN7RATIO / 23647 - .dw SN7RATIO / 23991 - .dw SN7RATIO / 24340 - .dw SN7RATIO / 24694 - .dw SN7RATIO / 25053 - .dw SN7RATIO / 25418 - .dw SN7RATIO / 25787 - .dw SN7RATIO / 26163 - .dw SN7RATIO / 26544 - .dw SN7RATIO / 26930 - .dw SN7RATIO / 27321 - .dw SN7RATIO / 27718 - .dw SN7RATIO / 28121 - .dw SN7RATIO / 28530 - .dw SN7RATIO / 28945 - .dw SN7RATIO / 29366 - .dw SN7RATIO / 29793 - .dw SN7RATIO / 30226 - .dw SN7RATIO / 30666 - .dw SN7RATIO / 31113 - .dw SN7RATIO / 31566 - .dw SN7RATIO / 32025 - .dw SN7RATIO / 32490 - .dw SN7RATIO / 32963 - .dw SN7RATIO / 33442 - .dw SN7RATIO / 33929 - .dw SN7RATIO / 34422 - .dw SN7RATIO / 34923 - .dw SN7RATIO / 35431 - .dw SN7RATIO / 35946 - .dw SN7RATIO / 36469 - .dw SN7RATIO / 36999 - .dw SN7RATIO / 37537 - .dw SN7RATIO / 38083 - .dw SN7RATIO / 38637 - .dw SN7RATIO / 39200 - .dw SN7RATIO / 39770 - .dw SN7RATIO / 40349 - .dw SN7RATIO / 40936 - .dw SN7RATIO / 41530 - .dw SN7RATIO / 42134 - .dw SN7RATIO / 42747 - .dw SN7RATIO / 43369 - .dw SN7RATIO / 44000 - .dw SN7RATIO / 44640 - .dw SN7RATIO / 45289 - .dw SN7RATIO / 45948 - .dw SN7RATIO / 46616 - .dw SN7RATIO / 47294 - .dw SN7RATIO / 47982 - .dw SN7RATIO / 48680 - .dw SN7RATIO / 49388 - .dw SN7RATIO / 50106 - .dw SN7RATIO / 50835 - .dw SN7RATIO / 51575 - .dw SN7RATIO / 52325 - .dw SN7RATIO / 53086 - .dw SN7RATIO / 53858 - .dw SN7RATIO / 54642 - .dw SN7RATIO / 55437 - .dw SN7RATIO / 56243 - .dw SN7RATIO / 57061 - .dw SN7RATIO / 57891 - .dw SN7RATIO / 58733 - .dw SN7RATIO / 59587 - .dw SN7RATIO / 60454 - .dw SN7RATIO / 61333 - .dw SN7RATIO / 62225 - .dw SN7RATIO / 63130 - .dw SN7RATIO / 64048 - .dw SN7RATIO / 64980 - .dw SN7RATIO / 65925 - .dw SN7RATIO / 66884 - .dw SN7RATIO / 67857 - .dw SN7RATIO / 68844 - .dw SN7RATIO / 69846 - .dw SN7RATIO / 70862 - .dw SN7RATIO / 71893 - .dw SN7RATIO / 72938 - .dw SN7RATIO / 73999 - .dw SN7RATIO / 75075 - .dw SN7RATIO / 76167 - .dw SN7RATIO / 77275 - .dw SN7RATIO / 78399 - .dw SN7RATIO / 79539 - .dw SN7RATIO / 80696 - .dw SN7RATIO / 81870 - .dw SN7RATIO / 83061 - .dw SN7RATIO / 84269 - .dw SN7RATIO / 85495 - .dw SN7RATIO / 86738 - .dw SN7RATIO / 88000 - .dw SN7RATIO / 89280 - .dw SN7RATIO / 90579 - .dw SN7RATIO / 91896 - .dw SN7RATIO / 93233 - .dw SN7RATIO / 94589 - .dw SN7RATIO / 95965 - .dw SN7RATIO / 97361 - .dw SN7RATIO / 98777 - .dw SN7RATIO / 100214 - .dw SN7RATIO / 101671 - .dw SN7RATIO / 103150 - .dw SN7RATIO / 104650 - .dw SN7RATIO / 106172 - .dw SN7RATIO / 107716 - .dw SN7RATIO / 109283 - .dw SN7RATIO / 110873 - .dw SN7RATIO / 112486 - .dw SN7RATIO / 114122 - .dw SN7RATIO / 115782 - .dw SN7RATIO / 117466 - .dw SN7RATIO / 119175 - .dw SN7RATIO / 120908 - .dw SN7RATIO / 122667 - .dw SN7RATIO / 124451 - .dw SN7RATIO / 126261 - .dw SN7RATIO / 128098 - .dw SN7RATIO / 129961 - .dw SN7RATIO / 131851 - .dw SN7RATIO / 133769 - .dw SN7RATIO / 135715 - .dw SN7RATIO / 137689 - .dw SN7RATIO / 139691 - .dw SN7RATIO / 141723 - .dw SN7RATIO / 143784 - .dw SN7RATIO / 145876 - .dw SN7RATIO / 147998 - .dw SN7RATIO / 150151 - .dw SN7RATIO / 152335 - .dw SN7RATIO / 154550 - .dw SN7RATIO / 156798 - .dw SN7RATIO / 159079 - .dw SN7RATIO / 161393 - .dw SN7RATIO / 163740 - .dw SN7RATIO / 166122 - .dw SN7RATIO / 168538 - .dw SN7RATIO / 170990 - .dw SN7RATIO / 173477 - .dw SN7RATIO / 176000 - .dw SN7RATIO / 178560 - .dw SN7RATIO / 181157 - .dw SN7RATIO / 183792 - .dw SN7RATIO / 186466 - .dw SN7RATIO / 189178 - .dw SN7RATIO / 191930 - .dw SN7RATIO / 194722 - .dw SN7RATIO / 197553 - .dw SN7RATIO / 200426 - .dw SN7RATIO / 203342 - .dw SN7RATIO / 206299 - .dw C7 + .DW A1S + .DW SN7RATIO / 5912 + .DW SN7RATIO / 5998 + .DW SN7RATIO / 6085 + .DW SN7RATIO / 6174 + .DW SN7RATIO / 6264 + .DW SN7RATIO / 6355 + .DW SN7RATIO / 6447 + .DW SN7RATIO / 6541 + .DW SN7RATIO / 6636 + .DW SN7RATIO / 6733 + .DW SN7RATIO / 6831 + .DW SN7RATIO / 6930 + .DW SN7RATIO / 7031 + .DW SN7RATIO / 7133 + .DW SN7RATIO / 7237 + .DW SN7RATIO / 7342 + .DW SN7RATIO / 7449 + .DW SN7RATIO / 7557 + .DW SN7RATIO / 7667 + .DW SN7RATIO / 7778 + .DW SN7RATIO / 7891 + .DW SN7RATIO / 8006 + .DW SN7RATIO / 8122 + .DW SN7RATIO / 8241 + .DW SN7RATIO / 8361 + .DW SN7RATIO / 8482 + .DW SN7RATIO / 8606 + .DW SN7RATIO / 8731 + .DW SN7RATIO / 8858 + .DW SN7RATIO / 8987 + .DW SN7RATIO / 9118 + .DW SN7RATIO / 9250 + .DW SN7RATIO / 9385 + .DW SN7RATIO / 9521 + .DW SN7RATIO / 9660 + .DW SN7RATIO / 9800 + .DW SN7RATIO / 9943 + .DW SN7RATIO / 10087 + .DW SN7RATIO / 10234 + .DW SN7RATIO / 10383 + .DW SN7RATIO / 10534 + .DW SN7RATIO / 10687 + .DW SN7RATIO / 10843 + .DW SN7RATIO / 11000 + .DW SN7RATIO / 11160 + .DW SN7RATIO / 11322 + .DW SN7RATIO / 11487 + .DW SN7RATIO / 11654 + .DW SN7RATIO / 11824 + .DW SN7RATIO / 11995 + .DW SN7RATIO / 12170 + .DW SN7RATIO / 12347 + .DW SN7RATIO / 12527 + .DW SN7RATIO / 12709 + .DW SN7RATIO / 12894 + .DW SN7RATIO / 13081 + .DW SN7RATIO / 13271 + .DW SN7RATIO / 13464 + .DW SN7RATIO / 13660 + .DW SN7RATIO / 13859 + .DW SN7RATIO / 14061 + .DW SN7RATIO / 14265 + .DW SN7RATIO / 14473 + .DW SN7RATIO / 14683 + .DW SN7RATIO / 14897 + .DW SN7RATIO / 15113 + .DW SN7RATIO / 15333 + .DW SN7RATIO / 15556 + .DW SN7RATIO / 15782 + .DW SN7RATIO / 16012 + .DW SN7RATIO / 16245 + .DW SN7RATIO / 16481 + .DW SN7RATIO / 16721 + .DW SN7RATIO / 16964 + .DW SN7RATIO / 17211 + .DW SN7RATIO / 17461 + .DW SN7RATIO / 17715 + .DW SN7RATIO / 17973 + .DW SN7RATIO / 18234 + .DW SN7RATIO / 18500 + .DW SN7RATIO / 18769 + .DW SN7RATIO / 19042 + .DW SN7RATIO / 19319 + .DW SN7RATIO / 19600 + .DW SN7RATIO / 19885 + .DW SN7RATIO / 20174 + .DW SN7RATIO / 20468 + .DW SN7RATIO / 20765 + .DW SN7RATIO / 21067 + .DW SN7RATIO / 21373 + .DW SN7RATIO / 21684 + .DW SN7RATIO / 22000 + .DW SN7RATIO / 22320 + .DW SN7RATIO / 22645 + .DW SN7RATIO / 22974 + .DW SN7RATIO / 23308 + .DW SN7RATIO / 23647 + .DW SN7RATIO / 23991 + .DW SN7RATIO / 24340 + .DW SN7RATIO / 24694 + .DW SN7RATIO / 25053 + .DW SN7RATIO / 25418 + .DW SN7RATIO / 25787 + .DW SN7RATIO / 26163 + .DW SN7RATIO / 26544 + .DW SN7RATIO / 26930 + .DW SN7RATIO / 27321 + .DW SN7RATIO / 27718 + .DW SN7RATIO / 28121 + .DW SN7RATIO / 28530 + .DW SN7RATIO / 28945 + .DW SN7RATIO / 29366 + .DW SN7RATIO / 29793 + .DW SN7RATIO / 30226 + .DW SN7RATIO / 30666 + .DW SN7RATIO / 31113 + .DW SN7RATIO / 31566 + .DW SN7RATIO / 32025 + .DW SN7RATIO / 32490 + .DW SN7RATIO / 32963 + .DW SN7RATIO / 33442 + .DW SN7RATIO / 33929 + .DW SN7RATIO / 34422 + .DW SN7RATIO / 34923 + .DW SN7RATIO / 35431 + .DW SN7RATIO / 35946 + .DW SN7RATIO / 36469 + .DW SN7RATIO / 36999 + .DW SN7RATIO / 37537 + .DW SN7RATIO / 38083 + .DW SN7RATIO / 38637 + .DW SN7RATIO / 39200 + .DW SN7RATIO / 39770 + .DW SN7RATIO / 40349 + .DW SN7RATIO / 40936 + .DW SN7RATIO / 41530 + .DW SN7RATIO / 42134 + .DW SN7RATIO / 42747 + .DW SN7RATIO / 43369 + .DW SN7RATIO / 44000 + .DW SN7RATIO / 44640 + .DW SN7RATIO / 45289 + .DW SN7RATIO / 45948 + .DW SN7RATIO / 46616 + .DW SN7RATIO / 47294 + .DW SN7RATIO / 47982 + .DW SN7RATIO / 48680 + .DW SN7RATIO / 49388 + .DW SN7RATIO / 50106 + .DW SN7RATIO / 50835 + .DW SN7RATIO / 51575 + .DW SN7RATIO / 52325 + .DW SN7RATIO / 53086 + .DW SN7RATIO / 53858 + .DW SN7RATIO / 54642 + .DW SN7RATIO / 55437 + .DW SN7RATIO / 56243 + .DW SN7RATIO / 57061 + .DW SN7RATIO / 57891 + .DW SN7RATIO / 58733 + .DW SN7RATIO / 59587 + .DW SN7RATIO / 60454 + .DW SN7RATIO / 61333 + .DW SN7RATIO / 62225 + .DW SN7RATIO / 63130 + .DW SN7RATIO / 64048 + .DW SN7RATIO / 64980 + .DW SN7RATIO / 65925 + .DW SN7RATIO / 66884 + .DW SN7RATIO / 67857 + .DW SN7RATIO / 68844 + .DW SN7RATIO / 69846 + .DW SN7RATIO / 70862 + .DW SN7RATIO / 71893 + .DW SN7RATIO / 72938 + .DW SN7RATIO / 73999 + .DW SN7RATIO / 75075 + .DW SN7RATIO / 76167 + .DW SN7RATIO / 77275 + .DW SN7RATIO / 78399 + .DW SN7RATIO / 79539 + .DW SN7RATIO / 80696 + .DW SN7RATIO / 81870 + .DW SN7RATIO / 83061 + .DW SN7RATIO / 84269 + .DW SN7RATIO / 85495 + .DW SN7RATIO / 86738 + .DW SN7RATIO / 88000 + .DW SN7RATIO / 89280 + .DW SN7RATIO / 90579 + .DW SN7RATIO / 91896 + .DW SN7RATIO / 93233 + .DW SN7RATIO / 94589 + .DW SN7RATIO / 95965 + .DW SN7RATIO / 97361 + .DW SN7RATIO / 98777 + .DW SN7RATIO / 100214 + .DW SN7RATIO / 101671 + .DW SN7RATIO / 103150 + .DW SN7RATIO / 104650 + .DW SN7RATIO / 106172 + .DW SN7RATIO / 107716 + .DW SN7RATIO / 109283 + .DW SN7RATIO / 110873 + .DW SN7RATIO / 112486 + .DW SN7RATIO / 114122 + .DW SN7RATIO / 115782 + .DW SN7RATIO / 117466 + .DW SN7RATIO / 119175 + .DW SN7RATIO / 120908 + .DW SN7RATIO / 122667 + .DW SN7RATIO / 124451 + .DW SN7RATIO / 126261 + .DW SN7RATIO / 128098 + .DW SN7RATIO / 129961 + .DW SN7RATIO / 131851 + .DW SN7RATIO / 133769 + .DW SN7RATIO / 135715 + .DW SN7RATIO / 137689 + .DW SN7RATIO / 139691 + .DW SN7RATIO / 141723 + .DW SN7RATIO / 143784 + .DW SN7RATIO / 145876 + .DW SN7RATIO / 147998 + .DW SN7RATIO / 150151 + .DW SN7RATIO / 152335 + .DW SN7RATIO / 154550 + .DW SN7RATIO / 156798 + .DW SN7RATIO / 159079 + .DW SN7RATIO / 161393 + .DW SN7RATIO / 163740 + .DW SN7RATIO / 166122 + .DW SN7RATIO / 168538 + .DW SN7RATIO / 170990 + .DW SN7RATIO / 173477 + .DW SN7RATIO / 176000 + .DW SN7RATIO / 178560 + .DW SN7RATIO / 181157 + .DW SN7RATIO / 183792 + .DW SN7RATIO / 186466 + .DW SN7RATIO / 189178 + .DW SN7RATIO / 191930 + .DW SN7RATIO / 194722 + .DW SN7RATIO / 197553 + .DW SN7RATIO / 200426 + .DW SN7RATIO / 203342 + .DW SN7RATIO / 206299 + .DW C7 SIZ_SN7NOTETBL .EQU $ - SN7NOTETBL .ECHO "SN76489 approx " .ECHO SIZ_SN7NOTETBL / 2 / 4 /12 .ECHO " Octaves. Last note index supported: " - .echo SIZ_SN7NOTETBL / 2 - .echo "\n" + .ECHO SIZ_SN7NOTETBL / 2 + .ECHO "\n" diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm index 93015bd8..3c2f8af0 100644 --- a/Source/HBIOS/std.asm +++ b/Source/HBIOS/std.asm @@ -2,7 +2,7 @@ ; the requested build configuraton file to bring in platform specifics. ; There are several hardware platforms supported by SBC. -; 1. SBC Z80 SBC (v1 or v2) w/ ECB interface +; 1. SBC Z80 SBC (v1 or v2) w/ ECB interface ; 2. ZETA Standalone Z80 SBC w/ SBC compatibility ; 3. ZETA2 Second version of ZETA with enhanced memory bank switching ; 4. N8 MSX-ish Z180 SBC w/ onboard video and sound @@ -20,8 +20,8 @@ ; #INCLUDE "../ver.inc" ; ADD BIOSVER ; -FALSE .EQU 0 -TRUE .EQU ~FALSE +FALSE .EQU 0 +TRUE .EQU ~FALSE ; ; DEBUGGING OPTIONS ; @@ -298,9 +298,9 @@ KBD_DE .EQU 1 ; GERMAN ; ; EMULATION TYPES ; -EMUTYP_NONE .EQU 0 ; NONE -EMUTYP_TTY .EQU 1 ; TTY -EMUTYP_ANSI .EQU 2 ; ANSI +EMUTYP_NONE .EQU 0 ; NONE +EMUTYP_TTY .EQU 1 ; TTY +EMUTYP_ANSI .EQU 2 ; ANSI ; ; DEVICE DRIVER TO BE INITIALIZED FIRST. FIRST CIO DRIVER, UNIT 0 INITIALIZED BECOMES PRIMARY CONSOLE. ; IS AN INDEX INTO THE ENABLED INITIALIZATION DRIVER LIST i.e. ASCI, UART, SIO, ACIA, PIO, UF ETC. @@ -457,7 +457,7 @@ INT_SER1 .EQU 8 ; Z180 SERIAL 0 INT_PIO0A .EQU 9 ; ZILOG PIO 0, CHANNEL A INT_PIO0B .EQU 10 ; ZILOG PIO 0, CHANNEL B INT_PIO1A .EQU 11 ; ZILOG PIO 1, CHANNEL A -INT_PIO1B .EQU 12 ; ZILOG PIO 1, CHANNEL B +INT_PIO1B .EQU 12 ; ZILOG PIO 1, CHANNEL B INT_SIO0 .EQU 13 ; ZILOG SIO 0, CHANNEL A & B INT_SIO1 .EQU 14 ; ZILOG SIO 1, CHANNEL A & B @@ -470,11 +470,11 @@ INT_CTC0B .EQU 1 ; ZILOG CTC 0, CHANNEL B INT_CTC0C .EQU 2 ; ZILOG CTC 0, CHANNEL C INT_CTC0D .EQU 3 ; ZILOG CTC 0, CHANNEL D INT_SIO0 .EQU 7 ; ZILOG SIO 0, CHANNEL A & B -INT_SIO1 .EQU 8 ; ZILOG SIO 1, CHANNEL A & B +INT_SIO1 .EQU 8 ; ZILOG SIO 1, CHANNEL A & B INT_PIO0A .EQU 9 ; ZILOG PIO 0, CHANNEL A -INT_PIO0B .EQU 10 ; ZILOG PIO 0, CHANNEL B -INT_PIO1A .EQU 11 ; ZILOG PIO 1, CHANNEL A -INT_PIO1B .EQU 12 ; ZILOG PIO 1, CHANNEL B +INT_PIO0B .EQU 10 ; ZILOG PIO 0, CHANNEL B +INT_PIO1A .EQU 11 ; ZILOG PIO 1, CHANNEL A +INT_PIO1B .EQU 12 ; ZILOG PIO 1, CHANNEL B #ENDIF @@ -488,7 +488,7 @@ INT_PIO1B .EQU 12 ; ZILOG PIO 1, CHANNEL B #DEFINE PRTC(C) CALL PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X') #DEFINE PRTS(S) CALL PRTSTRD \ .TEXT S ; PRINT STRING S TO CONSOLE - PRTD("HELLO") #DEFINE PRTX(X) CALL PRTSTRI \ .DW X ; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO) -#DEFINE DEBUG(S) CALL PRTSTRD \ .TEXT S \ .TEXT "$" ; $$$$$$ PRINT STRING S TO CONSOLE - PRTD("HELLO") - NO TRAILING $ REQUIRED +#DEFINE DEBUG(S) CALL PRTSTRD \ .TEXT S \ .TEXT "$" ; $$$$$$ PRINT STRING S TO CONSOLE - PRTD("HELLO") - NO TRAILING $ REQUIRED ; #DEFINE XIO_PRTC(C) CALL XIO_PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X') #DEFINE XIO_PRTS(S) CALL XIO_PRTSTRD \ .DB S ; PRINT STRING S TO CONSOLE - PRTD("HELLO") diff --git a/Source/HBIOS/util.asm b/Source/HBIOS/util.asm index f647a5a4..a1ca84ff 100644 --- a/Source/HBIOS/util.asm +++ b/Source/HBIOS/util.asm @@ -183,6 +183,17 @@ PRTHEXWORD: POP AF RET ; +; PRINT THE HEX WORD VALUE IN HL +; +PRTHEXWORDHL: + PUSH AF + LD A,D + CALL PRTHEXBYTE + LD A,E + CALL PRTHEXBYTE + POP AF + RET +; ; PRINT THE HEX DWORD VALUE IN DE:HL ; PRTHEX32: diff --git a/Source/ver.inc b/Source/ver.inc index c6cdf73b..f20047e5 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,4 +2,4 @@ #DEFINE RMN 1 #DEFINE RUP 0 #DEFINE RTP 0 -#DEFINE BIOSVER "3.1-pre.9" +#DEFINE BIOSVER "3.1-pre.10" diff --git a/Source/ver.lib b/Source/ver.lib index 1524ad08..821e6368 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 1 rup equ 0 rtp equ 0 biosver macro - db "3.1-pre.9" + db "3.1-pre.10" endm From 78f65522b78565d02196f74121645d782ee3e309 Mon Sep 17 00:00:00 2001 From: b1ackmai1er <39449559+b1ackmai1er@users.noreply.github.com> Date: Fri, 24 Apr 2020 06:17:22 +0800 Subject: [PATCH 021/339] Dev (#108) * added hack to handle tunes * quiet clean * added chmod for execution * suppress warnings * Multi-boot fixes * the windows build somehow thinks that these filesystems are cpm3. * credit and primitive instructions * Update sd.asm Cosmetic fix. * make compile shut up about conditionals * Add bin2asm for linus and update build to process font files under linix * fixed quoted double quote bug, added tests * added tests * added bin2asm for font file source creation * Revert linux bin2asm font stuff * added rule for font source generation * build fonts * added directory mapping cache. if the same directory is being hit as last run, we don't need to rebuild the map. will likely break if you are running more than one at a time, in that the cache will be ineffective. also, if the directory contents change, this will also break. * removed strip. breaks osx * added directory tag so . isn't matched all over the place * added real cache validation * fixed build * this file is copied from optdsk.lib or optcmd.lib * install to ../HBIOS * prerequisite verbosity * diff soft failure and casefn speedup * added lzsa * added lzsa * removed strip. breaks on osx * added clobber * added code to handle multiple platform rom builds with rom size override * added align and 0x55 hex syntax * default to hd64180 * added N8 capability * added SBC_std.rom to default build * added support for binary diff * diff fixes * clean, identical build. font source generator emitted .align. this does not match the windows build * Upgrade NZCOM to latest * Misc. Cleanup * fixed expression parser bug : ~(1|2) returned 0xfe * added diff build option * Update Makefile Makefile enhancement to better handle ncurses library from Bob Dunlop. * Update sd.asm Back out hack for uz80as now that Curt fixed it. * Misc. Cleanup * UNA Catchup UNA support was lacking some of the more recent behavior changes. This corrects most of it. * Add github action for building RomWBW * Bump Pre-release Version * Update build.yml Added "make clean" which will remove temporary files without removing final binary outputs. * Update Makefile Build all ROM variants by default in Linux/Mac build. * Update Makefile * Update Makefile * Update Makefile * Update Makefile * Update Makefile * Update Makefile * Update Makefile * Update Makefile * Update Makefile * Update for GitHub Build Case issue in TASM includes showing up in GitHub build. This should correct that. * Added an gitignore files to exclude generated files * Removed Tunes/clean.cmd and Tunes/ReadMe.txt - as make clean removes them * Build.sh: marked as executable chmod +x Build.sh * Fix to HBIOS/build.sh When adding files to rom disk, if files were missing, it would error out. It appears the intent is to skip non-existing files. Updated to log out correctly for missing files - and continue operation. * Update Microsoft NASCOM BASIC.docx Nascom manual, text version by Jan S (full name unknown) * Fix issue with Apps/Tune not making If dest directory does not exist, fails to make Apps * Create ReadMe.txt * Update Makefile * Update Build.sh * Make .gitignores for Tools/unix more specific * cpmtools Update Updated cpmtools applications (Windows only). Removed hack in diskdefs that is no longer required. * HBIOS Proxy Temp Stack Enhancement Reuse the bounce buffer area as the temporary stack space required briefly in HBX_INVOKE when transitioning banks. Increases size of temporary stack space to 64 bytes. * Update ReadMe.txt * HBIOS - clean up TMPSTK * Update hbios.asm Minor cosmetic changes. * Build Process Updates Minor udpates to build process to improve consistency between Windows and Mac/Linux builds. * Update hbios.asm Add improved interrupt protection to HBIOS PEEK, POKE, and BNKCPY functions. * hbios - wrap hbx_bnkcpy * hbios - adjust hbx_peek hbx_poke guards * Update hbios.asm Adjusted used of DI/EI for PEEK and POKE to regain a bit of INTSTK space. Added code so that HB_INVBNK can be used as a flag indicating if HBIOS is active, $FF is inactive, anything else means active. * Add HBIOS MuTex * Initial Nascom basic ecb-vdu graphics set and reset for 80x25b screen with 256 character mod * Finalize Pre-release 34 Final support for FreeRTOS * Update nascom.asm Optimization, cleanup, tabs and white spaces * IDE & PPIDE Cleanup * Clean up Make version include files common. * Update Makefile * Update Makefile * Build Test * Build Test * Build Fixes * Update nascom.asm Cleanup * Update nascom.asm Optimization * hbios - temp stack tweak * Update hbios.asm Comments on HBX_BUF usage. * Update nascom.asm Optimization * Update nascom.asm Setup ECB-VDU build option, remove debug code * Update nascom.asm Set default build. update initialization * Update nascom.asm Make CLS clear vdu screen * Update nascom.asm Fixup top screen line not showing * Add SC131 Support Also cleaned up some ReadMe files. * HBIOS SCZ180 - remove mutex special files * HBIOS SCZ180 - adjust mutex comment * Misc. Cleanup Includes some minor improvements to contents in some disk images. * Delete FAT.COM Changing case of FAT.COM extension to lowercase. * Create FAT.com Completing change of case in extension of FAT.com. * Update Makefile Remove ROM variants that just have the HBIOS MUTEX enabled. Users can easily enable this in a custom build. * Cleanup Removed hack from Images Makefile. Fixed use of DEFSERCFG in various places. * GitHub CI Updates Adds automation of build and release assets upon release. * Prerelease 36 General cleanup * Build Script Cleanups * Config File Cleanups * Update RomWBW Architecture General refresh for v2.9.2 * Update vdu.asm Removed a hack in VDU driver that has existed for 8 years. :-) * Fix CONSOLE Constant Rename CIODEV_CONSOLE constant to CIO_CONSOLE because it is a unit code, not a device type code. Retabify TastyBasic. * Minor Bug Fixes - Disk assignment edge case - CP/M 3 accidental fall thru - Cosmetic updates * Update util.z80 * Documentation Cleanup * Documentation Update * Documentation Update * Documentation Updates * Documentation Updates * Create Common.inc * Documentation Updates * Documentation Updates * doc - a few random fixes * Documentation Cleanup * Fix IM 0 Build Error in ACIA * Documentation Updates * Documentation Cleanup * Remove OSLDR The OSLDR application was badly broken and almost impossible to fix with new expanded OS support. * Bug Fixes - Init RAM disk at boot under CP/M 3 - Fix ACR activation in TUNE * FD Motor Timeout - Made FDC motor timeout smaller and more consistent across different speed CPUs - Added "boot" messaging to RTC * Cleanup * Cleanup - Fix SuperZAP to work under NZCOM and ZPM3 - Finalize standard config files * Minor Changes - Slight change to ZAP configuration - Added ZSDOS.ZRL to NZCOM image * ZDE Upgrade - Upgraded ZDE 1.6 -> 1.6a * Config File Tuning * Pre-release for Testing * cfg - mutex consistent config language * Bump to Version 3.0 * Update SD Card How-To Thanks David! * update ReadMe.md Remove some odd `\`. * Update ReadMe.txt * Update ReadMe.md * Update Generated Doc Files * Improve XModem Startup - Extended startup timeout for XM.COM so that it doesn't timeout so quickly while host is selecing a file to send. - Updated SD Card How-To from David Reese. * XModem Timing Refinements * TMS Driver Z180 Improvements - TMS driver udpated to insert Z180 I/O waitstates internally so other code can run at full speed. - Updated How-To documents from David. - Fixed TUNE app to properly restore Z180 I/O waitstates after manipulating them. * CLRDIR and ZDE updates - CLRDIR has been updated by Max Scane for CP/M 3 compatibility. - A minor issue in the preconfigured ZDE VT100 terminal escape sequences was corrected. * Fix Auto CRT Console Switch on CP/M 3 * Handle lack of RTC better DSRTC driver now correctly returns an error if there is no RTC present. * Minor RTC Updates * Finalize v3.0.1 Cleanup release for v3.0 * New ROMLDR and INTRTC driver - Refactored romldr.asm - Added new periodic timer based RTC driver * CP/M 3 Date Hack - Hack to allow INTRTC to increment time without destroying the date * Update romldr.asm Work around minor Linux build inconsistency * Update Apps for New Version * Revert "Update Apps for New Version" This reverts commit ad80432252cbe46055d3bcf6ae7444e37df56d7a. * Revert "Update romldr.asm" This reverts commit 4a9825cd57c63f8216821e6eaa385d8624e10c16. * Revert "CP/M 3 Date Hack" This reverts commit 153b494e6124153fef5c87501cd0c6d90ad86d81. * Revert "New ROMLDR and INTRTC driver" This reverts commit d9bed4563ea1a04a3e5b1fcf3fbb40c8aaaaf8bd. * Start v3.1 Development * Update FDISK80.COM Updated FDISK80 to allow reserving up to 256 slices. * Update sd.asm For Z180 CSIO, ensure that xmit is finished, before asserting CS for next transaction. * Add RC2014 UART, Improve SD protocol fix - RC2014 and related platforms will autodetect a UART at 0xA0 and 0xA8 - Ensure that CS fully brackets all SD I/O * ROMLDR Improvements .com files can now be started from CP/M and size of .com files has been reduced so they always fit. * Update commit.yml Run commit build in all branches * Update commit.yml Run commit build for master and dev branches * Improved clock driver auto-detect/fallback * SIO driver now CTC aware The SIO driver can now use a CTC (if available) to provide much more flexible baud rate programming. * CTC driver fine tuning * Update xmdm125.asm Fixed a small issue in core XM125 code that caused a file write error message to not be displayed when it should be. * CF Card compatibility improvement Older CF Cards did not reset IDE registers to defaults values when reset. Implemented a work around. * Update ACIA detection ACIA should no longer be detected if there is also a UART module in the system. * Handle CTC anomaly Small update to accommodate CTC behavior that occurs when the CTC trigger is more than half the CTC clock. * Update acia.asm Updated ACIA detection to use primary ACIA port instead of phantom port. * Update acia.asm Fix bug in ACIA detection. Thanks Alan! * MacOS Build Improvement Build script updated to improve compatibility with MacOS. Credit to Fredrik Axtelius for this. * HBIOS Makefile - use env vars for target Allow build ROM targets to be restricted to just one platform thru use of ENV vars: ROM_PLATFORM - if defined to a known platform, only this platform is build - defaults to std config ROM_CONFIG - sets the desired platform config - defaults to std if the above ENVs are not defined, builds all ROMs * Added some more gitignores * Whitespace changes (crlf) * HBIOS: Force the assembly to fail for vdu drivers if function table count is not correct * Whitespace: trailing whitespaces * makefile: updated some make scripts to use when calling subdir makefiles * linux build: update to Build.sh fix for some platforms The initialization of the Rom dat file used the pipe (|) operator to build an initial empty file. But the pipe operator | may sometimes return a non-zero exit code for some linux platforms, if the the streams are closed before dd has fully processed the stream. This issue occured on a travis linux ubuntu image. Solution was to change to redirection. * Bump version * Enhance CTC periodic timer Add ability to use TIMER mode in CTC driver to generate priodic interrupts. * HBIOS: Added support for sound drivers New sound driver support with initial support for the SN76489 chip New build configuration entry: * SN76489ENABLE Ports are currently locked in with: * SN76489_PORT_LEFT .EQU $FC ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT) * SN76489_PORT_RIGHT .EQU $F8 ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT) * Miscellaneous Cleanup No functional changes. Co-authored-by: curt mayer Co-authored-by: Wayne Warthen Co-authored-by: ed Co-authored-by: Dean Netherton Co-authored-by: ed Co-authored-by: Phillip Stevens Co-authored-by: Dean Netherton --- .github/workflows/commit.yml | 32 + .github/workflows/release.yml | 51 + .gitignore | 102 + Binary/Apps/Clean.cmd | 4 +- Binary/Apps/Makefile | 10 + Binary/Apps/Tunes/Clean.cmd | 4 - Binary/Apps/Tunes/Demo.mym | Bin 6083 -> 0 bytes Binary/Apps/Tunes/Demo1.mym | Bin 7018 -> 0 bytes Binary/Apps/Tunes/Demo3.mym | Bin 4646 -> 0 bytes Binary/Apps/Tunes/Demo3mix.mym | Bin 6053 -> 0 bytes Binary/Apps/Tunes/Demo4.mym | Bin 6569 -> 0 bytes Binary/DiskList.txt | 167 + Binary/Makefile | 8 + Binary/ReadMe.txt | 60 +- Binary/RomList.txt | 178 +- Doc/CPM Manual.pdf | Bin 936845 -> 887641 bytes Doc/CPM3 Command Summary.pdf | Bin 0 -> 845426 bytes Doc/CPM3 Programmers Guide.pdf | Bin 0 -> 1961860 bytes Doc/CPM3 System Guide.pdf | Bin 0 -> 1892915 bytes Doc/CPM3 Users Guide.pdf | Bin 0 -> 1712923 bytes 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2 +- Source/Apps/Clean.cmd | 1 + Source/Apps/FAT/Build.cmd | 7 + Source/Apps/FAT/Clean.cmd | 5 + Source/Apps/FAT/FAT.com | Bin 0 -> 44928 bytes Source/Apps/FAT/LICENSE.txt | 674 ++ Source/Apps/FAT/Makefile | 6 + Source/Apps/FAT/ReadMe.txt | 101 + Source/Apps/FDU/FDU.asm | 94 +- Source/Apps/FDU/FDU.txt | 13 +- Source/Apps/FDU/Makefile | 8 + Source/Apps/Format.asm | 4 +- Source/Apps/IntTest.asm | 209 +- Source/Apps/Makefile | 14 + Source/Apps/Mode.asm | 4 +- Source/Apps/OSLdr.asm | 1014 -- Source/Apps/RTC.asm | 113 +- Source/Apps/SysCopy.asm | 139 +- Source/Apps/Timer.asm | 29 +- Source/Apps/Tune/Makefile | 12 + Source/Apps/Tune/Tune.asm | 422 +- Source/Apps/XM/Build.cmd | 3 + Source/Apps/XM/Makefile | 13 + Source/Apps/XM/xmdm125.asm | 24 +- Source/Apps/XM/xmhb.180 | 651 +- Source/Apps/XM/xmuf.180 | 331 + Source/BPBIOS/@WBW Issues.txt | 15 + Source/BPBIOS/@WBW Z3ENV.txt | 2 +- Source/BPBIOS/Build.cmd | 36 +- Source/BPBIOS/Clean.cmd | 3 + Source/BPBIOS/Makefile | 47 + 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create mode 100644 Tools/unix/zx/util.c create mode 100644 Tools/unix/zx/xlt.c create mode 100644 Tools/unix/zx/z80.c create mode 100644 Tools/unix/zx/z80.h create mode 100644 Tools/unix/zx/z80ops.h create mode 100644 Tools/unix/zx/zx.c create mode 100644 Tools/unix/zx/zx.h create mode 100644 Tools/unix/zx/zx.html create mode 100644 Tools/unix/zx/zxbdos.c create mode 100644 Tools/unix/zx/zxbdos.h create mode 100644 Tools/unix/zx/zxcbdos.c create mode 100644 Tools/unix/zx/zxcbdos.h create mode 100644 Tools/unix/zx/zxdbdos.c create mode 100644 Tools/unix/zx/zxdbdos.h diff --git a/.github/workflows/commit.yml b/.github/workflows/commit.yml new file mode 100644 index 00000000..6847869f --- /dev/null +++ b/.github/workflows/commit.yml @@ -0,0 +1,32 @@ +name: Commit Build + +on: + push: + branches: + - master + - dev + tags-ignore: + - v* + +jobs: + build: + + runs-on: ubuntu-latest + + steps: + - uses: rlespinasse/github-slug-action@1.1.0 + + - uses: actions/checkout@v2 + + - name: Build + run: | + sudo apt-get install libncurses-dev + make + make clean + rm -rf .git* + + - name: Upload Artifact + uses: actions/upload-artifact@v1 + with: + name: RomWBW-${{env.GITHUB_REF_SLUG}}-${{env.GITHUB_SHA_SHORT}} + path: . \ No newline at end of file diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml new file mode 100644 index 00000000..5e5fbaaf --- /dev/null +++ b/.github/workflows/release.yml @@ -0,0 +1,51 @@ +name: Release Build + +on: + release: + types: published + +jobs: + build: + + runs-on: ubuntu-latest + + steps: + - uses: actions/checkout@v2 + + - name: Create Package Label + run: | + LABEL=`echo "$GITHUB_REF" | sed "s|^refs/tags/||"` + echo "::set-env name=PKGLBL::$LABEL" + + - name: Display Diagnostics + run: | + echo PKGLBL: "$PKGLBL" + echo Upload URL: "${{github.event.release.upload_url}}" + echo GITHUB_TOKEN: "${{secrets.GITHUB_TOKEN}}" + + - name: Build + run: | + sudo apt-get install libncurses-dev + make + make clean + rm -rf .git* + + - name: Upload Artifact + uses: actions/upload-artifact@v1 + with: + name: RomWBW-${{env.PKGLBL}}-Package + path: . + + - name: Create Package Archive + run: | + zip -r Package.zip . + + - name: Upload Release Asset + uses: actions/upload-release-asset@v1 + env: + GITHUB_TOKEN: ${{secrets.GITHUB_TOKEN}} + with: + upload_url: ${{github.event.release.upload_url}} + asset_path: Package.zip + asset_name: RomWBW-${{env.PKGLBL}}-Package.zip + asset_content_type: application/zip \ No newline at end of file diff --git a/.gitignore b/.gitignore new file mode 100644 index 00000000..32d51319 --- /dev/null +++ b/.gitignore @@ -0,0 +1,102 @@ +# Not sure what patterns to apply +# So ignoring all generated files explicitly + +**/*.[Bb][Ii][Nn] +**/*.[Cc][Oo][Mm] +**/*.[Rr][Oo][Mm] +**/*.com +**/*.eeprom +**/*.hex +**/*.img +**/*.lib +**/*.lst +**/*.o +**/*.prn +**/*.rel +**/*.sym +**/*.sys +**/*.tmp +**/*/font*.asm + +Binary/**/*.mym +Binary/**/*.pt3 + +Source/**/eeprom +Source/Apps/Assign.com +Source/Apps/FDU/FDU.COM +Source/Apps/Format.com +Source/Apps/IntTest.com +Source/Apps/Mode.com +Source/Apps/OSLdr.com +Source/Apps/RTC.com +Source/Apps/SysCopy.com +Source/Apps/SysGen.com +Source/Apps/Talk.com +Source/Apps/Timer.com +Source/Apps/Tune/Tune.com +Source/BPBIOS/bpsys.bak +Source/BPBIOS/bpsys.dat +Source/BPBIOS/def-ww.lib +Source/CPM3/bios3.spr +Source/CPM3/bnkbios3.spr +Source/CPM3/gencpm.dat +Source/CPM3/options.lib +Source/CPM3/zpmbios3.spr +Source/HBIOS/Blank512KB.dat +Source/HBIOS/build.inc +Source/Images/blank144 +Source/Images/blankhd +Source/Prop/Spin/ParPortProp.list +Source/Prop/Spin/PropIO.list +Source/Prop/Spin/PropIO2.list +Source/Prop/ParPortProp.list +Source/Prop/PropIO.list +Source/Prop/PropIO2.list +Source/ZPM3/bnkbios3.spr +Source/ZPM3/gencpm.com +Source/ZPM3/gencpm.com +Source/ZPM3/gencpm.dat + +Tools/Linux +Tools/Darwin + +Tools/unix/bin2asm/bin2asm +Tools/unix/cpmtools/cpmchattr +Tools/unix/cpmtools/cpmchmod +Tools/unix/cpmtools/cpmcp +Tools/unix/cpmtools/cpmls +Tools/unix/cpmtools/cpmrm +Tools/unix/cpmtools/fsck.cpm +Tools/unix/cpmtools/fsed.cpm +Tools/unix/cpmtools/mkfs.cpm +Tools/unix/lzsa/lzsa +Tools/unix/uz80as/uz80as +Tools/unix/zx/config.h +Tools/unix/zx/zx + +!Source/ver.lib +!Source/Apps/FAT/FAT.COM +!Source/BPBIOS/bpbuild.com +!Source/BPBIOS/movp112.com +!Source/BPBIOS/Z34RCP11/cledinst.com +!Source/BPBIOS/Z34RCP11/cledsave.com +!Source/Fonts +!Source/Images/**/*.[Cc][Oo][Mm] +!Source/RomDsk/**/*.[Cc][Oo][Mm] +!Source/UBIOS/FSFAT.BIN +!Source/UBIOS/UNA-BIOS.BIN +!Source/ZCCP/*.[Cc][Oo][Mm] +!Source/ZCPR-DJ/*.[Cc][Oo][Mm] +!Source/ZPM3/*.[Cc][Oo][Mm] +!Source/ZSDOS/*.[Cc][Oo][Mm] +!Tools/cpm/bin +!Tools/unix/zx +!Tools/zx + +Source/ZPM3/gencpm.com +Source/ZPM3/startzpm.com +Source/ZPM3/zccp.com +Source/ZPM3/zpmldr.com +Source/ZPM3/genbnk.dat + +Source/ZSDOS/zsdos.err \ No newline at end of file diff --git a/Binary/Apps/Clean.cmd b/Binary/Apps/Clean.cmd index cf656f2a..1427d697 100644 --- a/Binary/Apps/Clean.cmd +++ b/Binary/Apps/Clean.cmd @@ -2,5 +2,5 @@ setlocal if exist *.com del *.com - -setlocal & cd Tunes && call Clean || exit /b 1 & endlocal +if exist Tunes\*.pt? del Tunes\*.pt? +if exist Tunes\*.mym del Tunes\*.mym diff --git a/Binary/Apps/Makefile b/Binary/Apps/Makefile new file mode 100644 index 00000000..cfa80100 --- /dev/null +++ b/Binary/Apps/Makefile @@ -0,0 +1,10 @@ +TOOLS = ../../Tools +MOREDIFF := $(shell $(TOOLS)/unix/casefn.sh *.com Tunes/*) + +include $(TOOLS)/Makefile.inc + +all:: + mkdir -p Tunes + +clobber:: + rm -f *.bin *.com *.img *.rom *.pdf *.log *.eeprom *.COM *.BIN Tunes/*.mym Tunes/*.pt? diff --git a/Binary/Apps/Tunes/Clean.cmd b/Binary/Apps/Tunes/Clean.cmd deleted file mode 100644 index b57e2e0c..00000000 --- a/Binary/Apps/Tunes/Clean.cmd +++ /dev/null @@ -1,4 +0,0 @@ -@echo off -setlocal - -if exist *.pt? del *.pt? diff --git a/Binary/Apps/Tunes/Demo.mym b/Binary/Apps/Tunes/Demo.mym deleted file mode 100644 index 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zIhbMPDNVODk_s*1e#zGhfy)+wI_q&>Y{U8)<L=L--CRm*|ZK~$`E0;54iT^!>u z=&1xbmhhn*iE>l(9UR~2jMt#9%kS2kd%F(nl#kz}i*MK+^SEvnXFkpl8)OG{bV4R% zou$x`uL+AXgy9o6=^CMo(R*oQ!hAcuQbJYNzVf{gLDw7Csg5{A?U#HHjI(#jJ)usS zprk1i2nohaiIgFrbPp4B3vJM+0;Us*yz$gHnFv5>SrQ(c_!~T^lI{`id=1v%d{Z$( z>~8&OhV*lxUy0Q|mu}dNzcRuUj9TyfugX(yV+N#^;XScQN4kf29igI0GjJ&(4R0nU j$-CYVP{71f?ZSd4%7y-bL)4vb+_fs=0;Z#cDKGsU@{x_z diff --git a/Binary/DiskList.txt b/Binary/DiskList.txt new file mode 100644 index 00000000..8ecedd63 --- /dev/null +++ b/Binary/DiskList.txt @@ -0,0 +1,167 @@ +*********************************************************************** +*** *** +*** R o m W B W *** +*** *** +*** Z80/Z180 System Software *** +*** *** +*********************************************************************** + +This directory ("Binary") is part of the RomWBW System Software +distribution archive. Refer to the ReadMe.txt file in this +directory for more information on the overall contents of the +directory. + +RomWBW includes a set of disk images that are ready to copy onto +a floppy or hard/CF/SD disk. You can use your modern computer +(Windows/Linux/Mac) to copy the disk image file onto your disk +media. The disk media will then be ready to use in your RomWBW +System. + +A description of the disk images is provided later in this file. +For more information on the creatioin of these images including +instructions for customizing them or creating your own, refer to +the ReadMe.txt file in the Source\Images directory. + +Installing Images +----------------- + +The following instructions apply to Windows computers. Alternatively, +you can use the "dd" command on Linux or Mac. + +First of all, a MAJOR WARNING!!!! The tools described below are +quite capable of obliterating your running Windows system drive. Use +with extreme caution and make sure you have backups. + +To install a floppy image on floppy media, you can use the tool +called RaWriteWin. This tool is included in the Tools directory of +the distribution. This tool will write your floppy image (fd_xxx.img) +to a floppy disk using a raw block transfer. The tool is GUI based +and it's operation is self explanatory. + +To install a hard disk image on a CF card or SD card, you must have +the appropriate media card slot on your computer. If you do, you can +use the tool called Win32DiskImager. This tool is also included in +the Tools directory of the distribution. It will write your +hard disk image (hd_xxx.img) to the designated media card. This tool +is also GUI based and self explanatory. + +The use of the SIMH emulator is outside of the scope of this document. +However, if you use SIMH, you will find that you can attach the hard +disk images to the emulator with lines such as the following in your +SIMH configuration file: + + | attach hdsk0 hd_cpm22.img + | set hdsk0 format=HDSK + | set hdsk0 geom=T:2048/N:256/S:512 + | set hdsk0 wrtenb + +Making Disk Images Bootable +--------------------------- + +The Operating System disk images below are ready to boot by the +RomWBW Boot Loader. However, if you update your RomWBW ROM, then +you should also update the system tracks of your bootable disk +images. You would use SYSCOPY to do this. SYSCOPY can also be +used to make a disk bootable if it is not already bootable. + +You would use a command like the following to make drive C bootable: + + | B>SYSCOPY C:=CPM.SYS + +The system file to use depends on the operating system you are trying +to boot from the slice you are initializing with SYSCOPY: + + CP/M 2.2 - cpm.sys + ZSDOS 1.1 - zsys.sys + CP/M 3 - cpmldr.sys + ZPM3 - cpmldr.sys + +Slices +------ + +A RomWBW CP/M filesystem is fixed at 8MB. This is because it is the +largest size filesystem supported by all common CP/M variants. Since +all modern hard disks (including SD Cards and CF Cards) are much +larger than 8MB, RomWBW supports the concept of "slices". This +simply means that you can concatenate multiple CP/M filesystems (up +to 256 of them) on a single physical hard disk and RomWBW will allow +you to assign drive letters to them and treat them as multiple +independent CP/M drives. + +With the exception of the hd_combo image, each of the disk images +includes a single CP/M file system (i.e., a single slice). However, +you can easily create a multi-slice disk image by merely concatenating +multiple images together. For example, if you wanted to create a 2 +slice disk image that has ZSDOS in the first slice and Wordstar in +the second slice, you could use the following command from a Windows +command prompt: + + | C:\RomWBW\Binary>copy /b hd_zsdos.img + hd_ws.img hd_multi.img + +You can now write hd_multi.img onto your SD or CF Card and you will +have ZSDOS in the first slice and Wordstar in the second slice. + +The hd_combo disk image is an example of this. It contains several +slices in one image file. The contents of this special disk image +are described below. + +The concept of slices applies ONLY to hard disks. Floppy disks are +not large enough to support multiple slices. + +Disk Image Contents +------------------- + +What follows is a brief description of the contents of the +disk images automatically provided in the RomWBW distribution. +Note that all of the OS images include the RomWBW custom +support apps. + +cpm22 - DRI CP/M 2.2 (Bootable Floppy and Hard Disk) + + Standard DRI CP/M 2.2 distribution files along with a few commonly + used utilities. + +zsdos - ZCPR1 + ZSDOS 1.1 (Bootable Floppy and Hard Disk) + + Contains ZCPR1 and ZSDOS 1.1. This is roughly equivalent to the + ROM boot contents, but provides a full set of the applications + and related files that would not all fit on the ROM drive. + +nzcom - NZCOM (Bootable Floppy and Hard Disk) + + Standard NZCOM distribution. Note that you will need to run the + NZCOM setup before this will run properly. You will need + to refer to the NZCOM documentation. + +cpm3 - DRI CP/M3 (Bootable Floppy and Hard Disk) + + Standard DRI CP/M 3 adaptation for RomWBW that is ready to run. + It can be started by running CPMLDR. + +zpm3 - ZPM3 (Bootable Floppy and Hard Disk) + + Simeon Cran's ZCPR 3 compatible OS for CP/M 3 adapted for RomWBW and + ready to run. It can be started by running CPMLDR (which seems + wrong, but ZPMLDR is somewhat broken). + +ws4 - WordStar 4 (Floppy and Hard Disk) + + Micropro Wordstar 4 full distribution. This image is not bootable + and is intended to be added as an additional slice to an OS image. + +bp - BPBIOS (Hard Disk only) + + Adaptation of BPBIOS for RomWBW. This is NOT complete and NOT + useable in it's current state. + +combo - Multi-Boot Combination (Bootable Hard Disk) + + A pre-created combo image that contains the following slices. The + slices are identical to the individual images listed above. + + Slice 0: cpm22 (bootable) + Slice 1: zsdos (bootable) + Slice 2: nzcom (bootable) + Slice 3: cpm3 (bootable) + Slice 4: zpm3 (bootable) + Slice 5: ws4 (not bootable) diff --git a/Binary/Makefile b/Binary/Makefile new file mode 100644 index 00000000..c856d1b8 --- /dev/null +++ b/Binary/Makefile @@ -0,0 +1,8 @@ +TOOLS = ../Tools +MOREDIFF := $(shell $(TOOLS)/unix/casefn.sh *.img *.rom *.com *.eeprom) +SUBDIRS = Apps + +include $(TOOLS)/Makefile.inc + +clobber:: + rm -f *.bin *.com *.img *.rom *.pdf *.log *.eeprom diff --git a/Binary/ReadMe.txt b/Binary/ReadMe.txt index 447e3c35..70156630 100644 --- a/Binary/ReadMe.txt +++ b/Binary/ReadMe.txt @@ -17,15 +17,14 @@ released the directory is populated with the default output files. However, the output of custom builds will be placed in this directory as well. -If you only see a few files in this directory, then you downloaded just -the source from GitHub. To retrieve the full release download package, -go to https://github.com/wwarthen/RomWBW. On this page, look for the -text "XX releases" where XX is a number. Click on this text to go to the -releases page. On this page, you will see the latest releases listed. -For each release, you will see a package file called something like -"RomWBW-2.9.0-Package.zip". Click on the package file for the release -you want to download. - +If you only see a few files in this directory, then you downloaded +just the source from GitHub. To retrieve the full release download +package, go to https://github.com/wwarthen/RomWBW. On this page, +look for the text "XX releases" where XX is a number. Click on this +text to go to the releases page. On this page, you will see the +latest releases listed. For each release, you will see a package +file called something like "RomWBW-2.9.0-Package.zip". Click on the +package file for the release you want to download. ROM Firmware Images (_.rom) ------------------------------------- @@ -33,15 +32,15 @@ ROM Firmware Images (_.rom) The files with a ".rom" extension are binary images ready to program into an appropriate PROM. These files are named with the format _.rom. refers to the primary platform such as Zeta, -N8, Mark IV, etc. refers to the specific configuration. When -released, there will be a standard configuration ("std") for each +N8, Mark IV, etc. refers to the specific configuration. In +general, there will be a standard configuration ("std") for each platform. So, for example, the file called MK4_std.rom is a ROM image for the Mark IV with the standard configuration. If a custom configuration called "custom" is created and built, a new file called MK4_custom.rom will be added to this directory. Documentation of the pre-built ROM Images is contained in the -RomList.txt file. +RomList.txt file in this directory. ROM Executable Images (_.com) --------------------------------------- @@ -49,22 +48,16 @@ ROM Executable Images (_.com) When a ROM image (".rom") is created, an executable version of the ROM is also created. These files have the same naming convention as the ROM Image files, but have the extension ".com". These files can -be copied to a working system and run like a normal application. +be copied to a working system and run like a normal CP/M application. When run on the target system, they install in RAM just like they had -been programmed into the ROM. This allows a new ROM build to be -tested without reprogramming the actual ROM. - -ROM Binary Images (_.img) ------------------------------------ +been loaded from ROM. This allows a new ROM build to be tested +without reprogramming the actual ROM. -Also when a ROM image is created, a third variation of the ROM is -created again with the same naming convention, but with the extension -of .img. These files are similar to the .com files in that they can -be used to test a ROM build without actually programming a new ROM. -The .img files are specifically for loading via UNA from a FAT file -system. The functionality of the UNA FAT file system loader is -beyond the scope of this document. +WARNING: In a few cases the .com file is too big to load. If you get +a message like "Full" or "BAD LOAD" when trying to load one of the +.com files, it is too big. In these cases, you will not be able to +test the ROM prior to programming it. VDU ROM Image (vdu.rom) ----------------------- @@ -73,7 +66,7 @@ The VDU video board requires a dedicated onboard ROM containing the font data. The "vdu.rom" file contains the binary data to program onto that chip. -Disk Images (fd*.img, hd*.img) +Disk Images (fd_*.img, hd_*.img) ------------------------------ RomWBW includes a mechanism for generating floppy disk and hard disk @@ -84,23 +77,28 @@ RomWBW-based system. Essentially, these files contain prepared floppy and hard disk images with a large set of programs and related files. By copying the contents of these files to appropriate media as described below, you -can quickly create ready-to-use media. +can quickly create ready-to-use media. Win32DiskImager or +RawWriteWin can be used to copy images directly to media. These +programs are included in the RomWBW Tools directory. -The fd*.img files are floppy disk images. They are sized for 1.44MB +The fd_*.img files are floppy disk images. They are sized for 1.44MB floppy media and can be copied to actual floppy disks using RawWriteWin (as long as you have access to a floppy drive on your Windows computer). The resulting floppy disks will be usable on any RomWBW-based system with floppy drive(s). -Likewise, the hd*.img files are hard disk images. Each file is +Likewise, the hd_*.img files are hard disk images. Each file is intended to be copied to the start of any type of hard disk media (typically a CF Card or SD Card). The resulting media will be usable on any RomWBW-based system that accepts the corresponding media type. -Note that the contents of the floppy/hard disk images are created by +Documentation of the pre-built disk images is contained in the +DiskList.txt file in this directory. + +The contents of the floppy/hard disk images are created by the BuildImages.cmd script in the Source directory. Additional information on how to generate custom disk images is found in the -Source\Images directory. +Source\Images ReadMe.txt file. Propeller ROM Images (*.eeprom) ------------------------------- diff --git a/Binary/RomList.txt b/Binary/RomList.txt index 5131da59..128e400e 100644 --- a/Binary/RomList.txt +++ b/Binary/RomList.txt @@ -6,70 +6,84 @@ *** *** *********************************************************************** -This directory ("Binary") is part of the RomWBW System Software -distribution archive. Refer to the ReadMe.txt file in this -directory for more information on the overall contents of the +This directory ("Binary") is part of the RomWBW System Software +distribution archive. Refer to the ReadMe.txt file in this +directory for more information on the overall contents of the directory. -When distributed, RomWBW contains a set of pre-built ROM images that -are ready to program onto the EEPROM of any of the Z80/Z180 based -RetroBrew Computers CPU boards. Additionally, any custom built ROM +When distributed, RomWBW contains a set of pre-built ROM images that +are ready to program onto the EEPROM of any of the Z80/Z180 based +RetroBrew Computers CPU boards. Additionally, any custom built ROM images will be placed in this directory. -All of the pre-built ROM images are 512KB. This size is compatible -with all of the Z80/Z180 systems. Some systems can accept different -size ROM images. Creating alternative sizes requires a custom ROM +All of the pre-built ROM images are 512KB. This size is compatible +with all of the Z80/Z180 systems. Some systems can accept different +size ROM images. Creating alternative sizes requires a custom ROM build (see ReadMe.txt in the Source directory). -It is critical that the right ROM Imgae be selected for the target -platform being used. The table below indicates the correct ROM +It is critical that the right ROM Imgae be selected for the target +platform being used. The table below indicates the correct ROM image to use for each platform: SBC V1/V2 SBC_std.rom + SBC SimH SBC_simh.rom Zeta V1 ZETA_std.rom Zeta V2 ZETA2_std.rom N8 N8_std.rom Mark IV MK4_std.rom - RC2014 RC_std.rom - RC2014 w/ Z180 RC180_std.rom - -You will find there is one additional ROM image called -"UNA_std.rom". This ROM image is an UNA-based RomWBW ROM image. As -such, this ROM image can be used on any Z80/Z180 platform supported -by John Coffman's UNA BIOS. Refer to RetroBrew Computers Wiki for + RC2014 w/ Z80 RCZ80_std.rom + RC2014 w/ Z180 RCZ180_nat.rom (native Z180 memory addressing) + RC2014 w/ Z180 RCZ180_ext.rom (external 512K RAM/ROM module) + SC-series SC126, SC130 + Easy Z80 EZZ180_std.rom + Dyno DYNO_std.rom + +You will find there is one additional ROM image called +"UNA_std.rom". This ROM image is an UNA-based RomWBW ROM image. As +such, this ROM image can be used on any Z80/Z180 platform supported +by John Coffman's UNA BIOS. Refer to RetroBrew Computers Wiki for more information on UNA hardware support. -For each of the ROM Images (".rom"), there are corresponding files -with the extensions of ".com" and ".img". The .com variant can be -copied to a functional RomWBW-based system and executed like a -normal application under CP/M or Z-System. This will load the new -ROM on-the-fly. It is an excellent way to test a ROM Image before -actually burning it. Similarly, the .img files can be loaded using +For each of the ROM Images (".rom"), there are corresponding files +with the extensions of ".com" and ".img". The .com variant can be +copied to a functional RomWBW-based system and executed like a +normal application under CP/M or Z-System. This will load the new +ROM on-the-fly. It is an excellent way to test a ROM Image before +actually burning it. Similarly, the .img files can be loaded using the UNA FAT loader for testing. -All of the standard ROM Images are configured with: +WARNING: In a few cases the .com file is too big to load. If you get +a message like "Full" or "BAD LOAD" when trying to load one of the +.com files, it is too big. In these cases, you will not be able to +test the ROM prior to programming it. + +All of the standard ROM Images are configured for: - 512KB ROM Disk - 512KB RAM Disk - - 38.4Kbps baud serial console (RC2014 is determined by hardware) + - 38.4Kbps baud serial console (*) - Auto-discovery of all serial ports -All hard disk type devices (IDE, PPIDE, CF Card, SD Card) will be -automatically assigned two drive letters per device. The drive -letters will refer to the first 2 slices of the device. The ASSIGN -command can be used to display and reassign drives to disk devices +* RC2014 and Stephen Cousins' kits run at 115,200Kbps baud + +All hard disk type devices (IDE, PPIDE, CF Card, SD Card) will be +automatically assigned two drive letters per device. The drive +letters will refer to the first 2 slices of the device. The ASSIGN +command can be used to display and reassign drives to disk devices and slices as desired. Standard ROM Image Notes ------------------------ -The standard ROM images will detect and install support for certain -devices and peripherals that are on-board or frequently used with -each platform as documented below. If the device or peripheral is -not detected at boot, the ROM will simply bypass support +The standard ROM images will detect and install support for certain +devices and peripherals that are on-board or frequently used with +each platform as documented below. If the device or peripheral is +not detected at boot, the ROM will simply bypass support appropriately. -SBC: - - Includes support for PPIDE/CF Card(s) connected to on-board +SBC (SBC_std.rom): + - CPU speed is detected at startup + - Console on onboard UART serial port at 38400 baud + - Includes support for PPIDE/CF Card(s) connected to on-board parallel port. - Includes support for CVDU and VGA3 boards. If detected at startup, support for video and keyboard is installed @@ -85,17 +99,39 @@ SBC: circuit which is likely to cause system instability. SBC V2 does not have this issue. -ZETA/ZETA2: +SBC (SBC_simh.rom): + - SBC variant customized to run under SimH + - Implments two emulated SimH hard disk images + - Uses SimH RTC + +ZETA (ZETA_std.rom): + - CPU speed is detected at startup + - Console on onboard UART serial port at 38400 baud + - Includes support for on-board floppy disk controller and + two attached floppy disks. + - Auto-detects ParPortProp and includes support for it if it + is attached. + - If ParPortProp is installed, initial console output is + determined by JP1. If JP1 is shorted, console will go to + on-board serial port, if JP1 is open, console will go to + ParPortProp video and keyboard ports. + +ZETA2 (ZETA2_std.rom): + - CPU speed is detected at startup + - Console on onboard UART serial port at 38400 baud - Includes support for on-board floppy disk controller and two attached floppy disks. - Auto-detects ParPortProp and includes support for it if it is attached. + - Uses CTC to generate periodic timer interrupts. - If ParPortProp is installed, initial console output is determined by JP1. If JP1 is shorted, console will go to on-board serial port, if JP1 is open, console will go to ParPortProp video and keyboard ports. -N8: +N8 (N8_std.rom): + - CPU speed is detected at startup + - Console on Z180 onboard primary ASCI serial port at 38400 baud - Includes support for on-board floppy disk controller and two attached floppy disks. - Includes support for on-board TMS9918 video and keyboard @@ -103,7 +139,9 @@ N8: - Includes support for on-board SD Card as hard disk and assumes a production level N8 board (date code >= 2312). -MK4: +MK4 (MK4_std.rom): + - CPU speed is detected at startup + - Console on Z180 onboard primary ASCI serial port at 38400 baud - Includes support for on-board IDE port (CF Card via adapter). - Includes support for on-board SD Card port. - Auto-detects PropIO or PropIO V2 and installs associated @@ -112,21 +150,69 @@ MK4: startup, support for video and keyboard is installed including VT-100/ANSI terminal emulation. -RC2014: +RCZ80 (RCZ80_std.rom): + - Assumes CPU oscillator of 7.3728 MHz - Requires 512K RAM/ROM module - Auto detects Serial I/O Module (ACIA) and Dual Serial Module (SIO/2). Either one may be used. - - Includes support for Compact Flash Module - - Support for PPIDE Module may be enabled in config + - Console on whichever serial module is installed, + but will use the SIO/2 if both are installed. Baud + rate is determined by hardware, but normally 115200. + - Includes support for RC2014 Compact Flash Module + - Support for RC2014 PPIDE Module may be enabled in config - Support for Scott Baker SIO board may be enabled in config - Support for Scott Baker floppy controllers (SMC & WDC) may be enabled in config -RC2014 w/ Z180: +RCZ80 w/ KIO (RCZ80_kio.rom): + - Assumes CPU oscillator of 7.3728 MHz - Requires 512K RAM/ROM module - - Console attached to Z180 onboard serial ports at 38400 baud - - Includes support for Compact Flash Module - - Support for PPIDE Module may be enabled in config + - Requires KIO module + - Console on KIO primary serial port at 115200 baud + - Includes support for RC2014 Compact Flash Module + - Includes support for RC2014 PPIDE Module + - Support for Scott Baker SIO board may be enabled in config + - Support for Scott Baker floppy controllers (SMC & WDC) may + be enabled in config + +RCZ180 (RCZ180_nat.rom & RCZ180_ext.rom): + - Assumes CPU oscillator of 18.432 MHz + - Console on Z180 onboard primary ASCI serial port at 115200 baud + - Includes support for RC2014 Compact Flash Module + - Includes support for RC2014 PPIDE Module + - Support for alternative serial modules may be enabled in config + - Support for Scott Baker floppy controllers (SMC & WDC) may + be enabled in config + - You must pick the _nat or _ext variant depending on which + memory module you are using: + - RCZ180_nat.rom uses the built-in Z180 memory manager + for use with memory modules allow direct physical + addressing of memory, such as the SC119 + - RCZ180_ext.rom uses external bank management to access + memory, such as the 512K RAM/ROM module. + +SCZ180 (SCZ180_126.rom, SCZ180_130.rom, SCZ180_131.rom): + - Assumes CPU oscillator of 18.432 MHz + - Console on Z180 onboard primary ASCI serial port at 115200 baud + - Includes support for RC2014 Compact Flash Module + - Includes support for RC2014 PPIDE Module - Support for alternative serial modules may be enabled in config - Support for Scott Baker floppy controllers (SMC & WDC) may be enabled in config + - The 3 different variants of SCZ180 are provided to match the + 3 corresponding systems (SC126, SC130, and SC131) designed by + Stephen Cousins. + +EZZ80 (EZZ80_std.rom): + - Assumes CPU oscillator of 10.000 MHz + - Console on primary SIO serial port at 115200 baud + - Includes support for on-board SIO + - Includes support for RC2014 Compact Flash Module + - Includes support for RC2014 PPIDE Module + +DYNO (DYNO_std.rom): + - Assumes CPU oscillator of 18.432 MHz + - Console on Z180 onboard serial ports at 38400 baud + - Includes support for BQ4842 RTC + - Includes support for onboard PPIDE + - Support for Dyno floppy controllers may be enabled in config diff --git a/Doc/CPM Manual.pdf b/Doc/CPM Manual.pdf index bdcf69ad91fe15ed1c3439659100d63d6733d6a5..b7de4f24ac4156d315286d0da5849c006a5082a1 100644 GIT binary patch delta 72319 zcmcJYd0fre|Hr3Yw_=bQW9bfG!&vHmmb+Op2xG}U))En8OOzJd9fM(HnHfWtFxIR^ zp(tyzWf^Nl*+NDsN<9^_r4G3H;?;y_=h*ny{}&9ocB4;&-lr#q!Cs)WP`;K>zwQcJ*AS}Sot<%V$krOA6b?Y;7tY4s9K!4p& z?&j$iG;%ch3puA$l>d)@a(8zJnV(NO&Y?kF`v;8-@{^-~q;J2=Wd9&Jhd<2S-K`V)qo03Jpj@f{ zYx1+oBOktRPe1>$K|jb<6>W^0800tAt;G>( z|3^++A=>n|@#Q_BY9G;u48-xcE4g*~sB_Qas@Irp4U5yafW>ht74}yDM_xMTcw^`E zAwzMD&gIp)Y()`Q*(*6wtElXjymZb9#?I+O2I2%p=jzqJP7$YXp~5*)OE@P;=bT{d zoIYeIj?uZ^jSiWsz%eIOI;U0;#tG6HCmI{44;g3^8I2p;MuB zL}TCdAwzA9z8!6L&jucGVx@1qg3}V>q%%%wY@9x1AWq3>+&hJz1>7n1Enwp`Y9h%g zr87=xY@9x1sEx_El(>`PwOX)o%1Yx<0w=|p$T*ep+C*h+oIYeAPQ_&0qqyR(I*K@b z3)nbOEodrxrAj*IRL0KfLx$p*oI4VCeW-m+*f|y9oS?%0M*kry>6}v=JEspBh*L8; zcO&lGiLupSarzdpb3D%z^NCtI=hVi|=|hI%n4G&2*Kb;(Ek#_VbG%X{#hJ)CU_YQS zc1|BM5T{{s?pfRx-DVjqPTxX>b7~$>sQN!@q;pPV?3_MiD2~awXK_)B(kR_hLpaB) zNO96Rr!{s?A2JZ9WpwV&^1mtj9eoSfIYCemv!zx#=d{Mo=|hI%7@cdn@f4+7Y6<7m zN@C1urE`u`7+Z&92J*NHH1N^=TwM3vIrjLA8*ak!|NqxIVr|JOr1Oqb7@LPHj}=kJoC6fybE&qX3IA z4&o>vNMRu^9zjxgQAN6EDwG1b z2e1?lf+-x&GWI$>cB4%#`u~qRC!%2ZXQ2NhXDXNi$pdH#2jLWsg{Q<_Ej(9);vPX$ zM1@FpPE+9&P#!RILO_Mn^ALoQKL+~ZOU=znsro7hpQzAQ(I?^52{087f+`#fRf!*1 z+w2BS9|2WFg_6vC5@Hn&;3_y~IJxM#$fx`ZZ)_IqKC zG>#eSV}UF2BRR95Kd0y;*ow#t1o7icMOUEl2jCSB;wzjUk9^9%t{u$|(fTLJR}?%! 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