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DMA updates

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Add hardware probe at initialization and status checks after DMA transfers
This commit is contained in:
b1ackmai1er
2021-07-09 14:57:35 +08:00
parent 1e1ad94b6d
commit 0ebfebe8d1
17 changed files with 165 additions and 39 deletions
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2
Source/HBIOS/cfg_dyno.asm
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@@ -191,4 +191,4 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_WKD ; DMA: DMA MODE (NONE|WKD|Z180|Z280|RC)
DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC)

2
Source/HBIOS/cfg_ezz80.asm
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@@ -226,4 +226,4 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_WKD ; DMA: DMA MODE (NONE|WKD|Z180|Z280|RC)
DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC)

2
Source/HBIOS/cfg_master.asm
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@@ -294,4 +294,4 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_WKD ; DMA: DMA MODE (NONE|WKD|Z180|Z280|RC)
DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC)

2
Source/HBIOS/cfg_mk4.asm
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@@ -226,4 +226,4 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_WKD ; DMA: DMA MODE (NONE|WKD|Z180|Z280|RC)
DMAMODE .EQU DMAMODE_ECB ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC)

2
Source/HBIOS/cfg_n8.asm
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@@ -226,4 +226,4 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_WKD ; DMA: DMA MODE (NONE|WKD|Z180|Z280|RC)
DMAMODE .EQU DMAMODE_ECB ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC)

2
Source/HBIOS/cfg_rcz180.asm
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@@ -239,4 +239,4 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_WKD ; DMA: DMA MODE (NONE|WKD|Z180|Z280|RC)
DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC)

2
Source/HBIOS/cfg_rcz280.asm
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@@ -255,4 +255,4 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_WKD ; DMA: DMA MODE (NONE|WKD|Z180|Z280|RC)
DMAMODE .EQU DMAMODE_Z280 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC)

2
Source/HBIOS/cfg_rcz80.asm
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@@ -244,4 +244,4 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_WKD ; DMA: DMA MODE (NONE|WKD|Z180|Z280|RC)
DMAMODE .EQU DMAMODE_RC ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC)

2
Source/HBIOS/cfg_sbc.asm
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@@ -227,4 +227,4 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_WKD ; DMA: DMA MODE (NONE|WKD|Z180|Z280|RC)
DMAMODE .EQU DMAMODE_ECB ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC)

2
Source/HBIOS/cfg_scz180.asm
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@@ -234,4 +234,4 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_WKD ; DMA: DMA MODE (NONE|WKD|Z180|Z280|RC)
DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC)

2
Source/HBIOS/cfg_zeta.asm
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@@ -162,4 +162,4 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_WKD ; DMA: DMA MODE (NONE|WKD|Z180|Z280|RC)
DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC)

2
Source/HBIOS/cfg_zeta2.asm
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@@ -174,4 +174,4 @@ SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_WKD ; DMA: DMA MODE (NONE|WKD|Z180|Z280|RC)
DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC)

162
Source/HBIOS/dma.asm
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@@ -13,8 +13,10 @@ DMA_LOAD .equ $cf ; %11001111
DMA_ENABLE .equ $87 ; %10000111
DMA_FORCE_READY .equ $b3
DMA_DISABLE .equ $83
;
;DMA_RESET .equ $c3
DMA_START_READ_SEQUENCE .equ $a7
DMA_READ_STATUS_BYTE .equ $bf
DMA_READ_MASK_FOLLOWS .equ $bb
DMA_RESET .equ $c3
;DMA_RESET_PORT_A_TIMING .equ $c7
;DMA_RESET_PORT_B_TIMING .equ $cb
;DMA_CONTINUE .equ $d3
@@ -22,10 +24,7 @@ DMA_DISABLE .equ $83
;DMA_ENABLE_INTERUPTS .equ $ab
;DMA_RESET_DISABLE_INTERUPTS .equ $a3
;DMA_ENABLE_AFTER_RETI .equ $b7
;DMA_READ_STATUS_BYTE .equ $bf
;DMA_REINIT_STATUS_BYTE .equ $8b
;DMA_START_READ_SEQUENCE .equ $a7
;DMA_WRITE_REGISTER_COMMAND .equ $bb
;
;==================================================================================================
; DMA INITIALIZATION CODE
@@ -33,30 +32,87 @@ DMA_DISABLE .equ $83
;
DMA_INIT:
CALL NEWLINE
PRTS("DMA: IO=0x$")
PRTS("DMA: IO=0x$") ; announce
LD A, DMABASE
CALL PRTHEXBYTE
;
ld a,0
xor a
out (DMABASE+1),a ; force ready off
;
ld a,(RTCVAL)
or %00001000 ; half
out (RTCIO),a ; clock
;
call DMAProbe ; do we have a dma?
jr nz,DMA_NOTFOUND
;
ld hl,DMACode ; program the
ld b,DMACode_Len ; dma command
ld c,DMABASE ; block
;
ld a,(RTCVAL)
or %00001000 ; half
out (112),a ; clock
di
otir ; load dma
ei
xor a ; set status
;
DMA_EXIT:
push af
ld a,(RTCVAL)
and %11110111 ; full
out (112),a ; clock
out (RTCIO),a ; clock
pop af
ret
;
DMA_NOTFOUND:
push af
call PRTSTRD
.db " NOT PRESENT$"
pop af
jr DMA_EXIT
;
;==================================================================================================
; DMA PROBE - WRITE TO ADDRESS REGISTER AND READ BACK
;==================================================================================================
;
DMAProbe:
ld a,DMA_RESET
out (DMABASE),a
ld a,%01111101 ; R0-Transfer mode, A -> B, start address follows
out (DMABASE),a
ld a,$cc
out (DMABASE),a
ld a,$dd
out (DMABASE),a
ld a,$e5
out (DMABASE),a
ld a,$1a
out (DMABASE),a
ld a,DMA_LOAD
out (DMABASE),a
;
ld a,DMA_READ_MASK_FOLLOWS ; set up
out (DMABASE),a ; for
ld a,%00011000 ; register
out (DMABASE),a ; read
ld a,DMA_START_READ_SEQUENCE
out (DMABASE),a
;
in a,(DMABASE) ; read in
ld c,a ; address
in a,(DMABASE)
ld b,a
;
xor a ; is it
ld hl,$ddcc ; a match
sbc hl,bc ; return with
ret z ; status
cpl
ret
;
DMACode ;.db DMA_DISABLE ; R6-Command Disable DMA
.db %01111101 ; R0-Transfer mode, A -> B, start address, block length follow
.dw 0 ; R0-Port A, Start address
.dw 0 ; R0-Port A, Start address
.dw 0 ; R0-Block length
.db %00010100 ; R1-No timing bytes follow, address increments, is memory
.db %00010000 ; R2-No timing bytes follow, address increments, is memory
@@ -86,12 +142,22 @@ DMALDIR:
;
ld a,(RTCVAL)
or %00001000 ; half
out (112),a ; clock
out (RTCIO),a ; clock
di
otir ; load and execute dma
ei
;
ld a,DMA_READ_STATUS_BYTE ; check status
out (DMABASE),a ; of transfer
in a,(DMABASE) ; set non-zero
and %00111011 ; if failed
sub %00011011
push af
ld a,(RTCVAL)
and %11110111 ; full
out (112),a ; clock
out (RTCIO),a ; clock
pop af
ret
;
DMACopy ;.db DMA_DISABLE ; R6-Command Disable DMA
@@ -126,12 +192,22 @@ DMAOTIR:
;
ld a,(RTCVAL)
or %00001000 ; half
out (112),a ; clock
out (RTCIO),a ; clock
di
otir ; load and execute dma
ei
;
ld a,DMA_READ_STATUS_BYTE ; check status
out (DMABASE),a ; of transfer
in a,(DMABASE) ; set non-zero
and %00111011 ; if failed
sub %00011011
;
push af
ld a,(RTCVAL)
and %11110111 ; full
out (112),a ; clock
out (RTCIO),a ; clock
pop af
ret
;
DMAOutCode ;.db DMA_DISABLE ; R6-Command Disable DMA
@@ -171,12 +247,22 @@ DMAINIR:
;
ld a,(RTCVAL)
or %00001000 ; half
out (112),a ; clock
out (RTCIO),a ; clock
di
otir ; load and execute dma
ei
;
ld a,DMA_READ_STATUS_BYTE ; check status
out (DMABASE),a ; of transfer
in a,(DMABASE) ; set non-zero
and %00111011 ; if failed
sub %00011011
;
push af
ld a,(RTCVAL)
and %11110111 ; full
out (112),a ; clock
out (RTCIO),a ; clock
pop af
ret
;
DMAInCode ;.db DMA_DISABLE ; R6-Command Disable DMA
@@ -196,3 +282,43 @@ DMAInSource .db 0 ; R4-Port B, Destination port
.db DMA_ENABLE ; R6-Command Enable DMA
DMAIn_Len .equ $-DMAInCode
;
;==================================================================================================
; DEBUG - READ START, DESTINATION AN COUNT REGISTERS
;==================================================================================================
;
#IF (0)
;
DMARegDump:
ld a,DMA_READ_MASK_FOLLOWS
out (DMABASE),a
ld a,%01111110
out (DMABASE),a
ld a,DMA_START_READ_SEQUENCE
out (DMABASE),a
;
in a,(DMABASE)
ld c,a
in a,(DMABASE)
ld b,a
call PRTHEXWORD
ld a,':'
call COUT
;
in a,(DMABASE)
ld c,a
in a,(DMABASE)
ld b,a
call PRTHEXWORD
ld a,':'
call COUT
;
in a,(DMABASE)
ld c,a
in a,(DMABASE)
ld b,a
call PRTHEXWORD
;
call NEWLINE
ret
#ENDIF

7
Source/HBIOS/md.asm
View File

@@ -351,14 +351,14 @@ MD_SECM:
ADD HL,DE ; WANT TO COPY
LD DE,(MD_DSKBUF)
;
#IF (DMAENABLE)
#IF (DMAENABLE & (DMAMODE=DMAMODE_ECB))
LD BC,512-1 ; COPY ONE 512B SECTOR FROM THE
CALL DMALDIR ; 4K SECTOR TO THE DISK BUFFER
#ELSE
LD BC,512 ; COPY ONE 512B SECTOR FROM THE
LDIR ; 4K SECTOR TO THE DISK BUFFER
#ENDIF
XOR A
#ENDIF
RET
;
; SETUP DE:HL AS THE SECTOR ADDRESS TO READ OR WRITE
@@ -471,9 +471,10 @@ MD_SECM1: ; DESIRED SECTOR IS IN BUFFER
EX DE,HL
;
LD HL,(MD_DSKBUF)
#IF (DMAENABLE)
#IF (DMAENABLE & (DMAMODE=DMAMODE_ECB))
LD BC,512-1 ; COPY ONE 512B SECTOR FROM THE
CALL DMALDIR ; THE DISK BUFFER TO 4K SECTOR
RET NZ ; EXIT IF DMA COPY ERROR
#ELSE
LD BC,512 ; COPY ONE 512B SECTOR FROM THE
LDIR ; THE DISK BUFFER TO 4K SECTOR

9
Source/HBIOS/rf.asm
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@@ -272,7 +272,7 @@ RF_RDSEC:
CALL RF_SETADR ; SEND SECTOR STARTING ADDRESS TO CARD
LD HL,(RF_DSKBUF) ; HL := DISK BUFFER ADDRESS
LD A,(RF_IO) ; GET IO PORT BASE
#IF (DMAENABLE)
#IF (DMAENABLE & (DMAMODE=DMAMODE_ECB))
LD BC,512-1 ; READ 512 BYTES
CALL DMAINIR ; USING DMA
#ELSE
@@ -281,9 +281,8 @@ RF_RDSEC:
LD B,0 ; INIT BYTE COUNTER
INIR ; READ 256 BYTES
INIR ; AND ANOTHER 256 BYTES FOR 512 TOTAL
#ENDIF
XOR A ; SIGNAL SUCCESS
#ENDIF
RET ; AND DONE
;
; WRITE SECTOR
@@ -293,7 +292,7 @@ RF_WRSEC:
LD HL,(RF_DSKBUF) ; HL := DISK BUFFER ADDRESS
LD A,(RF_IO) ; GET IO PORT BASE
OR RF_DAT ; OFFSET TO DAT PORT
#IF (DMAENABLE==1)
#IF (DMAENABLE & (DMAMODE=DMAMODE_ECB))
LD BC,512-1 ; WRITE 512 BYTES
CALL DMAOTIR ; USING DMA
#ELSE
@@ -301,8 +300,8 @@ RF_WRSEC:
LD B,0 ; INIT BYTE COUNTER
OTIR ; WRITE 256 BYTES
OTIR ; AND ANOTHER 256 BYTES FOR 512 TOTAL
#ENDIF
XOR A ; SIGNAL SUCCESS
#ENDIF
RET ; AND DONE
;
;

2
Source/HBIOS/std.asm
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@@ -206,7 +206,7 @@ TMSMODE_RCV9958 .EQU 4 ; RC2014 V9958 VIDEO BOARD
; DMA MODE SELECTIONS
;
DMAMODE_NONE .EQU 0
DMAMODE_WKD .EQU 1 ; ECB-DMA WOLFGANG KABATZKE'S Z80 DMA ECB BOARD
DMAMODE_ECB .EQU 1 ; ECB-DMA WOLFGANG KABATZKE'S Z80 DMA ECB BOARD
DMAMODE_Z180 .EQU 2 ; Z180 INTEGRATED DMA
DMAMODE_Z280 .EQU 3 ; Z280 INTEGRATED DMA
DMAMODE_RC .EQU 4 ; RC2014 Z80 DMA