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Support S100 ESP32 SD Card Interface

pull/609/head v3.6.0-dev.17
Wayne Warthen 6 months ago
parent
commit
15f440ce4d
No known key found for this signature in database GPG Key ID: 8B34ED29C07EEB0A
  1. 1
      Doc/ChangeLog.txt
  2. BIN
      Doc/RomWBW Applications.pdf
  3. BIN
      Doc/RomWBW Disk Catalog.pdf
  4. BIN
      Doc/RomWBW Hardware.pdf
  5. BIN
      Doc/RomWBW Introduction.pdf
  6. BIN
      Doc/RomWBW System Guide.pdf
  7. BIN
      Doc/RomWBW User Guide.pdf
  8. 2
      ReadMe.md
  9. 2
      ReadMe.txt
  10. 12
      Source/Apps/assign/assign.asm
  11. 5
      Source/CBIOS/cbios.asm
  12. 19
      Source/Doc/Hardware.md
  13. 1
      Source/Doc/SystemGuide.md
  14. 3
      Source/HBIOS/Config/FZ80_std.asm
  15. 4
      Source/HBIOS/Config/S100_std.asm
  16. 2
      Source/HBIOS/cfg_DUO.asm
  17. 2
      Source/HBIOS/cfg_DYNO.asm
  18. 2
      Source/HBIOS/cfg_EPITX.asm
  19. 2
      Source/HBIOS/cfg_EZZ80.asm
  20. 8
      Source/HBIOS/cfg_FZ80.asm
  21. 2
      Source/HBIOS/cfg_GMZ180.asm
  22. 2
      Source/HBIOS/cfg_HEATH.asm
  23. 8
      Source/HBIOS/cfg_MASTER.asm
  24. 2
      Source/HBIOS/cfg_MBC.asm
  25. 2
      Source/HBIOS/cfg_MK4.asm
  26. 2
      Source/HBIOS/cfg_MON.asm
  27. 2
      Source/HBIOS/cfg_N8.asm
  28. 2
      Source/HBIOS/cfg_NABU.asm
  29. 2
      Source/HBIOS/cfg_RCEZ80.asm
  30. 2
      Source/HBIOS/cfg_RCZ180.asm
  31. 2
      Source/HBIOS/cfg_RCZ280.asm
  32. 2
      Source/HBIOS/cfg_RCZ80.asm
  33. 2
      Source/HBIOS/cfg_RPH.asm
  34. 8
      Source/HBIOS/cfg_S100.asm
  35. 2
      Source/HBIOS/cfg_SBC.asm
  36. 2
      Source/HBIOS/cfg_SCZ180.asm
  37. 2
      Source/HBIOS/cfg_Z80RETRO.asm
  38. 2
      Source/HBIOS/cfg_ZETA.asm
  39. 2
      Source/HBIOS/cfg_ZETA2.asm
  40. 890
      Source/HBIOS/espsd.asm
  41. 12
      Source/HBIOS/hbios.asm
  42. 1
      Source/HBIOS/hbios.inc
  43. 4
      Source/HBIOS/invntdev.asm
  44. 11
      Source/HBIOS/std.asm
  45. 2
      Source/ver.inc
  46. 2
      Source/ver.lib

1
Doc/ChangeLog.txt

@ -22,6 +22,7 @@ Version 3.6
- D?N: Added native USB driver support (keyboard, floppy, mass storage) - D?N: Added native USB driver support (keyboard, floppy, mass storage)
- MGG: Added sample program source files for all language disk iamges - MGG: Added sample program source files for all language disk iamges
- WBW: Added support for S100 Dual CF Interface - WBW: Added support for S100 Dual CF Interface
- WBW: Added support for S100 ESP32 SD Interface
Version 3.5.1 Version 3.5.1
------------- -------------

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Doc/RomWBW Applications.pdf

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Doc/RomWBW Disk Catalog.pdf

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Doc/RomWBW Hardware.pdf

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Doc/RomWBW Introduction.pdf

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Doc/RomWBW System Guide.pdf

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Doc/RomWBW User Guide.pdf

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2
ReadMe.md

@ -7,7 +7,7 @@
**RomWBW Introduction** \ **RomWBW Introduction** \
Version 3.6 \ Version 3.6 \
Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \ Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
29 Jul 2025
10 Aug 2025
# Overview # Overview

2
ReadMe.txt

@ -1,6 +1,6 @@
RomWBW Introduction RomWBW Introduction
Wayne Warthen (wwarthen@gmail.com) Wayne Warthen (wwarthen@gmail.com)
29 Jul 2025
10 Aug 2025

12
Source/Apps/assign/assign.asm

@ -39,6 +39,7 @@
; 2024-12-21 [MAP] Added CBIOS heap estimation to /B to prevent ; 2024-12-21 [MAP] Added CBIOS heap estimation to /B to prevent
; overflow when the drives are finally added ; overflow when the drives are finally added
; 2025-07-19 [D?N] Support for native USB drivers ; 2025-07-19 [D?N] Support for native USB drivers
; 2025-08-09 [WBW] Support for ESPSD driver
;_______________________________________________________________________________ ;_______________________________________________________________________________
; ;
; ToDo: ; ToDo:
@ -2429,7 +2430,7 @@ devtbl: ; device table
.dw dev04, dev05, dev06, dev07 .dw dev04, dev05, dev06, dev07
.dw dev08, dev09, dev10, dev11 .dw dev08, dev09, dev10, dev11
.dw dev12, dev13, dev14, dev15 .dw dev12, dev13, dev14, dev15
.dw dev16
.dw dev16, dev17
; ;
devunk .db "?",0 devunk .db "?",0
dev00 .db "MD",0 dev00 .db "MD",0
@ -2448,9 +2449,10 @@ dev12 .db "SYQ",0
dev13 .db "CHUSB",0 dev13 .db "CHUSB",0
dev14 .db "CHSD",0 dev14 .db "CHSD",0
dev15 .db "USB",0 dev15 .db "USB",0
dev16 .equ devunk
dev16 .db "ESPSD",0
dev17 .equ devunk
; ;
devcnt .equ 17 ; 17 device types defined
devcnt .equ 18 ; 18 device types defined
; ;
udevram .db "RAM",0 udevram .db "RAM",0
udevrom .db "ROM",0 udevrom .db "ROM",0
@ -2468,10 +2470,10 @@ stack .equ $ ; stack top
; Messages ; Messages
; ;
indent .db " ",0 indent .db " ",0
msgban1 .db "ASSIGN v2.1 for RomWBW CP/M ",0
msgban1 .db "ASSIGN v2.2 for RomWBW CP/M ",0
msg22 .db "2.2",0 msg22 .db "2.2",0
msg3 .db "3",0 msg3 .db "3",0
msbban2 .db ", 19-Jul-2025",0
msbban2 .db ", 9-Aug-2025",0
msghb .db " (HBIOS Mode)",0 msghb .db " (HBIOS Mode)",0
msgub .db " (UBIOS Mode)",0 msgub .db " (UBIOS Mode)",0
msgban3 .db "Copyright 2025, Wayne Warthen, GNU GPL v3",0 msgban3 .db "Copyright 2025, Wayne Warthen, GNU GPL v3",0

5
Source/CBIOS/cbios.asm

@ -3408,7 +3408,7 @@ DEVTBL: ; DEVICE TABLE
.DW DEV04, DEV05, DEV06, DEV07 .DW DEV04, DEV05, DEV06, DEV07
.DW DEV08, DEV09, DEV10, DEV11 .DW DEV08, DEV09, DEV10, DEV11
.DW DEV12, DEV13, DEV14, DEV15 .DW DEV12, DEV13, DEV14, DEV15
.DW DEV16
.DW DEV16, DEV17
; ;
DEVUNK .DB "???$" DEVUNK .DB "???$"
DEV00 .DB "MD$" DEV00 .DB "MD$"
@ -3427,7 +3427,8 @@ DEV12 .DB "SYQ$"
DEV13 .DB "CHUSB$" DEV13 .DB "CHUSB$"
DEV14 .DB "CHSD$" DEV14 .DB "CHSD$"
DEV15 .DB "USB$" DEV15 .DB "USB$"
DEV16 .EQU DEVUNK
DEV16 .DB "S100SD$"
DEV17 .EQU DEVUNK
; ;
#ENDIF #ENDIF
; ;

19
Source/Doc/Hardware.md

@ -436,16 +436,21 @@ An FPGA Z80 based S100 SBC
#### Supported Hardware #### Supported Hardware
- FP: LEDIO=255
- DS5RTC: RTCIO=104, IO=104 - DS5RTC: RTCIO=104, IO=104
- SSER: IO=52 - SSER: IO=52
- LPT: MODE=S100, IO=199 - LPT: MODE=S100, IO=199
- FV: IO=192, KBD MODE=FV, KBD IO=3 - FV: IO=192, KBD MODE=FV, KBD IO=3
- KBD: ENABLED - KBD: ENABLED
- SCON: IO=0 - SCON: IO=0
- ESPSD: IO=128, PRIMARY
- ESPSD: IO=128, SECONDARY
- MD: TYPE=RAM - MD: TYPE=RAM
- PPIDE: IO=48, MASTER
- PPIDE: IO=48, SLAVE
- PPIDE: MODE=STD, IO=48, MASTER
- PPIDE: MODE=STD, IO=48, SLAVE
- PPIDE: MODE=S100A, IO=56, MASTER
- PPIDE: MODE=S100A, IO=56, SLAVE
- PPIDE: MODE=S100B, IO=56, MASTER
- PPIDE: MODE=S100B, IO=56, SLAVE
- SD: MODE=FZ80, IO=108, UNITS=2 - SD: MODE=FZ80, IO=108, UNITS=2
#### Notes: #### Notes:
@ -1766,6 +1771,13 @@ as defined by the IEEE-696 specs.
- MD: TYPE=RAM - MD: TYPE=RAM
- MD: TYPE=ROM - MD: TYPE=ROM
- SD: MODE=SC, IO=12, UNITS=1 - SD: MODE=SC, IO=12, UNITS=1
- ESPSD: IO=128, PRIMARY
- ESPSD: IO=128, SECONDARY
- ESPSD occupies 995 bytes.
- PPIDE: MODE=S100A, IO=48, MASTER
- PPIDE: MODE=S100A, IO=48, SLAVE
- PPIDE: MODE=S100B, IO=48, MASTER
- PPIDE: MODE=S100B, IO=48, SLAVE
#### Notes: #### Notes:
@ -2266,6 +2278,7 @@ the active platform and configuration.
| RF | RAM Floppy Disk Interface | | RF | RAM Floppy Disk Interface |
| SD | SD Card Interface | | SD | SD Card Interface |
| SYQ | Iomega SparQ Drive on PPI | | SYQ | Iomega SparQ Drive on PPI |
| ESPSD | S100 ESP32-based SD Card Interface |
## Video ## Video

1
Source/Doc/SystemGuide.md

@ -1089,6 +1089,7 @@ below enumerates their values.
| DIODEV_CHUSB | 0x0D | CH375/376 USB Disk | ch.asm | | DIODEV_CHUSB | 0x0D | CH375/376 USB Disk | ch.asm |
| DIODEV_CHSD | 0x0E | CH375/376 SD Card | ch.asm | | DIODEV_CHSD | 0x0E | CH375/376 SD Card | ch.asm |
| DIODEV_USB | 0x0F | CH376 Native USB Device | ch376.asm | | DIODEV_USB | 0x0F | CH376 Native USB Device | ch376.asm |
| DIODEV_ESPSD | 0x10 | S100 ESP32 SD Card | espsd.asm |
A fixed set of media types are defined. The currently defined media A fixed set of media types are defined. The currently defined media
types identifiers are listed below. Each driver will support one or types identifiers are listed below. Each driver will support one or

3
Source/HBIOS/Config/FZ80_std.asm

@ -54,3 +54,6 @@ PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
; ;
LPTENABLE .SET TRUE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM) LPTENABLE .SET TRUE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
ESPSDENABLE .SET TRUE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
ESPSDCNT .SET 1 ; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD

4
Source/HBIOS/Config/S100_std.asm

@ -71,3 +71,7 @@ PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
;
ESPSDENABLE .SET TRUE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
ESPSDCNT .SET 1 ; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD

2
Source/HBIOS/cfg_DUO.asm

@ -357,6 +357,8 @@ SYQMODE .SET IMMMODE_SPP ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .SET $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO4BASE .SET $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_DYNO.asm

@ -341,6 +341,8 @@ IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
; ;
SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_EPITX.asm

@ -367,6 +367,8 @@ SYQMODE .SET IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_EZZ80.asm

@ -376,6 +376,8 @@ SYQMODE .SET IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

8
Source/HBIOS/cfg_FZ80.asm

@ -376,6 +376,14 @@ SYQMODE .SET IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .SET TRUE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
ESPSDTRACE .SET 1 ; ESPSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
ESPSDCNT .SET 1 ; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD
ESPSD0BASE .SET $80 ; ESPSD 0: ESP32 INTERFACE IO BASE ADR
ESPSD0DUAL .SET TRUE ; ESPSD 0: DUAL INTERFACE BOARD (DUAL SD)
ESPSD1BASE .SET $82 ; ESPSD 1: ESP32 INTERFACE IO BASE ADR
ESPSD1DUAL .SET TRUE ; ESPSD 1: DUAL INTERFACE BOARD (DUAL SD)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_GMZ180.asm

@ -366,6 +366,8 @@ SYQMODE .SET IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_HEATH.asm

@ -366,6 +366,8 @@ SYQMODE .SET IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

8
Source/HBIOS/cfg_MASTER.asm

@ -444,6 +444,14 @@ SYQMODE .EQU IMMMODE_NONE ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .EQU LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .EQU LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .EQU FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
ESPSDTRACE .EQU 1 ; ESPSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
ESPSDCNT .EQU 1 ; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD
ESPSD0BASE .EQU $80 ; ESPSD 0: ESP32 INTERFACE IO BASE ADR
ESPSD0DUAL .EQU TRUE ; ESPSD 0: DUAL INTERFACE BOARD (DUAL SD)
ESPSD1BASE .EQU $82 ; ESPSD 1: ESP32 INTERFACE IO BASE ADR
ESPSD1DUAL .EQU TRUE ; ESPSD 1: DUAL INTERFACE BOARD (DUAL SD)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_MBC.asm

@ -345,6 +345,8 @@ SYQMODE .SET IMMMODE_SPP ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .SET $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO4BASE .SET $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_MK4.asm

@ -338,6 +338,8 @@ IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
; ;
SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .SET $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO4BASE .SET $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_MON.asm

@ -373,6 +373,8 @@ SYQMODE .SET IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_N8.asm

@ -340,6 +340,8 @@ IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
; ;
SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .SET $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO4BASE .SET $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_NABU.asm

@ -376,6 +376,8 @@ SYQMODE .SET IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_RCEZ80.asm

@ -377,6 +377,8 @@ SYQMODE .SET IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_RCZ180.asm

@ -374,6 +374,8 @@ SYQMODE .SET IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_RCZ280.asm

@ -384,6 +384,8 @@ SYQMODE .SET IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_RCZ80.asm

@ -379,6 +379,8 @@ SYQMODE .SET IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_RPH.asm

@ -321,6 +321,8 @@ IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
; ;
SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .SET $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO4BASE .SET $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

8
Source/HBIOS/cfg_S100.asm

@ -361,6 +361,14 @@ SYQMODE .SET IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .SET TRUE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
ESPSDTRACE .SET 1 ; ESPSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
ESPSDCNT .SET 1 ; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD
ESPSD0BASE .SET $80 ; ESPSD 0: ESP32 INTERFACE IO BASE ADR
ESPSD0DUAL .SET TRUE ; ESPSD 0: DUAL INTERFACE BOARD (DUAL SD)
ESPSD1BASE .SET $82 ; ESPSD 1: ESP32 INTERFACE IO BASE ADR
ESPSD1DUAL .SET TRUE ; ESPSD 1: DUAL INTERFACE BOARD (DUAL SD)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_SBC.asm

@ -329,6 +329,8 @@ IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
; ;
SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .SET $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO4BASE .SET $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_SCZ180.asm

@ -371,6 +371,8 @@ SYQMODE .SET IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_Z80RETRO.asm

@ -299,6 +299,8 @@ IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
; ;
SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_ZETA.asm

@ -269,6 +269,8 @@ IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
; ;
SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

2
Source/HBIOS/cfg_ZETA2.asm

@ -280,6 +280,8 @@ IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM
; ;
SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
; ;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

890
Source/HBIOS/espsd.asm

@ -0,0 +1,890 @@
;
;=============================================================================
; S100 ESP32 SD DISK DRIVER
;=============================================================================
;
; DISK DEVICE DRIVER FOR THE S100 ESP32-BASED SD INTERFACE FOUND
; ON THE S100 2CF+1CF BOARD AND THE DUAL SD BOARD AS DESIGNED BY
; JOHN MONAHAN.
;
; http://www.s100computers.com/My%20System%20Pages/IDE%202CF+SD%20Board/IDE%202CF+1SD%20Board.htm
; http://www.s100computers.com/My%20System%20Pages/Dual%20SD%20card%20Board/Dual%20SD%20card%20Board.htm
;
;
; TODO:
; - ADD TIMEOUT TO DETECTION!!!
; - ADD CARD DETECT FUNCTIONALITY
;
; NOTES:
;
; THE ESP32 IMPLEMENTS AN INTELLIGENT SD CARD CONTROLLER THAT HANDLES
; ALL OF THE SD CARD INTIALIZATION AND LOW-LEVEL I/O. IT EXPOSES A
; COMMAND/RESPONSE PROTOCOL. THE DUAL SD BOARD SUPPORTS TWO SD CARD
; DEVICES. SEPARATE INIT AND SELECT COMMANDS ARE PROVIDED TO HANDLE
; THIS AS NEEDED. THE 2CF+1SD SUPPORTS ONLY A SINGLE SD CARD DEVICE.
; ONLY THE INIT/SELECT COMMANDS WITH A "0" SUFFIX CAN BE USED.
;
; TWO SEQUENTIAL I/O ADDRESSES ARE IMPLEMENTED. THE FIRST IS
; FOR STATUS AND THE SECOND IS FOR COMMAND & DATA EXCHANGE.
;
; === STATUS REGISTER (READ) ===
;
; 7 6 5 4 3 2 1 0
; +-------+-------+-------+-------+-------+-------+-------+-------+
; | XIN | ERR | DSW | CS1 | CS0 | CD1 | CD0 | XOUT |
; +-------+-------+-------+-------+-------+-------+-------+-------+
;
; XIN: DATA READ FROM ESP32 PENDING
; ERR: ERROR ACTIVE
; DSW: OLED DISPLAY ACTIVATION
; CS1: SD CARD 1 CHIP SELECT
; CS0: SD CARD 0 CHIP SELECT
; CD1: SD CARD 1 MEDIA PRESENT (CARD DETECT)
; CD0: SD CARD 0 MEDIA PRESENT (CARD DETECT)
; XOUT: DATA WRITE TO ESP32 PENDING
;
; === STATUS REGISTER (WRITE) ===
;
; 7 6 5 4 3 2 1 0
; +-------+-------+-------+-------+-------+-------+-------+-------+
; | XIN | | | | | | | XOUT |
; +-------+-------+-------+-------+-------+-------+-------+-------+
;
; XIN: UNUSED???
; XOUT: ACTIVATE WRITE TO ESP32
;
ESPSD_IO_STATUS .EQU 0 ; OFFSET OF STATUS PORT FROM BASE I/O ADDRESS
ESPSD_IO_DATA .EQU 1 ; OFFSET OF DATA PORT FROM BASE I/O ADDRESS
;
ESPSD_CMD_INIT0 .EQU $80 ; Initialize primary SD Card
ESPSD_CMD_INIT1 .EQU $81 ; INITIALIZE SECONDARY SD CARD
ESPSD_CMD_SEL0 .EQU $82 ; (RE)SELECT PRIMARY SD CARD
ESPSD_CMD_SEL1 .EQU $83 ; (RE)SELECT SECONDARY SD CARD
ESPSD_CMD_SETLBA .EQU $84 ; SET LBA FOR SUBSEQUENT I/O
ESPSD_CMD_READ .EQU $85 ; READ SECTOR FROM SELECTED SD CARD AT CURRENT LBA
ESPSD_CMD_WRITE .EQU $86 ; WRITE SECTOR TO SELECTED SD CARD AT CURRENT LBA
ESPSD_CMD_FORMAT .EQU $87 ; FORMAT SECTOR ON SELECTED SD CARD AT CURRENT LBA
ESPSD_CMD_RESET .EQU $88 ; RESET ESP32 MODULE
;
; ESPSD DEVICE STATUS CODES
;
ESPSD_STOK .EQU 0
ESPSD_STINVUNIT .EQU -1
ESPSD_STNOMEDIA .EQU -2
ESPSD_STCMDERR .EQU -3
ESPSD_STIOERR .EQU -4
ESPSD_STRDYTO .EQU -5
ESPSD_STDRQTO .EQU -6
ESPSD_STBSYTO .EQU -7
ESPSD_STNOTSUP .EQU -8
ESPSD_STNOTRDY .EQU -9
;
; IDE DEVICE CONFIGURATION
;
ESPSD_CFGSIZ .EQU 12 ; SIZE OF CFG TBL ENTRIES
;
; PER DEVICE DATA OFFSETS
;
ESPSD_DEV .EQU 0 ; OFFSET OF DEVICE NUMBER (BYTE)
ESPSD_ROLE .EQU 1 ; 0=PRIMARY, 1=SECONDARY
ESPSD_IOBASE .EQU 2 ; IO BASE ADDRESS (BYTE)
ESPSD_STAT .EQU 3 ; LAST STATUS (BYTE)
ESPSD_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD)
ESPSD_LBA .EQU 8 ; OFFSET OF LBA (DWORD)
;
ESPSD_CFGTBL:
;
#IF (ESPSDCNT >= 1)
;
ESPSD_DEV0P: ; DEVICE 0, PRIMARY
.DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY)
.DB 0 ; PRIMARY
.DB ESPSD0BASE ; IO BASE ADDRESS
.DB ESPSD_STNOTRDY ; DEVICE STATUS
.DW $0000,$0001 ; DEVICE CAPACITY
.DW 0,0 ; CURRENT LBA
;
DEVECHO "ESPSD: IO="
DEVECHO ESPSD0BASE
DEVECHO ", PRIMARY"
DEVECHO "\n"
;
#IF (ESPSD0DUAL)
;
ESPSD_DEV0S: ; DEVICE 0, SECONDARY
.DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY)
.DB 1 ; SECONDARY
.DB ESPSD0BASE ; IO BASE ADDRESS
.DB ESPSD_STNOTRDY ; DEVICE STATUS
.DW $0000,$0001 ; DEVICE CAPACITY
.DW 0,0 ; CURRENT LBA
;
DEVECHO "ESPSD: IO="
DEVECHO ESPSD0BASE
DEVECHO ", SECONDARY"
DEVECHO "\n"
;
#ENDIF
;
#ENDIF
;
#IF (ESPSDCNT >= 2)
;
ESPSD_DEV1P: ; DEVICE 1, PRIMARY
.DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY)
.DB 0 ; PRIMARY
.DB ESPSD1BASE ; IO BASE ADDRESS
.DB ESPSD_STNOTRDY ; DEVICE STATUS
.DW $0000,$0001 ; DEVICE CAPACITY
.DW 0,0 ; CURRENT LBA
;
DEVECHO "ESPSD: IO="
DEVECHO ESPSD1BASE
DEVECHO ", PRIMARY"
DEVECHO "\n"
;
#IF (ESPSD1DUAL)
;
ESPSD_DEV1S: ; DEVICE 1, SECONDARY
.DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY)
.DB 1 ; SECONDARY
.DB ESPSD1BASE ; IO BASE ADDRESS
.DB ESPSD_STNOTRDY ; DEVICE STATUS
.DW $0000,$0001 ; DEVICE CAPACITY
.DW 0,0 ; CURRENT LBA
;
DEVECHO "ESPSD: IO="
DEVECHO ESPSD1BASE
DEVECHO ", SECONDARY"
DEVECHO "\n"
;
#ENDIF
;
#ENDIF
;
#IF ($ - ESPSD_CFGTBL) != (ESPSDCNT * 2 * ESPSD_CFGSIZ)
.ECHO "*** INVALID ESPSD CONFIG TABLE ***\n"
#ENDIF
;
.DB $FF ; END OF TABLE MARKER
;
;=============================================================================
; INITIALIZATION ENTRY POINT
;=============================================================================
;
ESPSD_INIT:
;
XOR A ; ZERO ACCUM
LD (ESPSD_DEVNUM),A ; INIT DEV UNIT NUM FOR DYNAMIC ASSIGNMENT
LD IY,ESPSD_CFGTBL ; POINT TO START OF CONFIG TABLE
;
ESPSD_INIT1:
LD A,(IY) ; LOAD FIRST BYTE TO CHECK FOR END
CP $FF ; CHECK FOR END OF TABLE VALUE
JR NZ,ESPSD_INIT2 ; IF NOT END OF TABLE, CONTINUE
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
;
ESPSD_INIT2:
CALL NEWLINE ; FORMATTING
PRTS("ESPSD:$") ; TAG
;
PRTS(" IO=0x$") ; LABEL FOR IO ADDRESS
LD A,(IY+ESPSD_IOBASE) ; GET IO BASE ADDRES
CALL PRTHEXBYTE ; DISPLAY IT
;
BIT 0,(IY+ESPSD_ROLE) ; GET ROLE BIT
JR NZ,ESPSD_INIT2A ; JUMP IF SECONDARY
PRTS(" PRIMARY$") ; SHOW PRIMATY
JR ESPSD_INIT2B ; JUMP AHEAD
ESPSD_INIT2A:
PRTS(" SECONDARY$") ; SHOW SECONDARY
ESPSD_INIT2B:
CALL ESPSD_DETECT ; PROBE FOR INTERFACE
JR Z,ESPSD_INIT3 ; GOT IT, MOVE ON TO INIT UNITS
PRTS(" NOT PRESENT$") ; SHOW NOT PRESENT
JR ESPSD_INIT4 ; SKIP CFG ENTRY
;
ESPSD_INIT3:
CALL ESPSD_INIT5 ; REGISTER & INIT DEVICE
;
ESPSD_INIT4:
LD DE,ESPSD_CFGSIZ ; SIZE OF CFG TABLE ENTRY
ADD IY,DE ; BUMP POINTER
JP ESPSD_INIT1 ; AND LOOP
;
ESPSD_INIT5:
; UPDATE DRIVER RELATIVE UNIT NUMBER IN CONFIG TABLE
LD A,(ESPSD_DEVNUM) ; GET NEXT UNIT NUM TO ASSIGN
LD (IY+ESPSD_DEV),A ; UPDATE IT
INC A ; BUMP TO NEXT UNIT NUM TO ASSIGN
LD (ESPSD_DEVNUM),A ; SAVE IT
;
; ADD UNIT TO GLOBAL DISK UNIT TABLE
LD BC,ESPSD_FNTBL ; BC := FUNC TABLE ADR
PUSH IY ; CFG ENTRY POINTER
POP DE ; COPY TO DE
CALL DIO_ADDENT ; ADD ENTRY TO GLOBAL DISK DEV TABLE
;
CALL ESPSD_INITDEV ; INITIALIZE DEVICE
#IF (ESPSDTRACE < 2)
JP NZ,ESPSD_PRTSTAT
#ENDIF
RET NZ
;
CALL ESPSD_PRTPREFIX ; TAG FOR ACTIVE DEVICE
;
; PRINT STORAGE CAPACITY (BLOCK COUNT)
PRTS(" BLOCKS=0x$") ; PRINT FIELD LABEL
LD A,ESPSD_MEDCAP ; OFFSET TO CAPACITY FIELD
CALL LDHLIYA ; HL := IY + A, REG A TRASHED
CALL LD32 ; GET THE CAPACITY VALUE
CALL PRTHEX32 ; PRINT HEX VALUE
;
; PRINT STORAGE SIZE IN MB
PRTS(" SIZE=$") ; PRINT FIELD LABEL
LD B,11 ; 11 BIT SHIFT TO CONVERT BLOCKS --> MB
CALL SRL32 ; RIGHT SHIFT
CALL PRTDEC32 ; PRINT DWORD IN DECIMAL
PRTS("MB$") ; PRINT SUFFIX
;
XOR A ; SUCCESS
RET
;
;=============================================================================
; DRIVER FUNCTION TABLE
;=============================================================================
;
ESPSD_FNTBL:
.DW ESPSD_STATUS
.DW ESPSD_RESET
.DW ESPSD_SEEK
.DW ESPSD_READ
.DW ESPSD_WRITE
.DW ESPSD_VERIFY
.DW ESPSD_FORMAT
.DW ESPSD_DEVICE
.DW ESPSD_MEDIA
.DW ESPSD_DEFMED
.DW ESPSD_CAP
.DW ESPSD_GEOM
#IF (($ - ESPSD_FNTBL) != (DIO_FNCNT * 2))
.ECHO "*** INVALID IDE FUNCTION TABLE ***\n"
#ENDIF
;
ESPSD_VERIFY:
ESPSD_FORMAT:
ESPSD_DEFMED:
SYSCHKERR(ERR_NOTIMPL) ; NOT IMPLEMENTED
RET
;
;
;
ESPSD_READ:
CALL HB_DSKREAD ; HOOK HBIOS DISK READ SUPERVISOR
;;;CALL NEWLINE
;;;LD A,'R'
;;;CALL COUT
;;;CALL PRTHEXWORDHL
LD A,ESPSD_CMD_READ ; SETUP FOR BLOCK READ CMD
JP ESPSD_IO ; CONTINUE TO GENERIC IO ROUTINE
;
;
;
ESPSD_WRITE:
CALL HB_DSKWRITE ; HOOK HBIOS DISK WRITE SUPERVISOR
;;;CALL NEWLINE
;;;LD A,'W'
;;;CALL COUT
;;;CALL PRTHEXWORDHL
LD A,ESPSD_CMD_WRITE ; SETUP FOR BLOCK WRITE CMD
JP ESPSD_IO ; CONTINUE TO GENERIC IO ROUTINE
;
;
;
ESPSD_STATUS:
;;;LD A,'S'
;;;CALL COUT
; RETURN UNIT STATUS
LD A,(IY+ESPSD_STAT) ; GET STATUS OF SELECTED DEVICE
OR A ; SET FLAGS
RET ; AND RETURN
;
;
;
ESPSD_RESET:
;;;LD A,'R'
;;;CALL COUT
CALL ESPSD_INITDEV ; REINITIALIZE UNIT
OR A ; SET RESULT FLAGS
RET
;
;
;
ESPSD_DEVICE:
;;;LD A,'D'
;;;CALL COUT
LD D,DIODEV_ESPSD ; D := DEVICE TYPE
LD E,(IY+ESPSD_DEV) ; E := PHYSICAL DEVICE NUMBER
LD C,%00110010 ; C := ATTRIBUTES, REMOVABLE, SD CARD
LD H,0 ; H := MODE
LD L,(ESPSD_IOBASE) ; L := BASE I/O ADDRESS
XOR A ; SIGNAL SUCCESS
RET
;
; ESPSD_GETMED
;
ESPSD_MEDIA:
;;;LD A,'M'
;;;CALL COUT
LD A,E ; GET FLAGS
OR A ; SET FLAGS
JR Z,ESPSD_MEDIA1 ; JUST REPORT CURRENT STATUS AND MEDIA
;
CALL ESPSD_INITDEV ; REINITIALIZE DEVICE
;
ESPSD_MEDIA1:
LD A,(IY+ESPSD_STAT) ; GET STATUS
OR A ; SET FLAGS
LD D,0 ; NO MEDIA CHANGE DETECTED
LD E,MID_HD ; ASSUME WE ARE OK
RET Z ; RETURN IF GOOD INIT
LD E,MID_NONE ; SIGNAL NO MEDIA
LD A,ERR_NOMEDIA ; NO MEDIA ERROR
OR A ; SET FLAGS
RET ; AND RETURN
;
;
;
ESPSD_SEEK:
BIT 7,D ; CHECK FOR LBA FLAG
CALL Z,HB_CHS2LBA ; CLEAR MEANS CHS, CONVERT TO LBA
RES 7,D ; CLEAR FLAG REGARDLESS (DOES NO HARM IF ALREADY LBA)
LD (IY+ESPSD_LBA+0),L ; SAVE NEW LBA
LD (IY+ESPSD_LBA+1),H ; ...
LD (IY+ESPSD_LBA+2),E ; ...
LD (IY+ESPSD_LBA+3),D ; ...
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
;
;
;
ESPSD_CAP:
;;;LD A,'C'
;;;CALL COUT
LD A,(IY+ESPSD_STAT) ; GET STATUS
PUSH AF ; SAVE IT
LD A,ESPSD_MEDCAP ; OFFSET TO CAPACITY FIELD
CALL LDHLIYA ; HL := IY + A, REG A TRASHED
CALL LD32 ; GET THE CURRENT CAPACITY INTO DE:HL
LD BC,512 ; 512 BYTES PER BLOCK
POP AF ; RECOVER STATUS
OR A ; SET FLAGS
RET
;
;
;
ESPSD_GEOM:
;;;LD A,'G'
;;;CALL COUT
; FOR LBA, WE SIMULATE CHS ACCESS USING 16 HEADS AND 16 SECTORS
; RETURN HS:CC -> DE:HL, SET HIGH BIT OF D TO INDICATE LBA CAPABLE
CALL ESPSD_CAP ; GET TOTAL BLOCKS IN DE:HL, BLOCK SIZE TO BC
LD L,H ; DIVIDE BY 256 FOR # TRACKS
LD H,E ; ... HIGH BYTE DISCARDED, RESULT IN HL
LD D,16 | $80 ; HEADS / CYL = 16, SET LBA CAPABILITY BIT
LD E,16 ; SECTORS / TRACK = 16
RET ; DONE, A STILL HAS ESPSD_CAP STATUS
;
;=============================================================================
; FUNCTION SUPPORT ROUTINES
;=============================================================================
;
; ON RETURN, ZF SET INDICATES HARDWARE FOUND
;
ESPSD_DETECT:
; WE USE A DUMMY SETLBA COMMAND TO TEST FOR PRESENCE
LD HL,0 ; IRRELEVANT
JP ESPSD_SETLBA ; PASS OFF TO SETLBA
;
; INITIALIZE DEVICE
;
ESPSD_INITDEV:
CALL ESPSD_INITCARD ; PERFORM DEVICE INIT
JP NZ,ESPSD_NOMEDIA ; CONVERT TO NO MEDIA ERROR
;
; GET CAPACITY
; NOT CURRENTLY AVAILABLE IN ESP32 API
; CAPACITY IS HARD-CODED ABOVE AT API MAX OF $10000 BLOCKS
;
; RESET STATUS
LD A,ESPSD_STOK
LD (IY+ESPSD_STAT),A
XOR A
RET
;
; COMMON SECTOR I/O
;
ESPSD_IO:
LD (ESPSD_CMDVAL),A ; SAVE THE COMMAND
LD (ESPSD_DSKBUF),HL ; SAVE DISK BUFFER ADDRESS
;
; CHECK FOR ERROR STATUS AND REINIT?
;
#IF (ESPSDTRACE == 1)
LD HL,ESPSD_PRTERR ; SET UP SD_PRTERR
PUSH HL ; ... TO FILTER ALL EXITS
#ENDIF
;
; SELECT PRI/SEC DEVICE
CALL ESPSD_SELECT ; SELECT DEVICE
JP NZ,ESPSD_ERR ; ON ERROR, RECORD AND BAIL OUT
;CALL LDELAY ; *DEBUG*
;
; SET LBA
LD A,ESPSD_LBA ; OFFSET OF LBA VALUE
CALL LDHLIYA ; HL := IY + A, REG A TRASHED
CALL HB_DSKACT ; SHOW ACTIVITY
CALL LD32 ; LOAD IT TO DE:HL, AF IS TRASHED
CALL ESPSD_SETLBA ; SEND LBA TO DEVICE
;JP ESPSD_IOERR ; *DEBUG*
JP NZ,ESPSD_ERR ; ON ERROR, RECORD AND BAIL OUT
;CALL LDELAY ; *DEBUG*
;
; PERFORM BLOCK READ/WRITE
LD HL,(ESPSD_DSKBUF) ; RECOVER THE DISK BUFFER ADR
LD A,(ESPSD_CMDVAL) ; GET ORIGINAL CMD
CP ESPSD_CMD_READ ; READ?
JR NZ,ESPSD_IO2 ; IF NOT, SKIP AHEAD
CALL ESPSD_BLKREAD ; DO THE READ
JR ESPSD_IO3 ; CONTINUE
ESPSD_IO2:
CALL ESPSD_BLKWRITE ; DO THE WRITE
ESPSD_IO3:
JP NZ,ESPSD_ERR ; ON ERROR, RECORD AND BAIL OUT
;CALL LDELAY ; *DEBUG*
;
; INCREMENT LBA
LD A,ESPSD_LBA ; LBA OFFSET
CALL LDHLIYA ; HL := IY + A, REG A TRASHED
CALL INC32HL ; INCREMENT THE VALUE
;
; INCREMENT DMA
LD HL,ESPSD_DSKBUF+1 ; POINT TO MSB OF BUFFER ADR
INC (HL) ; BUMP DMA BY
INC (HL) ; ... 512 BYTES
;
; CLEAN UP
LD HL,(ESPSD_DSKBUF) ; CURRENT DMA TO HL
XOR A ; SIGNAL SUCCESS
RET ; AND DONE
;
;=============================================================================
; COMMAND PROCESSING
;=============================================================================
;
; INITIALIZE DEVICE
;
ESPSD_INITCARD:
LD A,ESPSD_CMD_INIT0 ; INIT PRIMARY DEVICE
ADD A,(IY+ESPSD_ROLE) ; ADJUST FOR PRI/SEC
JR ESPSD_RUNCMD ; USE COMMON CMD ROUTINE
;
; (RE)SELECT DEVICE
;
ESPSD_SELECT:
LD A,ESPSD_CMD_SEL0 ; INIT PRIMARY DEVICE
ADD A,(IY+ESPSD_ROLE) ; ADJUST FOR PRI/SEC
JR ESPSD_RUNCMD ; USE COMMON CMD ROUTINE
;
; SIMPLE COMMAND COMMON CODE
;
ESPSD_RUNCMD:
LD E,A ; PUT IN E
CALL ESPSD_CMD_SLOW ; SEND COMMAND
RET NZ ; HANDLE ERROR
CALL ESPSD_GETBYTE_SLOW ; GET RESULT
RET NZ ; HANDLE ERROR
LD A,E ; RESULT TO ACCUM
OR A ; SET FLAGS
RET Z ; RETURN SUCCESS
LD A,ESPSD_STNOTRDY ; CALL THIS A NOT READY ERR
OR A ; SET FLAGS
RET ; DONE
;
; SET CURRENT LBA TO VALUE IN DE:HL
; HIGH WORD (DE) IS CURRENTLY IGNORED BECAUSE API ONLY SUPPORTS
; A 16-BIT LBA.
;
ESPSD_SETLBA:
LD E,ESPSD_CMD_SETLBA
CALL ESPSD_CMD_SLOW
RET NZ
LD E,H
CALL ESPSD_PUTBYTE_SLOW
RET NZ
LD E,L
CALL ESPSD_PUTBYTE_SLOW
RET NZ
CALL ESPSD_GETBYTE_SLOW
RET NZ
LD A,E ; RESULT TO ACCUM
OR A ; SET FLAGS
RET Z ; GOOD RETURN
LD A,ESPSD_STIOERR ; CALL THIS AN IO ERROR
OR A
RET
;
; BLOCK READ 512 BYTES TO ADDRESS IN HL
;
ESPSD_BLKREAD:
LD E,ESPSD_CMD_READ
CALL ESPSD_CMD_SLOW
RET NZ
;
LD B,0 ; LOOP COUNTER
ESPSD_BLKREAD1:
PUSH BC
CALL ESPSD_GETBYTE_SLOW
RET NZ
LD (HL),E
INC HL
CALL ESPSD_GETBYTE_SLOW
RET NZ
LD (HL),E
INC HL
POP BC
DJNZ ESPSD_BLKREAD1
;
CALL ESPSD_GETBYTE_SLOW ; GET RESULT
RET NZ ; HANDLE ERROR
LD A,E ; RESULT TO ACCUM
OR A ; SET FLAGS
RET Z ; GOOD RETURN
LD A,ESPSD_STIOERR ; CALL THIS AN IO ERROR
OR A ; SET FLAGS
RET ; DONE
;
; BLOCK WRITE
;
ESPSD_BLKWRITE:
LD E,ESPSD_CMD_WRITE
CALL ESPSD_CMD_SLOW
RET NZ
;
LD B,0 ; LOOP COUNTER
ESPSD_BLKWRITE1:
PUSH BC
LD E,(HL)
INC HL
CALL ESPSD_PUTBYTE_SLOW
RET NZ
LD E,(HL)
INC HL
CALL ESPSD_PUTBYTE_SLOW
RET NZ
POP BC
DJNZ ESPSD_BLKWRITE1
;
CALL ESPSD_GETBYTE_SLOW ; GET RESULT
RET NZ ; HANDLE ERROR
LD A,E ; RESULT TO ACCUM
OR A ; SET FLAGS
RET Z ; GOOD RETURN
LD A,ESPSD_STIOERR ; CALL THIS AN IO ERROR
OR A ; SET FLAGS
RET ; DONE
;
;=============================================================================
; HARDWARE INTERFACE ROUTINES
;=============================================================================
;
; SEND COMMAND BYTE IN E TO ESP32
;
ESPSD_CMD:
PUSH DE
LD E,$33
CALL ESPSD_PUTBYTE
POP DE
RET NZ
JR ESPSD_PUTBYTE
;
; SEND COMMAND BYTE IN E TO ESP32
;
ESPSD_CMD_SLOW:
PUSH DE
LD E,$33
CALL ESPSD_PUTBYTE_SLOW
POP DE
RET NZ
JR ESPSD_PUTBYTE_SLOW
;
; WRITE BYTE IN E TO ESP32
; RETURN STATUS IN A (0=SUCCESS)
;
ESPSD_PUTBYTE:
#IF (ESPSDTRACE >= 3)
CALL PC_GT
#ENDIF
LD B,0
LD C,(IY+ESPSD_IOBASE)
ESPSD_PUTBYTE1:
IN A,(C)
BIT 0,A
JR Z,ESPSD_PUTBYTE2
;JR ESPSD_PUTBYTE1 ; *DEBUG*
DJNZ ESPSD_PUTBYTE1
LD A,ESPSD_STBSYTO
OR A
RET
ESPSD_PUTBYTE2:
INC C
OUT (C),E
;
#IF (ESPSDTRACE >= 3)
LD A,E
CALL PRTHEXBYTE
#ENDIF
;
XOR A
RET
;
; WRITE BYTE TO ESP32 FROM E WITH EXTRA LONG TIMEOUT
;
ESPSD_PUTBYTE_SLOW:
PUSH HL
LD HL,$1000 ; *TODO* TUNE THIS VALUE!!!
ESPSD_PUTBYTE_SLOW1:
PUSH HL
CALL ESPSD_PUTBYTE
POP HL
JR Z,ESPSD_PUTBYTE_SLOW_Z
DEC HL
LD A,H
OR L
JR NZ,ESPSD_PUTBYTE_SLOW1
LD A,ESPSD_STBSYTO
ESPSD_PUTBYTE_SLOW_Z:
;CALL PC_SPACE ; *DEBUG*
;CALL PRTHEXWORDHL ; *DEBUG*
POP HL
OR A ; SET FLAGS
RET
;
; READ BYTE FROM ESP32 INTO E
; RETURN STATUS IN A (0=SUCCESS)
;
ESPSD_GETBYTE:
#IF (ESPSDTRACE >= 3)
CALL PC_LT
#ENDIF
LD B,0
LD C,(IY+ESPSD_IOBASE)
ESPSD_GETBYTE1:
IN A,(C)
BIT 7,A
JR NZ,ESPSD_GETBYTE2
DJNZ ESPSD_GETBYTE1
LD A,ESPSD_STBSYTO
OR A
RET
ESPSD_GETBYTE2:
INC C
IN E,(C)
;
#IF (ESPSDTRACE >= 3)
LD A,E
CALL PRTHEXBYTE
#ENDIF
;
XOR A
RET
;
; READ BYTE FROM ESP32 INTO E WITH EXTRA LONG TIMEOUT
;
ESPSD_GETBYTE_SLOW:
PUSH HL
LD HL,$1000 ; *TODO* TUNE THIS VALUE???
ESPSD_GETBYTE_SLOW1:
PUSH HL
CALL ESPSD_GETBYTE
POP HL
JR Z,ESPSD_GETBYTE_SLOW_Z
DEC HL
LD A,H
OR L
JR NZ,ESPSD_GETBYTE_SLOW1
LD A,ESPSD_STBSYTO
ESPSD_GETBYTE_SLOW_Z:
;CALL PC_SPACE ; *DEBUG*
;CALL PRTHEXWORDHL ; *DEBUG*
POP HL
OR A ; SET FLAGS
RET
;
;=============================================================================
; ERROR HANDLING AND DIAGNOSTICS
;=============================================================================
;
; ERROR HANDLERS
;
ESPSD_INVUNIT:
LD A,ESPSD_STINVUNIT
JR ESPSD_ERR2 ; SPECIAL CASE FOR INVALID UNIT
;
ESPSD_NOMEDIA:
LD A,ESPSD_STNOMEDIA
JR ESPSD_ERR
;
ESPSD_CMDERR:
LD A,ESPSD_STCMDERR
JR ESPSD_ERR
;
ESPSD_IOERR:
LD A,ESPSD_STIOERR
JR ESPSD_ERR
;
ESPSD_RDYTO:
LD A,ESPSD_STRDYTO
JR ESPSD_ERR
;
ESPSD_DRQTO:
LD A,ESPSD_STDRQTO
JR ESPSD_ERR
;
ESPSD_BSYTO:
LD A,ESPSD_STBSYTO
JR ESPSD_ERR
;
ESPSD_NOTSUP:
LD A,ESPSD_STNOTSUP
JR ESPSD_ERR
;
ESPSD_NOTRDY:
LD A,ESPSD_STNOTRDY
JR ESPSD_ERR
;
ESPSD_ERR:
LD (IY+ESPSD_STAT),A ; SAVE NEW STATUS
;
ESPSD_ERR2:
#IF (ESPSDTRACE >= 2)
CALL ESPSD_PRTSTAT
#ENDIF
OR A ; SET FLAGS
RET
;
;
;
ESPSD_PRTERR:
RET Z ; DONE IF NO ERRORS
; FALL THRU TO ESPSD_PRTSTAT
;
; PRINT FULL DEVICE STATUS LINE
;
ESPSD_PRTSTAT:
PUSH AF
PUSH DE
PUSH HL
LD A,(IY+ESPSD_STAT)
CP ESPSD_STINVUNIT
JR Z,ESPSD_PRTSTAT2 ; INVALID UNIT IS SPECIAL CASE
CALL ESPSD_PRTPREFIX ; PRINT UNIT PREFIX
JR ESPSD_PRTSTAT3
ESPSD_PRTSTAT2:
CALL NEWLINE
PRTS("ESPSD:$") ; NO UNIT NUM IN PREFIX FOR INVALID UNIT
ESPSD_PRTSTAT3:
CALL PC_SPACE ; FORMATTING
CALL ESPSD_PRTSTATSTR
POP HL
POP DE
POP AF
RET
;
; PRINT STATUS STRING
;
ESPSD_PRTSTATSTR:
PUSH AF
PUSH DE
LD A,(IY+ESPSD_STAT)
OR A
LD DE,ESPSD_STR_STOK
JR Z,ESPSD_PRTSTATSTR1
INC A
LD DE,ESPSD_STR_STINVUNIT
JR Z,ESPSD_PRTSTATSTR1
INC A
LD DE,ESPSD_STR_STNOMEDIA
JR Z,ESPSD_PRTSTATSTR1
INC A
LD DE,ESPSD_STR_STCMDERR
JR Z,ESPSD_PRTSTATSTR1
INC A
LD DE,ESPSD_STR_STIOERR
JR Z,ESPSD_PRTSTATSTR1
INC A
LD DE,ESPSD_STR_STRDYTO
JR Z,ESPSD_PRTSTATSTR1
INC A
LD DE,ESPSD_STR_STDRQTO
JR Z,ESPSD_PRTSTATSTR1
INC A
LD DE,ESPSD_STR_STBSYTO
JR Z,ESPSD_PRTSTATSTR1
INC A
LD DE,ESPSD_STR_STNOTSUP
JR Z,ESPSD_PRTSTATSTR1
INC A
LD DE,ESPSD_STR_STNOTRDY
JR Z,ESPSD_PRTSTATSTR1
LD DE,ESPSD_STR_STUNK
ESPSD_PRTSTATSTR1:
CALL WRITESTR
POP DE
POP AF
RET
;
; PRINT DIAGNONSTIC PREFIX
;
ESPSD_PRTPREFIX:
PUSH AF
CALL NEWLINE
PRTS("ESPSD$")
LD A,(IY+ESPSD_DEV) ; GET CURRENT DEVICE NUM
CP $FE ; NOT YET ASSIGNED?
JR Z,ESPSD_PRTPREFIX1 ; SKIP DEV NUM IF SO
CALL PRTDECB
ESPSD_PRTPREFIX1:
CALL PC_COLON
POP AF
RET
;
;=============================================================================
; STRING DATA
;=============================================================================
;
ESPSD_STR_STOK .TEXT "OK$"
ESPSD_STR_STINVUNIT .TEXT "INVALID UNIT$"
ESPSD_STR_STNOMEDIA .TEXT "NO MEDIA$"
ESPSD_STR_STCMDERR .TEXT "COMMAND ERROR$"
ESPSD_STR_STIOERR .TEXT "IO ERROR$"
ESPSD_STR_STRDYTO .TEXT "READY TIMEOUT$"
ESPSD_STR_STDRQTO .TEXT "DRQ TIMEOUT$"
ESPSD_STR_STBSYTO .TEXT "BUSY TIMEOUT$"
ESPSD_STR_STNOTSUP .TEXT "NOT SUPPORTED$"
ESPSD_STR_STNOTRDY .TEXT "NOT READY$"
ESPSD_STR_STUNK .TEXT "UNKNOWN ERROR$"
;
;=============================================================================
; DATA STORAGE
;=============================================================================
;
ESPSD_CMDVAL .DB 0 ; PENDING COMMAND FOR IO FUCNTIONS
ESPSD_DSKBUF .DW 0 ; ACTIVE DISK BUFFER
;
ESPSD_DEVNUM .DB 0 ; TEMP DEVICE NUM USED DURING INIT

12
Source/HBIOS/hbios.asm

@ -4169,6 +4169,9 @@ HB_INITTBL:
#IF (CHENABLE) #IF (CHENABLE)
.DW CH_INIT .DW CH_INIT
#ENDIF #ENDIF
#IF (ESPSDENABLE)
.DW ESPSD_INIT
#ENDIF
#IF (PRPENABLE) #IF (PRPENABLE)
.DW PRP_INIT .DW PRP_INIT
#ENDIF #ENDIF
@ -8971,6 +8974,15 @@ SIZ_CH .EQU $ - ORG_CH
MEMECHO " bytes.\n" MEMECHO " bytes.\n"
#ENDIF #ENDIF
; ;
#IF (ESPSDENABLE)
ORG_ESPSD .EQU $
#INCLUDE "espsd.asm"
SIZ_ESPSD .EQU $ - ORG_ESPSD
MEMECHO "ESPSD occupies "
MEMECHO SIZ_ESPSD
MEMECHO " bytes.\n"
#ENDIF
;
#IF (ESPENABLE) #IF (ESPENABLE)
ORG_ESP .EQU $ ORG_ESP .EQU $
#INCLUDE "esp.asm" #INCLUDE "esp.asm"

1
Source/HBIOS/hbios.inc

@ -421,6 +421,7 @@ DIODEV_SYQ .EQU $0C
DIODEV_CHUSB .EQU $0D DIODEV_CHUSB .EQU $0D
DIODEV_CHSD .EQU $0E DIODEV_CHSD .EQU $0E
DIODEV_USB .EQU $0F DIODEV_USB .EQU $0F
DIODEV_ESPSD .EQU $10
; ;
; RTC DEVICE IDS ; RTC DEVICE IDS
; ;

4
Source/HBIOS/invntdev.asm

@ -1,6 +1,6 @@
;============================================================================== ;==============================================================================
; DEVIVE INVENTORY - Inventory Device ; DEVIVE INVENTORY - Inventory Device
; Version June-2025
; Version August-2025
;============================================================================== ;==============================================================================
; ;
; This was extracted from HBIOS and converted into a ROM Application ; This was extracted from HBIOS and converted into a ROM Application
@ -10,6 +10,7 @@
; ;
; Change Log: ; Change Log:
; 2025-06-30 [MAP] Initial Release copied from HBIOS.ASM ; 2025-06-30 [MAP] Initial Release copied from HBIOS.ASM
; 2025-08-09 [WBW] Add support for ESPSD driver
;______________________________________________________________________________ ;______________________________________________________________________________
; ;
; Include Files ; Include Files
@ -582,6 +583,7 @@ PS_DDSYQ .TEXT "SYQ$"
PS_DDCHUSB .TEXT "CHUSB$" PS_DDCHUSB .TEXT "CHUSB$"
PS_DDCHSD .TEXT "CHSD$" PS_DDCHSD .TEXT "CHSD$"
PS_DDCHNATUSB .TEXT "USB$" PS_DDCHNATUSB .TEXT "USB$"
PS_DDESPSD .TEXT "ESPSD$"
; ;
; DISK TYPE STRINGS ; DISK TYPE STRINGS
; ;

11
Source/HBIOS/std.asm

@ -224,17 +224,6 @@ PPIDEMODE_NONE .EQU 0
PPIDEMODE_STD .EQU 1 ; STANDARD PPIDEMODE_STD .EQU 1 ; STANDARD
PPIDEMODE_S100A .EQU 2 ; S100 PRIMARY INTERFACE PPIDEMODE_S100A .EQU 2 ; S100 PRIMARY INTERFACE
PPIDEMODE_S100B .EQU 3 ; S100 SECONDARY INTERFACE PPIDEMODE_S100B .EQU 3 ; S100 SECONDARY INTERFACE
;;;;
;;;; PPIDE MODE SELECTIONS
;;;;
;;;PPIDEMODE_NONE .EQU 0
;;;PPIDEMODE_SBC .EQU 1 ; STANDARD SBC PARALLEL PORT
;;;PPIDEMODE_DIO3 .EQU 2 ; DISKIO V3 PARALLEL PORT
;;;PPIDEMODE_MFP .EQU 3 ; MULTIFUNCTION / PIC
;;;PPIDEMODE_N8 .EQU 4 ; MULTIFUNCTION / PIC
;;;PPIDEMODE_RC .EQU 5 ; RCBUS PPIDE MODULE @ $20 (ED BRINDLEY)
;;;PPIDEMODE_DYNO .EQU 6 ; DYNO PPIDE @ $4C
;;;PPIDEMODE_RPH .EQU 7 ; RHYOPHYRE (RPH)
; ;
; SD MODE SELECTIONS ; SD MODE SELECTIONS
; ;

2
Source/ver.inc

@ -2,7 +2,7 @@
#DEFINE RMN 6 #DEFINE RMN 6
#DEFINE RUP 0 #DEFINE RUP 0
#DEFINE RTP 0 #DEFINE RTP 0
#DEFINE BIOSVER "3.6.0-dev.16"
#DEFINE BIOSVER "3.6.0-dev.17"
#define rmj RMJ #define rmj RMJ
#define rmn RMN #define rmn RMN
#define rup RUP #define rup RUP

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 6
rup equ 0 rup equ 0
rtp equ 0 rtp equ 0
biosver macro biosver macro
db "3.6.0-dev.16"
db "3.6.0-dev.17"
endm endm

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