From 170ac7d9e8ff6a07c58eab5be6eacf27828a902f Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Fri, 25 Mar 2022 11:15:36 -0700 Subject: [PATCH] Prep for Centronics Driver - Added Centronics Driver shell --- Source/HBIOS/cen.asm | 287 ++++++++++++++++++++++++++++++++++++ Source/HBIOS/cfg_dyno.asm | 2 + Source/HBIOS/cfg_ezz80.asm | 2 + Source/HBIOS/cfg_master.asm | 5 + Source/HBIOS/cfg_mbc.asm | 5 + Source/HBIOS/cfg_mk4.asm | 2 + Source/HBIOS/cfg_n8.asm | 2 + Source/HBIOS/cfg_rcz180.asm | 2 + Source/HBIOS/cfg_rcz280.asm | 2 + Source/HBIOS/cfg_rcz80.asm | 2 + Source/HBIOS/cfg_sbc.asm | 2 + Source/HBIOS/cfg_scz180.asm | 2 + Source/HBIOS/cfg_zeta.asm | 2 + Source/HBIOS/cfg_zeta2.asm | 2 + Source/HBIOS/hbios.asm | 18 ++- Source/HBIOS/hbios.inc | 1 + Source/ver.inc | 2 +- Source/ver.lib | 2 +- 18 files changed, 339 insertions(+), 3 deletions(-) create mode 100644 Source/HBIOS/cen.asm diff --git a/Source/HBIOS/cen.asm b/Source/HBIOS/cen.asm new file mode 100644 index 00000000..4cceeca1 --- /dev/null +++ b/Source/HBIOS/cen.asm @@ -0,0 +1,287 @@ +; +;================================================================================================== +; CENTRONICS INTERFACE DRIVER +;================================================================================================== +; +; CENTRONICS-STYLE PARALLEL PRINTER DRIVER. ASSUMES MBC PRINT BOARD +; AS HARDWARE. +; +; IMPLEMENTED AS A ROMWBW CHARACTER DEVICE. CURRENTLY HANDLES OUPUT +; ONLY. +; +; PORT 0 (INPUT/OUTPUT): +; +; D7 D6 D5 D4 D3 D2 D1 D0 +; +-------+-------+-------+-------+-------+-------+-------+-------+ +; | PD7 | PD6 | PD5 | PD4 | PD3 | PD2 | PD1 | PD0 | +; +-------+-------+-------+-------+-------+-------+-------+-------+ +; +; PORT 1 (INPUT): +; +; D7 D6 D5 D4 D3 D2 D1 D0 +; +-------+-------+-------+-------+-------+-------+-------+-------+ +; | BUSY | ACK | POUT | SEL | ERR | 0 | 0 | 0 | +; +-------+-------+-------+-------+-------+-------+-------+-------+ +; +; PORT 2 (INPUT/OUTPUT): +; +; D7 D6 D5 D4 D3 D2 D1 D0 +; +-------+-------+-------+-------+-------+-------+-------+-------+ +; | STAT1 | STAT0 | ENBL | PINT | SEL | RES | LF | STB | +; +-------+-------+-------+-------+-------+-------+-------+-------+ +; +CEN_NONE .EQU 0 +CEN_MBC .EQU 1 +; +; PRE-CONSOLE INITIALIZATION - DETECT AND INIT HARDWARE +; +CEN_PREINIT: +; +; SETUP THE DISPATCH TABLE ENTRIES +; NOTE: INTS WILL BE DISABLED WHEN PREINIT IS CALLED AND THEY MUST REMIAIN +; DISABLED. +; + LD B,CEN_CFGCNT ; LOOP CONTROL + XOR A ; ZERO TO ACCUM + LD (CEN_DEV),A ; CURRENT DEVICE NUMBER + LD IY,CEN_CFG ; POINT TO START OF CFG TABLE +CEN_PREINIT0: + PUSH BC ; SAVE LOOP CONTROL + CALL CEN_INITUNIT ; HAND OFF TO UNIT INIT CODE + POP BC ; RESTORE LOOP CONTROL +; + LD A,(IY+1) ; GET THE CEN TYPE DETECTED + OR A ; SET FLAGS + JR Z,CEN_PREINIT2 ; SKIP IT IF NOTHING FOUND +; + PUSH BC ; SAVE LOOP CONTROL + PUSH IY ; CFG ENTRY ADDRESS + POP DE ; ... TO DE + LD BC,CEN_FNTBL ; BC := FUNCTION TABLE ADDRESS + CALL NZ,CIO_ADDENT ; ADD ENTRY IF CEN FOUND, BC:DE + POP BC ; RESTORE LOOP CONTROL +; +CEN_PREINIT2: + LD DE,CEN_CFGSIZ ; SIZE OF CFG ENTRY + ADD IY,DE ; BUMP IY TO NEXT ENTRY + DJNZ CEN_PREINIT0 ; LOOP UNTIL DONE +; +CEN_PREINIT3: + XOR A ; SIGNAL SUCCESS + RET ; AND RETURN +; +; CEN INITIALIZATION ROUTINE +; +CEN_INITUNIT: + CALL CEN_DETECT ; DETERMINE CEN TYPE + LD (IY+1),A ; SAVE IN CONFIG TABLE + OR A ; SET FLAGS + RET Z ; ABORT IF NOTHING THERE +; + ; UPDATE WORKING CEN DEVICE NUM + LD HL,CEN_DEV ; POINT TO CURRENT DEVICE NUM + LD A,(HL) ; PUT IN ACCUM + INC (HL) ; INCREMENT IT (FOR NEXT LOOP) + LD (IY),A ; UPDATE UNIT NUM +; + ; SET DEFAULT CONFIG + LD DE,-1 ; LEAVE CONFIG ALONE + ; CALL INITDEV TO IMPLEMENT CONFIG, BUT NOTE THAT WE CALL + ; THE INITDEV ENTRY POINT THAT DOES NOT ENABLE/DISABLE INTS! + JP CEN_INITDEVX ; IMPLEMENT IT AND RETURN +; +; +; +CEN_INIT: + LD B,CEN_CFGCNT ; COUNT OF POSSIBLE CEN UNITS + LD IY,CEN_CFG ; POINT TO START OF CFG TABLE +CEN_INIT1: + PUSH BC ; SAVE LOOP CONTROL + LD A,(IY+1) ; GET CEN TYPE + OR A ; SET FLAGS + CALL NZ,CEN_PRTCFG ; PRINT IF NOT ZERO + POP BC ; RESTORE LOOP CONTROL + LD DE,CEN_CFGSIZ ; SIZE OF CFG ENTRY + ADD IY,DE ; BUMP IY TO NEXT ENTRY + DJNZ CEN_INIT1 ; LOOP TILL DONE +; + XOR A ; SIGNAL SUCCESS + RET ; DONE +; +; DRIVER FUNCTION TABLE +; +CEN_FNTBL: + .DW CEN_IN + .DW CEN_OUT + .DW CEN_IST + .DW CEN_OST + .DW CEN_INITDEV + .DW CEN_QUERY + .DW CEN_DEVICE +#IF (($ - CEN_FNTBL) != (CIO_FNCNT * 2)) + .ECHO "*** INVALID CEN FUNCTION TABLE ***\n" + !!! ; FORCE AN ASSEMBLY ERROR +#ENDIF +; +; BYTE INTPUT +; +CEN_IN: + ; INPUT NOT SUPPORTED - RETURN NULL BYTE + LD E,0 ; NULL BYTE + XOR A ; SIGNAL SUCCESS + RET +; +; BYTE OUTPUT +; +CEN_OUT: + CALL CEN_OST ; READY FOR CHAR? + JR Z,CEN_OUT ; LOOP IF NOT + ; *** ADD CODE TO OUTPUT BYTE *** + XOR A ; SIGNAL SUCCESS + RET +; +; INPUT STATUS +; +CEN_IST: + ; INPUT NOT SUPPORTED - RETURN NOT READY + XOR A ; ZERO BYTES AVAILABLE + RET ; DONE +; +; OUTPUT STATUS +; +CEN_OST: + ; *** ADD CODE TO CHECK FOR OUTPUT READY *** + OR A ; SET FLAGS + RET ; DONE +; +; INITIALIZE DEVICE +; +CEN_INITDEV: + HB_DI ; AVOID CONFLICTS + CALL CEN_INITDEVX ; DO THE REAL WORK + HB_EI ; INTS BACK ON + RET ; DONE +; +; THIS ENTRY POINT BYPASSES DISABLING/ENABLING INTS WHICH IS REQUIRED BY +; PREINIT ABOVE. PREINIT IS NOT ALLOWED TO ENABLE INTS! +; +CEN_INITDEVX: +; + ; *** ADD CODE TO INITIALIZE DEVICE *** +; + XOR A ; SIGNAL SUCCESS + RET ; RETURN +; +; +; +CEN_QUERY: + LD E,(IY+4) ; FIRST CONFIG BYTE TO E + LD D,(IY+5) ; SECOND CONFIG BYTE TO D + XOR A ; SIGNAL SUCCESS + RET ; DONE +; +; +; +CEN_DEVICE: + LD D,CIODEV_CEN ; D := DEVICE TYPE + LD E,(IY) ; E := PHYSICAL UNIT + LD C,$40 ; C := DEVICE TYPE, 0x40 IS PIO + LD H,(IY+1) ; H := MODE + LD L,(IY+3) ; L := BASE I/O ADDRESS + XOR A ; SIGNAL SUCCESS + RET +; +; CEN DETECTION ROUTINE +; +CEN_DETECT: + LD A,(IY+3) ; BASE PORT ADDRESS + LD C,A ; PUT IN C FOR I/O + CALL CEN_DETECT2 ; CHECK IT + JR Z,CEN_DETECT1 ; FOUND IT, RECORD IT + LD A,CEN_NONE ; NOTHING FOUND + RET ; DONE +; +CEN_DETECT1: + ; CEN FOUND, RECORD IT + LD A,CEN_MBC ; RETURN CHIP TYPE + RET ; DONE +; +CEN_DETECT2: + ; LOOK FOR CEN AT PORT ADDRESS IN C + ; *** ADD CODE TO DETECT DEVICE *** + OR $FF ; TEMP SET TO NOT PRESENT + RET ; RETURN RESULT, Z = CHIP FOUND +; +; +; +CEN_PRTCFG: + ; ANNOUNCE PORT + CALL NEWLINE ; FORMATTING + PRTS("CEN$") ; FORMATTING + LD A,(IY) ; DEVICE NUM + CALL PRTDECB ; PRINT DEVICE NUM + PRTS(": IO=0x$") ; FORMATTING + LD A,(IY+3) ; GET BASE PORT + CALL PRTHEXBYTE ; PRINT BASE PORT + + ; PRINT THE CEN TYPE + CALL PC_SPACE ; FORMATTING + LD A,(IY+1) ; GET CEN TYPE BYTE + RLCA ; MAKE IT A WORD OFFSET + LD HL,CEN_TYPE_MAP ; POINT HL TO TYPE MAP TABLE + CALL ADDHLA ; HL := ENTRY + LD E,(HL) ; DEREFERENCE + INC HL ; ... + LD D,(HL) ; ... TO GET STRING POINTER + CALL WRITESTR ; PRINT IT +; + ; ALL DONE IF NO CEN WAS DETECTED + LD A,(IY+1) ; GET CEN TYPE BYTE + OR A ; SET FLAGS + RET Z ; IF ZERO, NOT PRESENT +; + ; *** ADD MORE DEVICE INFO??? *** +; + XOR A + RET +; +; +; +CEN_TYPE_MAP: + .DW CEN_STR_NONE + .DW CEN_STR_CEN +; +CEN_STR_NONE .DB "$" +CEN_STR_CEN .DB "MBC$" +; +; WORKING VARIABLES +; +CEN_DEV .DB 0 ; DEVICE NUM USED DURING INIT +; +; CEN DEVICE CONFIGURATION TABLE +; +CEN_CFG: +; +CEN0_CFG: + ; CEN MODULE A CONFIG + .DB 0 ; DEVICE NUMBER (SET DURING INIT) + .DB 0 ; CEN TYPE (SET DURING INIT) + .DB 0 ; MODULE ID + .DB CEN0BASE ; BASE PORT + .DW 0 ; LINE CONFIGURATION +; +CEN_CFGSIZ .EQU $ - CEN_CFG ; SIZE OF ONE CFG TABLE ENTRY +; +#IF (CENCNT >= 2) +; +CEN1_CFG: + ; CEN MODULE B CONFIG + .DB 0 ; DEVICE NUMBER (SET DURING INIT) + .DB 0 ; CEN TYPE (SET DURING INIT) + .DB 1 ; MODULE ID + .DB CEN1BASE ; BASE PORT + .DW 0 ; LINE CONFIGURATION +; +#ENDIF +; +CEN_CFGCNT .EQU ($ - CEN_CFG) / CEN_CFGSIZ diff --git a/Source/HBIOS/cfg_dyno.asm b/Source/HBIOS/cfg_dyno.asm index 7be37bcb..fb1d0e36 100644 --- a/Source/HBIOS/cfg_dyno.asm +++ b/Source/HBIOS/cfg_dyno.asm @@ -181,6 +181,8 @@ HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM) ; PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM) ; +CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM) +; PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP diff --git a/Source/HBIOS/cfg_ezz80.asm b/Source/HBIOS/cfg_ezz80.asm index 59ee6c98..05380eb9 100644 --- a/Source/HBIOS/cfg_ezz80.asm +++ b/Source/HBIOS/cfg_ezz80.asm @@ -223,6 +223,8 @@ HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM) ; PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM) ; +CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM) +; PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP diff --git a/Source/HBIOS/cfg_master.asm b/Source/HBIOS/cfg_master.asm index 42a39766..0027b3ad 100644 --- a/Source/HBIOS/cfg_master.asm +++ b/Source/HBIOS/cfg_master.asm @@ -291,6 +291,11 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR ; +CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM) +CENCNT .EQU 1 ; CEN: NUMBER OF CHIPS TO DETECT (1-2) +CEN0BASE .EQU $E8 ; CEN 0: REGISTERS BASE ADR +CEN1BASE .EQU $EC ; CEN 1: REGISTERS BASE ADR +; PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) diff --git a/Source/HBIOS/cfg_mbc.asm b/Source/HBIOS/cfg_mbc.asm index a5cae23b..d025d429 100644 --- a/Source/HBIOS/cfg_mbc.asm +++ b/Source/HBIOS/cfg_mbc.asm @@ -223,6 +223,11 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR ; +CENENABLE .EQU TRUE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM) +CENCNT .EQU 1 ; CEN: NUMBER OF CHIPS TO DETECT (1-2) +CEN0BASE .EQU $E8 ; CEN 0: REGISTERS BASE ADR +CEN1BASE .EQU $EC ; CEN 1: REGISTERS BASE ADR +; PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) diff --git a/Source/HBIOS/cfg_mk4.asm b/Source/HBIOS/cfg_mk4.asm index 2732bd39..bb816d8e 100644 --- a/Source/HBIOS/cfg_mk4.asm +++ b/Source/HBIOS/cfg_mk4.asm @@ -224,6 +224,8 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR ; +CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM) +; PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) diff --git a/Source/HBIOS/cfg_n8.asm b/Source/HBIOS/cfg_n8.asm index 47dab164..57f589d7 100644 --- a/Source/HBIOS/cfg_n8.asm +++ b/Source/HBIOS/cfg_n8.asm @@ -222,6 +222,8 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR ; +CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM) +; PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm index 63000248..e558f32e 100644 --- a/Source/HBIOS/cfg_rcz180.asm +++ b/Source/HBIOS/cfg_rcz180.asm @@ -238,6 +238,8 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR ; +CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM) +; PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP diff --git a/Source/HBIOS/cfg_rcz280.asm b/Source/HBIOS/cfg_rcz280.asm index e79d56c7..509ca067 100644 --- a/Source/HBIOS/cfg_rcz280.asm +++ b/Source/HBIOS/cfg_rcz280.asm @@ -254,6 +254,8 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR ; +CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM) +; PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP diff --git a/Source/HBIOS/cfg_rcz80.asm b/Source/HBIOS/cfg_rcz80.asm index 8c4e8454..b7023e43 100644 --- a/Source/HBIOS/cfg_rcz80.asm +++ b/Source/HBIOS/cfg_rcz80.asm @@ -243,6 +243,8 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR ; +CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM) +; PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP diff --git a/Source/HBIOS/cfg_sbc.asm b/Source/HBIOS/cfg_sbc.asm index 2f7bedff..d2e9633b 100644 --- a/Source/HBIOS/cfg_sbc.asm +++ b/Source/HBIOS/cfg_sbc.asm @@ -223,6 +223,8 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR ; +CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM) +; PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) diff --git a/Source/HBIOS/cfg_scz180.asm b/Source/HBIOS/cfg_scz180.asm index 3fc39a3d..2ba1afe1 100644 --- a/Source/HBIOS/cfg_scz180.asm +++ b/Source/HBIOS/cfg_scz180.asm @@ -228,6 +228,8 @@ PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (P ; HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM) ; +CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM) +; PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM) PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR diff --git a/Source/HBIOS/cfg_zeta.asm b/Source/HBIOS/cfg_zeta.asm index 198a5985..1ce35d28 100644 --- a/Source/HBIOS/cfg_zeta.asm +++ b/Source/HBIOS/cfg_zeta.asm @@ -167,6 +167,8 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR ; +CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM) +; PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP diff --git a/Source/HBIOS/cfg_zeta2.asm b/Source/HBIOS/cfg_zeta2.asm index da495739..fcb12b1c 100644 --- a/Source/HBIOS/cfg_zeta2.asm +++ b/Source/HBIOS/cfg_zeta2.asm @@ -175,6 +175,8 @@ HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM) ; PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM) ; +CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM) +; PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index 4382b343..ac6d2980 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -2874,6 +2874,9 @@ HB_PCINITTBL: #IF (PIOENABLE) .DW PIO_PREINIT #ENDIF +#IF CENENABLE) + .DW CEN_PREINIT +#ENDIF #IF (PIO_4P | PIO_ZP) .DW PIO_PREINIT #ENDIF @@ -2996,6 +2999,9 @@ HB_INITTBL: #IF (PIOENABLE) .DW PIO_INIT #ENDIF +#IF (CENENABLE) + .DW CEN_INIT +#ENDIF #IF (PIO_4P | PIO_ZP) .DW PIO_INIT #ENDIF @@ -5971,6 +5977,15 @@ SIZ_PIO .EQU $ - ORG_PIO .ECHO " bytes.\n" #ENDIF ; +#IF (CENENABLE) +ORG_CEN .EQU $ + #INCLUDE "cen.asm" +SIZ_CEN .EQU $ - ORG_CEN + .ECHO "CEN occupies " + .ECHO SIZ_CEN + .ECHO " bytes.\n" +#ENDIF +; #IF (PIO_4P | PIO_ZP | PIO_SBC) ORG_PIO .EQU $ #INCLUDE "pio.asm" @@ -6812,7 +6827,7 @@ PS_FLP_DSTR: .TEXT "SD$" ; PS_FLPSD ; PS_SDSTRREF: .DW PS_SDUART, PS_SDASCI, PS_SDTERM, PS_SDPRPCON, PS_SDPPPCON - .DW PS_SDSIO, PS_SDACIA, PS_SDPIO, PS_SDUF, PS_SDDUART, PS_SDZ2U + .DW PS_SDSIO, PS_SDACIA, PS_SDPIO, PS_SDUF, PS_SDDUART, PS_SDZ2U, PS_SDCEN ; PS_SDUART .TEXT "UART$" PS_SDASCI .TEXT "ASCI$" @@ -6825,6 +6840,7 @@ PS_SDPIO .TEXT "PIO$" PS_SDUF .TEXT "UF$" PS_SDDUART .TEXT "DUART$" PS_SDZ2U .TEXT "Z2U$" +PS_SDCEN .TEXT "CEN$" ; ; CHARACTER SUB TYPE STRINGS ; diff --git a/Source/HBIOS/hbios.inc b/Source/HBIOS/hbios.inc index cd25559a..6168ec24 100644 --- a/Source/HBIOS/hbios.inc +++ b/Source/HBIOS/hbios.inc @@ -182,6 +182,7 @@ CIODEV_PIO .EQU $70 CIODEV_UF .EQU $80 CIODEV_DUART .EQU $90 CIODEV_Z2U .EQU $A0 +CIODEV_CEN .EQU $B0 ; ; SUB TYPES OF CHAR DEVICES ; diff --git a/Source/ver.inc b/Source/ver.inc index 88494f4b..052a21f4 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,4 +2,4 @@ #DEFINE RMN 1 #DEFINE RUP 1 #DEFINE RTP 0 -#DEFINE BIOSVER "3.1.1-pre.163" +#DEFINE BIOSVER "3.1.1-pre.164" diff --git a/Source/ver.lib b/Source/ver.lib index d1e06763..bc0ff5e9 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 1 rup equ 1 rtp equ 0 biosver macro - db "3.1.1-pre.163" + db "3.1.1-pre.164" endm