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@ -1,15 +1,12 @@ |
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; |
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;================================================================================================== |
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; NABU INTERRUPT INTERCEPTOR |
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; NABU HARDWARE DRIVER |
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;================================================================================================== |
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; |
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NABU_INT1CLR .EQU $68 |
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NABU_TICCNT .EQU $FFEA ; TICCNT AT $FFEA IS COPIED DOWN TO $000B |
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; |
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; NABU INTERRUPT ENABLE PORT AND STATUS PORTS ARE MANAGED BY THE |
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; PSG IO PORTS. |
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; |
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; INTERRUPT ENABLE (OUTPUT) - PSG PORT A |
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; NABU CONTROL PORT - INTERRUPT ENABLE (OUTPUT) - PSG PORT A |
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; |
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; D7 - HCCA Receive |
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; D6 - HCCA Send |
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@ -20,7 +17,13 @@ NABU_TICCNT .EQU $FFEA ; TICCNT AT $FFEA IS COPIED DOWN TO $000B |
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; D1 - Option Card 2 (J11) |
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; DO - Option Card 3 (J12) |
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; |
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; STATUS BYTE (INPUT) - PSG PORT B |
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; THE CONTROL PORT IS WRITE ONLY AND THE BITS NEED TO BE MANAGED IN |
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; MULTIPLE DRIVERS. BELOW, WE ALLOCATE NBAU_CTLVAL AS A SHADOW |
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; REGISTER FOR THE CONTROL PORT. IT IS INITIALIZED TO ZERO HERE |
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; (ALL INTS DISABLED). THE INDIVIDUAL BITS ARE SET AS APPROPIATE IN |
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; THE DRIVERS THAT WANT THE INTERRUPTS ENABLED (NABUKB, TMS). |
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; |
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; NABU STATUS PORT - STATUS BYTE (INPUT) - PSG PORT B |
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; |
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; D7 - N.C. |
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; D6 - Overrun Error (HCCA UART) |
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@ -33,91 +36,54 @@ NABU_TICCNT .EQU $FFEA ; TICCNT AT $FFEA IS COPIED DOWN TO $000B |
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; |
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; PORTS TO MANAGE PSG |
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; |
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NABU_RSEL .EQU $41 ; SELECT PSG REGISTER |
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NABU_RDAT .EQU $40 ; WRITE TO SELECTED REGISTER |
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NABU_RIN .EQU $40 ; READ FROM SELECTED REGISTER |
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NABU_BASE .EQU $40 ; BASE PORT FOR NABU PSG |
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NABU_RSEL .EQU NABU_BASE + 1 ; SELECT PSG REGISTER |
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NABU_RDAT .EQU NABU_BASE + 0 ; WRITE TO SELECTED REGISTER |
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NABU_RIN .EQU NABU_BASE + 0 ; READ FROM SELECTED REGISTER |
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; |
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DEVECHO "NABU: IO=" |
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DEVECHO NABU_INT1CLR |
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DEVECHO NABU_BASE |
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DEVECHO "\n" |
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; |
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; |
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; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION |
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; |
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NABU_PREINIT: |
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; INITIALIZE THE NABU PSG I/O PORTS |
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; PORT A IN WRITE MODE AND SET ALL BITS TO ZERO |
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; PORT B IN READ MODE |
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; |
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CALL NABU_SETPSG |
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; |
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;#IF (INTMODE == 1) |
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; ; ADD TO INTERRUPT CHAIN |
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; LD HL,NABU_STAT |
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; CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST |
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;#ENDIF |
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; RESET SHADOW REGISTER IN CASE WE ARE DOING AN HBIOS |
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; RESTART IN PLACE |
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XOR A ; ALL INTERRUPTS DISABLED |
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LD (NABU_CTLVAL),A ; SAVE IT |
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; |
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;#IF (INTMODE == 2) |
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; LD HL,NABU_STAT |
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; LD (IVT(INT_NABUKB)),HL ; IVT INDEX |
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;#ENDIF |
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; RET |
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; |
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NABU_INIT: |
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CALL NEWLINE ; FORMATTING |
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PRTS("NABU: INT1$") |
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; XOR A |
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; OUT (NABU_INT1CLR),A |
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RET ; DONE |
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; INITIALIZE THE NABU PSG I/O PORTS |
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; PORT A (CONTROL PORT) IN WRITE MODE |
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; PORT B (STATUS PORT) IN READ MODE |
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; INITIALIZE THE CONTROL REGISTER |
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; |
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NABU_SETPSG: |
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; SET I/O PORT MODES |
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LD A,7 ; PSG R7 (ENABLE REG) |
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OUT (NABU_RSEL),A ; SELECT IT |
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LD A,%01111111 ; PORT B INPUT, PORT A OUPUT |
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LD A,%01111111 ; PORT B INPUT, PORT A OUPUT, AUDIO CHANNELS DISABLED |
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OUT (NABU_RDAT),A ; SET IT |
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; |
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; SET PORT A TO VALUE 0 |
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; INITIALIZE PORT A VALUE |
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LD A,14 ; PSG R14 (PORT A DATA) |
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OUT (NABU_RSEL),A ; SELECT IT |
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#IF (INTMODE > 0) |
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#IF (TMSTIMENABLE == TRUE) |
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LD A,%00110000 ; ENABLE NABU KB & VDP INTS |
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#ELSE |
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LD A,%00100000 ; ENABLE NABU KB INTS |
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#ENDIF |
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#ELSE |
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XOR A |
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#ENDIF |
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OUT (NABU_RDAT),A ; SET IT |
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LD A,(NABU_CTLVAL) ; GET CTL VALUE SHADOW REG |
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OUT (NABU_RDAT),A ; WRITE TO HARDWARE |
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; |
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XOR A ; SIGNAL SUCCESS |
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RET ; DONE |
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; |
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; POST CONSOLE INITIALIZATION |
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; |
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NABU_INIT: |
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CALL NEWLINE ; FORMATTING |
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PRTS("NABU: IO=$") |
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LD A,NABU_BASE |
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CALL PRTHEXBYTE |
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XOR A ; SIGNAL SUCCESS |
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RET ; DONE |
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; |
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LD A,15 |
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OUT (NABU_RSEL),A |
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IN A,(NABU_RIN) |
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RET |
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; |
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; INTERRUPT ENTRY POINT |
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; |
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NABU_STAT: |
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; CALL NABU_SETPSG |
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; XOR A |
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; OUT (NABU_INT1CLR),A ; CLEAR THE INTERRUPT |
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LD HL,(NABU_TICCNT) ; INCREMENT NABU TICK COUNTER |
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INC HL ; ... IN HBIOS PROXY |
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LD (NABU_TICCNT),HL |
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; LD A,(NABU_HBTICK) ; INCREMENT INTERNAL TICK CTR |
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; INC A |
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; LD (NABU_HBTICK),A |
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; CP $0A ; CALL HB_TICK EVERY 10 INTERRUPTS (50HZ) |
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; RET NZ ; NOT TIME THEN JUST RETURN |
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CALL HB_TICK ; DO NORMAL HBIOS TICK |
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XOR A |
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; LD (NABU_HBTICK),A ; RESET HBTICK COUNTER |
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INC A ; INTERRUPT HANDLED |
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RET |
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; |
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NABU_HBTICK: |
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.DB 0 ; INTERNAL TICK CTR |
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; DATA STORAGE |
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; |
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NABU_CTLVAL .DB 0 ; SHADOW VAL FOR NABU CONTROL REGISTER |
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Wayne Warthen
2 years ago