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  1. 1
      .gitignore
  2. BIN
      Doc/RomWBW Applications.pdf
  3. BIN
      Doc/RomWBW Disk Catalog.pdf
  4. BIN
      Doc/RomWBW Errata.pdf
  5. BIN
      Doc/RomWBW System Guide.pdf
  6. BIN
      Doc/RomWBW User Guide.pdf
  7. 591
      ReadMe.md
  8. 603
      ReadMe.txt
  9. 10
      Source/Apps/assign/assign.asm
  10. 1
      Source/Build.cmd
  11. 4
      Source/BuildEZ512.cmd
  12. 6
      Source/CBIOS/cbios.asm
  13. 15
      Source/CPM22/loader.asm
  14. 17
      Source/CPM3/loader.asm
  15. 192
      Source/Doc/Applications.md
  16. 3
      Source/Doc/ReadMe.md
  17. 2
      Source/Doc/SystemGuide.md
  18. 3
      Source/Doc/UserGuide.md
  19. 16
      Source/EZ512/Bank Layout.txt
  20. 26
      Source/EZ512/Build.cmd
  21. 3
      Source/EZ512/Clean.cmd
  22. 22
      Source/EZ512/EZ512 Disk Layout.txt
  23. 27
      Source/EZ512/Makefile
  24. BIN
      Source/EZ512/ez512_cfldr.bin
  25. BIN
      Source/EZ512/ez512_mon.bin
  26. BIN
      Source/EZ512/ez512_ptbl.bin
  27. 1
      Source/HBIOS/Build.cmd
  28. 1
      Source/HBIOS/Build.sh
  29. 2
      Source/HBIOS/Config/GMZ180_std.asm
  30. 2
      Source/HBIOS/Config/MK4_std.asm
  31. 2
      Source/HBIOS/Config/N8_std.asm
  32. 2
      Source/HBIOS/Config/RCEZ80_std.asm
  33. 112
      Source/HBIOS/Config/RCZ80_ez512_std.asm
  34. 2
      Source/HBIOS/Config/RCZ80_std.asm
  35. 2
      Source/HBIOS/Config/S100_std.asm
  36. 2
      Source/HBIOS/Config/SBC_std.asm
  37. 2
      Source/HBIOS/Config/SCZ180_sc126_std.asm
  38. 2
      Source/HBIOS/Config/SCZ180_sc130_std.asm
  39. 2
      Source/HBIOS/Config/SCZ180_sc131_std.asm
  40. 2
      Source/HBIOS/Config/SCZ180_sc700_std.asm
  41. 4
      Source/HBIOS/cfg_DUO.asm
  42. 4
      Source/HBIOS/cfg_DYNO.asm
  43. 4
      Source/HBIOS/cfg_EPITX.asm
  44. 4
      Source/HBIOS/cfg_FZ80.asm
  45. 4
      Source/HBIOS/cfg_GMZ180.asm
  46. 4
      Source/HBIOS/cfg_HEATH.asm
  47. 4
      Source/HBIOS/cfg_MASTER.asm
  48. 4
      Source/HBIOS/cfg_MBC.asm
  49. 4
      Source/HBIOS/cfg_MK4.asm
  50. 4
      Source/HBIOS/cfg_MON.asm
  51. 4
      Source/HBIOS/cfg_N8.asm
  52. 4
      Source/HBIOS/cfg_NABU.asm
  53. 4
      Source/HBIOS/cfg_RCEZ80.asm
  54. 4
      Source/HBIOS/cfg_RCZ180.asm
  55. 4
      Source/HBIOS/cfg_RCZ280.asm
  56. 4
      Source/HBIOS/cfg_RCZ80.asm
  57. 4
      Source/HBIOS/cfg_RPH.asm
  58. 4
      Source/HBIOS/cfg_S100.asm
  59. 4
      Source/HBIOS/cfg_SBC.asm
  60. 4
      Source/HBIOS/cfg_SCZ180.asm
  61. 4
      Source/HBIOS/cfg_Z80RETRO.asm
  62. 4
      Source/HBIOS/cfg_ZETA.asm
  63. 4
      Source/HBIOS/cfg_ZETA2.asm
  64. 14
      Source/HBIOS/hbios.asm
  65. 54
      Source/HBIOS/md.asm
  66. 14
      Source/HBIOS/rf.asm
  67. 32
      Source/HBIOS/sd.asm
  68. 2
      Source/HBIOS/std.asm
  69. 7
      Source/Makefile
  70. 15
      Source/QPM/loader.asm
  71. 17
      Source/ZPM3/loader.asm
  72. 15
      Source/ZSDOS/loader.asm
  73. 2
      Source/ver.inc
  74. 2
      Source/ver.lib

1
.gitignore

@ -98,6 +98,7 @@ Tools/unix/zx/zx
!Source/ZSDOS/*.[Cc][Oo][Mm] !Source/ZSDOS/*.[Cc][Oo][Mm]
!Source/ZRC/*.bin !Source/ZRC/*.bin
!Source/ZRC512/*.bin !Source/ZRC512/*.bin
!Source/EZ512/*.bin
!Source/Z1RCC/*.bin !Source/Z1RCC/*.bin
!Source/ZZRCC/*.bin !Source/ZZRCC/*.bin
!Source/FZ80/*.bin !Source/FZ80/*.bin

BIN
Doc/RomWBW Applications.pdf

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Doc/RomWBW Disk Catalog.pdf

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Doc/RomWBW Errata.pdf

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Doc/RomWBW System Guide.pdf

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Doc/RomWBW User Guide.pdf

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591
ReadMe.md

@ -1,295 +1,296 @@
**RomWBW ReadMe** \
Version 3.5 \
Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
15 Dec 2024
# Overview
RomWBW software provides a complete, commercial quality implementation
of CP/M (and workalike) operating systems and applications for modern
Z80/180/280 retro-computing hardware systems. A wide variety of
platforms are supported including those produced by these developer
communities:
- [RetroBrew Computers](https://www.retrobrewcomputers.org)
(<https://www.retrobrewcomputers.org>)
- [RC2014](https://rc2014.co.uk) (<https://rc2014.co.uk>),
[RC2014-Z80](https://groups.google.com/g/rc2014-z80)
(<https://groups.google.com/g/rc2014-z80>)
- [Retro Computing](https://groups.google.com/g/retro-comp)
(<https://groups.google.com/g/retro-comp>)
- [Small Computer Central](https://smallcomputercentral.com/)
(<https://smallcomputercentral.com/>)
A complete list of the currently supported platforms is found in the
\[Installation\] section.
General features include:
- Z80 Family CPUs including Z80, Z180, and Z280
- Banked memory services for several banking designs
- Disk drivers for RAM, ROM, Floppy, IDE ATA/ATAPI, CF, SD, USB, Zip,
Iomega
- Serial drivers including UART (16550-like), ASCI, ACIA, SIO
- Video drivers including TMS9918, SY6545, MOS8563, HD6445
- Keyboard (PS/2) drivers via VT8242 or PPI interfaces
- Real time clock drivers including DS1302, BQ4845
- OSes: CP/M 2.2, ZSDOS, CP/M 3, NZ-COM, ZPM3, QPM, p-System, and
FreeRTOS
- Built-in VT-100 terminal emulation support
RomWBW is distributed as both source code and pre-built ROM and disk
images. Some of the provided software can be launched directly from the
ROM firmware itself:
- System Monitor
- Operating Systems (CP/M 2.2, ZSDOS)
- ROM BASIC (Nascom BASIC and Tasty BASIC)
- ROM Forth
A dynamic disk drive letter assignment mechanism allows mapping
operating system drive letters to any available disk media.
Additionally, mass storage devices (IDE Disk, CF Card, SD Card, etc.)
support the use of multiple slices (up to 256 per device). Each slice
contains a complete CP/M filesystem and can be mapped independently to
any drive letter. This overcomes the inherent size limitations in legacy
OSes and allows up to 2GB of accessible storage on a single device.
The pre-built ROM firmware images are generally suitable for most users.
However, it is also very easy to modify and build custom ROM images that
fully tailor the firmware to your specific preferences. All tools
required to build custom ROM firmware under Windows are included – no
need to install assemblers, etc. The firmware can also be built using
Linux or MacOS after confirming a few standard tools have been
installed.
Multiple disk images are provided in the distribution. Most disk images
contain a complete, bootable, ready-to-run implementation of a specific
operating system. A “combo” disk image contains multiple slices, each
with a full operating system implementation. If you use this disk image,
you can easily pick whichever operating system you want to boot without
changing media.
By design, RomWBW isolates all of the hardware specific functions in the
ROM chip itself. The ROM provides a hardware abstraction layer such that
all of the operating systems and applications on a disk will run on any
RomWBW-based system. To put it simply, you can take a disk (or CF/SD/USB
Card) and move it between systems transparently.
A tool is provided that allows you to access a FAT-12/16/32 filesystem.
The FAT filesystem may be coresident on the same disk media as RomWBW
slices or on stand-alone media. This makes exchanging files with modern
OSes such as Windows, MacOS, and Linux very easy.
# Acquiring RomWBW
The [RomWBW Repository](https://github.com/wwarthen/RomWBW)
(<https://github.com/wwarthen/RomWBW>) on GitHub is the official
distribution location for all project source and documentation. The
fully-built distribution releases are available on the [RomWBW Releases
Page](https://github.com/wwarthen/RomWBW/releases)
(<https://github.com/wwarthen/RomWBW/releases>) of the repository. On
this page, you will normally see a Development Snapshot as well as
recent stable releases. Unless you have a specific reason, I suggest you
stick to the most recent stable release. Expand the “Assets” drop-down
for the release you want to download, then select the asset named
RomWBW-vX.X.X-Package.zip. The Package asset includes all pre-built ROM
and Disk images as well as full source code. The other assets contain
only source code and do not have the pre-built ROM or disk images.
All source code and distributions are maintained on GitHub. Code
contributions are very welcome.
# Installation & Operation
In general, installation of RomWBW on your platform is very simple. You
just need to program your ROM with the correct ROM image from the RomWBW
distribution. Subsequently, you can write disk images on your disk
drives (IDE disk, CF Card, SD Card, etc.) which then provides even more
functionality.
Complete instructions for installation and operation of RomWBW are found
in the [RomWBW User
Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20User%20Guide.pdf).
## Documentation
Documentation for RomWBW includes:
- [RomWBW User
Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20User%20Guide.pdf)
- [RomWBW System
Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20System%20Guide.pdf)
- [RomWBW
Applications](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Applications.pdf)
- [RomWBW
Errata](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Errata.pdf)
# Acknowledgments
I want to acknowledge that a great deal of the code and inspiration for
RomWBW has been provided by or derived from the work of others in the
RetroBrew Computers Community. I sincerely appreciate all of their
contributions. The list below is probably missing many names – please
let me know if I missed you!
- Andrew Lynch started it all when he created the N8VEM Z80 SBC which
became the first platform RomWBW supported. Some of his original code
can still be found in RomWBW.
- Dan Werner wrote much of the code from which RomWBW was originally
derived and he has always been a great source of knowledge and advice.
- Douglas Goodall contributed code, time, testing, and advice in “the
early days”. He created an entire suite of application programs to
enhance the use of RomWBW. Unfortunately, they have become unusable
due to internal changes within RomWBW. As of RomWBW 2.6, these
applications are no longer provided.
- Sergey Kiselev created several hardware platforms for RomWBW including
the very popular Zeta.
- David Giles created support for the Z180 CSIO which is now included SD
Card driver.
- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver, DMA support, and a long list of general code
and documentation enhancements.
- Ed Brindley contributed some of the code that supports the RCBus
platform.
- Spencer Owen created the RC2014 series of hobbyist kit computers which
has exponentially increased RomWBW usage. Some of his kits include
RomWBW.
- Stephen Cousins has likewise created a series of hobbyist kit
computers at Small Computer Central and is distributing RomWBW with
many of them.
- Alan Cox has contributed some driver code and has provided a great
deal of advice.
- The CP/NET client files were developed by Douglas Miller.
- Phillip Stevens contributed support for FreeRTOS.
- Curt Mayer contributed the original Linux / MacOS build process.
- UNA BIOS and FDISK80 are the products of John Coffman.
- FLASH4 is a product of Will Sowerbutts.
- CLRDIR is a product of Max Scane.
- Tasty Basic is a product of Dimitri Theulings.
- Dean Netherton contributed eZ80 CPU support, the sound driver
interface, and the SN76489 sound driver.
- The RomWBW Disk Catalog document was produced by Mykl Orders.
- Rob Prouse has created many of the supplemental disk images including
Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft BASIC Compiler,
Microsoft Fortran Compiler, and a Games compendium.
- Martin R has provided substantial help reviewing and improving the
User Guide and Applications documents.
- Mark Pruden has also contributed a great deal of content to the Disk
Catalog, User Guide as well as contributing the disk image for the
Z3PLUS operating system, the COPYSL utility, and also implemented
feature for RomWBW configuration by NVRAM.
- Jacques Pelletier has contributed the DS1501 RTC driver code.
- Jose Collado has contributed enhancements to the TMS driver including
compatibility with standard TMS register configuration.
- Kevin Boone has contributed a generic HBIOS date/time utility (WDATE).
- Matt Carroll has contributed a fix to XM.COM that corrects the port
specification when doing a send.
- Dean Jenkins enhanced the build process to accommodate the Raspberry
Pi 4.
- Tom Plano has contributed a new utility (HTALK) to allow talking
directly to HBIOS COM ports.
- Lars Nelson has contributed several generic utilities such as a
universal (OS agnostic) UNARC application.
- Dylan Hall added support for specifying a secondary console.
- Bill Shen has contributed boot loaders for several of his systems.
- Laszlo Szolnoki has contributed an EF9345 video display controller
driver.
- Ladislau Szilagyi has contributed an enhanced version of CP/M Cowgol
that leverages RomWBW memory banking.
- Les Bird has contributed support for the NABU w/ Option Board
Contributions of all kinds to RomWBW are very welcome.
# Licensing
RomWBW is free software: you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation, either version 3 of the License, or (at your
option) any later version.
RomWBW is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
You should have received a copy of the GNU General Public License along
with RomWBW. If not, see <https://www.gnu.org/licenses/>.
Portions of RomWBW were created by, contributed by, or derived from the
work of others. It is believed that these works are being used in
accordance with the intentions and/or licensing of their creators.
If anyone feels their work is being used outside of its intended
licensing, please notify:
> Wayne Warthen
> <wwarthen@gmail.com>
RomWBW is an aggregate work. It is composed of many individual,
standalone programs that are distributed as a whole to function as a
cohesive system. Each program may have its own licensing which may be
different from other programs within the aggregate.
In some cases, a single program (e.g., CP/M Operating System) is
composed of multiple components with different licenses. It is believed
that in all such cases the licenses are compatible with GPL version 3.
RomWBW encourages code contributions from others. Contributors may
assert their own copyright in their contributions by annotating the
contributed source code appropriately. Contributors are further
encouraged to submit their contributions via the RomWBW source code
control system to ensure their contributions are clearly documented.
All contributions to RomWBW are subject to this license.
# Getting Assistance
The best way to get assistance with RomWBW or any aspect of the
RetroBrew Computers projects is via one of the community forums:
- [RetroBrew Computers Forum](https://www.retrobrewcomputers.org/forum/)
- [RC2014 Google
Group](https://groups.google.com/forum/#!forum/rc2014-z80)
- [retro-comp Google
Group](https://groups.google.com/forum/#!forum/retro-comp)
Submission of issues and bugs are welcome at the [RomWBW GitHub
Repository](https://github.com/wwarthen/RomWBW).
Also feel free to email Wayne Warthen at <wwarthen@gmail.com>.
**RomWBW ReadMe** \
Version 3.5 \
Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
20 Dec 2024
# Overview
RomWBW software provides a complete, commercial quality implementation
of CP/M (and workalike) operating systems and applications for modern
Z80/180/280 retro-computing hardware systems. A wide variety of
platforms are supported including those produced by these developer
communities:
- [RetroBrew Computers](https://www.retrobrewcomputers.org)
(<https://www.retrobrewcomputers.org>)
- [RC2014](https://rc2014.co.uk) (<https://rc2014.co.uk>),
[RC2014-Z80](https://groups.google.com/g/rc2014-z80)
(<https://groups.google.com/g/rc2014-z80>)
- [Retro Computing](https://groups.google.com/g/retro-comp)
(<https://groups.google.com/g/retro-comp>)
- [Small Computer Central](https://smallcomputercentral.com/)
(<https://smallcomputercentral.com/>)
A complete list of the currently supported platforms is found in the
\[Installation\] section.
General features include:
- Z80 Family CPUs including Z80, Z180, and Z280
- Banked memory services for several banking designs
- Disk drivers for RAM, ROM, Floppy, IDE ATA/ATAPI, CF, SD, USB, Zip,
Iomega
- Serial drivers including UART (16550-like), ASCI, ACIA, SIO
- Video drivers including TMS9918, SY6545, MOS8563, HD6445
- Keyboard (PS/2) drivers via VT8242 or PPI interfaces
- Real time clock drivers including DS1302, BQ4845
- OSes: CP/M 2.2, ZSDOS, CP/M 3, NZ-COM, ZPM3, QPM, p-System, and
FreeRTOS
- Built-in VT-100 terminal emulation support
RomWBW is distributed as both source code and pre-built ROM and disk
images. Some of the provided software can be launched directly from the
ROM firmware itself:
- System Monitor
- Operating Systems (CP/M 2.2, ZSDOS)
- ROM BASIC (Nascom BASIC and Tasty BASIC)
- ROM Forth
A dynamic disk drive letter assignment mechanism allows mapping
operating system drive letters to any available disk media.
Additionally, mass storage devices (IDE Disk, CF Card, SD Card, etc.)
support the use of multiple slices (up to 256 per device). Each slice
contains a complete CP/M filesystem and can be mapped independently to
any drive letter. This overcomes the inherent size limitations in legacy
OSes and allows up to 2GB of accessible storage on a single device.
The pre-built ROM firmware images are generally suitable for most users.
However, it is also very easy to modify and build custom ROM images that
fully tailor the firmware to your specific preferences. All tools
required to build custom ROM firmware under Windows are included – no
need to install assemblers, etc. The firmware can also be built using
Linux or MacOS after confirming a few standard tools have been
installed.
Multiple disk images are provided in the distribution. Most disk images
contain a complete, bootable, ready-to-run implementation of a specific
operating system. A “combo” disk image contains multiple slices, each
with a full operating system implementation. If you use this disk image,
you can easily pick whichever operating system you want to boot without
changing media.
By design, RomWBW isolates all of the hardware specific functions in the
ROM chip itself. The ROM provides a hardware abstraction layer such that
all of the operating systems and applications on a disk will run on any
RomWBW-based system. To put it simply, you can take a disk (or CF/SD/USB
Card) and move it between systems transparently.
A tool is provided that allows you to access a FAT-12/16/32 filesystem.
The FAT filesystem may be coresident on the same disk media as RomWBW
slices or on stand-alone media. This makes exchanging files with modern
OSes such as Windows, MacOS, and Linux very easy.
# Acquiring RomWBW
The [RomWBW Repository](https://github.com/wwarthen/RomWBW)
(<https://github.com/wwarthen/RomWBW>) on GitHub is the official
distribution location for all project source and documentation. The
fully-built distribution releases are available on the [RomWBW Releases
Page](https://github.com/wwarthen/RomWBW/releases)
(<https://github.com/wwarthen/RomWBW/releases>) of the repository. On
this page, you will normally see a Development Snapshot as well as
recent stable releases. Unless you have a specific reason, I suggest you
stick to the most recent stable release. Expand the “Assets” drop-down
for the release you want to download, then select the asset named
RomWBW-vX.X.X-Package.zip. The Package asset includes all pre-built ROM
and Disk images as well as full source code. The other assets contain
only source code and do not have the pre-built ROM or disk images.
All source code and distributions are maintained on GitHub. Code
contributions are very welcome.
# Installation & Operation
In general, installation of RomWBW on your platform is very simple. You
just need to program your ROM with the correct ROM image from the RomWBW
distribution. Subsequently, you can write disk images on your disk
drives (IDE disk, CF Card, SD Card, etc.) which then provides even more
functionality.
Complete instructions for installation and operation of RomWBW are found
in the [RomWBW User
Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20User%20Guide.pdf).
## Documentation
Documentation for RomWBW includes:
- [RomWBW User
Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20User%20Guide.pdf)
- [RomWBW System
Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20System%20Guide.pdf)
- [RomWBW
Applications](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Applications.pdf)
- [RomWBW
Errata](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Errata.pdf)
# Acknowledgments
I want to acknowledge that a great deal of the code and inspiration for
RomWBW has been provided by or derived from the work of others in the
RetroBrew Computers Community. I sincerely appreciate all of their
contributions. The list below is probably missing many names – please
let me know if I missed you!
- Andrew Lynch started it all when he created the N8VEM Z80 SBC which
became the first platform RomWBW supported. Some of his original code
can still be found in RomWBW.
- Dan Werner wrote much of the code from which RomWBW was originally
derived and he has always been a great source of knowledge and advice.
- Douglas Goodall contributed code, time, testing, and advice in “the
early days”. He created an entire suite of application programs to
enhance the use of RomWBW. Unfortunately, they have become unusable
due to internal changes within RomWBW. As of RomWBW 2.6, these
applications are no longer provided.
- Sergey Kiselev created several hardware platforms for RomWBW including
the very popular Zeta.
- David Giles created support for the Z180 CSIO which is now included SD
Card driver.
- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver, DMA support, and a long list of general code
and documentation enhancements.
- Ed Brindley contributed some of the code that supports the RCBus
platform.
- Spencer Owen created the RC2014 series of hobbyist kit computers which
has exponentially increased RomWBW usage. Some of his kits include
RomWBW.
- Stephen Cousins has likewise created a series of hobbyist kit
computers at Small Computer Central and is distributing RomWBW with
many of them.
- Alan Cox has contributed some driver code and has provided a great
deal of advice.
- The CP/NET client files were developed by Douglas Miller.
- Phillip Stevens contributed support for FreeRTOS.
- Curt Mayer contributed the original Linux / MacOS build process.
- UNA BIOS and FDISK80 are the products of John Coffman.
- FLASH4 is a product of Will Sowerbutts.
- CLRDIR is a product of Max Scane.
- Tasty Basic is a product of Dimitri Theulings.
- Dean Netherton contributed eZ80 CPU support, the sound driver
interface, and the SN76489 sound driver.
- The RomWBW Disk Catalog document was produced by Mykl Orders.
- Rob Prouse has created many of the supplemental disk images including
Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft BASIC Compiler,
Microsoft Fortran Compiler, and a Games compendium.
- Martin R has provided substantial help reviewing and improving the
User Guide and Applications documents.
- Mark Pruden has also contributed a great deal of content to the Disk
Catalog, User Guide as well as contributing the disk image for the
Z3PLUS operating system, the COPYSL utility, and also implemented a
feature for RomWBW configuration by NVRAM, and added the /B bulk mode
of disk assignment to the ASSIGN utility.
- Jacques Pelletier has contributed the DS1501 RTC driver code.
- Jose Collado has contributed enhancements to the TMS driver including
compatibility with standard TMS register configuration.
- Kevin Boone has contributed a generic HBIOS date/time utility (WDATE).
- Matt Carroll has contributed a fix to XM.COM that corrects the port
specification when doing a send.
- Dean Jenkins enhanced the build process to accommodate the Raspberry
Pi 4.
- Tom Plano has contributed a new utility (HTALK) to allow talking
directly to HBIOS COM ports.
- Lars Nelson has contributed several generic utilities such as a
universal (OS agnostic) UNARC application.
- Dylan Hall added support for specifying a secondary console.
- Bill Shen has contributed boot loaders for several of his systems.
- Laszlo Szolnoki has contributed an EF9345 video display controller
driver.
- Ladislau Szilagyi has contributed an enhanced version of CP/M Cowgol
that leverages RomWBW memory banking.
- Les Bird has contributed support for the NABU w/ Option Board
Contributions of all kinds to RomWBW are very welcome.
# Licensing
RomWBW is free software: you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation, either version 3 of the License, or (at your
option) any later version.
RomWBW is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
You should have received a copy of the GNU General Public License along
with RomWBW. If not, see <https://www.gnu.org/licenses/>.
Portions of RomWBW were created by, contributed by, or derived from the
work of others. It is believed that these works are being used in
accordance with the intentions and/or licensing of their creators.
If anyone feels their work is being used outside of its intended
licensing, please notify:
> Wayne Warthen
> <wwarthen@gmail.com>
RomWBW is an aggregate work. It is composed of many individual,
standalone programs that are distributed as a whole to function as a
cohesive system. Each program may have its own licensing which may be
different from other programs within the aggregate.
In some cases, a single program (e.g., CP/M Operating System) is
composed of multiple components with different licenses. It is believed
that in all such cases the licenses are compatible with GPL version 3.
RomWBW encourages code contributions from others. Contributors may
assert their own copyright in their contributions by annotating the
contributed source code appropriately. Contributors are further
encouraged to submit their contributions via the RomWBW source code
control system to ensure their contributions are clearly documented.
All contributions to RomWBW are subject to this license.
# Getting Assistance
The best way to get assistance with RomWBW or any aspect of the
RetroBrew Computers projects is via one of the community forums:
- [RetroBrew Computers Forum](https://www.retrobrewcomputers.org/forum/)
- [RC2014 Google
Group](https://groups.google.com/forum/#!forum/rc2014-z80)
- [retro-comp Google
Group](https://groups.google.com/forum/#!forum/retro-comp)
Submission of issues and bugs are welcome at the [RomWBW GitHub
Repository](https://github.com/wwarthen/RomWBW).
Also feel free to email Wayne Warthen at <wwarthen@gmail.com>.

603
ReadMe.txt

@ -1,301 +1,302 @@
RomWBW ReadMe
Wayne Warthen (wwarthen@gmail.com)
15 Dec 2024
OVERVIEW
RomWBW software provides a complete, commercial quality implementation
of CP/M (and workalike) operating systems and applications for modern
Z80/180/280 retro-computing hardware systems. A wide variety of
platforms are supported including those produced by these developer
communities:
- RetroBrew Computers (https://www.retrobrewcomputers.org)
- RC2014 (https://rc2014.co.uk),
RC2014-Z80 (https://groups.google.com/g/rc2014-z80)
- Retro Computing (https://groups.google.com/g/retro-comp)
- Small Computer Central (https://smallcomputercentral.com/)
A complete list of the currently supported platforms is found in the
[Installation] section.
General features include:
- Z80 Family CPUs including Z80, Z180, and Z280
- Banked memory services for several banking designs
- Disk drivers for RAM, ROM, Floppy, IDE ATA/ATAPI, CF, SD, USB, Zip,
Iomega
- Serial drivers including UART (16550-like), ASCI, ACIA, SIO
- Video drivers including TMS9918, SY6545, MOS8563, HD6445
- Keyboard (PS/2) drivers via VT8242 or PPI interfaces
- Real time clock drivers including DS1302, BQ4845
- OSes: CP/M 2.2, ZSDOS, CP/M 3, NZ-COM, ZPM3, QPM, p-System, and
FreeRTOS
- Built-in VT-100 terminal emulation support
RomWBW is distributed as both source code and pre-built ROM and disk
images. Some of the provided software can be launched directly from the
ROM firmware itself:
- System Monitor
- Operating Systems (CP/M 2.2, ZSDOS)
- ROM BASIC (Nascom BASIC and Tasty BASIC)
- ROM Forth
A dynamic disk drive letter assignment mechanism allows mapping
operating system drive letters to any available disk media.
Additionally, mass storage devices (IDE Disk, CF Card, SD Card, etc.)
support the use of multiple slices (up to 256 per device). Each slice
contains a complete CP/M filesystem and can be mapped independently to
any drive letter. This overcomes the inherent size limitations in legacy
OSes and allows up to 2GB of accessible storage on a single device.
The pre-built ROM firmware images are generally suitable for most users.
However, it is also very easy to modify and build custom ROM images that
fully tailor the firmware to your specific preferences. All tools
required to build custom ROM firmware under Windows are included – no
need to install assemblers, etc. The firmware can also be built using
Linux or MacOS after confirming a few standard tools have been
installed.
Multiple disk images are provided in the distribution. Most disk images
contain a complete, bootable, ready-to-run implementation of a specific
operating system. A “combo” disk image contains multiple slices, each
with a full operating system implementation. If you use this disk image,
you can easily pick whichever operating system you want to boot without
changing media.
By design, RomWBW isolates all of the hardware specific functions in the
ROM chip itself. The ROM provides a hardware abstraction layer such that
all of the operating systems and applications on a disk will run on any
RomWBW-based system. To put it simply, you can take a disk (or CF/SD/USB
Card) and move it between systems transparently.
A tool is provided that allows you to access a FAT-12/16/32 filesystem.
The FAT filesystem may be coresident on the same disk media as RomWBW
slices or on stand-alone media. This makes exchanging files with modern
OSes such as Windows, MacOS, and Linux very easy.
ACQUIRING ROMWBW
The RomWBW Repository (https://github.com/wwarthen/RomWBW) on GitHub is
the official distribution location for all project source and
documentation. The fully-built distribution releases are available on
the RomWBW Releases Page (https://github.com/wwarthen/RomWBW/releases)
of the repository. On this page, you will normally see a Development
Snapshot as well as recent stable releases. Unless you have a specific
reason, I suggest you stick to the most recent stable release. Expand
the “Assets” drop-down for the release you want to download, then select
the asset named RomWBW-vX.X.X-Package.zip. The Package asset includes
all pre-built ROM and Disk images as well as full source code. The other
assets contain only source code and do not have the pre-built ROM or
disk images.
All source code and distributions are maintained on GitHub. Code
contributions are very welcome.
INSTALLATION & OPERATION
In general, installation of RomWBW on your platform is very simple. You
just need to program your ROM with the correct ROM image from the RomWBW
distribution. Subsequently, you can write disk images on your disk
drives (IDE disk, CF Card, SD Card, etc.) which then provides even more
functionality.
Complete instructions for installation and operation of RomWBW are found
in the RomWBW User Guide.
Documentation
Documentation for RomWBW includes:
- RomWBW User Guide
- RomWBW System Guide
- RomWBW Applications
- RomWBW Errata
ACKNOWLEDGMENTS
I want to acknowledge that a great deal of the code and inspiration for
RomWBW has been provided by or derived from the work of others in the
RetroBrew Computers Community. I sincerely appreciate all of their
contributions. The list below is probably missing many names – please
let me know if I missed you!
- Andrew Lynch started it all when he created the N8VEM Z80 SBC which
became the first platform RomWBW supported. Some of his original
code can still be found in RomWBW.
- Dan Werner wrote much of the code from which RomWBW was originally
derived and he has always been a great source of knowledge and
advice.
- Douglas Goodall contributed code, time, testing, and advice in “the
early days”. He created an entire suite of application programs to
enhance the use of RomWBW. Unfortunately, they have become unusable
due to internal changes within RomWBW. As of RomWBW 2.6, these
applications are no longer provided.
- Sergey Kiselev created several hardware platforms for RomWBW
including the very popular Zeta.
- David Giles created support for the Z180 CSIO which is now included
SD Card driver.
- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver, DMA support, and a long list of general code
and documentation enhancements.
- Ed Brindley contributed some of the code that supports the RCBus
platform.
- Spencer Owen created the RC2014 series of hobbyist kit computers
which has exponentially increased RomWBW usage. Some of his kits
include RomWBW.
- Stephen Cousins has likewise created a series of hobbyist kit
computers at Small Computer Central and is distributing RomWBW with
many of them.
- Alan Cox has contributed some driver code and has provided a great
deal of advice.
- The CP/NET client files were developed by Douglas Miller.
- Phillip Stevens contributed support for FreeRTOS.
- Curt Mayer contributed the original Linux / MacOS build process.
- UNA BIOS and FDISK80 are the products of John Coffman.
- FLASH4 is a product of Will Sowerbutts.
- CLRDIR is a product of Max Scane.
- Tasty Basic is a product of Dimitri Theulings.
- Dean Netherton contributed eZ80 CPU support, the sound driver
interface, and the SN76489 sound driver.
- The RomWBW Disk Catalog document was produced by Mykl Orders.
- Rob Prouse has created many of the supplemental disk images
including Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft
BASIC Compiler, Microsoft Fortran Compiler, and a Games compendium.
- Martin R has provided substantial help reviewing and improving the
User Guide and Applications documents.
- Mark Pruden has also contributed a great deal of content to the Disk
Catalog, User Guide as well as contributing the disk image for the
Z3PLUS operating system, the COPYSL utility, and also implemented
feature for RomWBW configuration by NVRAM.
- Jacques Pelletier has contributed the DS1501 RTC driver code.
- Jose Collado has contributed enhancements to the TMS driver
including compatibility with standard TMS register configuration.
- Kevin Boone has contributed a generic HBIOS date/time utility
(WDATE).
- Matt Carroll has contributed a fix to XM.COM that corrects the port
specification when doing a send.
- Dean Jenkins enhanced the build process to accommodate the Raspberry
Pi 4.
- Tom Plano has contributed a new utility (HTALK) to allow talking
directly to HBIOS COM ports.
- Lars Nelson has contributed several generic utilities such as a
universal (OS agnostic) UNARC application.
- Dylan Hall added support for specifying a secondary console.
- Bill Shen has contributed boot loaders for several of his systems.
- Laszlo Szolnoki has contributed an EF9345 video display controller
driver.
- Ladislau Szilagyi has contributed an enhanced version of CP/M Cowgol
that leverages RomWBW memory banking.
- Les Bird has contributed support for the NABU w/ Option Board
Contributions of all kinds to RomWBW are very welcome.
LICENSING
RomWBW is free software: you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation, either version 3 of the License, or (at your
option) any later version.
RomWBW is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
You should have received a copy of the GNU General Public License along
with RomWBW. If not, see https://www.gnu.org/licenses/.
Portions of RomWBW were created by, contributed by, or derived from the
work of others. It is believed that these works are being used in
accordance with the intentions and/or licensing of their creators.
If anyone feels their work is being used outside of its intended
licensing, please notify:
Wayne Warthen
wwarthen@gmail.com
RomWBW is an aggregate work. It is composed of many individual,
standalone programs that are distributed as a whole to function as a
cohesive system. Each program may have its own licensing which may be
different from other programs within the aggregate.
In some cases, a single program (e.g., CP/M Operating System) is
composed of multiple components with different licenses. It is believed
that in all such cases the licenses are compatible with GPL version 3.
RomWBW encourages code contributions from others. Contributors may
assert their own copyright in their contributions by annotating the
contributed source code appropriately. Contributors are further
encouraged to submit their contributions via the RomWBW source code
control system to ensure their contributions are clearly documented.
All contributions to RomWBW are subject to this license.
GETTING ASSISTANCE
The best way to get assistance with RomWBW or any aspect of the
RetroBrew Computers projects is via one of the community forums:
- RetroBrew Computers Forum
- RC2014 Google Group
- retro-comp Google Group
Submission of issues and bugs are welcome at the RomWBW GitHub
Repository.
Also feel free to email Wayne Warthen at wwarthen@gmail.com.
RomWBW ReadMe
Wayne Warthen (wwarthen@gmail.com)
20 Dec 2024
OVERVIEW
RomWBW software provides a complete, commercial quality implementation
of CP/M (and workalike) operating systems and applications for modern
Z80/180/280 retro-computing hardware systems. A wide variety of
platforms are supported including those produced by these developer
communities:
- RetroBrew Computers (https://www.retrobrewcomputers.org)
- RC2014 (https://rc2014.co.uk),
RC2014-Z80 (https://groups.google.com/g/rc2014-z80)
- Retro Computing (https://groups.google.com/g/retro-comp)
- Small Computer Central (https://smallcomputercentral.com/)
A complete list of the currently supported platforms is found in the
[Installation] section.
General features include:
- Z80 Family CPUs including Z80, Z180, and Z280
- Banked memory services for several banking designs
- Disk drivers for RAM, ROM, Floppy, IDE ATA/ATAPI, CF, SD, USB, Zip,
Iomega
- Serial drivers including UART (16550-like), ASCI, ACIA, SIO
- Video drivers including TMS9918, SY6545, MOS8563, HD6445
- Keyboard (PS/2) drivers via VT8242 or PPI interfaces
- Real time clock drivers including DS1302, BQ4845
- OSes: CP/M 2.2, ZSDOS, CP/M 3, NZ-COM, ZPM3, QPM, p-System, and
FreeRTOS
- Built-in VT-100 terminal emulation support
RomWBW is distributed as both source code and pre-built ROM and disk
images. Some of the provided software can be launched directly from the
ROM firmware itself:
- System Monitor
- Operating Systems (CP/M 2.2, ZSDOS)
- ROM BASIC (Nascom BASIC and Tasty BASIC)
- ROM Forth
A dynamic disk drive letter assignment mechanism allows mapping
operating system drive letters to any available disk media.
Additionally, mass storage devices (IDE Disk, CF Card, SD Card, etc.)
support the use of multiple slices (up to 256 per device). Each slice
contains a complete CP/M filesystem and can be mapped independently to
any drive letter. This overcomes the inherent size limitations in legacy
OSes and allows up to 2GB of accessible storage on a single device.
The pre-built ROM firmware images are generally suitable for most users.
However, it is also very easy to modify and build custom ROM images that
fully tailor the firmware to your specific preferences. All tools
required to build custom ROM firmware under Windows are included – no
need to install assemblers, etc. The firmware can also be built using
Linux or MacOS after confirming a few standard tools have been
installed.
Multiple disk images are provided in the distribution. Most disk images
contain a complete, bootable, ready-to-run implementation of a specific
operating system. A “combo” disk image contains multiple slices, each
with a full operating system implementation. If you use this disk image,
you can easily pick whichever operating system you want to boot without
changing media.
By design, RomWBW isolates all of the hardware specific functions in the
ROM chip itself. The ROM provides a hardware abstraction layer such that
all of the operating systems and applications on a disk will run on any
RomWBW-based system. To put it simply, you can take a disk (or CF/SD/USB
Card) and move it between systems transparently.
A tool is provided that allows you to access a FAT-12/16/32 filesystem.
The FAT filesystem may be coresident on the same disk media as RomWBW
slices or on stand-alone media. This makes exchanging files with modern
OSes such as Windows, MacOS, and Linux very easy.
ACQUIRING ROMWBW
The RomWBW Repository (https://github.com/wwarthen/RomWBW) on GitHub is
the official distribution location for all project source and
documentation. The fully-built distribution releases are available on
the RomWBW Releases Page (https://github.com/wwarthen/RomWBW/releases)
of the repository. On this page, you will normally see a Development
Snapshot as well as recent stable releases. Unless you have a specific
reason, I suggest you stick to the most recent stable release. Expand
the “Assets” drop-down for the release you want to download, then select
the asset named RomWBW-vX.X.X-Package.zip. The Package asset includes
all pre-built ROM and Disk images as well as full source code. The other
assets contain only source code and do not have the pre-built ROM or
disk images.
All source code and distributions are maintained on GitHub. Code
contributions are very welcome.
INSTALLATION & OPERATION
In general, installation of RomWBW on your platform is very simple. You
just need to program your ROM with the correct ROM image from the RomWBW
distribution. Subsequently, you can write disk images on your disk
drives (IDE disk, CF Card, SD Card, etc.) which then provides even more
functionality.
Complete instructions for installation and operation of RomWBW are found
in the RomWBW User Guide.
Documentation
Documentation for RomWBW includes:
- RomWBW User Guide
- RomWBW System Guide
- RomWBW Applications
- RomWBW Errata
ACKNOWLEDGMENTS
I want to acknowledge that a great deal of the code and inspiration for
RomWBW has been provided by or derived from the work of others in the
RetroBrew Computers Community. I sincerely appreciate all of their
contributions. The list below is probably missing many names – please
let me know if I missed you!
- Andrew Lynch started it all when he created the N8VEM Z80 SBC which
became the first platform RomWBW supported. Some of his original
code can still be found in RomWBW.
- Dan Werner wrote much of the code from which RomWBW was originally
derived and he has always been a great source of knowledge and
advice.
- Douglas Goodall contributed code, time, testing, and advice in “the
early days”. He created an entire suite of application programs to
enhance the use of RomWBW. Unfortunately, they have become unusable
due to internal changes within RomWBW. As of RomWBW 2.6, these
applications are no longer provided.
- Sergey Kiselev created several hardware platforms for RomWBW
including the very popular Zeta.
- David Giles created support for the Z180 CSIO which is now included
SD Card driver.
- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
AY-3-8910 sound driver, DMA support, and a long list of general code
and documentation enhancements.
- Ed Brindley contributed some of the code that supports the RCBus
platform.
- Spencer Owen created the RC2014 series of hobbyist kit computers
which has exponentially increased RomWBW usage. Some of his kits
include RomWBW.
- Stephen Cousins has likewise created a series of hobbyist kit
computers at Small Computer Central and is distributing RomWBW with
many of them.
- Alan Cox has contributed some driver code and has provided a great
deal of advice.
- The CP/NET client files were developed by Douglas Miller.
- Phillip Stevens contributed support for FreeRTOS.
- Curt Mayer contributed the original Linux / MacOS build process.
- UNA BIOS and FDISK80 are the products of John Coffman.
- FLASH4 is a product of Will Sowerbutts.
- CLRDIR is a product of Max Scane.
- Tasty Basic is a product of Dimitri Theulings.
- Dean Netherton contributed eZ80 CPU support, the sound driver
interface, and the SN76489 sound driver.
- The RomWBW Disk Catalog document was produced by Mykl Orders.
- Rob Prouse has created many of the supplemental disk images
including Aztec C, HiTech C, SLR Z80ASM, Turbo Pascal, Microsoft
BASIC Compiler, Microsoft Fortran Compiler, and a Games compendium.
- Martin R has provided substantial help reviewing and improving the
User Guide and Applications documents.
- Mark Pruden has also contributed a great deal of content to the Disk
Catalog, User Guide as well as contributing the disk image for the
Z3PLUS operating system, the COPYSL utility, and also implemented a
feature for RomWBW configuration by NVRAM, and added the /B bulk
mode of disk assignment to the ASSIGN utility.
- Jacques Pelletier has contributed the DS1501 RTC driver code.
- Jose Collado has contributed enhancements to the TMS driver
including compatibility with standard TMS register configuration.
- Kevin Boone has contributed a generic HBIOS date/time utility
(WDATE).
- Matt Carroll has contributed a fix to XM.COM that corrects the port
specification when doing a send.
- Dean Jenkins enhanced the build process to accommodate the Raspberry
Pi 4.
- Tom Plano has contributed a new utility (HTALK) to allow talking
directly to HBIOS COM ports.
- Lars Nelson has contributed several generic utilities such as a
universal (OS agnostic) UNARC application.
- Dylan Hall added support for specifying a secondary console.
- Bill Shen has contributed boot loaders for several of his systems.
- Laszlo Szolnoki has contributed an EF9345 video display controller
driver.
- Ladislau Szilagyi has contributed an enhanced version of CP/M Cowgol
that leverages RomWBW memory banking.
- Les Bird has contributed support for the NABU w/ Option Board
Contributions of all kinds to RomWBW are very welcome.
LICENSING
RomWBW is free software: you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation, either version 3 of the License, or (at your
option) any later version.
RomWBW is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
You should have received a copy of the GNU General Public License along
with RomWBW. If not, see https://www.gnu.org/licenses/.
Portions of RomWBW were created by, contributed by, or derived from the
work of others. It is believed that these works are being used in
accordance with the intentions and/or licensing of their creators.
If anyone feels their work is being used outside of its intended
licensing, please notify:
Wayne Warthen
wwarthen@gmail.com
RomWBW is an aggregate work. It is composed of many individual,
standalone programs that are distributed as a whole to function as a
cohesive system. Each program may have its own licensing which may be
different from other programs within the aggregate.
In some cases, a single program (e.g., CP/M Operating System) is
composed of multiple components with different licenses. It is believed
that in all such cases the licenses are compatible with GPL version 3.
RomWBW encourages code contributions from others. Contributors may
assert their own copyright in their contributions by annotating the
contributed source code appropriately. Contributors are further
encouraged to submit their contributions via the RomWBW source code
control system to ensure their contributions are clearly documented.
All contributions to RomWBW are subject to this license.
GETTING ASSISTANCE
The best way to get assistance with RomWBW or any aspect of the
RetroBrew Computers projects is via one of the community forums:
- RetroBrew Computers Forum
- RC2014 Google Group
- retro-comp Google Group
Submission of issues and bugs are welcome at the RomWBW GitHub
Repository.
Also feel free to email Wayne Warthen at wwarthen@gmail.com.

10
Source/Apps/assign/assign.asm

@ -614,17 +614,11 @@ bootdra:
; Note: if MDFFENABLE is enabled, this wont select the ROM since the ; Note: if MDFFENABLE is enabled, this wont select the ROM since the
; driver returns MD_AFSH (%00010111), and we cannot generalise this mask ; driver returns MD_AFSH (%00010111), and we cannot generalise this mask
bootdro: bootdro:
ld a,$FF ; specific mask to include all BITS
ld a,%11111101 ; ROM mask, excluding Bit 1, which varies
ld (atrmask),a ; mask for device attributes ld (atrmask),a ; mask for device attributes
ld a,%00010100 ; specific mask for ROM drive. "MD_AROM"
ld a,%00010100 ; for values "MD_AROM", "MD_AFSH"; Att="000101x0"
ld (atrcomp),a ; compare to after mask ld (atrcomp),a ; compare to after mask
call bootadds ; do single slice assignment call bootadds ; do single slice assignment
; possible workaround below, not elegant. other woraround is to have a specific option for this code
; Better option is change the definitions for device attribute media types to
; 4=ROM, 5=RAM, 6=FLASH, 7=RAMF, (6,7 swapped) so much easir to mask RAM/ROM as only 1 bit difference
; ld a,%00010111 ; specific mask for ROM drive. "MD_AFSH"
; ld (atrcomp),a ; compare to after mask
; call bootadds ; do single slice assignment
ret ; Finished, returning error ret ; Finished, returning error
; ;
; FLOPPY DRIVE(S) ; FLOPPY DRIVE(S)

1
Source/Build.cmd

@ -12,6 +12,7 @@ call BuildZ1RCC || exit /b
call BuildZZRCC || exit /b call BuildZZRCC || exit /b
call BuildZRC512 || exit /b call BuildZRC512 || exit /b
call BuildFZ80 || exit /b call BuildFZ80 || exit /b
call BuildEZ512 || exit /b
if "%1" == "dist" ( if "%1" == "dist" (
call Clean || exit /b call Clean || exit /b

4
Source/BuildEZ512.cmd

@ -0,0 +1,4 @@
@echo off
setlocal
pushd EZ512 && call Build || exit /b & popd

6
Source/CBIOS/cbios.asm

@ -2343,10 +2343,8 @@ INIT2:
LD C,(HL) ; PUT UNIT NUM IN C LD C,(HL) ; PUT UNIT NUM IN C
RST 08 ; CALL HBIOS RST 08 ; CALL HBIOS
LD A,C ; GET ATTRIBUTES LD A,C ; GET ATTRIBUTES
AND %10001111 ; ISOLATE TYPE BITS
CP %00000100 ; NOT FLOPPY, TYPE = ROM?
JR Z,INIT2A ; IF SO, ADJUST DEF DRIVE
CP %00000111 ; NOT FLOPPY, TYPE = FLASH?
AND %10001101 ; ISOLATE TYPE BITS, NOT FLOPPY
CP %00000100 ; TYPE=ROM/FLASH ; Att="0xxx01x0"
JR NZ,INIT2X ; IF NOT THEN DONE JR NZ,INIT2X ; IF NOT THEN DONE
; ;
INIT2A: INIT2A:

15
Source/CPM22/loader.asm

@ -11,7 +11,7 @@
; THE RETROBREW COMPUTING GROUP HAS BEEN USING A CONVENTION OF PREFIXING THE ; THE RETROBREW COMPUTING GROUP HAS BEEN USING A CONVENTION OF PREFIXING THE
; OS IMAGE WITH 3 SECTORS (512 BYTES X 3 FOR A TOTAL OF 1536 BYTES): ; OS IMAGE WITH 3 SECTORS (512 BYTES X 3 FOR A TOTAL OF 1536 BYTES):
; ;
; SECTOR 1: IBM-PC STYLE BOOT BLOCK CONTAINING BOOTSTRAP,
; SECTOR 1: IBM-PC STYLE BOOT BLOCK CONTAINING BOOTSTRAP,
; PARTITION TABLE, AND BOOT SIGNATURE ; PARTITION TABLE, AND BOOT SIGNATURE
; SECTOR 2: RESERVED ; SECTOR 2: RESERVED
; SECTOR 3: METADATA ; SECTOR 3: METADATA
@ -29,6 +29,7 @@
; ;
SYS_ENT .EQU $E600 ; SYSTEM (OS) ENTRY POINT ADDRESS SYS_ENT .EQU $E600 ; SYSTEM (OS) ENTRY POINT ADDRESS
SYS_LOC .EQU $D000 ; STARTING ADDRESS TO LOAD SYSTEM IMAGE SYS_LOC .EQU $D000 ; STARTING ADDRESS TO LOAD SYSTEM IMAGE
SYS_SEC .EQU 22 ; NUMBER OF SECTORS TO READ
SYS_END .EQU $FE00 ; ENDING ADDRESS OF SYSTEM IMAGE SYS_END .EQU $FE00 ; ENDING ADDRESS OF SYSTEM IMAGE
; ;
SEC_SIZE .EQU 512 ; DISK SECTOR SIZE SEC_SIZE .EQU 512 ; DISK SECTOR SIZE
@ -76,8 +77,8 @@ BOOT:
CALL PRTDOT ; PROGRESS CALL PRTDOT ; PROGRESS
; ;
LD C,$42 ; UNA FUNC: READ SECTORS LD C,$42 ; UNA FUNC: READ SECTORS
LD DE,$D000 ; STARTING ADDRESS FOR IMAGE
LD L,22 ; READ 22 SECTORS
LD DE,SYS_LOC ; STARTING ADDRESS FOR IMAGE
LD L,SYS_SEC ; NUMBER OF SECTORS
CALL $FFFD ; DO READ CALL $FFFD ; DO READ
JR NZ,ERROR ; HANDLE ERROR JR NZ,ERROR ; HANDLE ERROR
CALL PRTDOT ; PROGRESS CALL PRTDOT ; PROGRESS
@ -147,10 +148,10 @@ HEXASCII:
HEXCONV: HEXCONV:
AND $0F ;LOW NIBBLE ONLY AND $0F ;LOW NIBBLE ONLY
ADD A,$90 ADD A,$90
DAA
DAA
ADC A,$40 ADC A,$40
DAA
RET
DAA
RET
; ;
ERROR: ERROR:
LD DE,STR_ERR ; POINT TO ERROR STRING LD DE,STR_ERR ; POINT TO ERROR STRING
@ -252,7 +253,7 @@ PR_SIG .DB $5A,$A5 ; SIGNATURE GOES HERE
PR_WP .DB 0 ; (1) WRITE PROTECT BOOLEAN PR_WP .DB 0 ; (1) WRITE PROTECT BOOLEAN
PR_UPDSEQ .DW 0 ; (2) PREFIX UPDATE SEQUENCE NUMBER (DEPRECATED?) PR_UPDSEQ .DW 0 ; (2) PREFIX UPDATE SEQUENCE NUMBER (DEPRECATED?)
PR_VER .DB RMJ,RMN,RUP,RTP ; (4) OS BUILD VERSION PR_VER .DB RMJ,RMN,RUP,RTP ; (4) OS BUILD VERSION
PR_LABEL .DB "Unlabeled$$$$$$$","$" ; (17) DISK LABEL (EXACTLY 16 BYTES!!!)
PR_LABEL .DB "CP/M 2.2$$$$$$$$","$" ; (17) DISK LABEL (EXACTLY 16 BYTES!!!)
.DW 0 ; (2) DEPRECATED .DW 0 ; (2) DEPRECATED
PR_LDLOC .DW SYS_LOC ; (2) ADDRESS TO START LOADING SYSTEM PR_LDLOC .DW SYS_LOC ; (2) ADDRESS TO START LOADING SYSTEM
PR_LDEND .DW SYS_END ; (2) ADDRESS TO STOP LOADING SYSTEM PR_LDEND .DW SYS_END ; (2) ADDRESS TO STOP LOADING SYSTEM

17
Source/CPM3/loader.asm

@ -11,7 +11,7 @@
; THE RETROBREW COMPUTING GROUP HAS BEEN USING A CONVENTION OF PREFIXING THE ; THE RETROBREW COMPUTING GROUP HAS BEEN USING A CONVENTION OF PREFIXING THE
; OS IMAGE WITH 3 SECTORS (512 BYTES X 3 FOR A TOTAL OF 1536 BYTES): ; OS IMAGE WITH 3 SECTORS (512 BYTES X 3 FOR A TOTAL OF 1536 BYTES):
; ;
; SECTOR 1: IBM-PC STYLE BOOT BLOCK CONTAINING BOOTSTRAP,
; SECTOR 1: IBM-PC STYLE BOOT BLOCK CONTAINING BOOTSTRAP,
; PARTITION TABLE, AND BOOT SIGNATURE ; PARTITION TABLE, AND BOOT SIGNATURE
; SECTOR 2: RESERVED ; SECTOR 2: RESERVED
; SECTOR 3: METADATA ; SECTOR 3: METADATA
@ -31,6 +31,7 @@
; THE SIZE OF CPMLDR.BIN CHANGES, SYS_SIZ MUST BE UPDATED!!! ; THE SIZE OF CPMLDR.BIN CHANGES, SYS_SIZ MUST BE UPDATED!!!
; ;
SYS_SIZ .EQU $0F00 ; SIZE OF CPMLDR.BIN SYS_SIZ .EQU $0F00 ; SIZE OF CPMLDR.BIN
SYS_SEC .EQU 8 ; NUMBER OF SECTORS TO READ
SYS_ENT .EQU $0100 ; SYSTEM (OS) ENTRY POINT ADDRESS SYS_ENT .EQU $0100 ; SYSTEM (OS) ENTRY POINT ADDRESS
SYS_LOC .EQU $0100 ; STARTING ADDRESS TO LOAD SYSTEM IMAGE SYS_LOC .EQU $0100 ; STARTING ADDRESS TO LOAD SYSTEM IMAGE
SYS_END .EQU SYS_SIZ + SYS_LOC ; ENDING ADDRESS OF SYSTEM IMAGE SYS_END .EQU SYS_SIZ + SYS_LOC ; ENDING ADDRESS OF SYSTEM IMAGE
@ -57,6 +58,8 @@ PT_SIZ .EQU $40
; THE FOLLOWING BOOTSTRAP CODE IS BUILT TO ASSUME IT WILL BE EXECUTED AT A STARTING ; THE FOLLOWING BOOTSTRAP CODE IS BUILT TO ASSUME IT WILL BE EXECUTED AT A STARTING
; ADDRESS OF $8000. THIS CODE IS *ONLY* FOR UNA. THE ROMWBW ROM BOOTLOADER ; ADDRESS OF $8000. THIS CODE IS *ONLY* FOR UNA. THE ROMWBW ROM BOOTLOADER
; USES THE METADATA TO LOAD THE OS DIRECTLY. ; USES THE METADATA TO LOAD THE OS DIRECTLY.
;
; UNA DOES NOT SUPPORT CP/M 3 THIS CODE IS NOT USED, AND COULD BE REMOVED
; ;
.ORG $8000 .ORG $8000
JR BOOT JR BOOT
@ -80,8 +83,8 @@ BOOT:
CALL PRTDOT ; PROGRESS CALL PRTDOT ; PROGRESS
; ;
LD C,$42 ; UNA FUNC: READ SECTORS LD C,$42 ; UNA FUNC: READ SECTORS
LD DE,$D000 ; STARTING ADDRESS FOR IMAGE
LD L,22 ; READ 22 SECTORS
LD DE,SYS_LOC ; STARTING ADDRESS FOR IMAGE
LD L,SYS_SEC ; NUMBER OF SECTORS
CALL $FFFD ; DO READ CALL $FFFD ; DO READ
JR NZ,ERROR ; HANDLE ERROR JR NZ,ERROR ; HANDLE ERROR
CALL PRTDOT ; PROGRESS CALL PRTDOT ; PROGRESS
@ -151,10 +154,10 @@ HEXASCII:
HEXCONV: HEXCONV:
AND $0F ;LOW NIBBLE ONLY AND $0F ;LOW NIBBLE ONLY
ADD A,$90 ADD A,$90
DAA
DAA
ADC A,$40 ADC A,$40
DAA
RET
DAA
RET
; ;
ERROR: ERROR:
LD DE,STR_ERR ; POINT TO ERROR STRING LD DE,STR_ERR ; POINT TO ERROR STRING
@ -256,7 +259,7 @@ PR_SIG .DB $5A,$A5 ; SIGNATURE GOES HERE
PR_WP .DB 0 ; (1) WRITE PROTECT BOOLEAN PR_WP .DB 0 ; (1) WRITE PROTECT BOOLEAN
PR_UPDSEQ .DW 0 ; (2) PREFIX UPDATE SEQUENCE NUMBER (DEPRECATED?) PR_UPDSEQ .DW 0 ; (2) PREFIX UPDATE SEQUENCE NUMBER (DEPRECATED?)
PR_VER .DB RMJ,RMN,RUP,RTP ; (4) OS BUILD VERSION PR_VER .DB RMJ,RMN,RUP,RTP ; (4) OS BUILD VERSION
PR_LABEL .DB "Unlabeled$$$$$$$","$" ; (17) DISK LABEL (EXACTLY 16 BYTES!!!)
PR_LABEL .DB "CP/M 3.0$$$$$$$$","$" ; (17) DISK LABEL (EXACTLY 16 BYTES!!!)
.DW 0 ; (2) DEPRECATED .DW 0 ; (2) DEPRECATED
PR_LDLOC .DW SYS_LOC ; (2) ADDRESS TO START LOADING SYSTEM PR_LDLOC .DW SYS_LOC ; (2) ADDRESS TO START LOADING SYSTEM
PR_LDEND .DW SYS_END ; (2) ADDRESS TO STOP LOADING SYSTEM PR_LDEND .DW SYS_END ; (2) ADDRESS TO STOP LOADING SYSTEM

192
Source/Doc/Applications.md

@ -1077,9 +1077,12 @@ to display, assign, reassign, or remove the drive letter assignments.
| `ASSIGN /?` | `ASSIGN /?`
| `ASSIGN /L` | `ASSIGN /L`
| `ASSIGN ` *`<drv>`*`=`
| `ASSIGN `
| `ASSIGN [`*`<drv>`*`],...` | `ASSIGN [`*`<drv>`*`],...`
| `ASSIGN `*`<drv>`*`=[`*`<device>`*`:[`*`<slice>`*`]],...`
| `ASSIGN `*`<tgtdrv>`*`=`*`<srcdrv>`*`,...`
| `ASSIGN ` *`<drv>`*`=[`*`<device>`*`:[`*`<slice>`*`]],...`
| `ASSIGN ` *`<tgtdrv>`*`=`*`<srcdrv>`*`,...`
| `ASSIGN /B='*'<option>'*'['*'<option>'*'['*'<option>'*'...]]`
#### Usage #### Usage
@ -1090,23 +1093,36 @@ used in drive assignments in the running system. The devices listed
may or may not contain media. Although some device types support the may or may not contain media. Although some device types support the
use of slices, the list does not indicate this. use of slices, the list does not indicate this.
`ASSIGN A:` just specifying the drive letter will display the
assignment for the drive letter
`ASSIGN` with no parameters will list all of the current drive `ASSIGN` with no parameters will list all of the current drive
assignments. assignments.
`ASSIGN `*`<drv>`* will display the assignment for the specific drive
#### Usage (Specific)
The following describes how to assign drive specifically by identifing each
drive by its unique device and slice id's
`ASSIGN ` *`<drv>`* will display the assignment for the specific drive
For example, `ASSIGN C:` will display the assignment for drive C:. For example, `ASSIGN C:` will display the assignment for drive C:.
`ASSIGN `*`<drv>`*`=`*`<device>`*`[:`*`<slice>`*`]` will assign (or
`ASSIGN ` *`<drv>`*`=`*`<device>`*`[:`*`<slice>`*`]` will assign (or
reassign) a drive letter to a new device and (optionally) slice. If no reassign) a drive letter to a new device and (optionally) slice. If no
slice is specified, then slice 0 is assumed. For example, `ASSIGN slice is specified, then slice 0 is assumed. For example, `ASSIGN
C:=IDE0` will assign drive letter C: to device IDE0, slice 0. `ASSIGN C:=IDE0` will assign drive letter C: to device IDE0, slice 0. `ASSIGN
D:=IDE0:3` will assign drive letter D: to device IDE0 slice 3. D:=IDE0:3` will assign drive letter D: to device IDE0 slice 3.
`ASSIGN `*`<drv>`*`=` can be used to remove the assignment from a
The `ASSIGN` command will not allow you to specify a slice (other than
zero) for devices that do not support slices.
A slice should only be specified for hard disk devices (SD, IDE, PPIDE).
Floppy disk drives and RAM/ROM drives do not have slices.
`ASSIGN ` *`<drv>`*`=` can be used to remove the assignment from a
drive letter. So, `ASSIGN E:=` will remove the association of drive drive letter. So, `ASSIGN E:=` will remove the association of drive
letter E: from any previous device. letter E: from any previous device.
`ASSIGN `*`<tgtdrv>`*`=`*`<srcdrv>`* is used to swap the assignments
`ASSIGN ` *`<tgtdrv>`*`=`*`<srcdrv>`* is used to swap the assignments
of two drive letters. For example, `ASSIGN C:=D:` will swap the device of two drive letters. For example, `ASSIGN C:=D:` will swap the device
assignments of C: and D:. assignments of C: and D:.
@ -1118,6 +1134,78 @@ When the command runs it will echo the resultant assignments to the
console to confirm its actions. It will also display the remaining console to confirm its actions. It will also display the remaining
space available in disk buffers. space available in disk buffers.
#### Usage (Bulk)
The following describes how to assign drives in bulk without having to specify
the identifiers of each drive being mapped. Instead bulk mode has a
predefined set options (identified by single letter) which will map drives.
Bulk mode works by assigning drives sequentially starting at A: until all
drives are used, or there are no more options to process. Each option
will typically map between 0 and N drives depending on the option
and the available hardware in your system.
`ASSIGN /B=`*`<option><option>`*... will perform bulk assignment .
The following options will assign a small number of devices, typically you would
place at beginning of an option list.
| Option | Name | Description | Assigned |
|--------|----------|---------------------------------------------|----------|
| B | Boot | The boot device | 1 |
| A | RAM | Ram drive | 0,1 |
| O | ROM | Rom drive | 0,1 |
| F | Floppy | All floppy devices, with/without media | 0,1,2,.. |
| P | Preserve | Skip and preserve the next drive assignment | 1 |
| X | Exclude | Un-assign / Exclude the next drive | 1 |
A drive e.g. RAM, ROM, FLOPPY can only be assigned if it exists. if you system
doesn't have the hardware that supports the device, then no devices will be
assigned, and the next option will be processed.
`B` assigns the boot device. If used the `B`oot drive should typically be
assigned first.
`P` will not make any changes to the next drive, it will skip over it. While the
`X` option will un-assign the next drive, leaving a gap.
The remaining options will fill drives mostly to end, from hard drive slices,
generally choose 1 of the following:
| Option | Name | Description | Assigned |
|--------|-------------|---------------------------------------------|----------|
| S | Slices | Assign slices from boot hard drive | ...max |
| H | Hard Drive | Assign slices evenly from all hard drives | ...max |
| L | Legacy HD | Assign slices from all hard drives (legacy) | 6,...max |
| Z | Exclude All | Un-assign all remaining drives | ...max |
`S`lices assignment will map all remaining drives to slices from the boot device.
If I have other hard drives present these will not be mapped by this option.
e.g. `ASSIGN /B=BAOS`
Will first assign drives `A:(Boot), B:(RAM), C:(ROM)` this leaves 13 drives
which will be assigned to slices from the boot hard drive (D: thru P:),
leaving no unused drives.
'H'ard drive assignment will attempt to fill all remaining drive letters
by splitting the number of drives remaining evenly across all.
e.g. `ASSIGN /B=BAOH`
Will first assign drives `A:(Boot), B:(RAM), C:(ROM)` this leaves 13 drives
available. If I have 3 hard disks then (13/3) = 4 slices from each hard drive will
be assigned to drives (D: thru O:), leaving a single unused drive (P:).
`L`egacy hard drive assignment is identical to how the startup hard disk assignment
works. ie. Attempt to assign up to 8 hard drives split across hard drives
detected at boot.
e.g. `ASSIGN /B=BAOL`
Will first assign drives `A:(Boot), B:(RAM), C:(ROM)`. If I have 3 hard disks
then (8/3) = 2 slices from each hard drive will be assigned to drives (D: thru I:),
leaving 7 unused drives (J: thru P:).
#### Notes #### Notes
If the `ASSIGN` command encounters any rule violations or errors, it If the `ASSIGN` command encounters any rule violations or errors, it
@ -1136,10 +1224,6 @@ being assigned actually contains readable media. If the assigned
device has no media, you will receive an I/O error when you attempt to device has no media, you will receive an I/O error when you attempt to
use the drive letter. use the drive letter.
The `ASSIGN` command will not allow you to specify a slice (other than
zero) for devices that do not support slices (such as floppy drives
or RAM/ROM disks).
The `ASSIGN` command does not check that the media is large enough to The `ASSIGN` command does not check that the media is large enough to
support the slice you specify. In other words, you could potentially support the slice you specify. In other words, you could potentially
assign a drive letter to a slice that is beyond the end of the media assign a drive letter to a slice that is beyond the end of the media
@ -1152,7 +1236,11 @@ data (such as a FAT filesystem).
You will not be allowed to assign multiple drive letters to a single You will not be allowed to assign multiple drive letters to a single
device and slice. In other words, only one drive letter may refer to a device and slice. In other words, only one drive letter may refer to a
single filesystem at a time.
single filesystem at a time.
Attempts to assign a duplicate drive letter will fail and display an
error. If you wish to assign a different drive letter to a
device/unit/slice, unassign the existing drive letter first.
Drive letter A: must always be assigned to a device and slice. The Drive letter A: must always be assigned to a device and slice. The
`ASSIGN` command will enforce this. `ASSIGN` command will enforce this.
@ -1163,14 +1251,6 @@ all drive letters will return to their default assignments. A SUBMIT
batch file can be used to setup desired drive assignments batch file can be used to setup desired drive assignments
automatically at boot. automatically at boot.
Floppy disk drives and RAM/ROM drives do not have slices. A slice
should only be specified for hard disk devices (SD, IDE, PPIDE).
Only one drive letter may be assigned to a specific device/unit/slice
at a time. Attempts to assign a duplicate drive letter will fail and
display an error. If you wish to assign a different drive letter to a
device/unit/slice, unassign the existing drive letter first.
Be aware that this command will allow you to reassign or remove the Be aware that this command will allow you to reassign or remove the
assignment of your system drive letter. This can cause your operating assignment of your system drive letter. This can cause your operating
system to fail and force you to reboot. system to fail and force you to reboot.
@ -1251,11 +1331,6 @@ cold reboot of the system.
The functionality is highly dependent on the capabilities of your system. The functionality is highly dependent on the capabilities of your system.
At present, all Z180 systems can change their CPU speed and their
wait states. SBC and MBC systems may be able to change their CPU
speed if the hardware supports it and it is enabled in the HBIOS
configuration.
#### Syntax #### Syntax
| `CPUSPD [`*`<speed>`*`[,[`*`<memws>`*`][,[`*`<iows>`*`]]]` | `CPUSPD [`*`<speed>`*`[,[`*`<memws>`*`][,[`*`<iows>`*`]]]`
@ -1290,11 +1365,27 @@ If an attempt is made to change the speed of a system
that is definitely incapable of doing so, then an error result is that is definitely incapable of doing so, then an error result is
returned. returned.
Z180-based systems will be able to adjust their CPU speed depending
on the specific variant of the Z180 chip being used:
| Z180 Variant | Capability |
| --------------------|--------------------|
| Z80180 (original) | Half |
| Z8S180 Rev. K | Half, Full |
| Z8S180 Rev. N | Half, Full, Double |
SBC and MBC systems may be able to change their CPU
speed if the hardware supports it and it is enabled in the HBIOS
configuration.
The `CPUSPD` command makes no attempt to ensure that the new CPU The `CPUSPD` command makes no attempt to ensure that the new CPU
speed will actually work on the current hardware. Setting a CPU speed will actually work on the current hardware. Setting a CPU
speed that exceeds the capabilities of the system will result in speed that exceeds the capabilities of the system will result in
unstable operation or a system stall. unstable operation or a system stall.
In the case of Z180 CPUs, it is frequently necessary to add
memory wait states when increasing the CPU speed.
Some peripherals are dependent on the CPU speed. For example, the Z180 Some peripherals are dependent on the CPU speed. For example, the Z180
ASCI baud rate and system timer are derived from the CPU speed. The ASCI baud rate and system timer are derived from the CPU speed. The
CPUSPD application will attempt to adjust these peripherals for CPUSPD application will attempt to adjust these peripherals for
@ -2202,11 +2293,24 @@ MYM sound files.
#### Syntax #### Syntax
`TUNE `*`<filename>`*
`TUNE `*`<filename>`* `*`<options>`*`
*`<filename>`* is the name of a sound file ending in .PT2, .PT3, or *`<filename>`* is the name of a sound file ending in .PT2, .PT3, or
.MYM .MYM
| Option | Description |
| ----------- | ------------------------------------------------------ |
| `-MSX` | Force MSX port addresses A0H/A1H (no PSG detection) |
| `-RC` | Force RCBus port addresses D8H/D0H (no PSG detection) |
| `--HBIOS` | Utilise HBIOS' sound driver |
| `+T1` | Play tune an octave higher |
| `+T2` | Play tune two octaves higher |
| `-T1` | Play tune an octave lower |
| `-T2` | Play tune two octaves lower |
The +t and -t options apply only to HBIOS mode operation. The `-MSX`,
`-RC`, and `--HBIOS` options are mutually exclusive. See Notes below.
#### Usage #### Usage
The TUNE application supports PT and YM sound file formats. It The TUNE application supports PT and YM sound file formats. It
@ -2224,9 +2328,9 @@ well known port addresses at startup. It will auto-configure itself
for the hardware found. If no hardware is detected, it will abort with for the hardware found. If no hardware is detected, it will abort with
an error message. an error message.
Some sound board hardware does not support automatic detection
(notably the Why-Em-Ulator). You may force the use of standard
MSX or RC Bus standard ports using the `-MSX` or `-RC` options.
Some hardware (notably Why-Em-Ulator) cannot be detected due limitations
of the emulation. In such cases, you can force the use of the two
most common port addresses using the `-msx` or `-rc` options.
On Z180 systems, I/O wait states are added when writing to the sound On Z180 systems, I/O wait states are added when writing to the sound
chip to avoid exceeding its speed limitations. On Z80 systems, you chip to avoid exceeding its speed limitations. On Z80 systems, you
@ -2238,25 +2342,33 @@ accurately pace the sound file output. If no system timer is
available, a delay loop is calculated instead. The delay loop will not available, a delay loop is calculated instead. The delay loop will not
be as accurate as the system timer. be as accurate as the system timer.
There are two modes of operations. A direct hardware interface for the
There are two modes of operation. A direct hardware interface for the
AY-3-8910 or YM2149 chips, or a compatibility layer thru HBIOS supporting AY-3-8910 or YM2149 chips, or a compatibility layer thru HBIOS supporting
the SN76489 chip.
both the AY-3-8910 and the SN76489 chip.
By default the application will attempt to interface directly to the sound By default the application will attempt to interface directly to the sound
chip. The optional argument `--HBIOS` supplied after the filename, will chip. The optional argument `--HBIOS` supplied after the filename, will
enable the application to use the HBIOS sound driver. enable the application to use the HBIOS sound driver.
The HBIOS mode also support other switch as described below.
The following summarizes the different modes of operation for the
application:
| Switch | Description |
| ----------- | ------------------------------------------------------ |
| `-MSX` | Force use of MSX standard ports (A0H/A1H) |
| `-RC` | Force use of RCBus standard ports (D8H/D0H) |
| `--HBIOS` | Utilise HBIOS' sound driver |
| `+T1` | Play tune an octave higher |
| `+T2` | Play tune two octaves higher |
| `-T1` | Play tune an octave lower |
| `-T2` | Play tune two octaves lower |
- If you use `TUNE` with no options, it will use it's original behavior
of searching for and detecting a sound chip. `TUNE` will play sound
files directly to the PSG hardware. In this mode it does not
matter if HBIOS does or does not know about the sound chip.
- If you use `TUNE` with the `--HBIOS` option, it will not detect a sound chip
and will use the RomWBW HBIOS interface. This will only work if HBIOS
was configured for the installed sound card and HBIOS detects the sound chip.
- If you use `TUNE` with `-RC` or `-MSX`, it will play tunes directly to the PSG
hardware (not via HBIOS) and will bypass detection. In this mode it does
not matter if HBIOS does or does not know about the sound chip.
Note that the HBIOS API for sound cards is pretty good, but does not implement
everything that the sound card can do. For best fidelity, use `TUNE` without the
`--HBIOS` option.
All RomWBW operating system boot disks include a selection of sound All RomWBW operating system boot disks include a selection of sound
files in user area 3. files in user area 3.

3
Source/Doc/ReadMe.md

@ -192,7 +192,8 @@ please let me know if I missed you!
* Mark Pruden has also contributed a great deal of content to the * Mark Pruden has also contributed a great deal of content to the
Disk Catalog, User Guide as well as contributing the disk image Disk Catalog, User Guide as well as contributing the disk image
for the Z3PLUS operating system, the COPYSL utility, and also for the Z3PLUS operating system, the COPYSL utility, and also
implemented feature for RomWBW configuration by NVRAM.
implemented a feature for RomWBW configuration by NVRAM,
and added the /B bulk mode of disk assignment to the ASSIGN utility.
* Jacques Pelletier has contributed the DS1501 RTC driver code. * Jacques Pelletier has contributed the DS1501 RTC driver code.

2
Source/Doc/SystemGuide.md

@ -1162,7 +1162,7 @@ The non-Floppy specific bits are:
|---------:|--------------------------------------------------| |---------:|--------------------------------------------------|
| 4 | LBA Capable | | 4 | LBA Capable |
| 3-0 | Media Type: 0=Hard Disk, 1=CF, 2=SD, 3=USB, | | 3-0 | Media Type: 0=Hard Disk, 1=CF, 2=SD, 3=USB, |
| | 4=ROM, 5=RAM, 6=RAMF, 7=FLASH, 8=CD-ROM, |
| | 4=ROM, 5=RAM, 6=FLASH, 7=RAMF, 8=CD-ROM, |
| | 9=Cartridge | | | 9=Cartridge |
Device Type (D) indicates the specific hardware driver that handles the Device Type (D) indicates the specific hardware driver that handles the

3
Source/Doc/UserGuide.md

@ -4788,7 +4788,8 @@ please let me know if I missed you!
* Mark Pruden has also contributed a great deal of content to the * Mark Pruden has also contributed a great deal of content to the
Disk Catalog, User Guide as well as contributing the disk image Disk Catalog, User Guide as well as contributing the disk image
for the Z3PLUS operating system, the COPYSL utility, and also for the Z3PLUS operating system, the COPYSL utility, and also
implemented feature for RomWBW configuration by NVRAM.
implemented a feature for RomWBW configuration by NVRAM,
and added the /B bulk mode of disk assignment to the ASSIGN utility.
* Jacques Pelletier has contributed the DS1501 RTC driver code. * Jacques Pelletier has contributed the DS1501 RTC driver code.

16
Source/EZ512/Bank Layout.txt

@ -0,0 +1,16 @@
Eazy80_512 has a 64K ROM contains a monitor. The monitor command "b 4" loads RomWBW program
starting from SD sector 288 into first 4 banks of memory. RAM disk is not loaded, so drive A is
blank.
Bank Contents Description
-------- -------- -----------
0x0 BIOS HBIOS Bank (operating)
0x1 IMG0 ROM Loader, Monitor, ROM OSes
0x2 IMG1 ROM Applications
0x3 IMG2 Reserved
0x4-0xB RAMD RAM Disk Banks <- not loaded, blank
0xC BUF OS Buffers (CP/M3)
0xD AUX Aux Bank (CP/M 3, BPBIOS, etc.)
0xE USR User Bank (CP/M TPA, etc.)
0xF COM Common Bank, Upper 32KB

26
Source/EZ512/Build.cmd

@ -0,0 +1,26 @@
@echo off
setlocal
set TOOLS=../../Tools
set PATH=%TOOLS%\srecord;%PATH%
for %%f in (..\..\Binary\RCZ80_ez512_*.rom) do call :build %%~nf
goto :eof
:build
echo.
echo Creating %1 disk image...
echo.
srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x0 0x200 ez512_cfldr.bin -binary -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1B8 0x200 ez512_ptbl.bin -binary -offset 0x1B8 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1F000 0x20000 ez512_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x24000 0xA4000 ..\..\Binary\%1.rom -binary -offset 0x24000 -o temp.dat -binary
move temp.dat ..\..\Binary\%1_hd1k_prefix.dat
copy /b ..\..\Binary\%1_hd1k_prefix.dat + ..\..\Binary\hd1k_cpm22.img + ..\..\Binary\hd1k_zsdos.img + ..\..\Binary\hd1k_nzcom.img + ..\..\Binary\hd1k_cpm3.img + ..\..\Binary\hd1k_zpm3.img + ..\..\Binary\hd1k_ws4.img ..\..\Binary\%1_hd1k_combo.img || exit /b
goto :eof

3
Source/EZ512/Clean.cmd

@ -0,0 +1,3 @@
@echo off
setlocal

22
Source/EZ512/EZ512 Disk Layout.txt

@ -0,0 +1,22 @@
Eazy80_512 Disk Prefix Layout
=============================
---- Bytes ---- --- Sectors ---
Start Length Start Length Description
------- ------- ------- ------- ---------------------------
0x00000 0x001BE 0 1 CF Boot Loader
0x001B8 0x00048 RomWBW Partition Table
0x00200 0x1EE00 1 247 Unused
0x1F000 0x01000 248 8 EZ512 Monitor v0.3
0x20000 0x04000 256 32 Unused
0x24000 0x80000 288 1024 RomWBW
0xA4000 0x5C000 1312 736 Unused
0x100000 2048 Start of slices (partition 0x1E)
Notes
-----
- Eazy80_512 monitor reads the first 128KB of RomWBW stored started from sector 288 into banks 0-3
- Afterward Z80 jumps to location 0x0 to execute RomWBW

27
Source/EZ512/Makefile

@ -0,0 +1,27 @@
DEST=../../Binary
HD1KIMGS = $(DEST)/hd1k_cpm22.img $(DEST)/hd1k_zsdos.img $(DEST)/hd1k_nzcom.img \
$(DEST)/hd1k_cpm3.img $(DEST)/hd1k_zpm3.img $(DEST)/hd1k_ws4.img
ROMS := $(wildcard $(DEST)/RCZ80_ez512_*.rom)
ROMS := $(patsubst $(DEST)/%.rom,%,$(ROMS))
OBJECTS := $(patsubst %,%_hd1k_prefix.dat,$(ROMS))
OBJECTS += $(patsubst %,%_hd1k_combo.img,$(ROMS))
TOOLS = ../../Tools
include $(TOOLS)/Makefile.inc
DIFFPATH = $(DIFFTO)/Binary
%_hd1k_prefix.dat: $(DEST)/%.rom
srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x0 0x200 ez512_cfldr.bin -binary -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1B8 0x200 ez512_ptbl.bin -binary -offset 0x1B8 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1F000 0x20000 ez512_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x24000 0xA4000 $< -binary -offset 0x24000 -o temp.dat -binary
mv temp.dat $@
%_hd1k_combo.img: %_hd1k_prefix.dat $(HD1KIMGS)
cat $^ > $@

BIN
Source/EZ512/ez512_cfldr.bin

Binary file not shown.

BIN
Source/EZ512/ez512_mon.bin

Binary file not shown.

BIN
Source/EZ512/ez512_ptbl.bin

Binary file not shown.

1
Source/HBIOS/Build.cmd

@ -234,6 +234,7 @@ call Build RCZ80 skz_std || exit /b
call Build RCZ80 zrc_std || exit /b call Build RCZ80 zrc_std || exit /b
call Build RCZ80 zrc_ram_std || exit /b call Build RCZ80 zrc_ram_std || exit /b
call Build RCZ80 zrc512_std || exit /b call Build RCZ80 zrc512_std || exit /b
call Build RCZ80 ez512_std || exit /b
call Build RCZ180 ext_std || exit /b call Build RCZ180 ext_std || exit /b
call Build RCZ180 nat_std || exit /b call Build RCZ180 nat_std || exit /b
call Build RCZ180 z1rcc_std || exit /b call Build RCZ180 z1rcc_std || exit /b

1
Source/HBIOS/Build.sh

@ -26,6 +26,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc_std"; bash Build.sh ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc_std"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc_ram_std"; bash Build.sh ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc_ram_std"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc512_std"; bash Build.sh ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc512_std"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="ez512_std"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="ext_std"; bash Build.sh ROM_PLATFORM="RCZ180"; ROM_CONFIG="ext_std"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="nat_std"; bash Build.sh ROM_PLATFORM="RCZ180"; ROM_CONFIG="nat_std"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="z1rcc_std"; bash Build.sh ROM_PLATFORM="RCZ180"; ROM_CONFIG="z1rcc_std"; bash Build.sh

2
Source/HBIOS/Config/GMZ180_std.asm

@ -82,7 +82,7 @@ FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_GM ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_GM ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
; ;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

2
Source/HBIOS/Config/MK4_std.asm

@ -70,6 +70,6 @@ FDMODE .SET FDMODE_DIDE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
; ;
PRPENABLE .SET TRUE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) PRPENABLE .SET TRUE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

2
Source/HBIOS/Config/N8_std.asm

@ -61,6 +61,6 @@ FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
; ;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
; ;
SDMODE .SET SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
; ;
AY38910ENABLE .SET TRUE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AY38910ENABLE .SET TRUE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER

2
Source/HBIOS/Config/RCEZ80_std.asm

@ -69,7 +69,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
; ;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80]
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
; ;

112
Source/HBIOS/Config/RCZ80_ez512_std.asm

@ -0,0 +1,112 @@
;
;==================================================================================================
; ROMWBW DEFAULT BUILD SETTINGS FOR RCBUS Z80 ZRC512
;==================================================================================================
;
; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
; INDICATED ABOVE. THESE SETTINGS DEFINE THE OFFICIAL BUILD FOR THIS
; PLATFORM AS DISTRIBUTED IN ROMWBW RELEASES.
;
; ROMWBW USES CASCADING CONFIGURATION FILES AS INDICATED BELOW:
;
; cfg_MASTER.asm - MASTER: CONFIGURATION FILE DEFINES ALL POSSIBLE ROMWBW SETTINGS
; |
; +-> cfg_<platform>.asm - PLATFORM: DEFAULT SETTINGS FOR SPECIFIC PLATFORM
; |
; +-> Config/<plt>_std.asm - BUILD: SETTINGS FOR EACH OFFICIAL DIST BUILD
; |
; +-> Config/<plt>_<cust>.asm - USER: CUSTOM USER BUILD SETTINGS
;
; THE TOP (MASTER CONFIGURATION) FILE DEFINES ALL POSSIBLE ROMWBW
; CONFIGURATION SETTINGS. EACH FILE BELOW THE MASTER CONFIGURATION FILE
; INHERITS THE CUMULATIVE SETTINGS OF THE FILES ABOVE IT AND MAY
; OVERRIDE THESE SETTINGS AS DESIRED.
;
; OTHER THAN THE TOP MASTER FILE, EACH FILE MUST "#INCLUDE" ITS PARENT
; FILE (SEE #INCLUDE STATEMENT BELOW). THE TOP TWO FILES SHOULD NOT BE
; MODIFIED.
;
; TO CUSTOMIZE YOUR BUILD SETTINGS YOU SHOULD MODIFY THIS FILE, THE
; DEFAULT BUILD SETTINGS (Config/<platform>_std.asm) OR PREFERABLY
; CREATE AN OPTIONAL CUSTOM USER SETTINGS FILE THAT INCLUDES THE DEFAULT
; BUILD SETTINGS FILE (SEE EXAMPLE Config/SBC_user.asm).
;
; BY CREATING A CUSTOM USER SETTINGS FILE, YOU ARE LESS LIKELY TO BE
; IMPACTED BY FUTURE CHANGES BECAUSE YOU WILL BE INHERITING MOST
; OF YOUR SETTINGS WHICH WILL BE UPDATED BY AUTHORS AS ROMWBW EVOLVES.
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE
; SOURCE DIRECTORY (TWO DIRECTORIES ABOVE THIS ONE).
;
; *** WARNING: ASIDE FROM THE MASTER CONFIGURATION FILE, YOU MUST USE
; ".SET" TO OVERRIDE SETTINGS. THE ASSEMBLER WILL ERROR IF YOU ATTEMPT
; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
;
#DEFINE PLATFORM_NAME "EaZy80-512", " [", CONFIG, "]"
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
#DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
;
#INCLUDE "cfg_RCZ80.asm"
;
CPUOSC .SET 22000000 ; CPU OSC FREQ IN MHZ
;
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .SET $00 ; KIO BASE I/O ADDRESS
;
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .SET MM_EZ512 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT
CTCBASE .SET KIOBASE+$04 ; CTC BASE I/O ADDRESS
CTCTIMER .SET TRUE ; ENABLE CTC PERIODIC TIMER
CTCOSC .SET 3686400 ; CTC CLOCK FREQUENCY
;
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIOCNT .SET 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .SET SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .SET KIOBASE+$08 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .SET CTCOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACTCC .SET 0 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .SET CTCOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCTCC .SET 1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
;
MDROM .SET FALSE ; MD: ENABLE ROM DISK
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_EZ512 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
AY_FORCE .SET FALSE ; AY: BYPASS AUTO-DETECT, FORCED PRESENT

2
Source/HBIOS/Config/RCZ80_std.asm

@ -77,7 +77,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
; ;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80]
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
; ;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

2
Source/HBIOS/Config/S100_std.asm

@ -63,5 +63,5 @@ SCONENABLE .SET TRUE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY

2
Source/HBIOS/Config/SBC_std.asm

@ -66,6 +66,6 @@ FDMODE .SET FDMODE_DIO3 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|
IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
; ;
PRPENABLE .SET TRUE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) PRPENABLE .SET TRUE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

2
Source/HBIOS/Config/SCZ180_sc126_std.asm

@ -84,7 +84,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
; ;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
; ;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

2
Source/HBIOS/Config/SCZ180_sc130_std.asm

@ -85,7 +85,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
; ;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
; ;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

2
Source/HBIOS/Config/SCZ180_sc131_std.asm

@ -74,7 +74,7 @@ SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
; ;
CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT

2
Source/HBIOS/Config/SCZ180_sc700_std.asm

@ -84,7 +84,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
; ;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
; ;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

4
Source/HBIOS/cfg_DUO.asm

@ -68,7 +68,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $50 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .SET $50 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $51 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .SET $51 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $52 ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY) MPGSEL_2 .SET $52 ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -287,7 +287,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80]
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_DYNO.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@ -302,7 +302,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_EPITX.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
; ;
Z180_BASE .SET $C0 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS Z180_BASE .SET $C0 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
@ -298,7 +298,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_EPITX ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_EPITX ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $40 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $40 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 2 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 2 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_FZ80.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY) MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -307,7 +307,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_FZ80 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_FZ80 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_GMZ180.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@ -303,7 +303,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_GM ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_GM ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_HEATH.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY) MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -307,7 +307,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_MASTER.asm

@ -69,7 +69,7 @@ DEFSERCFG .EQU SER_9600_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .EQU $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .EQU $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .EQU MM_NONE ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .EQU MM_NONE ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .EQU ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .EQU ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY) MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY) MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@ -360,7 +360,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_NONE ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .EQU SDMODE_NONE ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_MBC.asm

@ -68,7 +68,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_MBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_MBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPCL_RAM .SET $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY) MPCL_RAM .SET $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .SET $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY) MPCL_ROM .SET $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
; ;
@ -283,7 +283,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_MK4.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
; ;
Z180_BASE .SET $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS Z180_BASE .SET $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
@ -292,7 +292,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_MON.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_MON ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_MON ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
; ;
RTCIO .SET $C0 ; RTC LATCH REGISTER ADR RTCIO .SET $C0 ; RTC LATCH REGISTER ADR
; ;
@ -302,7 +302,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_N8.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_N8 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_N8 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .SET 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
; ;
Z180_BASE .SET $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS Z180_BASE .SET $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
@ -294,7 +294,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET N8_PPI0 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET N8_PPI0 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_NABU.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY) MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -307,7 +307,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_RCEZ80.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY) MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -307,7 +307,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_RCZ180.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@ -302,7 +302,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_RCZ280.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@ -312,7 +312,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_RCZ80.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY) MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -307,7 +307,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_RPH.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_RPH ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_RPH ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .SET 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
; ;
Z180_BASE .SET $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS Z180_BASE .SET $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
@ -282,7 +282,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET RPH_PPI0 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET RPH_PPI0 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_S100.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_57600_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@ -302,7 +302,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_SBC.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPCL_RAM .SET $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY) MPCL_RAM .SET $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .SET $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY) MPCL_ROM .SET $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
; ;
@ -282,7 +282,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_SCZ180.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@ -302,7 +302,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_Z80RETRO.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $60 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .SET $60 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $61 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .SET $61 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $62 ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY) MPGSEL_2 .SET $62 ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -262,7 +262,7 @@ PPIDE0A8BIT .SET FALSE ; PPIDE 0A (MASTER): 8 BIT XFER
PPIDE0B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE0B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_Z80R ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_Z80R ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE

4
Source/HBIOS/cfg_ZETA.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPCL_RAM .SET $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY) MPCL_RAM .SET $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .SET $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY) MPCL_ROM .SET $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
; ;
@ -231,7 +231,7 @@ PPIDE0A8BIT .SET FALSE ; PPIDE 0A (MASTER): 8 BIT XFER
PPIDE0B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE0B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_ZETA2.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING) APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY) MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -242,7 +242,7 @@ PPIDE0A8BIT .SET FALSE ; PPIDE 0A (MASTER): 8 BIT XFER
PPIDE0B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER PPIDE0B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
; ;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

14
Source/HBIOS/hbios.asm

@ -745,6 +745,18 @@ HBX_ROM:
RET ; DONE RET ; DONE
#ENDIF #ENDIF
; ;
#IF (MEMMGR == MM_EZ512)
AND $F ; HCS mask off high nibble
BIT 3,A ; HCS if banks $8-$F, set bit 6
JR Z,MM_EZ512_BANK0TO7
AND 7 ; HCS clear bit 3
OR $40 ; HCS set bit 6 for banks $8-$F
MM_EZ512_BANK0TO7:
OR $80 ; HCS set bit 7 to keep RAM enabled
OUT ($0C),A ; HCS write to the bank control register
RET ; DONE
#ENDIF
;
#IF (MEMMGR == MM_MBC) #IF (MEMMGR == MM_MBC)
; ;
#IF (INTMODE == 1) #IF (INTMODE == 1)
@ -8701,8 +8713,8 @@ PS_DTSD .TEXT "SD Card$"
PS_DTUSB .TEXT "USB Drive$" PS_DTUSB .TEXT "USB Drive$"
PS_DTROM .TEXT "ROM Disk$" PS_DTROM .TEXT "ROM Disk$"
PS_DTRAM .TEXT "RAM Disk$" PS_DTRAM .TEXT "RAM Disk$"
PS_DTFSH .TEXT "Flash ROM"
PS_DTRF .TEXT "RAM Floppy$" PS_DTRF .TEXT "RAM Floppy$"
PS_DTFSH .TEXT "Flash Drive$"
PS_DTCD .TEXT "CD-ROM$" PS_DTCD .TEXT "CD-ROM$"
PS_DTCRT .TEXT "Cartridge$" PS_DTCRT .TEXT "Cartridge$"
PS_DTOTHER .TEXT "???$" PS_DTOTHER .TEXT "???$"

54
Source/HBIOS/md.asm

@ -23,7 +23,7 @@ MD_ATTRIB .EQU 7 ; OFFSET OF ATTRIBUTE (BYTE)
; ;
MD_AROM .EQU %00010100 ; ROM ATTRIBUTE MD_AROM .EQU %00010100 ; ROM ATTRIBUTE
MD_ARAM .EQU %00010101 ; RAM ATTRIBUTE MD_ARAM .EQU %00010101 ; RAM ATTRIBUTE
MD_AFSH .EQU %00010111 ; FLASH ATTRIBUTE
MD_AFSH .EQU %00010110 ; FLASH ATTRIBUTE
; ;
MD_FDBG .EQU 0 ; FLASH DEBUG CODE MD_FDBG .EQU 0 ; FLASH DEBUG CODE
MD_FVBS .EQU 1 ; FLASH VERBOSE OUTPUT MD_FVBS .EQU 1 ; FLASH VERBOSE OUTPUT
@ -109,9 +109,9 @@ MD_INIT:
; SETUP THE DIO TABLE ENTRIES ; SETUP THE DIO TABLE ENTRIES
; ;
#IF (MDROM & MDFFENABLE) #IF (MDROM & MDFFENABLE)
LD A,(MD_FFSEN) ; IF FLASH
OR A ; FILESYSTEM
JR NZ,MD_INIT1 ; CAPABLE,
LD A,(MD_FFSEN) ; IF FLASH
OR A ; FILESYSTEM
JR NZ,MD_INIT1 ; CAPABLE,
LD A,MD_AFSH ; UPDATE ROM DIO LD A,MD_AFSH ; UPDATE ROM DIO
LD (MD_CFGTBL + MD_CFGSIZ + MD_ATTRIB),A LD (MD_CFGTBL + MD_CFGSIZ + MD_ATTRIB),A
MD_INIT1: MD_INIT1:
@ -177,7 +177,7 @@ MD_RESET:
RET RET
; ;
; ;
;
;
MD_CAP: ; ASSUMES THAT UNIT 0 IS RAM, UNIT 1 IS ROM MD_CAP: ; ASSUMES THAT UNIT 0 IS RAM, UNIT 1 IS ROM
LD A,(IY+MD_DEV) ; GET DEVICE NUMBER LD A,(IY+MD_DEV) ; GET DEVICE NUMBER
OR A ; SET FLAGS OR A ; SET FLAGS
@ -259,7 +259,7 @@ MD_READ:
; ;
#IF (MDFFENABLE) #IF (MDFFENABLE)
LD A,(IY+MD_ATTRIB) ; GET ADR OF SECTOR READ FUNC LD A,(IY+MD_ATTRIB) ; GET ADR OF SECTOR READ FUNC
LD BC,MD_RDSECF ;
LD BC,MD_RDSECF ;
CP MD_AFSH ; RAM / ROM = MD_RDSEC CP MD_AFSH ; RAM / ROM = MD_RDSEC
JR Z,MD_RD1 ; FLASH = MD_RDSECF JR Z,MD_RD1 ; FLASH = MD_RDSECF
#ENDIF #ENDIF
@ -275,7 +275,7 @@ MD_WRITE:
; ;
#IF (MDFFENABLE) #IF (MDFFENABLE)
LD A,(IY+MD_ATTRIB) ; GET ADR OF SECTOR WRITE FUNC LD A,(IY+MD_ATTRIB) ; GET ADR OF SECTOR WRITE FUNC
LD BC,MD_WRSECF ;
LD BC,MD_WRSECF ;
CP MD_AFSH ; RAM / ROM = MD_WRSEC CP MD_AFSH ; RAM / ROM = MD_WRSEC
JR Z,MD_WR1 ; FLASH = MD_WRSECF JR Z,MD_WR1 ; FLASH = MD_WRSECF
#ENDIF #ENDIF
@ -371,7 +371,7 @@ MD_SECM:
LD D,A ; FROM THE START LD D,A ; FROM THE START
LD E,0 LD E,0
; ;
LD HL,MD_F4KBUF ; POINT TO THE SECTOR WE
LD HL,MD_F4KBUF ; POINT TO THE SECTOR WE
ADD HL,DE ; WANT TO COPY ADD HL,DE ; WANT TO COPY
LD DE,(MD_DSKBUF) LD DE,(MD_DSKBUF)
; ;
@ -385,7 +385,7 @@ MD_SECM:
JP DMALDIR ; 4K SECTOR TO THE DISK BUFFER JP DMALDIR ; 4K SECTOR TO THE DISK BUFFER
#ENDIF #ENDIF
MD_NODMA: MD_NODMA:
#IF (!(DMAENABLE & (DMAMODE!=DMAMODE_NONE)))
#IF (!(DMAENABLE & (DMAMODE!=DMAMODE_NONE)))
LD BC,512 ; COPY ONE 512B SECTOR FROM THE LD BC,512 ; COPY ONE 512B SECTOR FROM THE
LDIR ; 4K SECTOR TO THE DISK BUFFER LDIR ; 4K SECTOR TO THE DISK BUFFER
XOR A XOR A
@ -407,7 +407,7 @@ MD_NODMA:
; ;
MD_IOSETUPF: MD_IOSETUPF:
LD L,(IY+MD_LBA+0) ; HL := LOW WORD OF LBA LD L,(IY+MD_LBA+0) ; HL := LOW WORD OF LBA
LD H,(IY+MD_LBA+1)
LD H,(IY+MD_LBA+1)
INC H ; SKIP FIRST 128MB (256 SECTORS) INC H ; SKIP FIRST 128MB (256 SECTORS)
; ;
LD A,L ; SAVE LBA 4K LD A,L ; SAVE LBA 4K
@ -421,7 +421,7 @@ MD_IOSETUPF:
LD L,D ; DE:HL = HLX512 LD L,D ; DE:HL = HLX512
SLA H SLA H
RL E RL E
RL D
RL D
; ;
RET RET
; ;
@ -443,7 +443,7 @@ MD_CALBAS:
; ;
#IF (MD_FDBG==1) #IF (MD_FDBG==1)
CALL PC_SPACE ; DISPLAY SECTOR CALL PC_SPACE ; DISPLAY SECTOR
CALL PRTHEX32 ; SECTOR ADDRESS
CALL PRTHEX32 ; SECTOR ADDRESS
CALL PC_SPACE ; IN DE:HL CALL PC_SPACE ; IN DE:HL
#ENDIF #ENDIF
; ;
@ -478,7 +478,7 @@ MD_WRSECF: ; CALLED FROM MD_RW
PUSH HL ; IS THE SECTOR PUSH HL ; IS THE SECTOR
LD HL,(MD_LBA4K) ; WE WANT TO LD HL,(MD_LBA4K) ; WE WANT TO
XOR A ; WRITE ALREADY XOR A ; WRITE ALREADY
SBC HL,BC ; IN THE 4K
SBC HL,BC ; IN THE 4K
POP HL ; BLOCK WE HAVE POP HL ; BLOCK WE HAVE
JR Z,MD_SECM1 ; IN THE BUFFER JR Z,MD_SECM1 ; IN THE BUFFER
; ;
@ -504,7 +504,7 @@ MD_SECM1: ; DESIRED SECTOR IS IN BUFFER
LD D,A ; FROM THE START LD D,A ; FROM THE START
LD E,0 LD E,0
; ;
LD HL,MD_F4KBUF ; POINT TO THE SECTOR WE
LD HL,MD_F4KBUF ; POINT TO THE SECTOR WE
ADD HL,DE ; WANT TO COPY ADD HL,DE ; WANT TO COPY
EX DE,HL EX DE,HL
; ;
@ -562,7 +562,7 @@ MD_LBA4K .DW $FFFF ; LBA OF CURRENT SECTOR
MD_FBAS .DW $FFFF ; BANK AND SECTOR MD_FBAS .DW $FFFF ; BANK AND SECTOR
#ENDIF #ENDIF
; ;
; READ RAM / ROM
; READ RAM / ROM
; ;
MD_RDSEC: MD_RDSEC:
CALL MD_IOSETUP ; SETUP FOR MEMORY COPY CALL MD_IOSETUP ; SETUP FOR MEMORY COPY
@ -744,7 +744,7 @@ MDSTR_LEN .TEXT "LEN=$"
; FLASH DRIVERS ; FLASH DRIVERS
;================================================================================================== ;==================================================================================================
; ;
; UPPER RAM BANK IS ALWAYS AVAILABLE REGARDLESS OF MEMORY BANK SELECTION.
; UPPER RAM BANK IS ALWAYS AVAILABLE REGARDLESS OF MEMORY BANK SELECTION.
; HBX_BNKSEL AND HB_CURBNK ARE ALWAYS AVAILABLE IN UPPER MEMORY. ; HBX_BNKSEL AND HB_CURBNK ARE ALWAYS AVAILABLE IN UPPER MEMORY.
; ;
; THE STACK IS IN UPPER MEMORY DURING BIOS INITIALIZATION BUT IS IN LOWER ; THE STACK IS IN UPPER MEMORY DURING BIOS INITIALIZATION BUT IS IN LOWER
@ -754,7 +754,7 @@ MDSTR_LEN .TEXT "LEN=$"
; AND THE FLASH CHIP IS SWITCHED INTO THE LOWER BANK. ; AND THE FLASH CHIP IS SWITCHED INTO THE LOWER BANK.
; ;
; EACH FLASH ROUTINE MUST FIT INTO TO THE HBX_BUF, INCLUDING IT'S LOCAL STACK WHICH ; EACH FLASH ROUTINE MUST FIT INTO TO THE HBX_BUF, INCLUDING IT'S LOCAL STACK WHICH
; IS REQUIRED FOR CALLING THE BANK SWITCH ROUTINES.
; IS REQUIRED FOR CALLING THE BANK SWITCH ROUTINES.
; ;
; INSPIRED BY WILL SOWERBUTTS FLASH4 UTILITY - https://github.com/willsowerbutts/flash4/ ; INSPIRED BY WILL SOWERBUTTS FLASH4 UTILITY - https://github.com/willsowerbutts/flash4/
; ;
@ -775,7 +775,7 @@ MD_FINIT:
CALL MD_CALCU ; DISPLAY CALL MD_CALCU ; DISPLAY
; ;
#IF (MD_FVBS==1) #IF (MD_FVBS==1)
CALL NEWLINE ; OF UNITS
CALL NEWLINE ; OF UNITS
PRTS("MD: FLASH=$") PRTS("MD: FLASH=$")
CALL PRTDECB ; CONFIGURED FOR. CALL PRTDECB ; CONFIGURED FOR.
#ENDIF #ENDIF
@ -786,14 +786,14 @@ MD_PROBE:
LD E,C ; LD E,C ;
LD H,D ; WE INCREASE E BY $08 LD H,D ; WE INCREASE E BY $08
LD L,D ; ON EACH CYCLE THROUGH LD L,D ; ON EACH CYCLE THROUGH
;
;
PUSH BC PUSH BC
#IF (MD_FVBS==1) #IF (MD_FVBS==1)
CALL PC_SPACE CALL PC_SPACE
CALL MD_CALCU CALL MD_CALCU
INC A INC A
SUB B ; PRINT SUB B ; PRINT
CALL PRTDECB ; DEVICE
CALL PRTDECB ; DEVICE
LD A,'=' ; NUMBER LD A,'=' ; NUMBER
CALL COUT CALL COUT
#ENDIF #ENDIF
@ -872,7 +872,7 @@ MD_NXT1:
CP C CP C
JR NZ,MD_NXT0 ; FIRST BYTE DOES NOT MATCH JR NZ,MD_NXT0 ; FIRST BYTE DOES NOT MATCH
; ;
INC HL
INC HL
LD A,(HL) LD A,(HL)
CP B CP B
DEC HL DEC HL
@ -903,18 +903,18 @@ MD_NXT2:
;====================================================================== ;======================================================================
; COMMON FUNCTION CALL FOR: ; COMMON FUNCTION CALL FOR:
; ;
; MD_FIDEN_R - IDENTIFY FLASH CHIP
; MD_FIDEN_R - IDENTIFY FLASH CHIP
; ON ENTRY MD_FBAS HAS BEEN SET WITH BANK AND SECTOR BEING ACCESSED ; ON ENTRY MD_FBAS HAS BEEN SET WITH BANK AND SECTOR BEING ACCESSED
; HL POINTS TO THE ROUTINE TO BE RELOCATED AND CALLED ; HL POINTS TO THE ROUTINE TO BE RELOCATED AND CALLED
; ON EXIT BC CONTAINS THE CHIP ID BYTES. ; ON EXIT BC CONTAINS THE CHIP ID BYTES.
; A NO STATUS IS RETURNED
; A NO STATUS IS RETURNED
; ;
; MD_FERAS_R - ERASE FLASH SECTOR
; MD_FERAS_R - ERASE FLASH SECTOR
; ON ENTRY MD_FBAS HAS BEEN SET WITH BANK AND SECTOR BEING ACCESSED ; ON ENTRY MD_FBAS HAS BEEN SET WITH BANK AND SECTOR BEING ACCESSED
; HL POINTS TO THE ROUTINE TO BE RELOCATED AND CALLED ; HL POINTS TO THE ROUTINE TO BE RELOCATED AND CALLED
; ON EXIT A RETURNS STATUS 0=SUCCESS NZ=FAIL ; ON EXIT A RETURNS STATUS 0=SUCCESS NZ=FAIL
; ;
; MD_FREAD_R - READ FLASH SECTOR
; MD_FREAD_R - READ FLASH SECTOR
; ON ENTRY MD_FBAS HAS BEEN SET WITH BANK AND SECTOR BEING ACCESSED ; ON ENTRY MD_FBAS HAS BEEN SET WITH BANK AND SECTOR BEING ACCESSED
; HL POINTS TO THE ROUTINE TO BE RELOCATED AND CALLED ; HL POINTS TO THE ROUTINE TO BE RELOCATED AND CALLED
; IX POINTS TO WHERE TO SAVE DATA ; IX POINTS TO WHERE TO SAVE DATA
@ -926,7 +926,7 @@ MD_NXT2:
; IX POINTS TO DATA TO COMPARE. ; IX POINTS TO DATA TO COMPARE.
; ON EXIT A RETURNS STATUS 0=SUCCESS NZ=FAIL ; ON EXIT A RETURNS STATUS 0=SUCCESS NZ=FAIL
; ;
; MD_FWRIT_R - WRITE FLASH SECTOR
; MD_FWRIT_R - WRITE FLASH SECTOR
; ON ENTRY MD_FBAS HAS BEEN SET WITH BANK AND SECTOR BEING ACCESSED ; ON ENTRY MD_FBAS HAS BEEN SET WITH BANK AND SECTOR BEING ACCESSED
; HL POINTS TO THE ROUTINE TO BE RELOCATED AND CALLED ; HL POINTS TO THE ROUTINE TO BE RELOCATED AND CALLED
; IX POINTS TO DATA TO BE WRITTEN ; IX POINTS TO DATA TO BE WRITTEN
@ -979,7 +979,7 @@ MD_FNCALL: ; USING HBX_BUF FOR CODE AREA
LD A,C ; RETURN WITH STATUS IN A LD A,C ; RETURN WITH STATUS IN A
RET ; RETURN TO MD_READF, MD_WRITEF RET ; RETURN TO MD_READF, MD_WRITEF
; ;
MD_SAVSTK .DW 0
MD_SAVSTK .DW 0
; ;
#INCLUDE "flashlib.inc" #INCLUDE "flashlib.inc"
; ;

14
Source/HBIOS/rf.asm

@ -13,7 +13,7 @@ RF_U3IO .EQU $AC ; BASED ADDRESS OF RAMFLOPPY 4
; IO PORT OFFSETS ; IO PORT OFFSETS
; ;
RF_DAT .EQU 0 ; DATA IN/OUT ONLY TO SRAM - R/W RF_DAT .EQU 0 ; DATA IN/OUT ONLY TO SRAM - R/W
RF_AL .EQU 1 ; ADDRESS LOW FOR RAMF MEMORY - W/O
RF_AL .EQU 1 ; ADDRESS LOW FOR RAMF MEMORY - W/O
RF_AH .EQU 2 ; ADDRESS HIGH FOR RAMF MEMORY - W/O RF_AH .EQU 2 ; ADDRESS HIGH FOR RAMF MEMORY - W/O
RF_ST .EQU 3 ; STATUS PORT - R/O RF_ST .EQU 3 ; STATUS PORT - R/O
; ;
@ -30,7 +30,7 @@ RF_IOAD .EQU 7 ; OFFSET OF DEVICE IO ADDRESS
#IF ($RF_DEVCNT > RF_MAXRF) #IF ($RF_DEVCNT > RF_MAXRF)
.ECHO "*** ONLY 4 RAM FLOPPY DEVICES SUPPORTED ***\n" .ECHO "*** ONLY 4 RAM FLOPPY DEVICES SUPPORTED ***\n"
RF_DEVCNT .SET RF_MAXRF
RF_DEVCNT .SET RF_MAXRF
#ENDIF #ENDIF
; ;
; DEVICE CONFIG TABLE (RAM DEVICE FIRST TO MAKE IT ALWAYS FIRST DRIVE) ; DEVICE CONFIG TABLE (RAM DEVICE FIRST TO MAKE IT ALWAYS FIRST DRIVE)
@ -97,7 +97,7 @@ RF_CFGTBL:
; ;
RF_INIT: RF_INIT:
CALL NEWLINE ; FORMATTING CALL NEWLINE ; FORMATTING
PRTS("RF:$")
PRTS("RF:$")
LD B,RF_DEVCNT ; LOOP CONTROL LD B,RF_DEVCNT ; LOOP CONTROL
LD IY,RF_CFGTBL ; START OF CFG TABLE LD IY,RF_CFGTBL ; START OF CFG TABLE
@ -113,7 +113,7 @@ RF_INIT0:
POP BC ; RESTORE BC POP BC ; RESTORE BC
DJNZ RF_INIT0 ; LOOP AS NEEDED DJNZ RF_INIT0 ; LOOP AS NEEDED
PRTS(" DEVICES=$") ; DISPLAY NUMBER
PRTS(" DEVICES=$") ; DISPLAY NUMBER
LD A,RF_DEVCNT ; OF DEVICES LD A,RF_DEVCNT ; OF DEVICES
CALL PRTDECB CALL PRTDECB
; ;
@ -123,7 +123,7 @@ RF_INIT0:
RF_UNIT: RF_UNIT:
PRTS(" IO=0x$") ; DISPLAY PRTS(" IO=0x$") ; DISPLAY
LD A,(IY+RF_IOAD) ; PORT AND LD A,(IY+RF_IOAD) ; PORT AND
CALL PRTHEXBYTE ; WRITE
CALL PRTHEXBYTE ; WRITE
PRTS(" WP=$") ; PROTECT PRTS(" WP=$") ; PROTECT
ADD A,RF_ST ; STATUS OF ADD A,RF_ST ; STATUS OF
LD C,A ; THIS DEVICE LD C,A ; THIS DEVICE
@ -198,7 +198,7 @@ RF_GEOM:
RF_DEVICE: RF_DEVICE:
LD D,DIODEV_RF ; D := DEVICE TYPE LD D,DIODEV_RF ; D := DEVICE TYPE
LD E,(IY+RF_DEV) ; E := PHYSICAL DEVICE NUMBER LD E,(IY+RF_DEV) ; E := PHYSICAL DEVICE NUMBER
LD C,%00010110 ; C := ATTRIBUTES, NON-REMOVABLE RAM FLOPPY
LD C,%00010111 ; C := ATTRIBUTES, NON-REMOVABLE RAM FLOPPY
LD H,0 ; H := 0, DRIVER HAS NO MODES LD H,0 ; H := 0, DRIVER HAS NO MODES
LD L,(IY+RF_IOAD) ; L := BASE I/O ADDRESS LD L,(IY+RF_IOAD) ; L := BASE I/O ADDRESS
XOR A ; SIGNAL SUCCESS XOR A ; SIGNAL SUCCESS
@ -345,7 +345,7 @@ RF_SETADR:
OR RF_AL ; ADDRESS TO THE OR RF_AL ; ADDRESS TO THE
LD C,A ; TO THE MSB AND LD C,A ; TO THE MSB AND
LD A,(IY+RF_LBA+0) ; LSB SECTRK LD A,(IY+RF_LBA+0) ; LSB SECTRK
OUT (C),A ; REGISTERS.
OUT (C),A ; REGISTERS.
LD A,(IY+RF_LBA+1) ; BYTE COUNTER LD A,(IY+RF_LBA+1) ; BYTE COUNTER
INC C ; IS RESET INC C ; IS RESET
OUT (C),A OUT (C),A

32
Source/HBIOS/sd.asm

@ -311,7 +311,6 @@ SD_INVCS .EQU FALSE ; INVERT CS
DEVECHO "MT" DEVECHO "MT"
#ENDIF #ENDIF
; ;
;
#IF (SDMODE == SDMODE_PIO) ; Z80 PIO #IF (SDMODE == SDMODE_PIO) ; Z80 PIO
; ;
; These mappings work for the RCbus Gluino card with an Arduino ; These mappings work for the RCbus Gluino card with an Arduino
@ -344,7 +343,6 @@ SD_INVCS .EQU TRUE ; INVERT CS
DEVECHO "PIO" DEVECHO "PIO"
#ENDIF #ENDIF
; ;
;
#IF (SDMODE == SDMODE_USR) ; USER DEFINED HARDWARE CONFIGURATION #IF (SDMODE == SDMODE_USR) ; USER DEFINED HARDWARE CONFIGURATION
; ;
; THIS MODE IS INTENDED TO ALLOW A USER TO EASILY CONFIGURE A CUSTOM ; THIS MODE IS INTENDED TO ALLOW A USER TO EASILY CONFIGURE A CUSTOM
@ -391,7 +389,8 @@ SD_INVCS .EQU TRUE ; INVERT CS
#ENDIF #ENDIF
; ;
; FOR NOW WE JUST HOOK UP ONE UNIT. THERE ARE EIGHT PORTS FOR DIFFERENT ; FOR NOW WE JUST HOOK UP ONE UNIT. THERE ARE EIGHT PORTS FOR DIFFERENT
; THINGS BUT THIS WILL GET US GOING
; THINGS BUT THIS WILL GET US GOING.
;
#IF (SDMODE == SDMODE_EPITX) ; Z180 ITX - CSIO, 82C55 for CS #IF (SDMODE == SDMODE_EPITX) ; Z180 ITX - CSIO, 82C55 for CS
SD_DEVMAX .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS) SD_DEVMAX .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_OPRREG .EQU $42 ; 82C55 PORT C, LOW 3 ARE \CS MUX SD_OPRREG .EQU $42 ; 82C55 PORT C, LOW 3 ARE \CS MUX
@ -436,6 +435,26 @@ SD_CS1 .EQU %00000010 ; SECONDARY DEVICE SELECT BIT
SD_INVCS .EQU TRUE ; INVERT CS SD_INVCS .EQU TRUE ; INVERT CS
DEVECHO "FZ80" DEVECHO "FZ80"
#ENDIF #ENDIF
;
#IF (SDMODE == SDMODE_EZ512) ; Z80 PIO ON EAZY80-512
;
; Equivalent to PIO mode, but with different port addresses
;
SD_DEVMAX .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_IOBASE .EQU $02 ; IO BASE ADDRESS FOR SD INTERFACE
SD_OPRREG .EQU SD_IOBASE ; OUTPUT PORT (OUTPUT: CS, CLK, DIN)
SD_OPRDEF .EQU %11101111 ; OUTPUT PORT DEFAULT STATE
SD_INPREG .EQU SD_IOBASE ; INPUT REGISTER
SD_CS0 .EQU %00001000 ; SELECT
SD_CLK .EQU %00010000 ; CLOCK
SD_DI .EQU %00000001 ; DATA IN (CARD <- CPU) MOSI
SD_DO .EQU %10000000 ; DATA OUT (CARD -> CPU) MISO
SD_CINIT .EQU TRUE ; INITIALIZE OUTPUT PORT
SD_DDR .EQU $03 ; DATA DIRECTION REGISTER
SD_DDRVAL .EQU %11100110 ; DATA DIRECTION REGISTER VALUE
SD_INVCS .EQU TRUE ; INVERT CS
DEVECHO "EZ512"
#ENDIF
; ;
DEVECHO ", IO=" DEVECHO ", IO="
DEVECHO SD_IOBASE DEVECHO SD_IOBASE
@ -695,6 +714,13 @@ SD_INIT:
LD A,SD_IOBASE LD A,SD_IOBASE
CALL PRTHEXBYTE CALL PRTHEXBYTE
#ENDIF #ENDIF
;
#IF (SDMODE == SDMODE_EZ512)
PRTS(" MODE=EZ512$")
PRTS(" IO=0x$")
LD A,SD_IOBASE
CALL PRTHEXBYTE
#ENDIF
; ;
CALL SD_PROBE ; CHECK FOR HARDWARE CALL SD_PROBE ; CHECK FOR HARDWARE
JR Z,SD_INIT00 ; CONTINUE IF PRESENT JR Z,SD_INIT00 ; CONTINUE IF PRESENT

2
Source/HBIOS/std.asm

@ -92,6 +92,7 @@ MM_ZRC .EQU 6 ; ZRC BANK SWITCHING
MM_MBC .EQU 7 ; MBC MEMORY MANAGER MM_MBC .EQU 7 ; MBC MEMORY MANAGER
MM_RPH .EQU 8 ; Z180 WITH RPH EXTENSIONS MM_RPH .EQU 8 ; Z180 WITH RPH EXTENSIONS
MM_MON .EQU 9 ; MONSPUTER MMU MM_MON .EQU 9 ; MONSPUTER MMU
MM_EZ512 .EQU 10 ; EZ512 BANK SWITCHING
; ;
; BOOT STYLE ; BOOT STYLE
; ;
@ -241,6 +242,7 @@ SDMODE_Z80R .EQU 12 ; Z80 Retro
SDMODE_EPITX .EQU 13 ; Mini ITX Z180 SDMODE_EPITX .EQU 13 ; Mini ITX Z180
SDMODE_FZ80 .EQU 14 ; S100 FPGA Z80 SDMODE_FZ80 .EQU 14 ; S100 FPGA Z80
SDMODE_GM .EQU 15 ; Genesis SD Driver SDMODE_GM .EQU 15 ; Genesis SD Driver
SDMODE_EZ512 .EQU 16 ; EZ512 SD
; ;
; AY SOUND CHIP MODE SELECTIONS ; AY SOUND CHIP MODE SELECTIONS
; ;

7
Source/Makefile

@ -2,12 +2,12 @@
# order is actually important, because of build dependencies # order is actually important, because of build dependencies
# #
.PHONY: doc prop shared bp images rom zrc z1rcc zzrcc zrc512 fz80
.PHONY: doc prop shared bp images rom zrc z1rcc zzrcc zrc512 fz80 ez512
.ONESHELL: .ONESHELL:
.SHELLFLAGS = -ce .SHELLFLAGS = -ce
all: prop shared bp images rom zrc z1rcc zzrcc zrc512 fz80
all: prop shared bp images rom zrc z1rcc zzrcc zrc512 fz80 ez512
doc: doc:
$(MAKE) --directory Doc $(ACTION) $(MAKE) --directory Doc $(ACTION)
@ -57,6 +57,9 @@ zrc512:
fz80: fz80:
$(MAKE) --directory FZ80 $(ACTION) $(MAKE) --directory FZ80 $(ACTION)
ez512:
$(MAKE) --directory EZ512 $(ACTION)
clean: ACTION=clean clean: ACTION=clean
clean: all clean: all

15
Source/QPM/loader.asm

@ -11,7 +11,7 @@
; THE RETROBREW COMPUTING GROUP HAS BEEN USING A CONVENTION OF PREFIXING THE ; THE RETROBREW COMPUTING GROUP HAS BEEN USING A CONVENTION OF PREFIXING THE
; OS IMAGE WITH 3 SECTORS (512 BYTES X 3 FOR A TOTAL OF 1536 BYTES): ; OS IMAGE WITH 3 SECTORS (512 BYTES X 3 FOR A TOTAL OF 1536 BYTES):
; ;
; SECTOR 1: IBM-PC STYLE BOOT BLOCK CONTAINING BOOTSTRAP,
; SECTOR 1: IBM-PC STYLE BOOT BLOCK CONTAINING BOOTSTRAP,
; PARTITION TABLE, AND BOOT SIGNATURE ; PARTITION TABLE, AND BOOT SIGNATURE
; SECTOR 2: RESERVED ; SECTOR 2: RESERVED
; SECTOR 3: METADATA ; SECTOR 3: METADATA
@ -29,6 +29,7 @@
; ;
SYS_ENT .EQU $E600 ; SYSTEM (OS) ENTRY POINT ADDRESS SYS_ENT .EQU $E600 ; SYSTEM (OS) ENTRY POINT ADDRESS
SYS_LOC .EQU $D000 ; STARTING ADDRESS TO LOAD SYSTEM IMAGE SYS_LOC .EQU $D000 ; STARTING ADDRESS TO LOAD SYSTEM IMAGE
SYS_SEC .EQU 22 ; NUMBER OF SECTORS TO READ
SYS_END .EQU $FE00 ; ENDING ADDRESS OF SYSTEM IMAGE SYS_END .EQU $FE00 ; ENDING ADDRESS OF SYSTEM IMAGE
; ;
SEC_SIZE .EQU 512 ; DISK SECTOR SIZE SEC_SIZE .EQU 512 ; DISK SECTOR SIZE
@ -76,8 +77,8 @@ BOOT:
CALL PRTDOT ; PROGRESS CALL PRTDOT ; PROGRESS
; ;
LD C,$42 ; UNA FUNC: READ SECTORS LD C,$42 ; UNA FUNC: READ SECTORS
LD DE,$D000 ; STARTING ADDRESS FOR IMAGE
LD L,22 ; READ 22 SECTORS
LD DE,SYS_LOC ; STARTING ADDRESS FOR IMAGE
LD L,SYS_SEC ; NUMBER OF SECTORS
CALL $FFFD ; DO READ CALL $FFFD ; DO READ
JR NZ,ERROR ; HANDLE ERROR JR NZ,ERROR ; HANDLE ERROR
CALL PRTDOT ; PROGRESS CALL PRTDOT ; PROGRESS
@ -147,10 +148,10 @@ HEXASCII:
HEXCONV: HEXCONV:
AND $0F ;LOW NIBBLE ONLY AND $0F ;LOW NIBBLE ONLY
ADD A,$90 ADD A,$90
DAA
DAA
ADC A,$40 ADC A,$40
DAA
RET
DAA
RET
; ;
ERROR: ERROR:
LD DE,STR_ERR ; POINT TO ERROR STRING LD DE,STR_ERR ; POINT TO ERROR STRING
@ -252,7 +253,7 @@ PR_SIG .DB $5A,$A5 ; SIGNATURE GOES HERE
PR_WP .DB 0 ; (1) WRITE PROTECT BOOLEAN PR_WP .DB 0 ; (1) WRITE PROTECT BOOLEAN
PR_UPDSEQ .DW 0 ; (2) PREFIX UPDATE SEQUENCE NUMBER (DEPRECATED?) PR_UPDSEQ .DW 0 ; (2) PREFIX UPDATE SEQUENCE NUMBER (DEPRECATED?)
PR_VER .DB RMJ,RMN,RUP,RTP ; (4) OS BUILD VERSION PR_VER .DB RMJ,RMN,RUP,RTP ; (4) OS BUILD VERSION
PR_LABEL .DB "Unlabeled$$$$$$$","$" ; (17) DISK LABEL (EXACTLY 16 BYTES!!!)
PR_LABEL .DB "QP/M 2.7$$$$$$$$","$" ; (17) DISK LABEL (EXACTLY 16 BYTES!!!)
.DW 0 ; (2) DEPRECATED .DW 0 ; (2) DEPRECATED
PR_LDLOC .DW SYS_LOC ; (2) ADDRESS TO START LOADING SYSTEM PR_LDLOC .DW SYS_LOC ; (2) ADDRESS TO START LOADING SYSTEM
PR_LDEND .DW SYS_END ; (2) ADDRESS TO STOP LOADING SYSTEM PR_LDEND .DW SYS_END ; (2) ADDRESS TO STOP LOADING SYSTEM

17
Source/ZPM3/loader.asm

@ -11,7 +11,7 @@
; THE RETROBREW COMPUTING GROUP HAS BEEN USING A CONVENTION OF PREFIXING THE ; THE RETROBREW COMPUTING GROUP HAS BEEN USING A CONVENTION OF PREFIXING THE
; OS IMAGE WITH 3 SECTORS (512 BYTES X 3 FOR A TOTAL OF 1536 BYTES): ; OS IMAGE WITH 3 SECTORS (512 BYTES X 3 FOR A TOTAL OF 1536 BYTES):
; ;
; SECTOR 1: IBM-PC STYLE BOOT BLOCK CONTAINING BOOTSTRAP,
; SECTOR 1: IBM-PC STYLE BOOT BLOCK CONTAINING BOOTSTRAP,
; PARTITION TABLE, AND BOOT SIGNATURE ; PARTITION TABLE, AND BOOT SIGNATURE
; SECTOR 2: RESERVED ; SECTOR 2: RESERVED
; SECTOR 3: METADATA ; SECTOR 3: METADATA
@ -31,6 +31,7 @@
; THE SIZE OF ZPMLDR.BIN CHANGES, SYS_SIZ MUST BE UPDATED!!! ; THE SIZE OF ZPMLDR.BIN CHANGES, SYS_SIZ MUST BE UPDATED!!!
; ;
SYS_SIZ .EQU $0F00 ; SIZE OF CPMLDR.BIN SYS_SIZ .EQU $0F00 ; SIZE OF CPMLDR.BIN
SYS_SEC .EQU 8 ; NUMBER OF SECTORS TO READ
SYS_ENT .EQU $0100 ; SYSTEM (OS) ENTRY POINT ADDRESS SYS_ENT .EQU $0100 ; SYSTEM (OS) ENTRY POINT ADDRESS
SYS_LOC .EQU $0100 ; STARTING ADDRESS TO LOAD SYSTEM IMAGE SYS_LOC .EQU $0100 ; STARTING ADDRESS TO LOAD SYSTEM IMAGE
SYS_END .EQU SYS_SIZ + SYS_LOC ; ENDING ADDRESS OF SYSTEM IMAGE SYS_END .EQU SYS_SIZ + SYS_LOC ; ENDING ADDRESS OF SYSTEM IMAGE
@ -57,6 +58,8 @@ PT_SIZ .EQU $40
; THE FOLLOWING BOOTSTRAP CODE IS BUILT TO ASSUME IT WILL BE EXECUTED AT A STARTING ; THE FOLLOWING BOOTSTRAP CODE IS BUILT TO ASSUME IT WILL BE EXECUTED AT A STARTING
; ADDRESS OF $8000. THIS CODE IS *ONLY* FOR UNA. THE ROMWBW ROM BOOTLOADER ; ADDRESS OF $8000. THIS CODE IS *ONLY* FOR UNA. THE ROMWBW ROM BOOTLOADER
; USES THE METADATA TO LOAD THE OS DIRECTLY. ; USES THE METADATA TO LOAD THE OS DIRECTLY.
;
; UNA DOS NOT SUPPORT ZPM3 THIS CODE IS NOT USED, AND COULD BE REMOVED
; ;
.ORG $8000 .ORG $8000
JR BOOT JR BOOT
@ -80,8 +83,8 @@ BOOT:
CALL PRTDOT ; PROGRESS CALL PRTDOT ; PROGRESS
; ;
LD C,$42 ; UNA FUNC: READ SECTORS LD C,$42 ; UNA FUNC: READ SECTORS
LD DE,$D000 ; STARTING ADDRESS FOR IMAGE
LD L,22 ; READ 22 SECTORS
LD DE,SYS_LOC ; STARTING ADDRESS FOR IMAGE
LD L,SYS_SEC ; NUMBER OF SECTORS
CALL $FFFD ; DO READ CALL $FFFD ; DO READ
JR NZ,ERROR ; HANDLE ERROR JR NZ,ERROR ; HANDLE ERROR
CALL PRTDOT ; PROGRESS CALL PRTDOT ; PROGRESS
@ -151,10 +154,10 @@ HEXASCII:
HEXCONV: HEXCONV:
AND $0F ;LOW NIBBLE ONLY AND $0F ;LOW NIBBLE ONLY
ADD A,$90 ADD A,$90
DAA
DAA
ADC A,$40 ADC A,$40
DAA
RET
DAA
RET
; ;
ERROR: ERROR:
LD DE,STR_ERR ; POINT TO ERROR STRING LD DE,STR_ERR ; POINT TO ERROR STRING
@ -256,7 +259,7 @@ PR_SIG .DB $5A,$A5 ; SIGNATURE GOES HERE
PR_WP .DB 0 ; (1) WRITE PROTECT BOOLEAN PR_WP .DB 0 ; (1) WRITE PROTECT BOOLEAN
PR_UPDSEQ .DW 0 ; (2) PREFIX UPDATE SEQUENCE NUMBER (DEPRECATED?) PR_UPDSEQ .DW 0 ; (2) PREFIX UPDATE SEQUENCE NUMBER (DEPRECATED?)
PR_VER .DB RMJ,RMN,RUP,RTP ; (4) OS BUILD VERSION PR_VER .DB RMJ,RMN,RUP,RTP ; (4) OS BUILD VERSION
PR_LABEL .DB "Unlabeled$$$$$$$","$" ; (17) DISK LABEL (EXACTLY 16 BYTES!!!)
PR_LABEL .DB "ZPM 3$$$$$$$$$$$","$" ; (17) DISK LABEL (EXACTLY 16 BYTES!!!)
.DW 0 ; (2) DEPRECATED .DW 0 ; (2) DEPRECATED
PR_LDLOC .DW SYS_LOC ; (2) ADDRESS TO START LOADING SYSTEM PR_LDLOC .DW SYS_LOC ; (2) ADDRESS TO START LOADING SYSTEM
PR_LDEND .DW SYS_END ; (2) ADDRESS TO STOP LOADING SYSTEM PR_LDEND .DW SYS_END ; (2) ADDRESS TO STOP LOADING SYSTEM

15
Source/ZSDOS/loader.asm

@ -11,7 +11,7 @@
; THE RETROBREW COMPUTING GROUP HAS BEEN USING A CONVENTION OF PREFIXING THE ; THE RETROBREW COMPUTING GROUP HAS BEEN USING A CONVENTION OF PREFIXING THE
; OS IMAGE WITH 3 SECTORS (512 BYTES X 3 FOR A TOTAL OF 1536 BYTES): ; OS IMAGE WITH 3 SECTORS (512 BYTES X 3 FOR A TOTAL OF 1536 BYTES):
; ;
; SECTOR 1: IBM-PC STYLE BOOT BLOCK CONTAINING BOOTSTRAP,
; SECTOR 1: IBM-PC STYLE BOOT BLOCK CONTAINING BOOTSTRAP,
; PARTITION TABLE, AND BOOT SIGNATURE ; PARTITION TABLE, AND BOOT SIGNATURE
; SECTOR 2: RESERVED ; SECTOR 2: RESERVED
; SECTOR 3: METADATA ; SECTOR 3: METADATA
@ -29,6 +29,7 @@
; ;
SYS_ENT .EQU $E600 ; SYSTEM (OS) ENTRY POINT ADDRESS SYS_ENT .EQU $E600 ; SYSTEM (OS) ENTRY POINT ADDRESS
SYS_LOC .EQU $D000 ; STARTING ADDRESS TO LOAD SYSTEM IMAGE SYS_LOC .EQU $D000 ; STARTING ADDRESS TO LOAD SYSTEM IMAGE
SYS_SEC .EQU 22 ; NUMBER OF SECTORS TO READ
SYS_END .EQU $FE00 ; ENDING ADDRESS OF SYSTEM IMAGE SYS_END .EQU $FE00 ; ENDING ADDRESS OF SYSTEM IMAGE
; ;
SEC_SIZE .EQU 512 ; DISK SECTOR SIZE SEC_SIZE .EQU 512 ; DISK SECTOR SIZE
@ -76,8 +77,8 @@ BOOT:
CALL PRTDOT ; PROGRESS CALL PRTDOT ; PROGRESS
; ;
LD C,$42 ; UNA FUNC: READ SECTORS LD C,$42 ; UNA FUNC: READ SECTORS
LD DE,$D000 ; STARTING ADDRESS FOR IMAGE
LD L,22 ; READ 22 SECTORS
LD DE,SYS_LOC ; STARTING ADDRESS FOR IMAGE
LD L,SYS_SEC ; NUMBER OF SECTORS
CALL $FFFD ; DO READ CALL $FFFD ; DO READ
JR NZ,ERROR ; HANDLE ERROR JR NZ,ERROR ; HANDLE ERROR
CALL PRTDOT ; PROGRESS CALL PRTDOT ; PROGRESS
@ -147,10 +148,10 @@ HEXASCII:
HEXCONV: HEXCONV:
AND $0F ;LOW NIBBLE ONLY AND $0F ;LOW NIBBLE ONLY
ADD A,$90 ADD A,$90
DAA
DAA
ADC A,$40 ADC A,$40
DAA
RET
DAA
RET
; ;
ERROR: ERROR:
LD DE,STR_ERR ; POINT TO ERROR STRING LD DE,STR_ERR ; POINT TO ERROR STRING
@ -252,7 +253,7 @@ PR_SIG .DB $5A,$A5 ; SIGNATURE GOES HERE
PR_WP .DB 0 ; (1) WRITE PROTECT BOOLEAN PR_WP .DB 0 ; (1) WRITE PROTECT BOOLEAN
PR_UPDSEQ .DW 0 ; (2) PREFIX UPDATE SEQUENCE NUMBER (DEPRECATED?) PR_UPDSEQ .DW 0 ; (2) PREFIX UPDATE SEQUENCE NUMBER (DEPRECATED?)
PR_VER .DB RMJ,RMN,RUP,RTP ; (4) OS BUILD VERSION PR_VER .DB RMJ,RMN,RUP,RTP ; (4) OS BUILD VERSION
PR_LABEL .DB "Unlabeled$$$$$$$","$" ; (17) DISK LABEL (EXACTLY 16 BYTES!!!)
PR_LABEL .DB "ZSDOS 1.1$$$$$$$","$" ; (17) DISK LABEL (EXACTLY 16 BYTES!!!)
.DW 0 ; (2) DEPRECATED .DW 0 ; (2) DEPRECATED
PR_LDLOC .DW SYS_LOC ; (2) ADDRESS TO START LOADING SYSTEM PR_LDLOC .DW SYS_LOC ; (2) ADDRESS TO START LOADING SYSTEM
PR_LDEND .DW SYS_END ; (2) ADDRESS TO STOP LOADING SYSTEM PR_LDEND .DW SYS_END ; (2) ADDRESS TO STOP LOADING SYSTEM

2
Source/ver.inc

@ -2,7 +2,7 @@
#DEFINE RMN 5 #DEFINE RMN 5
#DEFINE RUP 0 #DEFINE RUP 0
#DEFINE RTP 0 #DEFINE RTP 0
#DEFINE BIOSVER "3.5.0-dev.100"
#DEFINE BIOSVER "3.5.0-dev.101"
#define rmj RMJ #define rmj RMJ
#define rmn RMN #define rmn RMN
#define rup RUP #define rup RUP

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 5
rup equ 0 rup equ 0
rtp equ 0 rtp equ 0
biosver macro biosver macro
db "3.5.0-dev.100"
db "3.5.0-dev.101"
endm endm

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