Merge pull request #2 from wwarthen/dev

DMA Driver Speed Handling

Binary/Apps/Clean.cmd

@@ -7,5 +7,6 @@ if exist *.doc del *.doc
 if exist *.hlp del *.hlp
 if exist Tunes\*.pt? del Tunes\*.pt?
 if exist Tunes\*.mym del Tunes\*.mym
+if exist Tunes\*.vgm del Tunes\*.vgm
 
 pushd Test && call Clean || exit /b 1 & popd

Source/HBIOS/Config/MBC_std.asm

@@ -29,6 +29,8 @@
 ;
 BATCOND		.SET	FALSE
 ;
+CPUSPDDEF	.SET	SPD_LOW		; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
+;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 ;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/cfg_mbc.asm

@@ -23,8 +23,8 @@ TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 ;
-CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
-CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
+CPUSPDCAP	.EQU	SPD_HILO	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_LOW		; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)

Source/HBIOS/dma.asm

@@ -29,23 +29,31 @@ DMA_RDY				.EQU	%00001000
 DMA_FORCE			.EQU	0
 
 #IF (DMA_USEHS & (DMAMODE=DMAMODE_MBC))
-#IF (CPUSPDDEF=SPD_HIGH)
-#DEFINE DMAIOSLO LD A,(HB_RTCVAL) \ AND %11110111 \ OUT (RTCIO),A 
-#DEFINE DMAIONOR PUSH AF \ LD A,(HB_RTCVAL) \ OR %00001000 \ OUT (RTCIO),A \ POP AF
-#ELSE
-#DEFINE DMAIOSLO \;
-#DEFINE DMAIONOR \;
-#ENDIF
+;;;#IF (CPUSPDDEF=SPD_HIGH)
+;;;#DEFINE DMAIOSLO LD A,(HB_RTCVAL) \ AND %11110111 \ OUT (RTCIO),A 
+;;;#DEFINE DMAIONOR PUSH AF \ LD A,(HB_RTCVAL) \ OR %00001000 \ OUT (RTCIO),A \ POP AF
+;;;#ELSE
+;;;#DEFINE DMAIOSLO \;
+;;;#DEFINE DMAIONOR \;
+;;;#ENDIF
+
+#DEFINE DMAIOSLO LD A,(HB_RTCVAL) \ AND ~%00001000 \ OUT (RTCIO),A
+#DEFINE DMAIONOR PUSH AF \ LD A,(HB_RTCVAL) \ OUT (RTCIO),A \ POP AF
+
 #ENDIF
 ;
 #IF (DMA_USEHS & (DMAMODE=DMAMODE_ECB))
-#IF (CPUSPDDEF=SPD_HIGH)
-#DEFINE DMAIOSLO LD A,(HB_RTCVAL) \ OR  %00001000 \ OUT (RTCIO),A 
-#DEFINE DMAIONOR PUSH AF \ LD A,(HB_RTCVAL) \ AND %11110111 \ OUT (RTCIO),A \ POP AF
-#ELSE
-#DEFINE DMAIOSLO \;
-#DEFINE DMAIONOR \;
-#ENDIF
+;;;#IF (CPUSPDDEF=SPD_HIGH)
+;;;#DEFINE DMAIOSLO LD A,(HB_RTCVAL) \ OR  %00001000 \ OUT (RTCIO),A 
+;;;#DEFINE DMAIONOR PUSH AF \ LD A,(HB_RTCVAL) \ AND %11110111 \ OUT (RTCIO),A \ POP AF
+;;;#ELSE
+;;;#DEFINE DMAIOSLO \;
+;;;#DEFINE DMAIONOR \;
+;;;#ENDIF
+
+#DEFINE DMAIOSLO LD A,(HB_RTCVAL) \ OR %00001000 \ OUT (RTCIO),A 
+#DEFINE DMAIONOR PUSH AF \ LD A,(HB_RTCVAL) \ OUT (RTCIO),A \ POP AF
+
 #ENDIF
 
 #IF (!DMA_USEHS)

Source/HBIOS/hbios.asm

@@ -187,17 +187,17 @@ RTCDEF		.EQU	0		; ALLOWS DRIVERS TO SET BITS
 RTCDEF		.SET	RTCDEF | %00000001	; SC128 I2C SCL BIT
 #ENDIF
 ;
-#IF (!(CPUSPDCAP==SPD_FIXED) & (PLATFORM==PLT_MBC))
+#IF ((CPUSPDCAP==SPD_HILO) & (PLATFORM==PLT_MBC))
 #IF (CPUSPDDEF==SPD_HIGH)
 RTCDEF		.SET	RTCDEF | %00001000	; DEFAULT SPEED HIGH
 #ELSE
-RTCDEF		.SET	RTCDEF & %11110111	; DEFAULT SPEED LOW
+RTCDEF		.SET	RTCDEF & ~%00001000	; DEFAULT SPEED LOW
 #ENDIF
 #ENDIF
 ;
-#IF (!(CPUSPDCAP==SPD_FIXED) & (PLATFORM==PLT_SBC))
+#IF ((CPUSPDCAP==SPD_HILO) & (PLATFORM==PLT_SBC))
 #IF (CPUSPDDEF==SPD_HIGH)
-RTCDEF		.SET	RTCDEF & %11110111	; DEFAULT SPEED HIGH
+RTCDEF		.SET	RTCDEF & ~%00001000	; DEFAULT SPEED HIGH
 #ELSE
 RTCDEF		.SET	RTCDEF | %00001000	; DEFAULT SPEED LOW
 #ENDIF

Source/ver.inc

@@ -2,4 +2,4 @@
 #DEFINE	RMN	1
 #DEFINE	RUP	1
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.1.1-pre.138"
+#DEFINE BIOSVER	"3.1.1-pre.140"

Source/ver.lib

@@ -3,5 +3,5 @@ rmn	equ	1
 rup	equ	1
 rtp	equ	0
 biosver	macro
-	db	"3.1.1-pre.138"
+	db	"3.1.1-pre.140"
 	endm