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Create RCZ80_kio.asm
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50
Source/HBIOS/Config/RCZ80_kio.asm
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50
Source/HBIOS/Config/RCZ80_kio.asm
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;
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;==================================================================================================
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; RC2014 Z80 STANDARD CONFIGURATION W/ KIO
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;==================================================================================================
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;
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; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
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; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
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; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
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; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
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; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
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; YOUR FILE IN THE BUILD PROCESS.
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;
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; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
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; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
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; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
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; SETTINGS.
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;
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; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
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; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
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; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
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;
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; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
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; DIRECTORIES ABOVE THIS ONE).
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;
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#include "cfg_rcz80.asm"
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;
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CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
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INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
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DEFSERCFG .SET SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
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;
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KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT
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;
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CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT
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CTCBASE .SET KIOBASE+$04 ; CTC BASE I/O ADDRESS
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;
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DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
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;
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ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
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SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
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SIOCNT .SET 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
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SIO0MODE .SET SIOMODE_EZZ80 ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80]
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SIO0BASE .SET KIOBASE+$08 ; SIO 0: REGISTERS BASE ADR
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;
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FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
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FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
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;
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IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
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IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
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;
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PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
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