From 22217bd4840dee4e4811e91733100f44f838e2e3 Mon Sep 17 00:00:00 2001
From: Wayne Warthen <wwarthen@gmail.com>
Date: Tue, 9 Dec 2025 17:20:14 -0800
Subject: [PATCH] Enhance DLPSER Driver for Multiple Devices

---
 Doc/RomWBW Applications.pdf       | Bin 413850 -> 413851 bytes
 Doc/RomWBW Disk Catalog.pdf       | Bin 257563 -> 257563 bytes
 Doc/RomWBW Hardware.pdf           | Bin 388284 -> 388275 bytes
 Doc/RomWBW Introduction.pdf       | Bin 96448 -> 96448 bytes
 Doc/RomWBW System Guide.pdf       | Bin 633847 -> 633849 bytes
 Doc/RomWBW User Guide.pdf         | Bin 572566 -> 572567 bytes
 ReadMe.md                         |   2 +-
 ReadMe.txt                        |   2 +-
 Source/Doc/Hardware.md            |  10 +-
 Source/HBIOS/Config/SZ180_std.asm |   5 +-
 Source/HBIOS/Config/SZ80_std.asm  |   7 +-
 Source/HBIOS/Config/SZ80_t35.asm  |   5 +-
 Source/HBIOS/cfg_DUO.asm          |   3 +-
 Source/HBIOS/cfg_DYNO.asm         |   3 +-
 Source/HBIOS/cfg_EPITX.asm        |   3 +-
 Source/HBIOS/cfg_EZZ80.asm        |   3 +-
 Source/HBIOS/cfg_GMZ180.asm       |   3 +-
 Source/HBIOS/cfg_HEATH.asm        |   3 +-
 Source/HBIOS/cfg_MASTER.asm       |   8 +-
 Source/HBIOS/cfg_MBC.asm          |   3 +-
 Source/HBIOS/cfg_MK4.asm          |   3 +-
 Source/HBIOS/cfg_MON.asm          |   3 +-
 Source/HBIOS/cfg_MSX.asm          |   3 +-
 Source/HBIOS/cfg_N8.asm           |   3 +-
 Source/HBIOS/cfg_N8PC.asm         |   3 +-
 Source/HBIOS/cfg_NABU.asm         |   3 +-
 Source/HBIOS/cfg_RCEZ80.asm       |   3 +-
 Source/HBIOS/cfg_RCZ180.asm       |   3 +-
 Source/HBIOS/cfg_RCZ280.asm       |   3 +-
 Source/HBIOS/cfg_RCZ80.asm        |   3 +-
 Source/HBIOS/cfg_RPH.asm          |   3 +-
 Source/HBIOS/cfg_SBC.asm          |   3 +-
 Source/HBIOS/cfg_SCZ180.asm       |   3 +-
 Source/HBIOS/cfg_SZ180.asm        |   8 +-
 Source/HBIOS/cfg_SZ80.asm         |   8 +-
 Source/HBIOS/cfg_Z80RETRO.asm     |   2 +
 Source/HBIOS/cfg_ZETA.asm         |   2 +
 Source/HBIOS/cfg_ZETA2.asm        |   2 +
 Source/HBIOS/dlpser.asm           | 275 ++++++++++++++++++++++++++++++
 Source/HBIOS/hbios.asm            |  90 ++++++++--
 Source/HBIOS/hbios.inc            |   2 +-
 Source/HBIOS/invntdev.asm         |   2 +-
 Source/HBIOS/pldser.asm           | 176 -------------------
 Source/ver.inc                    |   2 +-
 Source/ver.lib                    |   2 +-
 45 files changed, 420 insertions(+), 250 deletions(-)
 create mode 100644 Source/HBIOS/dlpser.asm
 delete mode 100644 Source/HBIOS/pldser.asm

diff --git a/Doc/RomWBW Applications.pdf b/Doc/RomWBW Applications.pdf
index 5e56d5167ead9e7277bc2d86960e46c21281b06f..a225010b0f07cb66d468ba9f8b086d0d9ac64291 100644
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diff --git a/Doc/RomWBW Disk Catalog.pdf b/Doc/RomWBW Disk Catalog.pdf
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diff --git a/Doc/RomWBW Hardware.pdf b/Doc/RomWBW Hardware.pdf
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diff --git a/Doc/RomWBW Introduction.pdf b/Doc/RomWBW Introduction.pdf
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diff --git a/Doc/RomWBW System Guide.pdf b/Doc/RomWBW System Guide.pdf
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diff --git a/Doc/RomWBW User Guide.pdf b/Doc/RomWBW User Guide.pdf
index 250ae4aa97ce58df019170693628bbecf75c2cf2..8da07e31204299b21de9aba3fbc5a4d7d01a8049 100644
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diff --git a/ReadMe.md b/ReadMe.md
index 397a72b1..8370ef81 100644
--- a/ReadMe.md
+++ b/ReadMe.md
@@ -7,7 +7,7 @@
 **RomWBW Introduction** \
 Version 3.6 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-07 Dec 2025
+09 Dec 2025
 
 # Overview
 
diff --git a/ReadMe.txt b/ReadMe.txt
index 98f7a0b1..5d155098 100644
--- a/ReadMe.txt
+++ b/ReadMe.txt
@@ -1,6 +1,6 @@
 RomWBW Introduction
 Wayne Warthen (wwarthen@gmail.com)
-07 Dec 2025
+09 Dec 2025
 
 
 
diff --git a/Source/Doc/Hardware.md b/Source/Doc/Hardware.md
index 1f814aca..350d933d 100644
--- a/Source/Doc/Hardware.md
+++ b/Source/Doc/Hardware.md
@@ -444,7 +444,7 @@ Z80-based S100 Modular System
 #### Supported Hardware
 
 - FP: LEDIO=5
-- PLDSER: IO=172
+- DLPSER: IO=172
 - SCC MODE=SZ80, IO=160, CHANNEL A
 - SCC MODE=SZ80, IO=160, CHANNEL B
 - SCON: IO=0
@@ -495,7 +495,7 @@ A T35 FPGA Z80 based S100 SBC
 - FP: LEDIO=255
 - DS5RTC: RTCIO=104, IO=104
 - TSER: IO=53
-- PLDSER: IO=172
+- DLPSER: IO=172
 - SCC MODE=SZ80, IO=160, CHANNEL A
 - SCC MODE=SZ80, IO=160, CHANNEL B
 - LPT: MODE=T35, IO=199
@@ -1955,7 +1955,7 @@ as defined by the IEEE-696 specs.
 #### Supported Hardware
 
 - INTRTC: ENABLED
-- PLDSER: IO=172
+- DLPSER: IO=172
 - ASCI: IO=192, INTERRUPTS ENABLED
 - ASCI: IO=193, INTERRUPTS ENABLED
 - SCC MODE=SZ80, IO=160, CHANNEL A
@@ -2435,7 +2435,7 @@ may be discovered by RomWBW in your system.
 | SCC       | Zilog Serial Communications Controller (SCC)           |
 | SSER      | Simple Serial Interface                                |
 | TSER      | Trion FPGA Serial Interface                            |
-| PLDSER    | PLD USB Serial Interface                               |
+| DLPSER    | DLP USB Serial Interface                               |
 | UART      | 16C550 Family Serial Interface                         |
 | USB-FIFO  | FT232H-based ECB USB FIFO                              |
 | Z2U       | Zilog Z280 CPU Built-in Serial Ports                   |
@@ -2455,7 +2455,7 @@ the active platform and configuration.
 #. ACIA: MC68B50 Asynchronous Communications Interface Adapter
 #. SSER: Simple Serial Interface
 #. TSER: Trion FPGA Serial Interface
-#. PLDSER: PLD USB Serial Interface
+#. DLPSER: DLP USB Serial Interface
 #. USB-FIFO: FT232H-based ECB USB FIFO
 
 
diff --git a/Source/HBIOS/Config/SZ180_std.asm b/Source/HBIOS/Config/SZ180_std.asm
index 5fcaae20..57c31064 100644
--- a/Source/HBIOS/Config/SZ180_std.asm
+++ b/Source/HBIOS/Config/SZ180_std.asm
@@ -62,7 +62,10 @@ MMRTCENABLE	.SET	TRUE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 DS12RTCENABLE	.SET	TRUE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
 ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
-PLDSERENABLE	.SET	TRUE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
+DLPSERENABLE	.SET	TRUE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
+DLPSERCNT	.SET	1		; DLPSER: NUMBER OF DEVICES TO DETECT (1-2)
+DLPSER0STAT	.SET	$AA		; DLPSER1: STATUS PORT ADDRESS
+DLPSER0DATA	.SET	$AC		; DLPSER1: DATA PORT ADDRESS
 SCCENABLE	.SET	TRUE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 SCC0ACFG	.SET	SER_19200_8N1	; SCC 0A: SERIAL LINE CONFIG
 SCC0BCFG	.SET	SER_19200_8N1	; SCC 0B: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/Config/SZ80_std.asm b/Source/HBIOS/Config/SZ80_std.asm
index 2fe89c63..c7e6a62f 100644
--- a/Source/HBIOS/Config/SZ80_std.asm
+++ b/Source/HBIOS/Config/SZ80_std.asm
@@ -58,7 +58,12 @@ FPLED_IO	.SET	$05		; FP: PORT ADDRESS FOR FP LEDS
 MMRTCENABLE	.SET	TRUE		; MMRTC: ENABLE NS MM58167B RTC DRIVER (MMRTC.ASM)
 DS12RTCENABLE	.SET	TRUE		; DS12RTC: ENABLE DS1288X RTC DRIVER (DS12RTC.ASM)
 ;
-PLDSERENABLE	.SET	TRUE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
+DLPSERENABLE	.SET	TRUE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
+DLPSERCNT	.SET	2		; DLPSER: NUMBER OF DEVICES TO DETECT (1-2)
+DLPSER0STAT	.SET	$E8		; DLPSER0: STATUS PORT ADDRESS
+DLPSER0DATA	.SET	$E9		; DLPSER0: DATA PORT ADDRESS
+DLPSER1STAT	.SET	$AA		; DLPSER1: STATUS PORT ADDRESS
+DLPSER1DATA	.SET	$AC		; DLPSER1: DATA PORT ADDRESS
 SCCENABLE	.SET	TRUE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 SCONENABLE	.SET	TRUE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
diff --git a/Source/HBIOS/Config/SZ80_t35.asm b/Source/HBIOS/Config/SZ80_t35.asm
index 564abd78..fffe50e4 100644
--- a/Source/HBIOS/Config/SZ80_t35.asm
+++ b/Source/HBIOS/Config/SZ80_t35.asm
@@ -57,7 +57,10 @@ FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 ;
 DS5RTCENABLE	.SET	TRUE		; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
 ;
-PLDSERENABLE	.SET	TRUE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
+DLPSERENABLE	.SET	TRUE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
+DLPSERCNT	.SET	1		; DLPSER: NUMBER OF DEVICES TO DETECT (1-2)
+DLPSER0STAT	.SET	$AA		; DLPSER1: STATUS PORT ADDRESS
+DLPSER0DATA	.SET	$AC		; DLPSER1: DATA PORT ADDRESS
 TSERENABLE	.SET	TRUE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 SCCENABLE	.SET	TRUE		; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM)
 SCONENABLE	.SET	TRUE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
diff --git a/Source/HBIOS/cfg_DUO.asm b/Source/HBIOS/cfg_DUO.asm
index 66925847..8312eaeb 100644
--- a/Source/HBIOS/cfg_DUO.asm
+++ b/Source/HBIOS/cfg_DUO.asm
@@ -186,8 +186,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_DYNO.asm b/Source/HBIOS/cfg_DYNO.asm
index de27ee41..5fa40dc9 100644
--- a/Source/HBIOS/cfg_DYNO.asm
+++ b/Source/HBIOS/cfg_DYNO.asm
@@ -185,8 +185,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_EPITX.asm b/Source/HBIOS/cfg_EPITX.asm
index 605fb221..311d7423 100644
--- a/Source/HBIOS/cfg_EPITX.asm
+++ b/Source/HBIOS/cfg_EPITX.asm
@@ -181,8 +181,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_EZZ80.asm b/Source/HBIOS/cfg_EZZ80.asm
index 49841abe..78c91ac7 100644
--- a/Source/HBIOS/cfg_EZZ80.asm
+++ b/Source/HBIOS/cfg_EZZ80.asm
@@ -185,8 +185,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_GMZ180.asm b/Source/HBIOS/cfg_GMZ180.asm
index 97ed8e6b..b5565571 100644
--- a/Source/HBIOS/cfg_GMZ180.asm
+++ b/Source/HBIOS/cfg_GMZ180.asm
@@ -180,8 +180,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_HEATH.asm b/Source/HBIOS/cfg_HEATH.asm
index 630c0987..79dd9373 100644
--- a/Source/HBIOS/cfg_HEATH.asm
+++ b/Source/HBIOS/cfg_HEATH.asm
@@ -185,8 +185,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_MASTER.asm b/Source/HBIOS/cfg_MASTER.asm
index cedaa636..c30cdf2e 100644
--- a/Source/HBIOS/cfg_MASTER.asm
+++ b/Source/HBIOS/cfg_MASTER.asm
@@ -224,8 +224,12 @@ SSERIINV	.EQU	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.EQU	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.EQU	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.EQU	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.EQU	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.EQU	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
+DLPSERCNT	.EQU	1		; DLPSER: NUMBER OF DEVICES TO DETECT (1-2)
+DLPSER0STAT	.EQU	$FF		; DLPSER0: STATUS PORT ADDRESS
+DLPSER0DATA	.EQU	$FF		; DLPSER0: DATA PORT ADDRESS
+DLPSER1STAT	.EQU	$FF		; DLPSER1: STATUS PORT ADDRESS
+DLPSER1DATA	.EQU	$FF		; DLPSER1: DATA PORT ADDRESS
 ;
 TSERENABLE	.EQU	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.EQU	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_MBC.asm b/Source/HBIOS/cfg_MBC.asm
index a4c0feec..7d3dfedb 100644
--- a/Source/HBIOS/cfg_MBC.asm
+++ b/Source/HBIOS/cfg_MBC.asm
@@ -179,8 +179,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_MK4.asm b/Source/HBIOS/cfg_MK4.asm
index 9a645e66..ce9b0170 100644
--- a/Source/HBIOS/cfg_MK4.asm
+++ b/Source/HBIOS/cfg_MK4.asm
@@ -185,8 +185,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_MON.asm b/Source/HBIOS/cfg_MON.asm
index 4bde4934..1dc2529b 100644
--- a/Source/HBIOS/cfg_MON.asm
+++ b/Source/HBIOS/cfg_MON.asm
@@ -182,8 +182,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_MSX.asm b/Source/HBIOS/cfg_MSX.asm
index c8407895..fee0e2c8 100644
--- a/Source/HBIOS/cfg_MSX.asm
+++ b/Source/HBIOS/cfg_MSX.asm
@@ -188,8 +188,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_N8.asm b/Source/HBIOS/cfg_N8.asm
index c0de0dc0..56a491f1 100644
--- a/Source/HBIOS/cfg_N8.asm
+++ b/Source/HBIOS/cfg_N8.asm
@@ -187,8 +187,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_N8PC.asm b/Source/HBIOS/cfg_N8PC.asm
index 685bd99b..ebd5ce58 100644
--- a/Source/HBIOS/cfg_N8PC.asm
+++ b/Source/HBIOS/cfg_N8PC.asm
@@ -186,8 +186,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_NABU.asm b/Source/HBIOS/cfg_NABU.asm
index 3c3323ce..32c74928 100644
--- a/Source/HBIOS/cfg_NABU.asm
+++ b/Source/HBIOS/cfg_NABU.asm
@@ -185,8 +185,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_RCEZ80.asm b/Source/HBIOS/cfg_RCEZ80.asm
index b65694c5..d1f8561d 100644
--- a/Source/HBIOS/cfg_RCEZ80.asm
+++ b/Source/HBIOS/cfg_RCEZ80.asm
@@ -183,8 +183,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_RCZ180.asm b/Source/HBIOS/cfg_RCZ180.asm
index 0fc37129..63cd948a 100644
--- a/Source/HBIOS/cfg_RCZ180.asm
+++ b/Source/HBIOS/cfg_RCZ180.asm
@@ -185,8 +185,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_RCZ280.asm b/Source/HBIOS/cfg_RCZ280.asm
index 3102d795..2a3ca400 100644
--- a/Source/HBIOS/cfg_RCZ280.asm
+++ b/Source/HBIOS/cfg_RCZ280.asm
@@ -185,8 +185,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_RCZ80.asm b/Source/HBIOS/cfg_RCZ80.asm
index e1439d2d..873b47d0 100644
--- a/Source/HBIOS/cfg_RCZ80.asm
+++ b/Source/HBIOS/cfg_RCZ80.asm
@@ -188,8 +188,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_RPH.asm b/Source/HBIOS/cfg_RPH.asm
index 19f9d8d1..a742b4e4 100644
--- a/Source/HBIOS/cfg_RPH.asm
+++ b/Source/HBIOS/cfg_RPH.asm
@@ -185,8 +185,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_SBC.asm b/Source/HBIOS/cfg_SBC.asm
index 5adfdd21..67da3e92 100644
--- a/Source/HBIOS/cfg_SBC.asm
+++ b/Source/HBIOS/cfg_SBC.asm
@@ -180,8 +180,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_SCZ180.asm b/Source/HBIOS/cfg_SCZ180.asm
index b2ec1f8d..4ced8c68 100644
--- a/Source/HBIOS/cfg_SCZ180.asm
+++ b/Source/HBIOS/cfg_SCZ180.asm
@@ -185,8 +185,7 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_SZ180.asm b/Source/HBIOS/cfg_SZ180.asm
index c6bc5256..bd233093 100644
--- a/Source/HBIOS/cfg_SZ180.asm
+++ b/Source/HBIOS/cfg_SZ180.asm
@@ -175,8 +175,12 @@ M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
 ;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
+DLPSERCNT	.SET	1		; DLPSER: NUMBER OF DEVICES TO DETECT (1-2)
+DLPSER0STAT	.SET	$FF		; DLPSER0: STATUS PORT ADDRESS
+DLPSER0DATA	.SET	$FF		; DLPSER0: DATA PORT ADDRESS
+DLPSER1STAT	.SET	$FF		; DLPSER1: STATUS PORT ADDRESS
+DLPSER1DATA	.SET	$FF		; DLPSER1: DATA PORT ADDRESS
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_SZ80.asm b/Source/HBIOS/cfg_SZ80.asm
index f7463b7b..3b3b9026 100644
--- a/Source/HBIOS/cfg_SZ80.asm
+++ b/Source/HBIOS/cfg_SZ80.asm
@@ -169,8 +169,12 @@ M6242RTCENABLE	.SET	FALSE		; M6242RTC: ENABLE M6242 CLOCK DRIVER (M6242.ASM)
 ;
 SSERENABLE	.SET	FALSE		; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
 ;
-PLDSERENABLE	.SET	FALSE		; PLDSER: ENABLE PLD-USB SERIAL DRIVER (PLDSER.ASM)
-PLDSERCFG	.SET	SER_9600_8N1	; PLDSER: SERIAL LINE CONFIG
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
+DLPSERCNT	.SET	1		; DLPSER: NUMBER OF DEVICES TO DETECT (1-2)
+DLPSER0STAT	.SET	$FF		; DLPSER0: STATUS PORT ADDRESS
+DLPSER0DATA	.SET	$FF		; DLPSER0: DATA PORT ADDRESS
+DLPSER1STAT	.SET	$FF		; DLPSER1: STATUS PORT ADDRESS
+DLPSER1DATA	.SET	$FF		; DLPSER1: DATA PORT ADDRESS
 ;
 TSERENABLE	.SET	FALSE		; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM)
 TSERCFG		.SET	SER_9600_8N1	; TSER: SERIAL LINE CONFIG
diff --git a/Source/HBIOS/cfg_Z80RETRO.asm b/Source/HBIOS/cfg_Z80RETRO.asm
index 5b9e2032..0de1dc3c 100644
--- a/Source/HBIOS/cfg_Z80RETRO.asm
+++ b/Source/HBIOS/cfg_Z80RETRO.asm
@@ -183,6 +183,8 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
+;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 ;
 UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
diff --git a/Source/HBIOS/cfg_ZETA.asm b/Source/HBIOS/cfg_ZETA.asm
index 3e659a06..8c38ad10 100644
--- a/Source/HBIOS/cfg_ZETA.asm
+++ b/Source/HBIOS/cfg_ZETA.asm
@@ -172,6 +172,8 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
+;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 ;
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
diff --git a/Source/HBIOS/cfg_ZETA2.asm b/Source/HBIOS/cfg_ZETA2.asm
index ff8f6d83..7b35ac02 100644
--- a/Source/HBIOS/cfg_ZETA2.asm
+++ b/Source/HBIOS/cfg_ZETA2.asm
@@ -183,6 +183,8 @@ SSERIINV	.SET	FALSE		; SSER: INPUT READY BIT INVERTED
 SSERORDY	.SET	%00000010	; SSER: OUTPUT READY BIT MASK
 SSEROINV	.SET	FALSE		; SSER: OUTPUT READY BIT INVERTED
 ;
+DLPSERENABLE	.SET	FALSE		; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM)
+;
 DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 ;
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
diff --git a/Source/HBIOS/dlpser.asm b/Source/HBIOS/dlpser.asm
new file mode 100644
index 00000000..d0ac85cc
--- /dev/null
+++ b/Source/HBIOS/dlpser.asm
@@ -0,0 +1,275 @@
+;
+;==================================================================================================
+; DLP-USB SERIAL DRIVER
+;==================================================================================================
+;
+; THIS SERIAL DRIVER SUPPORTS THE DLP-USB DEVICE ON THE S100 SERIAL-IO
+; BOARD.  NOTE THAT THE DLP USB DEVICE IS CONNECTED IN PARALLEL TO THE
+; S100 SYSTEM.  IT DOES NOT ACTUALLY USE A TRUE SERIAL DATA STREAM
+; EVEN THOUGH IT APPEARS AS SUCH TO THE USB-CONNECTED COMPUTER.
+;
+; STATUS BITS:				IDLE
+;   7: 0=CHAR PENDING			1
+;   6: 0=XMIT HOLDING REGISTER EMPTY	0
+;   5-0: UNDEFINED
+;
+DLPSER_NONE	.EQU	0
+DLPSER_DLP	.EQU	1
+;
+DLPSERCFG	.EQU	SER_9600_8N1	; DLPSER: SERIAL LINE CONFIG
+;
+; ACCORDING TO THE S100 SERIAL-IO BOARD CONVENTIONS, THE PPI IS
+; CONFIGURED FOR MODE 0 WITH A=INPUT, B=OUTPUT, C0-3=OUTPUT,
+; C4-7=INPUT
+;
+DLPSER_PPICTL	.EQU	$AB
+DLPSER_PPICFG	.EQU	%10011000
+;
+DLPSER_PREINIT:
+;
+; SETUP THE DISPATCH TABLE ENTRIES
+;
+	LD	B,DLPSERCNT		; LOOP CONTROL
+	XOR	A			; ZERO TO ACCUM
+	LD	(DLPSER_DEV),A		; CURRENT DEVICE NUMBER
+	LD	IY,DLPSER_CFG		; POINT TO START OF CFG TABLE
+DLPSER_PREINIT0:
+	PUSH	BC			; SAVE LOOP CONTROL
+	CALL	DLPSER_INITUNIT		; HAND OFF TO GENERIC INIT CODE
+	POP	BC			; RESTORE LOOP CONTROL
+;
+	OR	$FF			; $FF TO ACCUME
+	LD	(IY+2),A		; CLEAR HBIOS UNIT ASSIGNMENT
+	LD	A,(IY+1)		; GET THE DLPSER TYPE DETECTED
+	OR	A			; SET FLAGS
+	JR	Z,DLPSER_PREINIT2	; SKIP IT IF NOTHING FOUND
+;	
+	PUSH	BC			; SAVE LOOP CONTROL
+	PUSH	IY			; CFG ENTRY ADDRESS
+	POP	DE			; ... TO DE
+	LD	BC,DLPSER_FNTBL		; BC := FUNCTION TABLE ADDRESS
+	CALL	NZ,CIO_ADDENT		; ADD ENTRY IF DLPSER FOUND
+	LD	(IY+2),A		; RECORD OUT HBIOS UNIT NUMBER
+	POP	BC			; RESTORE LOOP CONTROL
+;
+DLPSER_PREINIT2:
+	LD	DE,DLPSER_CFGSIZ	; SIZE OF CFG ENTRY
+	ADD	IY,DE			; BUMP IY TO NEXT ENTRY
+	DJNZ	DLPSER_PREINIT0		; LOOP UNTIL DONE
+;	
+	XOR	A			; SIGNAL SUCCESS
+	RET				; DONE
+;
+; DLPSER UNIT INITIALIZATION ROUTINE
+;
+DLPSER_INITUNIT:
+	CALL	DLPSER_DETECT		; DETECT IT
+	LD	(IY+1),A		; SAVE IN CONFIG TABLE
+	OR	A			; SET FLAGS
+	RET	Z			; ABORT IF NOTHING THERE
+;
+	; UPDATE WORKING DLPSER DEVICE NUM
+	LD	HL,DLPSER_DEV		; POINT TO CURRENT UART DEVICE NUM
+	LD	A,(HL)			; PUT IN ACCUM
+	INC	(HL)			; INCREMENT IT (FOR NEXT LOOP)
+	LD	(IY),A			; UPDATE UNIT NUM
+;	
+	JP	DLPSER_INITDEV		; INIT DEVICE AND RETURN
+;
+;
+;
+DLPSER_INIT:
+	LD	B,DLPSERCNT		; COUNT OF POSSIBLE DLPSER UNITS
+	LD	IY,DLPSER_CFG		; POINT TO START OF CFG TABLE
+DLPSER_INIT1:
+	PUSH	BC			; SAVE LOOP CONTROL
+	LD	A,(IY+1)		; GET DLPSER TYPE
+	OR	A			; SET FLAGS
+	CALL	NZ,DLPSER_PRTCFG	; PRINT IF NOT ZERO
+	POP	BC			; RESTORE LOOP CONTROL
+	LD	DE,DLPSER_CFGSIZ	; SIZE OF CFG ENTRY
+	ADD	IY,DE			; BUMP IY TO NEXT ENTRY
+	DJNZ	DLPSER_INIT1		; LOOP TILL DONE
+;
+	XOR	A			; SIGNAL SUCCESS
+	RET				; DONE
+;
+; DRIVER FUNCTION TABLE
+;
+DLPSER_FNTBL:
+	.DW	DLPSER_IN
+	.DW	DLPSER_OUT
+	.DW	DLPSER_IST
+	.DW	DLPSER_OST
+	.DW	DLPSER_INITDEV
+	.DW	DLPSER_QUERY
+	.DW	DLPSER_DEVICE
+#IF (($ - DLPSER_FNTBL) != (CIO_FNCNT * 2))
+	.ECHO	"*** INVALID DLPSER FUNCTION TABLE ***\n"
+#ENDIF
+;
+;
+;
+DLPSER_IN:
+	CALL	DLPSER_IST		; CHECK FOR CHAR PENDING
+	JR	Z,DLPSER_IN		; WAIT FOR IT IF NECESSARY
+	;IN	A,(DLPSER_DATA)		; READ THE CHAR
+	LD	C,(IY+4)		; DATA PORT
+	IN	E,(C)			; GET BYTE
+	XOR	A			; SIGNAL SUCCESS
+	RET				; DONE
+;
+;
+;
+DLPSER_IST:
+	;IN	A,(DLPSER_STAT)		; READ LINE STATUS REGISTER
+	LD	C,(IY+3)		; STATUS PORT
+	IN	A,(C)			; GET STATUS
+	CPL
+	AND	%10000000		; ISOLATE DATA READY
+	JP	Z,CIO_IDLE		; RETURN VIA IDLE PROCESSING
+	OR	$FF			; SET A=$FF TO SIGNAL READY
+	RET				; RETURN
+;
+;
+;
+DLPSER_OUT:
+	CALL	DLPSER_OST		; CHECK FOR OUTPUT READY
+	JR	Z,DLPSER_OUT		; WAIT IF NECESSARY
+	;LD	A,E			; RECOVER THE CHAR TO WRITE
+	;OUT	(DLPSER_DATA),A		; WRITE THE CHAR
+	LD	C,(IY+4)		; DATA PORT
+	OUT	(C),E			; SEND BYTE
+	XOR	A			; SIGNAL SUCCESS
+	RET				; DONE
+;
+;
+;
+DLPSER_OST:
+	;IN	A,(DLPSER_STAT)		; READ LINE STATUS REGISTER
+	LD	C,(IY+3)		; STATUS PORT
+	IN	A,(C)			; GET STATUS
+	CPL
+	AND	%01000000 		; ISOLATE OUTPUT RDY
+	JP	Z,CIO_IDLE		; RETURN VIA IDLE PROCESSING
+	OR	$FF			; SET A=$FF TO SIGNAL READY
+	RET				; RETURN
+;
+;
+;
+DLPSER_INITDEV:
+#IF (PLATFORM == PLT_SZ80)
+	LD	A,(IY+4)		; GET THE DATA PORT
+	CP	$AA			; IS THIS THE SERIAL I/O BOARD DLP DEVICE?
+	JR	NZ,DLPSER_INITDEV1	; IF NOT, SKIP
+	LD	A,DLPSER_PPICFG		; CONFIG 8255 PORTS
+	OUT	(DLPSER_PPICTL),A	; WRITE CONTROL WORD
+#ENDIF
+DLPSER_INITDEV1:
+	XOR	A			; NOTHING TO DO
+	RET
+;
+;
+;
+DLPSER_QUERY:
+	LD	DE,DLPSERCFG
+	XOR	A
+	RET
+;
+;
+;
+DLPSER_DEVICE:
+	LD	D,CIODEV_DLPSER		; D := DEVICE TYPE
+	LD	E,(IY)			; E := DEVICE NUM, ALWAYS 0
+	LD	C,$00			; C := DEVICE TYPE, 0x00 IS RS-232
+	LD	H,0			; H := 0, DRIVER HAS NO MODES
+	LD	L,(IY+4)		; L := BASE I/O ADDRESS
+	XOR	A			; SIGNAL SUCCESS
+	RET
+;
+; TEST FOR HARDWARE PRESENCE.
+; THIS DEVICE IS VERY HARD TO DETECT.  WE USE THE PRESENCE OF
+; THE STATUS PORT.  RETURN DEVICE TYPE.
+;
+DLPSER_DETECT:
+	LD	A,(IY+3)		; STATUS PORT
+	LD	C,A			; COPY TO C
+	LD	($+4),A			; MODIFY CODE
+DLPSER_DETECT1
+	IN	A,($FF)			; READ PORT DIRECT
+	IN	B,(C)			; READ PORT VIA C
+	CP	B			; A==B MEANS PORT EXISTS
+	LD	A,DLPSER_NONE		; ASSUME NOTHING THERE
+	RET	NZ			; IF NZ, NOTHING
+	LD	A,DLPSER_DLP		; ELSE TYPE IS DLP
+	RET
+;
+;
+;
+DLPSER_PRTCFG:
+	; ANNOUNCE PORT
+	CALL	NEWLINE			; FORMATTING
+	PRTS("DLPSER$")			; FORMATTING
+	LD	A,(IY)			; DEVICE NUM
+	CALL	PRTDECB			; PRINT DEVICE NUM
+	PRTS(": IO=0x$")		; FORMATTING
+	LD	A,(IY+4)		; GET DATA PORT
+	CALL	PRTHEXBYTE		; PRINT DATA PORT
+;
+	; PRINT THE DLPSER TYPE
+	CALL	PC_SPACE		; FORMATTING
+	LD	A,(IY+1)		; GET DLPSER TYPE BYTE
+	RLCA				; MAKE IT A WORD OFFSET
+	LD	HL,DLPSER_TYPE_MAP	; POINT HL TO TYPE MAP TABLE
+	CALL	ADDHLA			; HL := ENTRY
+	LD	E,(HL)			; DEREFERENCE
+	INC	HL			; ...
+	LD	D,(HL)			; ... TO GET STRING POINTER
+	CALL	WRITESTR		; PRINT IT
+;
+	XOR	A
+	RET
+;
+;
+;
+DLPSER_TYPE_MAP:
+	.DW	DLPSER_STR_NONE
+	.DW	DLPSER_STR_DLP
+
+DLPSER_STR_NONE	.DB	"<NOT PRESENT>$"
+DLPSER_STR_DLP	.DB	"DLP-USB$"
+;
+; UART PORT TABLE
+;
+DLPSER_CFG:
+;
+DLPSER0_CFG:
+	.DB	0				; DEVICE NUMBER (SET DURING INIT)	; +0
+	.DB	0				; DLPSER TYPE (SET DURING INIT)		; +1
+	.DB	$FF				; HBIOS CHARACTER UNIT ASSIGNED		; +2
+	.DB	DLPSER0STAT			; STATUS PORT				; +3
+	.DB	DLPSER0DATA			; DATA PORT				; +4
+;
+	DEVECHO	"DLPSER: IO="
+	DEVECHO	DLPSER0DATA
+	DEVECHO	"\n"
+;
+;
+DLPSER_CFGSIZ	.EQU	$ - DLPSER_CFG		; SIZE OF ONE CFG TABLE ENTRY
+;
+#IF (DLPSERCNT >= 1)
+DLPSER1_CFG:
+	.DB	0				; DEVICE NUMBER (SET DURING INIT)	; +0
+	.DB	0				; DLPSER TYPE (SET DURING INIT)		; +1
+	.DB	$FF				; HBIOS CHARACTER UNIT ASSIGNED		; +2
+	.DB	DLPSER1STAT			; STATUS PORT				; +3
+	.DB	DLPSER1DATA			; DATA PORT				; +4
+;
+	DEVECHO	"DLPSER: IO="
+	DEVECHO	DLPSER1DATA
+	DEVECHO	"\n"
+#ENDIF
+;
+; WORKING VARIABLES
+;
+DLPSER_DEV		.DB	0		; DEVICE NUM USED DURING INIT
diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm
index f5d008a4..3d81382d 100644
--- a/Source/HBIOS/hbios.asm
+++ b/Source/HBIOS/hbios.asm
@@ -3034,14 +3034,76 @@ HB_CONRDY:
 	LD	(CB_CONDEV),A		; SET CONSOLE DEVICE
 #ENDIF
 ;
-#IF ((PLATFORM == PLT_SZ80) & (MEMMGR == MM_SZ80) & SCONENABLE)
-	IN	A,($EF)			; GET IO BYTE
-	AND	%00100000		; ISOLATE CONSOLE BIT
-	JR	Z,HB_CONRDY_Z		; IF ZERO, BYPASS CONSOLE SWITCH
+#IF ((PLATFORM == PLT_SZ80) & (MEMMGR == MM_SZ80))
+;
+; ATTEMPT TO MATCH 100 CONSOLE ROUTING:
+;   IF (K8 EXISTS AND =0)
+;     Z80 CPU V3 BOARD DLP USB
+;   ELSE ROUTE BASED ON IOBYTE (PORT 0XEF) BITS 5&4:
+;     11: PROPELLER (SCON)
+;     10: SCC PORT A
+;     01: SERIAL I/O BOARD DLP USB
+;     00: VGA
+;
+	LD	C,($E8)			; POINT TO K8 PORT
+	IN	B,(C)			; GET VALUE TO B USING IN (C)
+	IN	A,($E8)			; GET VALUE TO A USING IN (XX)
+	CP	B			; A==B IF PORT EXISTS
+	JR	NZ,HB_CONRDY1		; SKIP IF NOT VALID PORT (PRE-V3 CPU BOARD)
+	BIT	0,A			; CHECK BIT 0
+	JR	NZ,HB_CONRDY1		; IF NZ, NOT SET, SKIP
+;
+	; USE Z80 CPU V3 BOARD DLP USB
+  #IF (DLPSERENABLE)
+    #IF (DLPSERCNT >= 1)
+	LD	A,(DLPSER0_CFG + 2)	; GET THE DLP SERIAL UNIT NUMBER
+	CP	$FF			; VALID?
+	JR	Z,HB_CONRDY1		; IF NOT, BYPASS CONSOLE SWITCH
+	LD	(CB_CONDEV),A		; SET CONSOLE DEVICE
+	JR	HB_CONRDY_Z		; AND DONE
+    #ENDIF
+  #ENDIF
+HB_CONRDY1:
+	LD	C,($EF)			; POINT TO IOBYTE PORT
+	IN	B,(C)			; GET VALUE TO B USING IN (C)
+	IN	A,($EF)			; GET VALUE TO A USING IN (XX)
+	CP	B			; A==B IF PORT EXISTS
+	JR	NZ,HB_CONRDY_Z		; BAIL OUT IF PORT NOT FOUND
+;
+	AND	%00110000		; ISOLOATE CONSOLE BITS 5&4
+	CP	%00110000		; PROPELLER REQUESTED?
+	JR	Z,HB_CONRDY2		; IF SO, HANDLE IT
+	CP	%00100000		; SCC PORT A REQUESTED?
+	JR	Z,HB_CONRDY3		; IF SO, HANDLE IT
+	CP	%00010000		; SERIAL I/O BOARD DLP USB?
+	JR	Z,HB_CONRDY4		; IF SO, HANDLE IT
+	JR	HB_CONRDY_Z		; OTHERWISE BAIL OUT
+;
+HB_CONRDY2:	; PROPELLER
+  #IF (SCONENABLE)
 	LD	A,(SCON_UNIT)		; GET THE CONSOLE UNIT NUMBER
 	CP	$FF			; VALID?
 	JR	Z,HB_CONRDY_Z		; IF NOT, BYPASS CONSOLE SWITCH
 	LD	(CB_CONDEV),A		; SET CONSOLE DEVICE
+  #ENDIF
+	JR	HB_CONRDY_Z
+;
+HB_CONRDY3:	; SCC PORT A
+  #IF (SCCENABLE)
+		; FOR NOW, WE ASSUME THE DEFAULT CONSOLE UNIT IS THIS
+  #ENDIF
+	JR	HB_CONRDY_Z
+;
+HB_CONRDY4:	; SERIAL I/O BOARD DLP USB
+  #IF (DLPSERENABLE)
+    #IF (DLPSERCNT >= 2)
+	LD	A,(DLPSER1_CFG + 2)	; GET THE DLP SERIAL UNIT NUMBER
+	CP	$FF			; VALID?
+	JR	Z,HB_CONRDY_Z		; IF NOT, BYPASS CONSOLE SWITCH
+	LD	(CB_CONDEV),A		; SET CONSOLE DEVICE
+    #ENDIF
+  #ENDIF
+	JR	HB_CONRDY_Z
 #ENDIF
 ;
 #IF ((PLATFORM == PLT_SZ80) & (MEMMGR == MM_Z2) & SCONENABLE)
@@ -4127,8 +4189,8 @@ HB_PCINITTBL:
 #IF (SSERENABLE)
 	.DW	SSER_PREINIT
 #ENDIF
-#IF (PLDSERENABLE)
-	.DW	PLDSER_PREINIT
+#IF (DLPSERENABLE)
+	.DW	DLPSER_PREINIT
 #ENDIF
 #IF (UFENABLE)
 	.DW	UF_PREINIT
@@ -4249,8 +4311,8 @@ HB_INITTBL:
 #IF (SSERENABLE)
 	.DW	SSER_INIT
 #ENDIF
-#IF (PLDSERENABLE)
-	.DW	PLDSER_INIT
+#IF (DLPSERENABLE)
+	.DW	DLPSER_INIT
 #ENDIF
 #IF (UFENABLE)
 	.DW	UF_INIT
@@ -8980,12 +9042,12 @@ SIZ_TSER	.EQU	$ - ORG_TSER
 		MEMECHO	" bytes.\n"
 #ENDIF
 ;
-#IF (PLDSERENABLE)
-ORG_PLDSER	.EQU	$
-  #INCLUDE "pldser.asm"
-SIZ_PLDSER	.EQU	$ - ORG_PLDSER
-		MEMECHO	"PLDSER occupies "
-		MEMECHO	SIZ_PLDSER
+#IF (DLPSERENABLE)
+ORG_DLPSER	.EQU	$
+  #INCLUDE "dlpser.asm"
+SIZ_DLPSER	.EQU	$ - ORG_DLPSER
+		MEMECHO	"DLPSER occupies "
+		MEMECHO	SIZ_DLPSER
 		MEMECHO	" bytes.\n"
 #ENDIF
 ;
diff --git a/Source/HBIOS/hbios.inc b/Source/HBIOS/hbios.inc
index d34e06b3..eb4749d0 100644
--- a/Source/HBIOS/hbios.inc
+++ b/Source/HBIOS/hbios.inc
@@ -397,7 +397,7 @@ CIODEV_ESPSER	.EQU	$0D
 CIODEV_SCON	.EQU	$0E
 CIODEV_SSER	.EQU	$0F
 CIODEV_EZ80UART	.EQU	$10
-CIODEV_PLDSER	.EQU	$11
+CIODEV_DLPSER	.EQU	$11
 CIODEV_TSER	.EQU	$12
 CIODEV_SCC	.EQU	$13
 ;
diff --git a/Source/HBIOS/invntdev.asm b/Source/HBIOS/invntdev.asm
index 781d4893..1b86aab5 100644
--- a/Source/HBIOS/invntdev.asm
+++ b/Source/HBIOS/invntdev.asm
@@ -637,7 +637,7 @@ PS_SDESPSER	.TEXT	"ESPSER$"
 PS_SDSCON	.TEXT	"SCON$"
 PS_SDSSER	.TEXT	"SSER$"
 PS_SDEZ80	.TEXT	"EZ80$"
-PS_SDPLDSER	.TEXT	"PLDSER$"
+PS_SDDLPSER	.TEXT	"DLPSER$"
 PS_SDTSER	.TEXT	"TSER$"
 PS_SDSCC	.TEXT	"SCC$"
 ;
diff --git a/Source/HBIOS/pldser.asm b/Source/HBIOS/pldser.asm
deleted file mode 100644
index 9f83df30..00000000
--- a/Source/HBIOS/pldser.asm
+++ /dev/null
@@ -1,176 +0,0 @@
-;
-;==================================================================================================
-; PLD-USB SERIAL DRIVER
-;==================================================================================================
-;
-; THIS SERIAL DRIVER SUPPORTS THE DLP-USB DEVICE ON THE S100 SERIAL-IO
-; BOARD.  THE STATUS PORT IS ACTUALLY BITS 6-7 OF PORT C OF THE 8255.
-;
-; STATUS BITS:				IDLE
-;   7: 0=CHAR PENDING			1
-;   6: 0=XMIT HOLDING REGISTER EMPTY	0
-;   5-0: UNDEFINED
-;
-; TODO:
-;
-PLDSER_PPI_BASE	.EQU	$A8
-;
-PLDSER_PPIA	.EQU	PLDSER_PPI_BASE + 0
-PLDSER_PPIB	.EQU	PLDSER_PPI_BASE + 1
-PLDSER_PPIC	.EQU	PLDSER_PPI_BASE + 2
-PLDSER_PPICTL	.EQU	PLDSER_PPI_BASE + 3
-;
-PLDSER_STAT	.EQU	PLDSER_PPIC
-PLDSER_DATA	.EQU	PLDSER_PPI_BASE + 4
-;
-; ACCORDING TO THE S100 SERIAL-IO BOARD CONVENTIONS, THE PPI IS
-; CONFIGURED FOR MODE 0 WITH A=INPUT, B=OUTPUT, C0-3=OUTPUT,
-; C4-7=INPUT
-;
-PLDSER_PPICFG	.EQU	%10011000
-;
-		DEVECHO	"PLDSER: IO="
-		DEVECHO	PLDSER_DATA
-		DEVECHO	"\n"
-;
-;
-;
-PLDSER_PREINIT:
-;
-; TEST FOR PRESENCE
-;
-	XOR	A			; CLEAR ACCUM
-	LD	(PLDSER_PRESENT),A	; PRESET TO NOT PRESENT
-	CALL	PLDSER_DETECT		; CHECK FOR HARDWARE, Z=PRESENT
-	RET	NZ			; ABORT IF NOT PRESENT
-	OR	$FF			; PRESENT FLAG
-	LD	(PLDSER_PRESENT),A	; STORE IT
-;
-	CALL	PLDSER_INITDEV
-;
-; ADD OURSELVES TO CIO DISPATCH TABLE
-;
-	LD	D,0			; PHYSICAL UNIT IS ZERO
-	LD	E,CIODEV_PLDSER		; DEVICE TYPE
-	LD	BC,PLDSER_FNTBL		; BC := FUNCTION TABLE ADDRESS
-	CALL	CIO_ADDENT		; ADD ENTRY, A := UNIT ASSIGNED
-;
-	XOR	A
-	RET
-;
-;
-;
-PLDSER_INIT:
-	LD	A,(PLDSER_PRESENT)	; PRESENT FLAG
-	OR	A			; SET FLAGS
-	RET	Z			; ABORT IF NOT PRESENT
-	CALL	NEWLINE
-	PRTS("PLDSER:$")
-	PRTS(" IO=0x$")			; FORMATTING
-	LD	A,PLDSER_DATA
-	CALL	PRTHEXBYTE
-;
-	XOR	A			; SIGNAL SUCCESS
-	RET
-;
-; DRIVER FUNCTION TABLE
-;
-PLDSER_FNTBL:
-	.DW	PLDSER_IN
-	.DW	PLDSER_OUT
-	.DW	PLDSER_IST
-	.DW	PLDSER_OST
-	.DW	PLDSER_INITDEV
-	.DW	PLDSER_QUERY
-	.DW	PLDSER_DEVICE
-#IF (($ - PLDSER_FNTBL) != (CIO_FNCNT * 2))
-	.ECHO	"*** INVALID PLDSER FUNCTION TABLE ***\n"
-#ENDIF
-;
-;
-;
-PLDSER_IN:
-	CALL	PLDSER_IST		; CHECK FOR CHAR PENDING
-	JR	Z,PLDSER_IN		; WAIT FOR IT IF NECESSARY
-	IN	A,(PLDSER_DATA)		; READ THE CHAR
-	LD	E,A
-	RET
-;
-;
-;
-PLDSER_IST:
-	IN	A,(PLDSER_STAT)		; READ LINE STATUS REGISTER
-	CPL
-	AND	%10000000		; ISOLATE DATA READY
-	JP	Z,CIO_IDLE		; RETURN VIA IDLE PROCESSING
-	OR	$FF			; SET A=$FF TO SIGNAL READY
-	RET				; RETURN
-;
-;
-;
-PLDSER_OUT:
-	CALL	PLDSER_OST		; CHECK FOR OUTPUT READY
-	JR	Z,PLDSER_OUT		; WAIT IF NECESSARY
-	LD	A,E			; RECOVER THE CHAR TO WRITE
-	OUT	(PLDSER_DATA),A		; WRITE THE CHAR
-	RET
-;
-;
-;
-PLDSER_OST:
-	IN	A,(PLDSER_STAT)		; READ LINE STATUS REGISTER
-	CPL
-	AND	%01000000 		; ISOLATE OUTPUT RDY
-	JP	Z,CIO_IDLE		; RETURN VIA IDLE PROCESSING
-	OR	$FF			; SET A=$FF TO SIGNAL READY
-	RET				; RETURN
-;
-;
-;
-PLDSER_INITDEV:
-	; INIT THE PPI.  THE PLD ADAPTER ITSELF HAS NO
-	; CONFIGURATION CAPABILITIES.
-	LD	A,PLDSER_PPICFG		; CONFIG 8255 PORTS: B=OUTPUT
-	OUT	(PLDSER_PPICTL),A	; WRITE CONTROL WORD
-	RET
-;
-;
-;
-PLDSER_QUERY:
-	LD	DE,PLDSERCFG
-	XOR	A
-	RET
-;
-;
-;
-PLDSER_DEVICE:
-	LD	D,CIODEV_PLDSER		; D := DEVICE TYPE
-	LD	E,0			; E := DEVICE NUM, ALWAYS 0
-	LD	C,$00			; C := DEVICE TYPE, 0x00 IS RS-232
-	LD	H,0			; H := 0, DRIVER HAS NO MODES
-	LD	L,PLDSER_DATA		; L := BASE I/O ADDRESS
-	XOR	A			; SIGNAL SUCCESS
-	RET
-;
-; TEST FOR HARDWARE PRESENCE.  THE PLD ADAPTER STATUS IS EXPOSED THROUGH
-; AN 8255 PPI.  DETECTING THE PLD ITSELF IS BASICALLY IMPOSSIBLE GIVEN
-; THERE ARE ONLY TWO STATUS BITS WITH VALUES THAT SHOULD NOT BE ASSUMED.
-; SO, HERE WE JSUT CHECK FOR THE EXISTENCE OF THE PPI ITSELF WHICH IS
-; USED TO INFER THE EXCISTENCE OF THE PLD ADAPTER.
-;
-PLDSER_DETECT:
-;
-	; WE SETUP THE PPI TO WRITE, THEN WRITE A TEST VALUE
-	; TO PORT B, THEN READ IT BACK.  IF THE PPI IS THERE
-	; THEN THE BUS HOLD CIRCUITRY WILL READ BACK THE TEST VALUE.
-	LD	A,PLDSER_PPICFG		; CONFIG 8255 PORTS: B=OUTPUT
-	OUT	(PLDSER_PPICTL),A	; WRITE CONTROL WORD
-	LD	A,$A5			; TEST VALUE
-	OUT	(PLDSER_PPIB),A		; WRITE IT
-	IN	A,(PLDSER_PPIB)		; READ IT
-	CP	$A5
-	RET
-;
-;
-;
-PLDSER_PRESENT	.DB	0		; FLAG FOR HARDWARE PRESENT
\ No newline at end of file
diff --git a/Source/ver.inc b/Source/ver.inc
index b6c80fbd..6768e9d3 100644
--- a/Source/ver.inc
+++ b/Source/ver.inc
@@ -2,7 +2,7 @@
 #DEFINE	RMN	6
 #DEFINE	RUP	0
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.6.0-dev.42"
+#DEFINE BIOSVER	"3.6.0-dev.43"
 #define rmj	RMJ
 #define rmn	RMN
 #define rup	RUP
diff --git a/Source/ver.lib b/Source/ver.lib
index 8918d3ce..7a815ab0 100644
--- a/Source/ver.lib
+++ b/Source/ver.lib
@@ -3,5 +3,5 @@ rmn	equ	6
 rup	equ	0
 rtp	equ	0
 biosver	macro
-	db	"3.6.0-dev.42"
+	db	"3.6.0-dev.43"
 	endm