From 229bf119d4184deff2f67a23a0824d18955f0471 Mon Sep 17 00:00:00 2001 From: Dean Netherton Date: Fri, 12 Jul 2024 14:42:25 +1000 Subject: [PATCH] ez80: uart query implemented --- Source/HBIOS/ez80instr.inc | 50 +++++++++++++ Source/HBIOS/ez80uart.asm | 119 +++++++++++++++++++++++++----- Source/HBIOS/hbios.asm | 13 +--- Source/RomDsk/ROM_384KB/timer.com | Bin 900 -> 937 bytes 4 files changed, 153 insertions(+), 29 deletions(-) create mode 100644 Source/HBIOS/ez80instr.inc diff --git a/Source/HBIOS/ez80instr.inc b/Source/HBIOS/ez80instr.inc new file mode 100644 index 00000000..dbb4ed8f --- /dev/null +++ b/Source/HBIOS/ez80instr.inc @@ -0,0 +1,50 @@ +; +;================================================================================================== +; HELPER MACROS FOR TARGETING EZ80 CPU INSTRUCTIONS +;================================================================================================== + +; +; EMIT PREFIX REQUIRED BY EZ80 TO ENSURE CORRECT 16 BIT IO OPERATION +; +#IF (CPUFAM == CPU_EZ80) + #DEFINE EZ80_IO .DB $49, $CF ; RST.L $08 + #DEFINE EZ80_FN .DB $49, $D7 ; RST.L $10 + #DEFINE EZ80_BNKSEL .DB $49, $DF ; RST.L $18 + + #DEFINE RET.L .DB $49 \ RET + + #DEFINE IN0_A(p) .DB $ED,$38,p + #DEFINE IN0_B(p) .DB $ED,$00,p + #DEFINE IN0_C(p) .DB $ED,$08,p + #DEFINE IN0_D(p) .DB $ED,$10,p + #DEFINE IN0_E(p) .DB $ED,$18,p + #DEFINE IN0_H(p) .DB $ED,$20,p + #DEFINE IN0_L(p) .DB $ED,$28,p + + #DEFINE OUT0_A(p) .DB $ED,$39,p + #DEFINE OUT0_B(p) .DB $ED,$01,p + #DEFINE OUT0_C(p) .DB $ED,$09,p + #DEFINE OUT0_D(p) .DB $ED,$11,p + #DEFINE OUT0_E(p) .DB $ED,$19,p + #DEFINE OUT0_H(p) .DB $ED,$21,p + #DEFINE OUT0_L(p) .DB $ED,$29,p + + #DEFINE LDHLMM.LIL(Mmn) \ + #defcont \ .DB $5B + #defcont \ LD HL, Mmn + #defcont \ .DB (Mmn >> 16) & $FF + + #DEFINE LDBCMM.LIL(Mmn) \ + #defcont \ .DB $5B + #defcont \ LD BC, Mmn + #defcont \ .DB (Mmn >> 16) & $FF + + #DEFINE SBCHLBC.LIL \ + #defcont \ .DB $49 + #defcont \ SBC HL, BC + +IO_SEGMENT .EQU $FF ; THE UPPER 8-BIT ADDRESS FOR I/O + +#ELSE + #DEFINE EZ80_IO +#ENDIF diff --git a/Source/HBIOS/ez80uart.asm b/Source/HBIOS/ez80uart.asm index 8f88003c..cbe0e74e 100644 --- a/Source/HBIOS/ez80uart.asm +++ b/Source/HBIOS/ez80uart.asm @@ -11,22 +11,6 @@ UART0_RBR .EQU $C0 LSR_THRE .EQU $20 LSR_DR .EQU $01 -#DEFINE IN0_A(p) .DB $ED,$38,p -#DEFINE IN0_B(p) .DB $ED,$00,p -#DEFINE IN0_C(p) .DB $ED,$08,p -#DEFINE IN0_D(p) .DB $ED,$10,p -#DEFINE IN0_E(p) .DB $ED,$18,p -#DEFINE IN0_H(p) .DB $ED,$20,p -#DEFINE IN0_L(p) .DB $ED,$28,p - -#DEFINE OUT0_A(p) .DB $ED,$39,p -#DEFINE OUT0_B(p) .DB $ED,$01,p -#DEFINE OUT0_C(p) .DB $ED,$09,p -#DEFINE OUT0_D(p) .DB $ED,$11,p -#DEFINE OUT0_E(p) .DB $ED,$19,p -#DEFINE OUT0_H(p) .DB $ED,$21,p -#DEFINE OUT0_L(p) .DB $ED,$29,p - EZUART_PREINIT: LD BC, EZUART_FNTBL LD DE, EZUART_CFG @@ -67,9 +51,110 @@ EZUART_OST: EZ80_FN RET +BAUD_RATE .EQU 115200 + EZUART_INITDEV: + LD A, 3 ; UART + LD B, 4 ; UART-CONFIG + LDHLMM.LIL(BAUD_RATE) + + LD E, 3 << 3 + EZ80_FN + RET + + +#DEFINE TRANSLATE(nnn,rrr) \ +#defcont \ LDBCMM.LIL(nnn) +#defcont \ SBCHLBC.LIL +#defcont \ JR NC, $+7 +#defcont \ LD D, rrr +#defcont \ JP uart_query_end + EZUART_QUERY: - LD A, 0 ; NOT IMPLEMENTED ERROR + LD A, 3 ; UART + LD B, 5 ; UART-QUERY + EZ80_FN + + OR A + ; HL24 bit has the baud rate, we need to convert to the 5 bit representation? + TRANSLATE(112, 00000b) ; BAUDRATE=75 (BETWEEN 0 AND 112) + TRANSLATE(187-112, 00001b) ; BAUDRATE=150 (BETWEEN 113 AND 187) + TRANSLATE(262-187, 10000b) ; BAUDRATE=225 (BETWEEN 188 AND 262) + TRANSLATE(375-262, 00010b) ; BAUDRATE=300 (BETWEEN 263 AND 375) + TRANSLATE(525-375, 10001b) ; BAUDRATE=450 (BETWEEN 376 AND 525) + TRANSLATE(750-525, 00011b) ; BAUDRATE=600 (BETWEEN 526 AND 750) + TRANSLATE(1050-750, 10010b) ; BAUDRATE=900 (BETWEEN 751 AND 1050) + TRANSLATE(1500-1050, 00100b) ; BAUDRATE=1200 (BETWEEN 1051 AND 1500) + TRANSLATE(2100-1500, 10011b) ; BAUDRATE=1800 (BETWEEN 1501 AND 2100) + TRANSLATE(3000-2100, 00101b) ; BAUDRATE=2400 (BETWEEN 2101 AND 3000) + TRANSLATE(4200-3000, 10100b) ; BAUDRATE=3600 (BETWEEN 3001 AND 4200) + TRANSLATE(6000-4200, 00110b) ; BAUDRATE=4800 (BETWEEN 4201 AND 6000) + TRANSLATE(8400-6000, 10101b) ; BAUDRATE=7200 (BETWEEN 6001 AND 8400) + TRANSLATE(12000-8400, 00111b) ; BAUDRATE=9600 (BETWEEN 8401 AND 12000) + TRANSLATE(16800-12000, 10110b) ; BAUDRATE=14400 (BETWEEN 12001 AND 16800) + TRANSLATE(24000-16800, 01000b) ; BAUDRATE=19200 (BETWEEN 16801 AND 24000) + TRANSLATE(33600-24000, 10111b) ; BAUDRATE=28800 (BETWEEN 24001 AND 33600) + TRANSLATE(48000-33600, 01001b) ; BAUDRATE=38400 (BETWEEN 33601 AND 48000) + TRANSLATE(67200-48000, 11000b) ; BAUDRATE=57600 (BETWEEN 48001 AND 67200) + TRANSLATE(96000-67200, 01010b) ; BAUDRATE=76800 (BETWEEN 67201 AND 96000) + TRANSLATE(134400-96000, 11001b) ; BAUDRATE=115200 (BETWEEN 96001 AND 134400) + TRANSLATE(192000-134400, 01011b) ; BAUDRATE=153600 (BETWEEN 134401 AND 192000) + TRANSLATE(268800-192000, 11010b) ; BAUDRATE=230400 (BETWEEN 192001 AND 268800) + TRANSLATE(384000-268800, 01100b) ; BAUDRATE=307200 (BETWEEN 268801 AND 384000) + TRANSLATE(537600-384000, 11011b) ; BAUDRATE=460800 (BETWEEN 384001 AND 537600) + TRANSLATE(768000-537600, 01101b) ; BAUDRATE=614400 (BETWEEN 537601 AND 768000) + TRANSLATE(1075200-768000, 11100b) ; BAUDRATE=921600 (BETWEEN 768001 AND 1075200) + TRANSLATE(1536000-1075200, 01110b) ; BAUDRATE=1228800 (BETWEEN 1075201 AND 1536000) + TRANSLATE(2150400-1536000, 11101b) ; BAUDRATE=1843200 (BETWEEN 1536001 AND 2150400) + TRANSLATE(3072000-2150400, 01111b) ; BAUDRATE=2457600 (BETWEEN 2150401 AND 3072000) + TRANSLATE(5529600-3072000, 11110b) ; BAUDRATE=3686400 (BETWEEN 3072001 AND 5529600) + + LD D, 11111b ; BAUDRATE=7372800 (>=5529601) +uart_query_end: + +; Convert from line control settings from: +; +; E{0:1} = Parity (00 -> NONE, 01 -> NONE, 10 -> ODD, 11 -> EVEN) +; E{2} = Stop Bits (0 -> 1, 1 -> 2) +; E{3:4} = Data Bits (00 -> 5, 01 -> 6, 10 -> 7, 11 -> 8) +; E{5:5} = Hardware Flow Control CTS (0 -> OFF, 1 -> ON) +; +; to +; +; E{7} = TODO: DTR +; E{6} = NOT IMPLEMENTED: XON/XOFF Flow Control +; E{5} = NOT SUPPORTED: Stick Parity (set for true) +; E{4} = Even Parity (set for true) +; E{3} = Parity Enable (set for true) +; E{2} = Stop Bits (set for true) +; E{1:0} = Data Bits (5-8 encoded as 0-3) + + XOR A + OR 3 << 3 ; ISOLATE DATA BITS + AND E ; MASK IN DATA BITS + + RRCA ; SHIFT TO BITS 1:0 + RRCA + RRCA + LD H, A ; H{1:0} DATA BITS + + BIT 2, E ; STOP BITS + JR Z, SKIP1 + SET 2, H ; APPLY TO H + +SKIP1: + BIT 0, E ; PARITY ENABLE + JR Z, SKIP2 + SET 3, H ; APPLY TO H + +SKIP2: + BIT 1, E ; EVEN PARITY + JR Z, SKIP3 + SET 4, H ; APPLY TO H + +SKIP3: + LD E, H + XOR A RET EZUART_DEVICE: diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index 9d22a730..bacf8616 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -350,20 +350,9 @@ RTCDEF .SET RTCDEF | %00001000 ; INITIAL SPEED LOW #ENDIF DEVECHO "\n" #ENDIF -; -; EMIT PREFIX REQUIRED BY EZ80 TO ENSURE CORRECT 16 BIT IO OPERATION -; -#IF (CPUFAM == CPU_EZ80) - #DEFINE EZ80_IO .DB $49, $CF ; RST.L $08 - #DEFINE EZ80_FN .DB $49, $D7 ; RST.L $10 - #DEFINE EZ80_BNKSEL .DB $49, $DF ; RST.L $18 - #DEFINE RET.L .DB $49 \ RET -IO_SEGMENT .EQU $FF ; THE UPPER 8-BIT ADDRESS FOR I/O +#include "ez80instr.inc" -#ELSE - #DEFINE EZ80_IO -#ENDIF ; ;================================================================================================== ; Z80 PAGE ZERO, VECTORS, ETC. diff --git a/Source/RomDsk/ROM_384KB/timer.com b/Source/RomDsk/ROM_384KB/timer.com index be41c75462b188160ebcd9eb823ca398e549e809..8c39f2ffdba8a94794391aee9906a377cf8497fb 100644 GIT binary patch delta 465 zcmXX?K}Z`x6rK4d8x3^B;$>I0Xx&GIVV+&Et^25%~&E9$!PvhrAreS(sc1 z(IGM}e?`8p#!u66S$oW8a2cwyQE+Pb395G9mC=5FeTLh>Ma#!cZ<31MB#1KIGy9%* z47Tbcxnh*jP(R{-tC?YvuKfGs!ya*?rp{ERa*~xFW-7h%()idW!bUnEg2r?}FbbOz VYkHC~Z@tP>>({(}_Yu6|e*kv~&=>#! delta 402 zcmX9)O-lk{5PoO;A|Yd`!$woBpstBv1-5ypze3N>>iVBLieYVa$rZ#8Qz=`$zOso zn@>U}gPA*Qn!y)TKMvpK5?@f44Xu+K)n%zq_uDz^R+~lHC{Y+=%;M}t7Hv`w@-VE+ zY$;8HSZzaEMri?;Vh%P=qVlur@xb>q?UU6Zu||vdE*sfWl~(Y*n669DDEw4tA3<%k z@ys0N;A%2>gv-QvlT)uv2aRly(Qvzw+A N!aM?uq^58c{s7<>uaf`(