Merge pull request #10 from wwarthen/dev

Dev

Binary/Apps/Makefile

@@ -8,4 +8,4 @@ all::
 	mkdir -p Tunes
 
 clobber::
-	@rm -f *.bin *.com *.img *.rom *.pdf *.log *.eeprom *.ovr *.hlp *.doc *.COM *.BIN Tunes/*.mym Tunes/*.pt?
+	@rm -f *.bin *.com *.img *.rom *.pdf *.log *.eeprom *.ovr *.hlp *.doc *.COM *.BIN Tunes/*.mym Tunes/*.pt? Tunes/*.vgm

Doc/ChangeLog.txt

@@ -60,6 +60,8 @@ Version 3.1.1
 - D?T: Substantial update to TastyBasic incuding a .COM executable
 - PMS: Added VGM audio file player
 - WBW: ZPMLDR and ZPM3 fixes, credit to Lars Nelson for finding ZPM3 source!
+- DDW: Add support for MBC sound card
+- WBW: Add support for "romless" booting
 
 Version 3.1
 -----------

ReadMe.md

@@ -1,50 +1,9 @@
----
-author: "Wayne Warthen (mailto:wwarthen@gmail.com)"
-classoption:
-- oneside
-colorlinks: true
-date: 08 Dec 2021
-documentclass: book
-fontfamily: helvet
-fontsize: 12pt
-geometry:
-- top=1.5in
-- bottom=1.5in
-- left=1.5in
-- right=1.5in
-graphics: true
-header-includes:
-- 
-- 
-include-before:
-- 
-- 
-institution: RetroBrew Computers Group
-linestretch: 1.25
-numbersections: true
-papersize: letter
-secnumdepth: 1
-title: RomWBW Getting Started
-toc: true
-toc-depth: 1
----
-
-
-
-
-
-
-
-
-
-
-
 # RomWBW
 
 ## Z80/Z180 System Software
 
 Version 3.1 Pre-release  
-08 Dec 2021
+21 Mar 2022
 
 Wayne Warthen <wwarthen@gmail.com>
 
@@ -455,7 +414,7 @@ therefore, globally available.
 | TALK        | Direct console I/O to a specified character device.                                                  |
 | RTC         | Manage and test the Real Time Clock hardware.                                                        |
 | TIMER       | Display value of running periodic system timer.                                                      |
-| INTTEST     | Test interrupt vector hooking.                                                                       |
+| CPUSPD      | Change the running CPU speed and wait states of the system.                                          |
 
 Some custom applications do not fit on the ROM disk. They are found on
 the disk image files or the individual files can be found in the
@@ -465,6 +424,7 @@ Binary\\Apps directory of the distribution.
 |-------------|-------------------------------------------------------------|
 | TUNE        | Play .PT2, .PT3, .MYM audio files.                          |
 | FAT         | Access MS-DOS FAT filesystems from RomWBW (based on FatFs). |
+| INTTEST     | Test interrupt vector hooking.                              |
 
 Additional documentation on all of these applications can be found in
 “RomWBW Applications.pdf” in the Doc directory of the distribution.
@@ -1100,7 +1060,7 @@ through the normal startup process just like it was started from ROM.
 However, your ROM has not been updated and the next time you boot your
 system, it will revert to the system image contained in ROM.
 
-# Upgrading via Flash Utility
+## Upgrading via Flash Utility
 
 If you do not have easy access to a ROM programmer, it is usually
 possible to reprogram your system ROM using the FLASH utility from Will
@@ -1142,7 +1102,7 @@ To confirm your ROM chip has been successfully updated, restart your
 system and boot an operating system from ROM. Do not boot from a disk
 device yet. Review the boot messages to see if any issues have occurred.
 
-# Upgrading via XModem Flash Updater
+## Upgrading via XModem Flash Updater
 
 Similar to using the Flash utility, the system ROM can be updated or
 upgraded through the ROM based updater utility. This works by by
@@ -1157,7 +1117,7 @@ file.
 
 More information can be found in the ROM Applications document.
 
-# Post Update System Image and Application update process
+## Post Upgrade System Image and Application Update Process
 
 Once you are satisfied that the ROM is working well, you will need to
 update the system images and RomWBW custom applications on your disk
@@ -1226,21 +1186,20 @@ system on your disk.
 
     After this is done, you will need to use `SYSCOPY` to place the ZPM3
     loader image on the boot tracks of all ZPM3 boot disks/slices. The
-    loader image is called `CPMLDR.SYS`. You must then copy (at a
+    loader image is called `ZPMLDR.SYS`. You must then copy (at a
     minimum) `CPM3.SYS`, `ZCCP.COM`, `ZINSTAL.ZPM`, and `STARTZPM.COM`
     onto the disk/slice. Assuming you copied the ZPM3 boot files onto
     your RAM disk at A:, you would use:
 
-        A>B:SYSCOPY C:=CPMLDR.SYS
+        A>B:SYSCOPY C:=ZPMLDR.SYS
         A>B:COPY CPM3.SYS C:
         A>B:COPY ZCCP.COM C:
         A>B:COPY ZINSTAL.ZPM C:
         A>B:COPY STARTZPM.COM C:
 
-    You may be wondering if the references to `CPMLDR.SYS` and
-    `CPM3.SYS` are typos. They are not. ZPM3 uses the same loader image
-    as CPM3. The ZPM3 main system code file is called `CPM3.SYS` which
-    is the same name as CP/M 3 uses, but the file contents are not the
+    You may be wondering if the reference to `CPM3.SYS` is a typo. It is
+    not. The ZPM3 main system code file is called `CPM3.SYS` which is
+    the same name as CP/M 3 uses, but the file contents are not the
     same.
 
 Finally, if you have copies of any of the RomWBW custom applications on
@@ -1272,7 +1231,7 @@ images.
 -   FAT.COM
 -   TUNE.COM
 
-# System Update
+## System Update
 
 If the system running ROMWBW utilizes the SST39SF040 Flash chip then it
 is possible to do a System Update in place of a System Upgrade in some
@@ -1298,9 +1257,9 @@ extension “.rom” and be 512Kb or 1024Kb in size.
 Transferring and flashing the System Update is accomplished in the same
 manner as described above in *Upgrading* with the required difference
 being that the flash application needs to be directed to complete a
-partial flash using the /p command line switch.
+partial flash using the /P command line switch.
 
-`E>flash write rom.upd /p`
+`E>FLASH WRITE ROM.UPD /P`
 
 # RomWBW Distribution
 
@@ -1317,12 +1276,12 @@ set of directories. Each of these directories has it’s own ReadMe.txt
 file describing the contents in detail. In summary, these directories
 are:
 
-| Application | Description                                                                                                                             |
-|-------------|-----------------------------------------------------------------------------------------------------------------------------------------|
-| Binary      | The final output files of the build process are placed here. Most importantly, are the ROM images with the file names ending in “.rom”. |
-| Doc         | Contains various detailed documentation including the operating systems, RomWBW architecture, etc.                                      |
-| Source      | Contains the source code files used to build the software and ROM images.                                                               |
-| Tools       | Contains the MS Windows programs that are used by the build process or that may be useful in setting up your system.                    |
+| Application | Description                                                                                                                         |
+|-------------|-------------------------------------------------------------------------------------------------------------------------------------|
+| Binary      | The final output files of the build process are placed here. Most importantly, the ROM images with the file names ending in “.rom”. |
+| Doc         | Contains various detailed documentation including the operating systems, RomWBW architecture, etc.                                  |
+| Source      | Contains the source code files used to build the software and ROM images.                                                           |
+| Tools       | Contains the MS Windows programs that are used by the build process or that may be useful in setting up your system.                |
 
 # Acknowledgments
 
@@ -1343,10 +1302,11 @@ applications are no longer provided.
     driver.
 -   Ed Brindley contributed some of the code that supports the RC2014
     platform.
--   Phil Summers contributed Forth and BASIC in ROM, the AY-3-8910 sound
-    driver as well as a long list of general code enhancements.
+-   Phil Summers contributed the Forth and BASIC adaptations in ROM, the
+    AY-3-8910 sound driver as well as a long list of general code
+    enhancements.
 -   Phillip Stevens contributed support for FreeRTOS.
--   Curt Mayer contributed the Linux / MacOS build process.
+-   Curt Mayer contributed the original Linux / MacOS build process.
 -   UNA BIOS and FDISK80 are the products of John Coffman.
 -   FLASH4 is a product of Will Sowerbutts.
 -   CLRDIR is a product of Max Scane.
@@ -1357,6 +1317,48 @@ applications are no longer provided.
 
 Contributions of all kinds to RomWBW are very welcome.
 
+# Licensing
+
+RomWBW is free software: you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation, either version 3 of the License, or (at your
+option) any later version.
+
+RomWBW is distributed in the hope that it will be useful, but WITHOUT
+ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+more details.
+
+You should have received a copy of the GNU General Public License along
+with RomWBW. If not, see <https://www.gnu.org/licenses/>.
+
+Portions of RomWBW were created by, contributed by, or derived from the
+work of others. It is believed that these works are being used in
+accordance with the intentions and/or licensing of their creators.
+
+If anyone feels their work is being used outside of it’s intended
+licensing, please notify:
+
+> Wayne Warthen  
+> wwarthen@gmail.com
+
+RomWBW is an aggregate work. It is composed of many individual,
+standalone programs that are distributed as a whole to function as a
+cohesive system. Each program may have it’s own licensing which may be
+different from other programs within the aggregate.
+
+In some cases, a single program (e.g., CP/M Operating System) is
+composed of multiple components with different licenses. It is believed
+that in all such cases the licenses are compatible with GPL version 3.
+
+RomWBW encourages code contributions from others. Contributors may
+assert their own copyright in their contributions by annotating the
+contributed source code appropriately. Contributors are further
+encouraged to submit their contributions via the RomWBW source code
+control system to ensure their contributions are clearly documented.
+
+All contributions to RomWBW are subject to this license.
+
 # Getting Assistance
 
 The best way to get assistance with RomWBW or any aspect of the

ReadMe.txt

@@ -1,6 +1,6 @@
 RomWBW Getting Started
 Wayne Warthen (mailto:wwarthen@gmail.com)
-08 Dec 2021
+21 Mar 2022
 
 
 
@@ -17,7 +17,7 @@ RomWBW
 Z80/Z180 System Software
 
 Version 3.1 Pre-release
-08 Dec 2021
+21 Mar 2022
 
 Wayne Warthen wwarthen@gmail.com
 
@@ -460,7 +460,7 @@ therefore, globally available.
 
   TIMER         Display value of running periodic system timer.
 
-  INTTEST       Test interrupt vector hooking.
+  CPUSPD        Change the running CPU speed and wait states of the system.
   -----------------------------------------------------------------------------
 
 Some custom applications do not fit on the ROM disk. They are found on
@@ -471,6 +471,7 @@ Binary\Apps directory of the distribution.
   ------------- -------------------------------------------------------------
   TUNE          Play .PT2, .PT3, .MYM audio files.
   FAT           Access MS-DOS FAT filesystems from RomWBW (based on FatFs).
+  INTTEST       Test interrupt vector hooking.
 
 Additional documentation on all of these applications can be found in
 “RomWBW Applications.pdf” in the Doc directory of the distribution.
@@ -1154,7 +1155,7 @@ file.
 
 More information can be found in the ROM Applications document.
 
-Post Update System Image and Application update process
+Post Upgrade System Image and Application Update Process
 
 Once you are satisfied that the ROM is working well, you will need to
 update the system images and RomWBW custom applications on your disk
@@ -1222,21 +1223,20 @@ system on your disk.
 
     After this is done, you will need to use SYSCOPY to place the ZPM3
     loader image on the boot tracks of all ZPM3 boot disks/slices. The
-    loader image is called CPMLDR.SYS. You must then copy (at a minimum)
+    loader image is called ZPMLDR.SYS. You must then copy (at a minimum)
     CPM3.SYS, ZCCP.COM, ZINSTAL.ZPM, and STARTZPM.COM onto the
     disk/slice. Assuming you copied the ZPM3 boot files onto your RAM
     disk at A:, you would use:
 
-        A>B:SYSCOPY C:=CPMLDR.SYS
+        A>B:SYSCOPY C:=ZPMLDR.SYS
         A>B:COPY CPM3.SYS C:
         A>B:COPY ZCCP.COM C:
         A>B:COPY ZINSTAL.ZPM C:
         A>B:COPY STARTZPM.COM C:
 
-    You may be wondering if the references to CPMLDR.SYS and CPM3.SYS
-    are typos. They are not. ZPM3 uses the same loader image as CPM3.
-    The ZPM3 main system code file is called CPM3.SYS which is the same
-    name as CP/M 3 uses, but the file contents are not the same.
+    You may be wondering if the reference to CPM3.SYS is a typo. It is
+    not. The ZPM3 main system code file is called CPM3.SYS which is the
+    same name as CP/M 3 uses, but the file contents are not the same.
 
 Finally, if you have copies of any of the RomWBW custom applications on
 your hard disk, you need to update them with the latest copies. The
@@ -1292,9 +1292,9 @@ extension “.rom” and be 512Kb or 1024Kb in size.
 Transferring and flashing the System Update is accomplished in the same
 manner as described above in Upgrading with the required difference
 being that the flash application needs to be directed to complete a
-partial flash using the /p command line switch.
+partial flash using the /P command line switch.
 
-E>flash write rom.upd /p
+E>FLASH WRITE ROM.UPD /P
 
 RomWBW Distribution
 
@@ -1314,8 +1314,8 @@ are:
   Application   Description
   ------------- ------------------------------------------------------------
   Binary        The final output files of the build process are placed here.
-                Most importantly, are the ROM images with the file names
-                ending in “.rom”.
+                Most importantly, the ROM images with the file names ending
+                in “.rom”.
 
   Doc           Contains various detailed documentation including the
                 operating systems, RomWBW architecture, etc.
@@ -1346,10 +1346,11 @@ applications are no longer provided.
     driver.
 -   Ed Brindley contributed some of the code that supports the RC2014
     platform.
--   Phil Summers contributed Forth and BASIC in ROM, the AY-3-8910 sound
-    driver as well as a long list of general code enhancements.
+-   Phil Summers contributed the Forth and BASIC adaptations in ROM, the
+    AY-3-8910 sound driver as well as a long list of general code
+    enhancements.
 -   Phillip Stevens contributed support for FreeRTOS.
--   Curt Mayer contributed the Linux / MacOS build process.
+-   Curt Mayer contributed the original Linux / MacOS build process.
 -   UNA BIOS and FDISK80 are the products of John Coffman.
 -   FLASH4 is a product of Will Sowerbutts.
 -   CLRDIR is a product of Max Scane.
@@ -1360,6 +1361,48 @@ applications are no longer provided.
 
 Contributions of all kinds to RomWBW are very welcome.
 
+Licensing
+
+RomWBW is free software: you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation, either version 3 of the License, or (at your
+option) any later version.
+
+RomWBW is distributed in the hope that it will be useful, but WITHOUT
+ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+more details.
+
+You should have received a copy of the GNU General Public License along
+with RomWBW. If not, see https://www.gnu.org/licenses/.
+
+Portions of RomWBW were created by, contributed by, or derived from the
+work of others. It is believed that these works are being used in
+accordance with the intentions and/or licensing of their creators.
+
+If anyone feels their work is being used outside of it’s intended
+licensing, please notify:
+
+  Wayne Warthen
+  wwarthen@gmail.com
+
+RomWBW is an aggregate work. It is composed of many individual,
+standalone programs that are distributed as a whole to function as a
+cohesive system. Each program may have it’s own licensing which may be
+different from other programs within the aggregate.
+
+In some cases, a single program (e.g., CP/M Operating System) is
+composed of multiple components with different licenses. It is believed
+that in all such cases the licenses are compatible with GPL version 3.
+
+RomWBW encourages code contributions from others. Contributors may
+assert their own copyright in their contributions by annotating the
+contributed source code appropriately. Contributors are further
+encouraged to submit their contributions via the RomWBW source code
+control system to ensure their contributions are clearly documented.
+
+All contributions to RomWBW are subject to this license.
+
 Getting Assistance
 
 The best way to get assistance with RomWBW or any aspect of the

Readme.unix

@@ -19,10 +19,14 @@ with respect to the .DS directive. it's usually a bad idea to mix
 It assumes that you have some standard system tools and libraries 
 installed, specifically: gcc, gnu make, libncurses, and srecord.
 Typically, something like this will take care of adding all
-required packages:
+required packages in Linux:
 
 	sudo apt install build-essential libncurses-dev srecord
 
+For MacOS, you will need:
+
+	brew install srecord
+
 To build:
 	cd to the top directory and type "make".
 
@@ -40,16 +44,20 @@ the "SCZ180" platform:
 
 	make ROM_PLATFORM=SCZ180 ROM_CONFIG=126
 
-Please be aware that the make-based build does have a couple of
-deficiencies.
+Please be aware that the make-based build does have a few deficiencies.
+
+First and most important, the Makefiles do not handle reruns very well.
+To ensure a full buld, use "make clobber" from the top level directory
+before running the actual build.  For those used to using "make clean",
+you can do that but it is not as thorough as "make clobber".
 
-First, there are some build failures that will not stop the make 
-process.  Some of this is because real CP/M 2.2 tools are used in 
+Second, there are some build failures that will not stop the make 
+process.  Most of this is because real CP/M 2.2 tools are used in 
 places and CP/M 2.2 does not allow programs to return a result code.
 
-Second, not all dependencies are properly handled.  So, changes to some
+Third, not all dependencies are properly handled.  So, changes to some
 files will not cause things to rebuild as appropriate.  In general, I
-recommend doing a "make clean" before running "make" to ensure that
+recommend doing a "make clobber" before running "make" to ensure that
 everything is fully rebuilt.
 
 For macOS users, you may encounter a failure reading or writing files.

Source/Apps/Build.cmd

@@ -4,13 +4,11 @@ setlocal
 set TOOLS=../../Tools
 set APPBIN=..\..\Binary\Apps
 
-set PATH=%TOOLS%\tasm32;%TOOLS%\zx;%PATH%
+set PATH=%TOOLS%\tasm32;%TOOLS%\zxcc;%PATH%
 
 set TASMTABS=%TOOLS%\tasm32
 
-set ZXBINDIR=%TOOLS%/cpm/bin/
-set ZXLIBDIR=%TOOLS%/cpm/lib/
-set ZXINCDIR=%TOOLS%/cpm/include/
+set CPMDIR80=%TOOLS%/cpm/
 
 call :asm syscopy || exit /b
 call :asm assign || exit /b
@@ -21,10 +19,10 @@ call :asm rtc || exit /b
 call :asm timer || exit /b
 call :asm rtchb || exit /b
 
-zx Z80ASM -SYSGEN/F || exit /b
+zxcc Z80ASM -SYSGEN/F || exit /b
 
-zx MAC SURVEY.ASM -$PO || exit /b
-zx MLOAD25 -SURVEY.COM=SURVEY.HEX || exit /b
+zxcc MAC SURVEY.ASM -$PO || exit /b
+zxcc MLOAD25 -SURVEY.COM=SURVEY.HEX || exit /b
 
 pushd XM && call Build || exit /b & popd
 pushd FDU && call Build || exit /b & popd
@@ -35,6 +33,7 @@ pushd ZMP && call Build || exit /b & popd
 pushd ZMD && call Build || exit /b & popd
 pushd Dev && call Build || exit /b & popd
 pushd VGM && call Build || exit /b & popd
+pushd cpuspd && call Build || exit /b & popd
 
 copy *.com %APPBIN%\ || exit /b
 

Source/Apps/Clean.cmd

@@ -16,3 +16,4 @@ pushd ZMP && call Clean || exit /b 1 & popd
 pushd ZMD && call Clean || exit /b 1 & popd
 pushd Dev && call Clean || exit /b 1 & popd
 pushd VGM && call Clean || exit /b 1 & popd
+pushd cpuspd && call Clean || exit /b 1 & popd

Source/Apps/Makefile

@@ -1,7 +1,7 @@
 OBJECTS = sysgen.com survey.com \
 	syscopy.com assign.com format.com talk.com mode.com rtc.com \
 	timer.com rtchb.com
-SUBDIRS = XM FDU FAT Tune Test ZMP ZMD Dev VGM
+SUBDIRS = XM FDU FAT Tune Test ZMP ZMD Dev VGM cpuspd
 DEST = ../../Binary/Apps
 TOOLS =../../Tools
 

Source/Apps/Test/2piotst/2piotst.mac

@@ -0,0 +1,567 @@
+; 24.9.2018 PMS (b1ackmai1er)
+; Modified version for ECB-ZILOG PERIPHERALS BOARD - TEST 2 PIO's
+; 01.11.2011 WKA
+; Assembler M80
+; ECB-4PIO
+; Testprogramm f�r die I/O-Karte ECB-4PIO in Z80-Mnemonics
+
+	PAGE 	72
+	.Z80
+	ASEG
+	ORG 	100H
+;
+;CP/M-ADDRESSES
+;* * * * * * * 
+;
+BOOT	EQU 0		;WARMBOOT CP/M
+BDOS	EQU 5		;ENTRY BDOS
+NMI	EQU 66H		;Error-ROUTINE
+;
+;CONSOLE-CODES
+;* * * * * * *
+;
+EOT	EQU 4		;END OF TEXT
+BS	EQU 8		;BACKSPACE
+TAB	EQU 9		;TABULATOR
+LF	EQU 0AH		;LINE-FEED
+CR	EQU 0DH		;CARRIAGE-RETURN
+FF	EQU 0CH		;FORM-FEED
+ESC	EQU 1BH		;ESCAPE
+CTRLC	EQU 'C'-40H	;CONTROL-C
+CTRLW	EQU 'W'-40H	;CONTROL-W
+CTRLX	EQU 'X'-40H	;CONTROL-X
+CTRLY	EQU 'Y'-40H	;CONTROL-Y
+CTRLZ	EQU 'Z'-40H	;CONTROL-Z
+;
+BASE 	EQU 0B8H 	; 4 DIL-SCHALTER
+;
+PIO0AD	EQU BASE+0 	; PIO 0 A DATEN
+PIO0AC	EQU BASE+2 	; PIO 0 A CONTROL
+PIO0BD	EQU BASE+1 	; PIO 0 B DATEN
+PIO0BC	EQU BASE+3 	; PIO 0 B CONTROL
+;
+PIO1AD	EQU BASE+4 	; PIO 1 A DATEN
+PIO1AC	EQU BASE+6 	; PIO 1 A CONTROL
+PIO1BD	EQU BASE+5 	; PIO 1 B DATEN
+PIO1BC	EQU BASE+7 	; PIO 1 B CONTROL
+;
+MAIN:	LD	DE,PIO_SRTMSG
+	CALL	PSTRIN
+;
+	LD	DE,INI_MSG
+	CALL	PSTRIN
+	CALL	INIT
+;
+	LD	DE,PIO0ADW	;PIO0 A
+	CALL	PSTRIN
+	LD	A,55H
+	PUSH	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+	CALL	PSTRIN
+	POP	AF
+	OUT	(PIO0AD),A
+	IN	A,(PIO0AD)
+	PUSH	AF
+;
+	LD	DE,PIO0ADR
+	CALL	PSTRIN
+	POP	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+	CALL	PSTRIN
+;
+	LD	DE,PIO0ADW
+	CALL	PSTRIN
+	LD	A,0AAH
+	PUSH	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+	CALL	PSTRIN
+	POP	AF
+	OUT	(PIO0AD),A
+	IN	A,(PIO0AD)
+	PUSH	AF
+;
+	LD	DE,PIO0ADR
+	CALL	PSTRIN
+	POP	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+	CALL	PSTRIN
+;
+	LD	DE,PIO0BDW	;PIO0 B
+	CALL	PSTRIN
+	LD	A,55H
+	PUSH	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+	CALL	PSTRIN
+	POP	AF
+	OUT	(PIO0BD),A
+	IN	A,(PIO0BD)
+	PUSH	AF
+;
+	LD	DE,PIO0BDR
+	CALL	PSTRIN
+	POP	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+	CALL	PSTRIN
+;
+	LD	DE,PIO0BDW
+	CALL	PSTRIN
+	LD	A,0AAH
+	PUSH	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+	CALL	PSTRIN
+	POP	AF
+	OUT	(PIO0BD),A
+	IN	A,(PIO0BD)
+	PUSH	AF
+;
+	LD	DE,PIO0BDR
+	CALL	PSTRIN
+	POP	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+	CALL	PSTRIN
+;
+	LD	DE,PIO1ADW	;PIO1 A
+	CALL	PSTRIN
+	LD	A,55H
+	PUSH	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+	CALL	PSTRIN
+	POP	AF
+	OUT	(PIO1AD),A
+	IN	A,(PIO1AD)
+	PUSH	AF
+;
+	LD	DE,PIO1ADR
+	CALL	PSTRIN
+	POP	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+	CALL	PSTRIN
+;
+	LD	DE,PIO1ADW
+	CALL	PSTRIN
+	LD	A,0AAH
+	PUSH	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+	CALL	PSTRIN
+	POP	AF
+	OUT	(PIO1AD),A
+	IN	A,(PIO1AD)
+	PUSH	AF
+;
+	LD	DE,PIO1ADR
+	CALL	PSTRIN
+	POP	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+	CALL	PSTRIN
+;
+	LD	DE,PIO1BDW	;PIO1 B
+	CALL	PSTRIN
+	LD	A,55H
+	PUSH	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+	CALL	PSTRIN
+	POP	AF
+	OUT	(PIO1BD),A
+	IN	A,(PIO1BD)
+	PUSH	AF
+;
+	LD	DE,PIO1BDR
+	CALL	PSTRIN
+	POP	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+	CALL	PSTRIN
+;
+	LD	DE,PIO1BDW
+	CALL	PSTRIN
+	LD	A,0AAH
+	PUSH	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+ 	CALL	PSTRIN
+	POP	AF
+	OUT	(PIO1BD),A
+	IN	A,(PIO1BD)
+	PUSH	AF
+;
+	LD	DE,PIO1BDR
+	CALL	PSTRIN
+	POP	AF
+	CALL	OUTB
+	LD	DE,LINE_E
+	CALL	PSTRIN
+;
+	LD	DE,PIO_ENDMSG
+	CALL	PSTRIN
+	JP	BOOT
+;
+;==========================================================================
+INIT:	LD 	HL,PIO0T	; PIO0 INITITALISIEREN
+	CALL 	INITX
+        LD 	HL,PIO1T 	; PIO1 INITITALISIEREN
+        CALL 	INITX
+	RET
+;
+INITX:	LD 	A,(HL) 		; BYTE-ANZAHL
+	OR 	A
+	RET 	Z
+	LD 	B,A		; Port-Adresse nach C
+        INC 	HL
+        LD 	C,(HL)
+        INC 	HL
+        OTIR
+        JR 	INITX
+;
+PIO0T:	DEFB 05 		; 5 BYTE ZUM PIO 0 A CONTROL
+	DEFB PIO0AC
+        DEFB 00000011B 		; DIS-INT
+        DEFB 01001111B 		; BETR.ART BYTE EINGABE
+        DEFB 01001111B 		; BETR.ART BYTE EINGABE
+        DEFB 11001111B 		; BETR.ART BIT EIN/AUSG.
+        DEFB 00000000B 		; ALLES AUSG.
+        DEFB 01 		; 1 BYTE ZUM PIO 0 A DATEN
+	DEFB PIO0AD
+        DEFB 00000000B		; DATEN "LOW"
+;
+        DEFB 05 		; 5 BYTE ZUM PIO 0 B CONTROL
+	DEFB PIO0BC
+        DEFB 00000011B 		; DIS-INT
+        DEFB 01001111B 		; BETR.ART BYTE EINGABE
+        DEFB 01001111B		; BETR.ART BYTE EINGABE
+        DEFB 11001111B 		; BETR.ART BIT EIN/AUSG.
+        DEFB 00000000B 		; ALLES AUSG.
+        DEFB 01 		; 1 BYTE ZUM PIO 0 B DATEN
+	DEFB PIO0BD
+        DEFB 00000000B		; DATEN "LOW"
+        DEFB 0 			; ENDE PIO 0 B -TABELLE
+;
+PIO1T:	DEFB 05 		; 5 BYTE ZUM PIO 1 A CONTROL
+	DEFB PIO1AC
+        DEFB 00000011B 		; DIS-INT
+        DEFB 01001111B 		; BETR.ART BYTE EINGABE
+        DEFB 01001111B 		; BETR.ART BYTE EINGABE
+        DEFB 11001111B 		; BETR.ART BIT EIN/AUSG.
+        DEFB 00000000B 		; ALLES AUSG.
+        DEFB 01 		; 1 BYTE ZUM PIO 1 A DATEN
+	DEFB PIO1AD
+        DEFB 00000000B		; DATEN "LOW"
+;
+        DEFB 05 		; 5 BYTE ZUM PIO 1 B CONTROL
+	DEFB PIO1BC
+        DEFB 00000011B 		; DIS-INT
+        DEFB 01001111B 		; BETR.ART BYTE EINGABE
+        DEFB 01001111B 		; BETR.ART BYTE EINGABE
+        DEFB 11001111B 		; BETR.ART BIT EIN/AUSG.
+        DEFB 00000000B 		; ALLES AUSG.
+        DEFB 01 		; 1 BYTE ZUM PIO 1 B DATEN
+	DEFB PIO1BD
+        DEFB 00000000B		; DATEN "LOW"
+        DEFB 0 			; ENDE PIO 1 B -TABELLE
+;
+;==========================================================================
+;
+;Output on Screen
+;****************
+;
+PRBS:	LD E,BS
+	CALL PCHAR
+	RET
+;
+;Output CR+LF on Screen
+;**********************
+;
+CRLF:	LD E,CR
+	CALL PCHAR
+	LD E,LF
+	CALL PCHAR
+	RET
+;
+;Output ASCII-Character
+;**********************
+;
+PRINP:	PUSH AF
+	LD E,A
+	CALL PCHAR
+	POP AF
+	RET;
+;
+;CALL BDOS with Register Save
+;****************************
+;
+INCHA:	LD C,1		;INPUT CHARACTER TO A
+	JR BDO
+PCHAR:	LD C,2		;PRINT CHARACTER IN E
+	JR BDO
+PSTRIN:	LD C,9		;PRINT STRING
+	JR BDO
+INBUFF:	LD C,10		;READ CONSOLE-BUFFER
+	JR BDO
+CSTS:	LD C,11		;CONSOLE-STATUS
+	JR BDO
+OPEN:	LD C,15		;OPEN FILE
+	JR BDO
+CLOSE:	LD C,16		;CLOSE FILE
+	JR BDO
+DELETE:	LD C,19		;DELETE FILE
+	JR BDO
+READS:	LD C,20		;READ SEEK
+	JR BDO
+WRITES:	LD C,21		;WRITE SEEK
+	JR BDO
+MAKE:	LD C,22		;MAKE FILE
+	JR BDO
+SETDMA:	LD C,26		;SET DMA-ADDRESS
+BDO:	PUSH HL
+	PUSH DE
+	PUSH BC
+	PUSH IX
+	PUSH IY
+	CALL BDOS
+	POP IY
+	POP IX
+	POP BC
+	POP DE
+	POP HL
+	RET
+;
+;DIRECT CONSOLE INPUT
+;********************
+;
+INDCON:	CALL INDCOX
+	CP 0
+	JR Z,INDCON
+	RET
+;
+INDCOX:	LD C,6		;Code for Direct Console Input
+	LD E,0FFH	;Code for Input
+	PUSH HL
+	PUSH DE
+	PUSH BC
+	PUSH IX
+	PUSH IY
+	CALL BDOS
+	POP IY
+	POP IX
+	POP BC
+	POP DE
+	POP HL
+	RET
+;
+;
+;Output WORD
+;***********
+;
+;PARAMETER: Entry WORD IN HL
+;*********
+;
+OUTW:	LD A,H
+	CALL OUTB
+	LD A,L
+	CALL OUTB
+	RET
+;
+;Output BYTE
+;***********
+;
+;PARAMETER: Entry BYTE IN A
+;*********
+;
+OUTB:	PUSH AF
+	RRCA
+	RRCA
+	RRCA
+	RRCA
+	AND 0FH
+	CALL HBTHE	;Change Half-BYTE
+	POP AF
+	AND 0FH
+	CALL HBTHE
+	RET
+;
+;Output HALF-BYTE
+;****************
+;
+;PARAMETER: Entry Half-BYTE IN A (BIT 0 - 3)
+;*********
+;
+HBTHE:	CP 0AH
+	JR C,HBTHE1
+	ADD A,7		;Character to Letter
+HBTHE1:	ADD A,30H
+	LD E,A
+	CALL PCHAR
+	RET
+;
+;Input ADDRESS
+;*************
+;
+;PARAMETER: Exit with ADDRESS IN HL
+;*********
+;
+INADR:	LD HL,0
+INADR1:	CALL INCHAR	;Input TETRADE
+	LD D,A
+	CALL INBYT1	;IN HEXA
+	RET C		;END OF Input
+	ADD HL,HL
+	ADD HL,HL
+	ADD HL,HL
+	ADD HL,HL
+	OR L
+	LD L,A
+	JR INADR1	;New Key
+;
+;
+;Input BYTE
+;**********
+;
+;PARAMTER: Exit with BYTE IN A
+;********
+;
+INBYT:	CALL INADR
+	LD A,L
+	RET
+;
+;Input of one TETRADE to A (BIT 0-3)
+;************************************
+;
+INBYT1:	SUB '0'
+	RET C
+	CP 'G'-30H
+	JR NC,INBYT3	;Error
+	CP ':'-30H
+	JR C,INBYT2
+	CP 'A'-30H
+	JR C,INBYT3	;Error
+	SUB 7
+INBYT2:	OR A
+	RET
+;
+INBYT3:	SCF
+	RET
+;
+;Input ASCII-Character to A
+;**************************
+;
+INCON:	CALL INDCON	;Input ASCII-Character to A
+	CP CTRLC	;TEST CONTROL-C
+	JP Z,QUIT
+	CP CTRLX	;TEST CONTROL-X
+	JR Z,INCHA1
+	CP CTRLW	;TEST CONTROL-W
+	JR Z,INCHA3
+	CP CTRLY	;TEST CONTROL-Y
+	JR Z,INCHA2
+	CP BS
+	RET Z
+	CP CR
+	RET Z
+	CP ' '
+	JR C,INCON
+	JR INCH1
+;
+INCHAR:	CALL INCHA	;Input ASCII-Character to A
+	CP CTRLC	;TEST CONTROL-C
+	JR Z,QUIT
+	CP CTRLX	;TEST CONTROL-X
+	JR Z,INCHA1
+	CP CTRLW	;TEST CONTROL-W
+	JR Z,INCHA3
+	CP CTRLY	;TEST CONTROL-Y
+	JR Z,INCHA2
+	CP BS
+	RET Z
+	CP CR
+	RET Z
+	CP ' '
+	JR C,INCHAR	;Input invalied
+;
+INCH1:	CP 'A'
+	RET C		;Character ok
+;
+	RES 5,A		;lower case -> upper case
+	RET
+INCHA1:	POP HL
+	LD E,FF
+	CALL PCHAR	;Clear screen
+	JP GOON
+INCHA2:	POP HL
+	LD E,FF
+	CALL PCHAR	;Clear screen
+	JP GOON
+INCHA3:	LD E,FF
+	CALL PCHAR
+	RET
+;
+;ABBRUCH DER BEARBEITUNG
+;***********************
+;
+COMPLT:	LD DE,TCOMP
+	CALL PSTRIN
+	JP GOON
+QUIT:	CALL CRLF
+	LD DE,TQUIT
+	JR FINIS
+INTTIM:	POP DE		;STACK OK
+;	CALL DESAK
+	LD DE,TNMIAB
+	CALL PSTRIN
+	LD DE,MAIN	;NEW ADDRESS
+	PUSH DE
+	RETN
+FINIS:	CALL PSTRIN	;AT BDOS-ERROR
+GOON:
+	JP BOOT
+;
+;
+;TEXT-Messages
+;*************
+;
+TCOMP:	DEFB ESC,21,0,14H,ESC,23,0
+	DEFM 'Function complete !!$'
+TQUIT:	DEFB ESC,23,0,14H,7
+	DEFM 'End Run RAMFTEST$'
+TNMIAB:	DEFB ESC,23,0,14H
+	DEFM 'Time Out !!$'
+;
+;
+INI_MSG:DEFM	'ECB-4PIO Init all PIO Bit-Mode ',CR,LF,'$'
+PIO0ADW:DEFM	'ECB-4PIO Write to  PIO0AD ','$'
+PIO0ADR:DEFM	'ECB-4PIO Read from PIO0AD ','$'
+PIO0BDW:DEFM	'ECB-4PIO Write to  PIO0BD ','$'
+PIO0BDR:DEFM	'ECB-4PIO Read from PIO0BD ','$'
+PIO1ADW:DEFM	'ECB-4PIO Write to  PIO1AD ','$'
+PIO1ADR:DEFM	'ECB-4PIO Read from PIO1AD ','$'
+PIO1BDW:DEFM	'ECB-4PIO Write to  PIO1BD ','$'
+PIO1BDR:DEFM	'ECB-4PIO Read from PIO1BD ','$'
+
+PIO_SRTMSG:
+	DEFM	'ECB-ZILOG PERIPHERALS start test 1.0',CR,LF,'$'
+PIO_ENDMSG:	
+	DEFM	'ECB-ZILOG PERIPHERALS end test 1.0',CR,LF,'$'
+LINE_E:	DEFM	'H',CR,LF,'$'
+;
+	IF1
+	.PRINTX 'Pass 1 complete'
+	ENDIF
+;
+	IF2
+	.PRINTX 'Pass 2 complete'
+	.PRINTX 'Assembly complete'
+	ENDIF
+;
+	END	
+

Source/Apps/Test/2piotst/Build.cmd

@@ -0,0 +1,13 @@
+@echo off
+setlocal
+
+set TOOLS=..\..\..\..\Tools
+
+set PATH=%TOOLS%\zxcc;%PATH%
+
+set CPMDIR80=%TOOLS%/cpm/
+
+zxcc M80 -=2piotst/l || exit /b
+zxcc L80 -2piotst,2piotst.com/n/e || exit /b
+
+copy /Y 2piotst.com ..\..\..\..\Binary\Apps\Test\ || exit /b

Source/Apps/Test/2piotst/Clean.cmd

@@ -0,0 +1,8 @@
+@echo off
+setlocal
+
+if exist *.com del *.com
+if exist *.lst del *.lst
+if exist *.bin del *.bin
+if exist *.rel del *.rel
+if exist *.prn del *.prn

Source/Apps/Test/2piotst/Makefile

@@ -0,0 +1,8 @@
+OBJECTS = 2piotst.com
+DEST = ../../../../Binary/Apps/Test
+TOOLS =../../../../Tools
+OTHERS = *.rel
+
+include $(TOOLS)/Makefile.inc
+
+2piotst.com : 2piotst.rel

Source/Apps/Test/Build.cmd

@@ -4,13 +4,11 @@ setlocal
 set TOOLS=../../../Tools
 set APPBIN=..\..\Binary\Apps
 
-set PATH=%TOOLS%\tasm32;%TOOLS%\zx;%PATH%
+set PATH=%TOOLS%\tasm32;%TOOLS%\zxcc;%PATH%
 
 set TASMTABS=%TOOLS%\tasm32
 
-set ZXBINDIR=%TOOLS%/cpm/bin/
-set ZXLIBDIR=%TOOLS%/cpm/lib/
-set ZXINCDIR=%TOOLS%/cpm/include/
+set CPMDIR80=%TOOLS%/cpm/
 
 pushd DMAmon && call Build || exit /b & popd
 pushd tstdskng && call Build || exit /b & popd
@@ -21,7 +19,9 @@ pushd I2C && call Build || exit /b & popd
 pushd rzsz && call Build || exit /b & popd
 pushd vdctest && call Build || exit /b & popd
 pushd kbdtest && call Build || exit /b & popd
-pushd kbdinfo && call Build || exit /b & popd
+pushd ps2info && call Build || exit /b & popd
+pushd 2piotst && call Build || exit /b & popd
+pushd piomon && call Build || exit /b & popd
 
 goto :eof
 

Source/Apps/Test/Clean.cmd

@@ -16,4 +16,6 @@ pushd I2C && call Clean || exit /b 1 & popd
 pushd rzsz && call Clean || exit /b 1 & popd
 pushd vdctest && call Clean || exit /b 1 & popd
 pushd kbdtest && call Clean || exit /b 1 & popd
-pushd kbdinfo && call Clean || exit /b 1 & popd
+pushd ps2info && call Clean || exit /b 1 & popd
+pushd 2piotst && call Clean || exit /b 1 & popd
+pushd piomon && call Clean || exit /b 1 & popd

Source/Apps/Test/DMAmon/Readme.txt

@@ -1 +1,8 @@
 DMAmon is a program to verify operation of the Z80 MBC DMA board
+
+Version 2 has been hacked to include testing for interrupts.  This
+requires running the application under RomWBW using IM2.  There
+is an equate in the source file to disable interrupt testing
+if needed.
+
+--WBW 10:36 AM 3/14/2022

Source/Apps/Test/DMAmon/dmamon.asm

@@ -16,6 +16,14 @@ TRUE		.EQU	~FALSE
 SPD_FIXED	.EQU	0		; PLATFORM SPEED FIXED AND CANNOT CHANGE SPEEDS
 SPD_HILO	.EQU	1		; PLATFORM CAN CHANGE BETWEEN TWO SPEEDS
 ;
+; INTERRUPT TESTING CONFIGURATION
+; N.B., INTERRUPT TESTING REQUIRES ROMWBW!!!
+; ASSUMES SYSTEM IS ALREADY CONFIGURED FOR IM2 OPERATION
+; INTIDX MUST BE SET TO AN UNUSED INTERRUPT SLOT
+;		
+INTENABLE	.EQU	TRUE		; ENABLE INT TESTING
+INTIDX		.EQU	1		; INT VECTOR INDEX
+;
 ; SYSTEM SPEED CHARACTERISTICS
 ;
 SPD_UNSUP	.EQU	0		; PLATFORM CAN CHANGE SPEEDS BUT IS UNSUPPORTED
@@ -56,14 +64,20 @@ DMA_RESET			.equ	$c3
 ;DMA_RESET_PORT_B_TIMING	.equ	$cb
 ;DMA_CONTINUE			.equ	$d3
 ;DMA_DISABLE_INTERUPTS		.equ	$af
-;DMA_ENABLE_INTERUPTS		.equ	$ab
+DMA_ENABLE_INTERUPTS		.equ	$ab
 ;DMA_RESET_DISABLE_INTERUPTS	.equ 	$a3
 ;DMA_ENABLE_AFTER_RETI		.equ	$b7
-;DMA_REINIT_STATUS_BYTE		.equ	$8b
+DMA_REINIT_STATUS_BYTE		.equ	$8b
 ;
 DMA_RDY				.EQU	%00001000
 DMA_FORCE			.EQU	0
-
+;
+bf_sysint			.equ	$FC	; INT function
+;		
+bf_sysintinfo			.equ	$00	; INT INFO subfunction
+bf_sysintget			.equ	$10	; INT GET subfunction
+bf_sysintset			.equ	$20	; INT SET subfunction
+;
 #IF (DMA_USEHS & (DMAMODE=DMAMODE_MBC))
 #IF (CPUSPDDEF=SPD_HIGH)
 #DEFINE DMAIOSLO LD A,(HB_RTCVAL) \ AND %11110111 \ OUT (RTCIO),A 
@@ -100,66 +114,128 @@ MAIN:
 	LD	SP,STACK		; STACK
 ;
 	call	PRTSTRD			; WELCOME
-	.db	"DMA MONITOR\n\r$"
+	.db	"\n\rDMA Monitor V2\n\r$"
+;
+#IF (INTENABLE)
+;
+	; Install interrupt handler in upper mem
+	ld	hl,reladr
+	ld	de,$A000
+	ld	bc,hsiz
+	ldir
+;
+	; Install interrupt vector (RomWBW specific!!!)
+	ld	hl,int		; pointer to my interrupt handler
+	ld	b,bf_sysint
+	ld	c,bf_sysintset	; set new vector
+	ld	e,INTIDX	; vector idx
+	di
+	rst	08		; do it
+	ld	(orgvec),hl	; save the original vector
+	ei			; interrupts back on
+;
+#ENDIF
 ;
 MENULP:	CALL	DISPM			; DISPLAY MENU
 	CALL	CIN			; GET SELECTION
-;
+	; Force upper case
+	CP	'a'			; < 'a'
+	JR	C,MENULP1		; IF SO, JUST CONTINUE
+	CP	'z'+1			; > 'z'
+	JR	NC,MENULP1		; IS SO, JUST CONTINUE
+	SUB	'a'-'A'			; CONVERT TO UPPER
+;
+MENULP1:
+	CALL	NEWLINE
 	CP	'D'
 	JP	Z,DMATST_D		; DUMP REGISTERS
 	CP	'I'
 	JP	Z,DMATST_I		; INITIALIZE
+#IF (INTENABLE)
+	CP	'T'
+	JP	Z,DMATST_T		; TOGGLE INT USAGE
+#ENDIF
 	CP	'M'
-	JP	Z,DMATST_M		; MEMORY MOVE
+	JP	Z,DMATST_M		; MEMORY COPY
+	CP	'N'
+	JP	Z,DMATST_N		; MEMORY COPY ITER
 	CP	'0'
 	JP	Z,DMATST_01
 	CP	'1'
-	JR	Z,DMATST_01
+	JP	Z,DMATST_01
 	CP	'R'
 	JP	Z,DMATST_R		; TOGGLE RESET
 	CP	'Y'
 	JP	Z,DMATST_Y		; TOGGLE READY
 	CP	'X'
-	JR	Z,DMABYE		; EXIT
+	JP	Z,DMABYE		; EXIT
 ;
 	JR	MENULP
 ;
-DMABYE:	LD	SP,(SAVSTK)		; RESTORE CP/M STACK
+DMABYE:
+#IF (INTENABLE)
+	; Deinstall interrupt vector
+	ld	hl,(orgvec)	; original vector
+	ld	b,bf_sysint
+	ld	c,bf_sysintset	; set new vector
+	ld	e,INTIDX	; vector idx
+	di
+	rst	08		; do it
+	ei			; interrupts back on
+#ENDIF
+;
+	LD	SP,(SAVSTK)		; RESTORE CP/M STACK
 	RET
 ;
 DMATST_I:
 	call	PRTSTRD
-	.db	"\n\rSTART DMA_INIT\n\r$"
+	.db	"\n\rStart Initialization\n\r$"
 	CALL	DMA_INIT
 	JP	MENULP
 ;
+#IF (INTENABLE)
+;
+DMATST_T:
+	LD	A,(USEINT)
+	XOR	$FF
+	LD	(USEINT),A
+	JP	MENULP
+;
+#ENDIF
+;
 DMATST_M:
 	call	PRTSTRD
-	.db	"\n\rSTART DMAMemMove\n\r$"
-	CALL	DMAMemMove
+	.db	"\n\rPerforming Memory-Memory Copy Test\n\r$"
+	CALL	DMAMemTest
+	JP	MENULP
+;
+DMATST_N:
+	call	PRTSTRD
+	.db	"\n\rPerforming Iterative Memory-Memory Copy Test\n\r$"
+	CALL	DMAMemTestIter
 	JP	MENULP
 ;
 DMATST_01:
 	call	PRTSTRD
-	.db	"\n\rTOGGLE PORT\n\r$"
+	.db	"\n\rPerforming Port Selection Test\n\r$"
 	CALL	DMA_Port01
 	JP	MENULP
 ;
 DMATST_D:
 	call	PRTSTRD
-	.db	"\n\rSTART DMARegDump\n\r$"
+	.db	"\n\rDump Registers\n\r$"
 	CALL	DMARegDump
 	JP	MENULP
 ;
 DMATST_Y:
 	call	PRTSTRD
-	.db	"\n\rTEST READY\n\r$"
+	.db	"\n\rPerforming Ready Bit Test\n\r$"
 	CALL	DMA_ReadyT
 	JP	MENULP
 ;
 DMATST_R:
 	call	PRTSTRD
-	.db	"\n\rRESET\n\r$"
+	.db	"\n\rPerforming Reset\n\r$"
 ;	CALL	
 	JP	MENULP
 ;==================================================================================================
@@ -167,19 +243,39 @@ DMATST_R:
 ;==================================================================================================
 ;
 DISPM:	call	PRTSTRD
-	.db	"\n\rDMA DEVICE: $"
+	.db	"\n\rDMA Device: $"
 	LD	C,DMAMODE		; DISPLAY
 	LD	A,00000111B		; TARGET
 	LD	DE,DMA_DEV_STR		; DEVICE
 	CALL	PRTIDXMSK
-	CALL	NEWLINE
 ;
 	call	PRTSTRD
-	.db	"DMA PORT: $"
+	.db	", Port=0x$"
 	LD	A,DMABASE		; DISPLAY
 	CALL	PRTHEXBYTE		; DMA PORT
-	CALL	NEWLINE
 ;
+#IF (INTENABLE)
+;
+	call	PRTSTRD
+	.db	"\n\rInterrupts=$"
+	LD	A,(USEINT)
+	OR	A
+	LD	A,'Y'
+	JR	NZ,DISPM_INT
+	LD	A,'N'
+	JR	DISPM_INT
+;
+DISPM_INT:
+	CALL	COUT
+;
+	call	PRTSTRD
+	.db	", Interrupt Count=$"
+	ld	hl,(counter)
+	call	PRTDEC
+;
+#ENDIF
+;
+	call	NEWLINE
 	LD	HL,MENU_OPT		; DISPLAY
 	CALL	PRTSTR			; MENU OPTIONS
 ;
@@ -206,7 +302,7 @@ DMA_INIT:
 	jr	nz,DMA_NOTFOUND
 ;
 	call	PRTSTRD
-	.db	" DMA FOUND\n\r$"
+	.db	" DMA Found\n\r$"
 ;
 	ld	hl,DMACode		; program the
 	ld	b,DMACode_Len		; dma command
@@ -224,7 +320,7 @@ DMA_EXIT:
 DMA_NOTFOUND:
 	push	af
 	call	PRTSTRD
-	.db	" NOT PRESENT$"
+	.db	" NOT Present$"
 	pop	af
 	jr	DMA_EXIT
 ;
@@ -242,38 +338,41 @@ DMA_DEV_STR:
 MENU_OPT:
 	.TEXT	"\n\r"
 	.TEXT	"I) Initialize DMA\n\r"
-	.TEXT	"M) Memory to Memory test\n\r"
-	.TEXT	"0) DMA Port select test\n\r"
-	.TEXT	"1) DMA Latch Port select test\n\r"
-	.TEXT	"Y) Ready bit test\n\r"
+	.TEXT	"T) Toggle Interrupt Usage\n\r"
+	.TEXT	"M) Test Memory-Memory Copy\n\r"
+	.TEXT	"N) Test Memory-Memory Copy Iteratively\n\r"
+	.TEXT	"0) Test DMA Port Selection\n\r"
+	.TEXT	"1) Test DMA Latch Port Selection\n\r"
+	.TEXT	"Y) Test Ready Bit\n\r"
 	.TEXT	"X) Exit\n\r"
 
 	.TEXT	">$"
 ;
 ;==================================================================================================
-; TOGGLE A PORT ON AND OFF
+; PULSE PORT
 ;==================================================================================================
 ;
 DMA_Port01:
+	call	PRTSTRD
+	.db	"\r\nPulsing port 0x$"
 	sub	'0'			; Calculate
 	add	a,DMABASE		; Port to
+	call	PRTHEXBYTE
+	call	NEWLINE
 	ld	c,a			; toggle
-	ld	b,0
+	ld	b,$20			; loop counter
 portlp:	push	bc
-	call	PRTSTRD
-	.db	"\n\rON ...$"
-	call	PRTHEXWORD
+	call	PC_PERIOD
 	push	bc
 	ld	b,0
 	ld	a,0
 portlp1:out	(c),a
 	djnz	portlp1
 	pop	bc
-	call	PRTSTRD
-	.db	" OFF$"
 	call	delay	
 	pop	bc
 	djnz	portlp
+	call	NEWLINE
 	JP	MENULP
 ;
 delay:	push	bc
@@ -290,18 +389,23 @@ dlylp:	dec	bc
 ;==================================================================================================
 ;
 DMA_ReadyT:
+	call	NEWLINE
 	ld	c,DMABASE+1		; toggle
-	ld	b,0
+	ld	b,$20			; loop counter
 portlp2:push	bc
+	ld	a,b
+	call	PRTDECB
 	call	PRTSTRD
-	.db	"\n\rON ...$"
-	call	PRTHEXWORD
+	.db	": ON$"
+	call	delay
 	ld	a,$FF
 	ld	c,DMABASE+1
 	out	(c),a
 	call	PRTSTRD
-	.db	" OFF$"
+	.db	" -> OFF$"
 	call	delay
+	call	PRTSTRD
+	.db	"\r               \r$"
 	ld	c,DMABASE+1
 	ld	a,0
 	out	(c),a
@@ -332,8 +436,16 @@ DMAMemMove:
 	LD	HL,PROEND	; DMA COPY
 	LD	DE,$8000
 	LD	BC,4096-1
-	CALL	DMALDIR
-
+	LD	A,(USEINT)	; USE INTS?
+	OR	A		; TEST VALUE
+	JR	NZ,DMAMemMove1	; IF SO, DO SO
+	CALL	DMALDIR		; ELSE NORMAL DMA
+	JR	DMAMemMove2
+;
+DMAMemMove1:
+	CALL	DMALDIRINT	; DMA W/ INTERRUPTS
+;
+DMAMemMove2:
 ;
 ;	LD	HL,$8400	; PLANT
 ;	LD	A,$00		; BAD
@@ -345,15 +457,57 @@ DMAMemMove:
 NXTCMP:	CPI
 	JP	PO,CMPOK
 	JR	Z,NXTCMP
-
-	call	PRTHEXWORD
+	RET			; RET W/ ZF CLEAR
+;
+CMPOK:
+	RET			; RET W/ ZF SET
+;
+;==================================================================================================
+; DMA MEMORY TEST
+;==================================================================================================
+;
+DMAMemTest:
+	call	DMAMemMove	; do a single memory copy
+	jr	z,DMAMemTestOK
+	jr	DMAMemTestFail
+;
+DMAMemTestOK:
 	call	PRTSTRD
-	.db	" TEST MEMORY MOVE FAILED\n\r$"
-	RET
-
-CMPOK:	call	PRTSTRD
-	.db	"TEST MEMORY MOVE SUCCEEDED\n\r$"
-	RET
+	.db	"\n\rMemory-Memory Test Passed\n\r$"
+	ret
+;
+DMAMemTestFail:
+	call	PRTSTRD
+	.db	"\n\rMemory-Memory Test Failed\n\r$"
+	ret
+;
+;==================================================================================================
+; DMA MEMORY MOVE ITERATIVE
+;==================================================================================================
+;
+DMAMemTestIter:
+	ld	b,$20		; loop counter
+	call	PRTSTRD
+	.db	"\n\rPerforming $"
+	ld	a,b
+	call	PRTDECB
+	call	PRTSTRD
+	.db	" iterations, '.'=OK, '*'=Fail\n\r$"
+DMAMemTestIterLoop:
+	push	bc		; save loop control
+	call	DMAMemMove	; do an iteration
+	jr	z,DMAMemTestIterOK
+	call	PC_ASTERISK	; signal failure
+	jr	DMAMemTestIterCont	; continue
+;
+DMAMemTestIterOK:
+	call	PC_PERIOD	; signal pass
+;
+DMAMemTestIterCont:
+	pop	bc
+	djnz	DMAMemTestIterLoop
+	call	NEWLINE
+	ret
 ;
 ;==================================================================================================
 ; DMA PROBE - WRITE TO ADDRESS REGISTER AND READ BACK
@@ -455,6 +609,62 @@ DMADest		.dw	0 		; R4-Port B, Destination address
 DMACopy_Len 	.equ	$-DMACopy
 ;
 ;==================================================================================================
+; DMA COPY BLOCK CODE -  ASSUMES DMA PREINITIALIZED
+; INTERRUPT VERSION!
+;==================================================================================================
+;
+DMALDIRINT:
+;
+#IF (INTENABLE)
+;
+	ld	(DMASourceInt),hl	; populate the dma
+	ld	(DMADestInt),de		; register template
+	ld	(DMALengthInt),bc
+;
+	ld	hl,DMACopyInt		; program the
+	ld	b,DMACopyInt_Len	; dma command
+	ld	c,DMABASE		; block
+;
+	DMAIOSLO
+	di
+	otir				; load and execute dma
+	ei
+;
+	ld	a,DMA_READ_STATUS_BYTE	; check status
+	out	(DMABASE),a		; of transfer
+	in	a,(DMABASE)		; set non-zero
+	and	%00111011		; if failed
+	sub	%00011011
+	DMAIONOR
+;
+#ENDIF
+;
+	ret
+;
+#IF (INTENABLE)
+;
+DMACopyInt 	;.db	DMA_DISABLE	; R6-Command Disable DMA
+		.db	%01111101 	; R0-Transfer mode, A -> B, start address, block length follow
+DMASourceInt	.dw	0 		; R0-Port A, Start address
+DMALengthInt	.dw	0 		; R0-Block length
+		.db	%00010100	; R1-No timing bytes follow, address increments, is memory
+		.db	%00010000 	; R2-No timing bytes follow, address increments, is memory
+		.db	%10100000 	; R3-DMA, interrupt, stop on match disabled
+		.db	DMA_CONTINUOUS	; R4-Continuous mode, destination address, interrupt and control byte follow
+DMADestInt	.dw	0 		; R4-Port B, Destination address
+		.db	%00011110	; R4-Interrupt control byte: Pulse byte follows, Pulse generated
+		.db	0		; R4-Pulse control byte
+		.db	INTIDX*2	; R4-Interrupt vector
+;		.db	%10010010+DMA_RDY;R5-Stop on end of block, ce/wait multiplexed, READY active config
+		.db	%10011010
+		.db	DMA_LOAD 	; R6-Command Load
+		.db	DMA_FORCE_READY	; R6-Command Force ready
+		.db	DMA_ENABLE 	; R6-Command Enable DMA
+DMACopyInt_Len 	.equ	$-DMACopyInt
+;
+#ENDIF
+;
+;==================================================================================================
 ; DMA I/O OUT BLOCK CODE - ADDRESS TO I/O PORT
 ;==================================================================================================
 ;
@@ -552,8 +762,6 @@ DMAIn_Len 	.equ	$-DMAInCode
 ; DEBUG - READ START, DESTINATION AND COUNT REGISTERS
 ;==================================================================================================
 ;
-;#IF (0)
-;
 DMARegDump:
 	ld	a,DMA_READ_MASK_FOLLOWS
 	out	(DMABASE),a
@@ -586,7 +794,6 @@ DMARegDump:
 ;
 	call	NEWLINE
 	ret
-;#ENDIF
 ;
 CIO_CONSOLE	.EQU	$80	; CONSOLE UNIT TO C
 BF_CIOOUT	.EQU	$01	; HBIOS FUNC: OUTPUT CHAR
@@ -662,10 +869,52 @@ CST:
 	POP	DE
 	POP	BC
 	RET
-
+;
+USEINT	.DB	FALSE		; USE INTERRUPTS FLAG
+;
 SAVSTK:	.DW	2
 	.FILL	64
 STACK:	.EQU	$
+;
+orgvec	.dw	0		; saved interrupt vector
+;
+;===============================================================================
+; Interrupt Handler
+;===============================================================================
+;
+reladr	.equ	$		; relocation start adr
+;
+	.org	$A000		; code will run here
+;
+int:
+	; According to the DMA doc, you must issue
+	; a DMA_DISABLE command prior to a
+	; DMA_REINIT_STATUS_BYTE command to avoid a
+	; potential race condition.
+	ld	a,DMA_DISABLE
+	out	(DMABASE),a
+;	
+	; The doc confuses me, but apparently it is
+	; necessary to reinitialize the status byte
+	; when an end-of-block interrupt occurs.  Otherwise,
+	; the end-of-block condition remains set and
+	; causes the interrupt to fire continuously.
+	ld	a,DMA_REINIT_STATUS_BYTE
+	out	(DMABASE),a
+;
+	ld	hl,(counter)
+	inc	hl
+	ld	(counter),hl
+;
+	or	$ff		; signal int handled
+	ret
+;
+counter	.dw	0
+;
+hsiz	.equ	$ - $A000	; size of handler to relocate
+;
+	.org	reladr + hsiz
+;
 PROEND:	.EQU	$
 ;
 	.END

Source/Apps/Test/DMAmon/dmamon.sh

@@ -1,3 +0,0 @@
-~/RomWBW-dev/Tools/unix/uz80as/uz80as -t z80 dmamon.asm dmamon.bin
-#srec_cat dmamon.bin -binary -offset 0x0100 --address-length=2 -o dmamon.hex -Intel
-cat dmamon.bin > dmamon.com

Source/Apps/Test/Makefile

@@ -1,5 +1,5 @@
 OBJECTS = 
-SUBDIRS = DMAmon I2C inttest ppidetst ramtest tstdskng rzsz vdctest kbdtest kbdinfo
+SUBDIRS = DMAmon I2C inttest ppidetst ramtest tstdskng rzsz vdctest kbdtest ps2info 2piotst piomon
 DEST = ../../../Binary/Apps/Test
 TOOLS =../../../Tools
 

Source/Apps/Test/kbdinfo/Build.cmd

@@ -1,10 +0,0 @@
-@echo off
-setlocal
-
-set TOOLS=../../../../Tools
-set PATH=%TOOLS%\tasm32;%PATH%
-set TASMTABS=%TOOLS%\tasm32
-
-tasm -t180 -g3 -fFF kbdinfo.asm kbdinfo.com kbdinfo.lst || exit /b
-
-copy /Y kbdinfo.com ..\..\..\..\Binary\Apps\Test\ || exit /b

Source/Apps/Test/kbdinfo/mseinfo.asm

@@ -1,896 +0,0 @@
-;
-;=======================================================================
-; Mouse Information Utility (MSEINFO)
-;=======================================================================
-;
-; Simple utility that attempts to determine the status of the mouse you
-; have attached to an 8242 keyboard controller.
-;
-; Based on Wayne Warthen's KBDINFO program, Thanks to his great work
-; on RomWBW and support to the Retrobrewcomputers community at large
-;
-; Additional help from these websites
-;   https://isdaman.com/alsos/hardware/mouse/ps2interface.htm
-;
-; Second PS/2 write data port info from 
-;   https://wiki.osdev.org/%228042%22_PS/2_Controller#Second_PS.2F2_Port
-;
-; PS/2 Mouse initialization code in C
-;   http://bos.asmhackers.net/docs/mouse/snippet_2/mouse.inc
-;
-;=======================================================================
-;
-; Mouse controller port addresses (adjust as needed)
-;
-iocmd	.equ	$E3	; keyboard controller command port address
-iodat	.equ	$E2	; keyboard controller data port address
-;
-; General operational equates (should not requre adjustment)
-;
-stksiz	.equ	$40	; Working stack size
-;
-timeout	.equ	$00	; Controller timeout constant
-;
-restart	.equ	$0000	; CP/M restart vector
-bdos	  .equ	$0005	; BDOS invocation vector
-;
-;=======================================================================
-;
-	.org	$100	; standard CP/M executable
-;
-;
-	; setup stack (save old value)
-	ld	(stksav),sp		; save stack
-	ld	sp,stack		; set new stack
-;
-	call	crlf
-	ld	de,str_banner		; banner
-	call	prtstr
-;
-	call	main			; do the real work
-;
-exit:
-	call	crlf2
-	ld	de,str_exit
-	call	prtstr
-	;call	crlf
-
-	; clean up and return to command processor
-	call	crlf			; formatting
-	ld	sp,(stksav)		; restore stack
-	jp	restart			; return to CP/M via restart
-;
-;
-;=======================================================================
-; Main Program
-;=======================================================================
-;
-main:
-;
-; Display active mouse controller port addresses
-;
-	call	crlf2
-	ld	de,str_cmdport
-	call	prtstr
-	ld	a,iocmd
-	call	prthex
-	call	crlf
-	ld	de,str_dataport
-	call	prtstr
-	ld	a,iodat
-	call	prthex
-;
-; Attempt self-test command on mouse controller
-;
-;   Mouse controller should respond with an 0x55 on data port
-;   after being sent a 0xAA on the command port.
-;
-	call	crlf2
-	ld	de,str_ctrl_test
-	call	prtstr
-	ld	a,$aa			; self-test command
-	call	put_cmd_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	call	get_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$55			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-;
-;   Send 0xA8 Mouse Enable command to 8242 controller
-;
-	call	crlf2
-	ld	de,str_enable_mouse
-	call	prtstr
-	
-	ld	a,$a8			; Send Mouse Enable command to 8242
-	call	put_cmd_dbg
-	jp	c,err_ctlr_io		; handle controller error
-
-	call	get_data_dbg		; Read Mouse for self-test status
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$AA			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	
-	call	get_data_dbg		; Read Mouse for Mouse ID
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$00			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	
-
-	
-;
-; Disable translation on keyboard controller to get raw scan codes!  Enable Mouse
-;
-;	call	crlf2
-;	ld	de,str_trans_off
-;	call	prtstr
-;	ld	a,$60			; write to command register 0
-;	call	put_cmd_dbg
-;	jp	c,err_ctlr_io		; handle controller error
-;	ld	a,$00			; xlat disabled, mouse enabled, no ints
-;	call	put_cmd_dbg
-;	jp	c,err_ctlr_io		; handle controller error
-
-; Attempt four reset commands on mouse controller
-;
-	call	crlf2
-	ld	de,str_mse_init
-	call	prtstr
-	
-; Reset Pass #1	
-	ld	a,$ff			; Send Mouse Reset command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-	
-	call	get_data_dbg		; Read Mouse for self-test status
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$AA			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	
-	call	get_data_dbg		; Read Mouse for Mouse ID
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$00			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	
-; Reset Pass #2
-	ld	a,$ff			; Send Mouse Reset command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-	
-	call	get_data_dbg		; Read Mouse for self-test status
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$AA			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	
-	call	get_data_dbg		; Read Mouse for Mouse ID
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$00			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	
-; Reset Pass #3
-	ld	a,$ff			; Send Mouse Reset command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	call	get_data_dbg		; Read Mouse for self-test status
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$AA			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	
-	call	get_data_dbg		; Read Mouse for Mouse ID
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$00			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	
-; Reset Pass #4
-	ld	a,$ff			; Send Mouse Reset command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-	
-	call	get_data_dbg		; Read Mouse for self-test status
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$AA			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	
-	call	get_data_dbg		; Read Mouse for Mouse ID
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$00			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	
-; Begin setting mouse parameters, Request Microsoft Scrolling Mouse Mode
-
-	ld	a,$f3			; Send Set Sample Rate command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	ld	a,$c8			; Send Decimal 200 command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	ld	a,$f3			; Send Set Sample Rate command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	ld	a,$64			; Send Decimal 100 command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	ld	a,$f3			; Send Set Sample Rate command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	ld	a,$50			; Send Decimal 80 command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	ld	a,$f2			; Send Read Device Type command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	call	get_data_dbg		; Read Mouse for Mouse ID
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$03			; detect MS Intellimouse/Microsoft Scrolling Mouse
-	jp	z,Intellimouse	
-	cp	$00			; expected value? ($00 if Regular PS/2 Mouse)
-	jp	z,ReadMouseID
-Intellimouse:	
-	call	crlf
-	ld	de,str_intellimouse_ok
-	call	prtstr
-ReadMouseID:
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	
-	ld	a,$f3			; Send Set Sample Rate command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	ld	a,$0a			; Send Decimal 10 command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	ld	a,$f2			; Send Read Device Type command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	call	get_data_dbg		; Read Mouse for Mouse ID
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$03			; detect MS Intellimouse/Microsoft Scrolling Mouse
-	jp	z,Intellimouse2	
-	cp	$00			; expected value? ($00 if Regular PS/2 Mouse)
-	jp	z,ReadMouseID2
-Intellimouse2:	
-	call	crlf
-	ld	de,str_intellimouse_ok
-	call	prtstr
-ReadMouseID2:
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-
-	ld	a,$e8			; Send Set Resolution command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	ld	a,$03			; Send 8 Counts/mm command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	ld	a,$e6			; Send Set Scaling 1:1 command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	ld	a,$f3			; Send Set Sample Rate command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	ld	a,$28			; Send Decimal 40 command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-	ld	a,$f4			; Send Enable command
-	call	put_data_dbg
-	jp	c,err_ctlr_io		; handle controller error
-	
-	call	get_data_dbg		; Read Mouse for Acknowledge
-	jp	c,err_ctlr_io		; handle controller error
-	cp	$fa			; expected value?
-	jp	nz,err_ctlr_test	; handle self-test error
-	call	crlf
-	ld	de,str_ctrl_test_ok
-	call	prtstr
-
-; Initialization Complete
-
-ReadMousePackets:
-
-;	call	check_read
-;	jp	nz, ReadMousePackets
-
-	call	get_data_dbg		; Read Mouse for self-test status
-	jp	c,err_ctlr_io		; handle controller error
-	call	crlf
-	
-	call	get_data_dbg		; Read Mouse for Mouse ID
-	jp	c,err_ctlr_io		; handle controller error
-	call	crlf
-	
-	call	get_data_dbg		; Read Mouse for Mouse ID
-	jp	c,err_ctlr_io		; handle controller error
-	call	crlf
-	
-	call	crlf
-	
-	jp	ReadMousePackets
-
-;
-done:
-	ret
-
-;
-;=======================================================================
-; Mouse Controller I/O Routines
-;=======================================================================
-;
-wait_write:
-;
-; Wait for mouse controller to be ready for a write
-;   A=0 indicates success (ZF set)
-;
-	ld	b,timeout		; setup timeout constant
-wait_write1:
-	in	a,(iocmd)		; get status
-	ld	c,a			; save status
-	and	$02			; isolate input buf status bit
-	ret	z			; 0 means ready, all done
-	call	delay			; wait a bit
-	djnz	wait_write1		; loop until counter exhausted
-	ld	de,str_timeout_write	; write timeout message
-	call	crlf
-	call	prtstr
-	ld	a,c			; recover last status value
-	call	prthex
-	or	$ff			; signal error
-	ret
-;
-wait_read:
-;
-; Wait for mouse controller to be ready to read a byte
-;   A=0 indicates success (ZF set)
-;
-	ld	b,timeout		; setup timeout constant
-wait_read1:
-	in	a,(iocmd)		; get status
-	ld	c,a			; save status
-	and	$01			; isolate input buf status bit
-	xor	$01			; invert so 0 means ready
-	ret	z			; if 0, all done
-	call	delay			; wait a bit
-	djnz	wait_read1		; loop until counter exhausted
-	ld	de,str_timeout_read	; write timeout message
-	call	crlf
-	call	prtstr
-	ld	a,c			; recover last status value
-	call	prthex
-	or	$ff			; signal error
-	ret
-;
-check_read:
-;
-; Check for data ready to read
-;   A=0 indicates data available (ZF set)
-;
-	in	a,(iocmd)		; get status
-	and	$01			; isolate input buf status bit
-	xor	$01			; invert so 0 means ready
-	ret
-;
-put_cmd:
-;
-; Put a cmd byte from A to the mouse interface with timeout
-; CF set indicates timeout error
-;
-	ld	e,a			; save incoming value
-	call	wait_write		; wait for controller ready
-	jr	z,put_cmd1		; if ready, move on
-	scf				; else, signal timeout error
-	ret				; and bail out
-put_cmd1:
-	ld	a,e			; recover value to write
-	out	(iocmd),a		; write it
-	or	a			; clear CF for success
-	ret
-;
-put_cmd_dbg:
-	call	put_cmd
-	ret	c
-	push	af
-	call	crlf
-	ld	de,str_put_cmd
-	call	prtstr
-	call	prthex
-	pop	af
-	ret
-;	
-put_data:
-;
-; Put a data byte from A to the mouse interface with timeout
-; CF set indicates timeout error
-;
-; note: direct data to second PS/2 port, send $d4 to 8242 command register
-; different than keyboard which uses first PS/2 port
-
-	push	af			; save contents of a
-	ld	e,a			; save incoming value
-	call	wait_write		; wait for controller ready
-	jr	z,put_data0		; if ready, move on
-	scf				; else, signal timeout error
-	ret				; and bail out
-put_data0:
-	ld	a,$d4			; direct to second PS/2 port for mouse
-	out	(iocmd),a		; send second port command to 8242
-	pop	af
-
-; rest of put_data is the same as for PS/2 keyboard
-
-	ld	e,a			; save incoming value
-	call	wait_write		; wait for controller ready
-	jr	z,put_data1		; if ready, move on
-	scf				; else, signal timeout error
-	ret				; and bail out
-put_data1:
-	ld	a,e			; recover value to write
-	out	(iodat),a		; write it
-	or	a			; clear CF for success
-	ret
-;
-put_data_dbg:
-	call	put_data
-	ret	c
-	push	af
-	call	crlf
-	ld	de,str_put_data
-	call	prtstr
-	call	prthex
-	pop	af
-	ret
-
-;
-; Get a data byte from the mouse interface to A with timeout
-; CF set indicates timeout error
-;
-get_data:
-;
-	call	wait_read		; wait for byte to be ready
-	jr	z,get_data1		; if ready, move on
-	scf				; else signal timeout error
-	ret				; and bail out
-get_data1:
-	in	a,(iodat)		; get data byte
-	or	a			; clear CF for success
-	ret
-;
-get_data_dbg:
-	call	get_data
-	ret	c
-	push	af
-	call	crlf
-	ld	de,str_get_data
-	call	prtstr
-	call	prthex
-	pop	af
-	ret
-;
-; Error Handlers
-;
-err_ctlr_io:
-	ld	de,str_err_ctrl_io
-	jr	err_ret
-;
-err_ctlr_test:
-	ld	de,str_err_ctrl_test
-	jr	err_ret
-;
-err_mse_reset:
-	ld	de,str_err_mse_reset
-	jr	err_ret
-;
-err_ret:
-	call	crlf2
-	call	prtstr
-	or	$ff			; signal error
-	ret
-;
-;=======================================================================
-; Utility Routines
-;=======================================================================
-;
-;
-; Print character in A without destroying any registers
-;
-prtchr:
-	push	bc		; save registers
-	push	de
-	push	hl
-	ld	e,a		; character to print in E
-	ld	c,$02		; BDOS function to output a character
-	call	bdos		; do it
-	pop	hl		; restore registers
-	pop	de
-	pop	bc
-	ret
-;
-prtdot:
-;
-	; shortcut to print a dot preserving all regs
-	push	af		; save af
-	ld	a,'.'		; load dot char
-	call	prtchr		; print it
-	pop	af		; restore af
-	ret			; done
-;
-; Print a zero terminated string at (de) without destroying any registers
-;
-prtstr:
-	push	af
-	push	de
-;
-prtstr1:
-	ld	a,(de)		; get next char
-	or	a
-	jr	z,prtstr2
-	call	prtchr
-	inc	de
-	jr	prtstr1
-;
-prtstr2:
-	pop	de		; restore registers
-	pop	af
-	ret	
-;
-; Print the value in A in hex without destroying any registers
-;
-prthex:
-	push	af		; save AF
-	push	de		; save DE
-	call	hexascii	; convert value in A to hex chars in DE
-	ld	a,d		; get the high order hex char
-	call	prtchr		; print it
-	ld	a,e		; get the low order hex char
-	call	prtchr		; print it
-	pop	de		; restore DE
-	pop	af		; restore AF
-	ret			; done
-;
-; print the hex word value in hl
-;
-prthexword:
-	push	af
-	ld	a,h
-	call	prthex
-	ld	a,l
-	call	prthex 
-	pop	af
-	ret
-;
-; print the hex dword value in de:hl
-;
-prthex32:
-	push	bc
-	push	de
-	pop	bc
-	call	prthexword
-	push	hl
-	pop	bc
-	call	prthexword
-	pop	bc
-	ret
-;
-; Convert binary value in A to ascii hex characters in DE
-;
-hexascii:
-	ld	d,a		; save A in D
-	call	hexconv		; convert low nibble of A to hex
-	ld	e,a		; save it in E
-	ld	a,d		; get original value back
-	rlca			; rotate high order nibble to low bits
-	rlca
-	rlca
-	rlca
-	call	hexconv		; convert nibble
-	ld	d,a		; save it in D
-	ret			; done
-;
-; Convert low nibble of A to ascii hex
-;
-hexconv:
-	and	$0F	     	; low nibble only
-	add	a,$90
-	daa	
-	adc	a,$40
-	daa	
-	ret
-;
-; Print value of A or HL in decimal with leading zero suppression
-; Use prtdecb for A or prtdecw for HL
-;
-prtdecb:
-	push	hl
-	ld	h,0
-	ld	l,a
-	call	prtdecw		; print it
-	pop	hl
-	ret
-;
-prtdecw:
-	push	af
-	push	bc
-	push	de
-	push	hl
-	call	prtdec0
-	pop	hl
-	pop	de
-	pop	bc
-	pop	af
-	ret
-;
-prtdec0:
-	ld	e,'0'
-	ld	bc,-10000
-	call	prtdec1
-	ld	bc,-1000
-	call	prtdec1
-	ld	bc,-100
-	call	prtdec1
-	ld	c,-10
-	call	prtdec1
-	ld	e,0
-	ld	c,-1
-prtdec1:
-	ld	a,'0' - 1
-prtdec2:
-	inc	a
-	add	hl,bc
-	jr	c,prtdec2
-	sbc	hl,bc
-	cp	e
-	ret	z
-	ld	e,0
-	call	prtchr
-	ret
-;
-; Start a new line
-;
-crlf2:
-	call	crlf		; two of them
-crlf:
-	push	af		; preserve AF
-	ld	a,13		; <CR>
-	call	prtchr		; print it
-	ld	a,10		; <LF>
-	call	prtchr		; print it
-	pop	af		; restore AF
-	ret
-;
-; Brief delay
-;
-delay:
-	push	bc
-	ld	b,0
-delay1:
-	ex	(sp),hl
-	ex	(sp),hl
-	ex	(sp),hl
-	ex	(sp),hl
-	ex	(sp),hl
-	ex	(sp),hl
-	ex	(sp),hl
-	ex	(sp),hl
-	djnz	delay1
-	pop	bc
-	ret
-;
-;=======================================================================
-; Constants
-;=======================================================================
-;
-str_banner		.db	"Mouse Information, v0.1",0
-str_exit		.db	"Done, Thank you for using MSEINFO!",0
-str_cmdport		.db	"Mouse Controller Command Port: 0x",0
-str_dataport		.db	"Mouse Controller Data Port: 0x",0
-str_timeout_write	.db	"Mouse Controller Write Timeout, Status: 0x",0
-str_timeout_read	.db	"Mouse Controller Read Timeout, Status: 0x",0
-str_err_ctrl_io		.db	"Mouse Controller I/O Failure",0
-str_err_ctrl_test	.db	"Mouse Controller Self-Test Failed",0
-str_put_cmd		.db	"Sent Command 0x",0
-str_put_data		.db	"Sent Data 0x",0
-str_get_data		.db	"Got Data 0x",0
-str_ctrl_test		.db	"Attempting Controller Self-Test",0
-str_mse_init		.db	"Attempting Mouse Initialization",0
-str_enable_mouse	.db	"Enabling Mouse in 8242 Controller",0
-str_ctrl_test_ok	.db	"Controller Self-Test OK",0
-str_intellimouse_ok	.db	"MS Intellimouse OK",0
-str_trans_off		.db	"Disabling Controller Translation",0
-str_mse_reset		.db	"Attempting Mouse Reset",0
-str_mse_reset_ok	.db	"Mouse Reset OK",0
-str_err_mse_reset	.db	"Mouse Reset Failed",0
-;
-;=======================================================================
-; Working data
-;=======================================================================
-;
-stksav		.dw	0		; stack pointer saved at start
-		.fill	stksiz,0	; stack
-stack		.equ	$		; stack top
-;
-workbuf		.fill	8
-workbuf_len	.db	0
-;
-;=======================================================================
-;
-	.end
-	

Source/Apps/Test/piomon/Build.cmd

@@ -0,0 +1,10 @@
+@echo off
+setlocal
+
+set TOOLS=../../../../Tools
+set PATH=%TOOLS%\tasm32;%PATH%
+set TASMTABS=%TOOLS%\tasm32
+
+tasm -t180 -g3 -fFF piomon.asm piomon.com piomon.lst || exit /b
+
+copy /Y piomon.com ..\..\..\..\Binary\Apps\Test\ || exit /b

Source/Apps/Test/kbdinfo/Makefile → Source/Apps/Test/piomon/Makefile

@@ -1,4 +1,4 @@
-OBJECTS = kbdinfo.com
+OBJECTS = piomon.com
 DEST = ../../../../Binary/Apps/Test
 TOOLS =../../../../Tools
 

Source/Apps/Test/piomon/Readme.txt

@@ -0,0 +1,36 @@
+PIOMON is a program to verify operation of the Z80 MBC DUALPIO board
+
+Most testing requires the use of loopback hardware constructed as:
+
+Channel A   RDY STB  D0  D1  D2  D3  D4  D5  D6  D7
+             \   /   |   |   |   |   |   |   |   |
+              \ /    |   |   |   |   |   |   |   |
+               X     |   |   |   |   |   |   |   |
+              / \    |   |   |   |   |   |   |   |
+             /   \   |   |   |   |   |   |   |   |
+Channel B   RDY STB  D0  D1  D2  D3  D4  D5  D6  D7
+
+The DUALPIO has, well, 2 PIO chips.  Only one chip
+is tested at a time.  At startup, PIOMON will ask
+you for the port of the chip to test.  It defaults
+to the standard port number for the primary PIO chip
+on an MBC DUALPIO board.
+
+The port number specified is the base I/O port.  Each
+chip has two channels which are addressed in the
+menu by specifying A or B.
+
+MBC DUALPIO Primary PIO = 0xB8
+MBC DUALPIO Secondary PIO = 0xBC
+
+If you try to use PIOMON without the RDY and STB
+cross connected, you may have interrupt issues
+because STB will be floating.
+
+N.B., V1 and V2 of the DUALPIO lack a hardware reset.  The
+PIO chips will reset at power-on, but they do not reset
+when the reset button is pushed.
+
+Happy St. Patrick's Day!!!
+
+--WBW 7:42 PM 3/17/2022

Source/Apps/Test/ps2info/Build.cmd

@@ -0,0 +1,10 @@
+@echo off
+setlocal
+
+set TOOLS=../../../../Tools
+set PATH=%TOOLS%\tasm32;%PATH%
+set TASMTABS=%TOOLS%\tasm32
+
+tasm -t180 -g3 -fFF ps2info.asm ps2info.com ps2info.lst || exit /b
+
+copy /Y ps2info.com ..\..\..\..\Binary\Apps\Test\ || exit /b

Source/Apps/Test/ps2info/Clean.cmd

@@ -0,0 +1,6 @@
+@echo off
+setlocal
+
+if exist *.com del *.com
+if exist *.lst del *.lst
+if exist *.bin del *.bin

Source/Apps/Test/ps2info/Makefile

@@ -0,0 +1,7 @@
+OBJECTS = ps2info.com
+DEST = ../../../../Binary/Apps/Test
+TOOLS =../../../../Tools
+
+USETASM=1
+
+include $(TOOLS)/Makefile.inc

Source/Apps/Test/kbdinfo/kbdinfo.asm → Source/Apps/Test/ps2info/ps2info.asm

@@ -1,17 +1,17 @@
 ;
 ;=======================================================================
-; Keyboard Information Utility (KBDINFO)
+; PS/2 Keyboard/Mouse Information Utility (PS2INFO)
 ;=======================================================================
 ;
-; Simple utility that attempts to determine the type of keyboard you
-; have attached to an 8242 keyboard controller.
+; Simple utility that performs simple tests of an 8242 PS/2 controller,
+; keyboard, and mouse.
 ;
 ;=======================================================================
 ;
-; Keyboard controller port addresses (adjust as needed)
+; PS/2 Keyboard/Mouse controller port addresses (adjust as needed)
 ;
-iocmd	.equ	$E3	; keyboard controller command port address
-iodat	.equ	$E2	; keyboard controller data port address
+iocmd	.equ	$E3	; PS/2 controller command port address
+iodat	.equ	$E2	; PS/2 controller data port address
 ;
 cpumhz	.equ	8	; for time delay calculations (not critical)
 ;
@@ -39,10 +39,6 @@ bdos	.equ	$0005			; BDOS invocation vector
 	call	prtstr
 ;
 	call	main			; do the real work
-	jr	z,exit			; completed all tests
-	ld	de,str_run_failed
-	call	crlf2
-	call	prtstr
 ;
 exit:
 	call	crlf2
@@ -61,7 +57,7 @@ exit:
 ;
 main:
 ;
-; Display active keyboard controller port addresses
+; Display active controller port addresses
 ;
 	call	crlf2
 	ld	de,str_cmdport
@@ -73,16 +69,66 @@ main:
 	call	prtstr
 	ld	a,iodat
 	call	prthex
+;
+	call	test_ctlr
+	jr	z,main0			; continue if ctlr OK
+	ld	de,str_kbd_failed
+	call	crlf2
+	call	prtstr
+	jr	mainz			; bail out if ctlr fails
+;
+main0:
+	call	test_kbd
+	jr	z,main1			; completed all tests, continue
+	ld	de,str_kbd_failed
+	call	crlf2
+	call	prtstr
+;
+main1:
+	call	test_mse
+	jr	z,main2			; completed all tests, continue
+	ld	de,str_mse_failed
+	call	crlf2
+	call	prtstr
+;
+main2:
+	call	test_kbdmse
+;
+mainz:
+	xor	a
+	ret
+;
+; Test 8242 PS/2 Controller
+;
+test_ctlr:
+	call	crlf2
+	ld	de,str_ctlr
+	call	prtstr
+;
+	call	ctlr_test
+	ret	nz
+;
+	call	ctlr_test_p1
+	;ret	nz
+;
+	call	ctlr_test_p2
+	;ret	nz
+;
+	ret
+;
+; Test Keyboard
+;
+test_kbd:
 ;
 ; First, we attempt to contact the controller and keyboard, then
-; print the keyboard identity and scan codes scupported
+; print the keyboard identity and scan codes supported
 ;
 	; Run test series with translation off
 	call	crlf2
 	ld	de,str_basic
 	call	prtstr
 ;
-	call	do_basic
+	call	test_kbd_basic
 	ret	nz
 ;
 ; We make two passes through the test series with different controller
@@ -94,29 +140,78 @@ main:
 	ld	de,str_trans_off
 	call	prtstr
 ;
-	ld	a,$20			; xlat disabled, mouse disabled, no ints
+	ld	a,$20			; kbd enabled, xlat disabled, mouse disabled, no ints
 	ld	(ctlr_cfgval),a
-	call	do_tests
+	call	test_kbd_keys
 ;
 	; Run test series with translation on
 	call	crlf2
 	ld	de,str_trans_on
 	call	prtstr
 ;
-	ld	a,$60			; xlat enabled, mouse disabled, no ints
+	ld	a,$60			; kbd enabled, xlat enabled, mouse disabled, no ints
 	ld	(ctlr_cfgval),a
-	call	do_tests
-	
+	call	test_kbd_keys
+;
+	ret
+;
+; Test Mouse
+;
+test_mse:
+	call	crlf2
+	ld	de,str_basic_mse
+	call	prtstr
+;
+	ld	a,$10			; kbd disabled, mse enabled, no ints
+	call	ctlr_setup
+	ret	nz
+;
+	call	mse_reset
+	ret	nz
+;
+	call	mse_ident
+	ret	nz
+;
+	call	mse_stream
+	ret	nz
+;
+	call	mse_echo
+;	
 	xor	a			; signal success
 	ret
 ;
-; Perform basic keyboard tests, display keyboard identity, and
-; inventory the supported scan code sets.
+; Test Everything
 ;
-do_basic:
-	call	ctlr_test
+test_kbdmse:
+	call	crlf2
+	ld	de,str_kbdmse
+	call	prtstr
+;
+	ld	a,$00			; kbd enabled, mse enabled, no ints
+	call	ctlr_setup
 	ret	nz
 ;
+	call	kbd_reset
+	ret	nz
+;
+	ld	a,2
+	call	kbd_setsc
+;
+	call	mse_reset
+	ret	nz
+;
+	call	mse_stream
+	ret	nz
+;
+	call	kbdmse_echo
+;	
+	xor	a			; signal success
+	ret
+;
+; Perform basic keyboard tests, display keyboard identity, and
+; inventory the supported scan code sets.
+;
+test_kbd_basic:
 	ld	a,$20			; Xlat off for this checking
 	call	ctlr_setup
 	ret	nz
@@ -129,7 +224,7 @@ do_basic:
 ;
 	ld	b,3			; Loop control, 3 scan code sets
 	ld	c,1			; Current scan code number
-do_basic1:
+test_kbd_basic1:
 	ld	a,c			; Scan code set to A
 	push	bc
 	call	kbd_setsc		; Attempt to set it
@@ -142,12 +237,12 @@ do_basic1:
 	call	prtdecb
 	pop	af			; restore result
 	ld	de,str_sc_ok
-	jr	z,do_basic2
+	jr	z,test_kbd_basic2
 	ld	de,str_sc_fail
-do_basic2:
+test_kbd_basic2:
 	call	prtstr
 	inc	c
-	djnz	do_basic1
+	djnz	test_kbd_basic1
 ;
 	xor	a			; signal success
 	ret
@@ -156,10 +251,7 @@ do_basic2:
 ; desired controller setup value should be placed in ctlr_cfgval
 ; prior to invoking this routine.
 ;
-do_tests:
-	call	ctlr_test
-	ret	nz
-;
+test_kbd_keys:
 	ld	a,(ctlr_cfgval)
 	call	ctlr_setup
 	ret	nz
@@ -177,19 +269,19 @@ do_tests:
 	call	kbd_dispsc
 	;ret	nz
 ;
-	call	kbd_showkeys
+	call	kbd_echo
 	;ret	nz
 ;
 	xor	a			; signal success
 	ret
 ;
 ;=======================================================================
-; Keyboard/Controller Test Routines
+; Controller/Keyboard/Mouse Test Routines
 ;=======================================================================
 ;
-; Attempt self-test command on keyboard controller
+; Attempt self-test command on PS/2 controller
 ;
-;   Keyboard controller should respond with an 0x55 on data port
+;   PS/2 controller should respond with an 0x55 on data port
 ;   after being sent a 0xAA on the command port.
 ;
 ctlr_test:
@@ -209,9 +301,47 @@ ctlr_test:
 	xor	a
 	ret
 ;
-; Keyboard controller setup
+; Attempt self-test of first port of controller
+;
+ctlr_test_p1:
+	call	crlf2
+	ld	de,str_ctlr_test_p1
+	call	prtstr
+	ld	a,$ab			; self-test first port
+	call	put_cmd_dbg
+	jp	c,err_ctlr_to		; handle controller error
+	call	get_data_dbg
+	jp	c,err_ctlr_to		; handle controller error
+	cp	$00			; expected value?
+	jp	nz,err_ctlr_test_p1	; handle self-test error
+	call	crlf
+	ld	de,str_ctlr_test_p1_ok
+	call	prtstr
+	xor	a
+	ret
+;
+; Attempt self-test of second port of controller
 ;
-;   Set keyboard controller command register to value in A
+ctlr_test_p2:
+	call	crlf2
+	ld	de,str_ctlr_test_p2
+	call	prtstr
+	ld	a,$a9			; self-test second port
+	call	put_cmd_dbg
+	jp	c,err_ctlr_to		; handle controller error
+	call	get_data_dbg
+	jp	c,err_ctlr_to		; handle controller error
+	cp	$00			; expected value?
+	jp	nz,err_ctlr_test_p2	; handle self-test error
+	call	crlf
+	ld	de,str_ctlr_test_p2_ok
+	call	prtstr
+	xor	a
+	ret
+;
+; PS/2 controller setup
+;
+;   Set controller command register to value in A
 ;
 ctlr_setup:
 	push	af			; save incoming value
@@ -243,7 +373,7 @@ kbd_reset:
 	jp	nz,err_kbd_reset
 	call	get_data_dbg
 	jp	c,err_ctlr_to		; handle controller error
-	cp	$AA			; Success?
+	cp	$aa			; Success?
 	jp	nz,err_kbd_reset
 	call	crlf
 	ld	de,str_kbd_reset_ok
@@ -313,7 +443,7 @@ kbd_ident4:
 	xor	a
 	ret
 ;
-; Display active scan code set being used
+; Display keyboard active scan code set being used
 ;
 kbd_dispsc:
 	call	crlf2
@@ -344,7 +474,7 @@ kbd_dispsc:
 	xor	a
 	ret
 ;
-; Set active scan code set to value in A
+; Set keyboard active scan code set to value in A
 ;
 kbd_setsc:
 	ld	(kbd_setsc_val),a	; Save incoming value
@@ -371,10 +501,9 @@ kbd_setsc:
 ;
 kbd_setsc_val	.db	0
 ;
-;
 ; Read and display raw scan codes
 ;
-kbd_showkeys:
+kbd_echo:
 	call	crlf2
 	ld	de,str_disp_scan_codes
 	call	prtstr
@@ -384,7 +513,7 @@ read_loop:
 	call	bdos
 	cp	$1B			; Escape key?
 	ret	z
-	call	check_read
+	call	check_read_kbd
 	jr	nz,read_loop
 	call	get_data
 	jp	c,err_ctlr_to		; handle controller error
@@ -399,13 +528,255 @@ read_loop:
 	call	prtchr
 	jr	read_loop
 ;
+; Reset Mouse
+;
+mse_reset:
+	call	crlf2
+	ld	de,str_mse_reset
+	call	prtstr
+	ld	a,$f2			; Identify mouse command
+	call	put_data_mse_dbg
+	jp	c,err_ctlr_to		; handle controller error
+	call	get_data_dbg
+	jp	c,err_ctlr_to		; handle controller error
+	cp	$fa			; Is it an ack as expected?
+	jp	nz,err_mse_reset
+	call	crlf
+	ld	de,str_mse_reset_ok
+	call	prtstr
+	xor	a
+	ret
+;
+; Identify Mouse
+;
+mse_ident:
+	call	crlf2
+	ld	de,str_mse_ident
+	call	prtstr
+	ld	a,$f2			; Identify mouse command
+	call	put_data_mse_dbg
+	jp	c,err_ctlr_to		; handle controller error
+	call	get_data_dbg
+	jp	c,err_ctlr_to		; handle controller error
+	cp	$fa			; Is it an ack as expected?
+	jp	nz,err_mse_ident
+	call	get_data_dbg
+	jp	c,err_ctlr_to		; handle controller error
+	push	af
+	call	crlf
+	ld	de,str_mse_ident_disp
+	call	prtstr
+	pop	af
+	call	prtdecb
+	xor	a
+	ret
+;
+; Enable mouse packet streaming
+;
+mse_stream:
+	call	crlf2
+	ld	de,str_mse_stream
+	call	prtstr
+	ld	a,$f4			; Stream packets cmd
+	call	put_data_mse_dbg
+	jp	c,err_ctlr_to		; handle controller error
+	call	get_data_dbg
+	jp	c,err_ctlr_to		; handle controller error
+	cp	$FA			; Is it an ack as expected?
+	jp	nz,err_mse_stream
+	xor	a
+	ret
+;
+; Read and display raw mouse packets
+;
+mse_echo:
+	call	crlf2
+	ld	de,str_disp_mse_pkts
+	call	prtstr
+	call	mse_track_disp		; show mouse status
+	xor	a
+	ld	(msebuflen),a
+mse_echo1:
+	ld	c,$06			; BDOS direct console I/O
+	ld	e,$FF			; Subfunction = read
+	call	bdos
+	cp	$1B			; Escape key?
+	ret	z
+	call	check_read_mse
+	jr	nz,mse_echo1
+	call	get_data
+	jp	c,err_ctlr_to		; handle controller error
+	push	af
+	ld	a,(msebuflen)		; current bytes in buf
+	ld	hl,msebuf		; start of buf
+	call	addhla			; point to next buf pos
+	pop	af
+	ld	(hl),a			; save byte in buf
+	ld	a,(msebuflen)
+	inc	a
+	ld	(msebuflen),a		; inc buf len
+	cp	3			; got 3 bytes?
+	jr	nz,mse_echo1	; if not, get some more
+	call	mse_track
+	call	mse_track_disp
+	jr	mse_echo1		; and loop
+;
+; Read and display data from keyboard and mouse
+;
+kbdmse_echo:
+	call	crlf2
+	ld	de,str_disp_kbdmse
+	call	prtstr
+	xor	a
+	ld	(msebuflen),a
+	call	kbdmse_track_disp
+;
+kbdmse_echo1:
+	; Check for user abort
+	ld	c,$06			; BDOS direct console I/O
+	ld	e,$FF			; Subfunction = read
+	call	bdos
+	cp	$1B			; Escape key?
+	ret	z
+;	
+	call	kbdmse_echo2
+	call	kbdmse_echo3
+	jr	kbdmse_echo1
+;
+kbdmse_echo2:
+	; Check & handle keyboard data
+	call	check_read_kbd
+	ret	nz
+	call	get_data
+	ld	(kbd_byte),a
+	call	kbdmse_track_disp
+	ret
+;
+kbdmse_echo3:
+	; Check & handle mouse data
+	call	check_read_mse
+	ret	nz
+	call	get_data
+	jp	c,err_ctlr_to		; handle controller error
+	push	af
+	ld	a,(msebuflen)		; current bytes in buf
+	ld	hl,msebuf		; start of buf
+	call	addhla			; point to next buf pos
+	pop	af
+	ld	(hl),a			; save byte in buf
+	ld	a,(msebuflen)
+	inc	a
+	ld	(msebuflen),a		; inc buf len
+	cp	3			; full packet?
+	ret	nz			; if not, loop
+	call	mse_track
+	call	kbdmse_track_disp
+	ret
+;
+; Update mouse tracking stuff
+; This routine assumes that msebuf has been filled with a complete
+; 3 byte mouse packet.
+;
+mse_track:
+	; Buttons...
+	ld	a,(msebuf)
+	ld	(mse_stat),a
+;
+	; X Coordinate
+	ld	a,(msebuf+1)
+	ld	e,a
+	ld	d,0
+	ld	a,(msebuf)
+	and	%00010000		; sign bit
+	jr	z,mse_track_x
+	ld	d,$ff			; sign extend
+mse_track_x:
+	ld	hl,(mse_x)
+	add	hl,de
+	ld	(mse_x),hl		; save result
+;
+	; Y Coordinate
+	ld	a,(msebuf+2)
+	ld	e,a
+	ld	d,0
+	ld	a,(msebuf)
+	and	%00100000		; sign bit
+	jr	z,mse_track_y
+	ld	d,$ff			; sign extend
+mse_track_y:
+	ld	hl,(mse_y)
+	add	hl,de
+	ld	(mse_y),hl		; save result
+;
+	; Reset mouse buffer
+	xor	a
+	ld	(msebuflen),a
+	ret
+;
+; Display current mouse tracking info (buttons and coordinates)
+;
+mse_track_disp:
+	ld	a,13			; CR only
+	call	prtchr
+	ld	de,str_msestat1		; "L="
+	call	prtstr
+	ld	a,(mse_stat)
+	and	%00000001
+	call	updown
+	ld	de,str_msestat2		; ", M="
+	call	prtstr
+	ld	a,(mse_stat)
+	and	%00000100
+	call	updown
+	ld	de,str_msestat3		; ", R="
+	call	prtstr
+	ld	a,(mse_stat)
+	and	%00000010
+	call	updown
+;
+	ld	de,str_msestat4		; ", X="
+	call	prtstr
+	ld	hl,(mse_x)		; save result
+	call	prthexword
+;
+	ld	de,str_msestat5		; ", Y="
+	call	prtstr
+	ld	hl,(mse_y)		; save result
+	call	prthexword
+;
+	ret
+;
+updown:
+	jr	nz,updown1
+	ld	de,str_up
+	jr	updown2
+updown1:
+	ld	de,str_down
+updown2:
+	call	prtstr
+	ret
+;
+; Display all keyboard and mouse tracking
+;
+kbdmse_track_disp:
+	call	mse_track_disp
+	ld	a,' '
+	call	prtchr
+	ld	a,'['
+	call	prtchr
+	ld	a,(kbd_byte)
+	call	prthex
+	ld	a,']'
+	call	prtchr
+	ret
+;
 ;=======================================================================
-; Keyboard Controller I/O Routines
+; PS/2 Controller I/O Routines
 ;=======================================================================
 ;
 wait_write:
 ;
-; Wait for keyboard controller to be ready for a write
+; Wait for controller to be ready for a write
 ;   A=0 indicates success (ZF set)
 ;
 	ld	a,(timeout)		; setup timeout constant
@@ -427,7 +798,7 @@ wait_write1:
 ;
 wait_read:
 ;
-; Wait for keyboard controller to be ready to read a byte
+; Wait for controller to be ready to read a byte
 ;   A=0 indicates success (ZF set)
 ;
 	ld	a,(timeout)		; setup timeout constant
@@ -458,9 +829,29 @@ check_read:
 	xor	$01			; invert so 0 means ready
 	ret
 ;
+check_read_kbd:
+;
+; Check for keyboard data ready to read
+;   A=0 indicates data available (ZF set)
+;
+	in	a,(iocmd)		; get status
+	and	%00100001		; isolate input buf status bit
+	cp	%00000001		; data ready, not mouse
+	ret
+;
+check_read_mse:
+;
+; Check for mouse data ready to read
+;   A=0 indicates data available (ZF set)
+;
+	in	a,(iocmd)		; get status
+	and	%00100001		; isolate input buf status bit
+	cp	%00100001		; data ready, is mouse
+	ret
+;
 put_cmd:
 ;
-; Put a cmd byte from A to the keyboard interface with timeout
+; Put a cmd byte from A to the controller with timeout
 ; CF set indicates timeout error
 ;
 	ld	e,a			; save incoming value
@@ -484,18 +875,12 @@ put_cmd_dbg:
 	call	prtstr
 	call	prthex
 
-;	ld	de,str_prefix		; "  "
-;	call	prtstr
-;	call	prthex
-;	ld	de,str_cmdout		; "->(CMD)"
-;	call	prtstr
-
 	pop	af
 	ret
 ;	
 put_data:
 ;
-; Put a data byte from A to the keyboard interface with timeout
+; Put a data byte from A to the controller interface with timeout
 ; CF set indicates timeout error
 ;
 	ld	e,a			; save incoming value
@@ -519,17 +904,41 @@ put_data_dbg:
 	call	prtstr
 	call	prthex
 
-;	ld	de,str_prefix		; "  "
-;	call	prtstr
-;	call	prthex
-;	ld	de,str_dataout		; "->(DATA)"
-;	call	prtstr
-
 	pop	af
 	ret
 
+;	
+put_data_mse:
+;
+; Put a data byte from A to the mouse interface with timeout
+; CF set indicates timeout error
+;
+	ld	e,a			; save incoming value
+	push	de
+	
+	ld	a,$d4			; mouse channel prefix
+	call	put_cmd
+	pop	de
+	ret	c
+	
+	ld	a,e			; recover value
+	call	put_data
+	ret
+;
+put_data_mse_dbg:
+	ld	e,a			; save incoming value
+	push	de
+	
+	ld	a,$d4			; mouse channel prefix
+	call	put_cmd_dbg
+	pop	de
+	ret	c
+	
+	ld	a,e			; recover value
+	call	put_data_dbg
+	ret
 ;
-; Get a data byte from the keyboard interface to A with timeout
+; Get a data byte from the controller interface to A with timeout
 ; CF set indicates timeout error
 ;
 get_data:
@@ -552,10 +961,6 @@ get_data_dbg:
 	call	prtstr
 	call	prthex
 
-;	ld	de,str_datain		; "  (DATA)->"
-;	call	prtstr
-;	call	prthex
-
 	pop	af
 	ret
 ;
@@ -569,6 +974,14 @@ err_ctlr_test:
 	ld	de,str_err_ctlr_test
 	jr	err_ret
 ;
+err_ctlr_test_p1:
+	ld	de,str_err_ctlr_test_p1
+	jr	err_ret
+;
+err_ctlr_test_p2:
+	ld	de,str_err_ctlr_test_p2
+	jr	err_ret
+;
 err_kbd_reset:
 	ld	de,str_err_kbd_reset
 	jr	err_ret
@@ -585,6 +998,18 @@ err_kbd_ident:
 	ld	de,str_err_kbd_ident
 	jr	err_ret
 ;
+err_mse_reset:
+	ld	de,str_err_mse_reset
+	jr	err_ret
+;
+err_mse_ident:
+	ld	de,str_err_mse_ident
+	jr	err_ret
+;
+err_mse_stream:
+	ld	de,str_err_mse_stream
+	jr	err_ret
+;
 err_ret:
 	call	crlf2
 	call	prtstr
@@ -648,7 +1073,6 @@ prthexpre:
 	call	prtchr
 	pop	af
 	ret
-
 ;
 ; Print the value in A in hex without destroying any registers
 ;
@@ -779,6 +1203,17 @@ crlf:
 	pop	af		; restore AF
 	ret
 ;
+; Add hl,a
+;
+;   A register is destroyed!
+;
+addhla:
+	add	a,l
+	ld	l,a
+	ret	nc
+	inc	h
+	ret
+;
 ; Delay ~10ms
 ;
 delay:
@@ -804,30 +1239,36 @@ delay1:
 ; Constants
 ;=======================================================================
 ;
-str_banner		.db	"Keyboard Information v0.2, 23-Dec-2021",0
-str_exit		.db	"Done, Thank you for using Keyboard Information!",0
-str_cmdport		.db	"Keyboard Controller Command Port: ",0
-str_dataport		.db	"Keyboard Controller Data Port: ",0
-;str_prefix		.db	"  ",0
-;str_cmdout		.db	"->(CMD)",0
-;str_dataout		.db	"->(DATA)",0
-;str_datain		.db	"  (DATA)->",0
-;str_timeout_write	.db	"Keyboard Controller Write Timeout, Status: ",0
-;str_timeout_read	.db	"Keyboard Controller Read Timeout, Status: ",0
-str_err_ctlr_to		.db	"Keyboard Controller I/O Timeout",0
-str_err_ctlr_test	.db	"Keyboard Controller Self-Test Failed",0
+str_banner		.db	"PS/2 Keyboard/Mouse Information v0.4, 7-Jan-2022",0
+str_exit		.db	"Done, Thank you for using PS/2 Keyboard/Mouse Information!",0
+str_cmdport		.db	"Controller Command Port: ",0
+str_dataport		.db	"Controller Data Port: ",0
+str_err_ctlr_to		.db	"Controller I/O Timeout",0
+str_err_ctlr_test	.db	"Controller Self-Test Failed",0
 str_put_cmd		.db	"  Sent Command ",0
 str_put_data		.db	"  Sent Data ",0
 str_get_data		.db	"  Got Data ",0
 str_ctlr_test		.db	"Attempting Controller Self-Test",0
 str_ctlr_test_ok	.db	"Controller Self-Test OK",0
+str_ctlr_test_p1	.db	"Attempting Self-Test of First Controller Port",0
+str_ctlr_test_p1_ok	.db	"Controller First Port Self-Test OK",0
+str_err_ctlr_test_p1	.db	"Controller First Port Self-Test Failed",0
+str_ctlr_test_p2	.db	"Attempting Self-Test of Second Controller Port",0
+str_ctlr_test_p2_ok	.db	"Controller Second Port Self-Test OK",0
+str_err_ctlr_test_p2	.db	"Controller Second Port Self-Test Failed",0
 str_ctlr_setup		.db	"Performing Controller Setup",0
+str_ctlr		.db	"***** Basic 8242 PS/2 Controller Tests *****",0
 str_basic		.db	"***** Basic Keyboard Checks and Scan Code Inventory *****",0
-str_trans_off		.db	"***** Testing with Scan Code Translation DISABLED *****",0
-str_trans_on		.db	"***** Testing with Scan Code Translation ENABLED *****",0
+str_trans_off		.db	"***** Testing Keyboard with Scan Code Translation DISABLED *****",0
+str_trans_on		.db	"***** Testing Keyboard with Scan Code Translation ENABLED *****",0
+str_basic_mse		.db	"***** Basic Mouse Tests *****",0
+str_kbdmse			.db	"***** Test All Devices Combined *****",0
 str_kbd_reset		.db	"Attempting Keyboard Reset",0
 str_kbd_reset_ok	.db	"Keyboard Reset OK",0
 str_err_kbd_reset	.db	"Keyboard Reset Failed",0
+str_mse_reset		.db	"Attempting Mouse Reset",0
+str_mse_reset_ok	.db	"Mouse Reset OK",0
+str_err_mse_reset	.db	"Mouse Reset Failed",0
 str_kbd_getsc		.db	"Requesting Active Scan Code Set from Keyboard",0
 str_kbd_dispsc		.db	"Active Keyboard Scan Code Set is #",0
 str_err_kbd_getsc	.db	"Error getting Active Keyboard Scan Code Set",0
@@ -835,18 +1276,42 @@ str_kbd_setsc		.db	"Setting Active Keyboard Scan Code Set to #",0
 str_err_kbd_setsc	.db	"Error setting Active Keyboard Scan Code Set",0
 str_kbd_ident		.db	"Keyboard Identification",0
 str_kbd_ident_disp	.db	"Keyboard Identity: ",0
+str_mse_ident		.db	"Mouse Identification",0
+str_mse_ident_disp	.db	"Mouse Identity: ",0
+str_mse_stream		.db	"Enable Mouse Packet Streaming",0
+str_err_mse_stream	.db	"Error enabling Mouse Packet Streaming",0
+str_msestat1		.db	"L=",0
+str_msestat2		.db	", M=",0
+str_msestat3		.db	", R=",0
+str_msestat4		.db	", X=",0
+str_msestat5		.db	", Y=",0
+str_up			.db	"UP",0
+str_down		.db	"DN",0
 str_sc_tag		.db	"Scan Code Set #",0
 str_sc_ok		.db	" IS supported",0
 str_sc_fail		.db	" IS NOT supported",0
 str_err_kbd_ident	.db	"Error performing Keyboard Identification",0
+str_err_mse_ident	.db	"Error performing Mouse Identification",0
 str_disp_scan_codes	.db	"Displaying Raw Scan Codes",13,10
 			.db	"  Press keys on test keyboard to display scan codes",13,10
 			.db	"  Press <esc> on CP/M console to end",13,10,13,10,0
-str_run_failed		.db	"***** HARDWARE ERROR *****",13,10,13,10
+str_disp_mse_pkts	.db	"Displaying Mouse Packets",13,10
+			.db	"  Move mouse and click mouse buttons",13,10
+			.db	"  Press <esc> on CP/M console to end",13,10,13,10,0
+str_disp_kbdmse		.db	"Displaying Keyboard & Mouse Activity",13,10
+			.db	"  Press keys on test keyboard to display scan codes",13,10
+			.db	"  Move mouse and click mouse buttons",13,10
+			.db	"  Press <esc> on CP/M console to end",13,10,13,10,0
+str_kbd_failed		.db	"***** KEYBOARD HARDWARE ERROR *****",13,10,13,10
 			.db	"A basic hardware or configuration issue prevented",13,10
-			.db	"Keyboard Information from completing the full set",13,10
-			.db	"of tests.  Check your hardware and verify the port",13,10
-			.db	"addresses being used for the keyboard controller",0
+			.db	"the completion of the full set of keyboard tests.",13,10
+			.db	"Check your hardware and verify the port",13,10
+			.db	"addresses being used for the controller",0
+str_mse_failed		.db	"***** MOUSE HARDWARE ERROR *****",13,10,13,10
+			.db	"A basic hardware or configuration issue prevented",13,10
+			.db	"the completion of the full set of mouse tests.",13,10
+			.db	"Check your hardware and verify the port",13,10
+			.db	"addresses being used for the controller",0
 ;
 ;=======================================================================
 ; Working data
@@ -859,6 +1324,15 @@ stack		.equ	$		; stack top
 workbuf		.fill	8
 workbuf_len	.db	0
 ;
+msebuf		.fill	5,0
+msebuflen	.db	0
+;
+mse_stat	.db	0
+mse_x		.dw	0
+mse_y		.dw	0
+;
+kbd_byte	.db	0
+;
 ctlr_cfgval	.db	0		; Value for controller cmd reg 0
 ;
 cpuscl		.db	cpumhz - 2

Source/Apps/Tune/tune.asm

@@ -622,6 +622,9 @@ CFGTBL:	;	PLT	RSEL	RDAT	RIN	Z180	ACR
 ;
 	.DB	$0B,	$33,	$32,	$32,	$FF,	$FF	; RCZ280 W/ LINC SOUND MODULE
 	.DW	HWSTR_LINC
+;
+	.DB	13,	$A0,	$A1,	$A0,	$FF,	$A2	; MBC
+	.DW	HWSTR_MBC
 ;
 	.DB	$FF					; END OF TABLE MARKER
 ;
@@ -674,6 +677,7 @@ HWSTR_RCEB	.DB	"RC2014 Sound Module (EB)",0
 HWSTR_RCEB6	.DB	"RC2014 Sound Module (EBv6)",0
 HWSTR_RCMF	.DB	"RC2014 Sound Module (MF)",0
 HWSTR_LINC	.DB	"Z50 LiNC Sound Module",0
+HWSTR_MBC	.DB	"NHYODYNE Sound Module",0
 
 MSGUNSUP	.db	"MYM files not supported with HBIOS yet!\r\n", 0
 
@@ -2649,4 +2653,3 @@ data:
 ;
 ;===============================================================================
 	.END
-

Source/Apps/XM/Build.cmd

@@ -3,22 +3,20 @@ setlocal
 
 set TOOLS=..\..\..\Tools
 
-set PATH=%TOOLS%\zx;%PATH%
+set PATH=%TOOLS%\zxcc;%PATH%
 
-set ZXBINDIR=%TOOLS%\cpm\bin\
-set ZXLIBDIR=%TOOLS%\cpm\lib\
-set ZXINCDIR=%TOOLS%\cpm\include\
+set CPMDIR80=%TOOLS%/cpm/
 
-zx mac xmdm125.asm $PO || exit /b
+zxcc mac xmdm125.asm $PO || exit /b
 
-zx slr180 -xmhb/HF || exit /b
-zx mload25 XM=xmdm125,xmhb || exit /b
+zxcc slr180 -xmhb/HF || exit /b
+zxcc mload25 XM=xmdm125,xmhb || exit /b
 
-rem zx slr180 -xmuf/HF || exit /b
-rem zx mload25 XMUF=xmdm125,xmuf || exit /b
+rem zxcc slr180 -xmuf/HF || exit /b
+rem zxcc mload25 XMUF=xmdm125,xmuf || exit /b
 
-zx slr180 -xmhb_old/HF || exit /b
-zx mload25 XMOLD=xmdm125,xmhb_old || exit /b
+zxcc slr180 -xmhb_old/HF || exit /b
+zxcc mload25 XMOLD=xmdm125,xmhb_old || exit /b
 
 rem set PROMPT=[Build] %PROMPT%
 rem %comspec%

Source/Apps/XM/Makefile

@@ -7,10 +7,10 @@ OTHERS = *.hex
 include $(TOOLS)/Makefile.inc
 
 xm.com: xmdm125.hex xmhb.hex
-	$(ZXCC) $(CPM)/MLOAD25 XM=xmdm125,xmhb
+	$(ZXCC) MLOAD25 XM=xmdm125,xmhb
 
 xmuf.com: xmdm125.hex xmuf.hex
-	$(ZXCC) $(CPM)/MLOAD25 XMUF=xmdm125,xmuf
+	$(ZXCC) MLOAD25 XMUF=xmdm125,xmuf
 
 xmold.com: xmdm125.hex xmhb_old.hex
-	$(ZXCC) $(CPM)/MLOAD25 XMOLD=xmdm125,xmhb_old
+	$(ZXCC) MLOAD25 XMOLD=xmdm125,xmhb_old

Source/Apps/ZMD/Build.cmd

@@ -3,35 +3,33 @@ setlocal
 
 set TOOLS=..\..\..\Tools
 
-set PATH=%TOOLS%\zx;%PATH%
+set PATH=%TOOLS%\zxcc;%PATH%
 
-set ZXBINDIR=%TOOLS%\cpm\bin\
-set ZXLIBDIR=%TOOLS%\cpm\lib\
-set ZXINCDIR=%TOOLS%\cpm\include\
+set CPMDIR80=%TOOLS%/cpm/
 
-zx z80asm -zmd/fm
-zx l80 -zmd,zmd/n/e
+zxcc z80asm -zmd/fm
+zxcc l80 -zmd,zmd/n/e
 
-zx z80asm -zmap/fm
-zx l80 -zmap,zmap/n/e
+zxcc z80asm -zmap/fm
+zxcc l80 -zmap,zmap/n/e
 
-zx z80asm -znews/fm
-zx l80 -znews,znews/n/e
+zxcc z80asm -znews/fm
+zxcc l80 -znews,znews/n/e
 
-zx z80asm -znewp/fm
-zx l80 -znewp,znewp/n/e
+zxcc z80asm -znewp/fm
+zxcc l80 -znewp,znewp/n/e
 
-zx z80asm -zfors/fm
-zx l80 -zfors,zfors/n/e
+zxcc z80asm -zfors/fm
+zxcc l80 -zfors,zfors/n/e
 
-zx z80asm -zforp/fm
-zx l80 -zforp,zforp/n/e
+zxcc z80asm -zforp/fm
+zxcc l80 -zforp,zforp/n/e
 
-zx z80asm -zmdel/fm
-zx l80 -zmdel,zmdel/n/e
+zxcc z80asm -zmdel/fm
+zxcc l80 -zmdel,zmdel/n/e
 
-zx z80asm -zmdhb/fh
-zx mload25 -zmd=zmd.com,zmdhb
+zxcc z80asm -zmdhb/fh
+zxcc mload25 -zmd=zmd.com,zmdhb
 
 copy /Y zmd.com ..\..\..\Binary\Apps\ || exit /b
 

Source/Apps/ZMD/Makefile

@@ -6,5 +6,5 @@ OTHERS = *.hex zmd.rel
 include $(TOOLS)/Makefile.inc
 
 zmd.com: zmd.rel zmdhb.hex
-	$(ZXCC) $(CPM)/L80 -zmd,zmd/n/e
-	$(ZXCC) $(CPM)/MLOAD25 -zmd=zmd.com,zmdhb
+	$(ZXCC) L80 -zmd,zmd/n/e
+	$(ZXCC) MLOAD25 -zmd=zmd.com,zmdhb

Source/Apps/ZMP/Build.cmd

@@ -3,14 +3,12 @@ setlocal
 
 set TOOLS=..\..\..\Tools
 
-set PATH=%TOOLS%\zx;%PATH%
+set PATH=%TOOLS%\zxcc;%PATH%
 
-set ZXBINDIR=%TOOLS%\cpm\bin\
-set ZXLIBDIR=%TOOLS%\cpm\lib\
-set ZXINCDIR=%TOOLS%\cpm\include\
+set CPMDIR80=%TOOLS%/cpm/
 
-zx Z80ASM -ZMO-RW01/H || exit /b
-zx MLOAD25 -ZMP.COM=ZMPX.COM,ZMO-RW01 || exit /b
+zxcc Z80ASM -ZMO-RW01/H || exit /b
+zxcc MLOAD25 -ZMP.COM=ZMPX.COM,ZMO-RW01 || exit /b
 
 copy /Y zmp.com ..\..\..\Binary\Apps\ || exit /b
 copy /Y *.ovr ..\..\..\Binary\Apps\ || exit /b

Source/Apps/ZMP/Makefile

@@ -7,4 +7,4 @@ NODELETE = *.ovr zmp.doc *.hlp
 include $(TOOLS)/Makefile.inc
 
 zmp.com: zmo-rw01.hex
-	$(ZXCC) $(CPM)/MLOAD25 -ZMP.COM=ZMPX.COM,ZMO-RW01
+	$(ZXCC) MLOAD25 -ZMP.COM=ZMPX.COM,ZMO-RW01

Source/Apps/assign.asm

@@ -22,12 +22,14 @@
 ;   2016-04-08 [WBW] Determine key memory addresses dynamically
 ;   2019-08-07 [WBW] Fixed DPB selection error
 ;   2019-11-17 [WBW] Added preliminary CP/M 3 support
-;   2019-12-24 [WBW] Fixed location of BIOS save area\
+;   2019-12-24 [WBW] Fixed location of BIOS save area
 ;   2020-04-29 [WBW] Updated for larger DPH (16 -> 20 bytes)
 ;   2020-05-06 [WBW] Add patch level to version compare
 ;   2020-05-10 [WBW] Set media change flag in XDPH for CP/M 3
 ;   2020-05-12 [WBW] Back out media change flag
 ;   2021-12-06 [WBW] Fix inverted ROM/RAM DPB mapping in buffer alloc
+;   2022-02-28 [WBW] Use HBIOS to swap banks under CP/M 3
+;                    Use CPM3 BDOS direct BIOS call to get DRVTBL adr
 ;_______________________________________________________________________________
 ;
 ; ToDo:
@@ -43,6 +45,7 @@ stksiz	.equ	$40		; Working stack size
 ;
 restart	.equ	$0000		; CP/M restart vector
 bdos	.equ	$0005		; BDOS invocation vector
+bnksel	.equ	$FFF3		; HBIOS bank select vector
 ;
 stamp	.equ	$40		; loc of RomWBW CBIOS zero page stamp
 ;
@@ -108,8 +111,11 @@ init:
 	ld	c,$0C		; function number
 	call	bdos		; do it, HL := version
 	ld	(cpmver),hl	; save it
-	ld	a,l		; low byte
-	cp	$30		; CP/M 3.0?
+	;push	hl		; *debug*
+	;pop	bc		; *debug*
+	;call	prthexword	; *debug*
+	;ld	a,l		; low byte
+	;cp	$30		; CP/M 3.0?
 ;
 	; get location of config data and verify integrity
 	ld	hl,stamp	; HL := adr or RomWBW zero page stamp
@@ -231,18 +237,24 @@ initx:
 ; CP/M 3 initialization
 ;
 initcpm3:
-	ld	hl,(bioloc)
-	ld	de,22*3		; offset of DRVTBL func
-	add	hl,de		; HL := DRVTBL func
-	call	jphl		; do it, HL := DRVTBL adr
-	ld	(drvtbl),hl	; save it
+	ld	a,22		; XBIOS DRVTBL function
+	call	xbios		; Invoke XBIOS
+	ld	(drvtbl),hl	; save DRVTBL address
+;
+; The CP/M 3 drvtbl is in common memory, but the XDPHs are not.
+; So, here we temporarily swap the bank to the CP/M 3 system
+; bank.  We cannot use the CP/M Direct BIOS call because it
+; explicitly blocks use of SELMEM, so we are foreced to use
+; HBIOS call.  The CP/M 3 system bank is always the HBIOS
+; user bank.
 ;
 	; switch to sysbnk
-	ld	hl,(bioloc)
-	ld	de,27*3		; offset of SELMEM func
-	add	hl,de		; HL := SELMEM func
-	ld	a,0		; bank 0 is system bank
-	call	jphl
+	ld	a,($FFE0)	; get current bank
+	push	af		; save it
+	ld	bc,$F8F2	; HBIOS Get Bank Info
+	rst	08		; call HBIOS, E=User Bank
+	ld	a,e		; HBIOS User Bank
+	call	bnksel		; HBIOS BNKSEL
 ;
 	; copy CP/M 3 drvtbl to drvmap working copy
 	ld	hl,(drvtbl)	; get drive table in HL
@@ -278,11 +290,8 @@ initc4:
 	djnz	initc2
 ;
 	; switch back to tpabnk
-	ld	hl,(bioloc)
-	ld	de,27*3		; offset of SELMEM func
-	add	hl,de		; HL := SELMEM func
-	ld	a,1		; bank 1 is tpa bank
-	call	jphl
+	pop	af		; recover prev bank
+	call	bnksel		; HBIOS BNKSEL
 ;
  	; return success
 	xor	a		; signal success
@@ -397,6 +406,15 @@ usage:
 	call	crlf		; formatting
 	ld	de,msgban1	; point to version message part 1
 	call	prtstr		; print it
+	ld	de,msg22	; assume CP/M 2.2
+	ld	a,(cpmver)	; low byte of ver
+	cp	$30		; CP/M 3.0?
+	jp	c,usage1	; if not, jump ahead
+	ld	de,msg3		; CP/M 3
+usage1:
+	call	prtstr
+	ld	de,msbban2	; next portion of banner
+	call	prtstr
 	ld	a,(unamod)	; get UNA flag
 	or	a		; set flags
 	ld	de,msghb	; point to HBIOS mode message
@@ -404,7 +422,7 @@ usage:
 	ld	de,msgub	; point to UBIOS mode message
 	call	nz,prtstr	; if UNA, say so
 	call	crlf		; formatting
-	ld	de,msgban2	; point to version message part 2
+	ld	de,msgban3	; point to version message part 2
 	call	prtstr		; print it
 	call	crlf2		; blank line
 	ld	de,msguse	; point to usage message
@@ -728,13 +746,13 @@ makdph3:
 ;
 ;
 instcpm3:
-;
-	; switch to sysbnk
-	ld	hl,(bioloc)
-	ld	de,27*3		; offset of SELMEM func
-	add	hl,de		; HL := SELMEM func
-	ld	a,0		; bank 0 is system bank
-	call	jphl
+	; swicth to sysbnk
+	ld	a,($FFE0)	; get current bank
+	push	af		; save it
+	ld	bc,$F8F2	; HBIOS Get Bank Info
+	rst	08		; call HBIOS, E=User Bank
+	ld	a,e		; HBIOS User Bank
+	call	$FFF3		; HBIOS BNKSEL
 ;
 	; copy drvmap working copy to CP/M 3 drvtbl
 	ld	hl,(drvtbl)	; get drvtbl address
@@ -802,11 +820,8 @@ instc3:
 	djnz	instc1
 ;
 	; switch back to tpabnk
-	ld	hl,(bioloc)
-	ld	de,27*3		; offset of SELMEM func
-	add	hl,de		; HL := SELMEM func
-	ld	a,1		; bank 1 is tpa bank
-	call	jphl
+	pop	af		; recover prev bank
+	call	$FFF3		; HBIOS BNKSEL
 ;
 	; set SCB drive door open flag
 	ld	a,$54		; SCB drive door opened flag
@@ -1733,6 +1748,23 @@ cbios:
 	call	addhl		; determine specific function address
 	jp	(hl)		; invoke CBIOS
 ;
+; Routine to call CPM3 BIOS routines via BDOS
+; function 50.
+;
+xbios:
+	ld	(biofnc),a	; set BIOS function
+	ld	c,50		; direct BIOS call function
+	ld	(dereg),de	; set DE parm
+	ld	de,biospb	; BIOS parameter block
+	jp	bdos		; invoke BDOS
+;
+biospb:
+biofnc	.db	0		; BIOS function
+areg	.db	0		; A register
+bcreg	.dw	0		; BC register
+dereg	.dw	0		; DE register
+hlreg	.dw	0		; HL register
+;
 ; Add the value in A to HL (HL := HL + A)
 ;
 addhl:
@@ -1911,10 +1943,13 @@ stack	.equ	$		; stack top
 ; Messages
 ;
 indent	.db	"   ",0
-msgban1	.db	"ASSIGN v1.4a for RomWBW CP/M, 6-Dec-2021",0
+msgban1	.db	"ASSIGN v1.5 for RomWBW CP/M ",0
+msg22	.db	"2.2",0
+msg3	.db	"3",0
+msbban2	.db	", 28-Feb-2022",0
 msghb	.db	" (HBIOS Mode)",0
 msgub	.db	" (UBIOS Mode)",0
-msgban2	.db	"Copyright 2021, Wayne Warthen, GNU GPL v3",0
+msgban3	.db	"Copyright 2021, Wayne Warthen, GNU GPL v3",0
 msguse	.db	"Usage: ASSIGN D:[=[{D:|<device>[<unitnum>]:[<slicenum>]}]][,...]",13,10
 	.db	"  ex. ASSIGN           (display all active assignments)",13,10
 	.db	"      ASSIGN /?        (display version and usage)",13,10

Source/Apps/cpuspd/Build.cmd

@@ -0,0 +1,10 @@
+@echo off
+setlocal
+
+set TOOLS=../../../Tools
+set PATH=%TOOLS%\tasm32;%PATH%
+set TASMTABS=%TOOLS%\tasm32
+
+tasm -t180 -g3 -fFF cpuspd.asm cpuspd.com cpuspd.lst || exit /b
+
+copy /Y cpuspd.com ..\..\..\Binary\Apps\ || exit /b

Source/Apps/cpuspd/Clean.cmd

@@ -0,0 +1,6 @@
+@echo off
+setlocal
+
+if exist *.com del *.com
+if exist *.lst del *.lst
+if exist *.bin del *.bin

Source/Apps/cpuspd/Makefile

@@ -0,0 +1,7 @@
+OBJECTS = cpuspd.com
+DEST = ../../../Binary/Apps
+TOOLS =../../../Tools
+
+USETASM=1
+
+include $(TOOLS)/Makefile.inc

Source/Apps/cpuspd/cpuspd.asm

@@ -0,0 +1,707 @@
+;
+;=======================================================================
+; HBIOS CPU Speed Selection Tool
+;=======================================================================
+;
+; Simple utility that sets CPU speed on RomWBW systems that support
+; software speed selection.
+;
+;=======================================================================
+;
+#include "../../HBIOS/hbios.inc"
+;
+; General operational equates (should not requre adjustment)
+;
+stksiz		.equ	$40		; Working stack size
+;
+cpumhz		.equ	30		; for time delay calculations (not critical)
+;
+rtc_port	.equ	$70		; RTC latch port adr
+;
+restart		.equ	$0000		; CP/M restart vector
+bdos		.equ	$0005		; BDOS invocation vector
+;
+ident		.equ	$FFFE		; loc of RomWBW HBIOS ident ptr
+;
+rmj		.equ	3		; intended CBIOS version - major
+rmn		.equ	1		; intended CBIOS version - minor
+;
+;=======================================================================
+;
+	.org	$100	; standard CP/M executable
+;
+;
+	; setup stack (save old value)
+	ld	(stksav),sp		; save stack
+	ld	sp,stack		; set new stack
+;
+	call	crlf
+	ld	de,str_banner		; banner
+	call	prtstr
+;
+	; initialization
+	call	init			; initialize
+	jr	nz,exit			; abort if init fails
+;
+	call	main			; do the real work
+;
+exit:
+	; clean up and return to command processor
+	call	crlf			; formatting
+	ld	sp,(stksav)		; restore stack
+	jp	restart			; return to CP/M via restart
+;
+;
+;=======================================================================
+; Main Program
+;=======================================================================
+;
+;
+; Initialization
+;
+init:
+	; check for UNA (UBIOS)
+	ld	a,($FFFD)	; fixed location of UNA API vector
+	cp	$C3		; jp instruction?
+	jr	nz,initwbw	; if not, not UNA
+	ld	hl,($FFFE)	; get jp address
+	ld	a,(hl)		; get byte at target address
+	cp	$FD		; first byte of UNA push ix instruction
+	jr	nz,initwbw	; if not, not UNA
+	inc	hl		; point to next byte
+	ld	a,(hl)		; get next byte
+	cp	$E5		; second byte of UNA push ix instruction
+	jr	nz,initwbw	; if not, not UNA
+	jp	err_una		; UNA not supported
+;
+initwbw:
+	; get location of config data and verify integrity
+	ld	hl,(ident)	; HL := adr or RomWBW HBIOS ident
+	ld	a,(hl)		; get first byte of RomWBW marker
+	cp	'W'		; match?
+	jp	nz,err_inv	; abort with invalid config block
+	inc	hl		; next byte (marker byte 2)
+	ld	a,(hl)		; load it
+	cp	~'W'		; match?
+	jp	nz,err_inv	; abort with invalid config block
+	inc	hl		; next byte (major/minor version)
+	ld	a,(hl)		; load it
+	cp	rmj << 4 | rmn	; match?
+	jp	nz,err_ver	; abort with invalid os version
+;
+initz:
+	; initialization complete
+	xor	a		; signal success
+	ret			; return
+;
+;
+;
+main:
+	; skip to start of first parm
+	ld	ix,$81		; point to start of parm area (past len byte)
+	call	nonblank	; skip to next non-blank char
+	jp	z,show_spd	; no parms, show current settings
+;
+main1:
+	; process options (if any)
+	cp	'/'		; option prefix?
+	jr	nz,main2	; not an option, continue
+	call	option		; process option
+	ret	nz		; some options mean we are done (e.g., "/?")
+	inc	ix		; skip option character
+	call 	nonblank	; skip whitespace
+	jr	main1		; continue option checking
+;
+main2:
+	ret	z		; if end, nothing to do
+	cp	','		; no new speed?
+	jr	z,main2a	; go to wait states
+	; parse speed string (half, full, double)
+	call	getalpha	; extract speed ("HALF", "FULL", "DOUBLE")
+	call	parse_spd	; parse to numeric
+	jp	c,err_parm	; if invalid, abort
+	ld	(new_cpu_spd),a	; save it
+	call	nonblank	; skip whitespace
+	jp	z,set_spd	; if nothing else, set new speed
+	cp	','		; parm separator
+	jp	nz,err_parm	; invalid format, show usage and abort
+main2a:
+	inc	ix		; pass separator
+	call	nonblank	; skip whitespace
+	jp	z,set_spd	; if nothing else, set new speed
+	call	isnum		; start of parm?
+	jr	c,main3		; nope, try skipping this parm
+	call	getnum		; get memory wait states
+	jp	c,err_parm	; if overflow, show usage and abort
+	ld	(new_ws_mem),a	; save memory wait states
+;
+main3:
+	call	nonblank	; skip whitespace
+	jp	z,set_spd	; if nothing else, set new speed
+	cp	','		; parm separator
+	jp	nz,err_parm	; invalid format, show usage and abort
+	inc	ix		; pass separator
+	call	nonblank	; skip whitespace
+	jp	z,set_spd	; if nothing else, set new speed
+	call	getnum		; get I/O wait states
+	jp	c,err_parm	; if overflow, show usage and abort
+	ld	(new_ws_io),a	; save memory wait states
+;
+	call	nonblank	; skip whitespace
+	jp	nz,err_parm	; invalid format, show usage and abort
+	jp	set_spd		; set new speed and return
+;
+parse_spd:
+	ld	a,(tmpstr)		; first byte of string
+	ld	c,0			; assume half speed
+	cp	'H'			; check it
+	jr	z,parse_spd1		; if equal, done
+	ld	c,1			; assume full speed
+	cp	'F'			; check it
+	jr	z,parse_spd1		; if equal, done
+	ld	c,2			; assume double speed
+	cp	'D'			; check it
+	jr	z,parse_spd1		; if equal, done
+	or	a			; clear CF
+	ccf				; set CF to indicate error
+	ret
+parse_spd1:
+	ld	a,c			; result to a
+	or	a			; clear CF
+	ret
+;
+set_spd:
+	call	delay
+	ld	b,BF_SYSSET
+	ld	c,BF_SYSSET_CPUSPD
+	ld	a,(new_cpu_spd)
+	ld	l,a
+	ld	a,(new_ws_mem)
+	ld	d,a
+	ld	a,(new_ws_io)
+	ld	e,a
+	rst	08
+	jp	nz,err_not_sup
+	call	show_spd
+	xor	a
+	ret
+;
+show_spd:
+	ld	b,BF_SYSGET
+	ld	c,BF_SYSGET_CPUINFO
+	rst	08
+	jp	nz,err_not_sup
+	call	crlf2
+	push	de			; save CPU speed for now
+	push	bc			; Oscillator speed to HL
+	pop	hl
+	ld	de,str_spacer
+	call	prtstr
+	call	prtd3m			; print it
+	ld	de,str_oscspd
+	call	prtstr
+	ld	b,BF_SYSGET
+	ld	c,BF_SYSGET_CPUSPD
+	rst	08
+	jp	nz,err_not_sup
+	push	de
+	ld	a,l
+	ld	de,str_slow
+	cp	0
+	jr	z,show_spd1
+	ld	de,str_full
+	cp	1
+	jr	z,show_spd1
+	ld	de,str_dbl
+	cp	2
+	jr	z,show_spd1
+	jp	err_invalid
+show_spd1:
+	call	crlf
+	call	prtstr
+	pop	bc			; recover wait states
+	pop	hl			; recover CPU speed
+	push	bc			; resave wait states
+	call	prtd3m
+	ld	de,str_cpuspd
+	call	prtstr
+	pop	hl
+	ld	a,h			; memory wait states
+	cp	$FF
+	jr	z,show_spd2
+	call	crlf
+	ld	de,str_spacer
+	call	prtstr
+	call	prtdecb
+	ld	de,str_memws
+	call	prtstr
+;
+show_spd2:
+	ld	a,l
+	cp	$FF
+	jr	z,show_spd3
+	call	crlf
+	ld	de,str_spacer
+	call	prtstr
+	call	prtdecb
+	ld	de,str_iows
+	call	prtstr
+;
+show_spd3:
+	ret
+;
+; Handle special options
+;
+option:
+;
+	inc	ix		; next char
+	ld	a,(ix)		; get it
+	cp	'?'		; is it a '?' as expected?
+	jp	z,usage		; yes, display usage
+	jp	err_parm	; anything else is an error
+
+usage:
+	call	crlf2
+	ld	de,str_usage
+	call	prtstr
+	or	$FF
+	ret
+;
+; Error Handlers
+;
+err_una:
+	ld	de,str_err_una
+	jr	err_ret
+err_inv:
+	ld	de,str_err_inv
+	jr	err_ret
+err_ver:
+	ld	de,str_err_ver
+	jr	err_ret
+err_parm:
+	ld	de,str_err_parm
+	jr	err_ret
+err_not_sup:
+	ld	de,str_err_not_sup
+	jr	err_ret
+err_invalid:
+	ld	de,str_err_invalid
+	jr	err_ret
+;
+err_ret:
+	call	crlf2
+	call	prtstr
+	or	$FF			; signal error
+	ret
+;
+;=======================================================================
+; Utility Routines
+;=======================================================================
+;
+;
+; Print character in A without destroying any registers
+;
+prtchr:
+	push	af
+	push	bc		; save registers
+	push	de
+	push	hl
+	ld	e,a		; character to print in E
+	ld	c,$02		; BDOS function to output a character
+	call	bdos		; do it
+	pop	hl		; restore registers
+	pop	de
+	pop	bc
+	pop	af
+	ret
+;
+; Print a dot character without destroying any registers
+;
+prtdot:
+	; shortcut to print a dot preserving all regs
+	push	af		; save af
+	ld	a,'.'		; load dot char
+	call	prtchr		; print it
+	pop	af		; restore af
+	ret			; done
+;
+; Print a zero terminated string at (de) without destroying any registers
+;
+prtstr:
+	push	af
+	push	de
+;
+prtstr1:
+	ld	a,(de)		; get next char
+	or	a
+	jr	z,prtstr2
+	call	prtchr
+	inc	de
+	jr	prtstr1
+;
+prtstr2:
+	pop	de		; restore registers
+	pop	af
+	ret
+;
+; Print a hex value prefix "0x"
+;
+prthexpre:
+	push	af
+	ld	a,'0'
+	call	prtchr
+	ld	a,'x'
+	call	prtchr
+	pop	af
+	ret
+;
+; Print the value in A in hex without destroying any registers
+;
+prthex:
+	call	prthexpre
+prthex1:
+	push	af		; save AF
+	push	de		; save DE
+	call	hexascii	; convert value in A to hex chars in DE
+	ld	a,d		; get the high order hex char
+	call	prtchr		; print it
+	ld	a,e		; get the low order hex char
+	call	prtchr		; print it
+	pop	de		; restore DE
+	pop	af		; restore AF
+	ret			; done
+;
+; print the hex word value in hl
+;
+prthexword:
+	call	prthexpre
+prthexword1:
+	push	af
+	ld	a,h
+	call	prthex1
+	ld	a,l
+	call	prthex1 
+	pop	af
+	ret
+;
+; print the hex dword value in de:hl
+;
+prthex32:
+	call	prthexpre
+	push	bc
+	push	de
+	pop	bc
+	call	prthexword1
+	push	hl
+	pop	bc
+	call	prthexword1
+	pop	bc
+	ret
+;
+; Convert binary value in A to ascii hex characters in DE
+;
+hexascii:
+	ld	d,a		; save A in D
+	call	hexconv		; convert low nibble of A to hex
+	ld	e,a		; save it in E
+	ld	a,d		; get original value back
+	rlca			; rotate high order nibble to low bits
+	rlca
+	rlca
+	rlca
+	call	hexconv		; convert nibble
+	ld	d,a		; save it in D
+	ret			; done
+;
+; Convert low nibble of A to ascii hex
+;
+hexconv:
+	and	$0F	     	; low nibble only
+	add	a,$90
+	daa	
+	adc	a,$40
+	daa	
+	ret
+;
+; Print value of A or HL in decimal with leading zero suppression
+; Use prtdecb for A or prtdecw for HL
+;
+prtdecb:
+	push	hl
+	ld	h,0
+	ld	l,a
+	call	prtdecw		; print it
+	pop	hl
+	ret
+;
+prtdecw:
+	push	af
+	push	bc
+	push	de
+	push	hl
+	call	prtdec0
+	pop	hl
+	pop	de
+	pop	bc
+	pop	af
+	ret
+;
+prtdec0:
+	ld	e,'0'
+	ld	bc,-10000
+	call	prtdec1
+	ld	bc,-1000
+	call	prtdec1
+	ld	bc,-100
+	call	prtdec1
+	ld	c,-10
+	call	prtdec1
+	ld	e,0
+	ld	c,-1
+prtdec1:
+	ld	a,'0' - 1
+prtdec2:
+	inc	a
+	add	hl,bc
+	jr	c,prtdec2
+	sbc	hl,bc
+	cp	e
+	ret	z
+	ld	e,0
+	call	prtchr
+	ret
+;
+; Print value of HL as thousandths, ie. 0.000
+;
+prtd3m:
+	push	bc
+	push	de
+	push	hl
+	ld	e,'0'
+	ld	bc,-10000
+	call	prtd3m1
+	ld	e,0
+	ld	bc,-1000
+	call	prtd3m1
+	call	prtdot
+	ld	bc,-100
+	call	prtd3m1
+	ld	c,-10
+	call	prtd3m1
+	ld	c,-1
+	call	prtd3m1
+	pop	hl
+	pop	de
+	pop	bc
+	ret
+prtd3m1:
+	ld	a,'0' - 1
+prtd3m2:
+	inc	a
+	add	hl,bc
+	jr	c,prtd3m2
+	sbc	hl,bc
+	cp	e
+	jr	z,prtd3m3
+	ld	e,0
+	call	prtchr
+prtd3m3:
+	ret
+
+
+
+;
+; Get the next non-blank character from (HL).
+;
+nonblank:
+	ld	a,(ix)		; load next character
+	or	a		; string ends with a null
+	ret	z		; if null, return pointing to null
+	cp	' '		; check for blank
+	ret	nz		; return if not blank
+	inc	ix		; if blank, increment character pointer
+	jr	nonblank	; and loop
+;
+; Get alpha chars and save in tmpstr
+; Length of string returned in A
+;
+getalpha:
+;
+	ld	hl,tmpstr	; location to save chars
+	ld	b,8		; length counter (tmpstr max chars)
+	ld	c,0		; init character counter
+;
+getalpha1:
+	ld	a,(ix)		; get active char
+	call	ucase		; lower case -> uppper case, if needed
+	cp	'A'		; check for start of alpha range
+	jr	c,getalpha2	; not alpha, get out
+	cp	'Z' + 1		; check for end of alpha range
+	jr	nc,getalpha2	; not alpha, get out
+	; handle alpha char
+	ld	(hl),a		; save it
+	inc	c		; bump char count
+	inc	hl		; inc string pointer
+	inc	ix		; increment buffer ptr
+	djnz	getalpha1	; if space, loop for more chars
+;
+getalpha2:	; non-alpha, clean up and return
+	ld	(hl),0		; terminate string
+	ld	a,c		; string length to A
+	or	a		; set flags
+	ret			; and return
+;
+; Determine if byte in A is a numeric '0'-'9'
+; Return with CF clear if it is numeric
+;
+isnum:
+	cp	'0'
+	jr	c,isnum1	; too low
+	cp	'9' + 1
+	jr	nc,isnum1	; too high
+	or	a		; clear CF
+	ret
+isnum1:
+	or	a		; clear CF
+	ccf			; set CF
+	ret
+	
+;
+; Get numeric chars and convert to number returned in A
+; Carry flag set on overflow
+;
+getnum:
+	ld	c,0		; C is working register
+getnum1:
+	ld	a,(ix)		; get the active char
+	cp	'0'		; compare to ascii '0'
+	jr	c,getnum2	; abort if below
+	cp	'9' + 1		; compare to ascii '9'
+	jr	nc,getnum2	; abort if above
+;
+	; valid digit, add new digit to C
+	ld	a,c		; get working value to A
+	rlca			; multiply by 10
+	ret	c		; overflow, return with carry set
+	rlca			; ...
+	ret	c		; overflow, return with carry set
+	add	a,c		; ...
+	ret	c		; overflow, return with carry set
+	rlca			; ...
+	ret	c		; overflow, return with carry set
+	ld	c,a		; back to C
+	ld	a,(ix)		; get new digit
+	sub	'0'		; make binary
+	add	a,c		; add in working value
+	ret	c		; overflow, return with carry set
+	ld	c,a		; back to C
+;
+	inc	ix		; bump to next char
+	jr	getnum1		; loop
+;
+getnum2:	; return result
+	ld	a,c		; return result in A
+	or	a		; with flags set, CF is cleared
+	ret
+;
+; Start a new line
+;
+crlf2:
+	call	crlf		; two of them
+crlf:
+	push	af		; preserve AF
+	ld	a,13		; <CR>
+	call	prtchr		; print it
+	ld	a,10		; <LF>
+	call	prtchr		; print it
+	pop	af		; restore AF
+	ret
+;
+; Convert character in A to uppercase
+;
+ucase:
+	cp	'a'		; if below 'a'
+	ret	c		; ... do nothing and return
+	cp	'z' + 1		; if above 'z'
+	ret	nc		; ... do nothing and return
+	res	5,a		; clear bit 5 to make lower case -> upper case
+	ret			; and return
+;
+; Add hl,a
+;
+;   A register is destroyed!
+;
+addhla:
+	add	a,l
+	ld	l,a
+	ret	nc
+	inc	h
+	ret
+;
+; Delay ~10ms
+;
+delay:
+	push	af
+	push	de
+	ld	de,625			; 10000us/16us
+delay0:
+	ld	a,cpumhz - 2
+delay1:
+	dec	a
+	jr	nz,delay1
+	dec	de
+	ld	a,d
+	or	e
+	jp	nz,delay0
+	pop	de
+	pop	af
+	ret
+;
+;
+;=======================================================================
+; Constants
+;=======================================================================
+;
+str_banner		.db	"RomWBW CPU Speed Selector v0.5, 2-Feb-2022",0
+str_spacer		.db	"  ",0
+str_oscspd		.db	" MHz Oscillator",0
+str_slow		.db	"  CPU speed is HALF (",0
+str_full		.db	"  CPU speed is FULL (",0
+str_dbl			.db	"  CPU speed is DOUBLE (",0
+str_cpuspd		.db	" MHz)",0
+str_memws		.db	" Memory Wait State(s)",0
+str_iows		.db	" I/O Wait State(s)",0
+str_err_una		.db	"  ERROR: UNA not supported by application",0
+str_err_inv		.db	"  ERROR: Invalid BIOS (signature missing)",0
+str_err_ver		.db	"  ERROR: Unexpected HBIOS version",0
+str_err_parm		.db	"  ERROR: Parameter error (CPUSPD /? for usage)",0
+str_err_not_sup		.db	"  ERROR: Platform or configuration not supported!",0
+str_err_invalid		.db	"  ERROR: Invalid configuration!",0
+str_usage		.db	"  Usage: CPUSPD <cpuspd>,<memws>,<iows>\r\n"
+			.db	"\r\n"
+			.db	"         <cpuspd>: \"Half\", \"Full\", or \"Double\"\r\n"
+			.db	"         <memws>:  Memory wait states\r\n"
+			.db	"         <iows>:   I/O wait states\r\n"
+			.db	"\r\n"
+			.db	"         Any parameter may be omitted\r\n"
+			.db	"         Ability to set values varies by system\r\n",0
+;
+;=======================================================================
+; Working data
+;=======================================================================
+;
+stksav		.dw	0		; stack pointer saved at start
+		.fill	stksiz,0	; stack
+stack		.equ	$		; stack top
+;
+;
+tmpstr		.fill	9,0		; temp string (8 chars, 0 term)
+new_cpu_spd	.db	$FF		; new CPU speed
+new_ws_mem	.db	$FF		; new memory wait states
+new_ws_io	.db	$FF		; new I/O wait states
+
+
+;
+;=======================================================================
+;
+	.end

Source/BPBIOS/Build.cmd

@@ -3,11 +3,9 @@ setlocal
 
 pushd ZCPR33 && call Build || exit /b & popd
 
-set PATH=%PATH%;..\..\Tools\zx;..\..\Tools\cpmtools;
+set PATH=%PATH%;..\..\Tools\zxcc;..\..\Tools\cpmtools;
 
-set ZXBINDIR=../../tools/cpm/bin/
-set ZXLIBDIR=../../tools/cpm/lib/
-set ZXINCDIR=../../tools/cpm/include/
+set CPMDIR80=%TOOLS%/cpm/
 
 call :makebp 33
 call :makebp 33bnk
@@ -45,7 +43,7 @@ echo.
 
 copy def-ww-z%VER%.lib def-ww.lib || exit /b
 rem if exist bpbio-ww.rel del bpbio-ww.rel || exit /b
-zx ZMAC -BPBIO-WW -/P || exit /b
+zxcc ZMAC -BPBIO-WW -/P || exit /b
 if exist bp%VER%.prn del bp%VER%.prn || exit /b
 ren bpbio-ww.prn bp%VER%.prn || exit /b
 if exist bp%VER%.err del bp%VER%.err || exit /b
@@ -56,18 +54,18 @@ rem pause
 
 rem BPBUILD attempts to rename bpsys.img -> bpsys.bak
 rem while is is still open.  Real CP/M does not care,
-rem but zx fails due to host OS.  Below, a temp file
+rem but zxcc fails due to host OS.  Below, a temp file
 rem is used to avoid the problematic rename.
 
 if exist bpsys.img del bpsys.img || exit /b
 if exist bpsys.tmp del bpsys.tmp || exit /b
 copy bp%VER%.dat bpsys.tmp || exit /b
 rem bpsys.tmp -> bpsys.img
-zx bpbuild -bpsys.tmp <bpbld1.rsp || exit /b
+zxcc bpbuild -bpsys.tmp <bpbld1.rsp || exit /b
 if exist bpsys.tmp del bpsys.tmp || exit /b
 copy bpsys.img bpsys.tmp || exit /b
 rem bpsys.tmp -> bpsys.img
-zx bpbuild -bpsys.tmp <bpbld2.rsp || exit /b
+zxcc bpbuild -bpsys.tmp <bpbld2.rsp || exit /b
 if exist bp%VER%.img del bp%VER%.img || exit /b
 if exist bpsys.img ren bpsys.img bp%VER%.img || exit /b
 

Source/BPBIOS/Makefile

@@ -37,7 +37,7 @@ clobber::
 	$(eval VER := $(subst .img,,$(subst bp,,$@)))
 	cp def-ww-z$(VER).lib def-ww.lib
 	rm -f bpbio-ww.rel
-	$(ZXCC) $(CPM)/ZMAC -BPBIO-WW -/P
+	$(ZXCC) ZMAC -BPBIO-WW -/P
 	mv bpbio-ww.prn bp$(VER).prn
 	cp bp$(VER).dat bpsys.dat
 	$(ZXCC) ./bpbuild.com -bpsys.dat 0 < bpbld1.rsp

Source/BPBIOS/ZCPR33/Build.cmd

@@ -1,13 +1,11 @@
 @echo off
 setlocal
 
-set PATH=%PATH%;..\..\..\Tools\zx;..\..\..\Tools\cpmtools;
+set PATH=%PATH%;..\..\..\Tools\zxcc;..\..\..\Tools\cpmtools;
 
-set ZXBINDIR=../../../tools/cpm/bin/
-set ZXLIBDIR=../../../tools/cpm/lib/
-set ZXINCDIR=../../../tools/cpm/include/
+set CPMDIR80=%TOOLS%/cpm/
 
 copy ..\z3base.lib . || exit /b
-zx ZMAC -zcpr33.z80 -/P || exit /b
+zxcc ZMAC -zcpr33.z80 -/P || exit /b
 del z3base.lib || exit /b
 move zcpr33.rel .. || exit /b

Source/BPBIOS/ZCPR33/Makefile

@@ -9,10 +9,10 @@ DIFFPATH = $(DIFFTO)/Source/BPBIOS
 
 zcpr33t.rel: ../z3baset.lib
 	cp ../z3baset.lib z3baset.lib
-	$(ZXCC) $(CPM)/ZMAC -zcpr33t.z80 -/P
+	$(ZXCC) ZMAC -zcpr33t.z80 -/P
 	rm z3baset.lib
 
 zcpr33n.rel: ../z3basen.lib
 	cp ../z3basen.lib z3basen.lib
-	$(ZXCC) $(CPM)/ZMAC -zcpr33n.z80 -/P
+	$(ZXCC) ZMAC -zcpr33n.z80 -/P
 	rm z3basen.lib

Source/CBIOS/Build.cmd

@@ -3,13 +3,11 @@ setlocal
 
 set TOOLS=../../Tools
 
-set PATH=%TOOLS%\tasm32;%TOOLS%\zx;%PATH%
+set PATH=%TOOLS%\tasm32;%TOOLS%\zxcc;%PATH%
 
 set TASMTABS=%TOOLS%\tasm32
 
-set ZXBINDIR=%TOOLS%/cpm/bin/
-set ZXLIBDIR=%TOOLS%/cpm/lib/
-set ZXINCDIR=%TOOLS%/cpm/include/
+set CPMDIR80=%TOOLS%/cpm/
 
 echo.
 echo Building CBIOS for RomWBW...

Source/CBIOS/cbios.asm

@@ -302,6 +302,13 @@ BOOT:
 	; STANDARD BOOT INVOCATION
 	;LD	SP,STACK	; STACK FOR INITIALIZATION
 	LD	SP,CCP_LOC	; PUT STACK JUST BELOW CCP
+;
+#IF DEBUG
+	CALL	PRTSTRD
+	.DB	"\r\nCBIOS Starting...$"
+	CALL	PRTSTRD
+	.DB	"\r\nCopying INIT code to 0x8000...$"
+#ENDIF
 ;
 	; COPY INITIALIZATION CODE TO RUNNING LOCATION $8000
 	LD	HL,BUFPOOL
@@ -311,6 +318,11 @@ BOOT:
 	PUSH	HL		; SAVE START ADR AGAIN FOR BELOW
 	PUSH	BC		; SAVE LENGTH FOR BELOW
 	LDIR			; COPY THE CODE
+;
+#IF DEBUG
+	CALL	PRTSTRD
+	.DB	"\r\nClearing disk buffer...$"
+#ENDIF
 ;
 	; CLEAR BUFFER
 	POP	BC		; RECOVER LENGTH
@@ -320,10 +332,30 @@ BOOT:
 	INC	DE		; OFFSET DEST
 	DEC	BC		; REDUCE LEN BY ONE
 	LDIR			; USE LDIR TO FILL
+;
+#IF DEBUG
+	CALL	PRTSTRD
+	.DB	"\r\nStarting INIT routine at 0x8000$"
+#ENDIF
 ;
 	CALL	INIT		; PERFORM COLD BOOD ROUTINE
+;
+#IF DEBUG
+	CALL	PRTSTRD
+	.DB	"\r\nResetting CP/M...$"
+#ENDIF
 	CALL	RESCPM		; RESET CPM
+;
+#IF DEBUG
+	CALL	PRTSTRD
+	.DB	"\r\nPerforming Auto Submit...$"
+#ENDIF
 	CALL	AUTOSUB		; PREP AUTO SUBMIT, IF APPROPRIATE
+;
+#IF DEBUG
+	CALL	PRTSTRD
+	.DB	"\r\nLaunching CP/M...$"
+#ENDIF
 ;
 	JR	GOCPM		; THEN OFF TO CP/M WE GO...
 ;
@@ -444,6 +476,12 @@ GOCPM:
 CURDSK:
 	LD	A,(CDISK)		; GET CURRENT USER/DISK
 GOCCP:
+;
+#IF DEBUG
+	CALL	PRTSTRD
+	.DB	"\r\nTransfer to CCP...$"
+#ENDIF
+;
 	LD	C,A			; SETUP C WITH CURRENT USER/DISK, ASSUME IT IS OK
 	JP	CCP_LOC			; JUMP TO COMMAND PROCESSOR
 ;
@@ -2011,6 +2049,12 @@ BUFPOOL	.EQU	$		; START OF BUFFER POOL
 HEAPEND	.EQU	CBIOS_END - 64		; TOP OF HEAP MEM, END OF CBIOS LESS 32 ENTRY STACK
 ;
 INIT:
+;
+#IF DEBUG
+	CALL	PRTSTRD
+	.DB	"\r\nStarting INIT....$"
+#ENDIF
+;
 	DI				; NO INTERRUPTS FOR NOW
 
 	; ADJUST BOOT VECTOR TO REBOOT ROUTINE
@@ -2068,12 +2112,21 @@ INIT:
 	LD	(BNKBIOS),A		; ... AND SAVE IT
 	LD	A,E			; GET USER BANK RETURNED IN E
 	LD	(BNKUSER),A		; ... AND SAVE IT
-
+;
+  #IF DEBUG
+	CALL	PRTSTRD
+	.DB	"\r\nReseting HBIOS....$"
+  #ENDIF
+;
 	; SOFT RESET HBIOS
 	LD	B,BF_SYSRESET		; HB FUNC: RESET
 	LD	C,BF_SYSRES_INT		; WARM START
 	RST	08			; DO IT
-
+;
+  #IF DEBUG
+	CALL	PRTSTRD
+	.DB	"\r\nCopying HCB....$"
+  #ENDIF
 	; CREATE A TEMP COPY OF THE HBIOS CONFIG BLOCK (HCB)
 	; FOR REFERENCE USE DURING INIT
 	LD	B,BF_SYSSETCPY		; HBIOS FUNC: SETUP BANK COPY
@@ -2412,6 +2465,13 @@ MD_INIT:
 ; UDPATE THE RAM/ROM DPB STRUCTURES BASED ON HARDWARE
 ;
 #IFDEF PLTWBW
+	; TODO: HANDLE DISABLED RAM/ROM DISK BETTER.
+	; IF RAM OR ROM DISK ARE DISABLED, BELOW WILL STILL
+	; TRY TO ADJUST THE DPB BASED ON RAM BANK CALCULATIONS.
+	; IT SHOULD NOT MATTER BECAUSE THE DPB SHOULD NEVER BE
+	; USED.  IT WOULD BE BETTER TO GET RAMD0/ROMD0 AND
+	; RAMDN/ROMDN FROM THE HCB AND USE THOSE TO CALC THE
+	; DPB ADJUSTMENT.  IF DN-D0=0, BYPASS ADJUSTMENT.
 	LD	A,(HCB + HCB_ROMBANKS)	; ROM BANK COUNT
 	SUB	4		; REDUCE BANK COUNT BY RESERVED PAGES
 	LD	IX,DPB_ROM	; ADDRESS OF DPB

Source/CBIOS/config.asm

@@ -4,6 +4,7 @@
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
+DEBUG		.EQU	FALSE		; MISCELLANEOUS DEBUG TRACING
 ;
 CPM_LOC		.EQU	$D000		; LOCATION OF START OF CCP
 ;

Source/CBIOS/util.asm

@@ -105,14 +105,61 @@ WRITESTR2:
 	POP	AF
 	RET
 ;
+#IF DEBUG
+;
+; PRINT A STRING AT ADDRESS SPECIFIED IN HL
+; STRING MUST BE TERMINATED BY '$'
+; USAGE:
+;   LD	HL,MYSTR
+;   CALL PRTSTR
+;   ...
+;   MYSTR: .DB  "HELLO$"
+;
+PRTSTR:
+	LD	A,(HL)
+	INC	HL
+	CP	'$'
+	RET	Z
+	CALL	COUT
+	JR	PRTSTR
 ;
+; PRINT A STRING DIRECT: REFERENCED BY POINTER AT TOP OF STACK
+; STRING MUST BE TERMINATED BY '$'
+; USAGE:
+;   CALL PRTSTRD
+;   .DB  "HELLO$"
+;   ...
 ;
-TSTPT:
-	PUSH	DE
-	LD	DE,STR_TSTPT
-	CALL	WRITESTR
-	POP	DE
-	JR	REGDMP			; DUMP REGISTERS AND RETURN
+PRTSTRD:
+	EX	(SP),HL
+	PUSH	AF
+	CALL	PRTSTR
+	POP	AF
+	EX	(SP),HL
+	RET
+;
+; PRINT A STRING INDIRECT: REFERENCED BY INDIRECT POINTER AT TOP OF STACK
+; STRING MUST BE TERMINATED BY '$'
+; USAGE:
+;   CALL PRTSTRI(MYSTRING)
+;   MYSTRING	.DB	"HELLO$"
+;
+PRTSTRI:
+	EX	(SP),HL
+	PUSH	AF
+	LD	A,(HL)
+	INC	HL
+	PUSH	HL
+	LD	H,(HL)
+	LD	L,A
+	CALL	PRTSTR
+	POP	HL
+	INC	HL
+	POP	AF
+	EX	(SP),HL
+	RET
+;
+#ENDIF
 ;
 ; PANIC: TRY TO DUMP MACHINE STATE
 ;

Source/CPM22/Build.cmd

@@ -3,34 +3,32 @@ setlocal
 
 set TOOLS=../../Tools
 
-set PATH=%TOOLS%\tasm32;%TOOLS%\zx;%PATH%
+set PATH=%TOOLS%\tasm32;%TOOLS%\zxcc;%PATH%
 
 set TASMTABS=%TOOLS%\tasm32
 
-set ZXBINDIR=%TOOLS%/cpm/bin/
-set ZXLIBDIR=%TOOLS%/cpm/lib/
-set ZXINCDIR=%TOOLS%/cpm/include/
+set CPMDIR80=%TOOLS%/cpm/
 
 call :asm ccpb03 || goto :eof
 call :asm bdosb01 || goto :eof
 
-zx MAC -CCP.ASM -$PO || exit /b
-zx MLOAD25 -CCP.BIN=CCP.HEX || exit /b
+zxcc MAC -CCP.ASM -$PO || exit /b
+zxcc MLOAD25 -CCP.BIN=CCP.HEX || exit /b
 
-zx MAC -BDOS.ASM -$PO || exit /b
-zx MLOAD25 -BDOS.BIN=BDOS.HEX || exit /b
+zxcc MAC -BDOS.ASM -$PO || exit /b
+zxcc MLOAD25 -BDOS.BIN=BDOS.HEX || exit /b
 
-zx MAC -CCP22.ASM -$PO || exit /b
-zx MLOAD25 -CCP22.BIN=CCP22.HEX || exit /b
+zxcc MAC -CCP22.ASM -$PO || exit /b
+zxcc MLOAD25 -CCP22.BIN=CCP22.HEX || exit /b
 
-zx MAC -BDOS22.ASM -$PO || exit /b
-zx MLOAD25 -BDOS22.BIN=BDOS22.HEX || exit /b
+zxcc MAC -BDOS22.ASM -$PO || exit /b
+zxcc MLOAD25 -BDOS22.BIN=BDOS22.HEX || exit /b
 
-zx MAC -OS2CCP.ASM -$PO || exit /b
-zx MLOAD25 -OS2CCP.BIN=OS2CCP.HEX || exit /b
+zxcc MAC -OS2CCP.ASM -$PO || exit /b
+zxcc MLOAD25 -OS2CCP.BIN=OS2CCP.HEX || exit /b
 
-zx MAC -OS3BDOS.ASM -$PO || exit /b
-zx MLOAD25 -OS3BDOS.BIN=OS3BDOS.HEX || exit /b
+zxcc MAC -OS3BDOS.ASM -$PO || exit /b
+zxcc MLOAD25 -OS3BDOS.BIN=OS3BDOS.HEX || exit /b
 
 tasm -t80 -g3 -fFF loader.asm loader.bin loader.lst || exit /b
 

Source/CPM3/Build.cmd

@@ -3,32 +3,30 @@ setlocal
 
 set TOOLS=../../Tools
 
-set PATH=%TOOLS%\tasm32;%TOOLS%\zx;%TOOLS%\cpmtools;%PATH%
+set PATH=%TOOLS%\tasm32;%TOOLS%\zxcc;%TOOLS%\cpmtools;%PATH%
 
 set TASMTABS=%TOOLS%\tasm32
 
-set ZXBINDIR=%TOOLS%/cpm/bin/
-set ZXLIBDIR=%TOOLS%/cpm/lib/
-rem set ZXINCDIR=%TOOLS%/cpm/include/
-set ZXINCDIR=../
+set CPMDIR80=%TOOLS%/cpm/
+set INCDIR80=../
 
 echo.
 echo.
 echo *** CPM Loader ***
 echo.
-zx RMAC -CPMLDR || exit /b
-zx Z80ASM -UTIL/MF || exit /b
+zxcc RMAC -CPMLDR || exit /b
+zxcc Z80ASM -UTIL/MF || exit /b
 copy optdsk.lib ldropts.lib || exit /b
-zx Z80ASM -BIOSLDR/MF || exit /b
+zxcc Z80ASM -BIOSLDR/MF || exit /b
 move /Y biosldr.rel biosldrd.rel || exit /b
 move /Y biosldr.lst biosldrd.lst || exit /b
-zx LINK -CPMLDRD[L100]=CPMLDR,BIOSLDRD,UTIL || exit /b
+zxcc LINK -CPMLDRD[L100]=CPMLDR,BIOSLDRD,UTIL || exit /b
 move /Y cpmldrd.com cpmldr.bin || exit /b
 copy optcmd.lib ldropts.lib || exit /b
-zx Z80ASM -BIOSLDR/MF || exit /b
+zxcc Z80ASM -BIOSLDR/MF || exit /b
 move /Y biosldr.rel biosldrc.rel || exit /b
 move /Y biosldr.lst biosldrd.lst || exit /b
-zx LINK -CPMLDRC[L100]=CPMLDR,BIOSLDRC,UTIL || exit /b
+zxcc LINK -CPMLDRC[L100]=CPMLDR,BIOSLDRC,UTIL || exit /b
 move /Y cpmldrc.com cpmldr.com || exit /b
 rem pause
 
@@ -38,16 +36,16 @@ echo *** Resident CPM3 BIOS ***
 echo.
 copy optres.lib options.lib || exit /b
 copy genres.dat gencpm.dat || exit /b
-zx RMAC -BIOSKRNL || exit /b
-zx RMAC -SCB || exit /b
-zx Z80ASM -BOOT/MF || exit /b
-zx Z80ASM -CHARIO/MF || exit /b
-zx Z80ASM -MOVE/MF || exit /b
-zx Z80ASM -DRVTBL/MF || exit /b
-zx Z80ASM -DISKIO/MF || exit /b
-zx Z80ASM -UTIL/MF || exit /b
-zx LINK -BIOS3[OS]=BIOSKRNL,SCB,BOOT,CHARIO,MOVE,DRVTBL,DISKIO,UTIL || exit /b
-zx GENCPM -AUTO -DISPLAY || exit /b
+zxcc RMAC -BIOSKRNL || exit /b
+zxcc RMAC -SCB || exit /b
+zxcc Z80ASM -BOOT/MF || exit /b
+zxcc Z80ASM -CHARIO/MF || exit /b
+zxcc Z80ASM -MOVE/MF || exit /b
+zxcc Z80ASM -DRVTBL/MF || exit /b
+zxcc Z80ASM -DISKIO/MF || exit /b
+zxcc Z80ASM -UTIL/MF || exit /b
+zxcc LINK -BIOS3[OS]=BIOSKRNL,SCB,BOOT,CHARIO,MOVE,DRVTBL,DISKIO,UTIL || exit /b
+zxcc GENCPM -AUTO -DISPLAY || exit /b
 copy cpm3.sys cpm3res.sys || exit /b
 rem pause
 
@@ -57,16 +55,16 @@ echo *** Banked CPM3 BIOS ***
 echo.
 copy optbnk.lib options.lib || exit /b
 copy genbnk.dat gencpm.dat || exit /b
-zx RMAC -BIOSKRNL || exit /b
-zx RMAC -SCB || exit /b
-zx Z80ASM -BOOT/MF || exit /b
-zx Z80ASM -CHARIO/MF || exit /b
-zx Z80ASM -MOVE/MF || exit /b
-zx Z80ASM -DRVTBL/MF || exit /b
-zx Z80ASM -DISKIO/MF || exit /b
-zx Z80ASM -UTIL/MF || exit /b
-zx LINK -BNKBIOS3[B]=BIOSKRNL,SCB,BOOT,CHARIO,MOVE,DRVTBL,DISKIO,UTIL || exit /b
-zx GENCPM -AUTO -DISPLAY || exit /b
+zxcc RMAC -BIOSKRNL || exit /b
+zxcc RMAC -SCB || exit /b
+zxcc Z80ASM -BOOT/MF || exit /b
+zxcc Z80ASM -CHARIO/MF || exit /b
+zxcc Z80ASM -MOVE/MF || exit /b
+zxcc Z80ASM -DRVTBL/MF || exit /b
+zxcc Z80ASM -DISKIO/MF || exit /b
+zxcc Z80ASM -UTIL/MF || exit /b
+zxcc LINK -BNKBIOS3[B]=BIOSKRNL,SCB,BOOT,CHARIO,MOVE,DRVTBL,DISKIO,UTIL || exit /b
+zxcc GENCPM -AUTO -DISPLAY || exit /b
 copy cpm3.sys cpm3bnk.sys || exit /b
 rem pause
 
@@ -76,16 +74,16 @@ echo *** Banked ZPM3 BIOS ***
 echo.
 copy optzpm.lib options.lib || exit /b
 copy genbnk.dat gencpm.dat || exit /b
-zx RMAC -BIOSKRNL || exit /b
-zx RMAC -SCB || exit /b
-zx Z80ASM -BOOT/MF || exit /b
-zx Z80ASM -CHARIO/MF || exit /b
-zx Z80ASM -MOVE/MF || exit /b
-zx Z80ASM -DRVTBL/MF || exit /b
-zx Z80ASM -DISKIO/MF || exit /b
-zx Z80ASM -UTIL/MF || exit /b
-zx LINK -ZPMBIOS3[B]=BIOSKRNL,SCB,BOOT,CHARIO,MOVE,DRVTBL,DISKIO,UTIL || exit /b
-rem zx GENCPM -AUTO -DISPLAY || exit /b
+zxcc RMAC -BIOSKRNL || exit /b
+zxcc RMAC -SCB || exit /b
+zxcc Z80ASM -BOOT/MF || exit /b
+zxcc Z80ASM -CHARIO/MF || exit /b
+zxcc Z80ASM -MOVE/MF || exit /b
+zxcc Z80ASM -DRVTBL/MF || exit /b
+zxcc Z80ASM -DISKIO/MF || exit /b
+zxcc Z80ASM -UTIL/MF || exit /b
+zxcc LINK -ZPMBIOS3[B]=BIOSKRNL,SCB,BOOT,CHARIO,MOVE,DRVTBL,DISKIO,UTIL || exit /b
+rem zxcc GENCPM -AUTO -DISPLAY || exit /b
 rem copy cpm3.sys zpm3.sys || exit /b
 rem pause
 

Source/CPM3/Makefile

@@ -19,7 +19,7 @@ TOOLS = ../../Tools
 
 include $(TOOLS)/Makefile.inc
 
-export ZXINCDIR = ../
+export INCDIR80 = ../
 
 BIOSOBJS = bioskrnl.rel scb.rel boot.rel chario.rel 
 BIOSOBJS += move.rel drvtbl.rel diskio.rel util.rel
@@ -61,31 +61,31 @@ zpmbios3:
 	make OBJECTS=zpmbios3.spr DEST=
 
 cpmldr.bin:	biosldrd.rel cpmldr.rel util.rel
-	$(ZXCC) $(TOOLS)/cpm/bin/LINK -CPMLDRD[L100]=CPMLDR,BIOSLDRD,UTIL
+	$(ZXCC) LINK -CPMLDRD[L100]=CPMLDR,BIOSLDRD,UTIL
 	mv cpmldrd.com cpmldr.bin
 
 cpmldr.com: biosldrc.rel cpmldr.rel util.rel
-	$(ZXCC) $(TOOLS)/cpm/bin/LINK -CPMLDRC[L100]=CPMLDR,BIOSLDRC,UTIL
+	$(ZXCC) LINK -CPMLDRC[L100]=CPMLDR,BIOSLDRC,UTIL
 	mv cpmldrc.com cpmldr.com
 
 biosldrc.rel: biosldr.z80 optcmd.lib
 	cp optcmd.lib ldropts.lib	
-	$(ZXCC) $(TOOLS)/cpm/bin/Z80ASM -BIOSLDR/MF
+	$(ZXCC) Z80ASM -BIOSLDR/MF
 	mv biosldr.rel biosldrc.rel
 
 biosldrd.rel: biosldr.z80 optdsk.lib
 	cp optdsk.lib ldropts.lib	
-	$(ZXCC) $(TOOLS)/cpm/bin/Z80ASM -BIOSLDR/MF
+	$(ZXCC) Z80ASM -BIOSLDR/MF
 	mv biosldr.rel biosldrd.rel
  
 bios3.spr: $(BIOSOBJS)
-	$(ZXCC) $(CPM)/LINK -bios3[OS]=$(BIOSNAMES)
+	$(ZXCC) LINK -bios3[OS]=$(BIOSNAMES)
 
 bnkbios3.spr: $(BIOSOBJS)
-	$(ZXCC) $(CPM)/LINK -bnkbios3[B]=$(BIOSNAMES)
+	$(ZXCC) LINK -bnkbios3[B]=$(BIOSNAMES)
 
 zpmbios3.spr: $(BIOSOBJS)
-	$(ZXCC) $(TOOLS)/cpm/bin/LINK -zpmbios3[B]=$(BIOSNAMES)
+	$(ZXCC) LINK -zpmbios3[B]=$(BIOSNAMES)
 
 cpm3.sys: cpm3$(DEFCPM3).sys
 	cp cpm3$(DEFCPM3).sys cpm3.sys

Source/CPM3/diskio.z80

@@ -355,6 +355,13 @@ dpb$hdnew:	; 8MB Hard Disk Drive (new format)
 ;		called for first time initialization.
 
 dsk$init:
+	; TODO: Handle disabled RAM/ROM disk better.
+	; If RAM or ROM disk are disabled, below will still
+	; try to adjust the DPB based on RAM bank calculations.
+	; It should not matter because the DPB should never be
+	; used.  It would be better to get RAMD0/ROMD0 and
+	; RAMDN/ROMDN from the HCB and use those to calc the
+	; DPB adjustment.  If DN-D0=0, bypass adjustment.
 	ld	b,0FAh			; HBIOS Peek Function
 	ld	a,(@hbbio)		; HBIOS bank id
 	ld	d,a			; ... goes in D

Source/Doc/Applications.md

@@ -47,7 +47,8 @@ found:
 | TALK        | Yes      | Yes        | Yes      |
 | RTC         | Yes      | Yes        | Yes      |
 | TIMER       | Yes      | Yes        | Yes      |
-| INTTEST     | Yes      | Yes        | Yes      |
+| CPUSPD      | Yes      | Yes        | Yes      |
+| INTTEST     | No       | Yes        | Yes      |
 | FAT         | No       | Yes        | Yes      |
 | TUNE        | No       | Yes        | Yes      |
 
@@ -167,6 +168,11 @@ This command is particularly sensitive to being matched to the
 appropriate version of the RomWBW ROM you are using. Be very careful
 to keep all copies of `ASSIGN.COM` up to date with your ROM.
 
+Additionally, the `ASSIGN` command must be able to adjust to CP/M 2.2
+vs. CP/M 3.  If you utilize an RSX that modifies the BDOS version
+returned, you are likely to have serious problems.  In this case, be
+sure to use `ASSIGN` prior to loading the RSX or after it is unloaded.
+
 ## Etymology
 
 The `ASSIGN` command is an original product and the source code is
@@ -955,3 +961,70 @@ player code is from MYMPLAY 0.4 by Lieves!Tuore and the PT player code
 is (c)2004-2007 S.V.Bulba <vorobey@mail.khstu.ru>.
 
 The source code is provided in the RomWBW distribution.
+
+# CPUSPD
+
+The `CPUSPD` application is used to change the running speed and wait
+states of a RomWBW system.
+
+  The functionality is highly dependent on
+the capabilities of your system.
+
+At present, all Z180 systems can change their CPU speed and their
+wait states.  SBC and MBC systems may be able to change their CPU
+speed if the hardware supports it and it is enabled in the HBIOS
+configuration.
+
+## Syntax
+
+| `CPUSPD [`*`<speed>`*`[,[`*`<memws>`*`][,[`*`<iows>`*`]]]`
+
+*`<speed>`* is one of HALF, FULL, or DOUBLE.  
+*`<memws>`* is a number specifying the desired memory wait states.  
+*`<iows>`* is a number specifying the desired I/O wait states.
+
+## Usage
+
+Entering `CPUSPD` with no parameters will display the current CPU speed
+and wait state information of the running system.  Wait state
+information is not available for all systems.
+
+To modify the running speed of a system, you can specify the
+`*`<speed>`*` parameter.  To modify either or both of the wait
+states, you can enter the desired number.  Either or both of the wait
+state parameters may be omitted and the current wait state settings
+will remain in effect.
+
+## Notes
+
+The ability to modify the running speed and wait states of a system
+varies widely depending on the hardware capabilities and the HBIOS
+configuration settings.
+
+Note that it is frequently impossible to tell if a system is capable
+of dynamic speed changes.  This function makes the changes blindly.
+If an attempt is made to change the speed of a system
+that is definitely incapable of doing so, then an error result is
+returned.
+
+The `CPUSPD` command makes no attempt to ensure that the new CPU
+speed will actually work on the current hardware.  Setting a CPU
+speed that exceeds the capabilities of the system will result in
+unstable operation or a system stall.
+
+Some peripherals are dependant on the CPU speed.  For example, the Z180
+ASCI baud rate and system timer are derived from the CPU speed.  The
+CPUSPD applicastion will attempt to adjust these peripherals for
+correct operation after modifying the CPU speed.  However, in some
+cases this may not be possible.  The baud rate of ASCI ports have a
+limited set of divisors.  If there is no satisfactory divisor to
+retain the existing baud rate under the new CPU speed, then the baud
+rate of the ASCI port(s) will be affected.
+
+## Etymology
+
+The `CPUSPD` application was custom written for RomWBW. All of the
+hardware interface code is specific to RomWBW and the application will
+not operate correctly on non-RomWBW systems.
+
+The source code is provided in the RomWBW distribution.

Source/Doc/Architecture.md

@@ -223,6 +223,18 @@ initialization routine. At this point, the prior HBIOS code has been
 discarded and overwritten. Finally, the Boot Loader is invoked just like
 a ROM Boot.
 
+ROM-less Boot
+-------------
+
+Some hardware supported by RomWBW has a special mechanism for loading
+the initial code.  These systems have no ROM chips.  However, they
+have a small hardware bootstrap that loads a chunk of code from a
+disk device directlly into RAM at system startup.
+
+The startup then proceeds very much like the Application Boot
+process described above.  HBIOS is installed in it's operating bank
+and control is passed to the loader.
+
 Notes
 -----
 
@@ -1938,6 +1950,7 @@ lookup.
 |           H: Z80 CPU Variant
 |           L: CPU Speed in MHz
 |           DE: CPU Speed in KHz
+|           BC: Oscillator Speed in KHz
 
 #### SYSGET Subfunction 0xF1 -- Get Memory Information (MEMINFO)
 
@@ -1959,6 +1972,23 @@ lookup.
 |           D: BIOS Bank ID
 |           E: User Bank ID
 
+#### SYSGET Subfunction 0xF3 -- Get CPU Speed (CPUSPD)
+
+|      _Entry Parameters_
+|           BC: 0xF8F3
+
+|      _Returned Values_
+|           A: Status (0=OK, else error)
+|           L: Clock Mult (0:Half, 1:Full, 2: Double)
+|           D: Memory Wait States
+|           E: I/O Wait States
+
+This function will return the running CPU speed attributes of a system.
+Note that it is frequently impossible to tell if a system is capable
+of dynamic speed changes.  This function returns it's best guess.
+If either of the wait state settings is unknown, the function will
+return 0xFF.
+
 ### Function 0xF9 -- System Set (SYSSET)
 
 |      _Entry Parameters_
@@ -2002,6 +2032,34 @@ available along with the registers/information used as input.
 |      _Returned Values_
 |           A: Status (0=OK, else error)
 
+#### SYSSET Subfunction 0xF3 -- Set CPU Speed (CPUSPD)
+
+|      _Entry Parameters_
+|           BC: 0xF9F3
+|           L: Clock Mult (0:Half, 1:Full, 2: Double)
+|           D: Memory Wait States
+|           E: I/O Wait States
+
+|      _Returned Values_
+|           A: Status (0=OK, else error)
+
+This function will modify the running CPU speed attributes of a system.
+Note that it is frequently impossible to tell if a system is capable
+of dynamic speed changes.  This function makes the changes blindly.
+You can specify 0xFF for either of the wait state settings to have them
+left alone.  If an attempt is made to change the speed of a system
+that is definitely incapable of doing so, then an error result is
+returned.
+
+Some peripherals are dependant on the CPU speed.  For example, the Z180
+ASCI baud rate and system timer are derived from the CPU speed.  The
+Set CPU Speed function will attempt to adjust these peripherals for
+correct operation after modifying the CPU speed.  However, in some
+cases this may not be possible.  The baud rate of ASCI ports have a
+limited set of divisors.  If there is no satisfactory divisor to
+retain the existing baud rate under the new CPU speed, then the baud
+rate of the ASCI port(s) will be affected.
+
 ### Function 0xFA -- System Peek (SYSPEEK)
 
 |      _Entry Parameters_

Source/Doc/Build.cmd

@@ -51,7 +51,7 @@ gpp -o %1.tmp -U "$" "$" "{" "}{" "}$" "{" "}" "@@@" "" -M "$" "$" "{" "}{" "}$"
 pandoc %1.tmp -f markdown -t pdf -s -o %1.pdf --default-image-extension=pdf || exit /b
 pandoc %1.tmp -f markdown -t html -s -o %1.html --default-image-extension=png || exit /b
 pandoc %1.tmp -f markdown -t dokuwiki -s -o %1.dw --default-image-extension=png || exit /b
-pandoc %1.tmp -f markdown -t gfm -s -o %1.gfm --default-image-extension=png || exit /b
+pandoc %1.tmp -f markdown -t gfm -o %1.gfm --default-image-extension=png || exit /b
 pandoc %1.tmp -f markdown -t plain -s -o %1.txt --default-image-extension=png || exit /b
 
 goto :eof

Source/Doc/GettingStarted.md

@@ -424,7 +424,7 @@ therefore, globally available.
 | TALK        | Direct console I/O to a specified character device.                                                  |
 | RTC         | Manage and test the Real Time Clock hardware.                                                        |
 | TIMER       | Display value of running periodic system timer.                                                      |
-| INTTEST     | Test interrupt vector hooking.                                                                       |
+| CPUSPD      | Change the running CPU speed and wait states of the system.    |
 
 Some custom applications do not fit on the ROM disk. They are found on the
 disk image files or the individual files can be found in the Binary\\Apps
@@ -434,6 +434,7 @@ directory of the distribution.
 | ----------- | -------------------------------------------------------------- |
 | TUNE        | Play .PT2, .PT3, .MYM audio files.                             |
 | FAT         | Access MS-DOS FAT filesystems from RomWBW (based on FatFs).    |
+| INTTEST     | Test interrupt vector hooking.                                                                       |
 
 Additional documentation on all of these applications can be found in
 "RomWBW Applications.pdf" in the Doc directory of the distribution.
@@ -1083,7 +1084,7 @@ through the normal startup process just like it was started from ROM.
 However, your ROM has not been updated and the next time you boot your
 system, it will revert to the system image contained in ROM.
 
-# Upgrading via Flash Utility
+## Upgrading via Flash Utility
 
 If you do not have easy access to a ROM programmer, it is usually
 possible to reprogram your system ROM using the FLASH utility from
@@ -1128,7 +1129,7 @@ system and boot an operating system from ROM. Do not boot from a disk
 device yet. Review the boot messages to see if any issues have
 occurred.
 
-# Upgrading via XModem Flash Updater
+## Upgrading via XModem Flash Updater
 
 Similar to using the Flash utility, the system ROM can be updated
 or upgraded through the ROM based updater utility. This works by
@@ -1143,7 +1144,7 @@ U (Begin Update). Then initiate the Xmodem transfer of the .img or
 
 More information can be found in the ROM Applications document.
 
-# Post Update System Image and Application update process
+## Post Upgrade System Image and Application Update Process
 
 Once you are satisfied that the ROM is working well, you will need to
 update the system images and RomWBW custom applications on your disk
@@ -1214,23 +1215,22 @@ operating system on your disk.
   
   After this is done, you will need to use `SYSCOPY` to place
   the ZPM3 loader image on the boot tracks of all ZPM3
-  boot disks/slices.  The loader image is called `CPMLDR.SYS`.
+  boot disks/slices.  The loader image is called `ZPMLDR.SYS`.
   You must then copy (at a minimum) `CPM3.SYS`, `ZCCP.COM`,
   `ZINSTAL.ZPM`, and `STARTZPM.COM` onto the disk/slice.
   Assuming you copied the ZPM3 boot files onto your RAM disk
   at A:, you would use:
   
   ```
-  A>B:SYSCOPY C:=CPMLDR.SYS
+  A>B:SYSCOPY C:=ZPMLDR.SYS
   A>B:COPY CPM3.SYS C:
   A>B:COPY ZCCP.COM C:
   A>B:COPY ZINSTAL.ZPM C:
   A>B:COPY STARTZPM.COM C:
   ```
   
-  You may be wondering if the references to `CPMLDR.SYS` and
-  `CPM3.SYS` are typos.  They are not.  ZPM3 uses the same loader
-  image as CPM3.  The ZPM3 main system code file is called `CPM3.SYS`
+  You may be wondering if the reference to `CPM3.SYS` is a typo.
+  It is not.  The ZPM3 main system code file is called `CPM3.SYS`
   which is the same name as CP/M 3 uses, but the file contents are
   not the same.
 
@@ -1263,29 +1263,34 @@ images.
 * FAT.COM
 * TUNE.COM
 
-# System Update
+## System Update
 
-If the system running ROMWBW utilizes the SST39SF040 Flash chip then it is possible to do a System Update in place of
-a System Upgrade in some cases.
+If the system running ROMWBW utilizes the SST39SF040 Flash chip then it
+is possible to do a System Update in place of a System Upgrade in some
+cases.
 
-A System Update would involve only updating the BIOS, ROM applications and CP/M system.
+A System Update would involve only updating the BIOS, ROM applications
+and CP/M system.
 
-A System Update may be more favorable than a System Upgrade in cases such as:
+A System Update may be more favorable than a System Upgrade in cases
+such as:
 
  - Overwriting of the ROM drive is not desired.
  - Space is unavailable to hold a full ROMWBW ROM.
  - To mimimize time taken to transfer and flash a full ROM.
  - Configuration changes are only minor and do not impact disk applications.
 
-The ROMWBW build process generates a system upgrade file along with the normal ROM image and can be identified by the
-extension ".upd". It will be 128Kb in size. In comparison the normal ROM image will have the extension ".rom" and be
-512Kb or 1024Kb in size.
+The ROMWBW build process generates a system upgrade file along with 
+the normal ROM image and can be identified by the extension ".upd". It 
+will be 128Kb in size. In comparison the normal ROM image will have 
+the extension ".rom" and be 512Kb or 1024Kb in size.
 
-Transferring and flashing the System Update is accomplished in the same manner as described above in *Upgrading* with
-the required difference being that the flash application needs to be directed to complete a partial flash using the
-/p command line switch.
+Transferring and flashing the System Update is accomplished in the 
+same manner as described above in *Upgrading* with the required 
+difference being that the flash application needs to be directed to 
+complete a partial flash using the /P command line switch.
 
-`E>flash write rom.upd /p`
+`E>FLASH WRITE ROM.UPD /P`
 
 # RomWBW Distribution
 
@@ -1303,7 +1308,7 @@ directories are:
 
 | Application | Description                                                    |
 | ----------- | -------------------------------------------------------------- |
-| Binary      | The final output files of the build process are placed here. Most importantly, are the ROM images with the file names ending in ".rom". |
+| Binary      | The final output files of the build process are placed here. Most importantly, the ROM images with the file names ending in ".rom". |
 | Doc         | Contains various detailed documentation including the operating systems, RomWBW architecture, etc. |
 | Source      | Contains the source code files used to build the software and ROM images. |
 | Tools       | Contains the MS Windows programs that are used by the build process or that may be useful in setting up your system. |
@@ -1327,10 +1332,11 @@ these applications are no longer provided.
 driver.
 * Ed Brindley contributed some of the code that supports the RC2014
 platform.
-* Phil Summers contributed Forth and BASIC in ROM, the AY-3-8910 sound
-driver as well as a long list of general code enhancements.
+* Phil Summers contributed the Forth and BASIC adaptations in ROM, the
+AY-3-8910 sound driver as well as a long list of general code
+enhancements.
 * Phillip Stevens contributed support for FreeRTOS.
-* Curt Mayer contributed the Linux / MacOS build process.
+* Curt Mayer contributed the original Linux / MacOS build process.
 * UNA BIOS and FDISK80 are the products of John Coffman.
 * FLASH4 is a product of Will Sowerbutts.
 * CLRDIR is a product of Max Scane.
@@ -1341,6 +1347,50 @@ the SN76489 sound driver.
 
 Contributions of all kinds to RomWBW are very welcome.
 
+# Licensing
+
+RomWBW is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+RomWBW is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with RomWBW.  If not, see <https://www.gnu.org/licenses/>.
+
+Portions of RomWBW were created by, contributed by, or derived from
+the work of others.  It is believed that these works are being used
+in accordance with the intentions and/or licensing of their creators.
+
+If anyone feels their work is being used outside of it's intended
+licensing, please notify:
+
+> Wayne Warthen  
+> wwarthen@gmail.com
+
+RomWBW is an aggregate work.  It is composed of many individual,
+standalone programs that are distributed as a whole to function as
+a cohesive system.  Each program may have it's own licensing which
+may be different from other programs within the aggregate.
+
+In some cases, a single program (e.g., CP/M Operating System) is
+composed of multiple components with different licenses.  It is
+believed that in all such cases the licenses are compatible with
+GPL version 3.
+
+RomWBW encourages code contributions from others.  Contributors
+may assert their own copyright in their contributions by
+annotating the contributed source code appropriately.  Contributors
+are further encouraged to submit their contributions via the RomWBW
+source code control system to ensure their contributions are clearly
+documented.
+
+All contributions to RomWBW are subject to this license.
+
 # Getting Assistance
 
 The best way to get assistance with RomWBW or any aspect of the

Source/Forth/Build.cmd

@@ -3,15 +3,13 @@ setlocal
 
 set TOOLS=../../Tools
 
-set PATH=%TOOLS%\tasm32;%TOOLS%\zx;%PATH%
+set PATH=%TOOLS%\tasm32;%TOOLS%\zxcc;%PATH%
 
 set TASMTABS=%TOOLS%\tasm32
 
-set ZXBINDIR=%TOOLS%/cpm/bin/
-set ZXLIBDIR=%TOOLS%/cpm/lib/
-set ZXINCDIR=%TOOLS%/cpm/include/
+set CPMDIR80=%TOOLS%/cpm/
 
-zx zsm =camel80.azm -/l || exit /b
-zx link -CAMEL80.BIN[L200]=CAMEL80 || exit /b
+zxcc zsm =camel80.azm -/l || exit /b
+zxcc link -CAMEL80.BIN[L200]=CAMEL80 || exit /b
 
 

Source/HBIOS/API.txt

@@ -100,9 +100,10 @@ GET ($F8):
                                                 H=Z80 CPU Variant
                                                 L=CPU Speed in MHz
                                                 DE=CPU Speed in KHz
+						BC=Oscillator Freq in KHz
 
     MEMINFO ($F1):
-      BC=Function/Subfunction                   A=Result
+      BC=FuSnction/Subfunction                   A=Result
                                                 D=# ROM Banks
                                                 E=# RAM Banks
 
@@ -111,6 +112,13 @@ GET ($F8):
                                                 D=BIOS Bank Id
                                                 E=User Bank Id
 
+    CPUSPD ($F3):
+      BC=Function/Subfunction			A=Result
+						L=Clock Mult (0:Half, 1:Full, 2: Double)
+						D=Memory Wait States
+						E=I/O Wait States
+						
+
 SET ($F9):
   BC=Function/Subfunction                       A=Result
 
@@ -127,6 +135,13 @@ SET ($F9):
       DE=Boot Volume (Disk Unit/Slice)
       L=Boot Bank Id
 
+    CPUSPD ($F3):
+      BC=Function/Subfunction			A=Result
+						L=Clock Mult (0:Half, 1:Full, 2: Double)
+						D=Memory Wait States
+						E=I/O Wait States
+						
+
 PEEK ($FA):
   B=Function                       		A=Result
   D=Bank					E=Byte Value

Source/HBIOS/Build.cmd

@@ -9,13 +9,11 @@ if "%1" == "dist" goto :dist
 
 set TOOLS=../../Tools
 
-set PATH=%TOOLS%\tasm32;%TOOLS%\zx;%PATH%
+set PATH=%TOOLS%\tasm32;%TOOLS%\zxcc;%PATH%
 
 set TASMTABS=%TOOLS%\tasm32
 
-set ZXBINDIR=%TOOLS%/cpm/bin/
-set ZXLIBDIR=%TOOLS%/cpm/lib/
-set ZXINCDIR=%TOOLS%/cpm/include/
+set CPMDIR80=%TOOLS%/cpm/
 
 ::
 :: This PowerShell script validates the build variables passed in.  If
@@ -95,8 +93,10 @@ copy /b romldr.bin + dbgmon.bin + ..\zsdos\zsys_wbw.bin osimg_small.bin || exit
 :: should yield a result of zero.
 ::
 
-for %%f in (hbios_rom.bin osimg.bin osimg1.bin osimg2.bin) do (
-  "%TOOLS%\srecord\srec_cat.exe" %%f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o %%f -Binary || exit /b
+if %ROMSize% gtr 0 (
+    for %%f in (hbios_rom.bin osimg.bin osimg1.bin osimg2.bin) do (
+      "%TOOLS%\srecord\srec_cat.exe" %%f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o %%f -Binary || exit /b
+    )
 )
 
 ::
@@ -115,17 +115,23 @@ for %%f in (hbios_rom.bin osimg.bin osimg1.bin osimg2.bin) do (
 :: HBIOS on the fly for testing purposes.
 ::
 
-copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin + ..\RomDsk\rom%ROMSize%_wbw.dat %ROMName%.rom || exit /b
-copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin %ROMName%.upd || exit /b
-copy /b hbios_app.bin + osimg_small.bin %ROMName%.com || exit /b
+if %ROMSize% gtr 0 (
+    copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin + ..\RomDsk\rom%ROMSize%_wbw.dat %ROMName%.rom || exit /b
+    copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin %ROMName%.upd || exit /b
+    copy /b hbios_app.bin + osimg_small.bin %ROMName%.com || exit /b
+) else (
+    copy /b hbios_rom.bin + osimg_small.bin %ROMName%.rom || exit /b
+    copy /b hbios_rom.bin + osimg_small.bin %ROMName%.upd || exit /b
+    copy /b hbios_app.bin + osimg_small.bin %ROMName%.com || exit /b
+)
 
 ::
 :: Copy results to output directory
 ::
 
-copy %ROMName%.rom ..\..\Binary || exit /b
-copy %ROMName%.upd ..\..\Binary || exit /b
-copy %ROMName%.com ..\..\Binary || exit /b
+if exist %ROMName%.rom copy %ROMName%.rom ..\..\Binary || exit /b
+if exist %ROMName%.upd copy %ROMName%.upd ..\..\Binary || exit /b
+if exist %ROMName%.com copy %ROMName%.com ..\..\Binary || exit /b
 
 goto :eof
 
@@ -190,6 +196,7 @@ call Build RCZ80 kio 512 || exit /b
 call Build RCZ80 mt 512 || exit /b
 call Build RCZ80 duart 512 || exit /b
 call Build RCZ80 zrc 512 || exit /b
+call Build RCZ80 zrc_ram 0 || exit /b
 call Build RCZ180 ext 512 || exit /b
 call Build RCZ180 nat 512 || exit /b
 call Build RCZ280 ext 512 || exit /b

Source/HBIOS/Build.ps1

@@ -76,8 +76,8 @@ while ($true)
 
 while ($true)
 {
-	if (($RomSize -eq 128) -or ($RomSize -eq 256) -or ($RomSize -eq 512) -or ($RomSize -eq 1024)) {break}
-	$RomSize = (Read-Host -prompt "ROM Size [128|256|512|1024]").Trim()
+	if (($RomSize -eq 0) -or ($RomSize -eq 128) -or ($RomSize -eq 256) -or ($RomSize -eq 512) -or ($RomSize -eq 1024)) {break}
+	$RomSize = (Read-Host -prompt "ROM Size [0|128|256|512|1024]").Trim()
 }
 
 #

Source/HBIOS/Build.sh

@@ -26,6 +26,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
 	ROM_PLATFORM="RCZ80"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
 	ROM_PLATFORM="RCZ80"; ROM_CONFIG="skz"; ROMSIZE="512"; bash Build.sh
 	ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc"; ROMSIZE="512"; bash Build.sh
+	ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc_ram"; ROMSIZE="0"; bash Build.sh
 	ROM_PLATFORM="SBC"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
 	ROM_PLATFORM="SBC"; ROM_CONFIG="simh"; ROMSIZE="512"; bash Build.sh
 	ROM_PLATFORM="MBC"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
@@ -71,7 +72,7 @@ if [ -z "${ROMSIZE}" ] ; then
 	ROMSIZE="512"
 fi
 
-while [ ! '(' "${ROMSIZE}" = 1024 -o "${ROMSIZE}" = 512 -o "${ROMSIZE}" = 256 -o "${ROMSIZE}" = 128 ')' ] ; do
+while [ ! '(' "${ROMSIZE}" = 1024 -o "${ROMSIZE}" = 512 -o "${ROMSIZE}" = 256 -o "${ROMSIZE}" = 128 -o "${ROMSIZE}" = 0 ')' ] ; do
 	echo -n "Romsize :"
 	read ROMSIZE
 done

Source/HBIOS/Config/RCZ280_nat.asm

@@ -28,7 +28,7 @@
 ;
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
-CPUOSC		.SET	24000000	; CPU OSC FREQ IN MHZ
+CPUOSC		.SET	12000000	; CPU OSC FREQ IN MHZ
 ;
 MEMMGR		.SET	MM_Z280		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 ;

Source/HBIOS/Config/RCZ280_nat_zzr.asm

@@ -28,16 +28,17 @@
 ;
 #include "Config/RCZ280_nat.asm"
 ;
-CPUOSC		.SET	29491200	; CPU OSC FREQ IN MHZ
+CPUOSC		.SET	14745600	; CPU OSC FREQ IN MHZ
 ;
-RAMSIZE		.SET	384		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-PLT_RAM_R	.SET	128		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-PLT_ROM_R	.SET	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+RAMSIZE		.SET	256		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.SET	256		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
 ;
-RAMLOC		.SET	23		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
+RAMLOC		.SET	18		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.SET	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 ;
-MDROM		.SET	FALSE		; MD: ENABLE ROM DISK
-MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
+MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.SET	FALSE		; MD: ENABLE RAM DISK
 ;
-Z2U0HFC		.SET	TRUE		; Z2U 0: ENABLE HARDWARE FLOW CONTROL
+;
+Z2UOSC		.SET	(CPUOSC / 8)	; Z2U: OSC FREQUENCY IN MHZ
+Z2U0HFC		.SET	TRUE		; Z2U0: ENABLE HARDWARE FLOW CONTROL

Source/HBIOS/Config/RCZ80_zrc.asm

@@ -30,6 +30,7 @@ CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
 CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
 ;
+RAMSIZE		.SET	1536		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 MEMMGR		.SET	MM_ZRC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
 ;
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)

Source/HBIOS/Config/RCZ80_zrc_ram.asm

@@ -0,0 +1,54 @@
+;
+;==================================================================================================
+;   RC2014 Z80 ZRC CONFIGURATION
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_rcz80.asm"
+;
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;
+CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
+;
+RAMSIZE		.SET	2048		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+MEMMGR		.SET	MM_ZRC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
+;
+MDROM		.SET	FALSE		; MD: ENABLE ROM DISK
+;
+UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+;
+TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+;
+AY38910ENABLE	.SET	TRUE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
+;
+FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+;
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Makefile

@@ -56,18 +56,26 @@ $(ROMNAME).rom $(ROMNAME).com $(ROMNAME).img &: $(ROMDEPS)
 	if [ $(ROM_PLATFORM) != UNA ] ; then \
 		cat camel80.bin nascom.bin tastybasic.bin game.bin eastaegg.bin netboot.mod updater.bin usrrom.bin >osimg1.bin ; \
 		cat imgpad2.bin >osimg2.bin ; \
-		for f in hbios_rom.bin osimg.bin osimg1.bin osimg2.bin ; do \
-			srec_cat $$f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $$f -Binary ; \
-		done \
+		if [ $(ROMSIZE) -gt 0 ] ; then \
+			for f in hbios_rom.bin osimg.bin osimg1.bin osimg2.bin ; do \
+				srec_cat $$f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $$f -Binary ; \
+			done \
+		fi \
 	fi
 	if [ $(ROM_PLATFORM) = UNA ] ; then \
 		cp osimg.bin $(DEST)/UNA_WBW_SYS.bin ; \
 		cp ../RomDsk/rom$(ROMSIZE)_una.dat $(DEST)/UNA_WBW_ROM$(ROMSIZE).bin ; \
 		cat ../UBIOS/UNA-BIOS.BIN osimg.bin ../UBIOS/FSFAT.BIN ../RomDsk/rom$(ROMSIZE)_una.dat >$(ROMNAME).rom ; \
 	else \
-		cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin ../RomDsk/rom$(ROMSIZE)_wbw.dat >$(ROMNAME).rom ; \
-		cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin >$(ROMNAME).upd ; \
-		cat hbios_app.bin osimg_small.bin > $(ROMNAME).com ; \
+		if [ $(ROMSIZE) -gt 0 ] ; then \
+			cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin ../RomDsk/rom$(ROMSIZE)_wbw.dat >$(ROMNAME).rom ; \
+			cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin >$(ROMNAME).upd ; \
+			cat hbios_app.bin osimg_small.bin > $(ROMNAME).com ; \
+		else \
+			cat hbios_rom.bin osimg_small.bin > $(ROMNAME).rom ; \
+			cat hbios_rom.bin osimg_small.bin > $(ROMNAME).upd ; \
+			cat hbios_app.bin osimg_small.bin > $(ROMNAME).com ; \
+		fi \
 	fi
 
 prereq: $(FONTS) camel80.bin tastybasic.bin

Source/HBIOS/ay38910.asm

@@ -48,6 +48,14 @@ AY_RDAT		.EQU	$32
 AY_RIN		.EQU	$32
 #ENDIF
 ;
+#IF (AYMODE == AYMODE_MBC)
+AY_RSEL		.EQU	$A0
+AY_RDAT		.EQU	$A1
+AY_RIN		.EQU	AY_RSEL
+AY_ACR		.EQU	$A2
+AY_CLK		.SET	3579545 	; MSX NTSC COLOUR BURST FREQ = 315/88
+#ENDIF
+;
 ;======================================================================
 ;
 ;	REGISTERS
@@ -128,6 +136,10 @@ AY38910_INIT:
 	PRTS(" MODE=MSX$")
 #ENDIF
 ;
+#IF (AYMODE == AYMODE_MBC)
+	PRTS(" MODE=MBC$")
+#ENDIF
+;
 #IF (AYMODE == AYMODE_LINC)
 	PRTS(" MODE=LINC$")
 #ENDIF
@@ -136,7 +148,7 @@ AY38910_INIT:
 	LD	A,AY_RSEL
 	CALL	PRTHEXBYTE
 ;
-#IF ((AYMODE == AYMODE_SCG) | (AYMODE == AYMODE_N8))
+#IF ((AYMODE == AYMODE_SCG) | (AYMODE == AYMODE_N8) | (AYMODE == AYMODE_MBC))
 	LD	A,$FF			; ACTIVATE DEVICE BIT 4 IS AY RESET CONTROL, BIT 3 IS ACTIVE LED
 	OUT	(AY_ACR),A		; SET INIT AUX CONTROL REG
 #ENDIF

Source/HBIOS/cfg_dyno.asm

@@ -13,6 +13,8 @@
 ;
 #DEFINE PLATFORM_NAME "DYNO"
 ;
+#INCLUDE "hbios.inc"
+;
 PLATFORM	.EQU	PLT_DYNO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
@@ -30,8 +32,7 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -124,7 +125,7 @@ MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
 MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
 FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_DYNO	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -178,6 +179,8 @@ PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (P
 ;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
@@ -191,7 +194,7 @@ SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
 ;
 AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-AYMODE		.EQU	AYMODE_NONE	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+AYMODE		.EQU	AYMODE_NONE	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;

Source/HBIOS/cfg_ezz80.asm

@@ -13,6 +13,8 @@
 ;
 #DEFINE PLATFORM_NAME "EASYZ80"
 ;
+#INCLUDE "hbios.inc"
+;
 PLATFORM	.EQU	PLT_EZZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
@@ -30,8 +32,7 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@@ -162,7 +163,7 @@ MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
 MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
 FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -220,6 +221,8 @@ PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (P
 ;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
@@ -233,7 +236,7 @@ SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
 ;
 AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-AYMODE		.EQU	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+AYMODE		.EQU	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;

Source/HBIOS/cfg_master.asm

@@ -10,6 +10,8 @@
 ;
 #DEFINE PLATFORM_NAME "ROMWBW"
 ;
+#INCLUDE "hbios.inc"
+;
 PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
@@ -27,8 +29,7 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_NONE		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -285,6 +286,11 @@ PPPCONENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 ;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -302,7 +308,7 @@ SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
 ;
 AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-AYMODE		.EQU	AYMODE_NONE	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+AYMODE		.EQU	AYMODE_NONE	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;

Source/HBIOS/cfg_mbc.asm

@@ -13,6 +13,8 @@
 ;
 #DEFINE PLATFORM_NAME "Multi Board Computer"
 ;
+#INCLUDE "hbios.inc"
+;
 PLATFORM	.EQU	PLT_MBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
@@ -30,8 +32,7 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_MBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@@ -41,7 +42,7 @@ RTCIO		.EQU	$70		; RTC LATCH REGISTER ADR
 KIOENABLE	.EQU	FALSE		; ENABLE ZILOG KIO SUPPORT
 KIOBASE		.EQU	$80		; KIO BASE I/O ADDRESS
 ;
-CTCENABLE	.EQU	FALSE		; ENABLE ZILOG CTC SUPPORT
+CTCENABLE	.EQU	TRUE		; ENABLE ZILOG CTC SUPPORT
 CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.EQU	$B0		; CTC BASE I/O ADDRESS
 CTCTIMER	.EQU	TRUE		; ENABLE CTC PERIODIC TIMER
@@ -49,7 +50,7 @@ CTCMODE		.EQU	CTCMODE_CTR	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
 CTCPRE		.EQU	256		; PRESCALE CONSTANT (1-256)
 CTCPRECH	.EQU	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.EQU	3		; TIMER CHANNEL (0-3)
-CTCOSC		.EQU	614400		; CTC CLOCK FREQUENCY
+CTCOSC		.EQU	(4915200/8)	; CTC CLOCK FREQUENCY
 ;
 EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 ;
@@ -120,7 +121,7 @@ Z2UENABLE	.EQU	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
 ;
 ACIAENABLE	.EQU	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 ;
-SIOENABLE	.EQU	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIOENABLE	.EQU	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.EQU	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
@@ -151,7 +152,7 @@ MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
 MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
 ;
 FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
@@ -217,6 +218,11 @@ PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (P
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 ;
+PIOENABLE	.EQU	TRUE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -234,7 +240,7 @@ SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
 ;
 AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-AYMODE		.EQU	AYMODE_NONE	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+AYMODE		.EQU	AYMODE_NONE	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	TRUE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;

Source/HBIOS/cfg_mk4.asm

@@ -13,6 +13,8 @@
 ;
 #DEFINE PLATFORM_NAME "MARK IV"
 ;
+#INCLUDE "hbios.inc"
+;
 PLATFORM	.EQU	PLT_MK4		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
@@ -30,8 +32,7 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -150,7 +151,7 @@ MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
 MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
 FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_DIDE	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -218,6 +219,11 @@ PPPCONENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
 ;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -235,7 +241,7 @@ SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
 ;
 AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-AYMODE		.EQU	AYMODE_SCG	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+AYMODE		.EQU	AYMODE_SCG	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;

Source/HBIOS/cfg_n8.asm

@@ -13,6 +13,8 @@
 ;
 #DEFINE PLATFORM_NAME "N8"
 ;
+#INCLUDE "hbios.inc"
+;
 PLATFORM	.EQU	PLT_N8		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
@@ -30,8 +32,7 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_N8		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 RAMBIAS		.EQU	0		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 RAMLOC		.EQU	0		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
@@ -152,7 +153,7 @@ MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
 MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
 FDENABLE	.EQU	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_N8	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -216,6 +217,11 @@ PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (P
 ;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -233,7 +239,7 @@ SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
 ;
 AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-AYMODE		.EQU	AYMODE_N8	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+AYMODE		.EQU	AYMODE_N8	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;

Source/HBIOS/cfg_rcz180.asm

@@ -13,6 +13,8 @@
 ;
 #DEFINE PLATFORM_NAME "RC2014"
 ;
+#INCLUDE "hbios.inc"
+;
 PLATFORM	.EQU	PLT_RCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
@@ -30,8 +32,7 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -168,7 +169,7 @@ MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
 MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
 FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -232,6 +233,11 @@ PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (P
 ;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
@@ -245,7 +251,7 @@ SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
 ;
 AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-AYMODE		.EQU	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+AYMODE		.EQU	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;

Source/HBIOS/cfg_rcz280.asm

@@ -13,6 +13,8 @@
 ;
 #DEFINE PLATFORM_NAME "RC2014"
 ;
+#INCLUDE "hbios.inc"
+;
 PLATFORM	.EQU	PLT_RCZ280	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
 CPUFAM		.EQU	CPU_Z280	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
@@ -25,13 +27,12 @@ BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMED
 ;
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
-CPUOSC		.EQU	24000000	; CPU OSC FREQ IN MHZ
+CPUOSC		.EQU	12000000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -184,7 +185,7 @@ MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
 MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
 FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -248,6 +249,11 @@ PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (P
 ;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
@@ -261,7 +267,7 @@ SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
 ;
 AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-AYMODE		.EQU	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+AYMODE		.EQU	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;

Source/HBIOS/cfg_rcz80.asm

@@ -13,6 +13,8 @@
 ;
 #DEFINE PLATFORM_NAME "RC2014"
 ;
+#INCLUDE "hbios.inc"
+;
 PLATFORM	.EQU	PLT_RCZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
@@ -30,8 +32,7 @@ INTMODE		.EQU	1		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@@ -173,7 +174,7 @@ MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
 MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
 FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -237,6 +238,11 @@ PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (P
 ;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
@@ -250,7 +256,7 @@ SNMODE		.EQU	SNMODE_RCZ80	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
 ;
 AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-AYMODE		.EQU	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+AYMODE		.EQU	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;

Source/HBIOS/cfg_sbc.asm

@@ -13,6 +13,8 @@
 ;
 #DEFINE PLATFORM_NAME "SBC"
 ;
+#INCLUDE "hbios.inc"
+;
 PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
@@ -30,8 +32,7 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@@ -151,7 +152,7 @@ MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
 MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
 ;
 FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
@@ -217,6 +218,11 @@ PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (P
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 ;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
@@ -234,7 +240,7 @@ SNMODE		.EQU	SNMODE_VGM	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
 ;
 AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-AYMODE		.EQU	AYMODE_SCG	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+AYMODE		.EQU	AYMODE_SCG	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;

Source/HBIOS/cfg_scz180.asm

@@ -13,6 +13,8 @@
 ;
 #DEFINE PLATFORM_NAME "SCZ180"
 ;
+#INCLUDE "hbios.inc"
+;
 PLATFORM	.EQU	PLT_SCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
@@ -30,8 +32,7 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -163,7 +164,7 @@ MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
 MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
 FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -227,6 +228,11 @@ PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (P
 ;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
@@ -240,7 +246,7 @@ SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
 ;
 AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-AYMODE		.EQU	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+AYMODE		.EQU	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;

Source/HBIOS/cfg_una.asm

@@ -13,7 +13,9 @@
 ;
 #DEFINE PLATFORM_NAME "UNA"
 ;
-PLATFORM	.EQU	PLT_UNA		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
+#INCLUDE "../UBIOS/ubios.inc"
+;
+;PLATFORM	.EQU	PLT_UNA		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
 BIOS		.EQU	BIOS_UNA	; HARDWARE BIOS: BIOS_[WBW|UNA]
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
@@ -24,8 +26,6 @@ CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 ;
 RTCIO		.EQU	$70		; RTC LATCH REGISTER ADR
 ;

Source/HBIOS/cfg_zeta.asm

@@ -13,6 +13,8 @@
 ;
 #DEFINE PLATFORM_NAME "ZETA"
 ;
+#INCLUDE "hbios.inc"
+;
 PLATFORM	.EQU	PLT_ZETA	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; BIOS_[WBW|UNA]: HARDWARE BIOS
@@ -30,8 +32,7 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@@ -161,6 +162,11 @@ PPPCONENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
 ;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_zeta2.asm

@@ -13,6 +13,8 @@
 ;
 #DEFINE PLATFORM_NAME "ZETA V2"
 ;
+#INCLUDE "hbios.inc"
+;
 PLATFORM	.EQU	PLT_ZETA2	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
@@ -30,8 +32,7 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@@ -134,7 +135,7 @@ MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
 MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
 MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM 
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
 FDENABLE	.EQU	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.EQU	FDMODE_ZETA2	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
@@ -172,6 +173,8 @@ PPPCONENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
 ;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/ctc.asm

@@ -19,17 +19,27 @@ CTC_TIMCFG	.EQU	%11010111	; CTC TIMER CHANNEL CONFIG
 		;	 |+-------- COUNTER MODE
 		;	 +--------- INTERRUPT ENABLE
 ;
-#IF (CTCTIMER)
+#IF (INTMODE != 2)
+	.ECHO	"*** WARNING: CTC TIMER DISABLED -- INTMODE 2 REQUIRED!!!\n"
+#ENDIF
+;
+#IF (CTCTIMER & (INTMODE == 2))
+;
+  #IF (INT_CTC0A % 4)
+  
+	.ECHO	INT_CTC0A
+	.ECHO	"\n"
+	.ECHO	(INT_CTC0A % 4)
+	.ECHO	"\n"
+  
+	.ECHO	"*** ERROR: CTC BASE VECTOR NOT /4 ALIGNED!!!\n"
+	!!!	; FORCE AN ASSEMBLY ERROR
+  #ENDIF
 ;
 ; ONLY IM2 IMPLEMENTED BELOW.  I DON'T SEE ANY REASONABLE WAY TO
 ; IMPLEMENT AN IM1 TIMER BECAUSE THE CTC PROVIDES NO WAY TO
 ; DETERMINE IF IT WAS THE CAUSE OF AN INTERRUPT OR A WAY TO
 ; DETERMINE WHICH CHANNEL CAUSED AN INTERRUPT.
-;
-  #IF (INTMODE != 2)
-	.ECHO	"*** ERROR: CTC REQUIRES INTMODE 2!!!\n"
-	!!!	; FORCE AN ASSEMBLY ERROR
-  #ENDIF
 ;  
 CTC_PREIO	.EQU	CTCBASE + CTCPRECH
 CTC_SCLIO	.EQU	CTCBASE + CTCTIMCH
@@ -82,6 +92,9 @@ CTCTIVT		.EQU	INT_CTC0A + CTCTIMCH
 ;
 ;
 CTC_PREINIT:
+	CALL	CTC_DETECT		; DO WE HAVE ONE?
+	LD	(CTC_EXIST),A		; SAVE IT
+	RET	NZ			; ABORT IF NONE
 ;
 	; RESET ALL CTC CHANNELS
 	LD	B,4			; 4 CHANNELS
@@ -92,7 +105,7 @@ CTC_PREINIT1:
 	INC	C			; NEXT CHANNEL PORT
 	DJNZ	CTC_PREINIT1
 ;
-#IF (CTCTIMER)
+#IF (CTCTIMER & (INTMODE == 2))
 	; SETUP TIMER INTERRUPT IVT SLOT
 	LD	HL,HB_TIMINT		; TIMER INT HANDLER ADR
 	LD	(IVT(CTCTIVT)),HL	; IVT ENTRY FOR TIMER CHANNEL
@@ -101,7 +114,7 @@ CTC_PREINIT1:
 	; EACH CHANNEL.  BELOW WE SET THE BASE VECTOR TO THE
 	; START OF THE IVT, SO THE FIRST FOUR ENTIRES OF THE
 	; IVT CORRESPOND TO CTC CHANNELS A-D.
-	LD	A,0
+	LD	A,INT_CTC0A * 2
 	OUT	(CTCBASE),A		; SETUP CTC BASE INT VECTOR
 ;
 	; IN ORDER TO DIVIDE THE CTC INPUT CLOCK DOWN TO THE
@@ -136,9 +149,20 @@ CTC_PRTCFG:
 	LD	A,CTCBASE		; GET BASE PORT
 	CALL	PRTHEXBYTE		; PRINT BASE PORT
 ;
-#IF (CTCTIMER)
+	LD	A,(CTC_EXIST)		; IS IT THERE?
+	OR	A			; 0 MEANS YES
+	JR	Z,CTC_PRTCFG1		; IF SO, CONTINUE
+;
+	; NOTIFY NO CTC HARDWARE
+	PRTS(" NOT PRESENT$")
+	OR	$FF
+	RET
+;
+CTC_PRTCFG1:
+;
+#IF (CTCTIMER & (INTMODE == 2))
 ;
-	PRTS(" MODE=$")			; FORMATTING
+	PRTS(" TIMER MODE=$")			; FORMATTING
   #IF (CTCMODE == CTCMODE_CTR)
 	PRTS("CTR$")
   #ENDIF
@@ -149,6 +173,7 @@ CTC_PRTCFG:
 	PRTS("TIM256$")
   #ENDIF
 ;
+  #IF (CTCDEBUG)
 	PRTS(" DIVHI=$")
 	LD	A,CTC_DIVHI & $FF
 	CALL	PRTHEXBYTE
@@ -157,7 +182,6 @@ CTC_PRTCFG:
 	LD	A,CTC_DIVLO & $FF
 	CALL	PRTHEXBYTE
 ;
-  #IF (CTCDEBUG)
 	PRTS(" PREIO=$")
 	LD	A,CTC_PREIO
 	CALL	PRTHEXBYTE
@@ -175,3 +199,31 @@ CTC_PRTCFG:
 ;
 	XOR	A
 	RET
+;
+;
+;
+CTC_DETECT:
+	LD	A,CTC_TIM256CFG
+	OUT	(CTCBASE),A
+	XOR	A
+	OUT	(CTCBASE),A
+	; CTC SHOULD NOW BE RUNNING WITH TIME CONSTANT 0
+	LD	A,CTC_TIM256CFG		; RESET
+	OUT	(CTCBASE),A
+	IN	A,(CTCBASE)		; SHOULD READ 0 NOW
+	CP	0
+	JR	NZ,CTC_NO
+	LD	A,$FF			; TIME CONSTANT $FF
+	OUT	(CTCBASE),A
+	IN	A,(CTCBASE)		; SHOULD NOT BE 0 NOW
+	CP	0
+	JR	Z,CTC_NO
+	XOR	A
+	RET
+CTC_NO:
+	OR	$FF
+	RET
+;
+;
+;
+CTC_EXIST	.DB	$FF	

Source/HBIOS/hbios.inc

@@ -108,10 +108,12 @@ BF_SYSGET_BOOTINFO	.EQU	$E0	; GET BOOT INFORMATION
 BF_SYSGET_CPUINFO	.EQU	$F0	; GET CPU INFORMATION
 BF_SYSGET_MEMINFO	.EQU	$F1	; GET MEMORY CAPACTITY INFO
 BF_SYSGET_BNKINFO	.EQU	$F2	; GET BANK ASSIGNMENT INFO
+BF_SYSGET_CPUSPD	.EQU	$F3	; GET CLOCK SPEED & WAIT STATES
 ;
 BF_SYSSET_TIMER		.EQU	$D0	; SET TIMER VALUE
 BF_SYSSET_SECS		.EQU	$D1	; SET SECONDS VALUE
 BF_SYSSET_BOOTINFO	.EQU	$E0	; SET BOOT INFORMATION
+BF_SYSSET_CPUSPD	.EQU	$F3	; SET CLOCK SPEED & WAIT STATES
 ;
 BF_SYSINT_INFO		.EQU	$00	; GET INTERRUPT SYSTEM INFO
 BF_SYSINT_GET		.EQU	$10	; GET INT VECTOR ADDRESS
@@ -119,6 +121,22 @@ BF_SYSINT_SET		.EQU	$20	; SET INT VECTOR ADDRESS
 ;
 CIO_CONSOLE		.EQU	$80	; CIO UNIT NUM FOR CUR CON
 ;
+; PRIMARY HARDWARE PLATFORMS
+;
+PLT_SBC		.EQU	1		; SBC ECB Z80 SBC
+PLT_ZETA	.EQU	2		; ZETA Z80 SBC
+PLT_ZETA2	.EQU	3		; ZETA Z80 V2 SBC
+PLT_N8		.EQU	4		; N8 (HOME COMPUTER) Z180 SBC
+PLT_MK4		.EQU	5		; MARK IV
+PLT_UNA		.EQU	6		; UNA BIOS
+PLT_RCZ80	.EQU	7		; RC2014 W/ Z80
+PLT_RCZ180	.EQU	8		; RC2014 W/ Z180
+PLT_EZZ80	.EQU	9		; EASY Z80
+PLT_SCZ180	.EQU	10		; SCZ180
+PLT_DYNO	.EQU	11		; DYNO MICRO-ATX MOTHERBOARD
+PLT_RCZ280	.EQU	12		; RC2014 W/ Z280
+PLT_MBC		.EQU	13		; MULTI BOARD COMPUTER
+;
 ; HBIOS GLOBAL ERROR RETURN VALUES
 ;
 ERR_NONE		.EQU	0	; SUCCESS

Source/HBIOS/pio_ps.asm

@@ -0,0 +1,999 @@
+; PIO driver sets up the parallel port as a subtype of Serial/Char device.
+;
+;
+; HBIOS initializes driver by:
+;
+; 1) Calling Pre-initialization
+;
+;    This involves setting up all the data structures describing the devices.
+;    If possible, do a hardware test to verify it is available for adding to available devices.
+;
+; 2) Calling device initialization.
+;
+;    Hardware initialization.
+;    Configure to initial state or to a new state.
+;
+; Implementation limitations:
+;
+; The fully functionality of the Z80 PIO can only be realized by using Z80 interrupt mode 2.
+; Registers cannot be interrogated for interrupts status and the originating interrupt
+; device cannot be determine.
+;
+; Full implementation of IM2 functionality for an ECB-ZP and ECB-4P board would require the 
+; allocation of an interrupt handler for each chip channel. Thus, 12 interrupt handlers
+; would be required to support this configuration. As the HBIOS only has an allocation of
+; 16, a full implmentation is impractical.
+;
+; The compromise solution is to allow 4 interrupts for the PIO driver. All remaining PIO's
+; are limited to Bit mode or blind read and write to the input/output ports.
+;
+; Zilog PIO reset state:
+;
+;	Both port mask registers are reset to inhibit All port data bits.
+;	Port data bus lines are set to a high-impedance state and the Ready "handshake"
+;	Mode 1 (output) is automatically selected.
+;	The vector address registers are not reset.
+;	Both port interrupt enable flip-flops are reset.
+;	Both port output registers are reset.
+;
+; Register addressing example for ECB-ZP and ECB-4P assuming base address 90h and 88h respectively.
+;
+; PIO ----ZP---- ----4P----
+;  0  DATA 0 90h DATA 0 B8h
+;  0  DATA 1 91h DATA 1 B9h
+;  0  CMD  0 92h CMD  0 BAh
+;  0  CMD  1 93h CMD  1 BBh
+;  1  DATA 0 94h DATA 0 BCh
+;  1  DATA 1 95h DATA 1 BDh
+;  1  CMD  0 96h CMD  0 BEh
+;  1  CMD  1 97h CMD  1 BFh
+;  2             DATA 0 C0h
+;  2             DATA 1 C1h
+;  2             CMD  0 C2h
+;  2             CMD  1 C3h
+;  3             DATA 0 C4h
+;  3             DATA 1 C5h
+;  3             CMD  0 C6h
+;  3             CMD  1 C7h
+;
+PIODEBUG	.EQU	1
+;
+M_Output	.EQU	$00 << 6
+M_Input		.EQU	$01 << 6
+M_Bidir		.EQU	$02 << 6
+M_BitCtrl	.EQU	$03 << 6
+M_BitAllIn	.EQU	$FF
+M_BitAllOut	.EQU	$00
+;
+PIO_NONE	.EQU	0
+PIO_ZPIO	.EQU	1
+PIO_8255	.EQU	2
+PIO_PORT	.EQU	3
+
+; SET MAXIMUM NUMBER OF INTERRUPTS AVAILABLE FOR ALL
+; ENSURE INTERRUPTS ARE NOT TURNED ON IF IM2 IS NOT SET.
+
+INT_ALLOC	.DB	0
+INT_N		.EQU	00000000B
+#IF	(INTMODE == 2)
+INT_Y		.EQU	00000100B
+INT_ALLOW	.EQU	4
+#ELSE
+INT_Y		.EQU	INT_N
+INT_ALLOW	.EQU	0
+#ENDIF
+;
+INT0		.EQU	00000000B
+INT1		.EQU	00000001B
+INT2		.EQU	00000010B
+INT3		.EQU	00000011B
+
+;
+; SETUP THE DISPATCH TABLE ENTRIES
+;
+; PIO_CNT HOLDS THE NUMBER OF DEVICED CALCULATED FROM THE NUMBER OF DEFPIO MACROS
+; PIO_CNT SHOULD INCREASE BY 2 FOR EVERY PIO CHIP ADDED.
+;
+; PIO_PREINIT WILL READ THROUGH ALL PIOCFG TABLES AND CONFIGURE EACH TABLE.
+; IT WITH THEN CALL PIO_INITUNIT TO INITIALIZE EACH DEVICE TO ITS DEFAULT STATE
+; 
+; EXPECTS NOTHING ON ENTRY
+;
+PIO_PREINIT:
+	CALL	NEWLINE		;D
+	LD	B,PIO_CNT		; LOOP CONTROL
+	LD	C,0			; PHYSICAL UNIT INDEX
+	XOR	A			; ZERO TO ACCUM
+;	LD	(PIO_DEV),A		; CURRENT DEVICE NUMBER
+	LD	(INT_ALLOC),A		; START WITH NO INTERRUPTS ALLOCATED
+PIO_PREINIT0:	
+	PUSH	BC			; SAVE LOOP CONTROL
+;	LD	A,C			; INITIALIZE THE UNIT
+
+;	PUSH	AF		;D
+;	LD	A,'u'		;D
+;	CALL	COUT		;D
+;	POP	AF		;D
+;	CALL	PRTHEXBYTE	;D	UNIT
+;	CALL	PC_SPACE	;D
+
+;	RLCA				; MULTIPLY BY CFG TABLE ENTRY SIZE (32 BYTES)
+;	RLCA				; ...
+;	RLCA				; ... TO GET OFFSET INTO CFG TABLE
+;	RLCA
+;;	RLCA
+;	LD	HL,PIO_CFG		; POINT TO START OF CFG TABLE
+;	PUSH	AF
+;	CALL	ADDHLA			; HL := ENTRY ADDRESS
+;	POP	AF
+;	CALL	ADDHLA			; HL := ENTRY ADDRESS
+;	PUSH	HL			; SAVE IT
+;	POP	IY			; ... TO IY
+
+	CALL	IDXCFG			
+
+	LD	(HL),C
+
+	PUSH	AF		;D
+	LD	A,'c'		;D
+	CALL	COUT		;D
+	POP	AF		;D
+	PUSH	BC		;D
+	PUSH	HL		;D
+	POP	BC		;D
+	CALL	PRTHEXWORD	;D	CONFIG TABLE
+	CALL	PC_SPACE	;D
+	POP	BC		;D
+
+	LD	A,(IY+1)		; GET THE PIO TYPE DETECTED
+	CP	PIO_PORT		; SET FLAGS
+
+	PUSH	AF		;D
+	LD	A,'t'		;D
+	CALL	COUT		;D
+	POP	AF		;D
+	CALL	PRTHEXBYTE	;D	TYPE
+	CALL	PC_SPACE	;D
+
+;	JR	Z,BADINIT
+
+;	PUSH	BC			; SAVE LOOP CONTROL
+;	LD	BC,PIO_FNTBL		; BC := FUNCTION TABLE ADDRESS	
+;	DEC	A
+;	JR	Z,TYPFND		; SKIP IT IF NOTHING FOUND
+;	LD	BC,PPI_FNTBL		; BC := FUNCTION TABLE ADDRESS
+;	DEC	A
+;	JR	Z,TYPFND		; ADD ENTRY IF PIO FOUND, BC:DE
+;	LD	BC,PRT_FNTBL
+;	DEC	A
+;	JR	Z,TYPFND
+;	POP	BC
+;	JR	BADINIT
+
+	PUSH	HL
+	LD	DE,-1			; INITIALIZE THIS DEVICE WITH
+	CALL	PIO_INITDEV		; DEFAULT VALUES
+	POP	HL
+
+;	JR	NZ,SKPINIT
+
+	; AT THIS POINT WE KNOW WE
+	; HAVE A VALID DEVICE SO ADD IT
+	
+	LD	A,8			; CALCULATE THE FUNCTION TABLE 
+	CALL	ADDHLA			; POSITION WHICH FOLLOWS THE
+	PUSH	HL			; CONFIGURATION TABLE OF EACH
+	POP	BC			; DEVICE
+
+TYPFND:	PUSH	AF		;D
+	LD	A,'f'		;D
+	CALL	COUT		;D
+	POP	AF		;D
+	PUSH	BC		;D
+	CALL	PRTHEXWORD	;D	FUNCTION TABLE
+	POP	BC		;D
+	CALL	NEWLINE		;D
+
+	PUSH	IY			; ADD ENTRY IF PIO FOUND, BC:DE
+	POP	DE			; BC: DRIVER FUNCTION TABLE
+	CALL	CIO_ADDENT		; DE: ADDRESS OF UNIT INSTANCE DATA
+
+BADINIT:POP	BC			; RESTORE LOOP CONTROL
+
+	INC	C			; NEXT PHYSICAL UNIT
+SKPINIT:DJNZ	PIO_PREINIT0		; LOOP UNTIL DONE
+
+	PUSH	AF		;D
+	PRTS("INTS=$")		;D
+	LD	A,(INT_ALLOC)	;D
+	CALL	PRTHEXBYTE	;D
+	POP	AF		;D
+	PUSH	DE		;D
+	LD	DE,CIO_TBL-3	;D
+	CALL	DUMP_BUFFER	;D
+	POP	DE		;D
+	XOR	A			; SIGNAL SUCCESS
+	RET				; AND RETURN
+;
+; INDEX INTO THE CONFIG TABLE
+; ON ENTRY C = UNIT NUMBER
+; ON EXIT IY = CONFIG DATA POINTER
+; ON EXIT DE = CONFIG TABLE START
+;
+; EACH CONFIG TABLE IS 24 BYTES LONG
+;
+CFG_SIZ		.EQU	24
+;
+IDXCFG:	LD	A,C
+	RLCA				; X 2
+	RLCA				; X 4
+	RLCA				; X 8
+	LD	H,0
+	LD	L,A			; HL = X 8
+	PUSH	HL
+	ADD	HL,HL			; HL = X 16
+	POP	DE
+	ADD	HL,DE			; HL = X 24
+	LD	DE,PIO_CFG
+	ADD	HL,DE
+	PUSH	HL			; COPY CFG DATA PTR
+	POP	IY			; ... TO IY
+	RET
+	
+; PIO_INITDEV - INITIALIZE DEVICE
+;
+; IF DE = FFFF THEN THE SETUP PARAMETER WORD WILL BE READ FROM THE DEVICE CONFIGURATION  
+; TABLE POINTED TO BY IY AND THE PIO PORT WILL BE PROGRAMMED BASED ON THAT CONFIGURATION. 
+;
+; OTHERWISE THE PIO PORT WILL BE PROGRAMMED BY THE SETUP PARAMETER WORD IN DE AND THIS 
+; WILL BE SAVED IN THE DEVICE CONFIGURATION TABLE POINTED TO BY IY.
+;
+; ALL OTHER CONFIGURATION OF THE DEVICE CONFIGURATION TABLE IS DONE UPSTEAM BY PIO_PREINIT 
+
+PIO_INITDEV:
+	; TEST FOR -1 (FFFF) WHICH MEANS USE CURRENT CONFIG (JUST REINIT)
+	LD	A,D			; TEST DE FOR
+	AND	E			; ... VALUE OF -1
+	INC	A			; ... SO Z SET IF -1
+	JR	NZ,PIO_INITDEV1		; IF DE == -1, REINIT CURRENT CONFIG
+PIO_INITDEV0:
+	; LOAD EXISTING CONFIG (DCW) TO REINIT
+	LD	E,(IY+4)		; LOW BYTE
+	LD	D,(IY+5)		; HIGH BYTE	
+;
+PIO_INITDEV1:				; WHICH DEVICE TYPE?
+	LD	A,(IY+1)
+	CP	PIO_ZPIO		
+	JR	Z,SETPIO0
+	CP	PIO_8255
+	JP	Z,SET_8255
+	CP	PIO_PORT
+	JP	Z,SET_PORT
+BAD_SET:OR	$FF			; UNKNOWN DEVICE
+	RET
+
+SETPIO0:LD	A,E			; GET MODE 
+	AND	11000000B		; BITS (B7B6)
+	CP	10000000B		; IS IT BIDIR?
+	JR	NZ,SETPIO1
+	LD	A,(IY+2)		; GET CHANNEL
+	OR	A
+	JR	NZ,BAD_SET		; CAN'T DO ON CH1
+
+	; VALIDATE INTERRUPT REQUEST
+	; GRANT INTERRUPT IF THERE IS A FREE INTERRUPT
+	; GRANT INTERRUPT IF AN INTERRUPT IS ALREADY ALLOCATED TO THIS UNIT
+
+SETPIO1:PUSH	AF		;D
+	LD	A,'['		;D
+	CALL	COUT		;D
+	LD	A,(IY)		;D
+	CALL	PRTHEXBYTE	;D
+	LD	A,']'		;D
+	CALL	COUT		;D
+	POP	AF		;D
+
+	BIT	2,E			; SKIP IF WE ARE NOT REQUESTING 
+	JP	Z,SETPIO2		; AN INTERRUPT
+
+	PRTS("[INTREQ]$")	;D
+
+;	LD	A,(IY+4)		; GET CURRENT INTERRUPT SETTING
+;	BIT	2,A			; SKIP IF IT IS ALREADY
+;	JP	NZ,SETPIO2		; ALLOCATED TO THIS UNIT
+
+	LD	A,(INT_ALLOC)		; WE NEED TO ALLOCATE AN
+	CP	INT_ALLOW		; INTERRUPT. DO WE HAVE 
+	JR	NC,BAD_SET		; ONE FREE?
+
+	PRTS("[ALLOCINT]$")	;D
+
+	; WHICH INTERRUPT IS FREE ?
+	; SCAN THROUGH THE CFG TABLES
+	; AND FIND A FREE ONE
+
+	PUSH	AF			; NESTED LOOP
+	LD	DE,CFG_SIZ		; OUTSIDE LOOP IS INTERRUPT
+	LD	B,INT_ALLOW		; INSIDE LOOP IS DEVICE
+SETPIOP: LD	C,B 
+	 DEC	C
+	 PUSH	BC
+	 LD	B,PIO_CNT
+	 LD	HL,PIO_CFG+4
+SETPIOX: LD	A,(HL)
+	 BIT	2,A			; JUMP TO NEXT DEVICE
+	 JR	Z,SETPIOY		; IF NO INTERRUPT ON 
+	 AND	00000011B		; THIS DEVICE
+
+	 CP	C			; IF WE MATCH AN INTERRUPT HERE THEN IT IS NOT FREE.
+	 JR	NZ,SETPIOY		; SO EXIT INSIDE LOOP AND TRY NEXT INTERRUPT
+
+	 XOR	A			; WE MATCH INT 0 - IF WE ARE CHECKING FOR IT THEN
+	 OR	C			; WE REGARD IS AS FREE.
+	 JR	NZ,SETPIOZ
+
+SETPIOY: ADD	HL,DE			
+	 DJNZ	SETPIOX
+
+	 JR	SETPIOQ			; WE GET HERE IF THE CURRENT INTERRUPT
+					; WAS NOT MATCHED SO IT IS FREE
+SETPIOZ: POP	BC
+	DJNZ	SETPIOP
+	POP	AF
+
+	PRTS("[NONEFREE]$")
+	RET
+
+SETPIOQ:PUSH	AF			; AVAILABLE INTERRUPT IS IN C
+	PRTS("[FREE]=$")
+	LD	A,C
+	CALL	PRTHEXBYTE
+	POP	AF
+
+	POP	AF			
+	POP	AF
+
+SETPIOR:LD	HL,INT_ALLOC		; INCREASE THE COUNT
+	INC	(HL)			; OF USED INTERRUPTS
+	LD	A,(HL)
+
+;	LD	A,(IY)			; IS THIS UNIT 
+;	INC	A			; UNITIALIZED?
+;	JR	Z,SETPIO6
+
+	LD	A,(IY+4)		; IT IS UNITIALIZED SO
+	OR	C			; SAVE THE ALLOCATES 
+	LD	(IY+4),A		; INTERRUPT
+;
+; FOR THIS DEVICE AND INTERRUPT, UPDATE THE CONFIG TABLE FOR THIS DEVICE.
+; PIO_IN, PIO_OUT, PIO_IST, PIO_OST ENTRIES NEED TO BE REDIRECTED.
+; INTERRUPT VECTOR NEEDS TO BE UPDATED
+;
+	LD	A,(IY+0)
+	LD	HL,0
+	; SETUP PIO INTERRUPT VECTOR IN IVT
+	LD	HL,HBX_IV09+1
+
+;	CALL	SPK_BEEP
+;
+SETPIO6:RET	
+
+	; EXIT WITH FREE INTERRUPT IN C
+
+	LD	A,C
+	LD	(INT_ALLOC),A
+
+	LD	A,E
+	AND	11000000B
+	OR	00000100B
+	OR	C
+	LD	E,A
+	LD	(IY+5),A
+;
+	; TODO: DEALLOCATE AN INTERRUPT
+;
+;	LD	A,(INT_ALLOC)
+;	DEC	A
+;	LD	(INT_ALLOC),A
+;
+SETPIO2:
+
+;	DE CONTAINS THE MODE IF INTERRUPT ROUTINE SKIPPED
+
+	PRTS("[NOINTREQ]$")	;D
+
+;	LD	A,(IY+4)
+	LD	A,E			; GET MODE AND CREATE COMMAND
+	AND	11000000B		; $B0
+	OR	00001111B		; $0F	
+
+	LD	C,(IY+3)		; GET DATA PORT
+	INC	C			; POINT TO CMD
+	INC	C			; PORT	
+	OUT	(C),A			; SET MODE
+	CP	(M_BitCtrl | $0F)	; IF MODE 3
+	JR	NZ,SETPIO3		
+	LD	A,(IY+5)		; SET I/O DIRECTION
+	OUT	(C),A			; FOR MODE 3
+
+SETPIO3:; INTERUPT HANDLING
+
+	JP	SETPIO4
+
+	; SETUP THE INTERRUPT VECTOR
+
+	LD	A,E
+	AND	00000011B
+;	DEC	A			; INDEX INTO THE
+	ADD	A,A			; THE VECTOR TABLE
+	ADD	A,A			; 
+	LD	C,A
+	LD	B,0
+	LD	HL,HBX_IV09+1
+	ADD	HL,BC			; GET THE ADDRESS OF
+	PUSH	DE
+	LD	D,(HL)			; THAT INTERRUPT
+	INC	HL			; HANDLER
+	LD	E,(HL)
+	LD	HL,0	;HBX_IVT+IVT_PIO0	; POPULATE THE
+	LD	A,L			; GET LOW BYTE OF IVT ADDRESS
+	ADD	HL,BC			; INTERRUPT TABLE
+	LD	(HL),D			; WITH THE INTERRUPT
+	INC	HL			; HANDLER ADDRESS FOR
+	LD	(HL),E			; THIS UNIT
+	POP	DE
+	LD	HL,INT_ALLOC
+	LD	C,(HL)
+	LD	B,0
+	LD	HL,PRTTAB-1		; SAVE THE DATA	
+	ADD	HL,BC			; PORT FOR EACH INTERRUPT
+	LD	C,(IY+3)		
+	LD	(HL),C
+
+	INC	C			; POINT TO CMD PORT
+	INC	C
+	DI				; SET THE VECTOR ADDRESS
+	OUT	(C),A
+
+;	LD	A,10000011B		; ENABLE INTERRUPTS ON
+	OUT	(C),A			; THIS UNIT
+	EI	
+;	JR	GUD_SET
+;
+SETPIO4:LD	A,00000111B		; $07 
+	OUT	(C),A			; NO INTERRUPTS
+;
+;	SUCCESSFULL SO SAVE DEVICE CONFIGURATION WORD (DCW)
+;
+GUD_SET:LD	(IY+4),E		; LOW BYTE
+	LD	(IY+5),D		; HIGH BYTE	
+;
+;	UPDATE THE DEVICE TABLE WITH THE ADDRESSES FOR THE CORRECT ROUTINE.
+;
+	LD	A,E
+	AND	00000111B
+	LD	HL,INTMATRIX		; POINT TO EITHER THE INTERRUPT
+	JR	NZ, USEIM
+	LD	HL,POLMATRIX		; MATRIX OR THE POLLED MATRIX
+USEIM:	PUSH	HL	
+
+	PUSH	IY			; CALCULATE THE DESTINATION
+	POP	HL			; ADDRESS IN THE PIO_CFG TABLE
+	LD	BC,8			; FOR THE FOUR ADDESSES TO BE 
+	ADD	HL,BC			; COPIED TO 
+
+;	LD	B,0			; 00000000 CALCULATE THE SOURCE ADDRESS
+	LD	C,E			; XX?????? FROM THE MATRIX. EACH ENTRY 
+	SRL	C			; 0XX????? IN THE MATRIX IS 8 BYTES SO
+	SRL	C			; 00XX???? SOURCE = MATRIX BASE + (8 * MODE)
+	SRL	C			; 000XX???
+	POP	DE			; LOAD THE MATRIX BASE
+;	LD	DE,POLMATRIX
+	EX	DE,HL
+	ADD	HL,BC			; HL = SOURCE
+
+	LD	C,8			; COPY 8 BYTES
+	LDIR
+
+;	PUSH	IY
+;	POP	DE
+;	CALL	DUMP_BUFFER
+
+	XOR	A
+	RET
+
+PRTTAB:	.DB	0
+	.DB	0
+	.DB	0
+	.DB	0
+;
+;-----------------------------------------------------------------------------
+;
+; INPUT INTERRUPT VECTOR MACRO AND DEFINITION FOR FOUR PORTS
+;
+#DEFINE	PIOMIVT(PIOIN,PIOIST,PIOPRT) 		\
+#DEFCONT ;\
+#DEFCONT ;	RETURN WITH ERROR IF THERE IS	\
+#DEFCONT ;	ALREADY	A CHARACTER IN BUFFER	\
+#DEFCONT ;\
+#DEFCONT ;	OTHERWISE CHANGE THE STATUS TO	\
+#DEFCONT ;	SHOW THERE IS ONE CHARACTER IN	\
+#DEFCONT ;	THE BUFFER AND READ IT IN AND	\
+#DEFCONT ;	AND STORE IT.RETURN GOOD STATUS.\
+#DEFCONT ;\
+#DEFCONT \	LD	A,(_CIST)
+#DEFCONT \	OR	A
+#DEFCONT \	JR	NZ,_OVFL
+#DEFCONT \	LD	A,(PIOPRT)
+#DEFCONT \	LD	C,A
+#DEFCONT \	LD	A,1
+#DEFCONT \	LD	(_CIST),A
+#DEFCONT \	IN	A,(C)
+#DEFCONT \	LD	(_CICH),A
+#DEFCONT \	OR	$FF
+#DEFCONT \	RET
+#DEFCONT \_OVFL:XOR	A
+#DEFCONT \	RET
+#DEFCONT ;\
+#DEFCONT ;\
+#DEFCONT ;\
+#DEFCONT ;\
+#DEFCONT ;\
+#DEFCONT ;\
+#DEFCONT \PIOIN:CALL	PIOIST
+#DEFCONT \	JR	Z,PIOIN
+#DEFCONT \	LD	A,(_CICH)
+#DEFCONT \	LD	E,A
+#DEFCONT \	XOR	A
+#DEFCONT \	LD	(_CIST),A
+#DEFCONT \	RET
+#DEFCONT ;\
+#DEFCONT ;	If THERE A CHARACTER		\
+#DEFCONT ;	AVAILABLE? RETURN NUMBER	\
+#DEFCONT ;	IN A - 0 OR 1			\
+#DEFCONT ;\
+#DEFCONT \PIOIST:LD	A,(_CIST)
+#DEFCONT \	AND	00000001B
+#DEFCONT \	RET
+#DEFCONT ;\
+#DEFCONT ;	CIST :	01 = CHARACTER READY ELSE NOT READY	\
+#DEFCONT ;	CISH :	CHARACTER STORED BY INTERRUPT		\
+#DEFCONT ;\
+#DEFCONT \_CIST	.DB	00
+#DEFCONT \_CICH	.DB	00
+;
+PIOIVT0:.MODULE	PIOIVT0
+PIOMIVT(PIO0IN,PI0_IST,PRTTAB+0)
+PIOIVT1:.MODULE PIOIVT1
+PIOMIVT(PIO1IN,PI1_IST,PRTTAB+1)
+PIOIVT2:.MODULE PIOIVT2
+PIOMIVT(PIO2IN,PI2_IST,PRTTAB+2)
+PIOIVT3:.MODULE PIOIVT3
+PIOMIVT(PIO3IN,PI3_IST,PRTTAB+3)
+;
+;-----------------------------------------------------------------------------
+;
+; OUTPUT INTERRUPT VECTOR MACRO AND DEFINITION FOR FOUR PORTS
+;
+; AN INTERRUPT IS GENERATED WHEN THE RECEIVING DEVICE CAN ACCEPT A CHARACTER
+;
+#DEFINE	PIOMOVT(PIOOUT,PIOOST,PIOPRT) 		\
+#DEFCONT ;\
+#DEFCONT ;	RETURN IF WE ARE WAITING FOR A	\
+#DEFCONT ;	CHARACTER (COST = 00)		\
+#DEFCONT ;\
+#DEFCONT ;	IF ZERO CHARACTERS READY 
+#DEFCONT ;	(COST = 01) CHANGE STATUS TO	\
+#DEFCONT ;	WAITING FOR CHARACTER (COST 00)	\
+#DEFCONT ;\
+#DEFCONT ;	IF A CHARACTER IS READY THEN	\
+#DEFCONT ;	OUTPUT AND CHANGE STATUS TO	\
+#DEFCONT ;	ZERO CHARACTERS READY		\
+#DEFCONT ;\
+#DEFCONT \	LD	A,(_COST)
+#DEFCONT \ 	DEC	A
+#DEFCONT \	RET	M
+#DEFCONT \	JR	Z,_WFC
+#DEFCONT \	LD	A,(_COCH)
+#DEFCONT \	LD	E,A
+#DEFCONT \_ONOW:LD	A,(PIOPRT)
+#DEFCONT \	LD	C,A
+#DEFCONT \	OUT	(C),E
+#DEFCONT \ 	LD	A,1
+#DEFCONT \_WFC:	LD	(_COST),A
+#DEFCONT \	RET
+#DEFCONT ;\
+#DEFCONT ;	WAIT FOR SPACE FOR THE CHARACTER\
+#DEFCONT ;	IF WE ARE WAITING FOR A		\
+#DEFCONT ;	CHARACTRE THEN OUTPUT IT NOW	\
+#DEFCONT ;	OTHERWISE STORE IT UNTIL THE	\
+#DEFCONT ;	INTERRUPT CALLS FOR IT		\
+#DEFCONT ;\
+#DEFCONT \PIOOUT:LD	A,(_COST)
+#DEFCONT \	CP	2
+#DEFCONT \	JR	C,_ONOW
+#DEFCONT \	LD	A,E
+#DEFCONT \	LD	(_COCH),A
+#DEFCONT \	LD	A,2
+#DEFCONT \	LD	(_COST),A
+#DEFCONT \	JR	PIOOUT
+#DEFCONT ;\
+#DEFCONT ;	RETURN WITH NUMBER OF		\
+#DEFCONT ;	CHARACTERS AVAILABLE 0 or 1	\
+#DEFCONT ;\
+#DEFCONT \PIOOST:LD	A,(_COST)
+#DEFCONT \	DEC	A
+#DEFCONT \	DEC	A
+#DEFCONT \	RET	Z
+#DEFCONT \	LD	A,1
+#DEFCONT \	RET
+#DEFCONT ;\
+#DEFCONT ;	COST :	00 WAITING FOR CHARACTER\
+#DEFCONT ;		01 ZERO CHARACTERS READY\
+#DEFCONT ;		02 ONE CHARACTER READY	\
+#DEFCONT ;	COCH :	CHARACTER TO OUTPUT	\
+#DEFCONT ;\
+#DEFCONT \_COST	.DB	01
+#DEFCONT \_COCH	.DB	00
+;
+PIOOVT0:.MODULE	PIOOVT0
+PIOMOVT(PIO0OUT,PI0_OST,PRTTAB+0)
+PIOOVT1:.MODULE PIOOVT1
+PIOMOVT(PIO1OUT,PI1_OST,PRTTAB+1)
+PIOOVT2:.MODULE PIOOVT2
+PIOMOVT(PIO2OUT,PI2_OST,PRTTAB+2)
+PIOOVT3:.MODULE PIOOVT3
+PIOMOVT(PIO3OUT,PI3_OST,PRTTAB+3)
+;
+;-----------------------------------------------------------------------------
+;
+; NON INTERRUPT OUTPUT ROUTINE - SHARED
+;
+; INPUT WILL ALWAYS RETURN ERROR, CHARACTER RETURNED IS UNDEFINED.
+; OUTPUT WILL ALWAYS RETURN SUCCESS
+; INPUT-STATUS WILL ALWAYS RETURN 0 CHARACTERS IN BUFFER.
+; OUTPUT-STATUS WILL ALWAYS RETURN 1 CHARACTER SPACE IN BUFFER.
+
+PIOSHO_IN:
+	LD	A,1
+	RET
+;
+PIOSHO_OUT:	
+	LD	C,(IY+3)
+	OUT	(C),E
+	XOR	A
+	RET
+;
+PIOSHO_IST:	XOR	A
+	RET
+;
+PIOSH_OST:	
+	LD	A,1
+	RET
+;
+;-----------------------------------------------------------------------------
+;
+; NON INTERRUPT INPUT ROUTINE - SHARED
+;
+; INPUT WILL ALWAYS A CHARACTER AND SUCCESS.
+; OUTPUT WILL ALWAYS RETURN FAILURE
+; INPUT STATUS WILL ALWAYS RETURN 1 CHARACTER IN BUFFER.
+;OUTPUT-STATUS WILL ALWAYS RETURN 0 CHARACTER SPACE IN BUFFER.
+;
+PIOSHI_IN:
+	LD	C,(IY+3)
+	IN	A,(C)
+	LD	E,A
+	XOR	A
+	RET
+;
+PIOSHI_OUT:
+	LD	A,1
+	RET
+;
+PIOSH_IST:
+	LD	A,1
+	RET
+;
+PIOSHI_OST:
+	XOR	A
+	RET
+;
+;-----------------------------------------------------------------------------
+;
+; ON ENTRY IY POINTS TO THE DEVICE RECORD. GET AND RETURN THE CONFIGURATION WORD IN DE
+;
+PIO_QUERY:
+PPI_QUERY:
+	LD	E,(IY+4)		; FIRST CONFIG BYTE TO E
+	LD	D,(IY+5)		; SECOND CONFIG BYTE TO D
+	XOR	A			; SIGNAL SUCCESS
+	RET
+;
+;-----------------------------------------------------------------------------
+;
+; ON ENTRY IY POINTS TO THE DEVICE RECORD. FOR CHARACTER DEVICES BIT 6 OF ATTRIBUTE
+; INDICATES PARALLEL PORT IF 1 SO WE SET IT. COMMON TO ALL PORTS
+;
+PIO_DEVICE:
+PPI_DEVICE:
+	LD	D,CIODEV_PIO		; D := DEVICE TYPE
+	LD	E,(IY)			; E := PHYSICAL UNIT
+	LD	C,$40			; C := ATTRIBUTE
+	LD	H,0			; H := 0, DRIVER HAS NO MODES
+	LD	L,(IY+3)		; L := BASE I/O ADDRESS
+	XOR	A			; SIGNAL SUCCESS
+	RET
+;
+INTMATRIX:
+	.DW	PIO0IN,	PIO0OUT, PI0_IST, PI0_OST
+	.DW	PIO1IN,	PIO1OUT, PI1_IST, PI1_OST
+	.DW	PIO2IN,	PIO2OUT, PI2_IST, PI2_OST
+	.DW	PIO3IN,	PIO3OUT, PI3_IST, PI3_OST
+POLMATRIX:
+	.DW	PIOSHO_IN, PIOSHO_OUT, PIOSHO_IST, PIOSH_OST	; OUTPUT
+	.DW	PIOSHI_IN, PIOSHI_OUT, PIOSH_IST,  PIOSHI_OST	; INPUT
+	.DW	0,0,0,0						; BIDIR	
+	.DW	0,0,0,0						; BIT MODE
+
+SET_8255:
+	RET	
+;
+SET_BYE:
+	XOR	A			; SIGNAL SUCCESS
+	RET
+;
+; ------------------------------------
+; i8255 FUNCTION TABLE ROUTINES
+;-------------------------------------
+	
+PPI_IN:
+	XOR	A			; SIGNAL SUCCESS
+	RET	
+;
+PPI_OUT:
+	XOR	A			; SIGNAL SUCCESS
+	RET
+;	
+PPI_IST:
+	RET	
+;	
+PPI_OST:
+	RET
+;
+; PIO_INITDEV - Configure device.
+; If DE = FFFF then extract the configuration information from the table of devices and program the device using those settings.
+; Otherwise use the configuration information in DE to program those settings and save them in the device table
+
+PPI_INITDEV:
+	XOR	A			; SIGNAL SUCCESS
+	RET	
+PPI_INT:OR	$FF			; NZ SET TO INDICATE INT HANDLED
+	RET
+;	
+PIO_PRTCFG:
+	; ANNOUNCE PORT
+	CALL	NEWLINE			; FORMATTING
+	PRTS("PIO$")			; FORMATTING
+	LD	A,(IY)			; DEVICE NUM
+	CALL	PRTDECB			; PRINT DEVICE NUM
+	PRTS(": IO=0x$")		; FORMATTING
+	LD	A,(IY+3)		; GET BASE PORT
+	CALL	PRTHEXBYTE		; PRINT BASE PORT
+;
+	; PRINT THE PIO TYPE
+	CALL	PC_SPACE		; FORMATTING
+	LD	A,(IY+1)		; GET PIO TYPE BYTE
+	LD	DE,PIO_TYPE_STR		; POINT HL TO TYPE MAP TABLE
+	CALL	PRTIDXDEA
+
+	; ALL DONE IF NO PIO WAS DETECTED
+	LD	A,(IY+1)		; GET PIO TYPE BYTE
+	OR	A			; SET FLAGS
+	RET	Z			; IF ZERO, NOT PRESENT
+;
+	PRTS(" MODE=$")			; FORMATTING
+	LD	E,(IY+4)		; LOAD CONFIG
+	LD	D,(IY+5)		; ... WORD TO DE
+	CALL	PS_PRTPC0		; PRINT CONFIG
+;
+	LD	A,(IY+4)		; PRINT
+	BIT	2,A			; ALLOCATED
+	JR	Z,NOINT			; INTERRUPT
+	PRTS("/i$")
+	LD	A,(IY+4)
+	AND	00000011B
+	CALL	PRTDECB
+NOINT:	XOR	A
+	RET
+;
+; WORKING VARIABLES
+;
+PIO_DEV		.DB	0		; DEVICE NUM USED DURING INIT
+;	
+; DESCRIPTION OF DIFFERENT PORT TYPES
+;
+PIO_TYPE_STR:
+		.TEXT	"<NOT PRESENT>$"	; IDX 0
+		.TEXT	"Zilog PIO$"		; IDX 1
+		.TEXT	"i8255 PPI$"		; IDX 2
+		.TEXT	"IO Port$"		; IDX 3
+;
+; Z80 PIO PORT TABLE - EACH ENTRY IS FOR 1 CHIP I.E. TWO PORTS
+;
+;	32 BYTE DATA STRUCTURE FOR EACH PORT
+;
+;	.DB	0		; IY+0 CIO DEVICE NUMBER 			(SET DURING PRE-INIT, THEN FIXED)
+;	.DB	0		; IY+1 PIO TYPE 				(SET AT ASSEMBLY, FIXED)
+;	.DB	0		; IY+2 PIO CHANNEL				(SET AT ASSEMBLY, FIXED)
+;	.DB	PIOBASE+2	; IY+3 BASE DATA PORT				(SET AT ASSEMBLY, FIXED)
+;	.DB	0		; IY+4 SPW - MODE 3 I/O DIRECTION BYTE		(SET AT ASSEMBLE, SET WITH INIT)
+;	.DB	0		; IY+5 SPW - MODE, INTERRUPT			(SET AT ASSEMBLY, SET WITH INIT)
+;	.DW	0		; IY+6/7 FUNCTION TABLE				(SET AT ASSEMBLY, SET DURING PRE-INIT AND AT INIT)
+;	.DW	PIO_IN		; IY+8  ADDR FOR DEVICE INPUT			(SET WITH INIT)
+;	.DW	PIO_OUT		; IY+10 ADDR FOR DEVICE OUTPUT			(SET WITH INIT)
+;	.DW	PIO_IST		; IY+12 ADDR FOR DEVICE INPUT STATUS		(SET WITH INIT)
+;	.DW	PIO_OST		; IY+14 ADDR FOR DEVICE OUTPUT STATUS		(SET WITH INIT)
+;	.DW	PIO_INITDEV	; IY+16 ADDR FOR INITIALIZE DEVICE ROUTINE	(SET AT ASSEMBLY, FIXED)
+;	.DW	PIO_QUERY	; IY+18 ADDR FOR QUERY DEVICE RECORD ROUTINE	(SET AT ASSEMBLY, FIXED)
+;	.DW	PIO_DEVICE	; IY+20 ADDR FOR DEVICE TYPE ROUTINE		(SET AT ASSEMBLY, FIXED)
+;	.FILL	10
+;
+;	SETUP PARAMETER WORD:
+;
+;	+-------------------------------+ +-------+-----------+---+-------+
+;	|         BIT CONTROL           | | MODE  |           | A |  INT  |
+;	+-------------------------------+ --------------------+-----------+
+;	 F   E   D   C   B   A   9   8     7   6   5   4   3   2   1   0
+;	-- MSB (D REGISTER) --           -- LSB (E REGISTER) --
+;
+;
+; 	MSB = BIT CONTROL MAP USE IN MODE 3 
+;
+; 	MODE B7 B6 =	00 Mode 0 Output
+;			01 Mode 1 Input
+;			10 Mode 2 Bidir
+;			11 Mode 3 Bit Mode
+;
+;	INTERRUPT ALLOCATED B2	= 0 NOT ALLOCATED
+;				= 1 IS ALLOCATED
+;
+;	WHICH IVT IS ALLOCATES B1 B0	00 IVT_PIO0
+;					01 IVT_PIO1
+;					10 IVT_PIO2
+;					11 IVT_PIO3
+;	
+#DEFINE	DEFPIO(MPIOBASE,MPIOCH0,MPIOCH1,MPIOCH0X,MPIOCH1X,MPIOIN0,MPIOIN1) \
+#DEFCONT \ .DB	0
+#DEFCONT \ .DB	PIO_ZPIO
+#DEFCONT \ .DB	0
+#DEFCONT \ .DB	MPIOBASE
+#DEFCONT \ .DB	(MPIOCH0|MPIOIN0)
+#DEFCONT \ .DB	MPIOCH0X
+#DEFCONT \ .DW	0
+#DEFCONT \ .DW	0,0,0,0, PIO_INITDEV,PIO_QUERY,PIO_DEVICE
+#DEFCONT \ .FILL 2	
+#DEFCONT \ .DB	0
+#DEFCONT \ .DB	PIO_ZPIO
+#DEFCONT \ .DB	1
+#DEFCONT \ .DB	MPIOBASE+1
+#DEFCONT \ .DB	(MPIOCH1|MPIOIN1)
+#DEFCONT \ .DB	MPIOCH1X
+#DEFCONT \ .DW	0
+#DEFCONT \ .DW	0,0,0,0, PIO_INITDEV,PIO_QUERY,PIO_DEVICE
+#DEFCONT \ .FILL 2	
+;
+; i8255 PORT TABLE - EACH ENTRY IS FOR 1 CHIP I.E. THREE PORTS
+;
+#DEFINE	DEFPPI(MPPIBASE,MPPICH1,MPPICH2,MPPICH3,MPPICH1X,MPPICH2X,MPPICH3X) \
+#DEFCONT \ .DB	0
+#DEFCONT \ .DB	PIO_8255
+#DEFCONT \ .DB	0
+#DEFCONT \ .DB	MPPIBASE
+#DEFCONT \ .DB	(MPPICH1|00001000B)
+#DEFCONT \ .DB	MPPICH1X
+#DEFCONT \ .DW	0
+#DEFCONT \ .DW	PPI_IN,PPI_OUT,PPI_IST,PPI_OST,PPI_INITDEV,PPI_QUERY,PPI_DEVICE
+#DEFCONT \ .FILL 2
+#DEFCONT \ .DB	0
+#DEFCONT \ .DB	PIO_8255
+#DEFCONT \ .DB	1
+#DEFCONT \ .DB	MPPIBASE+2
+#DEFCONT \ .DB	(MPPICH2|00010000B)
+#DEFCONT \ .DB	MPPICH2X
+#DEFCONT \ .DW	0
+#DEFCONT \ .DW	PPI_IN,PPI_OUT,PPI_IST,PPI_OST,PPI_INITDEV,PPI_QUERY,PPI_DEVICE
+#DEFCONT \ .FILL 2
+#DEFCONT \ .DB	0
+#DEFCONT \ .DB	PIO_8255
+#DEFCONT \ .DB	2
+#DEFCONT \ .DB	MPPIBASE+4
+#DEFCONT \ .DB	(MPPICH3|00100000B)
+#DEFCONT \ .DB	MPPICH3X
+#DEFCONT \ .DW	0
+#DEFCONT \ .DW	PPI_IN,PPI_OUT,PPI_IST,PPI_OST,PPI_INITDEV,PPI_QUERY,PPI_DEVICE
+#DEFCONT \ .FILL 2
+;
+; HERE WE ACTUALLY DEFINE THE HARDWARE THAT THE HBIOS CAN ACCESS
+; THE INIT ROUTINES READ AND SET THE INITIAL MODES FROM THIS INFO
+;
+PIO_CFG:
+;
+#IF	PIO_4P
+DEFPIO(PIO4BASE+0,M_Output,M_Input,M_BitAllOut,M_BitAllOut,INT_N,INT_N)
+DEFPIO(PIO4BASE+4,M_Input,M_Input,M_BitAllOut,M_BitAllOut,INT_N,INT_N)
+DEFPIO(PIO4BASE+8,M_Output,M_Output,M_BitAllOut,M_BitAllOut,INT_N,INT_N)
+DEFPIO(PIO4BASE+12,M_Output,M_Output,M_BitAllOut,M_Output,INT_N,INT_N)
+#ENDIF
+#IF	PIO_ZP
+DEFPIO(PIOZBASE+0,M_Input,M_Input,M_BitAllOut,M_BitAllOut,INT_N,INT_N)
+DEFPIO(PIOZBASE+4,M_Output,M_Output,M_BitAllOut,M_BitAllOut,INT_N,INT_N)
+#ENDIF
+; PIO_SBC & (PLATFORM == PLT_SBC) & (PPIDEMODE != PPIDEMODE_SBC))
+
+#IF 	PIO_SBC
+DEFPPI(PIOSBASE,M_Output,M_Output,M_Output,M_BitAllOut,M_BitAllOut,M_BitAllOut)
+#ENDIF
+;
+PIO_CNT	.EQU	($ - PIO_CFG) / CFG_SIZ 	
+;
+;-------------------------------------------------------------------
+; WHEN WE GET HERE IY POINTS TO THE PIO_CFG TABLE WE ARE WORKING ON.
+; C IS THE UNIT NUMBER
+;-------------------------------------------------------------------
+;
+;PIO_INITUNIT:
+;	LD	A,C			; SET THE UNIT NUMBER
+;	LD	(IY),A	
+;
+;	LD	DE,-1			; LEAVE CONFIG ALONE
+;	CALL	PIO_INITDEV		; IMPLEMENT IT AND RETURN
+;	XOR	A			; SIGNAL SUCCESS
+;	RET				; AND RETURN
+;
+PIO_INIT:
+;	CALL	SPK_BEEP
+	LD	B,PIO_CNT		; COUNT OF POSSIBLE PIO UNITS
+	LD	C,0			; INDEX INTO PIO CONFIG TABLE
+PIO_INIT1:
+	PUSH	BC			; SAVE LOOP CONTROL
+	
+;	LD	A,C			; PHYSICAL UNIT TO A
+;	RLCA				; MULTIPLY BY CFG TABLE ENTRY SIZE (32 BYTES)
+;	RLCA				; ...
+;	RLCA				; ... TO GET OFFSET INTO CFG TABLE
+;	RLCA
+;;	RLCA
+;	LD	HL,PIO_CFG		; POINT TO START OF CFG TABLE
+;	PUSH	AF
+;	CALL	ADDHLA			; HL := ENTRY ADDRESS
+;	POP	AF
+;	CALL	ADDHLA			; HL := ENTRY ADDRESS
+;	PUSH	HL			; COPY CFG DATA PTR
+;	POP	IY			; ... TO IY
+;	POP	IY			; ... TO IY
+
+	CALL	IDXCFG
+
+	LD	A,(IY+1)		; GET PIO TYPE
+	OR	A			; SET FLAGS
+	CALL	NZ,PIO_PRTCFG		; PRINT IF NOT ZERO
+	
+;	PUSH	DE	
+;	LD	DE,$FFFF		; INITIALIZE DEVICE/CHANNEL
+;	CALL	PIO_INITDEV		; BASED ON DPW
+;	POP	DE
+
+	POP	BC			; RESTORE LOOP CONTROL
+	INC	C			; NEXT UNIT
+	DJNZ	PIO_INIT1		; LOOP TILL DONE
+;
+	XOR	A			; SIGNAL SUCCESS
+	RET				; DONE
+;
+SET_PORT:
+	; DEVICE TYPE IS I/O PORT SO JUST WRITE $00 TO IT
+	LD	C,(IY+3)
+	OUT	(C),A
+	XOR	A
+	RET

Source/HBIOS/sio.asm

@@ -716,7 +716,7 @@ SIO_INITDEV4:
 ;
 	; ALL GOOD.  PROGRAM THE CTC CHANNEL
 	LD	A,(IY+13)		; GET CTC CHANNEL
-	ADD	A,CTCA			; ADD TO CTC BASE PORT ADR
+	ADD	A,CTCBASE		; ADD TO CTC BASE PORT ADR
   #IF (SIODEBUG)
 	PRTS(" CTC=$")
 	CALL	PRTHEXBYTE
@@ -815,7 +815,7 @@ SIO_INITSAFE:
 	; IF A CTC CHANNEL IS CONFIGURED, PROGRAM IT FOR
 	; SIMPLE 1:1 SCALING.
 	LD	A,(IY+13)		; GET CTC CHANNEL
-	ADD	A,CTCA			; ADD TO CTC BASE PORT ADR
+	ADD	A,CTCBASE		; ADD TO CTC BASE PORT ADR
 	LD	C,A			; AND PUT IN C FOR I/O
 	LD	A,%01010111		; CTCC CONTROL WORD VALUE
 	OUT	(C),A			; PREP CTC CHANNEL

Source/HBIOS/std.asm

@@ -42,22 +42,6 @@ DL_INFO		.EQU	16		; HBIOS DISPLAYS INFORMATIONAL MESSAGES
 DL_DETAIL	.EQU	20		; HBIOS DISPLAYS DETAILED DIAGNOSTIC MESSAGES
 DL_VERBOSE	.EQU	24		; HBIOS DISPLAYS ANYTHING IT KNOWS HOW TO
 ;
-; PRIMARY HARDWARE PLATFORMS
-;
-PLT_SBC		.EQU	1		; SBC ECB Z80 SBC
-PLT_ZETA	.EQU	2		; ZETA Z80 SBC
-PLT_ZETA2	.EQU	3		; ZETA Z80 V2 SBC
-PLT_N8		.EQU	4		; N8 (HOME COMPUTER) Z180 SBC
-PLT_MK4		.EQU	5		; MARK IV
-PLT_UNA		.EQU	6		; UNA BIOS
-PLT_RCZ80	.EQU	7		; RC2014 W/ Z80
-PLT_RCZ180	.EQU	8		; RC2014 W/ Z180
-PLT_EZZ80	.EQU	9		; EASY Z80
-PLT_SCZ180	.EQU	10		; SCZ180
-PLT_DYNO	.EQU	11		; DYNO MICRO-ATX MOTHERBOARD
-PLT_RCZ280	.EQU	12		; RC2014 W/ Z280
-PLT_MBC		.EQU	13		; MULTI BOARD COMPUTER
-;
 ; CPU TYPES
 ;
 CPU_NONE	.EQU	0		; NO CPU TYPE DEFINED
@@ -209,6 +193,7 @@ AYMODE_RCZ80	.EQU	3		; RC2014 SOUND MODULE BY ED BRINDLEY ON Z80
 AYMODE_RCZ180	.EQU	4		; RC2014 SOUND MODULE BY ED BRINDLEY ON Z180
 AYMODE_MSX	.EQU	5		; RC2014 SOUND MODULE REV6 BY ED BRINDLEY ON Z80/Z180 AT MSX PORTS
 AYMODE_LINC	.EQU	6		; LINC Z50 AY SOUND CARD
+AYMODE_MBC	.EQU	7		; MBC SOUND BOARD
 ;
 ; SN SOUND CHIP MODE SELECTIONS
 ; 
@@ -416,15 +401,6 @@ SPD_LOW		.EQU	2		; PLATFORM CAN CHANGE SPEED, STARTS LOW
 ;
 #INCLUDE "build.inc"		; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE
 ;
-#IF (BIOS == BIOS_WBW)
-#INCLUDE "hbios.inc"
-#ENDIF
-;
-#IF (BIOS == BIOS_UNA)
-#INCLUDE "../UBIOS/ubios.inc"
-#ENDIF
-;
-;
 ; INCLUDE Z180 REGISTER DEFINITIONS
 ;
 #IF (BIOS == BIOS_WBW)
@@ -520,17 +496,17 @@ SYSTIM	.SET	TM_Z280
 ;
 WBW_ROM_R	.EQU	128	; 128K			; RESERVED ROM REQUIRED FOR ROMWBW
 WBW_RAM_R	.EQU	256	; 256K			; RESERVED RAM REQUIRED FOR ROMWBW
-TOT_ROM_RB	.EQU	(PLT_ROM_R + WBW_ROM_R)/32	; TOTAL ROM BANKS RESERVED
-TOT_RAM_RB	.EQU	(PLT_RAM_R + WBW_RAM_R)/32	; TOTAL RAM BANKS RESERVED
+TOT_ROM_RB	.EQU	(WBW_ROM_R / 32)		; TOTAL ROM BANKS RESERVED
+TOT_RAM_RB	.EQU	(WBW_RAM_R / 32)		; TOTAL RAM BANKS RESERVED
 ;
 #IF (BIOS == BIOS_UNA)
-BID_ROM0	.EQU	$0000 + (PLT_ROM_R / 32)
-BID_RAM0	.EQU	$8000 + (PLT_RAM_R / 32)
+BID_ROM0	.EQU	$0000
+BID_RAM0	.EQU	$8000
 #ENDIF
 ;
 #IF (BIOS == BIOS_WBW)
-BID_ROM0	.EQU	$00 + (PLT_ROM_R / 32)
-BID_RAM0	.EQU	$80 + (PLT_RAM_R / 32)
+BID_ROM0	.EQU	$00
+BID_RAM0	.EQU	$80
 #ENDIF
 
 BID_ROMN	.EQU	(BID_ROM0 + ((ROMSIZE / 32) - 1))
@@ -538,13 +514,13 @@ BID_RAMN	.EQU	(BID_RAM0 + ((RAMSIZE / 32) - 1))
 ;
 BID_RAMD0	.EQU	BID_RAM0	; FIRST RAM DRIVE BANK			 ^  RAM
 BID_RAMDN	.EQU	BID_RAMN - TOT_RAM_RB	; LAST RAM DRIVE BANK		 |  DRIVE
-;					; OS BUFFERS CP/M3?			-+ THESE
-;					; OS BUFFERS CP/M3?			 | MAKE
-;					; OS BUFFERS CP/M3?			 | UP
-;					; OS BUFFERS CP/M3?			 | THE
-BID_AUX		.EQU	BID_RAMN - 3	; AUX BANK (BPBIOS, ETC.)		 | 256KB
+;					; OS BUFFERS CP/M3?			-+ THESE	CPM3 BNK 5 (BUF)
+;					; OS BUFFERS CP/M3?			 | MAKE		CPM3 BNK 4 (BUF)
+;					; OS BUFFERS CP/M3?			 | UP		CPM3 BNK 3 (BUF)
+;					; OS BUFFERS CP/M3?			 | THE		CPM3 BNK 2 (BUF)
+BID_AUX		.EQU	BID_RAMN - 3	; AUX BANK (BPBIOS, ETC.)		 | 256KB	CPM3 BNK 1 (TPA)
 BID_BIOS	.EQU	BID_RAMN - 2	; BIOS BANK				 | RESERVED
-BID_USR		.EQU	BID_RAMN - 1	; USER BANK (CP/M TPA, ETC.)		 | RAM
+BID_USR		.EQU	BID_RAMN - 1	; USER BANK (CP/M TPA, ETC.)		 | RAM		CPM3 BNK 0 (OS)
 BID_COM		.EQU	BID_RAMN - 0	; COMMON BANK, UPPER 32K		-+ BANKS
 BID_BOOT	.EQU	BID_ROM0 + 0	; BOOT BANK				-+ THESE MAKE
 BID_IMG0	.EQU	BID_ROM0 + 1	; ROM LOADER AND FIRST IMAGES BANK	 | UP THE 128KB
@@ -553,6 +529,46 @@ BID_IMG2	.EQU	BID_ROM0 + 3	; NETWORK BOOT				-+ ROM BANKS
 BID_ROMD0	.EQU	BID_ROM0 + 4	; FIRST ROM DRIVE BANK			 |  ROM
 BID_ROMDN	.EQU	BID_ROMN	; LAST ROM DRIVE BANK			 V  DRIVE
 ;
+#IF (ROMSIZE == 0)
+BID_BOOT	.SET	BID_RAM0	; SPECIAL CASE ROM-LESS SYSTEM
+#ENDIF
+;
+#IF (BIOS == BIOS_WBW)
+;
+  #IF (!MDRAM)
+BID_RAMD0	.SET	$FF		; RAM DRIVE DISABLED
+BID_RAMDN	.SET	$FF		; RAM DRIVE DISABLED
+  #ENDIF
+;
+  #IF (!MDROM)
+BID_ROMD0	.SET	$FF		; ROM DRIVE DISABLED
+BID_ROMDN	.SET	$FF		; ROM DRIVE DISABLED
+  #ENDIF
+;
+#ENDIF
+;
+#IF FALSE
+	.ECHO "BID_AUX: " \ .ECHO BID_AUX \ .ECHO "\n"
+	.ECHO "BID_BIOS: " \ .ECHO BID_BIOS \ .ECHO "\n"
+	.ECHO "BID_USR: " \ .ECHO BID_USR \ .ECHO "\n"
+	.ECHO "BID_COM: " \ .ECHO BID_COM \ .ECHO "\n"
+	
+	.ECHO "BID_BOOT: " \ .ECHO BID_BOOT \ .ECHO "\n"
+	.ECHO "BID_IMG0: " \ .ECHO BID_IMG0 \ .ECHO "\n"
+	.ECHO "BID_IMG1: " \ .ECHO BID_IMG1 \ .ECHO "\n"
+	.ECHO "BID_IMG2: " \ .ECHO BID_IMG2 \ .ECHO "\n"
+	
+	.ECHO "BID_ROMD0: " \ .ECHO BID_ROMD0 \ .ECHO "\n"
+	.ECHO "BID_ROMDN: " \ .ECHO BID_ROMDN \ .ECHO "\n"
+	.ECHO "BID_RAMD0: " \ .ECHO BID_RAMD0 \ .ECHO "\n"
+	.ECHO "BID_RAMDN: " \ .ECHO BID_RAMDN \ .ECHO "\n"
+	
+	.ECHO "BID_ROM0: " \ .ECHO BID_ROM0 \ .ECHO "\n"
+	.ECHO "BID_ROMN: " \ .ECHO BID_ROMN \ .ECHO "\n"
+	.ECHO "BID_RAM0: " \ .ECHO BID_RAM0 \ .ECHO "\n"
+	.ECHO "BID_RAMN: " \ .ECHO BID_RAMN \ .ECHO "\n"
+#ENDIF		
+;
 ; MEMORY LAYOUT
 ;
 SYS_SIZ		.EQU	$3000			; COMBINED SIZE OF SYSTEM AREA (OS + HBIOS PROXY)
@@ -670,6 +686,28 @@ INT_SIO1	.EQU	14	; ZILOG SIO 1, CHANNEL A & B
 
 ; Z80-BASED SYSTEMS
 
+
+    #IF (PLATFORM == PLT_MBC)
+
+;INT_CTC0A	.EQU	0	; ZILOG CTC 0, CHANNEL A
+;INT_CTC0B	.EQU	1	; ZILOG CTC 0, CHANNEL B
+;INT_CTC0C	.EQU	2	; ZILOG CTC 0, CHANNEL C
+;INT_CTC0D	.EQU	3	; ZILOG CTC 0, CHANNEL D
+INT_UART0	.EQU	4	; MBC UART 0
+INT_UART1	.EQU	5	; MBC UART 1
+INT_SIO0	.EQU	8	; ZILOG SIO 0, CHANNEL A & B
+INT_SIO1	.EQU	9	; ZILOG SIO 1, CHANNEL A & B
+INT_CTC0A	.EQU	12	; ZILOG CTC 0, CHANNEL A
+INT_CTC0B	.EQU	13	; ZILOG CTC 0, CHANNEL B
+INT_CTC0C	.EQU	14	; ZILOG CTC 0, CHANNEL C
+INT_CTC0D	.EQU	15	; ZILOG CTC 0, CHANNEL D
+;INT_PIO0A	.EQU	9	; ZILOG PIO 0, CHANNEL A
+;INT_PIO0B	.EQU	10	; ZILOG PIO 0, CHANNEL B
+;INT_PIO1A	.EQU	11	; ZILOG PIO 1, CHANNEL A
+;INT_PIO1B	.EQU	12	; ZILOG PIO 1, CHANNEL B
+    
+    #ELSE
+
 INT_CTC0A	.EQU	0	; ZILOG CTC 0, CHANNEL A
 INT_CTC0B	.EQU	1	; ZILOG CTC 0, CHANNEL B
 INT_CTC0C	.EQU	2	; ZILOG CTC 0, CHANNEL C
@@ -683,22 +721,23 @@ INT_PIO0B	.EQU	10	; ZILOG PIO 0, CHANNEL B
 INT_PIO1A	.EQU	11	; ZILOG PIO 1, CHANNEL A
 INT_PIO1B	.EQU	12	; ZILOG PIO 1, CHANNEL B
 
+    #ENDIF
+
   #ENDIF
 
 #DEFINE IVT(INTX) HB_IVT+(INTX * 4)+1
 #DEFINE VEC(INTX) INTX*2
 
 #ENDIF
-
+;
 ; SET DEFAULT CSIO SPEED (INTERNAL CLOCK, SLOW AS POSSIBLE)
 ; DIV 1280, 14KHZ @ 18MHZ CLK
-
+;
 #IF (BIOS == BIOS_WBW)
   #IF (CPUFAM == CPU_Z180)
 Z180_CNTR_DEF	.EQU	$06	; DEFAULT VALUE FOR Z180 CSIO CONFIG
   #ENDIF
 #ENDIF
-
 ;
 ; HELPER MACROS
 ;

Source/HDIAG/Build.cmd

@@ -8,10 +8,6 @@ set PATH=%TOOLS%\tasm32;%PATH%
 
 set TASMTABS=%TOOLS%\tasm32
 
-set ZXBINDIR=%TOOLS%/cpm/bin/
-set ZXLIBDIR=%TOOLS%/cpm/lib/
-set ZXINCDIR=%TOOLS%/cpm/include/
-
 tasm -t180 -g3 -fFF -DAPPBOOT hdiag.asm hdiag.com hdiag_com.lst || exit /b
 tasm -t180 -g3 -fFF -DROMBOOT hdiag.asm hdiag.rom hdiag_rom.lst || exit /b
 

Source/Images/Build.cmd

@@ -23,6 +23,7 @@ call BuildDisk.cmd nzcom hd wbw_hd512 ..\zsdos\zsys_wbw.sys || exit /b
 call BuildDisk.cmd cpm3 hd wbw_hd512 ..\cpm3\cpmldr.sys || exit /b
 call BuildDisk.cmd zpm3 hd wbw_hd512 ..\zpm3\zpmldr.sys || exit /b
 call BuildDisk.cmd ws4 hd wbw_hd512 || exit /b
+call BuildDisk.cmd dos65 hd wbw_hd512 ..\zsdos\zsys_wbw.sys || exit /b
 
 if exist ..\BPBIOS\bpbio-ww.rel call BuildDisk.cmd bp hd wbw_hd512 || exit /b