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Enable CH and LPT Drivers for Duodyne

pull/372/head v3.4.0-dev.12
Wayne Warthen 2 years ago
parent
commit
29f93fb153
  1. 8
      Source/HBIOS/cfg_duo.asm
  2. 2
      Source/ver.inc
  3. 2
      Source/ver.lib

8
Source/HBIOS/cfg_duo.asm

@ -229,12 +229,12 @@ SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
; ;
CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
CHENABLE .EQU TRUE ; CH: ENABLE CH375/376 USB SUPPORT
CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2) CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
CH0BASE .EQU $4E ; CH 0: BASE I/O ADDRESS
CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
@ -259,11 +259,11 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $68 ; PIO 0: REGISTERS BASE ADR PIO0BASE .EQU $68 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $6C ; PIO 1: REGISTERS BASE ADR PIO1BASE .EQU $6C ; PIO 1: REGISTERS BASE ADR
; ;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTENABLE .EQU TRUE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .EQU LPTMODE_SPP ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014] LPTMODE .EQU LPTMODE_SPP ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2) LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) LPTTRACE .EQU 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT0BASE .EQU $48 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
; ;
PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM) PPAENABLE .EQU FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)

2
Source/ver.inc

@ -2,7 +2,7 @@
#DEFINE RMN 4 #DEFINE RMN 4
#DEFINE RUP 0 #DEFINE RUP 0
#DEFINE RTP 0 #DEFINE RTP 0
#DEFINE BIOSVER "3.4.0-dev.11"
#DEFINE BIOSVER "3.4.0-dev.12"
#define rmj RMJ #define rmj RMJ
#define rmn RMN #define rmn RMN
#define rup RUP #define rup RUP

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 4
rup equ 0 rup equ 0
rtp equ 0 rtp equ 0
biosver macro biosver macro
db "3.4.0-dev.11"
db "3.4.0-dev.12"
endm endm

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