diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt
index a5c03a48..48dd0df8 100644
--- a/Doc/ChangeLog.txt
+++ b/Doc/ChangeLog.txt
@@ -32,6 +32,7 @@ Version 3.5
 - WBW: Substantial customization of NZ-COM disk image
 - WBW: Refactor build post-processing (ZRC, ZZRCC, etc.)
 - MAP: Improved section Real Time Clock in User Guide document
+- WBW: Support for Hitachi HD44780-based LCD display
 
 Version 3.4
 -----------
diff --git a/Doc/RomWBW Applications.pdf b/Doc/RomWBW Applications.pdf
index 7f83123b..e03f4e0a 100644
Binary files a/Doc/RomWBW Applications.pdf and b/Doc/RomWBW Applications.pdf differ
diff --git a/Doc/RomWBW Disk Catalog.pdf b/Doc/RomWBW Disk Catalog.pdf
index c339648b..3f97fb4a 100644
Binary files a/Doc/RomWBW Disk Catalog.pdf and b/Doc/RomWBW Disk Catalog.pdf differ
diff --git a/Doc/RomWBW Errata.pdf b/Doc/RomWBW Errata.pdf
index a3a32686..e66bd0f4 100644
Binary files a/Doc/RomWBW Errata.pdf and b/Doc/RomWBW Errata.pdf differ
diff --git a/Doc/RomWBW System Guide.pdf b/Doc/RomWBW System Guide.pdf
index 3dab9caf..96d70a7c 100644
Binary files a/Doc/RomWBW System Guide.pdf and b/Doc/RomWBW System Guide.pdf differ
diff --git a/Doc/RomWBW User Guide.pdf b/Doc/RomWBW User Guide.pdf
index bf7e0c6e..8f2cba7d 100644
Binary files a/Doc/RomWBW User Guide.pdf and b/Doc/RomWBW User Guide.pdf differ
diff --git a/ReadMe.md b/ReadMe.md
index 8d0988fc..615bd7b3 100644
--- a/ReadMe.md
+++ b/ReadMe.md
@@ -3,7 +3,7 @@
 **RomWBW ReadMe** \
 Version 3.5 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-26 Aug 2024
+27 Aug 2024
 
 # Overview
 
diff --git a/ReadMe.txt b/ReadMe.txt
index eeef95b3..0388635d 100644
--- a/ReadMe.txt
+++ b/ReadMe.txt
@@ -1,6 +1,6 @@
 RomWBW ReadMe
 Wayne Warthen (wwarthen@gmail.com)
-26 Aug 2024
+27 Aug 2024
 
 
 
diff --git a/Source/Doc/UserGuide.md b/Source/Doc/UserGuide.md
index 6f60a195..c7f403f9 100644
--- a/Source/Doc/UserGuide.md
+++ b/Source/Doc/UserGuide.md
@@ -6131,6 +6131,7 @@ may be discovered by RomWBW in your system.
 | INTRTC    | RTC      | Interrupt-based Real Time Clock                        |
 | KBD       | Keyboard | 8242 PS/2 Keyboard Controller                          |
 | KIO       | System   | Zilog Serial/ Parallel Counter/Timer                   |
+| LCD       | System   | Hitachi HD44780-based LCD Display                      |
 | LPT       | Char     | Parallel I/O Controller                                |
 | MD        | Disk     | ROM/RAM Disk                                           |
 | MSXKYB    | Keyboard | MSX Compliant Matrix Keyboard                          |
diff --git a/Source/HBIOS/cfg_duo.asm b/Source/HBIOS/cfg_duo.asm
index ac440660..935e9c3b 100644
--- a/Source/HBIOS/cfg_duo.asm
+++ b/Source/HBIOS/cfg_duo.asm
@@ -90,6 +90,9 @@ PKDENABLE	.EQU	TRUE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$88		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_dyno.asm b/Source/HBIOS/cfg_dyno.asm
index 0ddc8c08..6001a658 100644
--- a/Source/HBIOS/cfg_dyno.asm
+++ b/Source/HBIOS/cfg_dyno.asm
@@ -92,6 +92,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_epitx.asm b/Source/HBIOS/cfg_epitx.asm
index acc5efdc..12492497 100644
--- a/Source/HBIOS/cfg_epitx.asm
+++ b/Source/HBIOS/cfg_epitx.asm
@@ -93,6 +93,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_fz80.asm b/Source/HBIOS/cfg_fz80.asm
index e2da9217..365e9a7f 100644
--- a/Source/HBIOS/cfg_fz80.asm
+++ b/Source/HBIOS/cfg_fz80.asm
@@ -92,6 +92,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_heath.asm b/Source/HBIOS/cfg_heath.asm
index 757ab89c..68ab5e74 100644
--- a/Source/HBIOS/cfg_heath.asm
+++ b/Source/HBIOS/cfg_heath.asm
@@ -92,6 +92,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	TRUE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_master.asm b/Source/HBIOS/cfg_master.asm
index 27cfffa2..558b8d82 100644
--- a/Source/HBIOS/cfg_master.asm
+++ b/Source/HBIOS/cfg_master.asm
@@ -121,6 +121,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_mbc.asm b/Source/HBIOS/cfg_mbc.asm
index 10551bd8..38d84b2d 100644
--- a/Source/HBIOS/cfg_mbc.asm
+++ b/Source/HBIOS/cfg_mbc.asm
@@ -87,6 +87,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_mk4.asm b/Source/HBIOS/cfg_mk4.asm
index 2b65a9c8..0cc30961 100644
--- a/Source/HBIOS/cfg_mk4.asm
+++ b/Source/HBIOS/cfg_mk4.asm
@@ -92,6 +92,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_mon.asm b/Source/HBIOS/cfg_mon.asm
index 65564ab9..aa9edb43 100644
--- a/Source/HBIOS/cfg_mon.asm
+++ b/Source/HBIOS/cfg_mon.asm
@@ -87,6 +87,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_n8.asm b/Source/HBIOS/cfg_n8.asm
index ef92f4af..ff1341e3 100644
--- a/Source/HBIOS/cfg_n8.asm
+++ b/Source/HBIOS/cfg_n8.asm
@@ -94,6 +94,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	N8_PPI0		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_nabu.asm b/Source/HBIOS/cfg_nabu.asm
index e19bf2ae..ac92fc56 100644
--- a/Source/HBIOS/cfg_nabu.asm
+++ b/Source/HBIOS/cfg_nabu.asm
@@ -92,6 +92,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm
index 97aea416..85527376 100644
--- a/Source/HBIOS/cfg_rcz180.asm
+++ b/Source/HBIOS/cfg_rcz180.asm
@@ -98,6 +98,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	TRUE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$AA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_rcz280.asm b/Source/HBIOS/cfg_rcz280.asm
index 4841795e..b347ea71 100644
--- a/Source/HBIOS/cfg_rcz280.asm
+++ b/Source/HBIOS/cfg_rcz280.asm
@@ -92,6 +92,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	TRUE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_rcz80.asm b/Source/HBIOS/cfg_rcz80.asm
index bc22d90c..83dece82 100644
--- a/Source/HBIOS/cfg_rcz80.asm
+++ b/Source/HBIOS/cfg_rcz80.asm
@@ -92,6 +92,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	TRUE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_rph.asm b/Source/HBIOS/cfg_rph.asm
index 6324233b..a0dfcff0 100644
--- a/Source/HBIOS/cfg_rph.asm
+++ b/Source/HBIOS/cfg_rph.asm
@@ -92,6 +92,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	RPH_PPI0	; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_s100.asm b/Source/HBIOS/cfg_s100.asm
index b96ca7ea..cbe138dc 100644
--- a/Source/HBIOS/cfg_s100.asm
+++ b/Source/HBIOS/cfg_s100.asm
@@ -92,6 +92,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_sbc.asm b/Source/HBIOS/cfg_sbc.asm
index 4ea037e3..70ff423c 100644
--- a/Source/HBIOS/cfg_sbc.asm
+++ b/Source/HBIOS/cfg_sbc.asm
@@ -87,6 +87,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_scz180.asm b/Source/HBIOS/cfg_scz180.asm
index b68d0545..b5931287 100644
--- a/Source/HBIOS/cfg_scz180.asm
+++ b/Source/HBIOS/cfg_scz180.asm
@@ -92,6 +92,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	TRUE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$AA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_z80retro.asm b/Source/HBIOS/cfg_z80retro.asm
index 09a7f6ce..c72b1aba 100644
--- a/Source/HBIOS/cfg_z80retro.asm
+++ b/Source/HBIOS/cfg_z80retro.asm
@@ -90,6 +90,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_zeta.asm b/Source/HBIOS/cfg_zeta.asm
index 67afc68a..22fdc276 100644
--- a/Source/HBIOS/cfg_zeta.asm
+++ b/Source/HBIOS/cfg_zeta.asm
@@ -79,6 +79,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/cfg_zeta2.asm b/Source/HBIOS/cfg_zeta2.asm
index e98879b7..6e1e6985 100644
--- a/Source/HBIOS/cfg_zeta2.asm
+++ b/Source/HBIOS/cfg_zeta2.asm
@@ -90,6 +90,9 @@ PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
 PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
 PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+LCDENABLE	.EQU	FALSE		; ENABLE LCD DISPLAY
+LCDBASE		.EQU	$DA		; BASE I/O ADDRESS OF LCD CONTROLLER
+LCDDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON LCD DISPLAY
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 SECCON		.EQU	$FF		; SECONDARY CONSOLE DEVICE
diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm
index f0647adc..4b3c976c 100644
--- a/Source/HBIOS/hbios.asm
+++ b/Source/HBIOS/hbios.asm
@@ -2299,6 +2299,9 @@ HB_CPU1:
 	LD	B,BF_DSKYSHOWSEG
 	CALL	DSKY_DISPATCH
 #ENDIF
+#IF (LCDENABLE)
+	CALL	LCD_PREINIT
+#ENDIF
 #IF (H8PENABLE)
 	CALL	H8P_PREINIT
 #ENDIF
@@ -3700,6 +3703,9 @@ HB_INITTBL:
 	.DW	PKD_INIT
   #ENDIF
 #ENDIF
+#IF (LCDENABLE)
+	.DW	LCD_INIT
+#ENDIF
 #IF (H8PENABLE)
 	.DW	H8P_INIT
 #ENDIF
@@ -4293,10 +4299,15 @@ HB_DSKFUNC	.DB	0		; CURRENT DISK FUNCTION
 ;   HL: ADDRESS OF 32-BIT SECTOR NUMBER (LITTLE-ENDIAN)
 ;   ALL REGISTERS PERSERVED
 ;
+HB_DSKACT:
+#IF (LCDENABLE)
+  #IF (LCDDSKACT)
+	CALL	LCD_DSKACT
+  #ENDIF
+#ENDIF
 #IF (DSKYENABLE)
   #IF (DSKYDSKACT)
 ;
-HB_DSKACT:
 	; SAVE EVERYTHING
 	PUSH	AF
 	PUSH	BC
@@ -4341,7 +4352,7 @@ HB_DSKACT2:
 	POP	DE
 	POP	BC
 	POP	AF
-	RET				; DONE
+	JR	HB_DSKACT_Z		; DONE
 ;
 ; THIS IS THE CHS VARIANT OF THE ABOVE.  THIS IS USED BY CHS ORIENTED
 ; DISK DRIVERS (BASICALLY JUST FLOPPY).
@@ -4366,6 +4377,9 @@ HB_DSKACTCHS:
   #ENDIF
 #ENDIF
 ;
+HB_DSKACT_Z:
+	RET
+;
 ;--------------------------------------------------------------------------------------------------
 ; REAL TIME CLOCK DEVICE DISPATCHER
 ;--------------------------------------------------------------------------------------------------
@@ -7957,6 +7971,15 @@ SIZ_PKD	.EQU	$ - ORG_PKD
   #ENDIF
 #ENDIF
 ;
+#IF (LCDENABLE)
+ORG_LCD	.EQU	$
+  #INCLUDE "lcd.asm"
+SIZ_LCD	.EQU	$ - ORG_LCD
+		MEMECHO	"LCD occupies "
+		MEMECHO	SIZ_LCD
+		MEMECHO	" bytes.\n"
+#ENDIF
+;
 #IF (H8PENABLE)
 ORG_H8P	.EQU	$
   #INCLUDE "h8p.asm"
diff --git a/Source/HBIOS/hdsk.asm b/Source/HBIOS/hdsk.asm
index 6dfc426f..af357564 100644
--- a/Source/HBIOS/hdsk.asm
+++ b/Source/HBIOS/hdsk.asm
@@ -239,13 +239,13 @@ HDSK_RW0:
 	XOR	A			; A = 0
 	LD	(HDSK_RC),A		; CLEAR RETURN CODE
 ;
-#IF (DSKYENABLE)
-  #IF (DSKYDSKACT)
+;;;#IF (DSKYENABLE)
+;;;  #IF (DSKYDSKACT)
 	LD	A,HDSK_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
-  #ENDIF
-#ENDIF
+;;;  #ENDIF
+;;;#ENDIF
 ;
 	; CONVERT LBA HHHH:LLLL (4 BYTES)
 	; TO HDSK TRACK/SECTOR TTTT:SS (3 BYTES)
diff --git a/Source/HBIOS/ide.asm b/Source/HBIOS/ide.asm
index 4bead8cc..7abb8316 100644
--- a/Source/HBIOS/ide.asm
+++ b/Source/HBIOS/ide.asm
@@ -920,13 +920,13 @@ IDE_PKT_RDSEC:
 #ENDIF
 	; SETUP LBA
 ;
-#IF (DSKYENABLE)
-  #IF (DSKYDSKACT)
+;;;#IF (DSKYENABLE)
+;;;  #IF (DSKYDSKACT)
 	LD	A,IDE_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
-  #ENDIF
-#ENDIF
+;;;  #ENDIF
+;;;#ENDIF
 ;
 	; 3 BYTES, LITTLE ENDIAN -> BIG ENDIAN
 	LD	HL,IDE_PKTCMD_RW10+3	; START OF LBA FIELD IN CDB (MSB)
@@ -989,13 +989,13 @@ IDE_PKT_WRSEC:
 #ENDIF
 	; SETUP LBA
 ;
-#IF (DSKYENABLE)
-  #IF (DSKYDSKACT)
+;;;#IF (DSKYENABLE)
+;;;  #IF (DSKYDSKACT)
 	LD	A,IDE_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
-  #ENDIF
-#ENDIF
+;;;  #ENDIF
+;;;#ENDIF
 ;
 	; 3 BYTES, LITTLE ENDIAN -> BIG ENDIAN
 	LD	HL,IDE_PKTCMD_RW10+3	; START OF LBA FIELD IN CDB (MSB)
@@ -1021,13 +1021,13 @@ IDE_PKT_WRSEC:
 ;
 IDE_SETADDR:
 ;
-#IF (DSKYENABLE)
-  #IF (DSKYDSKACT)
+;;;#IF (DSKYENABLE)
+;;;  #IF (DSKYDSKACT)
 	LD	A,IDE_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
-  #ENDIF
-#ENDIF
+;;;  #ENDIF
+;;;#ENDIF
 	; SEND 3 LOWEST BYTES OF LBA IN REVERSE ORDER
 	; IDE_REG_LBA3 HAS ALREADY BEEN SET
 	; HSTLBA2-0 --> IDE_REG_LBA2-0
diff --git a/Source/HBIOS/imm.asm b/Source/HBIOS/imm.asm
index 237c6ed4..9ab0940b 100644
--- a/Source/HBIOS/imm.asm
+++ b/Source/HBIOS/imm.asm
@@ -343,13 +343,13 @@ IMM_IO:
 ;
 	LD	(IMM_DSKBUF),HL		; SAVE DISK BUFFER ADDRESS
 ;
-#IF (DSKYENABLE)
-  #IF (DSKYDSKACT)
+;;;#IF (DSKYENABLE)
+;;;  #IF (DSKYDSKACT)
 	LD	A,IMM_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
-  #ENDIF
-#ENDIF
+;;;  #ENDIF
+;;;#ENDIF
 ;
 	; SETUP LBA
 	; 3 BYTES, LITTLE ENDIAN -> BIG ENDIAN
diff --git a/Source/HBIOS/lcd.asm b/Source/HBIOS/lcd.asm
new file mode 100644
index 00000000..94833001
--- /dev/null
+++ b/Source/HBIOS/lcd.asm
@@ -0,0 +1,392 @@
+;
+;==================================================================================================
+; HARDWARE SUPPORT FOR HITACHI HD44780 OR EQUIVALENT
+;==================================================================================================
+;
+; CURRENTLY ASSUMES A 20X4 DISPLAY
+;
+; TYPICAL PORTS USED ON RCBUS ECOSYSTEM:
+;
+;		PRIMARY		ALT
+; FUNCTION	$DA		$AA
+; DATA		$DB		$AB
+;
+LCD_FUNC	.EQU	LCDBASE + 0	; WRITE
+LCD_STAT	.EQU	LCDBASE + 0	; READ
+LCD_DATA	.EQU	LCDBASE + 1	; READ/WRITE
+;
+LCD_FUNC_CLEAR	.EQU	$01		; CLEAR DISPLAY
+LCD_FUNC_HOME	.EQU	$02		; HOME CURSOR & REMOVE ALL SHIFTING
+LCD_FUNC_ENTRY	.EQU	$04		; SET CUR DIR AND DISPLAY SHIFT
+LCD_FUNC_DISP	.EQU	$08		; DISP, CUR, BLINK ON/OFF
+LCD_FUNC_SHIFT	.EQU	$10		; MOVE CUR / SHIFT DISP
+LCD_FUNC_SET	.EQU	$20		; SET INTERFACE PARAMS
+LCD_FUNC_CGADR	.EQU	$40		; SET CGRAM ADRESS
+LCD_FUNC_DDADR	.EQU	$80		; SET DDRAM ADDRESS
+;
+	DEVECHO	"LCD: IO="
+	DEVECHO	LCDBASE
+	DEVECHO	"\n"
+;
+; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION
+;
+LCD_PREINIT:
+;
+	; RESET	LCD CONTROLLER, DELAYS ARE FIXED, BUSY FLAG
+	; CANNOT BE USED YET, CONTROLLER MAY NOT EXIST!
+	LD	A,LCD_FUNC_SET | %11000
+	OUT	(LCD_FUNC),A
+	LD	DE,50000/16		; WAIT >40MS, WE USE 50MS
+	CALL	VDELAY			; DO IT
+	LD	A,LCD_FUNC_SET | %11000
+	OUT	(LCD_FUNC),A
+	LD	DE,5000/16		; WAIT >4.1MS, WE USE 5MS
+	CALL	VDELAY			; DO IT
+	LD	A,LCD_FUNC_SET | %11000
+	OUT	(LCD_FUNC),A
+	LD	DE,5000/16		; WAIT >4.1MS, WE USE 5MS
+	CALL	VDELAY			; DO IT
+;
+	; TEST FOR PRESENCE...
+	CALL	LCD_DETECT		; PROBE FOR HARDWARE
+	LD	A,(LCD_PRESENT)		; GET PRESENCE FLAG
+	OR	A			; SET FLAGS
+	RET	Z			; BAIL OUT IF NOT PRESENT
+;
+	; WE CAN NOW DO NORMAL I/O W/ BUSY FLAG
+	LD	DE,LCD_INIT_SEQ		; INIT SEQUENCE
+	CALL	LCD_OUTFS		; SEND IT
+;
+	; PUT SOMETHING ON THE DISPLAY
+	LD	DE,LCD_STR_BAN
+	CALL	LCD_OUTDS
+;
+	; SECOND LINE
+	; CPU TYPE
+	LD	HL,$0100		; ROW 2, COL 0
+	CALL	LCD_GOTORC
+	LD	HL,LCD_CPU
+	LD	A,(HB_CPUTYPE)		; GET CPU TYPE
+	RRCA				; WORD OFFSET
+	CALL	ADDHLA			; ADD OFFSET
+	LD	E,(HL)			; GET LSB
+	INC	HL			; BUMP
+	LD	D,(HL)			; GET MSB
+	CALL	LCD_OUTDS
+	LD	DE,LCD_STR_XPU
+	CALL	LCD_OUTDS
+;
+	; "12.345 MHz" RIGHT JUSTIFIED
+	LD	HL,$010A		; ROW 2, COL 10
+	CALL	LCD_GOTORC
+	LD	HL,(CB_CPUKHZ)
+	PUSH	HL
+	LD	BC,10000		; 10 MHZ
+	SBC	HL,BC			; SUBTRACT
+	JR	NC,LCD_PREINIT1
+	LD	A,' '			; EXTRA PAD
+	CALL	LCD_OUTD
+LCD_PREINIT1:
+	POP	HL
+	CALL	LCD_PRTD3M		; PRINT AS DECIMAL WITH 3 DIGIT MANTISSA
+	LD	DE,LCD_STR_MHZ
+	CALL	LCD_OUTDS
+;
+	; THIRD LINE
+	LD	HL,$0200		; ROW 2, COL 0
+	CALL	LCD_GOTORC
+	LD	DE,LCD_STR_CFG
+	CALL	LCD_OUTDS
+;
+	XOR	A			; SIGNAL SUCCESS
+	RET				; DONE
+;
+; POST CONSOLE INITIALIZATION
+;
+LCD_INIT:
+	CALL	NEWLINE			; FORMATTING
+	PRTS("LCD: IO=$")
+	LD	A,LCDBASE
+	CALL	PRTHEXBYTE
+;
+	LD	A,(LCD_PRESENT)		; GET PRESENCE FLAG
+	OR	A			; SET FLAGS
+	JR	Z,LCD_INIT1		; HANDLE NOT PRESENT
+	XOR	A			; SIGNAL SUCCESS
+	RET				; DONE
+;
+LCD_INIT1:
+	PRTS(" NOT PRESENT$")
+	OR	$FF
+	RET
+;
+; CALLED FROM HBIOS RIGHT BEFORE A DISK ACCESS
+;   HL: ADDRESS OF 32-BIT SECTOR NUMBER (LITTLE-ENDIAN)
+;
+; FORMAT: "Disk #99  R:12345678"
+;          01234567890123456789
+;
+LCD_DSKACT:
+	; SAVE EVERYTHING
+	PUSH	AF
+	PUSH	BC
+	PUSH	DE
+	PUSH	HL
+;
+	LD	A,(LCD_PRESENT)		; GET PRESENCE FLAG
+	OR	A			; SET FLAGS
+	JR	Z,LCD_DSKACT_Z		; HANDLE NOT PRESENT
+;
+	PUSH	HL
+	LD	HL,$0300		; ROW 3, COL 0
+	CALL	LCD_GOTORC		; SET DISPLAY ADDRESS
+	POP	HL
+;
+	LD	DE,LCD_STR_IO		; PREFIX
+	CALL	LCD_OUTDS		; SEND TO DISPLAY (COLS 0-5)
+;
+	LD	A,(HB_DSKUNIT)		; GET DISK UNIT NUM
+	CALL	LCD_DSKACT_BYTE		; SEND TO DISPLAY (COLS 6-7) HEX???
+;
+	LD	A,' '			; SEPARATOR
+	CALL	LCD_OUTD		; SEND TO DISPLAY (COL 8)
+	CALL	LCD_OUTD		; SEND TO DISPLAY (COL 9)
+;
+	LD	A,(HB_DSKFUNC)		; ACTIVE DISK FUNCTION
+	CP	BF_DIOWRITE		; WRITE?
+	LD	A,'W'			; ASSUME WRITE
+	JR	Z,LCD_DSKACT0		; GO AHEAD
+	LD	A,'R'			; OTHERWISE READ
+LCD_DSKACT0:
+	CALL	LCD_OUTD		; SEND CHAR (COL 10)
+;
+	LD	A,':'			; SEPARATOR
+	CALL	LCD_OUTD		; SEND TO DISPLAY (COL 11)
+;
+	LD	A,3			; POINT TO
+	CALL	ADDHLA			; END OF DWORD (MSB)
+	LD	B,4			; DO 4 BYTES
+;
+LCD_DSKACT1:
+	LD	A,(HL)			; GET BYTE
+	CALL	LCD_DSKACT_BYTE		; SEND TO DISPLAY (COLS 12-19)
+	DEC	HL			; DEC PTR
+	DJNZ	LCD_DSKACT1		; DO ALL 4 BYTES
+;
+LCD_DSKACT_Z:
+	; CLEAN UP AND GO AWAY
+	POP	HL
+	POP	DE
+	POP	BC
+	POP	AF
+	RET
+;
+LCD_DSKACT_BYTE:
+	PUSH	AF			; SAVE BYTE
+	RRCA				; DO TOP NIBBLE FIRST
+	RRCA
+	RRCA
+	RRCA
+	CALL	HEXCONV			; CONVERT NIBBLE TO ASCII
+	CALL	LCD_OUTD		; SEND TO DISPLAY
+	POP	AF			; RECOVER CURRENT BYTE
+	CALL	HEXCONV			; CONVERT NIBBLE TO ASCII
+	CALL	LCD_OUTD		; SEND TO DISPLAY
+	RET				; DONE
+;
+; DETECT PRESENCE OF LCD CONTROLLER BY WRITING AND READING BACK
+; TEST VALUES IN THE CONTROLLER RAM.
+; WE DO NOT USE THE NORMAL READ/WRITE ROUTINES BECAUSE WE DO
+; NOT WANT TO STALL WAITING ON THE BUSY FLAG IF THE CONTROLLER
+; IS NOT PRESENT
+;
+LCD_DETECT:
+	; FIRST PASS W/ TEST VALUE $AA
+	LD	C,$AA
+	CALL	LCD_DETECT_PASS
+	JR	NZ,LCD_DETECT1
+;
+	; SECOND PASS W/ TEST VALUE $55
+	LD	C,$55
+	CALL	LCD_DETECT_PASS
+	JR	NZ,LCD_DETECT1
+;
+	; LCD PRESENT
+	OR	$FF
+	JR	LCD_DETECT_Z
+;
+LCD_DETECT1:
+	; LCD NOT PRESENT
+	XOR	A
+	JR	LCD_DETECT_Z
+;
+LCD_DETECT_Z:
+	LD	(LCD_PRESENT),A
+	RET
+;
+; WRITE AND READBACK VALUE IN C TO THE FIRST BYTE OF DDRAM
+; RETURN WITH COMPARE RESULT
+;
+LCD_DETECT_PASS:
+	CALL	LCD_DELAY		; WAIT
+	LD	A,LCD_FUNC_DDADR
+	OUT	(LCD_FUNC),A		; POINT TO FIRST BYTE
+	CALL	LCD_DELAY		; WAIT
+	LD	A,C			; TEST VALUE
+	OUT	(LCD_DATA),A		; WRITE IT
+	CALL	LCD_DELAY		; WAIT
+	LD	A,LCD_FUNC_DDADR
+	OUT	(LCD_FUNC),A		; POINT TO FIRST BYTE
+	CALL	LCD_DELAY
+	IN	A,(LCD_DATA)		; GET VALUE
+	CP	C			; AS WRITTEN?
+	RET
+;
+; DELAY USED DURING DETECT, >37US
+;
+LCD_DELAY:
+	CALL	DELAY			; 16US
+	CALL	DELAY			; 16US
+	JP	DELAY			; 16US, TOTAL 48US
+;
+; SEND FUNCTION CODE IN A
+;
+LCD_OUTF:
+	PUSH	AF			; SAVE CODE
+LCD_OUTF1:
+	IN	A,(LCD_STAT)		; GET STATUS
+	AND	$80			; ISOLATE BUSY FLAG
+	JR	NZ,LCD_OUTF1		; LOOP TILL NOT BUSY
+	POP	AF			; RECOVER CODE
+	OUT	(LCD_FUNC),A		; SEND IT
+	RET				; DONE
+;
+; SEND FUNCTION STRING
+; DE=STRING ADDRESS, NULL TERMINATED
+; 
+LCD_OUTFS:
+	LD	A,(DE)			; NEXT BYTE TO SEND
+	OR	A			; SET FLAGS
+	RET	Z			; DONE WHEN NULL REACHED
+	INC	DE			; BUMP POINTER
+	CALL	LCD_OUTF		; SEND IT
+	JR	LCD_OUTFS		; LOOP AS NEEDED
+;
+; SEND DATA BYTE IN A
+;
+LCD_OUTD:
+	PUSH	AF			; SAVE BYTE
+LCD_OUTD1:
+	IN	A,(LCD_STAT)		; GET STATUS
+	AND	$80			; ISOLATE BUSY FLAG
+	JR	NZ,LCD_OUTD1		; LOOP TILL NOT BUSY
+	POP	AF			; RECOVER BYTE
+	OUT	(LCD_DATA),A		; SEND IT
+	RET				; DONE
+;
+; SEND DATA STRING
+; DE=STRING ADDRESS, NULL TERMINATED
+; 
+LCD_OUTDS:
+	LD	A,(DE)			; NEXT BYTE TO SEND
+	OR	A			; SET FLAGS
+	RET	Z			; DONE WHEN NULL REACHED
+	INC	DE			; BUMP POINTER
+	CALL	LCD_OUTD		; SEND IT
+	JR	LCD_OUTDS		; LOOP AS NEEDED
+;
+; GET DATA BYTE INTO A
+;
+LCD_IND:
+	IN	A,(LCD_STAT)		; GET STATUS
+	AND	$80			; ISOLATE BUSY FLAG
+	JR	NZ,LCD_IND		; LOOP TILL NOT BUSY
+	POP	AF			; RECOVER BYTE
+	IN	A,(LCD_DATA)		; GET IT
+	RET				; DONE
+;
+; GOTO ROW(H),COL(L)
+;
+LCD_GOTORC:
+	PUSH	HL			; SAVE INCOMING
+	LD	A,H			; ROW # TO A
+	LD	HL,LCD_ROWS		; POINT TO ROWS TABLE
+	CALL	ADDHLA			; INDEX TO ROW ENTRY
+	LD	A,(HL)			; GET RWO START
+	POP	HL			; RECOVER INCOMING
+	ADD	A,L			; ADD COLUMN
+	ADD	A,LCD_FUNC_DDADR	; APPLY FUNCTION BIT
+	JR	LCD_OUTF		; AND SEND IT
+;
+; PRINT VALUE OF HL AS THOUSANDTHS, IE. 0.000
+;
+LCD_PRTD3M:
+	PUSH	BC
+	PUSH	DE
+	PUSH	HL
+	LD	E,'0'
+	LD	BC,-10000
+	CALL	LCD_PRTD3M1
+	LD	E,0
+	LD	BC,-1000
+	CALL	LCD_PRTD3M1
+	LD	A,'.'
+	CALL	LCD_OUTD
+	LD	BC,-100
+	CALL	LCD_PRTD3M1
+	LD	C,-10
+	CALL	LCD_PRTD3M1
+	LD	C,-1
+	CALL	LCD_PRTD3M1
+	POP	HL
+	POP	DE
+	POP	BC
+	RET
+LCD_PRTD3M1:
+	LD	A,'0' - 1
+LCD_PRTD3M2:
+	INC	A
+	ADD	HL,BC
+	JR	C,LCD_PRTD3M2
+	SBC	HL,BC
+	CP	E
+	JR	Z,LCD_PRTD3M3
+	LD	E,0
+	CALL	LCD_OUTD
+LCD_PRTD3M3:
+	RET
+;
+; DATA STORAGE
+;
+LCD_PRESENT	.DB	0		; NON-ZERO WHEN HARDWARE DETECTED
+;
+LCD_ROWS	.DB	$00,$40,$14,$54	; ROW START INDEX
+;
+LCD_INIT_SEQ:
+	.DB	LCD_FUNC_SET | %11000	; FUNCTION SET, 2 LINES, 5X8 FONT
+	.DB	LCD_FUNC_DISP		; DISPLAY OFF
+	.DB	LCD_FUNC_CLEAR		; CLEAR DISPLAY, HOME CURSOR
+	.DB	LCD_FUNC_ENTRY | $02	; INCREMENT, NO SHIFT
+	.DB	LCD_FUNC_DISP | $04	; DISPLAY ON, NO CURSOR, NO BLINK
+	.DB	$00			; TERMINATOR
+;
+LCD_STR_BAN	.DB	"RomWBW v", BIOSVER, 0
+LCD_STR_CFG	.DB	"Build: ", CONFIG, 0
+LCD_STR_IO	.DB	"Disk #", 0
+LCD_STR_XPU	.DB	" CPU",0
+LCD_STR_SPD	.DB	"12.345",0
+LCD_STR_MHZ	.DB	" MHz",0
+;
+LCD_CPU		.DW	LCD_CPU_Z80
+		.DW	LCD_CPU_Z180
+		.DW	LCD_CPU_Z180K
+		.DW	LCD_CPU_Z180N
+		.DW	LCD_CPU_Z280
+;
+LCD_CPU_Z80	.DB	"Z80",0
+LCD_CPU_Z180	.DB	"Z180-K",0
+LCD_CPU_Z180K	.DB	"Z180-N",0
+LCD_CPU_Z180N	.DB	"Z180",0
+LCD_CPU_Z280	.DB	"Z280",0
+
+	
diff --git a/Source/HBIOS/md.asm b/Source/HBIOS/md.asm
index 0d8b3378..5eba934a 100644
--- a/Source/HBIOS/md.asm
+++ b/Source/HBIOS/md.asm
@@ -301,13 +301,13 @@ MD_RW:
 MD_RW1:
 	PUSH	BC			; SAVE COUNTERS
 ;
-#IF (DSKYENABLE)
-  #IF (DSKYDSKACT)
+;;;#IF (DSKYENABLE)
+;;;  #IF (DSKYDSKACT)
 	LD	A,MD_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
-  #ENDIF
-#ENDIF
+;;;  #ENDIF
+;;;#ENDIF
 ;
 	LD	HL,(MD_RWFNADR)		; GET PENDING IO FUNCTION ADDRESS
 #IF (MDFFENABLE)
diff --git a/Source/HBIOS/ppa.asm b/Source/HBIOS/ppa.asm
index 0b6da099..a30aa08a 100644
--- a/Source/HBIOS/ppa.asm
+++ b/Source/HBIOS/ppa.asm
@@ -339,13 +339,13 @@ PPA_IO:
 ;
 	LD	(PPA_DSKBUF),HL		; SAVE DISK BUFFER ADDRESS
 ;
-#IF (DSKYENABLE)
-  #IF (DSKYDSKACT)
+;;;#IF (DSKYENABLE)
+;;;  #IF (DSKYDSKACT)
 	LD	A,PPA_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
-  #ENDIF
-#ENDIF
+;;;  #ENDIF
+;;;#ENDIF
 ;
 	; SETUP LBA
 	; 3 BYTES, LITTLE ENDIAN -> BIG ENDIAN
diff --git a/Source/HBIOS/ppide.asm b/Source/HBIOS/ppide.asm
index f7d7c6c7..28a3bb99 100644
--- a/Source/HBIOS/ppide.asm
+++ b/Source/HBIOS/ppide.asm
@@ -830,13 +830,13 @@ PPIDE_PKT_RDSEC:
 #ENDIF
 	; SETUP LBA
 ;
-#IF (DSKYENABLE)
-  #IF (DSKYDSKACT)
+;;;#IF (DSKYENABLE)
+;;;  #IF (DSKYDSKACT)
 	LD	A,PPIDE_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
-  #ENDIF
-#ENDIF
+;;;  #ENDIF
+;;;#ENDIF
 ;
 	; 3 BYTES, LITTLE ENDIAN -> BIG ENDIAN
 	LD	HL,PPIDE_PKTCMD_RW10+3	; START OF LBA FIELD IN CDB (MSB)
@@ -899,13 +899,13 @@ PPIDE_PKT_WRSEC:
 #ENDIF
 	; SETUP LBA
 ;
-#IF (DSKYENABLE)
-  #IF (DSKYDSKACT)
+;;;#IF (DSKYENABLE)
+;;;  #IF (DSKYDSKACT)
 	LD	A,PPIDE_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
-  #ENDIF
-#ENDIF
+;;;  #ENDIF
+;;;#ENDIF
 ;
 	; 3 BYTES, LITTLE ENDIAN -> BIG ENDIAN
 	LD	HL,PPIDE_PKTCMD_RW10+3	; START OF LBA FIELD IN CDB (MSB)
@@ -931,13 +931,13 @@ PPIDE_PKT_WRSEC:
 ;
 PPIDE_SETADDR:
 ;
-#IF (DSKYENABLE)
-  #IF (DSKYDSKACT)
+;;;#IF (DSKYENABLE)
+;;;  #IF (DSKYDSKACT)
 	LD	A,PPIDE_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
-  #ENDIF
-#ENDIF
+;;;  #ENDIF
+;;;#ENDIF
 	; SEND 3 LOWEST BYTES OF LBA IN REVERSE ORDER
 	; IDE_REG_LBA3 HAS ALREADY BEEN SET
 	; HSTLBA2-0 --> IDE_REG_LBA2-0
diff --git a/Source/HBIOS/ppp.asm b/Source/HBIOS/ppp.asm
index 9b1c1301..434b9e75 100644
--- a/Source/HBIOS/ppp.asm
+++ b/Source/HBIOS/ppp.asm
@@ -948,11 +948,11 @@ PPPSD_SENDBLK:
 
 	LD	A,PPPSD_LBA		; OFFSET OF LBA
 	CALL	LDHLIYA			; HL := IY + A, REG A TRASHED
-#IF (DSKYENABLE)
-  #IF (DSKYDSKACT)
+;;;#IF (DSKYENABLE)
+;;;  #IF (DSKYDSKACT)
 	CALL	HB_DSKACT		; SHOW ACTIVITY
-  #ENDIF
-#ENDIF
+;;;  #ENDIF
+;;;#ENDIF
 	LD	B,4
 PPPSD_SENDBLK1:
 	LD	A,(HL)
diff --git a/Source/HBIOS/prp.asm b/Source/HBIOS/prp.asm
index 6cc98ff2..fb987eb9 100644
--- a/Source/HBIOS/prp.asm
+++ b/Source/HBIOS/prp.asm
@@ -882,11 +882,11 @@ PRPSD_SETBLK:
 	LD	B,4			; 4 BYTES
 	LD	A,PRPSD_LBA		; OFFSET OF LBA
 	CALL	LDHLIYA			; HL := IY + A, REG A TRASHED
-#IF (DSKYENABLE)
-  #IF (DSKYDSKACT)
+;;;#IF (DSKYENABLE)
+;;;  #IF (DSKYDSKACT)
 	CALL	HB_DSKACT		; SHOW ACTIVITY
-  #ENDIF
-#ENDIF
+;;;  #ENDIF
+;;;#ENDIF
 	OTIR
 	RET
 ;
diff --git a/Source/HBIOS/rf.asm b/Source/HBIOS/rf.asm
index cd804074..6d80fc81 100644
--- a/Source/HBIOS/rf.asm
+++ b/Source/HBIOS/rf.asm
@@ -333,13 +333,13 @@ RF_SETIO:
 ;
 RF_SETADR:
 ;
-#IF (DSKYENABLE)
-  #IF (DSKYDSKACT)
+;;;#IF (DSKYENABLE)
+;;;  #IF (DSKYDSKACT)
 	LD	A,RF_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
-  #ENDIF
-#ENDIF
+;;;  #ENDIF
+;;;#ENDIF
 ;
 	LD	A,(RF_IO)		; OUTPUT THE LOGICAL BLOCK
 	OR	RF_AL			; ADDRESS TO THE
diff --git a/Source/HBIOS/sd.asm b/Source/HBIOS/sd.asm
index 134cdcb5..b00d969d 100644
--- a/Source/HBIOS/sd.asm
+++ b/Source/HBIOS/sd.asm
@@ -1497,11 +1497,11 @@ SD_SETADDR:
 	PUSH	AF			; SAVE IT
 	LD	A,SD_LBA		; OFFSET OF LBA VALUE
 	CALL	LDHLIYA			; HL := IY + A, REG A TRASHED
-#IF (DSKYENABLE)
-  #IF (DSKYDSKACT)
+;;;#IF (DSKYENABLE)
+;;;  #IF (DSKYDSKACT)
 	CALL	HB_DSKACT		; SHOW ACTIVITY
-  #ENDIF
-#ENDIF
+;;;  #ENDIF
+;;;#ENDIF
 	CALL	LD32			; LOAD IT TO DE:HL, AF IS TRASHED
 	POP	AF			; GET CARD TYPE BACK
 	CP	SD_TYPESDHC		; IS IT V2 OR BETTER?
diff --git a/Source/HBIOS/syq.asm b/Source/HBIOS/syq.asm
index a913ddf7..c107e4ea 100644
--- a/Source/HBIOS/syq.asm
+++ b/Source/HBIOS/syq.asm
@@ -417,11 +417,11 @@ SYQ_IO:
 	LD	(SYQ_DSKBUF),HL		; SAVE DISK BUFFER ADDRESS
 	LD	A,SYQ_LBA		; LBA OFFSET IN CONFIG
 	CALL	LDHLIYA			; POINT TO LBA DWORD
-#IF (DSKYENABLE)
-  #IF (DSKYDSKACT)
+;;;#IF (DSKYENABLE)
+;;;  #IF (DSKYDSKACT)
 	CALL	HB_DSKACT		; SHOW ACTIVITY
-  #ENDIF
-#ENDIF
+;;;  #ENDIF
+;;;#ENDIF
 	CALL	LD32			; SET DE:HL TO LBA
 ;
 	CALL	SYQ_CMDSETUP		; SETUP ATA COMMAND BUF
diff --git a/Source/ver.inc b/Source/ver.inc
index 67e21bfe..56ae7445 100644
--- a/Source/ver.inc
+++ b/Source/ver.inc
@@ -2,7 +2,7 @@
 #DEFINE	RMN	5
 #DEFINE	RUP	0
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.5.0-dev.73"
+#DEFINE BIOSVER	"3.5.0-dev.74"
 #define rmj	RMJ
 #define rmn	RMN
 #define rup	RUP
diff --git a/Source/ver.lib b/Source/ver.lib
index efeaa15a..f93ece95 100644
--- a/Source/ver.lib
+++ b/Source/ver.lib
@@ -3,5 +3,5 @@ rmn	equ	5
 rup	equ	0
 rtp	equ	0
 biosver	macro
-	db	"3.5.0-dev.73"
+	db	"3.5.0-dev.74"
 	endm
