Reintegrate wbw -> trunk

Source/Build.ps1

@@ -3,8 +3,8 @@ param([string]$Platform = "", [string]$Config = "", [string]$RomSize = "", [stri
 $Platform = $Platform.ToUpper()
 while ($true)
 {
-	if (($Platform -eq "N8VEM") -or ($Platform -eq "ZETA") -or ($Platform -eq "N8") -or ($Platform -eq "S2I") -or ($Platform -eq "S100")) {break}
-	$Platform = (Read-Host -prompt "Platform [N8VEM|ZETA|N8|S2I|S100]").Trim().ToUpper()
+	if (($Platform -eq "N8VEM") -or ($Platform -eq "ZETA") -or ($Platform -eq "N8") -or ($Platform -eq "MK4") -or ($Platform -eq "S2I") -or ($Platform -eq "S100")) {break}
+	$Platform = (Read-Host -prompt "Platform [N8VEM|ZETA|N8|MK4|S2I|S100]").Trim().ToUpper()
 }
 
 while ($true)
@@ -24,7 +24,7 @@ while ($true)
 	$RomSize = (Read-Host -prompt "ROM Size [512|1024]").Trim()
 }
 
-if ($Platform -eq "N8") {$CPUType = "180"} else {$CPUType = "80"}
+if (($Platform -eq "N8") -or ($Platform -eq "MK4")) {$CPUType = "180"} else {$CPUType = "80"}
 
 $SYS = $SYS.ToUpper()
 while ($true)
@@ -49,7 +49,7 @@ $env:TASMTABS = $TasmPath
 $env:PATH = $TasmPath + ';' + $CpmToolsPath + ';' + $env:PATH
 
 $OutDir = "../Output"
-$RomFmt = "rom${RomSize}KB"
+$RomFmt = "n8vem_rom${RomSize}"
 $BlankFile = "blank${RomSize}KB.dat"
 $RomDiskFile = "RomDisk.tmp"
 $RomFile = "${OutDir}/${RomName}.rom"
@@ -91,11 +91,7 @@ PLATFORM	.EQU		PLT_${Platform}		; HARDWARE PLATFORM
 ;
 ; INCLUDE PLATFORM SPECIFIC DEVICE DEFINITIONS
 ;
-#IF (PLATFORM == PLT_S100)
-  #INCLUDE "std-s100.inc"
-#ELSE
-  #INCLUDE "std-n8vem.inc"
-#ENDIF
+#INCLUDE "std-n8vem.inc"
 ;
 #INCLUDE "${ConfigFile}"
 ;
@@ -105,13 +101,22 @@ PLATFORM	.EQU		PLT_${Platform}		; HARDWARE PLATFORM
 
 if ($SYS -eq "CPM")
 {
-	Asm 'ccpb03' -Output 'cp.bin'
-	Asm 'bdosb01' -Output 'dos.bin'
+#	Asm 'ccpb03' -Output 'cp.bin'
+#	Asm 'bdosb01' -Output 'dos.bin'
+
+#	Copy-Item '..\cpm22\ccpb03.bin' 'cp.bin'
+#	Copy-Item '..\cpm22\bdosb01.bin' 'dos.bin'
+
+#	Copy-Item '..\cpm22\ccp22.bin' 'cp.bin'
+#	Copy-Item '..\cpm22\bdos22.bin' 'dos.bin'
+
+	Copy-Item '..\cpm22\os2ccp.bin' 'cp.bin'
+	Copy-Item '..\cpm22\os3bdos.bin' 'dos.bin'
 }
 if ($SYS -eq "ZSYS")
 {
-	Asm 'zcprw' -Architecture '85' -Output 'cp.bin'
-	Asm 'zsdos' -Output 'dos.bin'
+	Copy-Item '..\zcpr-dj\zcpr.bin' 'cp.bin'
+	Copy-Item '..\zsdos\zsdos.bin' 'dos.bin'
 }
 
 Asm 'syscfg'
@@ -132,8 +137,8 @@ Asm 'romfill'
 
 Concat 'cp.bin','dos.bin','cbios.bin' 'os.bin'
 Concat 'prefix.bin','os.bin' $SysImgFile
-Concat 'pgzero.bin','bootrom.bin','syscfg.bin','loader.bin','romfill.bin','dbgmon.bin','os.bin','hbfill.bin' 'rom0.bin'
-Concat 'pgzero.bin','bootrom.bin','syscfg.bin','loader.bin','hbios.bin' 'rom1.bin'
+Concat 'pgzero.bin','bootrom.bin','syscfg.bin','loader.bin','romfill.bin','dbgmon.bin','os.bin','hbfill.bin' 'rom1.bin'
+Concat 'pgzero.bin','bootrom.bin','syscfg.bin','loader.bin','hbios.bin' 'rom2.bin'
 Concat 'bootapp.bin','syscfg.bin','loader.bin','hbios.bin','dbgmon.bin','os.bin' $LoaderFile
 
 # Create the RomDisk image
@@ -143,10 +148,10 @@ Concat 'bootapp.bin','syscfg.bin','loader.bin','hbios.bin','dbgmon.bin','os.bin'
 Copy-Item $BlankFile $RomDiskFile
 cpmcp -f $RomFmt $RomDiskFile ../RomDsk/${SYS}_${RomSize}KB/*.* 0:
 cpmcp -f $RomFmt $RomDiskFile ../RomDsk/cfg_${Platform}_${Config}/*.* 0:
-cpmcp -f $RomFmt $RomDiskFile ../Apps/Output/*.* 0:
-cpmcp -f $RomFmt $RomDiskFile ../Output/${RomName}.sys 0:${SYS}.sys
+cpmcp -f $RomFmt $RomDiskFile ../Apps/*.com 0:
+cpmcp -f $RomFmt $RomDiskFile ${OutDir}/${RomName}.sys 0:${SYS}.sys
 
-Concat 'rom0.bin','rom1.bin',$RomDiskFile $RomFile
+Concat 'rom1.bin','rom2.bin',$RomDiskFile $RomFile
 
 # Cleanup
 Remove-Item $RomDiskFile

Source/BuildUNA.ps1

@@ -0,0 +1,156 @@
+param([string]$Config = "", [string]$RomSize = "", [string]$SYS = "", [string]$RomName = "")
+
+$Platform = "UNA"
+
+while ($true)
+{
+	$ConfigFile = "config_${Platform}_${Config}.asm"
+	if (Test-Path $ConfigFile) {break}
+	if ($Config -ne "") {Write-Host "${ConfigFile} does not exist!"}
+
+	"Configurations available:"
+	Get-Item "config_${Platform}_*.asm" | foreach {Write-Host " >", $_.Name.Substring(8 + $Platform.Length, $_.Name.Length - 12 - $Platform.Length)}
+	$Config = (Read-Host -prompt "Configuration").Trim()
+}
+
+while ($true)
+{
+	if (($RomSize -eq "512") -or ($RomSize -eq "1024")) {break}
+	$RomSize = (Read-Host -prompt "ROM Size [512|1024]").Trim()
+}
+
+if (($Platform -eq "N8") -or ($Platform -eq "MK4")) {$CPUType = "180"} else {$CPUType = "80"}
+
+$SYS = $SYS.ToUpper()
+while ($true)
+{
+	if (($SYS -eq "CPM") -or ($SYS -eq "ZSYS")) {break}
+	$SYS = (Read-Host -prompt "System [CPM|ZSYS]").Trim().ToUpper()
+}
+
+if ($RomName -eq "") {$RomName = "${Platform}_${Config}"}
+while ($RomName -eq "")
+{
+	$CP = (Read-Host -prompt "ROM Name [${Config}]").Trim()
+	if ($RomName -eq "") {$RomName = $Config}
+}
+
+$ErrorAction = 'Stop'
+
+$TasmPath = '..\tools\tasm32'
+$CpmToolsPath = '..\tools\cpmtools'
+
+$env:TASMTABS = $TasmPath
+$env:PATH = $TasmPath + ';' + $CpmToolsPath + ';' + $env:PATH
+
+$OutDir = "../OutputUNA"
+$RomFmt = "n8vem_rom${RomSize}"
+$BlankFile = "blank${RomSize}KB-UNA.dat"
+$RomDiskFile = "RomDisk.tmp"
+$RomFile = "${OutDir}/${RomName}.rom"
+$SysImgFile = "${OutDir}/${RomName}.sys"
+$LoaderFile = "${OutDir}/${RomName}.com"
+
+""
+"Building ${RomName}: ${ROMSize}KB ROM configuration ${Config} for Z${CPUType}..."
+""
+
+$TimeStamp = '"' + (Get-Date -Format 'dd-MMM-yyyy') + '"'
+
+Function Asm($Component, $Opt, $Architecture=$CPUType, $Output="${Component}.bin")
+{
+  $Cmd = "tasm -t${Architecture} -g3 ${Opt} ${Component}.asm ${Output}"
+  $Cmd | write-host
+  Invoke-Expression $Cmd | write-host
+  if ($LASTEXITCODE -gt 0) {throw "TASM returned exit code $LASTEXITCODE"}
+}
+
+Function Concat($InputFileList, $OutputFile)
+{
+	Set-Content $OutputFile -Value $null
+	foreach ($InputFile in $InputFileList)
+	{
+		Add-Content $OutputFile -Value ([System.IO.File]::ReadAllBytes($InputFile)) -Encoding byte
+	}
+}
+
+# Generate the build settings include file
+
+@"
+; RomWBW Configured for ${Platform} ${Config}, $(Get-Date -Format "s")
+;
+#DEFINE		TIMESTAMP	${TimeStamp}
+;
+ROMSIZE		.EQU		${ROMSize}			; SIZE OF ROM IN KB
+PLATFORM	.EQU		PLT_${Platform}		; HARDWARE PLATFORM
+;
+; INCLUDE PLATFORM SPECIFIC DEVICE DEFINITIONS
+;
+#INCLUDE "std-n8vem.inc"
+;
+#INCLUDE "${ConfigFile}"
+;
+"@ | Out-File "build.inc" -Encoding ASCII
+
+# Build components
+
+if ($SYS -eq "CPM")
+{
+#	Asm 'ccpb03' -Output 'cp.bin'
+#	Asm 'bdosb01' -Output 'dos.bin'
+
+#	Copy-Item '..\cpm22\ccpb03.bin' 'cp.bin'
+#	Copy-Item '..\cpm22\bdosb01.bin' 'dos.bin'
+
+#	Copy-Item '..\cpm22\ccp22.bin' 'cp.bin'
+#	Copy-Item '..\cpm22\bdos22.bin' 'dos.bin'
+
+	Copy-Item '..\cpm22\os2ccp.bin' 'cp.bin'
+	Copy-Item '..\cpm22\os3bdos.bin' 'dos.bin'
+}
+if ($SYS -eq "ZSYS")
+{
+	Copy-Item '..\zcpr-dj\zcpr.bin' 'cp.bin'
+	Copy-Item '..\zsdos\zsdos.bin' 'dos.bin'
+}
+
+Asm 'syscfg'
+Asm 'cbios' "-dBLD_SYS=SYS_${SYS}"
+Asm 'dbgmon'
+Asm 'prefix_una'
+Asm 'bootrom'
+Asm 'bootapp'
+Asm 'loader'
+Asm 'pgzero'
+Asm 'ubios'
+Asm 'hbfill'
+Asm 'romfill'
+
+# Generate result files using components above
+
+"Building ${RomName} output files..."
+
+Concat 'cp.bin','dos.bin','cbios.bin' 'os.bin'
+Concat 'prefix_una.bin','os.bin' $SysImgFile
+Concat 'pgzero.bin','bootrom.bin','syscfg.bin','loader.bin','romfill.bin','dbgmon.bin','os.bin','hbfill.bin' 'rom1.bin'
+Concat 'bootapp.bin','syscfg.bin','loader.bin','ubios.bin','dbgmon.bin','os.bin' $LoaderFile
+
+# Create the RomDisk image
+
+"Building ${RomSize}KB ${RomName} ROM disk data file..."
+
+Copy-Item $BlankFile $RomDiskFile
+cpmcp -f $RomFmt $RomDiskFile ../RomDsk/${SYS}_${RomSize}KB/*.* 0:
+cpmcp -f $RomFmt $RomDiskFile ../RomDsk/cfg_${Platform}_${Config}/*.* 0:
+cpmcp -f $RomFmt $RomDiskFile ../Apps/*.com 0:
+cpmcp -f $RomFmt $RomDiskFile ${OutDir}/${RomName}.sys 0:${SYS}.sys
+
+Concat '..\UNA\UNA-BIOS.BIN','rom1.bin','..\UNA\FSFAT.BIN',$RomDiskFile $RomFile
+
+# Save UNA distribution files
+
+Copy-Item 'rom1.bin' ${OutDir}\${SYS}WBW.bin
+Copy-Item $RomDiskFile ${OutDir}\${SYS}WBW_ROM${ROMSize}.bin
+
+# Cleanup
+Remove-Item $RomDiskFile

Source/BuildUNALOAD.ps1

@@ -0,0 +1,159 @@
+param([string]$Platform = "", [string]$Config = "", [string]$RomSize = "", [string]$SYS = "", [string]$RomName = "")
+
+$Platform = $Platform.ToUpper()
+while ($true)
+{
+	if (($Platform -eq "N8VEM") -or ($Platform -eq "ZETA") -or ($Platform -eq "N8") -or ($Platform -eq "MK4") -or ($Platform -eq "S2I") -or ($Platform -eq "S100")) {break}
+	$Platform = (Read-Host -prompt "Platform [N8VEM|ZETA|N8|MK4|S2I|S100]").Trim().ToUpper()
+}
+
+while ($true)
+{
+	$ConfigFile = "config_${Platform}_${Config}.asm"
+	if (Test-Path $ConfigFile) {break}
+	if ($Config -ne "") {Write-Host "${ConfigFile} does not exist!"}
+
+	"Configurations available:"
+	Get-Item "config_${Platform}_*.asm" | foreach {Write-Host " >", $_.Name.Substring(8 + $Platform.Length, $_.Name.Length - 12 - $Platform.Length)}
+	$Config = (Read-Host -prompt "Configuration").Trim()
+}
+
+while ($true)
+{
+	if (($RomSize -eq "512") -or ($RomSize -eq "1024")) {break}
+	$RomSize = (Read-Host -prompt "ROM Size [512|1024]").Trim()
+}
+
+if (($Platform -eq "N8") -or ($Platform -eq "MK4")) {$CPUType = "180"} else {$CPUType = "80"}
+
+$SYS = $SYS.ToUpper()
+while ($true)
+{
+	if (($SYS -eq "CPM") -or ($SYS -eq "ZSYS")) {break}
+	$SYS = (Read-Host -prompt "System [CPM|ZSYS]").Trim().ToUpper()
+}
+
+if ($RomName -eq "") {$RomName = "${Platform}_${Config}"}
+while ($RomName -eq "")
+{
+	$CP = (Read-Host -prompt "ROM Name [${Config}]").Trim()
+	if ($RomName -eq "") {$RomName = $Config}
+}
+
+$ErrorAction = 'Stop'
+
+$TasmPath = '..\tools\tasm32'
+$CpmToolsPath = '..\tools\cpmtools'
+
+$env:TASMTABS = $TasmPath
+$env:PATH = $TasmPath + ';' + $CpmToolsPath + ';' + $env:PATH
+
+$OutDir = "../OutputUNALOAD"
+$RomFmt = "n8vem_rom${RomSize}"
+$BlankFile = "blank${RomSize}KB-UNALOAD.dat"
+$RomDiskFile = "RomDisk.tmp"
+$RomFile = "${OutDir}/${RomName}.rom"
+$SysImgFile = "${OutDir}/${RomName}.sys"
+$LoaderFile = "${OutDir}/${RomName}.com"
+
+""
+"Building ${RomName}: ${ROMSize}KB ROM configuration ${Config} for Z${CPUType}..."
+""
+
+$TimeStamp = '"' + (Get-Date -Format 'dd-MMM-yyyy') + '"'
+
+Function Asm($Component, $Opt, $Architecture=$CPUType, $Output="${Component}.bin")
+{
+  $Cmd = "tasm -t${Architecture} -g3 ${Opt} ${Component}.asm ${Output}"
+  $Cmd | write-host
+  Invoke-Expression $Cmd | write-host
+  if ($LASTEXITCODE -gt 0) {throw "TASM returned exit code $LASTEXITCODE"}
+}
+
+Function Concat($InputFileList, $OutputFile)
+{
+	Set-Content $OutputFile -Value $null
+	foreach ($InputFile in $InputFileList)
+	{
+		Add-Content $OutputFile -Value ([System.IO.File]::ReadAllBytes($InputFile)) -Encoding byte
+	}
+}
+
+# Generate the build settings include file
+
+@"
+; RomWBW Configured for ${Platform} ${Config}, $(Get-Date -Format "s")
+;
+#DEFINE		TIMESTAMP	${TimeStamp}
+;
+#DEFINE		UNALOAD
+;
+ROMSIZE		.EQU		${ROMSize}			; SIZE OF ROM IN KB
+PLATFORM	.EQU		PLT_${Platform}		; HARDWARE PLATFORM
+;
+; INCLUDE PLATFORM SPECIFIC DEVICE DEFINITIONS
+;
+#INCLUDE "std-n8vem.inc"
+;
+#INCLUDE "${ConfigFile}"
+;
+"@ | Out-File "build.inc" -Encoding ASCII
+
+# Build components
+
+if ($SYS -eq "CPM")
+{
+#	Asm 'ccpb03' -Output 'cp.bin'
+#	Asm 'bdosb01' -Output 'dos.bin'
+
+#	Copy-Item '..\cpm22\ccpb03.bin' 'cp.bin'
+#	Copy-Item '..\cpm22\bdosb01.bin' 'dos.bin'
+
+#	Copy-Item '..\cpm22\ccp22.bin' 'cp.bin'
+#	Copy-Item '..\cpm22\bdos22.bin' 'dos.bin'
+
+	Copy-Item '..\cpm22\os2ccp.bin' 'cp.bin'
+	Copy-Item '..\cpm22\os3bdos.bin' 'dos.bin'
+}
+if ($SYS -eq "ZSYS")
+{
+	Copy-Item '..\zcpr-dj\zcpr.bin' 'cp.bin'
+	Copy-Item '..\zsdos\zsdos.bin' 'dos.bin'
+}
+
+Asm 'syscfg'
+Asm 'cbios' "-dBLD_SYS=SYS_${SYS}"
+Asm 'dbgmon'
+Asm 'prefix'
+Asm 'bootrom'
+Asm 'bootapp'
+Asm 'loader'
+Asm 'pgzero'
+Asm 'hbios'
+Asm 'hbfill'
+Asm 'romfill'
+
+# Generate result files using components above
+
+"Building ${RomName} output files..."
+
+Concat 'cp.bin','dos.bin','cbios.bin' 'os.bin'
+Concat 'prefix.bin','os.bin' $SysImgFile
+Concat 'pgzero.bin','bootrom.bin','syscfg.bin','loader.bin','romfill.bin','dbgmon.bin','os.bin','hbfill.bin' 'rom1.bin'
+Concat 'pgzero.bin','bootrom.bin','syscfg.bin','loader.bin','hbios.bin' 'rom2.bin'
+Concat 'bootapp.bin','syscfg.bin','loader.bin','hbios.bin','dbgmon.bin','os.bin' $LoaderFile
+
+# Create the RomDisk image
+
+"Building ${RomSize}KB ${RomName} ROM disk data file..."
+
+Copy-Item $BlankFile $RomDiskFile
+cpmcp -f $RomFmt $RomDiskFile ../RomDsk/${SYS}_${RomSize}KB/*.* 0:
+cpmcp -f $RomFmt $RomDiskFile ../RomDsk/cfg_${Platform}_${Config}/*.* 0:
+cpmcp -f $RomFmt $RomDiskFile ../Apps/*.com 0:
+cpmcp -f $RomFmt $RomDiskFile ${OutDir}/${RomName}.sys 0:${SYS}.sys
+
+Concat '..\UNA\unaboot.bin','..\UNA\unabios.bin','rom1.bin','..\UNA\unafat.bin','rom2.bin',$RomDiskFile $RomFile
+
+# Cleanup
+Remove-Item $RomDiskFile

Source/MakeBlankROM.ps1

@@ -1,4 +1,11 @@
 # Create a "dummy" rom image, filled with hex E5
 #
-Set-Content -Value ([byte[]](0xE5) * (512KB - 64KB)) -Encoding byte -Path 'blank512KB.dat'
-Set-Content -Value ([byte[]](0xE5) * (1MB - 64KB)) -Encoding byte -Path 'blank1024KB.dat'
+Set-Content -Value ([byte[]](0xE5) * (512KB - 64KB)) -Encoding byte -Path 'Blank512KB.dat'
+Set-Content -Value ([byte[]](0xE5) * (1MB - 64KB)) -Encoding byte -Path 'Blank1024KB.dat'
+
+Set-Content -Value ([byte[]](0xE5) * (512KB - 160KB)) -Encoding byte -Path 'Blank512KB-UNALOAD.dat'
+Set-Content -Value ([byte[]](0xE5) * (1MB - 160KB)) -Encoding byte -Path 'Blank1024KB-UNALOAD.dat'
+
+Set-Content -Value ([byte[]](0xE5) * (512KB - 128KB)) -Encoding byte -Path 'Blank512KB-UNA.dat'
+Set-Content -Value ([byte[]](0xE5) * (1MB - 128KB)) -Encoding byte -Path 'Blank1024KB-UNA.dat'
+

Source/ansi.asm

@@ -169,6 +169,7 @@ ANSI_INI:
 	LD	(ANSI_WRAP),A	; CLEAR WRAP FLAG
 	LD	(ANSI_LNM),A	; SET LINE FEED NEW LINE MODE
 	LD	(ANSI_CKM),A	; CLEAR DEC CURSOR KEY MODE
+	LD	(ANSI_COLM),A	; CLEAR 132 COLUMN MODE
 	LD	(ANSI_QLEN),A	; ZERO THE QUEUE LENGTH
 	LD	A,$FF		; SET ALL BITS OF ACCUM
 	LD	(ANSI_AWM),A	; SET DEC AUTOWRAP MODE
@@ -240,6 +241,8 @@ ANSI_STSTR:	; STATE == STRING DATA
 ANSI_C0DISP:
 	CP	$08		; BS: BACKSPACE
 	JP	Z,ANSI_BS
+	CP	$09		; HT: TAB
+	JP	Z,ANSI_HT
 	CP	$0A		; LF: LINEFEED
 	JP	Z,ANSI_LF
 	CP	$0B		; VT: VERTICAL TAB
@@ -532,9 +535,12 @@ ANSI_RENDER:
 	; IF WRAP PENDING, DO IT NOW
 	LD	A,(ANSI_WRAP)	; GET THE WRAP FLAG
 	OR	A		; SET FLAGS
+	JR	Z,ANSI_RENDER1	; IF Z, NO WRAP, CONTINUE
+	LD	A,(ANSI_AWM)	; GET AUTOWRAP MODE SETTING
+	OR	A		; SET FLAGS
 	CALL	NZ,ANSI_NEL	; IF SET, PERFORM A LINEWRAP (CLEARS WRAP FLAG)
 ;
-	; WRITE THE CHARACTER
+ANSI_RENDER1:	; WRITE THE CHARACTER
 	POP	DE		; RECOVER THE CHAR TO RENDER
 	LD	B,BF_VDAWRC	; FUNC := WRITE CHARACTER
 	CALL	EMU_VDADISP	; SPIT OUT THE RAW CHARACTER
@@ -608,22 +614,24 @@ ANSI_HT:	; HORIZONTAL TAB
 	; CHECK FOR RIGHT MARGIN, IF AT MARGIN, IGNORE
 	LD	A,(ANSI_COLS)	; GET SCREEN COLUMN COUNT
 	DEC	A		; MAKE IT MAX COL NUM
-	LD	B,A		; SAVE IN B
+	LD	E,A		; SAVE IN E
 	LD	A,(ANSI_COL)	; GET CURRENT COLUMN
-	CP	B		; COMPARE TO MAX
+	CP	E		; COMPARE TO MAX
 	RET	NC		; IF COL >= MAX, IGNORE
 ;
 	; INCREMENT COL TILL A TAB STOP IS HIT OR RIGHT MARGIN
 ANSI_HT1:
 	INC	A		; NEXT COLUMN
-	PUSH	AF		; SAVE COLUMN
-	PUSH	BC		; SAVE MAX COLUMN
+	LD	D,A		; SAVE COLUMN
+;	PUSH	AF		; SAVE COLUMN
+;	PUSH	BC		; SAVE MAX COLUMN
 	LD	HL,ANSI_TABS	; POINT TO TABSTOP BITMAP
 	CALL	BITTST		; TEST BIT FOR CURRENT COLUMN
-	POP	BC		; RECOVER MAX COLUMN
-	POP	AF		; RECOVER CUR COLUMN
+;	POP	BC		; RECOVER MAX COLUMN
+;	POP	AF		; RECOVER CUR COLUMN
+	LD	A,D		; RECOVER COLUMN
 	JR	NZ,ANSI_HT2	; IF TABSTOP HIT, COMMIT NEW COLUMN
-	CP	B		; TEST FOR RIGHT MARGIN
+	CP	E		; TEST FOR RIGHT MARGIN
 	JR	NC,ANSI_HT2	; IF AT RIGHT MARGIN, COMMIT NEW COLUMN
 	JR	ANSI_HT1	; LOOP UNTIL DONE
 ;
@@ -690,9 +698,13 @@ ANSI_MODE:	; (RE)SET MODES, FLAG VALUE IN C
 	LD	HL,ANSI_PARLST	; USE HL AS PARM POINTER
 	
 ANSI_MODE1:	; (RE)SET MODE LOOP
-	CALL	ANSI_MODE2
-	INC	HL
-	DJNZ	ANSI_MODE1
+	PUSH	BC		; SAVE LOOP COUNTER
+	PUSH	HL		; SAVE PARM INDEX
+	CALL	ANSI_MODE2	; DO THE WORK
+	POP	HL		; RESTORE PARM INDEX
+	POP	BC		; RESTORE LOOP COUNTER
+	INC	HL		; BUMP THE PARM INDEX
+	DJNZ	ANSI_MODE1	; LOOP THRU ALL PARMS
 
 ANSI_MODE2:	; (RE)SET MODE LOOP
 	LD	A,(ANSI_PRI)	; GET PRIVATE CHAR
@@ -713,6 +725,8 @@ ANSI_MODE4:	; DEC PRIVATE MODES
 	LD	A,(HL)		; GET PARM
 	CP	1		; DECCKM: DEC CURSOR KEY MODE
 	JR	Z,ANSI_MDDECCKM	; DO IT
+	CP	3		; DECCOLM: DEC COLUMN MODE
+	JR	Z,ANSI_MDDECCOLM	; DO IT
 	CP	7		; DECAWM: DEC AUTOWRAP MODE
 	JR	Z,ANSI_MDDECAWM	; DO IT
 	RET			; OTHERWISE IGNORE
@@ -727,6 +741,11 @@ ANSI_MDDECCKM:	; (RE)SET DEC CURSOR KEY MODE FLAG
 	LD	(ANSI_CKM),A	; SAVE IT
 	RET			; DONE
 ;
+ANSI_MDDECCOLM:	; (RE)SET DEC COLUMN MODE
+	LD	A,C		; GET THE VALUE
+	LD	(ANSI_COLM),A	; SAVE IT
+	JP	ANSI_FF		; CLEAR SCREEN
+;
 ANSI_MDDECAWM:	; (RE)SET DEC AUTOWRAP MODE
 	LD	A,C		; GET THE VALUE
 	LD	(ANSI_AWM),A	; SAVE IT
@@ -952,7 +971,7 @@ ANSI_EL4	.EQU	ANSI_ED4	; REUSE CODE ABOVE
 ;
 ;
 ;
-ANSI_IL:
+ANSI_IL:	; INSERT LINE
 	LD	A,(ANSI_PARLST)		; GET PARM
 	OR	A			; SET FLAGS
 	JR	NZ,ANSI_IL1		; GOT IT CONTINUE
@@ -1004,7 +1023,7 @@ ANSI_IL4:	;CLEAR INSERTED LINE
 ;
 ;
 ;
-ANSI_DL:
+ANSI_DL:	; DELETE LINE
 	LD	A,(ANSI_PARLST)		; GET PARM
 	OR	A			; SET FLAGS
 	JR	NZ,ANSI_DL1		; GOT IT CONTINUE
@@ -1323,6 +1342,7 @@ ANSI_WRAP	.DB	0		; WRAP PENDING FLAG
 ANSI_TABS	.FILL	32,0		; TAB STOP BIT MAP (256 BITS)
 ANSI_LNM	.DB	0		; LINE FEED NEW LINE MODE FLAG
 ANSI_CKM	.DB	0		; DEC CURSOR KEY MODE FLAG
+ANSI_COLM	.DB	0		; DEC 132 COLUMN MODE FLAG
 ANSI_AWM	.DB	0		; DEC AUTOWRAP MODE FLAG
 ANSI_QLEN	.DB	0		; INPUT QUEUE LENGTH
 ANSI_QPTR	.DW	0		; CURRENT QUEUE POINTER

Source/asci.asm

@@ -37,20 +37,23 @@ ASCI_INIT:
 	PRTS("ASCI0: IO=0x$")
 	LD	A,CPU_TDR0
 	CALL	PRTHEXBYTE
+
 	CALL	PC_COMMA
 	LD	A,CPU_RDR0
 	CALL	PRTHEXBYTE
-	PRTS(" BAUD=$")
-	LD	HL,ASCI0BAUD / 10
-	CALL	PRTDEC
-	PRTC('0')
+;	PRTS(" BAUD=$")
+;	LD	HL,ASCI0BAUD / 10
+;	CALL	PRTDEC
+;	PRTC('0')
 
+#IF (PLATFORM != PLT_MK4)
 	LD	A,66H
 	OUT0	(CPU_ASEXT0),A
 	LD	A,64H
 	OUT0	(CPU_CNTLA0),A
 	LD	A,Z180_CNTLB0
 	OUT0	(CPU_CNTLB0),A
+#ENDIF
 
 	; ASCI1
 	CALL	NEWLINE
@@ -60,17 +63,20 @@ ASCI_INIT:
 	CALL	PC_COMMA
 	LD	A,CPU_RDR1
 	CALL	PRTHEXBYTE
-	PRTS(" BAUD=$")
-	LD	HL,ASCI1BAUD / 10
-	CALL	PRTDEC
-	PRTC('0')
+;	PRTS(" BAUD=$")
+;	LD	HL,ASCI1BAUD / 10
+;	CALL	PRTDEC
+;	PRTC('0')
 
+#IF (PLATFORM != PLT_MK4)
 	LD	A,66H
 	OUT0	(CPU_ASEXT1),A
 	LD	A,64H
 	OUT0	(CPU_CNTLA1),A
 	LD	A,Z180_CNTLB1
 	OUT0	(CPU_CNTLB1),A
+#ENDIF
+
 	RET
 ;
 ;

Source/bootapp.asm

@@ -13,36 +13,52 @@
 ;
 	DI			; NO INTERRUPTS
 	IM	1		; INTERRUPT MODE 1
-	LD	SP,$FF00	; START WITH SP BELOW HBIOS PROXY LOCATION
-;
-;	LD	BC,0
-;XXX:
-;	DJNZ	XXX
-;	DEC	C
-;	JR	NZ,XXX
+	;LD	SP,STACK	; SP IN RAM
+	LD	SP,HBX_LOC	; SP IN RAM
 ;
 ; PERFORM MINIMAL Z180 SPECIFIC INITIALIZATION
 ;
-#IF (PLATFORM == PLT_N8)
+#IFNDEF UNALOAD
+;
+#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4))
 	; SET BASE FOR CPU IO REGISTERS
    	LD	A,CPU_BASE
 	OUT0	(CPU_ICR),A
 	
-	; SET CPU CLOCK DIV
-	LD	A,Z180_CLKDIV << 7
+	; SET DEFAULT CPU CLOCK MULTIPLIERS (XTAL / 2)
+	XOR	A
 	OUT0	(CPU_CCR),A
+	OUT0	(CPU_CMR),A
 	
-	; SET WAIT STATES
+	; SET DEFAULT WAIT STATES
+	LD	A,$F0
+	OUT0	(CPU_DCNTL),A
+
+#IF (Z180_CLKDIV >= 1)
+	; SET CLOCK DIVIDE TO 1 RESULTING IN FULL XTAL SPEED
+	LD	A,$80
+	OUT0	(CPU_CCR),A
+#ENDIF
+
+#IF (Z180_CLKDIV >= 2)
+	; SET CPU MULTIPLIER TO 1 RESULTING IN XTAL * 2 SPEED
+	LD	A,$80
+	OUT0	(CPU_CMR),A
+#ENDIF
+	; SET DESIRED WAIT STATES
 	LD	A,0 + (Z180_MEMWAIT << 6) | (Z180_IOWAIT << 4)
 	OUT0	(CPU_DCNTL),A
 
-	; MMU SETUP
-	LD	A,80H
-	OUT0	(CPU_CBAR),A		; SETUP FOR 32K/32K BANK CONFIG
-	XOR	A
-	OUT0	(CPU_BBR),A		; BANK BASE = 0
-	LD	A,(RAMSIZE - 64) >> 2
-	OUT0	(CPU_CBR),A		; COMMON BASE = LAST (TOP) BANK
+	; CANNOT CHANGE MMU SETUP DURING AN APP BASED BOOT
+	;; MMU SETUP
+	;LD	A,$80
+	;OUT0	(CPU_CBAR),A		; SETUP FOR 32K/32K BANK CONFIG
+	;LD	A,RAMBIAS >> 2
+	;OUT0	(CPU_BBR),A		; BANK BASE SET TO START OF RAM
+	;LD	A,(RAMSIZE + RAMBIAS - 64) >> 2
+	;OUT0	(CPU_CBR),A		; COMMON BASE = LAST (TOP) BANK
+#ENDIF
+;
 #ENDIF
 ;
 ; EMIT FIRST SIGN OF LIFE TO SERIAL PORT
@@ -52,23 +68,19 @@
 	CALL	XIO_OUTS	; SAY HELLO
 ;
 ; RELOCATE MONITOR/OS CODE FROM 8000H TO C000H
-;   - HBIOS PROXY AT $FF00 IS OVERLAID, BUT WE DON'T CARE
-;     ABOUT IT ANYMORE, IT WILL BE REFRESHED DURING HBIOS
-;     INIT LATER.
+; THIS INCLUDES OURSELVES (FOR PHASE 2) AND THE LOADER CODE
+; CAREFUL, WORKING STACK AREA IS WIPED OUT!!!
 ; 
-; NOTE: STACK IS WIPED OUT, STACK IS ASSUMED TO BE EMPTY HERE!!!!
-;
-	LD	HL,$8000	; COPY MEMORY FROM 8000
-	LD	DE,$C000	; TO C000
-	LD	BC,$4000	; COPY 16K
+	LD	HL,$8000	; COPY MEMORY FROM $8000
+	LD	DE,$C000	; TO $C000
+	LD	BC,$4000 - $400	; ALL BUT TOP 1K TO AVOID OVERLAYING PROXY
 	LDIR
 ;
 	CALL	XIO_DOT		; MARK PROGRESS
 ;
 ; COPY FIRST $1000 BYTES TO $8000 (UPPER, NON-BANKED MEMORY)
 ; THIS INCLUDES OURSELVES AND THE LOADER CODE
-;
-; RELOCATE BOOT PHASE 2 AND LOADER CODE FROM 0000H TO 8000H
+; STACK AREA IS WIPED OUT!!!
 ;
 	LD	HL,$0000	; COPY MEMORY FROM 0000
 	LD	DE,$8000	; TO 8000H
@@ -77,24 +89,36 @@
 ;
 	CALL	XIO_DOT		; MARK PROGRESS
 ;
+#IF (PLATFORM == PLT_UNA)
+	; IF RUNNING UNDER UNA, WE ARE DONE, PROCEED TO LOADER
+	JP	$8400		; JUMP TO LOADER
+#ELSE
+	; NON-UNA REQUIRES PHASE 2
 	JP	PHASE2		; JUMP TO PHASE 2 BOOT IN UPPER MEMORY
+#ENDIF
 ;
 STR_BOOT	.DB	"RomWBW$"
 ;
 ; IMBED DIRECT SERIAL I/O ROUTINES
 ;
 #INCLUDE "xio.asm"
+
 ;
 ;______________________________________________________________________________________________________________________
 ;
 ; THIS IS THE PHASE 2 CODE THAT MUST EXECUTE IN UPPER MEMORY
 ;
 	.ORG	$ + $8000	; WE ARE NOW EXECUTING IN UPPER MEMORY
+
+#IF (PLATFORM != PLT_UNA)
+
 ;
 PHASE2:
+	LD	SP,HBX_LOC	; MOVE SP TO HIMEM JUST BELOW HBIOS
+;
 	CALL	XIO_DOT		; MARK PROGRESS
 ;
-; COPY RAMPG0 TO RAMPG1
+; COPY NEW HBIOS IMAGE INTO TARGET RAM PAGE
 ;
 	LD	HL,0		; HL = LOCATION IN LOMEM TO COPY FROM/TO
 LOOP:
@@ -103,30 +127,36 @@ LOOP:
 	PUSH	BC		; SAVE COPY SIZE
 	PUSH	DE		; SAVE COPY DEST
 	PUSH	HL		; SAVE COPY SOURCE
-	LD	A,0		; SELECT PAGE 1
-	CALL	RAMPG		; OF ROM FOR COPY 
+	LD	A,BID_USR	; RAM PAGE WITH NEW HBIOS IMAGE
+	CALL	PGSEL		; SELECT IT
 	LDIR			; COPY ROM -> BUFFER
 	POP	DE		; RESTORE SOURCE AS NEW DESTINATION
 	POP	HL		; RESTORE DESTINATION AS NEW SOURCE
 	POP	BC		; RESTORE COPY SIZE
-	LD	A,1		; SELECT PAGE 1
-	CALL	RAMPG		; OF RAM FOR COPY
+	LD	A,BID_HB	; HBIOS RAM PAGE
+	CALL	PGSEL		; SELECT IT
 	LDIR			; COPY BUFFER -> RAM
 	EX	DE,HL		; GET LOMEM POINTER BACK TO HL
 	LD	A,H		; HIGH BYTE OF POINTER TO A
 	CP	$80		; HIGH BYTE WILL BE 80H WHEN WE ARE DONE
 	JP	NZ,LOOP		; IF NOT DONE, LOOP TO DO NEXT 4K CHUNK
 ;
+	LD	A,BID_USR	; RAM PAGE WITH NEW HBIOS IMAGE
+	CALL	PGSEL		; SELECT IT
 	CALL	XIO_DOT		; MARK PROGRESS
 ;
 ; INITIALIZE HBIOS AND JUMP TO LOADER
 ;
 	; CALL HBIOS HARDWARE INITIALIZATION
+	; CALL HBIOS HARDWARE INITIALIZATION
+	LD	A,BID_HB	; HBIOS RAM PAGE
+	CALL	PGSEL		; SELECT IT
 	CALL	$1000		; CALL HBIOS INITIALIZATION
 ;
 	; CALL HBIOS PROXY INITIALIZATION
-	CALL	RAMPGZ		; MAKE SURE RAM PAGE ZERO IS MAPPED TO LOWER 32K
-	CALL	$FF20		; CALL HBIOS PROXY INITIALIZATION
+	LD	A,BID_USR	; USER RAM PAGE
+	CALL	PGSEL		; SELECT IT
+	CALL	HBX_LOC		; CALL HBIOS PROXY INITIALIZATION
 ;
 	JP	$8400		; JUMP TO LOADER
 ;______________________________________________________________________________________________________________________
@@ -134,11 +164,15 @@ LOOP:
 ; NOTE THAT MEMORY MANAGER CODE IS IN UPPER MEMORY!
 ;
 #INCLUDE "memmgr.asm"
+;
+#ENDIF
+
 ;______________________________________________________________________________________________________________________
 ;
 ; PAD OUT REMAINDER OF PAGE
 ;
-	.ORG	$ - $8000	; ORG BACK TO LOWER MEMORY
-	.FILL	$0200 - $,$FF	; PAD OUT REMAINDER OF PAGE
+	.FILL	$8200 - $,$FF	; PAD OUT REMAINDER OF PAGE
+;
+STACK	.EQU	$		; STACK IN HIMEM SLACK SPACE
 ;
 	.END

Source/bootrom.asm

@@ -13,20 +13,40 @@
 ;
 	DI			; NO INTERRUPTS
 	IM	1		; INTERRUPT MODE 1
-	LD	SP,$FF00	; START WITH SP BELOW HBIOS PROXY LOCATION
+	;LD	SP,STACK	; SP IN RAM
+	LD	SP,HBX_LOC	; SP IN RAM
+;
 ;
 ; PERFORM MINIMAL Z180 SPECIFIC INITIALIZATION
 ;
-#IF (PLATFORM == PLT_N8)
+#IFNDEF UNALOAD
+;
+#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4))
 	; SET BASE FOR CPU IO REGISTERS
    	LD	A,CPU_BASE
 	OUT0	(CPU_ICR),A
 	
-	; SET CPU CLOCK DIV
-	LD	A,Z180_CLKDIV << 7
+	; SET DEFAULT CPU CLOCK MULTIPLIERS (XTAL / 2)
+	XOR	A
 	OUT0	(CPU_CCR),A
+	OUT0	(CPU_CMR),A
 	
-	; SET WAIT STATES
+	; SET DEFAULT WAIT STATES
+	LD	A,$F0
+	OUT0	(CPU_DCNTL),A
+
+#IF (Z180_CLKDIV >= 1)
+	; SET CLOCK DIVIDE TO 1 RESULTING IN FULL XTAL SPEED
+	LD	A,$80
+	OUT0	(CPU_CCR),A
+#ENDIF
+
+#IF (Z180_CLKDIV >= 2)
+	; SET CPU MULTIPLIER TO 1 RESULTINT IN XTAL * 2 SPEED
+	LD	A,$80
+	OUT0	(CPU_CMR),A
+#ENDIF
+	; SET DESIRED WAIT STATES
 	LD	A,0 + (Z180_MEMWAIT << 6) | (Z180_IOWAIT << 4)
 	OUT0	(CPU_DCNTL),A
 
@@ -35,27 +55,25 @@
 	OUT0	(CPU_CBAR),A		; SETUP FOR 32K/32K BANK CONFIG
 	XOR	A
 	OUT0	(CPU_BBR),A		; BANK BASE = 0
-	LD	A,(RAMSIZE - 64) >> 2
+	LD	A,(RAMSIZE + RAMBIAS - 64) >> 2
 	OUT0	(CPU_CBR),A		; COMMON BASE = LAST (TOP) BANK
 #ENDIF
 ;
+#ENDIF
+;
 ; EMIT FIRST SIGN OF LIFE TO SERIAL PORT
 ;
 	CALL	XIO_INIT	; INIT SERIAL PORT
 	LD	HL,STR_BOOT	; POINT TO MESSAGE
 	CALL	XIO_OUTS	; SAY HELLO
 ;
-; COPY ENTIRE CONTENTS OF ROM BANK 0 TO HI RAM
-; THIS INCLUDES OURSELVES AND THE LOADER CODE
-;   - HBIOS PROXY AT $FF00 IS OVERLAID, BUT WE DON'T CARE
-;     BECAUSE IT WILL BE REFRESHED DURING HBIOS
-;     INIT LATER.
+; COPY ENTIRE CONTENTS OF ROM BANK TO HI RAM
+; THIS INCLUDES OURSELVES (FOR PHASE 2) AND THE LOADER CODE
+; CAREFUL, WORKING STACK AREA IS WIPED OUT!!!
 ;
-; NOTE: STACK IS WIPED OUT, STACK IS ASSUMED TO BE EMPTY HERE!!!!
-;
-	LD	HL,$0000	; COPY MEMORY FROM LOMEM (0000H)
-	LD	DE,$8000	; TO HIMEM (8000H)
-	LD	BC,$8000	; COPY ENTIRE BANK, 8000H BYTES
+	LD	HL,0		; COPY FROM START OF ROM IMAGE
+	LD	DE,$8000	; TO HIMEM $8000
+	LD	BC,$8000 - $400	; ALL BUT TOP 1K TO AVOID OVERLAYING PROXY
 	LDIR
 ;
 	CALL	XIO_DOT		; MARK PROGRESS
@@ -77,7 +95,34 @@ STR_BOOT	.DB	"RomWBW$"
 PHASE2:
 	CALL	XIO_DOT		; MARK PROGRESS
 ;
-; COPY ROMPG1 TO RAMPG1
+#IF (PLATFORM == PLT_UNA)
+	; SWITCH TO EXEC PAGE IN BANKED MEMORY
+	LD	BC,$01FB	; SET BANK
+	LD	DE,$800E	; EXEC_PAGE (SEE PAGES.INC)
+	CALL	$FFFD		; DO IT
+;
+	; MARK PROGRESS VIA UNA CHAR OUTPUT
+	LD	BC,$0012	; UNA UNIT = 0, FUNC  WRITE CHAR
+	LD	E,'.'		; DOT
+	CALL	$FFFD		; CALL UNA ENTRY DIRECTLY, RST 08 NOT SETUP YET
+;
+	; INSTALL UNA INVOCATION VECTOR FOR RST 08
+	LD	A,$C3		; JP INSTRUCTION
+	LD	(8),A		; STORE AT 0x0008
+	LD	HL,($FFFE)	; UNA ENTRY VECTOR
+	LD	(9),HL		; STORE AT 0x0009
+;
+	LD	BC,$0012	; UNA UNIT = 0, FUNC = WRITE CHAR
+	LD	E,'.'		; DOT
+	RST	08		; RST 08 IS NOW POSSIBLE
+
+	; IF RUNNING UNDER UNA, WE ARE DONE, PROCEED TO LOADER
+	JP	$8400		; JUMP TO LOADER
+
+#ELSE
+
+;
+; COPY HBIOS IMAGE FROM ROM TO RAM
 ;
 	LD	HL,0		; HL = LOCATION IN LOMEM TO COPY FROM/TO
 LOOP:
@@ -86,30 +131,39 @@ LOOP:
 	PUSH	BC		; SAVE COPY SIZE
 	PUSH	DE		; SAVE COPY DEST
 	PUSH	HL		; SAVE COPY SOURCE
-	LD	A,1		; SELECT PAGE 1
-	CALL	ROMPG		; OF ROM FOR COPY 
+	LD	A,BID_HBIMG	; ROM PAGE WITH HBIOS IMAGE
+	CALL	PGSEL		; SELECT IT
 	LDIR			; COPY ROM -> BUFFER
 	POP	DE		; RESTORE SOURCE AS NEW DESTINATION
 	POP	HL		; RESTORE DESTINATION AS NEW SOURCE
 	POP	BC		; RESTORE COPY SIZE
-	LD	A,1		; SELECT PAGE 1
-	CALL	RAMPG		; OF RAM FOR COPY
+	LD	A,BID_HB	; HBIOS RAM PAGE
+	CALL	PGSEL		; SELECT IT
 	LDIR			; COPY BUFFER -> RAM
 	EX	DE,HL		; GET LOMEM POINTER BACK TO HL
 	LD	A,H		; HIGH BYTE OF POINTER TO A
 	CP	$80		; HIGH BYTE WILL BE $80 WHEN WE ARE DONE
 	JP	NZ,LOOP		; IF NOT DONE, LOOP TO DO NEXT 4K CHUNK
 ;
+	LD	A,BID_BOOT	; ROM PAGE WITH HBIOS IMAGE
+	CALL	PGSEL		; SELECT IT
 	CALL	XIO_DOT		; MARK PROGRESS
 ;
 ; INITIALIZE HBIOS AND JUMP TO LOADER
 ;
 	; CALL HBIOS HARDWARE INITIALIZATION
+	LD	A,BID_HB	; HBIOS RAM PAGE
+	CALL	PGSEL		; SELECT IT
 	CALL	$1000		; CALL HBIOS INITIALIZATION
+;
+	LD	A,BID_BOOT	; ROM PAGE WITH HBIOS IMAGE
+	CALL	PGSEL		; SELECT IT
+	CALL	XIO_DOT		; MARK PROGRESS
 ;
 	; CALL HBIOS PROXY INITIALIZATION
-	CALL	RAMPGZ		; MAKE SURE RAM PAGE ZERO IS MAPPED TO LOWER 32K
-	CALL	$FF20		; CALL HBIOS PROXY INITIALIZATION
+	LD	A,BID_USR	; USER RAM PAGE
+	CALL	PGSEL		; SELECT IT
+	CALL	HBX_LOC		; CALL HBIOS PROXY INITIALIZATION
 ;
 	JP	$8400		; JUMP TO LOADER
 ;______________________________________________________________________________________________________________________
@@ -117,11 +171,15 @@ LOOP:
 ; NOTE THAT MEMORY MANAGER CODE IS IN UPPER MEMORY!
 ;
 #INCLUDE "memmgr.asm"
+
+#ENDIF
+
 ;______________________________________________________________________________________________________________________
 ;
 ; PAD OUT REMAINDER OF PAGE
 ;
-	.ORG	$ - $8000	; ORG BACK TO LOWER MEMORY
-	.FILL	$200 - $,$FF	; PAD OUT REMAINDER OF PAGE
+	.FILL	$8200 - $,$FF	; PAD OUT REMAINDER OF PAGE
+;
+STACK	.EQU	$		; STACK IN HIMEM SLACK SPACE
 ;
 	.END

Source/config_mk4_diskio3.asm

@@ -0,0 +1,131 @@
+;
+;==================================================================================================
+;   ROMWBW 2.X CONFIGURATION FOR N8 2312
+;==================================================================================================
+;
+; BUILD CONFIGURATION OPTIONS
+;
+CPUFREQ		.EQU	20		; IN MHZ, USED TO COMPUTE DELAY FACTORS
+;
+BOOTCON		.EQU	CIODEV_ASCI	; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
+DEFCON		.EQU	CIODEV_ASCI	; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
+ALTCON		.EQU	DEFCON		; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
+CONBAUD		.EQU	38400		; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
+DEFVDA		.EQU	VDADEV_NONE	; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
+DEFEMU		.EQU	EMUTYP_TTY	; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
+TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
+;
+RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
+CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
+;
+DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
+;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
+UARTENABLE	.EQU	FALSE		; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
+UARTCNT		.EQU	0		; NUMBER OF UARTS
+;
+ASCIENABLE	.EQU	TRUE		; TRUE FOR Z180 ASCI SUPPORT
+ASCI0BAUD	.EQU	CONBAUD		; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
+ASCI1BAUD	.EQU	CONBAUD		; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
+;
+VDUENABLE	.EQU	FALSE		; TRUE FOR VDU BOARD SUPPORT
+CVDUENABLE	.EQU	FALSE		; TRUE FOR CVDU BOARD SUPPORT
+UPD7220ENABLE	.EQU	FALSE		; TRUE FOR uPD7220 BOARD SUPPORT
+N8VENABLE	.EQU	FALSE		; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
+;
+DEFIOBYTE	.EQU	$00		; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
+ALTIOBYTE	.EQU	DEFIOBYTE	; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
+WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
+DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
+;
+MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
+;
+FDENABLE	.EQU	TRUE		; TRUE FOR FLOPPY SUPPORT
+FDMODE		.EQU	FDMODE_DIO3	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
+FDTRACE		.EQU	1		; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
+FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
+FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
+FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
+;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
+IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
+IDEMODE		.EQU	IDEMODE_MK4	; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_MK4
+IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
+IDE8BIT		.EQU	TRUE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
+IDECAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
+;
+PPIDEENABLE	.EQU	TRUE		; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
+PPIDEIOB	.EQU	$20		; PPIDE IOBASE
+PPIDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
+PPIDE8BIT	.EQU	FALSE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
+PPIDECAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
+PPIDESLOW	.EQU	FALSE		; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
+;
+SDENABLE	.EQU	FALSE		; TRUE FOR SD SUPPORT
+SDMODE		.EQU	SDMODE_MK4	; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD, SDMODE_MK4
+SDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
+SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
+SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
+;
+PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
+PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
+PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
+PRPCONENABLE	.EQU	TRUE		; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
+;
+PPPENABLE	.EQU	FALSE		; TRUE FOR PARPORTPROP SUPPORT
+PPPSDENABLE	.EQU	TRUE		; TRUE FOR PARPORTPROP SD SUPPORT
+PPPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
+PPPSDCAPACITY	.EQU	64		; CAPACITY OF PPP SD DEVICE (IN MB)
+PPPCONENABLE	.EQU	TRUE		; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
+;
+HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
+HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
+HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
+;
+PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
+PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
+KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
+KBDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
+;
+TTYENABLE	.EQU	FALSE		; INCLUDE TTY EMULATION SUPPORT
+ANSIENABLE	.EQU	FALSE		; INCLUDE ANSI EMULATION SUPPORT
+ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
+;
+BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
+BOOT_TIMEOUT	.EQU	21		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
+BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; 18.432MHz XTAL @ FULL SPEED, 38.4Kbps
+;
+;Z180_CLKDIV	.EQU	1		; 0=XTAL/2, 1=XTAL, 2=XTAL*2
+;Z180_MEMWAIT	.EQU	1		; MEMORY WAIT STATES TO INSERT (0-3)
+;Z180_IOWAIT	.EQU	1		; IO WAIT STATES TO INSERT (0-3)
+;Z180_CNTLB0	.EQU	20H		; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
+;Z180_CNTLB1	.EQU	20H		; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
+;
+; 18.432MHz XTAL @ DOUBLE SPEED, 38.4Kbps
+;
+Z180_CLKDIV	.EQU	2		; 0=XTAL/2, 1=XTAL, 2=XTAL*2
+Z180_MEMWAIT	.EQU	1		; MEMORY WAIT STATES TO INSERT (0-3)
+Z180_IOWAIT	.EQU	3		; IO WAIT STATES TO INSERT (0-3)
+Z180_CNTLB0	.EQU	21H		; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
+Z180_CNTLB1	.EQU	21H		; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)			; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)			; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_FD,0,0,0)			; C: = FD0 = FLOPPY DISK UNIT 0
+#DEFCONT	DRVENT(DIODEV_FD,1,0,0)			; D: = FD1 = FLOPPY DISK UNIT 1
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,0,0)		; E: = PPIDE0:0 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,1,0)		; F: = PPIDE0:1 = SD UNIT 0, SLICE 0

Source/config_mk4_propio.asm

@@ -0,0 +1,131 @@
+;
+;==================================================================================================
+;   ROMWBW 2.X CONFIGURATION FOR N8 2312
+;==================================================================================================
+;
+; BUILD CONFIGURATION OPTIONS
+;
+CPUFREQ		.EQU	20		; IN MHZ, USED TO COMPUTE DELAY FACTORS
+;
+BOOTCON		.EQU	CIODEV_ASCI	; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
+DEFCON		.EQU	CIODEV_ASCI	; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
+ALTCON		.EQU	CIODEV_PRPCON	; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
+CONBAUD		.EQU	38400		; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
+DEFVDA		.EQU	VDADEV_NONE	; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
+DEFEMU		.EQU	EMUTYP_TTY	; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
+TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
+;
+RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
+CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
+;
+DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
+;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
+UARTENABLE	.EQU	FALSE		; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
+UARTCNT		.EQU	0		; NUMBER OF UARTS
+;
+ASCIENABLE	.EQU	TRUE		; TRUE FOR Z180 ASCI SUPPORT
+ASCI0BAUD	.EQU	CONBAUD		; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
+ASCI1BAUD	.EQU	CONBAUD		; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
+;
+VDUENABLE	.EQU	FALSE		; TRUE FOR VDU BOARD SUPPORT
+CVDUENABLE	.EQU	FALSE		; TRUE FOR CVDU BOARD SUPPORT
+UPD7220ENABLE	.EQU	FALSE		; TRUE FOR uPD7220 BOARD SUPPORT
+N8VENABLE	.EQU	FALSE		; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
+;
+DEFIOBYTE	.EQU	$00		; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
+ALTIOBYTE	.EQU	$01		; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
+WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
+DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
+;
+MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
+;
+FDENABLE	.EQU	FALSE		; TRUE FOR FLOPPY SUPPORT
+FDMODE		.EQU	FDMODE_N8	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
+FDTRACE		.EQU	1		; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
+FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
+FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
+FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
+;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
+IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
+IDEMODE		.EQU	IDEMODE_MK4	; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_MK4
+IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
+IDE8BIT		.EQU	TRUE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
+IDECAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
+;
+PPIDEENABLE	.EQU	FALSE		; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
+PPIDEIOB	.EQU	$60		; PPIDE IOBASE
+PPIDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
+PPIDE8BIT	.EQU	FALSE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
+PPIDECAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
+PPIDESLOW	.EQU	FALSE		; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
+;
+SDENABLE	.EQU	FALSE		; TRUE FOR SD SUPPORT
+SDMODE		.EQU	SDMODE_MK4	; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD, SDMODE_MK4
+SDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
+SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
+SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
+;
+PRPENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
+PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
+PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
+PRPCONENABLE	.EQU	TRUE		; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
+;
+PPPENABLE	.EQU	FALSE		; TRUE FOR PARPORTPROP SUPPORT
+PPPSDENABLE	.EQU	TRUE		; TRUE FOR PARPORTPROP SD SUPPORT
+PPPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
+PPPSDCAPACITY	.EQU	64		; CAPACITY OF PPP SD DEVICE (IN MB)
+PPPCONENABLE	.EQU	TRUE		; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
+;
+HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
+HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
+HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
+;
+PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
+PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
+KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
+KBDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
+;
+TTYENABLE	.EQU	FALSE		; INCLUDE TTY EMULATION SUPPORT
+ANSIENABLE	.EQU	FALSE		; INCLUDE ANSI EMULATION SUPPORT
+ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
+;
+BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
+BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
+BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; 18.432MHz XTAL @ FULL SPEED, 38.4Kbps
+;
+;Z180_CLKDIV	.EQU	1		; 0=XTAL/2, 1=XTAL, 2=XTAL*2
+;Z180_MEMWAIT	.EQU	1		; MEMORY WAIT STATES TO INSERT (0-3)
+;Z180_IOWAIT	.EQU	1		; IO WAIT STATES TO INSERT (0-3)
+;Z180_CNTLB0	.EQU	20H		; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
+;Z180_CNTLB1	.EQU	20H		; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
+;
+; 18.432MHz XTAL @ DOUBLE SPEED, 38.4Kbps
+;
+Z180_CLKDIV	.EQU	2		; 0=XTAL/2, 1=XTAL, 2=XTAL*2
+Z180_MEMWAIT	.EQU	1		; MEMORY WAIT STATES TO INSERT (0-3)
+Z180_IOWAIT	.EQU	1		; IO WAIT STATES TO INSERT (0-3)
+Z180_CNTLB0	.EQU	21H		; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
+Z180_CNTLB1	.EQU	21H		; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)			; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)			; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_PRPSD,0,0,0)		; C: = PRPSD0:0 = PRPSD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PRPSD,0,1,0)		; D: = PRPSD0:1 = PRPSD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PRPSD,0,2,0)		; E: = PRPSD0:2 = PRPSD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PRPSD,0,3,0)		; F: = PRPSD0:3 = PRPSD UNIT 0, SLICE 0

Source/config_mk4_std.asm

@@ -0,0 +1,131 @@
+;
+;==================================================================================================
+;   ROMWBW 2.X CONFIGURATION FOR N8 2312
+;==================================================================================================
+;
+; BUILD CONFIGURATION OPTIONS
+;
+CPUFREQ		.EQU	20		; IN MHZ, USED TO COMPUTE DELAY FACTORS
+;
+BOOTCON		.EQU	CIODEV_ASCI	; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
+DEFCON		.EQU	CIODEV_ASCI	; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
+ALTCON		.EQU	DEFCON		; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
+CONBAUD		.EQU	38400		; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
+DEFVDA		.EQU	VDADEV_NONE	; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
+DEFEMU		.EQU	EMUTYP_TTY	; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
+TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
+;
+RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
+CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
+;
+DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
+;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
+UARTENABLE	.EQU	FALSE		; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
+UARTCNT		.EQU	0		; NUMBER OF UARTS
+;
+ASCIENABLE	.EQU	TRUE		; TRUE FOR Z180 ASCI SUPPORT
+ASCI0BAUD	.EQU	CONBAUD		; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
+ASCI1BAUD	.EQU	CONBAUD		; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1)
+;
+VDUENABLE	.EQU	FALSE		; TRUE FOR VDU BOARD SUPPORT
+CVDUENABLE	.EQU	FALSE		; TRUE FOR CVDU BOARD SUPPORT
+UPD7220ENABLE	.EQU	FALSE		; TRUE FOR uPD7220 BOARD SUPPORT
+N8VENABLE	.EQU	FALSE		; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
+;
+DEFIOBYTE	.EQU	$00		; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
+ALTIOBYTE	.EQU	DEFIOBYTE	; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
+WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
+DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
+;
+MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
+;
+FDENABLE	.EQU	FALSE		; TRUE FOR FLOPPY SUPPORT
+FDMODE		.EQU	FDMODE_N8	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
+FDTRACE		.EQU	1		; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE)
+FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE)
+FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
+FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
+;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
+IDEENABLE	.EQU	TRUE		; TRUE FOR IDE SUPPORT
+IDEMODE		.EQU	IDEMODE_MK4	; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_MK4
+IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
+IDE8BIT		.EQU	TRUE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
+IDECAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
+;
+PPIDEENABLE	.EQU	FALSE		; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
+PPIDEIOB	.EQU	$60		; PPIDE IOBASE
+PPIDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
+PPIDE8BIT	.EQU	FALSE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
+PPIDECAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
+PPIDESLOW	.EQU	FALSE		; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
+;
+SDENABLE	.EQU	TRUE		; TRUE FOR SD SUPPORT
+SDMODE		.EQU	SDMODE_MK4	; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD, SDMODE_MK4
+SDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
+SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
+SDCSIOFAST	.EQU	TRUE		; TABLE-DRIVEN BIT INVERTER
+;
+PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
+PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
+PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
+PRPCONENABLE	.EQU	TRUE		; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
+;
+PPPENABLE	.EQU	FALSE		; TRUE FOR PARPORTPROP SUPPORT
+PPPSDENABLE	.EQU	TRUE		; TRUE FOR PARPORTPROP SD SUPPORT
+PPPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE)
+PPPSDCAPACITY	.EQU	64		; CAPACITY OF PPP SD DEVICE (IN MB)
+PPPCONENABLE	.EQU	TRUE		; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
+;
+HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
+HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
+HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
+;
+PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
+PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
+KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
+KBDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE)
+;
+TTYENABLE	.EQU	FALSE		; INCLUDE TTY EMULATION SUPPORT
+ANSIENABLE	.EQU	FALSE		; INCLUDE ANSI EMULATION SUPPORT
+ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
+;
+BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
+BOOT_TIMEOUT	.EQU	21		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
+BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; 18.432MHz XTAL @ FULL SPEED, 38.4Kbps
+;
+;Z180_CLKDIV	.EQU	1		; 0=XTAL/2, 1=XTAL, 2=XTAL*2
+;Z180_MEMWAIT	.EQU	1		; MEMORY WAIT STATES TO INSERT (0-3)
+;Z180_IOWAIT	.EQU	1		; IO WAIT STATES TO INSERT (0-3)
+;Z180_CNTLB0	.EQU	20H		; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
+;Z180_CNTLB1	.EQU	20H		; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
+;
+; 18.432MHz XTAL @ DOUBLE SPEED, 38.4Kbps
+;
+Z180_CLKDIV	.EQU	2		; 0=XTAL/2, 1=XTAL, 2=XTAL*2
+Z180_MEMWAIT	.EQU	1		; MEMORY WAIT STATES TO INSERT (0-3)
+Z180_IOWAIT	.EQU	1		; IO WAIT STATES TO INSERT (0-3)
+Z180_CNTLB0	.EQU	21H		; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
+Z180_CNTLB1	.EQU	21H		; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)		; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)		; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_SD,0,0,0)		; C: = SD0:0 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,1,0)		; D: = SD0:1 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_IDE,0,0,0)		; E: = IDE0:0 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_IDE,0,1,0)		; F: = IDE0:0 = SD UNIT 0, SLICE 0

Source/config_n8_2312.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	FALSE		; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
 UARTCNT		.EQU	0		; NUMBER OF UARTS
 ;
@@ -40,6 +41,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	TRUE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_N8	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -48,6 +50,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -68,6 +72,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	TRUE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -83,8 +88,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	TRUE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -98,8 +101,23 @@ BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTE
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
 ;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
 Z180_CLKDIV	.EQU	1		; 0=XTAL/2, 1=XTAL/1
 Z180_MEMWAIT	.EQU	0		; MEMORY WAIT STATES TO INSERT (0-3)
 Z180_IOWAIT	.EQU	3		; IO WAIT STATES TO INSERT (0-3)
 Z180_CNTLB0	.EQU	20H		; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
 Z180_CNTLB1	.EQU	20H		; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)		; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)		; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_FD,0,0,0)		; C: = FD0 = FLOPPY DISK UNIT 0
+#DEFCONT	DRVENT(DIODEV_FD,1,0,0)		; D: = FD1 = FLOPPY DISK UNIT 1
+#DEFCONT	DRVENT(DIODEV_SD,0,0,0)		; E: = SD0:0 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,1,0)		; F: = SD0:1 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,2,0)		; G: = SD0:2 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,3,0)		; H: = SD0:3 = SD UNIT 0, SLICE 0

Source/config_n8_2511.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	FALSE		; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
 UARTCNT		.EQU	0		; NUMBER OF UARTS
 ;
@@ -40,6 +41,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	TRUE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_N8	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -48,6 +50,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -68,6 +72,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -83,8 +88,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	TRUE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -98,8 +101,23 @@ BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTE
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
 ;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
 Z180_CLKDIV	.EQU	1		; 0=XTAL/2, 1=XTAL/1
 Z180_MEMWAIT	.EQU	0		; MEMORY WAIT STATES TO INSERT (0-3)
 Z180_IOWAIT	.EQU	3		; IO WAIT STATES TO INSERT (0-3)
 Z180_CNTLB0	.EQU	20H		; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT
 Z180_CNTLB1	.EQU	20H		; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)		; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)		; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_FD,0,0,0)		; C: = FD0 = FLOPPY DISK UNIT 0
+#DEFCONT	DRVENT(DIODEV_FD,1,0,0)		; D: = FD1 = FLOPPY DISK UNIT 1
+#DEFCONT	DRVENT(DIODEV_SD,0,0,0)		; E: = SD0:0 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,1,0)		; F: = SD0:1 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,2,0)		; G: = SD0:2 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,3,0)		; H: = SD0:3 = SD UNIT 0, SLICE 0

Source/config_n8vem_ci.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	2		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -48,6 +49,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	FALSE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_DIO	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -56,6 +58,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -76,6 +80,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -91,8 +96,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -105,3 +108,12 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)		; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)		; B: = MD0 = ROM DISK

Source/config_n8vem_cvdu.asm

@@ -8,8 +8,8 @@
 CPUFREQ		.EQU	8		; IN MHZ, USED TO COMPUTE DELAY FACTORS
 ;
 BOOTCON		.EQU	CIODEV_UART	; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
-DEFCON		.EQU	CIODEV_UART	; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
-ALTCON		.EQU	DEFCON		; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
+DEFCON		.EQU	CIODEV_CRT	; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
+ALTCON		.EQU	CIODEV_UART	; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
 CONBAUD		.EQU	38400		; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
 DEFVDA		.EQU	VDADEV_CVDU	; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
 DEFEMU		.EQU	EMUTYP_ANSI	; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
@@ -18,16 +18,17 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
 UART0BAUD	.EQU	CONBAUD		; UART0 BAUDRATE
 UART0FIFO	.EQU	TRUE		; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
-UART0AFC	.EQU	FALSE		; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
+UART0AFC	.EQU	TRUE		; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
 ;
 ASCIENABLE	.EQU	FALSE		; TRUE FOR Z180 ASCI SUPPORT
 ASCI0BAUD	.EQU	CONBAUD		; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0)
@@ -38,12 +39,13 @@ CVDUENABLE	.EQU	TRUE		; TRUE FOR CVDU BOARD SUPPORT
 UPD7220ENABLE	.EQU	FALSE		; TRUE FOR uPD7220 BOARD SUPPORT
 N8VENABLE	.EQU	FALSE		; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
 ;
-DEFIOBYTE	.EQU	$00		; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
-ALTIOBYTE	.EQU	DEFIOBYTE	; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
+DEFIOBYTE	.EQU	$01		; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
+ALTIOBYTE	.EQU	$00		; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
 WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	FALSE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_DIO	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,13 +54,15 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 IDE8BIT		.EQU	FALSE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
 IDECAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-PPIDEENABLE	.EQU	TRUE		; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
+PPIDEENABLE	.EQU	FALSE		; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
 PPIDEIOB	.EQU	$60		; PPIDE IOBASE
 PPIDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
 PPIDE8BIT	.EQU	FALSE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
@@ -72,6 +76,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -87,8 +92,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	TRUE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -98,6 +101,15 @@ TTYENABLE	.EQU	TRUE		; INCLUDE TTY EMULATION SUPPORT
 ANSIENABLE	.EQU	TRUE		; INCLUDE ANSI EMULATION SUPPORT
 ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
 ;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)		; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)		; B: = MD0 = ROM DISK

Source/config_n8vem_dide.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -44,6 +45,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	TRUE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_DIDE	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,6 +54,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	TRUE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIDE	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -72,6 +76,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -87,8 +92,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -98,6 +101,21 @@ TTYENABLE	.EQU	FALSE		; INCLUDE TTY EMULATION SUPPORT
 ANSIENABLE	.EQU	FALSE		; INCLUDE ANSI EMULATION SUPPORT
 ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE)
 ;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)			; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)			; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_FD,0,0,0)			; C: = FD0 = FLOPPY DISK UNIT 0
+#DEFCONT	DRVENT(DIODEV_FD,1,0,0)			; D: = FD1 = FLOPPY DISK UNIT 1
+#DEFCONT	DRVENT(DIODEV_IDE,0,0,0)		; E: = IDE0:0 = IDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_IDE,0,1,0)		; F: = IDE0:1 = IDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_IDE,0,2,0)		; G: = IDE0:2 = IDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_IDE,0,3,0)		; H: = IDE0:3 = IDE UNIT 0, SLICE 0

Source/config_n8vem_diskio.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -44,6 +45,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	TRUE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_DIO	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,6 +54,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	TRUE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -72,6 +76,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -87,8 +92,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -101,3 +104,18 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)			; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)			; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_FD,0,0,0)			; C: = FD0 = FLOPPY DISK UNIT 0
+#DEFCONT	DRVENT(DIODEV_FD,1,0,0)			; D: = FD1 = FLOPPY DISK UNIT 1
+#DEFCONT	DRVENT(DIODEV_IDE,0,0,0)		; E: = IDE0:0 = IDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_IDE,0,1,0)		; F: = IDE0:1 = IDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_IDE,0,2,0)		; G: = IDE0:2 = IDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_IDE,0,3,0)		; H: = IDE0:3 = IDE UNIT 0, SLICE 0

Source/config_n8vem_diskio3+cvdu.asm

@@ -8,8 +8,8 @@
 CPUFREQ		.EQU	8		; IN MHZ, USED TO COMPUTE DELAY FACTORS
 ;
 BOOTCON		.EQU	CIODEV_UART	; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
-DEFCON		.EQU	CIODEV_UART	; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
-ALTCON		.EQU	DEFCON		; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
+DEFCON		.EQU	CIODEV_CRT	; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
+ALTCON		.EQU	CIODEV_UART	; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
 CONBAUD		.EQU	38400		; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
 DEFVDA		.EQU	VDADEV_CVDU	; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
 DEFEMU		.EQU	EMUTYP_ANSI	; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -38,12 +39,13 @@ CVDUENABLE	.EQU	TRUE		; TRUE FOR CVDU BOARD SUPPORT
 UPD7220ENABLE	.EQU	FALSE		; TRUE FOR uPD7220 BOARD SUPPORT
 N8VENABLE	.EQU	FALSE		; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
 ;
-DEFIOBYTE	.EQU	$00		; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
-ALTIOBYTE	.EQU	DEFIOBYTE	; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
+DEFIOBYTE	.EQU	$01		; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
+ALTIOBYTE	.EQU	$00		; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
 WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	TRUE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_DIO3	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,6 +54,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -72,6 +76,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -87,8 +92,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	TRUE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -101,3 +104,18 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)			; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)			; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_FD,0,0,0)			; C: = FD0 = FLOPPY DISK UNIT 0
+#DEFCONT	DRVENT(DIODEV_FD,1,0,0)			; D: = FD1 = FLOPPY DISK UNIT 1
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,0,0)		; E: = PPIDE0:0 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,1,0)		; F: = PPIDE0:1 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,2,0)		; G: = PPIDE0:2 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,3,0)		; H: = PPIDE0:3 = PPIDE UNIT 0, SLICE 0

Source/config_n8vem_diskio3.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -44,6 +45,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	TRUE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_DIO3	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,6 +54,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -72,6 +76,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -87,8 +92,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -101,3 +104,18 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)			; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)			; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_FD,0,0,0)			; C: = FD0 = FLOPPY DISK UNIT 0
+#DEFCONT	DRVENT(DIODEV_FD,1,0,0)			; D: = FD1 = FLOPPY DISK UNIT 1
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,0,0)		; E: = PPIDE0:0 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,1,0)		; F: = PPIDE0:1 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,2,0)		; G: = PPIDE0:2 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,3,0)		; H: = PPIDE0:3 = PPIDE UNIT 0, SLICE 0

Source/config_n8vem_dsd.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -44,6 +45,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	FALSE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_DIO	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,6 +54,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -72,6 +76,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -87,8 +92,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -101,3 +104,18 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)		; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)		; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_FD,0,0,0)		; C: = FD0 = FLOPPY DISK UNIT 0
+#DEFCONT	DRVENT(DIODEV_FD,1,0,0)		; D: = FD1 = FLOPPY DISK UNIT 1
+#DEFCONT	DRVENT(DIODEV_SD,0,0,0)		; E: = SD0:0 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,1,0)		; F: = SD0:1 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,2,0)		; G: = SD0:2 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,3,0)		; H: = SD0:3 = SD UNIT 0, SLICE 0

Source/config_n8vem_mfp.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	2		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -48,6 +49,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	FALSE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_DIO	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -56,6 +58,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -76,6 +80,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -91,8 +96,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -105,3 +108,18 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)			; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)			; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_FD,0,0,0)			; C: = FD0 = FLOPPY DISK UNIT 0
+#DEFCONT	DRVENT(DIODEV_FD,1,0,0)			; D: = FD1 = FLOPPY DISK UNIT 1
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,0,0)		; E: = PPIDE0:0 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,1,0)		; F: = PPIDE0:1 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,2,0)		; G: = PPIDE0:2 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,3,0)		; H: = PPIDE0:3 = PPIDE UNIT 0, SLICE 0

Source/config_n8vem_ppide.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -44,6 +45,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	FALSE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_DIO	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,6 +54,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -72,6 +76,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -87,8 +92,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -101,3 +104,18 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)			; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)			; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_FD,0,0,0)			; C: = FD0 = FLOPPY DISK UNIT 0
+#DEFCONT	DRVENT(DIODEV_FD,1,0,0)			; D: = FD1 = FLOPPY DISK UNIT 1
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,0,0)		; E: = PPIDE0:0 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,1,0)		; F: = PPIDE0:1 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,2,0)		; G: = PPIDE0:2 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,3,0)		; H: = PPIDE0:3 = PPIDE UNIT 0, SLICE 0

Source/config_n8vem_ppisd.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -44,6 +45,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	FALSE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_DIO	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,6 +54,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -72,6 +76,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -87,8 +92,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -101,3 +104,18 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)		; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)		; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_FD,0,0,0)		; C: = FD0 = FLOPPY DISK UNIT 0
+#DEFCONT	DRVENT(DIODEV_FD,1,0,0)		; D: = FD1 = FLOPPY DISK UNIT 1
+#DEFCONT	DRVENT(DIODEV_SD,0,0,0)		; E: = SD0:0 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,1,0)		; F: = SD0:1 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,2,0)		; G: = SD0:2 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,3,0)		; H: = SD0:3 = SD UNIT 0, SLICE 0

Source/config_n8vem_propio.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -44,6 +45,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	FALSE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_DIO	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,6 +54,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -72,6 +76,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -87,8 +92,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -101,3 +104,16 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)		; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)		; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_PRPSD,0,0,0)		; C: = PRPSD0:0 = PRPSD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PRPSD,0,1,0)		; D: = PRPSD0:1 = PRPSD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PRPSD,0,2,0)		; E: = PRPSD0:2 = PRPSD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PRPSD,0,3,0)		; F: = PRPSD0:3 = PRPSD UNIT 0, SLICE 0

Source/config_n8vem_rf.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   ROMWBW 2.X CONFIGURATION FOR N8VEM SBC
+;   ROMWBW 2.X CONFIGURATION FOR SIMH EMULATOR
 ;==================================================================================================
 ;
 ; BUILD CONFIGURATION OPTIONS
@@ -16,12 +16,13 @@ DEFEMU		.EQU	EMUTYP_TTY	; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
 TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
-CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
-;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
+CLRRAMDISK	.EQU	CLR_ALWAYS	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -44,6 +45,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	FALSE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_DIO	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,6 +54,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	TRUE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -66,12 +70,13 @@ PPIDECAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 PPIDESLOW	.EQU	FALSE		; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
 ;
 SDENABLE	.EQU	FALSE		; TRUE FOR SD SUPPORT
-SDMODE		.EQU	SDMODE_JUHA	; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
+SDMODE		.EQU	SDMODE_NONE	; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
 SDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -83,12 +88,10 @@ PPPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABL
 PPPSDCAPACITY	.EQU	64		; CAPACITY OF PPP SD DEVICE (IN MB)
 PPPCONENABLE	.EQU	TRUE		; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
 ;
-HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
+HDSKENABLE	.EQU	FALSE		; TRUE FOR HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	TRUE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -101,3 +104,14 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)		; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)		; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_RF,0,0,0)		; C: = RF0
+#DEFCONT	DRVENT(DIODEV_RF,1,0,0)		; D: = RF1

Source/config_n8vem_simh.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_ALWAYS	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	TRUE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	FALSE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -44,6 +45,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	FALSE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_DIO	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,6 +54,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -72,6 +76,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -87,8 +92,6 @@ HDSKENABLE	.EQU	TRUE		; TRUE FOR HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -101,3 +104,20 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)			; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)			; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_HDSK,0,0,0)		; C: = HDSK0:0
+#DEFCONT	DRVENT(DIODEV_HDSK,0,1,0)		; D: = HDSK0:1
+#DEFCONT	DRVENT(DIODEV_HDSK,0,2,0)		; E: = HDSK0:2
+#DEFCONT	DRVENT(DIODEV_HDSK,0,3,0)		; F: = HDSK0:3
+#DEFCONT	DRVENT(DIODEV_HDSK,1,0,0)		; G: = HDSK1:0
+#DEFCONT	DRVENT(DIODEV_HDSK,1,1,0)		; H: = HDSK1:1
+#DEFCONT	DRVENT(DIODEV_HDSK,1,2,0)		; I: = HDSK1:2
+#DEFCONT	DRVENT(DIODEV_HDSK,1,3,0)		; J: = HDSK1:3

Source/config_n8vem_std.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -44,6 +45,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	FALSE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_DIO	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,6 +54,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -72,6 +76,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -87,8 +92,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -101,3 +104,12 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)		; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)		; B: = MD0 = ROM DISK

Source/config_n8vem_vdu.asm

@@ -8,8 +8,8 @@
 CPUFREQ		.EQU	8		; IN MHZ, USED TO COMPUTE DELAY FACTORS
 ;
 BOOTCON		.EQU	CIODEV_UART	; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM)
-DEFCON		.EQU	CIODEV_UART	; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
-ALTCON		.EQU	DEFCON		; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
+DEFCON		.EQU	CIODEV_CRT	; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON
+ALTCON		.EQU	CIODEV_UART	; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED)
 CONBAUD		.EQU	38400		; BAUDRATE FOR CONSOLE DURING HARDWARE INIT
 DEFVDA		.EQU	VDADEV_VDU	; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220)
 DEFEMU		.EQU	EMUTYP_ANSI	; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -38,12 +39,13 @@ CVDUENABLE	.EQU	FALSE		; TRUE FOR CVDU BOARD SUPPORT
 UPD7220ENABLE	.EQU	FALSE		; TRUE FOR uPD7220 BOARD SUPPORT
 N8VENABLE	.EQU	FALSE		; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
 ;
-DEFIOBYTE	.EQU	$00		; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
-ALTIOBYTE	.EQU	DEFIOBYTE	; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
+DEFIOBYTE	.EQU	$01		; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
+ALTIOBYTE	.EQU	$00		; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED)
 WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	FALSE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_DIO	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,6 +54,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -72,6 +76,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -87,8 +92,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	TRUE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -101,3 +104,18 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)			; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)			; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_FD,0,0,0)			; C: = FD0 = FLOPPY DISK UNIT 0
+#DEFCONT	DRVENT(DIODEV_FD,1,0,0)			; D: = FD1 = FLOPPY DISK UNIT 1
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,0,0)		; E: = PPIDE0:0 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,1,0)		; F: = PPIDE0:1 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,2,0)		; G: = PPIDE0:2 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,3,0)		; H: = PPIDE0:3 = PPIDE UNIT 0, SLICE 0

Source/config_una_std.asm

@@ -0,0 +1,22 @@
+;
+;==================================================================================================
+;   ROMWBW 2.X CONFIGURATION FOR UNA
+;==================================================================================================
+;
+; BUILD CONFIGURATION OPTIONS
+;
+CPUFREQ		.EQU	20		; IN MHZ, USED TO COMPUTE DELAY FACTORS
+;
+CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
+;
+DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
+;
+DEFIOBYTE	.EQU	$00		; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE)
+WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
+DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
+;
+BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
+BOOT_TIMEOUT	.EQU	21		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
+BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M

Source/config_zeta_ppisd.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -44,6 +45,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	TRUE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_ZETA	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,6 +54,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -72,6 +76,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -87,8 +92,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -101,3 +104,18 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)		; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)		; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_FD,0,0,0)		; C: = FD0 = FLOPPY DISK UNIT 0
+#DEFCONT	DRVENT(DIODEV_FD,1,0,0)		; D: = FD1 = FLOPPY DISK UNIT 1
+#DEFCONT	DRVENT(DIODEV_SD,0,0,0)		; E: = SD0:0 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,1,0)		; F: = SD0:1 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,2,0)		; G: = SD0:2 = SD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_SD,0,3,0)		; H: = SD0:3 = SD UNIT 0, SLICE 0

Source/config_zeta_ppp.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -44,6 +45,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	TRUE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_ZETA	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,6 +54,8 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
@@ -72,6 +76,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -87,8 +92,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -101,3 +104,18 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)			; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)			; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_FD,0,0,0)			; C: = FD0 = FLOPPY DISK UNIT 0
+#DEFCONT	DRVENT(DIODEV_FD,1,0,0)			; D: = FD1 = FLOPPY DISK UNIT 1
+#DEFCONT	DRVENT(DIODEV_PPPSD,0,0,0)		; E: = PPPSD0:0 = PPPSD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPPSD,0,1,0)		; F: = PPPSD0:1 = PPPSD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPPSD,0,2,0)		; G: = PPPSD0:2 = PPPSD UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPPSD,0,3,0)		; H: = PPPSD0:3 = PPPSD UNIT 0, SLICE 0

Source/config_zeta_std.asm

@@ -18,10 +18,11 @@ TERMTYPE	.EQU	TERM_ANSI	; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
 ;
-DSKMAP		.EQU	DM_RAM		; DM_ROM, DM_RAM, DM_FD, DM_IDE, DM_PPIDE, DM_SD, DM_PRPSD, DM_PPPSD, DM_HDSK
-;
 DSKYENABLE	.EQU	FALSE		; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
 ;
+SIMRTCENABLE	.EQU	FALSE		; SIMH CLOCK DRIVER
+DSRTCENABLE	.EQU	TRUE		; DS-1302 CLOCK DRIVER
+;
 UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
 UARTCNT		.EQU	1		; NUMBER OF UARTS
 UART0IOB	.EQU	$68		; UART0 IOBASE
@@ -44,6 +45,7 @@ WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
+MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
 ;
 FDENABLE	.EQU	TRUE		; TRUE FOR FLOPPY SUPPORT
 FDMODE		.EQU	FDMODE_ZETA	; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3
@@ -52,13 +54,15 @@ FDMEDIA		.EQU	FDM144		; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABL
 FDMEDIAALT	.EQU	FDM720		; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE)
 FDMAUTO		.EQU	TRUE		; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY
 ;
+RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
+;
 IDEENABLE	.EQU	FALSE		; TRUE FOR IDE SUPPORT
 IDEMODE		.EQU	IDEMODE_DIO	; IDEMODE_DIO, IDEMODE_DIDE
 IDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 IDE8BIT		.EQU	FALSE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
 IDECAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-PPIDEENABLE	.EQU	TRUE		; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
+PPIDEENABLE	.EQU	FALSE		; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
 PPIDEIOB	.EQU	$60		; PPIDE IOBASE
 PPIDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
 PPIDE8BIT	.EQU	FALSE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
@@ -72,6 +76,7 @@ SDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 SDCSIOFAST	.EQU	FALSE		; TABLE-DRIVEN BIT INVERTER
 ;
 PRPENABLE	.EQU	FALSE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
+PRPIOB		.EQU	$A8		; PORT IO ADDRESS BASE
 PRPSDENABLE	.EQU	TRUE		; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!)
 PRPSDTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
 PRPSDCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
@@ -87,8 +92,6 @@ HDSKENABLE	.EQU	FALSE		; TRUE FOR SIMH HDSK SUPPORT
 HDSKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
 HDSKCAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
-RFENABLE	.EQU	FALSE		; TRUE FOR RAM FLOPPY SUPPORT
-;
 PPKENABLE	.EQU	FALSE		; TRUE FOR PARALLEL PORT KEYBOARD
 PPKTRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE)
 KBDENABLE	.EQU	FALSE		; TRUE FOR PS/2 KEYBOARD ON I8242
@@ -101,3 +104,18 @@ ANSITRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL
 BOOTTYPE	.EQU	BT_MENU		; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS)
 BOOT_TIMEOUT	.EQU	20		; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
 BOOT_DEFAULT	.EQU	'R'		; SELECTION TO INVOKE AT TIMEOUT
+;
+#DEFINE		AUTOCMD	""		; AUTO STARTUP COMMAND FOR CP/M
+;
+; CPM DRIVE MAPPING TABLE, DRIVE LETTERS ARE ASSIGNED SEQUENTIALLY
+; DRVENT(DEVICE,UNIT,SLICE,DPH)
+;
+#DEFINE		DRVLST \
+#DEFCONT	DRVENT(DIODEV_MD,1,0,0)			; A: = MD1 = RAM DISK
+#DEFCONT	DRVENT(DIODEV_MD,0,0,0)			; B: = MD0 = ROM DISK
+#DEFCONT	DRVENT(DIODEV_FD,0,0,0)			; C: = FD0 = FLOPPY DISK UNIT 0
+#DEFCONT	DRVENT(DIODEV_FD,1,0,0)			; D: = FD1 = FLOPPY DISK UNIT 1
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,0,0)		; E: = PPIDE0:0 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,1,0)		; F: = PPIDE0:1 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,2,0)		; G: = PPIDE0:2 = PPIDE UNIT 0, SLICE 0
+#DEFCONT	DRVENT(DIODEV_PPIDE,0,3,0)		; H: = PPIDE0:3 = PPIDE UNIT 0, SLICE 0

Source/dbgmon.asm

@@ -97,8 +97,15 @@ DOBOOT:
 ;	XOR	A
 ;	OUT	(MPCL_ROM),A
 ;	OUT	(MPCL_RAM),A
-;#ENDIF	
-	CALL	ROMPGZ
+;#ENDIF
+#IF (PLATFORM == PLT_UNA)
+	LD	BC,$01FB		; UNA FUNC = SET BANK
+	LD	DE,$0000		; ROM BANK 0
+	CALL	$FFFD			; DO IT (RST 08 NOT SAFE HERE)
+#ELSE
+	LD	A,BID_BOOT
+	CALL	PGSEL
+#ENDIF
 	; JUMP TO RESTART ADDRESS
 	JP	0000H
 ;
@@ -562,10 +569,10 @@ UART_ENTRY:
 ; D XXXXH YYYYH  DUMP MEMORY FROM XXXX TO YYYY
 ; F XXXXH YYYYH ZZH FILL MEMORY FROM XXXX TO YYYY WITH ZZ
 ; H LOAD INTEL HEX FORMAT DATA
-; I INPUT FROM PORT AND SHOW HEX DATA
+; IXX INPUT FROM PORT XX AND SHOW HEX DATA
 ; K ECHO KEYBOARD INPUT
 ; M XXXXH YYYYH ZZZZH MOVE MEMORY BLOCK XXXX TO YYYY TO ZZZZ
-; O OUTPUT TO PORT HEX DATA
+; OXX YY OUTPUT TO PORT XX HEX DATA YY
 ; P XXXXH YYH PROGRAM RAM FROM XXXXH WITH VALUE IN YYH, WILL PROMPT FOR NEXT LINES FOLLOWING UNTIL CR
 ; R RUN A PROGRAM FROM CURRENT LOCATION
 ;
@@ -602,7 +609,7 @@ SERIALCMDLOOP:
 	CP	'M'			; IS IT A "M" (Y/N)
 	JP	Z,MOVE			; MOVE MEMORY COMMAND
 	CP	'F'			; IS IT A "F" (Y/N)
-	JP	Z,FILL			; FILL MEMORY COMMAND
+	JP	Z,FILLMEM		; FILL MEMORY COMMAND
 	LD	HL,TXT_COMMAND		; POINT AT ERROR TEXT
 	CALL	MSG			; PRINT COMMAND LABEL
 
@@ -1162,12 +1169,12 @@ MOVE_LOOP:
 	JP	NZ,MOVE_LOOP		; TIL COUNT=0
 	RET				;
                
-;__FILL_______________________________________________________________________
+;__FILLMEM____________________________________________________________________
 ;
 ;	FILL MEMORY, USER OPTION "M"
 ;_____________________________________________________________________________
 ;
-FILL:
+FILLMEM:
 	LD	C,03			;
 					; START GETNM REPLACEMENT
 					; GET FILL STARTING MEMORY LOCATION
@@ -1237,28 +1244,6 @@ GOCPM:
 
 	JP	CPM_ENT
 ;
-;__FILL_MEM___________________________________________________________________
-;
-;	FUNCTION	: FILL MEMORY WITH A VALUE
-;	INPUT		: HL = START ADDRESS BLOCK
-;			: BC = LENGTH OF BLOCK
-;			: A = VALUE TO FILL WITH
-;	USES		: DE, BC
-;	OUTPUT		:
-;	CALLS		: 
-;	TESTED		: 13 FEB 2007
-;_____________________________________________________________________________
-;
-FILL_MEM:
-	LD	E,L			;
-	LD	D,H			;
-	INC	DE			;
-	LD	(HL),A			; INITIALISE FIRST BYTE OF BLOCK WITH DATA BYTE IN A
-	DEC	BC			;
-	LDIR				; FILL MEMORY
-	RET				; RETURN TO CALLER
-
-;
 ;__INITIALIZE_________________________________________________________________
 ;
 ;	INITIALIZE SYSTEM
@@ -1271,7 +1256,7 @@ INITIALIZE:
 
 ;__MTERM_INIT_________________________________________________________________
 ;
-;  SETUP 8255, MODE 0, PORT A=OUT, PORT B=IN, PORT C=OUT/OUT 
+;  SETUP 8255, MODE 0, PORT A=OUT, PORT B=IN, PORT C=OUT/OUT
 ;     
 ;_____________________________________________________________________________
 MTERM_INIT:

Source/diskdefs

@@ -266,16 +266,17 @@ diskdef interak
   sectrk 20
   blocksize 4096
   maxdir 256
-  skew 0
+  skew 1
   boottrk 2
   os 2.2
 end
 
-# For 512KB ROM, less 64K reserved for system
-diskdef rom512KB
-  seclen 128
-  tracks 14
-  sectrk 256
+# For 512KB ROM, less 96K reserved for system
+
+diskdef n8vem_rom512
+  seclen 512
+  tracks 13
+  sectrk 64
   blocksize 2048
   maxdir 256
   skew 0
@@ -283,14 +284,15 @@ diskdef rom512KB
   os 2.2
 end
 
-# For 1024KB ROM, less 64K reserved for system
-diskdef rom1024KB
-  seclen 128
-  tracks 30
-  sectrk 256
+# For 1024KB ROM, less 96K reserved for system
+
+diskdef n8vem_rom1024
+  seclen 512
+  tracks 29
+  sectrk 64
   blocksize 2048
   maxdir 256
-  skew 1
+  skew 0
   boottrk 0
   os 2.2
 end

Source/dsrtc.asm

@@ -0,0 +1,264 @@
+;
+;==================================================================================================
+; DALLAS SEMICONDUCTOR DS1302 RTC DRIVER
+;==================================================================================================
+;
+; CONSTANTS
+;
+DSRTC_BASE	.EQU	RTC		; RTC PORT ON ALL N8VEM SERIES Z80 PLATFORMS
+;
+DSRTC_DATA	.EQU	%10000000	; BIT 7 CONTROLS RTC DATA (I/O) LINE
+DSRTC_CLK	.EQU	%01000000	; BIT 6 CONTROLS RTC CLOCK LINE, 1 = HIGH
+DSRTC_RD	.EQU	%00100000	; BIT 5 CONTROLS DATA DIRECTION, 1 = READ
+DSRTC_CE	.EQU	%00010000	; BIT 4 CONTROLS RTC CE LINE, 1 = HIGH (ENABLED)
+;
+DSRTC_BUFSIZ	.EQU	7		; 7 BYTE BUFFER (YYMMDDHHMMSSWW)
+;
+; RTC DEVICE INITIALIZATION ENTRY
+;
+DSRTC_INIT:
+	PRTS("DSRTC: $")
+;
+	; CHECK FOR CLOCK HALTED
+	CALL	DSRTC_TSTCLK
+	JR	Z,DSRTC_INIT1
+	PRTS("INIT CLOCK $")
+	LD	HL,DSRTC_TIMDEF
+	CALL	DSRTC_SETTIM
+;
+DSRTC_INIT1:
+	; DISPLAY CURRENT TIME
+	LD	HL,DSRTC_TIMBUF
+	PUSH	HL
+	CALL	DSRTC_GETTIM
+	POP	HL
+	CALL	PRTDT
+;
+	XOR	A	; SIGNAL SUCCESS
+	RET
+;
+; RTC DEVICE FUNCTION DISPATCH ENTRY
+;   A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
+;   B: FUNCTION (IN)
+;
+DSRTC_DISPATCH:
+	LD	A,B		; GET REQUESTED FUNCTION
+	AND	$0F		; ISOLATE SUB-FUNCTION
+	JP	Z,DSRTC_GETTIM	; GET TIME
+	DEC	A
+	JP	Z,DSRTC_SETTIM	; SET TIME
+	DEC	A
+	JP	Z,DSRTC_GETBYT	; GET NVRAM BYTE VALUE
+	DEC	A
+	JP	Z,DSRTC_SETBYT	; SET NVRAM BYTE VALUE
+	DEC	A
+	JP	Z,DSRTC_GETBLK	; GET NVRAM DATA BLOCK VALUES
+	DEC	A
+	JP	Z,DSRTC_SETBLK	; SET NVRAM DATA BLOCK VALUES 
+	CALL	PANIC
+;
+; NVRAM FUNCTIONS ARE NOT AVAILABLE IN SIMULATOR
+;
+DSRTC_GETBYT:
+DSRTC_SETBYT:
+DSRTC_GETBLK:
+DSRTC_SETBLK:
+	CALL	PANIC
+;
+; RTC GET TIME
+;   A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
+;   HL: DATE/TIME BUFFER (OUT)
+; BUFFER FORMAT IS BCD: YYMMDDHHMMSS
+; 24 HOUR TIME FORMAT IS ASSUMED
+;
+DSRTC_GETTIM:
+;
+	; READ THE CLOCK
+	PUSH	HL			; SAVE ADR OF OUTPUT BUF
+	LD	HL,DSRTC_BUF		; USE WORK BUF TO READ CLOCK
+	CALL	DSRTC_RDCLK		; READ THE CLOCK
+;
+	; TRANSLATE FROM TEMP BUF TO OUTPUT BUF
+	POP	HL			; RESTORE THE OUTPUT BUF ADR
+	LD	A,(DSRTC_YR)
+	LD	(HL),A
+	INC	HL
+	LD	A,(DSRTC_MON)
+	LD	(HL),A
+	INC	HL
+	LD	A,(DSRTC_DT)
+	LD	(HL),A
+	INC	HL
+	LD	A,(DSRTC_HR)
+	LD	(HL),A
+	INC	HL
+	LD	A,(DSRTC_MIN)
+	LD	(HL),A
+	INC	HL
+	LD	A,(DSRTC_SEC)
+	LD	(HL),A
+;
+	; CLEAN UP AND RETURN
+	XOR	A			; SIGNAL SUCCESS
+	RET				; AND RETURN
+;
+; RTC SET TIME
+;   A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
+;   HL: DATE/TIME BUFFER (IN)
+; BUFFER FORMAT IS BCD: YYMMDDHHMMSS
+; 24 HOUR TIME FORMAT IS ASSUMED
+;
+DSRTC_SETTIM:
+;
+	; TRANSLATE FROM INPUT BUF TO WORK BUF
+	LD	A,(HL)
+	LD	(DSRTC_YR),A
+	INC	HL
+	LD	A,(HL)
+	LD	(DSRTC_MON),A
+	INC	HL
+	LD	A,(HL)
+	LD	(DSRTC_DT),A
+	INC	HL
+	LD	A,(HL)
+	LD	(DSRTC_HR),A
+	INC	HL
+	LD	A,(HL)
+	LD	(DSRTC_MIN),A
+	INC	HL
+	LD	A,(HL)
+	LD	(DSRTC_SEC),A
+	XOR	A			; FIX: DERIVE DAY OF WEEK!!!
+	LD	(DSRTC_DAY),A
+;
+	; WRITE TO CLOCK
+	LD	HL,DSRTC_BUF		; POINT TO WORK BUF
+	CALL	DSRTC_WRCLK		; SEND IT TO RTC
+;
+	; CLEAN UP AND RETURN
+	XOR	A			; SIGNAL SUCCESS
+	RET				; AND RETURN
+;
+; TEST CLOCK FOR VALID DATA
+;   READ CLOCK HALT BIT AND RETURN ZF BASED ON BIT VALUE
+;   0 = RUNNING
+;   1 = HALTED
+;
+DSRTC_TSTCLK:
+	LD	C,$81			; SECONDS REGISTER HAS CLOCK HALT FLAG
+	CALL	DSRTC_CMD		; SEND THE COMMAND
+	CALL	DSRTC_GET		; READ THE REGISTER
+	AND	%10000000		; HIGH ORDER BIT IS CLOCK HALT
+	RET
+;
+; BURST READ CLOCK DATA INTO BUFFER AT HL
+;
+DSRTC_RDCLK:
+	LD	C,$BF			; COMMAND = $BF TO BURST READ CLOCK
+	CALL	DSRTC_CMD		; SEND COMMAND TO RTC
+	LD	B,DSRTC_BUFSIZ		; B IS LOOP COUNTER
+DSRTC_RDCLK1:
+	PUSH	BC			; PRESERVE BC
+	CALL	DSRTC_GET		; GET NEXT BYTE
+	LD	(HL),A			; SAVE IN BUFFER
+	INC	HL			; INC BUF POINTER
+	POP	BC			; RESTORE BC
+	DJNZ	DSRTC_RDCLK1		; LOOP IF NOT DONE
+	XOR	A			; ALL LINES OFF TO CLEAN UP
+	OUT	(DSRTC_BASE),A		; WRITE TO RTC PORT
+	RET
+;
+; BURST WRITE CLOCK DATA FROM BUFFER AT HL
+;
+DSRTC_WRCLK:
+	LD	C,$8E			; COMMAND = $8E TO WRITE CONTROL REGISTER
+	CALL	DSRTC_CMD		; SEND COMMAND
+	XOR	A			; $00 = UNPROTECT
+	CALL	DSRTC_PUT		; SEND VALUE TO CONTROL REGISTER
+;
+	LD	C,$BE			; COMMAND = $BE TO BURST WRITE CLOCK
+	CALL	DSRTC_CMD		; SEND COMMAND TO RTC
+	LD	B,DSRTC_BUFSIZ		; B IS LOOP COUNTER
+DSRTC_WRCLK1:
+	PUSH	BC			; PRESERVE BC
+	LD	A,(HL)			; GET NEXT BYTE TO WRITE
+	CALL	DSRTC_PUT		; PUT NEXT BYTE
+	INC	HL			; INC BUF POINTER
+	POP	BC			; RESTORE BC
+	DJNZ	DSRTC_WRCLK1		; LOOP IF NOT DONE
+	LD	A,$80			; ADD CONTROL REG BYTE, $80 = PROTECT ON
+	CALL	DSRTC_PUT		; WRITE REQUIRED 8TH BYTE
+	XOR	A			; ALL LINES OFF TO CLEAN UP
+	OUT	(DSRTC_BASE),A		; WRITE TO RTC PORT
+	RET
+;
+; SEND COMMAND IN C TO RTC
+;
+DSRTC_CMD:
+	LD	A,DSRTC_RD		; CE LOW TO RESET RTC
+	OUT	(DSRTC_BASE),A		; WRITE IT
+	LD	A,C			; LOAD COMMAND
+	CALL	DSRTC_PUT		; WRITE IT
+	RET
+;
+; WRITE BYTE IN A TO THE RTC
+;
+DSRTC_PUT:
+	LD	B,8			; LOOP FOR 8 BITS
+DSRTC_PUT1:
+	RRCA				; ROTATE NEXT BIT TO SEND INTO BIT 7
+	LD	C,A			; SAVE WORKING VALUE
+	AND	%10000000		; ISOLATE THE DATA BIT
+	OR	DSRTC_CE		; ADD CHIP ENABLE, CLOCK HIGH
+	OUT	(DSRTC_BASE),A		; WRITE TO PORT WITH CLOCK LOW
+	XOR	DSRTC_CLK		; TURN CLOCK BACK ON
+	OUT	(DSRTC_BASE),A		; WRITE TO PORT WITH CLOCK HIGH
+	LD	A,C			; RECOVER WORKING VALUE
+	DJNZ	DSRTC_PUT1		; LOOP IF NOT DONE
+	RET
+;
+; READ BYTE FROM RTC, RETURN VALUE IN A
+;
+DSRTC_GET:
+	LD	C,0			; INITIALIZE WORKING VALUE TO 0
+	LD	B,8			; LOOP FOR 8 BITS
+DSRTC_GET1:
+	LD	A,DSRTC_RD+DSRTC_CE	; LOWER CLOCK, CE STAYS HI, READ IS ON
+	OUT	(DSRTC_BASE),A		; WRITE TO RTC PORT
+	NOP				; SETTLE
+	IN	A,(DSRTC_BASE)		; READ THE RTC PORT
+	AND	%00000001		; ISOLATE THE DATA BIT
+	OR	C			; COMBINE WITH WORKING VALUE
+	RRCA				; ROTATE FOR NEXT BIT
+	LD	C,A			; SAVE WORKING VALUE
+	LD	A,DSRTC_CLK+DSRTC_RD+DSRTC_CE	; CLOCK BACK TO HIGH NOW
+	OUT	(DSRTC_BASE),A		; WRITE TO RTC PORT
+	DJNZ	DSRTC_GET1		; LOOP IF NOT DONE
+	LD	A,C			; GET RESULT INTO A
+	RET
+;
+; WORKING VARIABLES
+;
+; DSRTC_BUF IS USED FOR BURST READ/WRITE OF CLOCK DATA TO DS-1302
+; FIELDS BELOW MATCH ORDER OF DS-1302 FIELDS (BCD)
+;
+DSRTC_BUF:
+DSRTC_SEC:	.DB	0		; SECOND
+DSRTC_MIN:	.DB	0		; MINUTE
+DSRTC_HR:	.DB	0		; HOUR
+DSRTC_DT:	.DB	0		; DATE
+DSRTC_MON:	.DB	0		; MONTH
+DSRTC_DAY:	.DB	0		; DAY OF WEEK
+DSRTC_YR:	.DB	0		; YEAR
+;
+; DSRTC_TIMBUF IS TEMP BUF USED TO STORE TIME TEMPORARILY TO DISPLAY
+; IT.
+;
+DSRTC_TIMBUF	.FILL	6,0		; 6 BYTES FOR GETTIM
+;
+; DSRTC_TIMDEF IS DEFAULT TIME VALUE TO INITIALIZE CLOCK IF IT IS
+; NOT RUNNING.
+;
+DSRTC_TIMDEF:	; DEFAULT TIME VALUE TO INIT CLOCK
+		.DB	$00,$01,$01	; 2000-01-01
+		.DB	$00,$00,$00	; 00:00:00

Source/fd_dph.asm

@@ -1,72 +0,0 @@
-;
-;==================================================================================================
-;   FLOPPY DISK DRIVER - DATA
-;==================================================================================================
-;
-#IF (FDMEDIA == FDM720)
-    #DEFINE	FDDPB	DPB_FD720	; DPB_FD720 OR DPB_FD144
-    #DEFINE	FDCKS	CKS_FD720
-    #DEFINE	FDALS	ALS_FD720
-#ENDIF
-#IF (FDMEDIA == FDM144)
-    #DEFINE	FDDPB	DPB_FD144	; DPB_FD720 OR DPB_FD144
-    #DEFINE	FDCKS	CKS_FD144
-    #DEFINE	FDALS	ALS_FD144
-#ENDIF
-#IF (FDMEDIA == FDM360)
-    #DEFINE	FDDPB	DPB_FD360	; DPB_FD720 OR DPB_FD144
-    #DEFINE	FDCKS	CKS_FD360
-    #DEFINE	FDALS	ALS_FD360
-#ENDIF
-#IF (FDMEDIA == FDM120)
-    #DEFINE	FDDPB	DPB_FD120	; DPB_FD720 OR DPB_FD144
-    #DEFINE	FDCKS	CKS_FD120
-    #DEFINE	FDALS	ALS_FD120
-#ENDIF
-#IF (FDMEDIA == FDM111)
-    #DEFINE	FDDPB	DPB_FD111	; DPB_FD720 OR DPB_FD144
-    #DEFINE	FDCKS	CKS_FD111
-    #DEFINE	FDALS	ALS_FD111
-#ENDIF
-;
-;
-;
-		.DB	DIODEV_FD + 0
-FDDPH0: 	.DW 	0000, 0000
-	 	.DW 	0000, 0000
-	 	.DW 	DIRBF, FDDPB
-	 	.DW 	FDCSV0, FDALV0
-;
-		.DB	DIODEV_FD + 1
-FDDPH1: 	.DW 	0000, 0000
-	 	.DW 	0000, 0000
-	 	.DW 	DIRBF, FDDPB
-	 	.DW 	FDCSV1, FDALV1
-;
-CKS_FD720	.EQU	32		; CKS: DIR ENT / 4 = 128 / 4 = 32
-ALS_FD720	.EQU	44		; ALS: BLKS / 8 = 351 / 8 = 44 (ROUNDED UP)
-;
-CKS_FD144	.EQU	64		; CKS: DIR ENT / 4 = 256 / 4 = 64
-ALS_FD144	.EQU	89		; ALS: BLKS / 8 = 711 / 8 = 89 (ROUNDED UP)
-;
-CKS_FD360	.EQU	32		; CKS: DIR ENT / 4 = 128 / 4 = 32
-ALS_FD360	.EQU	89		; ALS: BLKS / 8 = 171 / 8 = 22 (ROUNDED UP)
-;
-CKS_FD120	.EQU	64		; CKS: DIR ENT / 4 = 256 / 4 = 64
-ALS_FD120	.EQU	74		; ALS: BLKS / 8 = 592 / 8 = 74 (ROUNDED UP)
-;
-CKS_FD111	.EQU	64		; CKS: DIR ENT / 4 = 256 / 4 = 64
-ALS_FD111	.EQU	72		; ALS: BLKS / 8 = 570 / 8 = 72 (ROUNDED UP)
-;
-#IF (FDMAUTO)
-; ASSUME WORST CASE SIZES
-FDCSV0:		.FILL	CKS_FD144
-FDALV0:		.FILL	ALS_FD144
-FDCSV1:		.FILL	CKS_FD144
-FDALV1:		.FILL	ALS_FD144
-#ELSE
-FDCSV0:		.FILL	FDCKS
-FDALV0:		.FILL	FDALS
-FDCSV1:		.FILL	FDCKS
-FDALV1:		.FILL	FDALS
-#ENDIF

Source/hbfill.asm

@@ -5,6 +5,6 @@
 ;
 #INCLUDE "std.asm"
 ;
-		.FILL	HB_SIZ,0FFH
+		.FILL	HBX_SIZ,0FFH
 ;
 		.END

Source/hbios.asm

@@ -3,25 +3,39 @@
 ;   HBIOS
 ;==================================================================================================
 ;
-
-; bnk1.asm 11/16/2012 dwg - specify hl=0 before calling N8V_INIT 
-; 	This causes the TMS9918 character bitmaps to be loaded from the 
-; 	default bitmaps included in bnk1.asm
-; bnk1.asm 5/23/2012 dwg Beta 4 - Enhanced SYS_GETCFG and SYS_SETCFG
-
-	.ORG	1000H
+	.ORG	$1000
 ;
 ; INCLUDE GENERIC STUFF
 ;
 #INCLUDE "std.asm"
 ;
 ;==================================================================================================
+;   ENTRY VECTORS (JUMP TABLE)
+;==================================================================================================
+;
+	JP	HB_START
+	JP	HB_DISPATCH
+;
+;==================================================================================================
+;   HBIOS INTERNAL PROXY JUMP TABLE
+;==================================================================================================
+;
+; THE FOLLOWING VECTOR TABLE IS USED BY HBIOS TO CALLBACK TO THE
+; HBIOS PROXY INTERNALLY.  IT SHOULD NEVER BE CALLED OUTSIDE OF HBIOS.
+; IT IS PROVIDED SO THAT THE LOCATION OF THE HBIOS PROXY CAN BE LOCATED
+; AT ARBITRARY ADDRESSES AND THE TABLE BELOW ADJUSTED AS NEEDED.
+;
+HBXX:
+HBXX_SETBNK	JP	HBXI_SETBNK
+HBXX_GETBNK	JP	HBXI_GETBNK
+HBXX_COPY	JP	HBXI_COPY
+HBXX_XCOPY	JP	HBXI_XCOPY
+;
+;==================================================================================================
 ;   SYSTEM INITIALIZATION
 ;==================================================================================================
 ;
-; AT THIS POINT, IT IS ASSUMED WE ARE OPERATING FROM RAM PAGE 1
-;
-INITSYS:
+HB_START:
 ;
 ; ANNOUNCE HBIOS
 ;
@@ -41,11 +55,22 @@ INITSYS:
 ;
 ; INSTALL HBIOS PROXY IN UPPER MEMORY
 ;
-	LD	HL,HB_IMG	; HL := SOURCE OF HBIOS PROXY IMAGE
-	LD	DE,HB_LOC	; DE := DESTINATION TO INSTALL IT
-	LD	BC,HB_SIZ	; SIZE
+	LD	HL,HBX_IMG	; HL := SOURCE OF HBIOS PROXY IMAGE
+	LD	DE,HBX_LOC	; DE := DESTINATION TO INSTALL IT
+	LD	BC,HBX_SIZ	; SIZE
 	LDIR			; DO THE COPY
 ;
+; UDPATE THE PROXY CALLBACK VECTOR TABLE
+;
+	LD	HL,HBXI_SETBNK
+	LD	(HBXX_SETBNK + 1),HL
+	LD	HL,HBXI_GETBNK
+	LD	(HBXX_GETBNK + 1),HL
+	LD	HL,HBXI_COPY
+	LD	(HBXX_COPY + 1),HL
+	LD	HL,HBXI_XCOPY
+	LD	(HBXX_XCOPY + 1),HL
+;
 ; DURING INITIALIZATION, CONSOLE IS ALWAYS PRIMARY SERIAL PORT
 ; POST-INITIALIZATION, WILL BE SWITCHED TO USER CONFIGURED CONSOLE
 ;
@@ -73,12 +98,12 @@ INITSYS2:
 ;
 ; SET UP THE DEFAULT DISK BUFFER ADDRESS
 ;
-	LD	HL,$8000	; DEFAULT DISK XFR BUF ADDRESS
+	LD	HL,HBX_IMG	; DEFAULT DISK XFR BUF ADDRESS
 	LD	(DIOBUF),HL	; SAVE IT
 ;
 ; NOW SWITCH TO USER CONFIGURED CONSOLE
 ;
-#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_S100))
+#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4) | (PLATFORM == PLT_S100))
 	LD	A,DEFCON
 #ELSE
 	IN	A,(RTC)		; RTC PORT, BIT 6 HAS STATE OF CONFIG JUMPER
@@ -110,6 +135,12 @@ HB_INITTBL:
 #IF (ASCIENABLE)
 	.DW	ASCI_INIT
 #ENDIF
+#IF (SIMRTCENABLE)
+	.DW	SIMRTC_INIT
+#ENDIF
+#IF (DSRTCENABLE)
+	.DW	DSRTC_INIT
+#ENDIF
 #IF (VDUENABLE)
 	.DW	VDU_INIT
 #ENDIF
@@ -137,6 +168,9 @@ HB_INITTBL:
 #IF (FDENABLE)
 	.DW	FD_INIT
 #ENDIF
+#IF (RFENABLE)
+	.DW	RF_INIT
+#ENDIF
 #IF (IDEENABLE)
 	.DW	IDE_INIT
 #ENDIF
@@ -149,9 +183,6 @@ HB_INITTBL:
 #IF (HDSKENABLE)
 	.DW	HDSK_INIT
 #ENDIF
-#IF (RFENABLE)
-	.DW	RF_INIT
-#ENDIF
 #IF (PPKENABLE)
 	.DW	PPK_INIT
 #ENDIF
@@ -195,7 +226,7 @@ IDLE:
 ;   B: FUNCTION
 ;__________________________________________________________________________________________________
 ;
-BIOS_DISPATCH:
+HB_DISPATCH:
 	LD	A,B		; REQUESTED FUNCTION IS IN B
 	CP	BF_CIO + $10	; $00-$0F: CHARACTER I/O
 	JP	C,CIO_DISPATCH
@@ -258,6 +289,8 @@ CIO_DISPATCH:
 #ENDIF
 	CP	CIODEV_CRT
 	JR	Z,CIOEMU
+	CP	CIODEV_CONSOLE
+	JR	Z,CIOCON
 	CALL	PANIC
 ;
 CIOEMU:
@@ -266,6 +299,11 @@ CIOEMU:
 	LD	B,A
 	JP	EMU_DISPATCH
 ;
+CIOCON:
+	LD	A,(CONDEV)
+	LD	C,A
+	JR	CIO_DISPATCH
+;
 ;==================================================================================================
 ;   DISK I/O DEVICE DISPATCHER
 ;==================================================================================================
@@ -306,6 +344,10 @@ DIO_DISPATCH1:
 	CP	DIODEV_FD
 	JP	Z,FD_DISPATCH
 #ENDIF
+#IF (RFENABLE)
+	CP	DIODEV_RF
+	JP	Z,RF_DISPATCH
+#ENDIF
 #IF (IDEENABLE)
 	CP	DIODEV_IDE
 	JP	Z,IDE_DISPATCH
@@ -329,10 +371,6 @@ DIO_DISPATCH1:
 #IF (HDSKENABLE)
 	CP	DIODEV_HDSK
 	JP	Z,HDSK_DISPATCH
-#ENDIF
-#IF (RFENABLE)
-	CP	DIODEV_RF
-	JP	Z,RF_DISPATCH
 #ENDIF
 	CALL	PANIC
 ;
@@ -355,8 +393,8 @@ DIO_GETBUF:
 ; DISK: SET BUFFER ADDRESS
 ;
 DIO_SETBUF:
-	BIT	7,H		; IS HIGH ORDER BIT SET?
-	CALL	Z,PANIC		; IF NOT, ADR IS IN LOWER 32K, NOT ALLOWED!!!
+;	BIT	7,H		; IS HIGH ORDER BIT SET?
+;	CALL	Z,PANIC		; IF NOT, ADR IS IN LOWER 32K, NOT ALLOWED!!!
 	LD	(DIOBUF),HL	; RECORD NEW DISK BUFFER ADDRESS
 	XOR	A		; SIGNALS SUCCESS
 	RET
@@ -369,6 +407,12 @@ DIO_SETBUF:
 ;   B: FUNCTION
 ;
 RTC_DISPATCH:
+#IF (SIMRTCENABLE)
+	JP	SIMRTC_DISPATCH
+#ENDIF
+#IF (DSRTCENABLE)
+	JP	DSRTC_DISPATCH
+#ENDIF
 	CALL	PANIC
 ;
 ;==================================================================================================
@@ -540,15 +584,60 @@ VDA_DISPATCH:
 SYS_DISPATCH:
 	LD	A,B		; GET REQUESTED FUNCTION
 	AND	$0F		; ISOLATE SUB-FUNCTION
-	JR	Z,SYS_GETCFG	; $F0
+	JR	Z,SYS_SETBNK	; $F0
 	DEC	A
-	JR	Z,SYS_SETCFG	; $F1
+	JR	Z,SYS_GETBNK	; $F1
 	DEC	A
-	JR	Z,SYS_BNKCPY	; $F2
+	JP	Z,HBXI_COPY	; $F2
 	DEC	A
-	JR	Z,SYS_GETVER	; $F3
+	JP	Z,HBX_XCOPY	; $F2
+	DEC	A
+	JR	Z,SYS_GETCFG	; $F3
+	DEC	A
+	JR	Z,SYS_SETCFG	; $F4
+	DEC	A
+	JR	Z,SYS_GETVER	; $F5
 	CALL	PANIC		; INVALID
 ;
+; SET ACTIVE MEMORY BANK AND RETURN PREVIOUSLY ACTIVE MEMORY BANK
+;   NOTE THAT IT GOES INTO EFFECT AS HBIOS IS EXITED
+;   HERE, WE JUST SET THE CURRENT BANK
+;   CALLER MUST EXTABLISH UPPER MEMORY STACK BEFORE INVOKING THIS FUNCTION!
+;
+SYS_SETBNK:
+	LD	A,(HBX_CURBNK)	; GET THE PREVIOUS ACTIVE MEMORY BANK
+	PUSH	AF		; SAVE IT
+	LD	A,C		; LOAD THE NEW BANK REQUESTED
+	LD	(HBX_CURBNK),A	; SET IT FOR ACTIVATION UPON HBIOS RETURN
+	POP	AF		; GET PREVIOUS BANK INTO A
+	OR	A
+	RET
+;
+; GET ACTIVE MEMORY BANK
+;
+SYS_GETBNK:
+	LD	A,(HBX_CURBNK)	; GET THE PREVIOUS ACTIVE MEMORY BANK
+	OR	A
+	RET
+;
+; GET ACTIVE MEMORY BANK
+;
+SYS_COPY:
+	PUSH	IX
+	POP	BC
+	CALL	HBXI_COPY
+	XOR	A
+	RET
+;
+; SET BANKS FOR EXTENDED (INTERBANK) MEMORY COPY
+;
+SYS_XCOPY:
+	PUSH	DE
+	POP	BC
+	CALL	HBX_XCOPY
+	XOR	A
+	RET
+;
 ; GET ACTIVE CONFIGURATION
 ;   DE: DESTINATION TO RECEIVE CONFIGURATION DATA BLOCK
 ;       MUST BE IN UPPER 32K
@@ -573,18 +662,6 @@ SYS_SETCFG:
 	LDIR
 	RET
 ;
-; PERFORM A BANKED MEMORY COPY
-;   C: BANK TO SWAP INTO LOWER 32K PRIOR TO COPY OPERATION
-;   IX: COUNT OF BYTES TO COPY
-;   HL: SOURCE ADDRESS FOR COPY
-;   DE: DESTINATION ADDRESS FOR COPY
-;
-SYS_BNKCPY:
-	LD	A,C			; BANK SELECTION TO A
-	PUSH	IX
-	POP	BC			; BC = BYTE COUNT TO COPY
-	JP	HB_BNKCPY		; JUST PASS CONTROL TO HBIOS STUB IN UPPER MEMORY
-;
 ; GET THE CURRENT HBIOS VERSION
 ;   RETURNS VERSION IN DE AS BCD
 ;     D: MAJOR VERION IN TOP 4 BITS, MINOR VERSION IN LOW 4 BITS
@@ -615,6 +692,24 @@ CIO_IDLE:
 ;   DEVICE DRIVERS
 ;==================================================================================================
 ;
+#IF (SIMRTCENABLE)
+ORG_SIMRTC	.EQU	$
+  #INCLUDE "simrtc.asm"
+SIZ_SIMRTC	.EQU	$ - ORG_SIMRTC
+		.ECHO	"SIMRTC occupies "
+		.ECHO	SIZ_SIMRTC
+		.ECHO	" bytes.\n"
+#ENDIF
+;
+#IF (DSRTCENABLE)
+ORG_DSRTC	.EQU	$
+  #INCLUDE "dsrtc.asm"
+SIZ_DSRTC	.EQU	$ - ORG_DSRTC
+		.ECHO	"DSRTC occupies "
+		.ECHO	SIZ_DSRTC
+		.ECHO	" bytes.\n"
+#ENDIF
+;
 #IF (UARTENABLE)
 ORG_UART	.EQU	$
   #INCLUDE "uart.asm"
@@ -705,6 +800,15 @@ SIZ_FD		.EQU	$ - ORG_FD
 		.ECHO	" bytes.\n"
 #ENDIF
 
+#IF (RFENABLE)
+ORG_RF	.EQU	$
+  #INCLUDE "rf.asm"
+SIZ_RF	.EQU	$ - ORG_RF
+		.ECHO	"RF occupies "
+		.ECHO	SIZ_RF
+		.ECHO	" bytes.\n"
+#ENDIF
+
 #IF (IDEENABLE)
 ORG_IDE		.EQU	$
   #INCLUDE "ide.asm"
@@ -741,15 +845,6 @@ SIZ_HDSK	.EQU	$ - ORG_HDSK
 		.ECHO	" bytes.\n"
 #ENDIF
 
-#IF (RFENABLE)
-ORG_RF	.EQU	$
-  #INCLUDE "rf.asm"
-SIZ_RF		.EQU	$ - ORG_RF
-		.ECHO	"RF occupies "
-		.ECHO	SIZ_RF
-		.ECHO	" bytes.\n"
-#ENDIF
-
 #IF (PPKENABLE)
 ORG_PPK		.EQU	$
   #INCLUDE "ppk.asm"
@@ -789,6 +884,7 @@ SIZ_ANSI	.EQU	$ - ORG_ANSI
 #DEFINE	CIOMODE_CONSOLE
 #DEFINE	DSKY_KBD
 #INCLUDE "util.asm"
+#INCLUDE "time.asm"
 ;
 ;==================================================================================================
 ;   HBIOS GLOBAL DATA
@@ -805,7 +901,7 @@ HSTSEC		.DW	0		; SECTOR IN BUFFER
 CUREMU		.DB	DEFEMU		; CURRENT EMULATION
 CURVDA		.DB	DEFVDA		; CURRENT VDA TARGET FOR EMULATION
 ;
-DIOBUF		.DW	$FD00		; PTR TO 512 BYTE DISK XFR BUFFER
+DIOBUF		.DW	HBX_IMG		; PTR TO 1024 BYTE DISK XFR BUFFER
 ;
 STR_BANNER	.DB	"N8VEM HBIOS v", BIOSVER, ", ", BIOSBLD, ", ", TIMESTAMP, "$"
 STR_PLATFORM	.DB	PLATFORM_NAME, "$"
@@ -814,7 +910,7 @@ STR_PLATFORM	.DB	PLATFORM_NAME, "$"
 ;   FILL REMAINDER OF HBIOS
 ;==================================================================================================
 ;
-SLACK:		.EQU	(7F00H - $)
+SLACK		.EQU	(HBX_LOC - $8000 - $)
 		.FILL	SLACK,0FFH
 ;
 		.ECHO	"HBIOS space remaining: "
@@ -825,19 +921,25 @@ SLACK:		.EQU	(7F00H - $)
 ;   HBIOS UPPER MEMORY STUB
 ;==================================================================================================
 ;
-; THE FOLLOWING CODE IS RELOCATED TO THE TOP PAGE IN MEMORY TO HANDLE INVOCATION DISPATCHING
+; THE FOLLOWING CODE IS RELOCATED TO THE TOP OF MEMORY TO HANDLE INVOCATION DISPATCHING
 ;
-HB_IMG	.EQU	$
-	.ORG	HB_LOC
+HBX_IMG		.EQU	$
+		.ORG	HBX_LOC
 ;
 ;==================================================================================================
-;   HBIOS INTERRUPT VECTOR TABLE
+;   HBIOS JUMP TABLE
 ;==================================================================================================
 ;
-; AREA RESERVED FOR UP TO 16 INTERRUPT VECTOR ENTRIES (MODE 2)
-;
-HB_IVT:
-	.FILL	20H,0FFH
+	JP	HBX_INIT
+	JP	HBX_INVOKE
+	JP	HBX_SETBNK
+	JP	HBX_GETBNK
+	JP	HBX_COPY
+	JP	HBX_XCOPY
+	JP	HBX_FRGETB
+	JP	HBX_FRGETW
+	JP	HBX_FRPUTB
+	JP	HBX_FRPUTW
 ;
 ;==================================================================================================
 ;   HBIOS INITIALIZATION
@@ -845,80 +947,318 @@ HB_IVT:
 ;
 ; SETUP RST 08 VECTOR TO HANDLE MAIN BIOS FUNCTIONS
 ;
-HB_INIT:
-	LD	A,0C3H		; $C3 = JP
-	LD	(8H),A
-	LD	HL,HB_ENTRY
-	LD	(9H),HL
+HBX_INIT:
+	LD	A,$C3		; $C3 = JP
+	LD	($08),A
+	LD	HL,HBX_INVOKE
+	LD	($09),HL
 	RET
 ;
-; MEMORY MANAGER
+;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
+; SETBNK - Switch Memory Bank to Bank in A and show as current.
+;  Must preserve all Registers including Flags.
+;  All Bank Switching MUST be done by this routine
+;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
 ;
-#INCLUDE "memmgr.asm"
+HBX_SETBNK:
+	LD	(HBX_CURBNK),A
 ;
-;==================================================================================================
-;   HBIOS BNKCPY ROUTINE
-;==================================================================================================
+; Enter at HBXI_SETBNK to set bank temporarily and avoid
+; updating the "current" bank.
 ;
-; SELECT A DESIGNATED RAM/ROM BANK INTO LOWER 32K, THEN PERFORM A BULK MEMORY COPY
-;   A: BANK SELECTION (BIT 7: 1=RAM/0=ROM, BITS 0-6: BANK NUMBER)
-;   DE: DESTINATION ADDRESS
-;   HL: SOURCE ADDRESS
-;   BC: COUNT OF BYTES TO COPY;
+HBXI_SETBNK:
+#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA))
+	OUT	(MPCL_ROM),A
+	OUT	(MPCL_RAM),A
+#ENDIF
+#IF (PLATFORM == PLT_N8)
+	BIT	7,A
+	JR	Z,HBX_ROM
 ;
-HB_BNKCPY:
-	BIT	7,A		; CHECK BIT 7
-	JR	NZ,HB_BNKCPY1	; RAM PAGE
+HBX_RAM:
+	RES	7,A
+	RLCA
+	RLCA
+	RLCA
+	OUT0	(CPU_BBR),A
+	LD	A,DEFACR | 80H
+	OUT0	(ACR),A
+	RET
 ;
-	CALL	ROMPG		; SELECT ROM PAGE
-	JR	HB_BNKCPY2	; GO TO COMMON STUFF
+HBX_ROM:
+	OUT0	(RMAP),A
+	XOR	A
+	OUT0	(CPU_BBR),A
+	LD	A,DEFACR
+	OUT0	(ACR),A
+	RET
 ;
-HB_BNKCPY1:
-	RES	7,A		; CLEAR BIT 7
-	CALL	RAMPG		; SELECT RAM PAGE AND FALL THRU
+#ENDIF
+#IF (PLATFORM == PLT_MK4)
+	RLCA
+	RLCA
+	RLCA
+	OUT0	(CPU_BBR),A
+#ENDIF
+	RET
 ;
-HB_BNKCPY2:
-	LDIR			; DO THE COPY
-	LD	A,1		; RESELECT RAM PAGE 1
-	CALL	RAMPG		; DO IT
-	RET			; BACK TO LOWER MEMORY
+;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
+; GETBNK - Get current memory bank and return in A.
+;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
+;
+HBX_GETBNK:
+HBXI_GETBNK:
+	LD	A,(HBX_CURBNK)
+	RET
+;
+;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
+;	Set Banks for Inter-Bank Xfer.  Save all Registers.
+;  B = Destination Bank, C = Source Bank
+;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
+;
+HBX_XCOPY:
+HBXI_XCOPY:
+	LD	(HBX_SRCBNK),BC	; SETS BOTH SRCBNK AND DSTBNK
+	RET
+;
+;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
+; Copy Data - Possibly between banks.  This resembles CP/M 3, but
+;  usage of the HL and DE registers is reversed.
+; Enter: HL = Source Address
+;	 DE = Destination Address
+;	 BC = Number of bytes to copy
+; Exit : None
+; Uses : AF,BC,DE,HL
+;
+;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
+;
+; Primary entry point activates private stack while doing work.  The
+; secondary entry point MUST be used by internal HBIOS code/drivers
+; because our private stack is already active!
+;
+HBX_COPY:
+	LD	(HBX_STKSAV),SP	; Save current stack
+	LD	SP,HBX_STACK	; Activate our private stack
+	CALL	HBX_COPY1	; Do the work with private stack active
+	LD	SP,(HBX_STKSAV)	; Back to original stack
+	LD	A,(HBX_CURBNK)	; Get the "current" bank
+	JR	HBXI_SETBNK	; Activate current bank and return
+;
+; Secondary entry point HBXI_COPY is for use internally by HBIOS and
+; assumes a valid stack already exists in upper 32K.  It also ignores
+; the "current" bank and terminates with HBIOS bank active.
+;
+HBXI_COPY:
+	CALL	HBX_COPY1
+	LD	A,BID_HB	; Get the HBIOS bank
+	JR	HBXI_SETBNK	; .. activate and return
+;
+;
+;
+HBX_COPY1:
+	; Setup for copy loop
+	LD	(HBX_SRCADR),HL	; Init working source adr
+	LD	(HBX_DSTADR),DE	; Init working dest adr 
+	LD	H,B		; Move bytes to copy from BC...
+	LD	L,C		;   to HL to use as byte counter
+
+HBX_COPY2:	; Copy loop
+	INC	L		; Set ZF to indicate...
+	DEC	L		;   if a partial page copy is needed
+	LD	BC,$100		; Assume a full page copy, 100H bytes
+	JR	Z,HBX_COPY3	; If full page copy, go do it
+	DEC	B		; Otherwise, setup for partial page copy
+	LD	C,L		; by making BC := 0
+
+HBX_COPY3:
+	PUSH	HL		; Save bytes left to copy
+	CALL	HBX_COPY4	; Do it
+	POP	HL		; Recover bytes left to copy
+	XOR	A		; Clear CF
+	SBC	HL,BC		; Reflect bytes copied in HL
+	JR	NZ,HBX_COPY2	; If any left, then loop
+
+	LD	HL,(HBX_DEFBNK)	; Get TPA Bank #
+	LD	H,L		; .to both H and L
+	LD	(HBX_SRCBNK),HL	; ..set Source & Destination Bank # to default
+
+	RET			; Done
+
+HBX_COPY4:
+	; Switch to source bank
+	LD	A,(HBX_SRCBNK)	; Get source bank
+	CALL	HBXI_SETBNK	; Set bank without making it current
+
+	; Copy BC bytes from HL -> BUF
+	; Allow HL to increment
+	PUSH	BC		; Save copy length
+	LD	HL,(HBX_SRCADR)	; Point to source adr
+	LD	DE,HBX_BUF	; Setup buffer as interim destination
+	LDIR			; Copy BC bytes: src -> buffer
+	LD	(HBX_SRCADR),HL	; Update source adr
+	POP	BC		; Recover copy length
+	
+	; Switch to dest bank
+	LD	A,(HBX_DSTBNK)	; Get destination bank
+	CALL	HBXI_SETBNK	; Set bank without making it current
+
+	; Copy BC bytes from BUF -> HL
+	; Allow DE to increment
+	PUSH	BC		; Save copy length
+	LD	HL,HBX_BUF	; Use the buffer as source now
+	LD	DE,(HBX_DSTADR)	; Setup final destination for copy
+	LDIR			; Copy BC bytes: buffer -> dest
+	LD	(HBX_DSTADR),DE	; Update dest adr
+	POP	BC		; Recover copy length
+
+	RET			; Done
 ;
 ;==================================================================================================
 ;   HBIOS ENTRY FOR RST 08 PROCESSING
 ;==================================================================================================
 ;
+; MARKER IMMEDIATELY PRECEDES INVOKE ROUTINE ADDRESS
+;
+HBX_MARKER:
+	.DB	'W',~'W'	; IDENTIFIES HBIOS
+;
 ; ENTRY POINT FOR BIOS FUNCTIONS (TARGET OF RST 08)
 ;
-HB_ENTRY:
-	LD	(STACKSAV),SP	; SAVE ORIGINAL STACK FRAME
-	LD	SP,STACK	; SETUP NEW STACK FRAME
+HBX_INVOKE:
+	LD	(HBX_STKSAV),SP	; SAVE ORIGINAL STACK FRAME
+	LD	SP,HBX_STACK	; SETUP NEW STACK FRAME
 
-	PGRAMF(1)		; MAP RAM PAGE 1 INTO LOWER 32K
-	
-	CALL	BIOS_DISPATCH	; CALL HBIOS FUNCTION DISPATCHER
+	LD	A,BID_HB	; HBIOS BANK
+	CALL	HBXI_SETBNK	; SELECT IT
+
+	CALL	HB_DISPATCH	; CALL HBIOS FUNCTION DISPATCHER
 
 	PUSH	AF		; SAVE AF (FUNCTION RETURN)
-	PGRAMF(0)		; MAP RAM PAGE 0 INTO LOWER 32K
+	LD	A,(HBX_CURBNK)	; GET ENTRY BANK
+	CALL	HBXI_SETBNK	; SELECT IT
 	POP	AF		; RESTORE AF
 
-	LD	SP,(STACKSAV)	; RESTORE ORIGINAL STACK FRAME
+	LD	SP,(HBX_STKSAV)	; RESTORE ORIGINAL STACK FRAME
 
 	RET			; RETURN TO CALLER
 ;
+;==================================================================================================
+;   HBIOS INTERBANK MEMORY COPY BUFFER
+;==================================================================================================
+;
+	.FILL	$FE00 - $,$FF	; FILL TO START OF BUFFER PAGE
+HBX_BUF	.FILL	$100,0		; INTER-BANK COPY BUFFER
+;
+;==================================================================================================
+;   HBIOS INTERRUPT VECTOR TABLE
+;==================================================================================================
+;
+	.FILL	$FF00 - $,$FF	; FILL TO START OF LAST PAGE
+;
+; AREA RESERVED FOR UP TO 16 INTERRUPT VECTOR ENTRIES (MODE 2)
+;
+HBX_IVT:
+	.FILL	$20,$FF
+;
+;==================================================================================================
+;	Load  A,(HL)  from  Alternate  Bank  (in Reg C)
+;==================================================================================================
+;
+HBX_FRGETB:
+	LD	(HBX_STKSAV),SP	; SAVE ORIGINAL STACK FRAME
+	LD	SP,HBX_STACK	; SETUP NEW STACK FRAME
+	PUSH	BC
+	LD	A,C
+	DI
+	CALL	HBXI_SETBNK	; SELECT IT
+	LD	C,(HL)
+	LD	A,(HBX_CURBNK)
+	CALL	HBXI_SETBNK	; SELECT IT
+	EI
+	LD	A,C
+	POP	BC
+	LD	SP,(HBX_STKSAV)	; RESTORE ORIGINAL STACK FRAME
+	RET
+;
+;==================================================================================================
+;	Load  DE,(HL)  from  Alternate  Bank
+;==================================================================================================
+;
+HBX_FRGETW:
+	LD	(HBX_STKSAV),SP	; SAVE ORIGINAL STACK FRAME
+	LD	SP,HBX_STACK	; SETUP NEW STACK FRAME
+	LD	A,C
+	DI
+	CALL	HBXI_SETBNK	; SELECT IT
+	LD	E,(HL)
+	INC	HL
+	LD	D,(HL)
+	DEC	HL
+	LD	A,(HBX_CURBNK)
+	CALL	HBXI_SETBNK	; SELECT IT
+	EI
+	LD	SP,(HBX_STKSAV)	; RESTORE ORIGINAL STACK FRAME
+	RET
+;
+;==================================================================================================
+;	Load  (HL),A  to  Alternate  Bank  (in Reg C)
+;==================================================================================================
+;
+HBX_FRPUTB:	
+	LD	(HBX_STKSAV),SP	; SAVE ORIGINAL STACK FRAME
+	LD	SP,HBX_STACK	; SETUP NEW STACK FRAME
+	PUSH	BC
+	LD	B,A
+	LD	A,C
+	DI
+	CALL	HBXI_SETBNK	; SELECT IT
+	LD	(HL),B
+	LD	A,(HBX_CURBNK)
+	CALL	HBXI_SETBNK	; SELECT IT
+	EI
+	POP	BC
+	LD	SP,(HBX_STKSAV)	; RESTORE ORIGINAL STACK FRAME
+	RET
+;
+;==================================================================================================
+;	Load  (HL),DE  to  Alternate  Bank
+;==================================================================================================
+;
+HBX_FRPUTW:	
+	LD	(HBX_STKSAV),SP	; SAVE ORIGINAL STACK FRAME
+	LD	SP,HBX_STACK	; SETUP NEW STACK FRAME
+	LD	A,C
+	DI
+	CALL	HBXI_SETBNK	; SELECT IT
+	LD	(HL),E
+	INC	HL
+	LD	(HL),D
+	DEC	HL
+	LD	A,(HBX_CURBNK)
+	CALL	HBXI_SETBNK	; SELECT IT
+	EI
+	LD	SP,(HBX_STKSAV)	; RESTORE ORIGINAL STACK FRAME
+	RET
+;
 ; PRIVATE DATA
 ;
-STACKSAV	.DW	0
+HBX_STKSAV	.DW	0		; Saved stack pointer during HBIOS calls
+HBX_CURBNK	.DB	BID_USR		; Currently active memory bank
+HBX_SAVBNK	.DB	0		; Place to save entry bank during HB processing
+HBX_DEFBNK	.DB	BID_USR		; Default bank number
+HBX_SRCBNK	.DB	BID_USR		; Copy Source Bank #
+HBX_DSTBNK	.DB	BID_USR		; Copy Destination Bank #
+HBX_SRCADR	.DW	0		; Copy Source Address
+HBX_DSTADR	.DW	0		; Copy Destination Address
 ;
-; JUST FOR FUN, PRIVATE STACK IS LOCATED AT TOP OF MEMORY...
+; PRIVATE STACK
 ;
-STACK		.EQU	0
-;
-;
-;
-HB_SLACK	.EQU	(HB_END - $)
+HBX_STKSIZ	.EQU	(HBX_END - $ - 2)
 		.ECHO	"STACK space remaining: "
-		.ECHO	HB_SLACK
+		.ECHO	HBX_STKSIZ
 		.ECHO	" bytes.\n"
 ;
-		.FILL	HB_SLACK,0FFH
+		.FILL	HBX_STKSIZ,$FF
+HBX_STACK	.EQU	$
+		.DW	HBX_MARKER	; POINTER TO HBIOS MARKER
 		.END

Source/hdsk.asm

@@ -1,3 +1,4 @@
+
 ;
 ;==================================================================================================
 ;   HDSK DISK DRIVER
@@ -17,39 +18,30 @@ HDSK_CMDPARAM	.EQU	4
 ;
 HDSKRC_OK	.EQU	0
 ;
-; UNIT CONFIGURATION
-;
-HDSK0_DEVICE	.DB	11100000B	; LBA, MASTER DEVICE
-HDSK1_DEVICE	.DB	11110000B	; LBA, SLAVE DEVICE
-;
 ;
 ;
 HDSK_DISPATCH:
 	LD	A,B		; GET REQUESTED FUNCTION
 	AND	$0F
-	JR	Z,HDSK_RD
+	JR	Z,HDSK_READ
 	DEC	A
-	JR	Z,HDSK_WR
+	JR	Z,HDSK_WRITE
 	DEC	A
-	JR	Z,HDSK_ST
+	JR	Z,HDSK_STATUS
 	DEC	A
-	JR	Z,HDSK_MED
+	JR	Z,HDSK_MEDIA
 	CALL	PANIC
 ;
-HDSK_RD:
-	JP	HDSK_READ
-HDSK_WR:
-	JP	HDSK_WRITE
-HDSK_ST:
-	JP	HDSK_STATUS
-HDSK_MED:
-	JP	HDSK_MEDIA
-;
 ; HDSK_MEDIA
 ;
 HDSK_MEDIA:
-	LD	A,MID_HD
-	RET
+	LD	A,C		; GET THE DEVICE/UNIT
+	AND	$0F		; ISOLATE UNIT
+	CP	2		; 2 UNITS
+	LD	A,MID_HD	; ASSUME WE ARE OK
+	RET	C		; RETURN
+	XOR	A		; NO MEDIA
+	RET			; AND RETURN
 ;
 ;
 ;
@@ -97,16 +89,18 @@ HDSK_RW:
 	
 	; SET DEVICE
 	LD	A,(HSTDSK)
-	AND	0FH
+	AND	$0F
 	LD	(HDSK_DEVICE),A
 	
-	; SET SECTOR (IGNORES MSB)
-	LD	A,(HSTSEC)
-	LD	(HDSK_SEC),A
+	; INCOMING TRK:SEC ACTUALLY REPRESENTS 32 BIT LBA
+	; MAP TRK:SEC TO HDSK DRIVER AS TTSS:SS
 	
-	; SET TRACK
-	LD	BC,(HSTTRK)
-	LD	(HDSK_TRK),BC
+	LD	A,(HSTTRK)		; LSB OF TRACK
+	LD	(HDSK_TRK + 1),A	;   MAPS TO MSB OF HDSK TRK
+	LD	A,(HSTSEC + 1)		; MSB OF SECTOR
+	LD 	(HDSK_TRK),A		;   MAPS TO LSB OF HDSK TRK
+	LD	A,(HSTSEC)		; LSB OF SECTOR
+	LD	(HDSK_SEC),A		;   MAPS TO LSB OF HDSK SEC
 	
 	; SET TRANSFER ADDRESS
 	LD	BC,(DIOBUF)
@@ -117,11 +111,11 @@ HDSK_RW:
 	LD	HL,HDSK_PARMBLK	; START ADDRESS OF PARAMETER BLOCK
 HDSK_RW1:
 	LD	A,(HL)		; GET BYTE OF PARAMETER BLOCK
-	OUT	(0FDH),A	; SEND IT TO PORT
+	OUT	($FD),A		; SEND IT TO PORT
 	INC	HL		; POINT TO NEXT BYTE
 	DJNZ	HDSK_RW1
 
-	IN	A,(0FDH)	; GET RESULT CODE
+	IN	A,($FD)		; GET RESULT CODE
 	LD	(HDSK_RC),A
 	OR	A
 	JR	Z,HDSK_OK
@@ -151,7 +145,7 @@ HDSK_RESET:
 	LD	B,32
 	LD	A,HDSK_CMDRESET
 HDSK_RESET1:
-	OUT	(0FDH),A
+	OUT	($FD),A
 	DJNZ	HDSK_RESET1
 
 	XOR	A			; STATUS = OK
@@ -273,8 +267,8 @@ HDSK_STAT	.DB	0
 HDSK_RC		.DB	0
 ;
 HDSK_PARMBLK:
-HDSK_CMD	.DB	0	;  HDSK_READ OR HDSK_WRITE
-HDSK_DEVICE	.DB	0	; 0 .. 7, DEFINES HARD DISK TO BE USED
-HDSK_SEC	.DB	0	; 0 .. 31, DEFINES SECTOR
-HDSK_TRK	.DW	0	; 0 .. 2047, DEFINES TRACK
+HDSK_CMD	.DB	0	; COMMAND (HDSK_READ, HDSK_WRITE, ...)
+HDSK_DEVICE	.DB	0	; 0..7, HARD DISK UNIT
+HDSK_SEC	.DB	0	; 0..255 SECTOR
+HDSK_TRK	.DW	0	; 0..2047 TRACK
 HDSK_DMA	.DW	0	; DEFINES WHERE RESULT IS PLACED IN MEMORY

Source/hdsk_dph.asm

@@ -1,61 +0,0 @@
-;
-;==================================================================================================
-;   HDSK DISK DRIVER - DATA
-;==================================================================================================
-;
-HDSK_SLICETRKS	.EQU	65			; TRACKS PER SLICE
-HDSK_TRKSIZE	.EQU	128			; SIZE OF TRACK (IN KB)
-HDSK_SLICESIZE	.EQU	((HDSK_SLICETRKS * HDSK_TRKSIZE) + 1023) / 1024 ; SIZE OF EACH SLICE (IN MB)
-HDSK_NUMSLICES	.EQU	HDSKCAPACITY / HDSK_SLICESIZE ; TOTAL SLICES IN DEVICE
-HDSK0_SLICEDEF	.EQU	0			; DEFAULT SLICE FOR LOGICAL UNIT 0
-HDSK1_SLICEDEF	.EQU	1			; DEFAULT SLICE FOR LOGICAL UNIT 1
-HDSK2_SLICEDEF	.EQU	2			; DEFAULT SLICE FOR LOGICAL UNIT 2
-HDSK3_SLICEDEF	.EQU	3			; DEFAULT SLICE FOR LOGICAL UNIT 3
-;
-		.DB	DIODEV_HDSK + 0
-HDSKDPH0 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	HDSKCSV0,HDSKALV0
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-HDSK0_SLICE	.DW	HDSK0_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	HDSK_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-		.DB	DIODEV_HDSK + 0
-HDSKDPH1 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	HDSKCSV1,HDSKALV1
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-HDSK1_SLICE	.DW	HDSK1_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	HDSK_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-		.DB	DIODEV_HDSK + 0
-HDSKDPH2 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	HDSKCSV2,HDSKALV2
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-HDSK2_SLICE	.DW	HDSK2_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	HDSK_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-		.DB	DIODEV_HDSK + 0
-HDSKDPH3 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	HDSKCSV3,HDSKALV3
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-HDSK3_SLICE	.DW	HDSK3_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	HDSK_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-HDSKCKS		.EQU	0			; CKS: 0 FOR NON-REMOVABLE MEDIA
-HDSKALS		.EQU	256			; ALS: BLKS / 8 = 2048 / 8 = 256 (ROUNDED UP)
-;
-HDSKCSV0:	.FILL	HDSKCKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-HDSKALV0:	.FILL	HDSKALS			; MAX OF 2048 DATA BLOCKS
-HDSKCSV1:	.FILL	HDSKCKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-HDSKALV1:	.FILL	HDSKALS			; MAX OF 2048 DATA BLOCKS
-HDSKCSV2:	.FILL	HDSKCKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-HDSKALV2:	.FILL	HDSKALS			; MAX OF 2048 DATA BLOCKS
-HDSKCSV3:	.FILL	HDSKCKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-HDSKALV3:	.FILL	HDSKALS			; MAX OF 2048 DATA BLOCKS

Source/ide.asm

@@ -5,34 +5,40 @@
 ;
 ; IO PORT ADDRESSES
 ;
-#IF (IDEMODE == IDEMODE_DIO)
-#IF (IDE8BIT)
-IDEDATA:	.EQU 	20H		; DATA PORT (8 BIT)
+#IF (IDEMODE == IDEMODE_MK4)
+IDEBASE		.EQU	MK4_IDE
 #ELSE
-IDEDATALO:	.EQU 	20H		; DATA PORT (16 BIT LO BYTE)
-IDEDATAHI:	.EQU 	28H		; DATA PORT (16 BIT HI BYTE)
+IDEBASE		.EQU	$20
+#ENDIF
+
+#IF ((IDEMODE == IDEMODE_DIO) | (IDEMODE == IDEMODE_MK4))
+#IF (IDE8BIT)
+IDEDATA:	.EQU 	$IDEBASE + $00	; DATA PORT (8 BIT)
+#ELSE
+IDEDATALO:	.EQU 	$IDEBASE + $00	; DATA PORT (16 BIT LO BYTE)
+IDEDATAHI:	.EQU 	$IDEBASE + $08	; DATA PORT (16 BIT HI BYTE)
 IDEDATA:	.EQU	IDEDATALO
 #ENDIF
 #ENDIF
 ;
 #IF (IDEMODE == IDEMODE_DIDE)
 #IF (IDE8BIT)
-IDEDATA:	.EQU 	20H		; DATA PORT (8 BIT OR 16 BIT PIO LO/HI BYTES)
+IDEDATA:	.EQU 	$IDEBASE + $00	; DATA PORT (8 BIT OR 16 BIT PIO LO/HI BYTES)
 #ELSE
-IDEDATA:	.EQU 	28H		; DATA PORT (16 BIT PIO LO/HI BYTES)
-IDEDMA:		.EQU 	29H		; DATA PORT (16 BIT DMA LO/HI BYTES)
+IDEDATA:	.EQU 	$IDEBASE + $08	; DATA PORT (16 BIT PIO LO/HI BYTES)
+IDEDMA:		.EQU 	$IDEBASE + $09	; DATA PORT (16 BIT DMA LO/HI BYTES)
 #ENDIF
 #ENDIF
 ;
-IDEERR:		.EQU 	21H		; READ: ERROR REGISTER; WRITE: PRECOMP
-IDESECTC:	.EQU 	22H		; SECTOR COUNT
-IDESECTN:	.EQU 	23H		; SECTOR NUMBER
-IDECYLLO:	.EQU 	24H		; CYLINDER LOW
-IDECYLHI:	.EQU 	25H		; CYLINDER HIGH
-IDEDEVICE:	.EQU 	26H		; DRIVE/HEAD
-IDESTTS:	.EQU 	27H		; READ: STATUS; WRITE: COMMAND
-IDECTRL:	.EQU 	2EH		; READ: ALTERNATIVE STATUS; WRITE; DEVICE CONTROL
-IDEADDR:	.EQU 	2FH		; DRIVE ADDRESS (READ ONLY)
+IDEERR:		.EQU 	$IDEBASE + $01	; READ: ERROR REGISTER; WRITE: PRECOMP
+IDESECTC:	.EQU 	$IDEBASE + $02	; SECTOR COUNT
+IDESECTN:	.EQU 	$IDEBASE + $03	; SECTOR NUMBER
+IDECYLLO:	.EQU 	$IDEBASE + $04	; CYLINDER LOW
+IDECYLHI:	.EQU 	$IDEBASE + $05	; CYLINDER HIGH
+IDEDEVICE:	.EQU 	$IDEBASE + $06	; DRIVE/HEAD
+IDESTTS:	.EQU 	$IDEBASE + $07	; READ: STATUS; WRITE: COMMAND
+IDECTRL:	.EQU 	$IDEBASE + $0E	; READ: ALTERNATIVE STATUS; WRITE; DEVICE CONTROL
+IDEADDR:	.EQU 	$IDEBASE + $0F	; DRIVE ADDRESS (READ ONLY)
 ;
 ;
 ;
@@ -342,18 +348,16 @@ IDE_SETUP1:
 	LD	(IDE_DEVICE),A
 	OUT	(IDEDEVICE),A
 
-	LD	HL,(HSTTRK)		; HSTTRK -> IDECYLHI/LO
-	LD	A,H
-	LD	(IDE_CYLHI),A
-	OUT	(IDECYLHI),A
-	LD	A,L
-	LD	(IDE_CYLLO),A
-	OUT	(IDECYLLO),A
-	
-	LD	BC,(HSTSEC)		; HSTSEC -> IDESECTN
-	LD	A,C
-	LD	(IDE_SEC),A
-	OUT	(IDESECTN),A
+	; SEND 3 BYTES OF LBA (HSTTRK:HSTSEC) T:SS -> CYL:SEC (CC:S)
+	LD	A,(HSTTRK)		; HSTTRK LSB
+	LD	(IDE_CYLHI),A		;   SAVE IT
+	OUT	(IDECYLHI),A		;   -> CYLINDER HI
+	LD	A,(HSTSEC + 1)		; HSTSEC MSB
+	LD	(IDE_CYLLO),A		;   SAVE IT
+	OUT	(IDECYLLO),A		;   -> CYLINDER LO
+	LD	A,(HSTSEC)		; HSTSEC LSB
+	LD	(IDE_SEC),A		;   SAVE IT
+	OUT	(IDESECTN),A		;   -> SECTOR NUM
 
 #IF (DSKYENABLE)
 	CALL	IDE_DSKY

Source/ide_dph.asm

@@ -1,61 +0,0 @@
-;
-;==================================================================================================
-;   IDE DISK DRIVER - DATA
-;==================================================================================================
-;
-IDE_SLICETRKS	.EQU	65			; TRACKS PER SLICE
-IDE_TRKSIZE	.EQU	128			; SIZE OF TRACK (IN KB)
-IDE_SLICESIZE	.EQU	((IDE_SLICETRKS * IDE_TRKSIZE) + 1023) / 1024 ; SIZE OF EACH SLICE (IN MB)
-IDE_NUMSLICES	.EQU	IDECAPACITY / IDE_SLICESIZE ; TOTAL SLICES IN DEVICE
-IDE0_SLICEDEF	.EQU	0			; DEFAULT SLICE FOR LOGICAL UNIT 0
-IDE1_SLICEDEF	.EQU	1			; DEFAULT SLICE FOR LOGICAL UNIT 1
-IDE2_SLICEDEF	.EQU	2			; DEFAULT SLICE FOR LOGICAL UNIT 2
-IDE3_SLICEDEF	.EQU	3			; DEFAULT SLICE FOR LOGICAL UNIT 3
-;
-		.DB	DIODEV_IDE + 0
-IDEDPH0 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	IDECSV0,IDEALV0
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-IDE0_SLICE	.DW	IDE0_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	IDE_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-		.DB	DIODEV_IDE + 0
-IDEDPH1 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	IDECSV1,IDEALV1
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-IDE1_SLICE	.DW	IDE1_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	IDE_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-		.DB	DIODEV_IDE + 0
-IDEDPH2 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	IDECSV2,IDEALV2
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-IDE2_SLICE	.DW	IDE2_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	IDE_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-		.DB	DIODEV_IDE + 0
-IDEDPH3 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	IDECSV3,IDEALV3
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-IDE3_SLICE	.DW	IDE3_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	IDE_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-IDECKS		.EQU	0			; CKS: 0 FOR NON-REMOVABLE MEDIA
-IDEALS		.EQU	256			; ALS: BLKS / 8 = 2048 / 8 = 256 (ROUNDED UP)
-;
-IDECSV0:	.FILL	IDECKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-IDEALV0:	.FILL	IDEALS			; MAX OF 2048 DATA BLOCKS
-IDECSV1:	.FILL	IDECKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-IDEALV1:	.FILL	IDEALS			; MAX OF 2048 DATA BLOCKS
-IDECSV2:	.FILL	IDECKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-IDEALV2:	.FILL	IDEALS			; MAX OF 2048 DATA BLOCKS
-IDECSV3:	.FILL	IDECKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-IDEALV3:	.FILL	IDEALS			; MAX OF 2048 DATA BLOCKS

Source/md.asm

@@ -30,10 +30,10 @@ MD_MEDIA:
 MD_INIT:
 	PRTS("MD: UNITS=2 $")
 	PRTS("ROMDISK=$")
-	LD	HL,ROMSIZE - 64
+	LD	HL,ROMSIZE - 96
 	CALL	PRTDEC
 	PRTS("KB RAMDISK=$")
-	LD	HL,RAMSIZE - 32 - 64
+	LD	HL,RAMSIZE - 128
 	CALL	PRTDEC
 	PRTS("KB$")
 	XOR	A		; INIT SUCCEEDED
@@ -49,7 +49,23 @@ MD_STATUS:
 ;
 MD_READ:
 	CALL	MD_IOSETUP	; SETUP FOR MEMORY COPY
-	JR	MD_BNKCPY	; DO IT AND RETURN
+#IF (MDTRACE >= 2)
+	LD	(MD_SRC),HL
+	LD	(MD_DST),DE
+	LD	(MD_LEN),BC
+#ENDIF
+	PUSH	BC
+	LD	C,A		; SOURCE BANK
+	LD	B,BID_HB	; DESTINATION BANK IS RAM BANK 1 (HBIOS)
+#IF (MDTRACE >= 2)
+	LD	(MD_SRCBNK),BC
+	CALL	MD_PRT
+#ENDIF
+	CALL	HBXX_XCOPY	; SET SRC AND DEST BANKS
+	POP	BC
+	CALL	HBXX_COPY	; DO THE INTERBANK COPY
+	XOR	A
+	RET
 ;
 ;
 ;
@@ -57,18 +73,27 @@ MD_WRITE:
 	LD	A,C		; DEVICE/UNIT IS IN C
 	AND	$0F		; ISOLATE UNIT NUM
 	LD	A,1		; PREPARE TO RETURN FALSE
+	;CALL	Z,PANIC
 	RET	Z		; RETURN ERROR IF ROM UNIT
 
 	CALL	MD_IOSETUP	; SETUP FOR MEMORY COPY
 	EX	DE,HL		; SWAP SRC/DEST FOR WRITE
-	JR	MD_BNKCPY	; DO IT AND RETURN
-;
-;
-;
-MD_BNKCPY:	
-	; DO THE MEMORY COPY
-	CALL	HB_BNKCPY	; COPY TO/FROM DMA BUFFER
-	XOR	A		; SET SUCCESS
+#IF (MDTRACE >= 2)
+	LD	(MD_SRC),HL
+	LD	(MD_DST),DE
+	LD	(MD_LEN),BC
+#ENDIF
+	PUSH	BC
+	LD	C,BID_HB	; SOURCE BANK IS RAM BANK 1 (HBIOS)
+	LD	B,A		; DESTINATION BANK
+#IF (MDTRACE >= 2)
+	LD	(MD_SRCBNK),BC
+	CALL	MD_PRT
+#ENDIF
+	CALL	HBXX_XCOPY	; SET SRC AND DEST BANKS
+	POP	BC
+	CALL	HBXX_COPY	; DO THE INTERBANK COPY
+	XOR	A
 	RET
 ;
 ; SETUP FOR MEMORY COPY
@@ -78,33 +103,118 @@ MD_BNKCPY:
 ;   HL=SOURCE
 ;
 ; ASSUMES A "READ" OPERATION.  HL AND DE CAN BE SWAPPED
-; FOR A WRITE OPERATION
+; AFTERWARDS TO ACHIEVE A WRITE OPERATION
+;
+; ON INPUT, WE HAVE LBA ADDRESSING IN TRK:SEC
+; BUT WE NEVER HAVE MORE THAN $FFFF BLOCKS IN A RAM/ROM DISK,
+; SO THE HIGH WORD (TRK) IS IGNORED
+;
+; SINCE EACH BANK IS 32K, YOU CAN THINK OF THE HSTSEC VALUE AS
+; 00000BBB:BBOOOOOO IS WHERE THE 'B' BITS REPRESENT THE BANK NUMBER
+; AND THE 'O' BITS REPRESENT THE SECTOR NUMBER
+;
+; FOR A RAM/ROM DISK, WE NEED TO ADDRESS THE BANK NUMBER AND THE BYTE
+; OFFSET WITHIN THE BANK.  MAPPING HSTSEC TO A BYTE OFFSET GIVES US
+; THIS: 00000BBB:BBOOOOOO:OOOOOOOOO.  THE 9 TRAILING OFFSET BITS REPRESENT
+; THE SECTOR CONTENTS AND ARE NOT "REAL" BITS.
+;
+; TO GET THE BANK NUMBER, WE CAN LEFT SHIFT TWICE TO GIVE US:
+; 000BBBBB:OOOOOOOO:OOOOOOO.  FROM THIS WE CAN EXTRACT THE MSB OF HSTTRK
+; TO USE AS THE BANK NUMBER.  NOTE THAT THE "RAW" BANK NUMBER MUST THEN
+; BE INCREMENTED PAST THE RESERVED AREAS OF THE RAM (2 BANKS) OR ROM (3 BANKS).
+; ALSO NOTE THAT THE HIGH BIT OF THE BANK NUMBER REPRESENTS "RAM" SO THIS
+; BIT MUST ALSO BE SET ACCORDING TO THE UNIT BEING ADDRESSED.
+;
+; TO GET THE BYTE OFFSET, WE CAN RIGHT SHIFT THE LSB BY 1 TO GIVE US:
+; 0OOOOOOO AND EXTRACT THE LSB OF THE HSTTRK TO REPRESENT THE MSB OF
+; THE BYTE OFFSET.  THE LSB OF THE BYTE OFFSET IS ALWAYS 0.
 ;
 MD_IOSETUP:
-	; SETUP A WITH BANK SELECTION VALUE
-	;   NOTE THAT HIGH ORDER BIT DETERMINES ROM/RAM ACCESS
-	;   THE OTHER BITS DETERMINE BANK NUMBER
-	LD	A,(HSTTRK)
-	INC	A			; OFFSET PAST RESERVED 32KB SYSTEM AREA OF RAM/ROM!
-	INC	A			; OFFSET ANOTHER 32K PAST DRIVER BANK
-	LD	C,A			; SAVE IT IN C
-	
-	LD	A,(HSTDSK)		; GET DEVICE/UNIT
-	AND	$01			; ISOLATE LOW BIT
-	RRCA				; MOVE IT TO HIGH BIT
-	OR	C			; COMBINE WITH SAVE PAGE NUM
-	PUSH	AF			; SAVE FOR LATER
-	
-	; SETUP HL WITH MEMORY BANK OFFSET BASED ON SECTOR INDEX
-	;   WE NEED TO MULTIPLY THE SECTOR INDEX (HSTSEC)
-	;   BY 512 TO GET THE MEMORY BANK OFFSET
-	LD	A,(HSTSEC)		; GET LSB OF SECTOR INTO A
-	RLCA				; SHIFT LEFT ONE BIT
-	LD	H,A			; PUT IN H
-	LD	L,0			; SET L TO ZERO
-
+	LD	HL,(HSTSEC)		; HL := LOW WORD OF LBA
+	; ALIGN BITS TO EXTRACT BANK NUMBER FROM H
+	SLA	L			; LEFT SHIFT ONE BIT
+	RL	H			;   FULL WORD
+	SLA	L			; LEFT SHIFT ONE BIT
+	RL	H			;   FULL WORD
+	LD	C,H			; BANK NUMBER FROM H TO C
+	; GET BANK NUM TO A AND SET FLAG Z=ROM, NZ=RAM
+	LD	A,(HSTDSK)		; DEVICE/UNIT TO A
+	AND	$01			; ISOLATE LOW BIT, SET ZF
+	LD	A,C			; BANK VALUE INTO A
+	PUSH	AF			; SAVE IT FOR NOW
+	; ADJUST L TO HAVE MSB OF OFFSET
+	SRL	L			; ADJUST L TO BE MSB OF BYTE OFFSET
+	LD	H,L			; MOVE MSB TO H WHERE IT BELONGS
+	LD	L,0			;   AND ZERO L SO HL IS NOW BYTE OFFSET
 	; LOAD DESTINATION AND COUNT
 	LD	DE,(DIOBUF)		; DMA ADDRESS IS DESTINATION
 	LD	BC,512			; ALWAYS COPY ONE SECTOR
-	POP	AF			; RECOVER PAGE VALUE
+	; FINISH UP
+	POP	AF			; GET BANK AND FLAGS BACK
+	JR	Z,MD_IOSETUP2		; DO ROM DRIVE, ELSE FALL THRU FOR RAM DRIVE
+;
+MD_IOSETUP1:	; RAM
+	ADD	A,BID_RAMD
 	RET
+;
+MD_IOSETUP2:	; ROM
+	ADD	A,BID_ROMD
+	RET
+;
+;
+;
+MD_PRT:
+	PUSH	AF
+	PUSH	BC
+	PUSH	DE
+	PUSH	HL
+
+	CALL	NEWLINE
+
+	LD	DE,MDSTR_PREFIX	
+	CALL	WRITESTR
+	
+	CALL	PC_SPACE
+	LD	DE,MDSTR_SRC
+	CALL	WRITESTR
+	LD	A,(MD_SRCBNK)
+	CALL	PRTHEXBYTE
+	CALL	PC_COLON
+	LD	BC,(MD_SRC)
+	CALL	PRTHEXWORD
+	
+	CALL	PC_SPACE
+	LD	DE,MDSTR_DST
+	CALL	WRITESTR
+	LD	A,(MD_DSTBNK)
+	CALL	PRTHEXBYTE
+	CALL	PC_COLON
+	LD	BC,(MD_DST)
+	CALL	PRTHEXWORD
+	
+	CALL	PC_SPACE
+	LD	DE,MDSTR_LEN
+	CALL	WRITESTR
+	LD	BC,(MD_LEN)
+	CALL	PRTHEXWORD
+	
+	POP	HL
+	POP	DE
+	POP	BC
+	POP	AF
+
+	RET
+;
+;
+;
+MD_SRCBNK	.DB	0
+MD_DSTBNK	.DB	0
+MD_SRC		.DW	0
+MD_DST		.DW	0
+MD_LEN		.DW	0
+;
+MDSTR_PREFIX	.TEXT	"MD:$"
+MDSTR_BANK	.TEXT	"BANK=$"
+MDSTR_SRC	.TEXT	"SRC=$"
+MDSTR_DST	.TEXT	"DEST=$"
+MDSTR_LEN	.TEXT	"LEN=$"

Source/md_dph.asm

@@ -1,35 +0,0 @@
-;
-;==================================================================================================
-;   HDSK DISK DRIVER - DATA
-;==================================================================================================
-;
-; MEMORY DISK 00: ROM DISK
-;
-ROMBLKS	.EQU	((ROMSIZE - 64) / 2)
-;
-		.DB	DIODEV_MD + 0
-MDDPH0 	 	.DW 	0000,0000
-	 	.DW 	0000,0000
-	 	.DW 	DIRBF,DPB_ROM
-	 	.DW 	MDCSV0,MDALV0
-;
-CKS_ROM	.EQU	0			; CKS: 0 FOR NON-REMOVABLE MEDIA
-ALS_ROM	.EQU	((ROMBLKS + 7) / 8)	; ALS: BLKS / 8 (ROUNDED UP)
-;
-; MEMORY DISK 01: RAM DISK
-;
-RAMBLKS	.EQU	((RAMSIZE - 96) / 2)
-;
-		.DB	DIODEV_MD + 1
-MDDPH1	 	.DW 	0000,0000
-	 	.DW 	0000,0000
-	 	.DW 	DIRBF,DPB_RAM
-	 	.DW 	MDCSV1,MDALV1
-;
-CKS_RAM	.EQU	0			; CKS: 0 FOR NON-REMOVABLE MEDIA
-ALS_RAM	.EQU	((RAMBLKS + 7) / 8)	; ALS: BLKS / 8 (ROUNDED UP)
-;
-MDCSV0:		.FILL	0		; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-MDALV0:		.FILL	ALS_ROM,00H	; MAX OF 512 DATA BLOCKS
-MDCSV1:		.FILL	0		; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-MDALV1:		.FILL	ALS_RAM,00H	; MAX OF 256 DATA BLOCKS

Source/memmgr.asm

@@ -3,53 +3,27 @@
 ;==================================================================================================
 ;
 ; PAGE THE REQUESTED 32K BLOCK OF RAM/ROM INTO THE LOWER 32K OF CPU ADDRESS SPACE.
-; LOAD DESIRED PAGE INDEX INTO A AND CALL EITHER RAMPG OR ROMPG AS DESIRED.
-; RAMPGZ AND ROMPGZ ARE SHORTCUTS TO PAGE IN THE RAM/ROM ZERO PAGE.
-;______________________________________________________________________________________________________________________
-;
-
-;______________________________________________________________________________________________________________________;
-; MACROS TO PERFORM RAM/ROM PAGE SELECTION INTO LOWER 32K OF MEMORY SPACE
-;   PGRAM(P)   SELECT RAM PAGE P
-;   PGRAMF(P)  SELECT RAM PAGE P, FAST VERSION ASSUMES CURRENT PAGE IS A RAM PAGE
-;   PGROM(P)   SELECT ROM PAGE P
-;   PGROMF(P)  SELECT ROM PAGE P, FAST VERSION ASSUMES CURRENT PAGE IS A ROM PAGE
-;
-;   REGISTER A IS DESTROYED
+; LOAD DESIRED PAGE INDEX INTO A AND CALL PGSEL.
 ;______________________________________________________________________________________________________________________
 ;
 
 #IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA))
-RAMPGZ:			; SELECT RAM PAGE ZERO
-	XOR	A
-RAMPG:
-	OR	80H	; TURN ON BIT 7 TO SELECT RAM PAGES
-	JR	PGSEL
-;
-ROMPGZ:			; SELECT ROM PAGE ZERO
-	XOR	A
-ROMPG:
-	AND	7FH	; TURN OFF BIT 7 TO SELECT ROM PAGES
-	JR	PGSEL
-;
 PGSEL:
 	OUT	(MPCL_ROM),A
 	OUT	(MPCL_RAM),A
 	RET
-;	
-  #DEFINE PGRAM(P)	LD A,P | 80H \ OUT (MPCL_ROM),A \ OUT (MPCL_RAM),A
-  #DEFINE PGRAMF(P)	LD A,P | 80H \ OUT (MPCL_RAM),A
 
-  #DEFINE PGROM(P)	LD A,P & 7FH \ OUT (MPCL_ROM),A \ OUT (MPCL_RAM),A
-  #DEFINE PGROMF(P)	LD A,P & 7FH \ OUT (MPCL_ROM),A
 #ENDIF
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 #IF (PLATFORM == PLT_N8)
-RAMPGZ:			; SELECT RAM PAGE ZERO
-	XOR	A
-RAMPG:
+PGSEL:
+	BIT	7,A
+	JR	Z,PGSEL_ROM
+;
+PGSEL_RAM:
+	RES	7,A
 	RLCA
 	RLCA
 	RLCA
@@ -58,9 +32,7 @@ RAMPG:
 	OUT0	(ACR),A
 	RET
 ;
-ROMPGZ:			; SELECT ROM PAGE ZERO
-	XOR	A
-ROMPG:
+PGSEL_ROM:
 	OUT0	(RMAP),A
 	XOR	A
 	OUT0	(CPU_BBR),A
@@ -68,11 +40,17 @@ ROMPG:
 	OUT0	(ACR),A
 	RET
 ;
-  #DEFINE PGRAM(P)	LD A,P << 3 \ OUT0 (CPU_BBR),A \ LD A,DEFACR | 80H \ OUT0 (ACR),A
-  #DEFINE PGRAMF(P)	LD A,P << 3 \ OUT0 (CPU_BBR),A
+#ENDIF
 
-  #DEFINE PGROM(P)	LD A,P \ OUT0 (RMAP),A \ XOR A \ OUT0 (CPU_BBR),A \ LD A,DEFACR \ OUT0 (ACR),A
-  #DEFINE PGROMF(P)	LD A,P \ OUT0 (RMAP),A
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+#IF (PLATFORM == PLT_MK4)
+PGSEL:
+	RLCA
+	RLCA
+	RLCA
+	OUT0	(CPU_BBR),A
+	RET
 #ENDIF
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -81,39 +59,8 @@ ROMPG:
 ;       ALL FUNCTIONALITY IS NULLED OUT HERE.
 ;
 #IF (PLATFORM == PLT_S2I)
-RAMPGZ:
-RAMPG:
-ROMPGZ:
-ROMPG:
 PGSEL:
 	RET
-;
-  #DEFINE PGRAM(P)	; NO BANKED MEMORY MANAGEMENT ON S2I
-  #DEFINE PGRAMF(P)	; NO BANKED MEMORY MANAGEMENT ON S2I
-
-  #DEFINE PGROM(P)	; NO BANKED MEMORY MANAGEMENT ON S2I
-  #DEFINE PGROMF(P)	; NO BANKED MEMORY MANAGEMENT ON S2I
-#ENDIF
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;
-; NOTE: S100 NEEDS TO BE FILLED IN!!!
-;       THIS IS JUST A PLACE HOLDER
-;
-
-#IF (PLATFORM == PLT_S100)
-RAMPGZ:
-RAMPG:
-ROMPGZ:
-ROMPG:
-PGSEL:
-	RET
-;
-  #DEFINE PGRAM(P)	; NO BANKED MEMORY MANAGEMENT ON S2I
-  #DEFINE PGRAMF(P)	; NO BANKED MEMORY MANAGEMENT ON S2I
-
-  #DEFINE PGROM(P)	; NO BANKED MEMORY MANAGEMENT ON S2I
-  #DEFINE PGROMF(P)	; NO BANKED MEMORY MANAGEMENT ON S2I
 #ENDIF
 
 ;;;;;;;;;;;;;;;;;;;;

Source/mk4.inc

@@ -0,0 +1,141 @@
+;
+; MARK IV HARDWARE DEFINITIONS
+;
+CPU_BASE	.EQU	$40		; ONLY RELEVANT FOR Z180
+;
+RAMBIAS		.EQU	512		; RAM STARTS AT 512K
+;
+MK4_BASE	.EQU	$80
+;
+MK4_IDE		.EQU	MK4_BASE + $00	; IDE REGISTERS ($00-$07, $0E-$0F)
+MK4_XAR		.EQU	MK4_BASE + $08	; EXTERNAL ADDRESS REGISTER (XAR)
+MK4_SD		.EQU	MK4_BASE + $09	; SD CARD CONTROL REGISTER
+MK4_RTC		.EQU	MK4_BASE + $0A	; RTC INTERFACE REGISTER
+;
+RTC		.EQU	MK4_RTC		; GENERIC ALIAS FOR RTC PORT
+;
+; DUMMY VALUES BELOW TO ALLOW DBGMON TO BUILD...
+; NEED TO REMOVE AND CLEAN THIS UP LATER.
+;
+PPIBASE		.EQU	$00
+PPIA		.EQU 	PPIBASE + 0	; PORT A
+PPIB		.EQU 	PPIBASE + 1	; PORT B
+PPIC		.EQU 	PPIBASE + 2	; PORT C
+PPIX	 	.EQU 	PPIBASE + 3	; PPI CONTROL PORT
+;
+; MEMORY BANK CONFIGURATION
+;
+#IF (PLATFORM == PLT_UNA)
+
+BID_BOOT	.EQU	$00		; HARDWARE COLD BOOT (SETUP)
+;		.EQU	$01		; UNA BIOS
+BID_COMIMG	.EQU	$02		; LOADER + CP/M IMAGE TO COPY TO BID_COM
+;		.EQU	$03		; UNA FATFS DRIVER
+BID_HBIMG	.EQU	$00		; NO HBIOS IMAGE FOR UNA
+BID_ROMD	.EQU	$05		; FIRST ROM DRIVE BANK
+BID_ROMDN	.EQU	$0F		; LAST ROM DRIVE BANK
+
+BID_RAMD	.EQU	$10		; START OF RAM DRIVE
+BID_RAMDN	.EQU	$1B		; LAST RAM DRIVE BANK
+
+BID_BPB		.EQU	$1C		; RESERVED FOR BPBIOS BANK
+BID_HB		.EQU	$00		; NO HBIOS FOR UNA
+;		.EQU	$1D		; SHADOW COPY OF UNABIOS IN RAM
+BID_USR		.EQU	$1E		; LOW 32K OF TPA
+BID_COM		.EQU	$1F		; COMMON BANK, UPPER 32K
+
+#ELSE
+
+#IFDEF UNALOAD
+
+BID_BOOT	.EQU	$00		; HARDWARE COLD BOOT (SETUP)
+BID_COMIMG	.EQU	$02		; LOADER + CP/M IMAGE TO COPY TO BID_COM
+BID_HBIMG	.EQU	$04		; HBIOS IMAGE TO COPY TO BID_HB
+BID_ROMD	.EQU	$05		; FIRST ROM DRIVE BANK
+
+#ELSE
+
+BID_BOOT	.EQU	$00		; HARDWARE COLD BOOT (SETUP)
+BID_COMIMG	.EQU	$00		; LOADER + CP/M IMAGE TO COPY TO BID_COM
+BID_HBIMG	.EQU	$01		; HBIOS IMAGE TO COPY TO BID_HB
+BID_ROMD	.EQU	$02		; FIRST ROM DRIVE BANK
+
+#ENDIF
+
+BID_ROMDN	.EQU	($00 + ((ROMSIZE / 32) - 1))	; LAST ROM DRIVE BANK
+BID_USR		.EQU	$10		; LOW 32K OF TPA
+BID_HB		.EQU	$11		; WORKING COPY OF HBIOS IN RAM
+BID_BPB		.EQU	$12		; BPBIOS BANK
+BID_RAMD	.EQU	$13		; START OF RAM DRIVE
+BID_RAMDN	.EQU	($10 + ((RAMSIZE / 32) - 2))	; LAST RAM DRIVE BANK
+BID_COM		.EQU	$1F		; COMMON BANK, UPPER 32K
+
+#ENDIF
+
+;
+; Z180 REGISTERS
+;
+CPU_CNTLA0	.EQU	CPU_BASE + $00	; ASCI0 CONTROL A
+CPU_CNTLA1	.EQU	CPU_BASE + $01	; ASCI1 CONTROL A
+CPU_CNTLB0	.EQU	CPU_BASE + $02	; ASCI0 CONTROL B
+CPU_CNTLB1	.EQU	CPU_BASE + $03	; ASCI1 CONTROL B
+CPU_STAT0	.EQU	CPU_BASE + $04	; ASCI0 STATUS
+CPU_STAT1	.EQU	CPU_BASE + $05	; ASCI1 STATUS
+CPU_TDR0	.EQU	CPU_BASE + $06	; ASCI0 TRANSMIT
+CPU_TDR1	.EQU	CPU_BASE + $07	; ASCI1 TRANSMIT
+CPU_RDR0	.EQU	CPU_BASE + $08	; ASCI0 RECEIVE
+CPU_RDR1	.EQU	CPU_BASE + $09	; ASCI1 RECEIVE
+CPU_CNTR	.EQU	CPU_BASE + $0A	; CSI/O CONTROL
+CPU_TRDR	.EQU	CPU_BASE + $0B	; CSI/O TRANSMIT/RECEIVE
+CPU_TMDR0L	.EQU	CPU_BASE + $0C	; TIMER 0 DATA LO
+CPU_TMDR0H	.EQU	CPU_BASE + $0D	; TIMER 0 DATA HI
+CPU_RLDR0L	.EQU	CPU_BASE + $0E	; TIMER 0 RELOAD LO
+CPU_RLDR0H	.EQU	CPU_BASE + $0F	; TIMER 0 RELOAD HI
+CPU_TCR		.EQU	CPU_BASE + $10	; TIMER CONTROL
+;	
+CPU_ASEXT0	.EQU	CPU_BASE + $12	; ASCI0 EXTENSION CONTROL (Z8S180)
+CPU_ASEXT1	.EQU	CPU_BASE + $13	; ASCI1 EXTENSION CONTROL (Z8S180)
+;
+CPU_TMDR1L	.EQU	CPU_BASE + $14	; TIMER 1 DATA LO
+CPU_TMDR1H	.EQU	CPU_BASE + $15	; TIMER 1 DATA HI
+CPU_RLDR1L	.EQU	CPU_BASE + $16	; TIMER 1 RELOAD LO
+CPU_RLDR1H	.EQU	CPU_BASE + $17	; TIMER 1 RELOAD HI
+CPU_FRC		.EQU	CPU_BASE + $18	; FREE RUNNING COUNTER
+
+CPU_ASTC0L	.EQU	CPU_BASE + $1A	; ASCI0 TIME CONSTANT LO (Z8S180)
+CPU_ASTC0H	.EQU	CPU_BASE + $1B	; ASCI0 TIME CONSTANT HI (Z8S180)
+CPU_ASTC1L	.EQU	CPU_BASE + $1C	; ASCI1 TIME CONSTANT LO (Z8S180)
+CPU_ASTC1H	.EQU	CPU_BASE + $1D	; ASCI1 TIME CONSTANT HI (Z8S180)
+CPU_CMR		.EQU	CPU_BASE + $1E	; CLOCK MULTIPLIER (LATEST Z8S180)
+CPU_CCR		.EQU	CPU_BASE + $1F	; CPU CONTROL (Z8S180)
+;
+CPU_SAR0L	.EQU	CPU_BASE + $20	; DMA0 SOURCE ADDR LO
+CPU_SAR0H	.EQU	CPU_BASE + $21	; DMA0 SOURCE ADDR HI
+CPU_SAR0B	.EQU	CPU_BASE + $22	; DMA0 SOURCE ADDR BANK
+CPU_DAR0L	.EQU	CPU_BASE + $23	; DMA0 DEST ADDR LO
+CPU_DAR0H	.EQU	CPU_BASE + $24	; DMA0 DEST ADDR HI
+CPU_DAR0B	.EQU	CPU_BASE + $25	; DMA0 DEST ADDR BANK
+CPU_BCR0L	.EQU	CPU_BASE + $26	; DMA0 BYTE COUNT LO
+CPU_BCR0H	.EQU	CPU_BASE + $27	; DMA0 BYTE COUNT HI
+CPU_MAR1L	.EQU	CPU_BASE + $28	; DMA1 MEMORY ADDR LO
+CPU_MAR1H	.EQU	CPU_BASE + $29	; DMA1 MEMORY ADDR HI
+CPU_MAR1B	.EQU	CPU_BASE + $2A	; DMA1 MEMORY ADDR BANK
+CPU_IAR1L	.EQU	CPU_BASE + $2B	; DMA1 I/O ADDR LO
+CPU_IAR1H	.EQU	CPU_BASE + $2C	; DMA1 I/O ADDR HI
+CPU_IAR1B	.EQU	CPU_BASE + $2D	; DMA1 I/O ADDR BANK (Z8S180)
+CPU_BCR1L	.EQU	CPU_BASE + $2E	; DMA1 BYTE COUNT LO
+CPU_BCR1H	.EQU	CPU_BASE + $2F	; DMA1 BYTE COUNT HI
+CPU_DSTAT	.EQU	CPU_BASE + $30	; DMA STATUS
+CPU_DMODE	.EQU	CPU_BASE + $31	; DMA MODE
+CPU_DCNTL	.EQU	CPU_BASE + $32	; DMA/WAIT CONTROL
+CPU_IL		.EQU	CPU_BASE + $33	; INTERRUPT VECTOR LOAD
+CPU_ITC		.EQU	CPU_BASE + $34	; INT/TRAP CONTROL
+;
+CPU_RCR		.EQU	CPU_BASE + $36	; REFRESH CONTROL
+;
+CPU_CBR		.EQU	CPU_BASE + $38	; MMU COMMON BASE REGISTER
+CPU_BBR		.EQU	CPU_BASE + $39	; MMU BANK BASE REGISTER
+CPU_CBAR	.EQU	CPU_BASE + $3A	; MMU COMMON/BANK AREA REGISTER
+;
+CPU_OMCR	.EQU	CPU_BASE + $3E	; OPERATION MODE CONTROL
+CPU_ICR		.EQU	$3F		; I/O CONTROL REGISTER (NOT RELOCATED!!!)

Source/n8.inc

@@ -1,76 +1,11 @@
 ;
-; Z180 REGISTERS
+; N8 HARDWARE DEFINITIONS
 ;
-CPU_BASE	.EQU	40H		; ONLY RELEVANT FOR Z180
+CPU_BASE	.EQU	$40		; ONLY RELEVANT FOR Z180
 ;
-CPU_CNTLA0	.EQU	CPU_BASE + $00	;ASCI0 control A
-CPU_CNTLA1:	.EQU	CPU_BASE+$01	;ASCI1 control A
-CPU_CNTLB0:	.EQU	CPU_BASE+$02	;ASCI0 control B
-CPU_CNTLB1:	.EQU	CPU_BASE+$03	;ASCI1 control B
-CPU_STAT0:	.EQU	CPU_BASE+$04	;ASCI0 status
-CPU_STAT1:	.EQU	CPU_BASE+$05	;ASCI1 status
-CPU_TDR0:	.EQU	CPU_BASE+$06	;ASCI0 transmit
-CPU_TDR1:	.EQU	CPU_BASE+$07	;ASCI1 transmit
-CPU_RDR0:	.EQU	CPU_BASE+$08	;ASCI0 receive
-CPU_RDR1:	.EQU	CPU_BASE+$09	;ASCI1 receive
-CPU_CNTR:	.EQU	CPU_BASE+$0A	;CSI/O control
-CPU_TRDR:	.EQU	CPU_BASE+$0B	;CSI/O transmit/receive
-CPU_TMDR0L:	.EQU	CPU_BASE+$0C	;Timer 0 data lo
-CPU_TMDR0H:	.EQU	CPU_BASE+$0D	;Timer 0 data hi
-CPU_RLDR0L:	.EQU	CPU_BASE+$0E	;Timer 0 reload lo
-CPU_RLDR0H:	.EQU	CPU_BASE+$0F	;Timer 0 reload hi
-CPU_TCR:	.EQU	CPU_BASE+$10	;Timer control
-;	
-CPU_ASEXT0:	.EQU	CPU_BASE+$12	;ASCI0 extension control (Z8S180)
-CPU_ASEXT1:	.EQU	CPU_BASE+$13	;ASCI1 extension control (Z8S180)
+RAMBIAS		.EQU	0		; RAM STARTS AT 0K
 ;
-CPU_TMDR1L:	.EQU	CPU_BASE+$14	;Timer 1 data lo
-CPU_TMDR1H:	.EQU	CPU_BASE+$15	;Timer 1 data hi
-CPU_RLDR1L:	.EQU	CPU_BASE+$16	;Timer 1 reload lo
-CPU_RLDR1H:	.EQU	CPU_BASE+$17	;Timer 1 reload hi
-CPU_FRC:	.EQU	CPU_BASE+$18	;Free running counter
-
-CPU_ASTC0L:	.EQU	CPU_BASE+$1A	;ASCI0 Time constant lo (Z8S180)
-CPU_ASTC0H:	.EQU	CPU_BASE+$1B	;ASCI0 Time constant hi (Z8S180)
-CPU_ASTC1L:	.EQU	CPU_BASE+$1C	;ASCI1 Time constant lo (Z8S180)
-CPU_ASTC1H:	.EQU	CPU_BASE+$1D	;ASCI1 Time constant hi (Z8S180)
-CPU_CMR:	.EQU	CPU_BASE+$1E	;Clock multiplier (latest Z8S180)
-CPU_CCR:	.EQU	CPU_BASE+$1F	;CPU control (Z8S180)
-;
-CPU_SAR0L:	.EQU	CPU_BASE+$20	;DMA0 source addr lo
-CPU_SAR0H:	.EQU	CPU_BASE+$21	;DMA0 source addr hi
-CPU_SAR0B:	.EQU	CPU_BASE+$22	;DMA0 source addr bank
-CPU_DAR0L:	.EQU	CPU_BASE+$23	;DMA0 dest addr lo
-CPU_DAR0H:	.EQU	CPU_BASE+$24	;DMA0 dest addr hi
-CPU_DAR0B:	.EQU	CPU_BASE+$25	;DMA0 dest addr bank
-CPU_BCR0L:	.EQU	CPU_BASE+$26	;DMA0 byte count lo
-CPU_BCR0H:	.EQU	CPU_BASE+$27	;DMA0 byte count hi
-CPU_MAR1L:	.EQU	CPU_BASE+$28	;DMA1 memory addr lo
-CPU_MAR1H:	.EQU	CPU_BASE+$29	;DMA1 memory addr hi
-CPU_MAR1B:	.EQU	CPU_BASE+$2A	;DMA1 memory addr bank
-CPU_IAR1L:	.EQU	CPU_BASE+$2B	;DMA1 I/O addr lo
-CPU_IAR1H:	.EQU	CPU_BASE+$2C	;DMA1 I/O addr hi
-CPU_IAR1B:	.EQU	CPU_BASE+$2D	;DMA1 I/O addr bank (Z8S180)
-CPU_BCR1L:	.EQU	CPU_BASE+$2E	;DMA1 byte count lo
-CPU_BCR1H:	.EQU	CPU_BASE+$2F	;DMA1 byte count hi
-CPU_DSTAT:	.EQU	CPU_BASE+$30	;DMA status
-CPU_DMODE:	.EQU	CPU_BASE+$31	;DMA mode
-CPU_DCNTL:	.EQU	CPU_BASE+$32	;DMA/WAIT control
-CPU_IL:		.EQU	CPU_BASE+$33	;Interrupt vector load
-CPU_ITC:	.EQU	CPU_BASE+$34	;INT/TRAP control
-;
-CPU_RCR:	.EQU	CPU_BASE+$36	;Refresh control
-;
-CPU_CBR:	.EQU	CPU_BASE+$38	;MMU common base register
-CPU_BBR:	.EQU	CPU_BASE+$39	;MMU bank base register
-CPU_CBAR	.EQU	CPU_BASE+$3A	;MMU common/bank area register
-;
-CPU_OMCR:	.EQU	CPU_BASE+$3E	;Operation mode control
-CPU_ICR:	.EQU	$3F		;I/O control register (not relocated!!!)
-;
-; N8 ONBOARD  I/O REGISTERS
-;
-N8_BASE		.EQU	$80
+N8_BASE		.EQU	$80		; CPU INTERNAL I/O REGISTER BASE (AFTER RELOCATION)
 ;
 PPIBASE		.EQU	N8_BASE + $00
 PPIA		.EQU 	PPIBASE + 0	; PORT A
@@ -84,12 +19,107 @@ PPI2B		.EQU 	PPI2BASE + 1	; PORT B
 PPI2C		.EQU 	PPI2BASE + 2	; PORT C
 PPI2X	 	.EQU 	PPI2BASE + 3	; PPI CONTROL PORT
 ;
-RTC:		.EQU	N8_BASE + $08	;RTC latch and buffer
-;FDC:		.EQU	N8_BASE + $0C	;Floppy disk controller
-;UTIL:		.EQU	N8_BASE + $10	;Floppy disk utility 
-ACR:		.EQU	N8_BASE + $14	;auxillary control register
-RMAP:		.EQU	N8_BASE + $16	;ROM page register
-VDP:		.EQU	N8_BASE + $18	;Video Display Processor (TMS9918A)
-PSG:		.EQU	N8_BASE + $1C	;Programmable Sound Generator (AY-3-8910)
+RTC:		.EQU	N8_BASE + $08	; RTC LATCH AND BUFFER
+;FDC:		.EQU	N8_BASE + $0C	; FLOPPY DISK CONTROLLER
+;UTIL:		.EQU	N8_BASE + $10	; FLOPPY DISK UTILITY 
+ACR:		.EQU	N8_BASE + $14	; AUXILLARY CONTROL REGISTER
+RMAP:		.EQU	N8_BASE + $16	; ROM PAGE REGISTER
+VDP:		.EQU	N8_BASE + $18	; VIDEO DISPLAY PROCESSOR (TMS9918A)
+PSG:		.EQU	N8_BASE + $1C	; PROGRAMMABLE SOUND GENERATOR (AY-3-8910)
 ;
 DEFACR		.EQU	$1B
+;
+; MEMORY BANK CONFIGURATION
+;
+#IFDEF UNALOAD
+BID_BOOT	.EQU	$00		; HARDWARE COLD BOOT (SETUP)
+BID_COMIMG	.EQU	$02             ; LOADER + CP/M IMAGE TO COPY TO BID_COM
+BID_HBIMG	.EQU	$04             ; HBIOS IMAGE TO COPY TO BID_HB
+BID_ROMD	.EQU	$05             ; FIRST ROM DRIVE BANK
+BID_ROMDN	.EQU	($00 + ((ROMSIZE / 32) - 1))	; LAST ROM DRIVE BANK
+BID_USR		.EQU	$80             ; LOW 32K OF TPA
+BID_HB		.EQU	$81             ; WORKING COPY OF HBIOS IN RAM
+BID_BPB		.EQU	$82             ; BPBIOS BANK
+BID_RAMD	.EQU	$83             ; START OF RAM DRIVE
+BID_RAMDN	.EQU	($80 + ((RAMSIZE / 32) - 2))	; LAST RAM DRIVE BANK
+BID_COM		.EQU	($80 + ((RAMSIZE / 32) - 1))	; COMMON BANK, UPPER 32K
+#ELSE
+BID_BOOT	.EQU	$00		; HARDWARE COLD BOOT (SETUP)
+BID_COMIMG	.EQU	$00             ; LOADER + CP/M IMAGE TO COPY TO BID_COM
+BID_HBIMG	.EQU	$01             ; HBIOS IMAGE TO COPY TO BID_HB
+BID_ROMD	.EQU	$02             ; FIRST ROM DRIVE BANK
+BID_ROMDN	.EQU	($00 + ((ROMSIZE / 32) - 1))	; LAST ROM DRIVE BANK
+BID_USR		.EQU	$80             ; LOW 32K OF TPA
+BID_HB		.EQU	$81             ; WORKING COPY OF HBIOS IN RAM
+BID_BPB		.EQU	$82             ; BPBIOS BANK
+BID_RAMD	.EQU	$83             ; START OF RAM DRIVE
+BID_RAMDN	.EQU	($80 + ((RAMSIZE / 32) - 2))	; LAST RAM DRIVE BANK
+BID_COM		.EQU	($80 + ((RAMSIZE / 32) - 1))	; COMMON BANK, UPPER 32K
+#ENDIF
+;
+; Z180 REGISTERS
+;
+CPU_CNTLA0	.EQU	CPU_BASE + $00	; ASCI0 CONTROL A
+CPU_CNTLA1	.EQU	CPU_BASE + $01	; ASCI1 CONTROL A
+CPU_CNTLB0	.EQU	CPU_BASE + $02	; ASCI0 CONTROL B
+CPU_CNTLB1	.EQU	CPU_BASE + $03	; ASCI1 CONTROL B
+CPU_STAT0	.EQU	CPU_BASE + $04	; ASCI0 STATUS
+CPU_STAT1	.EQU	CPU_BASE + $05	; ASCI1 STATUS
+CPU_TDR0	.EQU	CPU_BASE + $06	; ASCI0 TRANSMIT
+CPU_TDR1	.EQU	CPU_BASE + $07	; ASCI1 TRANSMIT
+CPU_RDR0	.EQU	CPU_BASE + $08	; ASCI0 RECEIVE
+CPU_RDR1	.EQU	CPU_BASE + $09	; ASCI1 RECEIVE
+CPU_CNTR	.EQU	CPU_BASE + $0A	; CSI/O CONTROL
+CPU_TRDR	.EQU	CPU_BASE + $0B	; CSI/O TRANSMIT/RECEIVE
+CPU_TMDR0L	.EQU	CPU_BASE + $0C	; TIMER 0 DATA LO
+CPU_TMDR0H	.EQU	CPU_BASE + $0D	; TIMER 0 DATA HI
+CPU_RLDR0L	.EQU	CPU_BASE + $0E	; TIMER 0 RELOAD LO
+CPU_RLDR0H	.EQU	CPU_BASE + $0F	; TIMER 0 RELOAD HI
+CPU_TCR		.EQU	CPU_BASE + $10	; TIMER CONTROL
+;	
+CPU_ASEXT0	.EQU	CPU_BASE + $12	; ASCI0 EXTENSION CONTROL (Z8S180)
+CPU_ASEXT1	.EQU	CPU_BASE + $13	; ASCI1 EXTENSION CONTROL (Z8S180)
+;
+CPU_TMDR1L	.EQU	CPU_BASE + $14	; TIMER 1 DATA LO
+CPU_TMDR1H	.EQU	CPU_BASE + $15	; TIMER 1 DATA HI
+CPU_RLDR1L	.EQU	CPU_BASE + $16	; TIMER 1 RELOAD LO
+CPU_RLDR1H	.EQU	CPU_BASE + $17	; TIMER 1 RELOAD HI
+CPU_FRC		.EQU	CPU_BASE + $18	; FREE RUNNING COUNTER
+
+CPU_ASTC0L	.EQU	CPU_BASE + $1A	; ASCI0 TIME CONSTANT LO (Z8S180)
+CPU_ASTC0H	.EQU	CPU_BASE + $1B	; ASCI0 TIME CONSTANT HI (Z8S180)
+CPU_ASTC1L	.EQU	CPU_BASE + $1C	; ASCI1 TIME CONSTANT LO (Z8S180)
+CPU_ASTC1H	.EQU	CPU_BASE + $1D	; ASCI1 TIME CONSTANT HI (Z8S180)
+CPU_CMR		.EQU	CPU_BASE + $1E	; CLOCK MULTIPLIER (LATEST Z8S180)
+CPU_CCR		.EQU	CPU_BASE + $1F	; CPU CONTROL (Z8S180)
+;
+CPU_SAR0L	.EQU	CPU_BASE + $20	; DMA0 SOURCE ADDR LO
+CPU_SAR0H	.EQU	CPU_BASE + $21	; DMA0 SOURCE ADDR HI
+CPU_SAR0B	.EQU	CPU_BASE + $22	; DMA0 SOURCE ADDR BANK
+CPU_DAR0L	.EQU	CPU_BASE + $23	; DMA0 DEST ADDR LO
+CPU_DAR0H	.EQU	CPU_BASE + $24	; DMA0 DEST ADDR HI
+CPU_DAR0B	.EQU	CPU_BASE + $25	; DMA0 DEST ADDR BANK
+CPU_BCR0L	.EQU	CPU_BASE + $26	; DMA0 BYTE COUNT LO
+CPU_BCR0H	.EQU	CPU_BASE + $27	; DMA0 BYTE COUNT HI
+CPU_MAR1L	.EQU	CPU_BASE + $28	; DMA1 MEMORY ADDR LO
+CPU_MAR1H	.EQU	CPU_BASE + $29	; DMA1 MEMORY ADDR HI
+CPU_MAR1B	.EQU	CPU_BASE + $2A	; DMA1 MEMORY ADDR BANK
+CPU_IAR1L	.EQU	CPU_BASE + $2B	; DMA1 I/O ADDR LO
+CPU_IAR1H	.EQU	CPU_BASE + $2C	; DMA1 I/O ADDR HI
+CPU_IAR1B	.EQU	CPU_BASE + $2D	; DMA1 I/O ADDR BANK (Z8S180)
+CPU_BCR1L	.EQU	CPU_BASE + $2E	; DMA1 BYTE COUNT LO
+CPU_BCR1H	.EQU	CPU_BASE + $2F	; DMA1 BYTE COUNT HI
+CPU_DSTAT	.EQU	CPU_BASE + $30	; DMA STATUS
+CPU_DMODE	.EQU	CPU_BASE + $31	; DMA MODE
+CPU_DCNTL	.EQU	CPU_BASE + $32	; DMA/WAIT CONTROL
+CPU_IL		.EQU	CPU_BASE + $33	; INTERRUPT VECTOR LOAD
+CPU_ITC		.EQU	CPU_BASE + $34	; INT/TRAP CONTROL
+;
+CPU_RCR		.EQU	CPU_BASE + $36	; REFRESH CONTROL
+;
+CPU_CBR		.EQU	CPU_BASE + $38	; MMU COMMON BASE REGISTER
+CPU_BBR		.EQU	CPU_BASE + $39	; MMU BANK BASE REGISTER
+CPU_CBAR	.EQU	CPU_BASE + $3A	; MMU COMMON/BANK AREA REGISTER
+;
+CPU_OMCR	.EQU	CPU_BASE + $3E	; OPERATION MODE CONTROL
+CPU_ICR		.EQU	$3F		; I/O CONTROL REGISTER (NOT RELOCATED!!!)

Source/n8vem.inc

@@ -1,13 +1,13 @@
 ;
 ; N8VEM HARDWARE IO PORT ADDRESSES AND MEMORY LOCATIONS
 ;
-MPCL_RAM	.EQU 	78H		; BASE IO ADDRESS OF RAM MEMORY PAGER CONFIGURATION LATCH
-MPCL_ROM	.EQU 	7CH		; BASE IO ADDRESS OF ROM MEMORY PAGER CONFIGURATION LATCH
-RTC		.EQU	70H		; ADDRESS OF RTC LATCH AND INPUT PORT
+MPCL_RAM	.EQU 	$78		; BASE IO ADDRESS OF RAM MEMORY PAGER CONFIGURATION LATCH
+MPCL_ROM	.EQU 	$7C		; BASE IO ADDRESS OF ROM MEMORY PAGER CONFIGURATION LATCH
+RTC		.EQU	$70		; ADDRESS OF RTC LATCH AND INPUT PORT
 ;
 ; PPI 82C55 I/O IS DECODED TO PORT 60-67
 ;
-PPIBASE		.EQU	60H
+PPIBASE		.EQU	$60
 PPIA		.EQU 	PPIBASE + 0	; PORT A
 PPIB		.EQU 	PPIBASE + 1	; PORT B
 PPIC		.EQU 	PPIBASE + 2	; PORT C
@@ -15,7 +15,7 @@ PPIX	 	.EQU 	PPIBASE + 3	; PPI CONTROL PORT
 ;
 ; 16C550 SERIAL LINE UART
 ;
-SIO_BASE	.EQU	68H
+SIO_BASE	.EQU	$68
 SIO_RBR		.EQU	SIO_BASE + 0	; DLAB=0: RCVR BUFFER REG (READ ONLY)
 SIO_THR		.EQU	SIO_BASE + 0	; DLAB=0: XMIT HOLDING REG (WRITE ONLY)
 SIO_IER		.EQU	SIO_BASE + 1	; DLAB=0: INT ENABLE REG
@@ -28,3 +28,31 @@ SIO_MSR		.EQU	SIO_BASE + 6	; MODEM STATUS REG
 SIO_SCR		.EQU	SIO_BASE + 7	; SCRATCH REGISTER
 SIO_DLL		.EQU	SIO_BASE + 0	; DLAB=1: DIVISOR LATCH (LS)
 SIO_DLM		.EQU	SIO_BASE + 1	; DLAB=1: DIVISOR LATCH (MS)
+;
+; MEMORY BANK CONFIGURATION
+;
+#IFDEF UNALOAD
+BID_BOOT	.EQU	$00		; HARDWARE COLD BOOT (SETUP)
+BID_COMIMG	.EQU	$02             ; LOADER + CP/M IMAGE TO COPY TO BID_COM
+BID_HBIMG	.EQU	$04             ; HBIOS IMAGE TO COPY TO BID_HB
+BID_ROMD	.EQU	$05             ; FIRST ROM DRIVE BANK
+BID_ROMDN	.EQU	($00 + ((ROMSIZE / 32) - 1))	; LAST ROM DRIVE BANK
+BID_USR		.EQU	$80             ; LOW 32K OF TPA
+BID_HB		.EQU	$81             ; WORKING COPY OF HBIOS IN RAM
+BID_BPB		.EQU	$82             ; BPBIOS BANK
+BID_RAMD	.EQU	$83             ; START OF RAM DRIVE
+BID_RAMDN	.EQU	($80 + ((RAMSIZE / 32) - 2))	; LAST RAM DRIVE BANK
+BID_COM		.EQU	$8F             ; COMMON BANK, UPPER 32K
+#ELSE
+BID_BOOT	.EQU	$00		; HARDWARE COLD BOOT (SETUP)
+BID_COMIMG	.EQU	$00             ; LOADER + CP/M IMAGE TO COPY TO BID_COM
+BID_HBIMG	.EQU	$01             ; HBIOS IMAGE TO COPY TO BID_HB
+BID_ROMD	.EQU	$02             ; FIRST ROM DRIVE BANK
+BID_ROMDN	.EQU	($00 + ((ROMSIZE / 32) - 1))	; LAST ROM DRIVE BANK
+BID_USR		.EQU	$80             ; LOW 32K OF TPA
+BID_HB		.EQU	$81             ; WORKING COPY OF HBIOS IN RAM
+BID_BPB		.EQU	$82             ; BPBIOS BANK
+BID_RAMD	.EQU	$83             ; START OF RAM DRIVE
+BID_RAMDN	.EQU	($80 + ((RAMSIZE / 32) - 2))	; LAST RAM DRIVE BANK
+BID_COM		.EQU	$8F             ; COMMON BANK, UPPER 32K
+#ENDIF

Source/pgzero.asm

@@ -1,11 +1,16 @@
 ;___PGZERO_____________________________________________________________________________________________________________
 ;
+#INCLUDE "std.asm"
+;
+
 	.ORG	0000H
 ;
 ; NORMAL PAGE ZERO SETUP, RET/RETI/RETN AS APPROPRIATE
 ;
 	.FILL	(000H - $),0FFH		; RST 0
 	JP	0100H			; JUMP TO BOOT CODE
+	.FILL	(004H - $),0FFH		; FILL TO START OF SIG PTR
+	.DW	ROM_SIG
 	.FILL	(008H - $),0FFH		; RST 8
 	RET
 	.FILL	(010H - $),0FFH		; RST 10
@@ -23,6 +28,20 @@
 	.FILL	(066H - $),0FFH		; NMI
 	RETN
 ;
+	.FILL	(070H - $),0FFH		; SIG STARTS AT $80
+;
+ROM_SIG:
+	.DB	$76, $B5		; 2 SIGNATURE BYTES
+	.DB	1			; STRUCTURE VERSION NUMBER
+	.DB	7			; ROM SIZE (IN MULTIPLES OF 4KB, MINUS ONE)
+	.DW	NAME			; POINTER TO HUMAN-READABLE ROM NAME
+	.DW	AUTH			; POINTER TO AUTHOR INITIALS
+	.DW	DESC			; POINTER TO LONGER DESCRIPTION OF ROM
+	.DB	0, 0, 0, 0, 0, 0	; RESERVED FOR FUTURE USE; MUST BE ZERO
+;
+NAME	.DB	"ROMWBW v", BIOSVER, ", ", BIOSBLD, ", ", TIMESTAMP, 0
+AUTH	.DB	"WBW",0
+DESC	.DB	"ROMWBW v", BIOSVER, ", Copyright 2014, Wayne Warthen, GNU GPL v3", 0
 	.FILL	(100H - $),0FFH
 ;
 	.END

Source/ppide.asm

@@ -459,21 +459,19 @@ PPIDE_SETUP1:
 	LD	(PPIDEP_HEAD),A		; SAVE HEAD VALUE
 	CALL	PPIDE_WRITE		; WRITE IT
 
-	LD	HL,(HSTTRK)		; HSTTRK -> IDECYLHI/LO
-	LD	C,PPIDE_CYL_MSB		; IDE MSB CYL REGISTER
-	LD	A,H			; MSB CYL VALUE
-	LD	(PPIDEP_CYLHI),A	; SAVE IT
-	CALL	PPIDE_WRITE		; WRITE IT
-	LD	C,PPIDE_CYL_LSB		; IDE LSB CYL REGISTER
-	LD	A,L			; LSB CYL VALUE
-	LD	(PPIDEP_CYLLO),A	; SAVE IT
-	CALL	PPIDE_WRITE		; WRITE IT
-
-	LD	HL,(HSTSEC)		; HSTSEC -> IDESECTN
-	LD	C,PPIDE_SECTOR		; IDE SECTOR REGISTER
-	LD	A,L			; SECTOR VALUE
-	LD	(PPIDEP_SEC),A		; SAVE IT
-	CALL	PPIDE_WRITE		; WRITE IT
+	; SEND 3 BYTES OF LBA (HSTTRK:HSTSEC) T:SS -> CYL:SEC (CC:S)
+	LD	A,(HSTTRK)		; HSTTRK LSB
+	LD	(PPIDEP_CYLHI),A	;   SAVE IT
+	LD	C,PPIDE_CYL_MSB		;   IDE CYL MSB REGISTER
+	CALL	PPIDE_WRITE		;   -> CYLINDER HI
+	LD	A,(HSTSEC + 1)		; HSTSEC MSB
+	LD	(PPIDEP_CYLLO),A	;   SAVE IT
+	LD	C,PPIDE_CYL_LSB		;   IDE CYL LSB REGISTER
+	CALL	PPIDE_WRITE		;   -> CYLINDER HI
+	LD	A,(HSTSEC)		; HSTSEC LSB
+	LD	(PPIDEP_SEC),A		;   SAVE IT
+	LD	C,PPIDE_SECTOR		;   IDE CYL LSB REGISTER
+	CALL	PPIDE_WRITE		;   -> CYLINDER HI
 
 #IF (DSKYENABLE)
 	CALL	PPIDE_DSKY

Source/ppide_dph.asm

@@ -1,61 +0,0 @@
-;
-;==================================================================================================
-;   PPIDE DISK DRIVER - DATA
-;==================================================================================================
-;
-PPIDE_SLICETRKS	.EQU	65				; TRACKS PER SLICE
-PPIDE_TRKSIZE	.EQU	128				; SIZE OF TRACK (IN KB)
-PPIDE_SLICESIZE	.EQU	((PPIDE_SLICETRKS * PPIDE_TRKSIZE) + 1023) / 1024 ; SIZE OF EACH SLICE (IN MB)
-PPIDE_NUMSLICES	.EQU	PPIDECAPACITY / PPIDE_SLICESIZE		; TOTAL SLICES IN DEVICE
-PPIDE0_SLICEDEF	.EQU	0				; DEFAULT SLICE FOR LOGICAL UNIT 0
-PPIDE1_SLICEDEF	.EQU	1				; DEFAULT SLICE FOR LOGICAL UNIT 1
-PPIDE2_SLICEDEF	.EQU	2				; DEFAULT SLICE FOR LOGICAL UNIT 2
-PPIDE3_SLICEDEF	.EQU	3				; DEFAULT SLICE FOR LOGICAL UNIT 3
-;
-		.DB	DIODEV_PPIDE + 0
-PPIDEDPH0 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	PPIDECSV0,PPIDEALV0
-		.DB	"LU"				; LOGICAL UNIT ENHANCEMENT SIGNATURE
-PPIDE0_SLICE	.DW	PPIDE0_SLICEDEF			; CURRENTLY ACTIVE SLICE
-		.DW	PPIDE_NUMSLICES			; NUMBER OF SLICES AVAILABLE
-;
-		.DB	DIODEV_PPIDE + 0
-PPIDEDPH1 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,0FFFFH
-		.DW 	PPIDECSV1,PPIDEALV1
-		.DB	"LU"				; LOGICAL UNIT ENHANCEMENT SIGNATURE
-PPIDE1_SLICE	.DW	PPIDE1_SLICEDEF			; CURRENTLY ACTIVE SLICE
-		.DW	PPIDE_NUMSLICES			; NUMBER OF SLICES AVAILABLE
-;
-		.DB	DIODEV_PPIDE + 0
-PPIDEDPH2 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,0FFFFH
-		.DW 	PPIDECSV2,PPIDEALV2
-		.DB	"LU"				; LOGICAL UNIT ENHANCEMENT SIGNATURE
-PPIDE2_SLICE	.DW	PPIDE2_SLICEDEF			; CURRENTLY ACTIVE SLICE
-		.DW	PPIDE_NUMSLICES			; NUMBER OF SLICES AVAILABLE
-;
-		.DB	DIODEV_PPIDE + 0
-PPIDEDPH3 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,0FFFFH
-		.DW 	PPIDECSV3,PPIDEALV3
-		.DB	"LU"				; LOGICAL UNIT ENHANCEMENT SIGNATURE
-PPIDE3_SLICE	.DW	PPIDE3_SLICEDEF			; CURRENTLY ACTIVE SLICE
-		.DW	PPIDE_NUMSLICES			; NUMBER OF SLICES AVAILABLE
-;
-PPIDECKS	.EQU	0				; CKS: 0 FOR NON-REMOVABLE MEDIA
-PPIDEALS	.EQU	256				; ALS: BLKS / 8 = 2048 / 8 = 256 (ROUNDED UP)
-;
-PPIDECSV0:	.FILL	PPIDECKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-PPIDEALV0:	.FILL	PPIDEALS			; MAX OF 2048 DATA BLOCKS
-PPIDECSV1:	.FILL	PPIDECKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-PPIDEALV1:	.FILL	PPIDEALS			; MAX OF 2048 DATA BLOCKS
-PPIDECSV2:	.FILL	PPIDECKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-PPIDEALV2:	.FILL	PPIDEALS			; MAX OF 2048 DATA BLOCKS
-PPIDECSV3:	.FILL	PPIDECKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-PPIDEALV3:	.FILL	PPIDEALS			; MAX OF 2048 DATA BLOCKS

Source/ppp.asm

@@ -300,21 +300,23 @@ PPPSD_CHKCARD:
 ;
 ; SET UP LBA BLOCK INDEX BASED ON HSTTRK AND HSTSEC
 ; NOTE THAT BYTE ORDER IS LITTLE ENDIAN FOR PROPLELLER!
-; SEE MAPPING IN COMMENTS
-; NOTE THAT HSTSEC:MSB IS UNUSED
 ;
 PPPSD_SETBLK:
-	LD	HL,PPP_LBA + 3		; WORK BACKWARDS, START WITH END OF LBA
-	XOR	A			; MSB OF LBA IS ALWAYS ZERO
-	LD	(HL),A			; LBAHI:MSB = 0
-	DEC	HL			; POINT TO NEXT BYTE
-	LD	DE,(HSTTRK)		; DE = HSTTRK
-	LD	(HL),D			; LBAHI:LSB = D = HSTTRK:MSB
-	DEC	HL			; POINT TO NEXT BYTE
-	LD	(HL),E			; LBALO:MSB = E = HSTTRK:LSB
-	DEC	HL			; POINT TO NEXT BYTE
-	LD	A,(HSTSEC)		; A = HSTSEC:LSB
-	LD	(HL),A			; LBALO:LSB = A = HSTSEC:LSB
+;	LD	HL,PPP_LBA + 3		; WORK BACKWARDS, START WITH END OF LBA
+;	XOR	A			; MSB OF LBA IS ALWAYS ZERO
+;	LD	(HL),A			; LBAHI:MSB = 0
+;	DEC	HL			; POINT TO NEXT BYTE
+;	LD	DE,(HSTTRK)		; DE = HSTTRK
+;	LD	(HL),D			; LBAHI:LSB = D = HSTTRK:MSB
+;	DEC	HL			; POINT TO NEXT BYTE
+;	LD	(HL),E			; LBALO:MSB = E = HSTTRK:LSB
+;	DEC	HL			; POINT TO NEXT BYTE
+;	LD	A,(HSTSEC)		; A = HSTSEC:LSB
+;	LD	(HL),A			; LBALO:LSB = A = HSTSEC:LSB
+	LD	HL,(HSTSEC)		; GET SECTOR
+	LD	(PPP_LBALO),HL		; SAVE IT IN LBA BUFFER LO
+	LD	HL,(HSTTRK)		; GET TRACK
+	LD	(PPP_LBAHI),HL		; SAVE IT IN LBA BUFFER HI
 	RET
 ;
 ; SEND INDEX OF BLOCK TO READ FROM SD CARD

Source/ppp_dph.asm

@@ -1,61 +0,0 @@
-;
-;==================================================================================================
-;   PPPSD DISK DRIVER - DATA
-;==================================================================================================
-;
-PPPSD_SLICETRKS	.EQU	65			; TRACKS PER SLICE
-PPPSD_TRKSIZE	.EQU	128			; SIZE OF TRACK (IN KB)
-PPPSD_SLICESIZE	.EQU	((PPPSD_SLICETRKS * PPPSD_TRKSIZE) + 1023) / 1024 ; SIZE OF EACH SLICE (IN MB)
-PPPSD_NUMSLICES	.EQU	PPPSDCAPACITY / PPPSD_SLICESIZE	 ; TOTAL SLICES IN DEVICE
-PPPSD0_SLICEDEF	.EQU	0			; DEFAULT SLICE FOR LOGICAL UNIT 0
-PPPSD1_SLICEDEF	.EQU	1			; DEFAULT SLICE FOR LOGICAL UNIT 1
-PPPSD2_SLICEDEF	.EQU	2			; DEFAULT SLICE FOR LOGICAL UNIT 2
-PPPSD3_SLICEDEF	.EQU	3			; DEFAULT SLICE FOR LOGICAL UNIT 3
-;
-		.DB	DIODEV_PPPSD + 0
-PPPSDDPH0 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	PPPSDCSV0,PPPSDALV0
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-PPPSD0_SLICE	.DW	PPPSD0_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	PPPSD_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-		.DB	DIODEV_PPPSD + 0
-PPPSDDPH1 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	PPPSDCSV1,PPPSDALV1
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-PPPSD1_SLICE	.DW	PPPSD1_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	PPPSD_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-		.DB	DIODEV_PPPSD + 0
-PPPSDDPH2 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	PPPSDCSV2,PPPSDALV2
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-PPPSD2_SLICE	.DW	PPPSD2_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	PPPSD_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-		.DB	DIODEV_PPPSD + 0
-PPPSDDPH3 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	PPPSDCSV3,PPPSDALV3
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-PPPSD3_SLICE	.DW	PPPSD3_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	PPPSD_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-PPPSDCKS	.EQU	0			; CKS: 0 FOR NON-REMOVABLE MEDIA
-PPPSDALS	.EQU	256			; ALS: BLKS / 8 = 2048 / 8 = 256 (ROUNDED UP)
-;
-PPPSDCSV0	.FILL	PPPSDCKS		; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-PPPSDALV0	.FILL	PPPSDALS		; MAX OF 2048 DATA BLOCKS
-PPPSDCSV1	.FILL	PPPSDCKS		; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-PPPSDALV1	.FILL	PPPSDALS		; MAX OF 2048 DATA BLOCKS
-PPPSDCSV2	.FILL	PPPSDCKS		; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-PPPSDALV2	.FILL	PPPSDALS		; MAX OF 2048 DATA BLOCKS
-PPPSDCSV3	.FILL	PPPSDCKS		; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-PPPSDALV3	.FILL	PPPSDALS		; MAX OF 2048 DATA BLOCKS

Source/prefix_una.asm

@@ -0,0 +1,89 @@
+;----------------------------------------------------------------------------
+;       PREFIX_UNA.ASM
+;
+;       PUT AT THE HEAD OF BOOT.BIN TO XFER TO A FLOPPY DISK
+;
+;----------------------------------------------------------------------------
+
+#INCLUDE "std.asm"
+
+BYT		.EQU	1	; used to describe METADATA_SIZE below
+WRD		.EQU	2
+
+SECTOR_SIZE	.EQU	512
+BLOCK_SIZE	.EQU	128
+PREFIX_SIZE	.EQU	(3 * SECTOR_SIZE)	; 3 SECTORS
+METADATA_SIZE	.EQU	BYT+WRD+(4*BYT)+16+BYT+WRD+WRD+WRD+WRD	; (as defined below)
+
+	.ORG	$8000
+	JR	BOOT
+;
+BOOT:
+	LD	DE,STR_LOAD	; LOADING STRING
+	CALL	PRTSTR		; PRINT
+	CALL	PRTDOT		; PROGRESS
+;
+	LD	BC,$0241	; UNIT=2, FUNCTION: SET LBA
+	LD	DE,0		; HI WORD ALWAYS ZERO
+	LD	HL,3		; IMAGE STARTS AT FOURTH SECTOR
+	CALL	$FFFD		; SET LBA
+	JR	NZ,ERROR	; HANDLE ERROR
+	CALL	PRTDOT		; PROGRESS
+;
+	LD	BC,$0242	; UNIT=2, FUNCTION: READ SECTORS
+	LD	DE,$D000	; STARTING ADDRESS FOR IMAGE
+	LD	L,22		; READ 22 SECTORS
+	CALL	$FFFD		; DO READ
+	JR	NZ,ERROR	; HANDLE ERROR
+	CALL	PRTDOT		; PROGRESS
+;
+	LD	DE,STR_DONE	; DONE MESSAGE
+	CALL	PRTSTR		; PRINT IT
+;
+	JP	CPM_ENT		; GO TO CPM
+;
+PRTSTR:
+	LD	BC,$0015	; UNIT 0, WRITE CHARS UNTIL TERMINATOR
+	LD	L,0		; TERMINATOR IS NULL
+	JP	$FFFD		; PRINT
+;
+PRTDOT:
+	LD	BC,$0012	; UNIT 0, WRITE CHAR
+	LD	E,'.'		; DOT
+	JP	$FFFD		; PRINT
+;
+ERROR:
+	LD	DE,STR_ERR	; POINT TO ERROR STRINT
+	JR	PRTSTR		; PRINT IT
+	HALT			; HALT
+;
+STR_LOAD	.DB	"\r\nLoading",0
+STR_DONE	.DB	"\r\n",0
+STR_ERR		.DB	" Read Error!",0
+;
+		.ORG	$ - $8000
+;
+		.FILL	(SECTOR_SIZE) - $ - 2
+		.DW	$AA55
+;
+		.FILL	((PREFIX_SIZE - BLOCK_SIZE) - $),00H
+PR_SIG		.DW	0A55AH				; SIGNATURE GOES HERE
+
+PR_PLATFORM	.DB	0	
+PR_DEVICE	.DB	0
+PR_FORMATTER	.DB	0,0,0,0,0,0,0,0
+PR_DRIVE	.DB	0
+PR_LOG_UNIT	.DW	0
+
+;
+		.FILL	((PREFIX_SIZE - METADATA_SIZE) - $),00H
+		.DB	0		; write protect boolean
+		.DW	0		; starting update number
+		.DB	RMJ,RMN,RUP,RTP
+		.DB	"Unlabeled Drive ","$"
+		.DW	0		; PTR TO LOCATION TO STORE DISKBOOT & BOOTDRIVE (SEE CNFGDATA)
+		.DW	CPM_LOC		; CCP START
+		.DW	CPM_END		; END OF CBIOS
+		.DW	CPM_ENT		; COLD BOOT LOCATION
+
+		.END

Source/prp.asm

@@ -17,14 +17,14 @@ PRP_INIT:
 ; PROPIO CONSOLE DRIVER
 ;==================================================================================================
 ;
-PRPCON_CMD	.EQU	$40	; PROPIO CONSOLE COMMAND PORT (WHEN WRITTEN)
-PRPCON_STATUS	.EQU	$40	; PROPIO CONSOLE STATUS PORT (WHEN READ)
-PRPCON_DATA	.EQU	$41	; PROPIO CONSOLE DATA PORT (READ=KBD, WRITE=DISPLAY)
+PRPCON_CMD	.EQU	PRPIOB + 0	; PROPIO CONSOLE COMMAND PORT (WHEN WRITTEN)
+PRPCON_STATUS	.EQU	PRPIOB + 0	; PROPIO CONSOLE STATUS PORT (WHEN READ)
+PRPCON_DATA	.EQU	PRPIOB + 1	; PROPIO CONSOLE DATA PORT (READ=KBD, WRITE=DISPLAY)
 ;
-PRPCON_BUSY	.EQU	$80	; BIT SET WHEN PROPIO CONSOLE INTERFACE IS BUSY
-PRPCON_ERR	.EQU	$40	; BIT SET WHEN PROPIO CONSOLE ERROR HAS OCCURRED
-PRPCON_KBDRDY	.EQU	$20	; BIT SET WHEN KEYBOARD BUF HAS A BYTE READY (BUF FULL)
-PRPCON_DSPRDY	.EQU	$10	; BIT SET WHEN DISPLAY BUF IS READY FOR A BYTE (BUF EMPTY)
+PRPCON_BUSY	.EQU	$80		; BIT SET WHEN PROPIO CONSOLE INTERFACE IS BUSY
+PRPCON_ERR	.EQU	$40		; BIT SET WHEN PROPIO CONSOLE ERROR HAS OCCURRED
+PRPCON_KBDRDY	.EQU	$20		; BIT SET WHEN KEYBOARD BUF HAS A BYTE READY (BUF FULL)
+PRPCON_DSPRDY	.EQU	$10		; BIT SET WHEN DISPLAY BUF IS READY FOR A BYTE (BUF EMPTY)
 ;
 ;
 ;
@@ -88,9 +88,9 @@ PRPCON_OST1:
 ;
 ; IO PORT ADDRESSES
 ;
-PRPSD_DSKCMD	.EQU	42H
-PRPSD_DSKST	.EQU	42H
-PRPSD_DSKIO	.EQU	43H
+PRPSD_DSKCMD	.EQU	PRPIOB + 2
+PRPSD_DSKST	.EQU	PRPIOB + 2
+PRPSD_DSKIO	.EQU	PRPIOB + 3
 ;
 PRPSD_CMDRESET	.EQU	10H
 PRPSD_CMDINIT	.EQU	20H
@@ -260,14 +260,22 @@ PRPSD_CHKCARD:
 ;
 PRPSD_SETBLK:
 	LD	DE,PRPSD_BLK + 3
-	LD	A,(HSTSEC)		; A = LSB OF OS SECTOR
+;	LD	A,(HSTSEC)		; A = LSB OF OS SECTOR
+;	CALL	PRPSD_SETBLK1
+;	LD	HL,(HSTTRK)		; GET OS TRACK VALUE
+;	LD	A,L			; EXTRACT LSB
+;	CALL	PRPSD_SETBLK1
+;	LD	A,H			; EXTRACT MSB
+;	CALL	PRPSD_SETBLK1
+;	XOR	A			; A = 0, NOT USED
+;	CALL	PRPSD_SETBLK1
+	LD	A,(HSTSEC)		; SECTOR LSB
 	CALL	PRPSD_SETBLK1
-	LD	HL,(HSTTRK)		; GET OS TRACK VALUE
-	LD	A,L			; EXTRACT LSB
+	LD	A,(HSTSEC + 1)		; SECTOR MSB
 	CALL	PRPSD_SETBLK1
-	LD	A,H			; EXTRACT MSB
+	LD	A,(HSTTRK)		; TRACK LSB
 	CALL	PRPSD_SETBLK1
-	XOR	A			; A = 0, NOT USED
+	LD	A,(HSTTRK + 1)		; TRACK MSB
 	CALL	PRPSD_SETBLK1
 	RET
 PRPSD_SETBLK1:

Source/prp_dph.asm

@@ -1,61 +0,0 @@
-;
-;==================================================================================================
-;   PRPSD DISK DRIVER - DATA
-;==================================================================================================
-;
-PRPSD_SLICETRKS	.EQU	65			; TRACKS PER SLICE
-PRPSD_TRKSIZE	.EQU	128			; SIZE OF TRACK (IN KB)
-PRPSD_SLICESIZE	.EQU	((PRPSD_SLICETRKS * PRPSD_TRKSIZE) + 1023) / 1024 ; SIZE OF EACH SLICE (IN MB)
-PRPSD_NUMSLICES	.EQU	PRPSDCAPACITY / PRPSD_SLICESIZE	 ; TOTAL SLICES IN DEVICE
-PRPSD0_SLICEDEF	.EQU	0			; DEFAULT SLICE FOR LOGICAL UNIT 0
-PRPSD1_SLICEDEF	.EQU	1			; DEFAULT SLICE FOR LOGICAL UNIT 1
-PRPSD2_SLICEDEF	.EQU	2			; DEFAULT SLICE FOR LOGICAL UNIT 2
-PRPSD3_SLICEDEF	.EQU	3			; DEFAULT SLICE FOR LOGICAL UNIT 3
-;
-		.DB	DIODEV_PRPSD + 0
-PRPSDDPH0 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	PRPSDCSV0,PRPSDALV0
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-PRPSD0_SLICE	.DW	PRPSD0_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	PRPSD_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-		.DB	DIODEV_PRPSD + 0
-PRPSDDPH1 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	PRPSDCSV1,PRPSDALV1
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-PRPSD1_SLICE	.DW	PRPSD1_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	PRPSD_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-		.DB	DIODEV_PRPSD + 0
-PRPSDDPH2 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	PRPSDCSV2,PRPSDALV2
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-PRPSD2_SLICE	.DW	PRPSD2_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	PRPSD_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-		.DB	DIODEV_PRPSD + 0
-PRPSDDPH3 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	PRPSDCSV3,PRPSDALV3
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-PRPSD3_SLICE	.DW	PRPSD3_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	PRPSD_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-PRPSDCKS	.EQU	0			; CKS: 0 FOR NON-REMOVABLE MEDIA
-PRPSDALS	.EQU	256			; ALS: BLKS / 8 = 2048 / 8 = 256 (ROUNDED UP)
-;
-PRPSDCSV0	.FILL	PRPSDCKS		; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-PRPSDALV0	.FILL	PRPSDALS		; MAX OF 2048 DATA BLOCKS
-PRPSDCSV1	.FILL	PRPSDCKS		; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-PRPSDALV1	.FILL	PRPSDALS		; MAX OF 2048 DATA BLOCKS
-PRPSDCSV2	.FILL	PRPSDCKS		; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-PRPSDALV2	.FILL	PRPSDALS		; MAX OF 2048 DATA BLOCKS
-PRPSDCSV3	.FILL	PRPSDCKS		; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-PRPSDALV3	.FILL	PRPSDALS		; MAX OF 2048 DATA BLOCKS

Source/rf_dph.asm

@@ -1,30 +0,0 @@
-;
-;==================================================================================================
-;   RF DISK DRIVER - DATA
-;==================================================================================================
-;
-; RAM FLOPPY 00
-;
-		.DB	DIODEV_RF + 0
-RFDPH0		.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_RF
-		.DW 	RFCSV0,RFALV0
-;
-; RAM FLOPPY 01
-;
-		.DB	DIODEV_RF + 1
-RFDPH1		.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_RF
-		.DW 	RFCSV1,RFALV1
-;
-RFCKS		.EQU	0		; CKS: 0 FOR NON-REMOVABLE MEDIA
-RFALS		.EQU	256		; ALS: BLKS / 8 = 2048 / 8 = 256 (ROUNDED UP)
-;
-; BUFFERS
-;
-RFCSV0:		.FILL	RFCKS		; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-RFALV0:		.FILL	RFALS		; MAX OF 2048 DATA BLOCKS
-RFCSV1:		.FILL	RFCKS		; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-RFALV1:		.FILL	RFALS		; MAX OF 2048 DATA BLOCKS

Source/rom0.asm

@@ -0,0 +1,112 @@
+;___ROM0_______________________________________________________________________________________________________________
+;
+; HARDWARE BOOTSTRAP
+;
+;   TEMPORARY HARDWARE BOOTSTRAP TO USE UNTIL JOHN COFFMAN'S
+;   VERSION IS READY.
+;______________________________________________________________________________________________________________________
+;
+;
+#INCLUDE "std.asm"
+;
+	.ORG	$0000
+;
+	DI			; NO INTERRUPTS
+	IM	1		; INTERRUPT MODE 1
+	LD	SP,$HBX_LOC	; START WITH SP BELOW HBIOS PROXY LOCATION
+;
+#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4))
+	; SET BASE FOR CPU IO REGISTERS
+   	LD	A,CPU_BASE
+	OUT0	(CPU_ICR),A
+	
+	; SET DEFAULT CPU CLOCK MULTIPLIERS (XTAL / 2)
+	XOR	A
+	OUT0	(CPU_CCR),A
+	OUT0	(CPU_CMR),A
+	
+	; SET DEFAULT WAIT STATES
+	LD	A,$F0
+	OUT0	(CPU_DCNTL),A
+
+#IF (Z180_CLKDIV >= 1)
+	; SET CLOCK DIVIDE TO 1 RESULTING IN FULL XTAL SPEED
+	LD	A,$80
+	OUT0	(CPU_CCR),A
+#ENDIF
+
+#IF (Z180_CLKDIV >= 2)
+	; SET CPU MULTIPLIER TO 1 RESULTINT IN XTAL * 2 SPEED
+	LD	A,$80
+	OUT0	(CPU_CMR),A
+#ENDIF
+	; SET DESIRED WAIT STATES
+	LD	A,0 + (Z180_MEMWAIT << 6) | (Z180_IOWAIT << 4)
+	OUT0	(CPU_DCNTL),A
+
+	; MMU SETUP
+	LD	A,$80
+	OUT0	(CPU_CBAR),A		; SETUP FOR 32K/32K BANK CONFIG
+	XOR	A
+	OUT0	(CPU_BBR),A		; BANK BASE = 0
+	LD	A,(RAMSIZE + RAMBIAS - 64) >> 2
+	OUT0	(CPU_CBR),A		; COMMON BASE = LAST (TOP) BANK
+#ENDIF
+;
+; EMIT FIRST SIGN OF LIFE TO SERIAL PORT
+;
+	CALL	XIO_INIT	; INIT SERIAL PORT
+	LD	HL,STR_BOOT	; POINT TO MESSAGE
+	CALL	XIO_OUTS	; SAY HELLO
+;
+; COPY OURSELF TO HIRAM
+;
+; NOTE: STACK IS WIPED OUT, STACK IS ASSUMED TO BE EMPTY HERE!!!!
+;
+	LD	HL,$0000	; COPY MEMORY FROM LOMEM (0000H)
+	LD	DE,$8000	; TO HIMEM (8000H)
+	LD	BC,COD_SIZ	; COPY CODE
+	LDIR
+;
+	CALL	XIO_DOT		; MARK PROGRESS
+;
+	JP	PHASE2		; JUMP TO PHASE 2 IN UPPER MEMORY
+;
+STR_BOOT	.DB	PLATFORM_NAME, '$'
+;
+; IMBED DIRECT SERIAL I/O ROUTINES
+;
+#INCLUDE "xio.asm"
+;
+;______________________________________________________________________________________________________________________
+;
+; THIS IS THE PHASE 2 CODE THAT MUST EXECUTE IN UPPER MEMORY
+;
+	.ORG	$ + $8000	; WE ARE NOW EXECUTING IN UPPER MEMORY
+;
+PHASE2:
+	CALL	XIO_DOT		; MARK PROGRESS
+	CALL	XIO_CRLF	; FINISH LINE
+	CALL	XIO_CRLF	; A BLANK LINE FOR SPACING
+;
+; SWAP LOMEM TO BANK 1 AND CHAIN TO $0000
+;
+;	LD	A,1		; SPECIFY PAGE 1
+;	CALL	ROMPG		; PUT ROM PAGE 1 IN LOW RAM
+	LD	A,BID_COMIMG	; CHAIN TO COMMON IMAGE IN ROM
+	CALL	PGSEL		; SELECT THE PAGE
+	JP	$0000		; CHAIN EXECUTION TO IT
+;______________________________________________________________________________________________________________________
+;
+; NOTE THAT MEMORY MANAGER CODE IS IN UPPER MEMORY!
+;
+#INCLUDE "memmgr.asm"
+;______________________________________________________________________________________________________________________
+;
+; PAD OUT REMAINDER OF PAGE
+;
+	.ORG	$ - $8000	; ORG BACK TO LOWER MEMORY
+COD_SIZ	.EQU	$		; SIZE OF CODE
+	.FILL	$8000 - $,$FF	; PAD OUT REMAINDER OF ROM SPACE
+;
+	.END

Source/sd.asm

@@ -3,14 +3,14 @@
 ;   SD/SDHC/SDXC CARD STORAGE DRIVER
 ;=============================================================================
 ;
-;----------------------------------------------------------------------
-; SD Signal	Active	JUHA	N8	CSIO	PPI	UART	DSD
-; ------------	-------	-------	-------	-------	-------	-------	-------
-; CS (DAT3)	LO ->	RTC:2	RTC:2	RTC:2	~PC:4	MCR:3	OPR:2
-; CLK		HI ->	RTC:1	RTC:1	N/A	PC:1	~MCR:2	OPR:1
-; DI (CMD)	HI ->	RTC:0	RTC:0	N/A	PC:0	~MCR:0	OPR:0
-; DO (DAT0)	HI ->	RTC:7	RTC:6	N/A	PB:7	~MSR:5	OPR:0
-;----------------------------------------------------------------------
+;------------------------------------------------------------------------------
+; SD Signal	Active	JUHA	N8	CSIO	PPI	UART	DSD    MK4
+; ------------	-------	-------	-------	-------	-------	-------	-------	-------
+; CS (DAT3)	LO ->	RTC:2	RTC:2	RTC:2	~PC:4	~MCR:3	OPR:2  MK4_SD:2
+; CLK		HI ->	RTC:1	RTC:1	N/A	PC:1	~MCR:2	OPR:1  N/A
+; DI (CMD)	HI ->	RTC:0	RTC:0	N/A	PC:0	~MCR:0	OPR:0  N/A
+; DO (DAT0)	HI ->	RTC:7	RTC:6	N/A	PB:7	~MSR:5	OPR:0  N/A
+;------------------------------------------------------------------------------
 ;
 ; CS = CHIP SELECT (AKA DAT3 FOR NON-SPI MODE)
 ; CLK = CLOCK
@@ -25,7 +25,7 @@
 ;
 ;   2) THE QUIESCENT STATE OF THE OUTPUT SIGNALS (HOST -> CARD) IS:
 ;      CS = HI (NOT SELECTED)
-;      CLK = LO
+;      CLK = LO (HI FOR CSIO)
 ;      DI = HI (ACTIVE IS THE NATURAL/DEFAULT STATE FOR DATA IN)
 ;
 ;   3) SPI MODE 0 IMPLEMENTATION IS USED (CPOL=0, CPHA=0)
@@ -35,6 +35,11 @@
 ;      THE CLOCK IS LOW. THE DATA IS CAPTURED ON THE CLOCK'S LOW-TO-HIGH
 ;      TRANSITION AND PROPAGATED ON HIGH-TO-LOW CLOCK TRANSITION.
 ;
+;      NOTE: THE CSIO IMPLEMENTATION (INCLUDE MK4) USES SPI MODE 4
+;      (CPOL=1, CPHA=1) BECAUSE THAT IS THE WAY THAT THE Z180 CSIO
+;      INTERFACE WORKS.  ALL OF THE CLOCK TRANSITIONS LISTED ABOVE
+;      ARE REVERSED FOR CSIO.
+;
 ;   4) DI SHOULD BE LEFT HI (ACTIVE) WHENEVER UNUSED (FOR EXAMPLE, WHEN
 ;      HOST IS RECEIVING DATA (HOST <- CARD)).
 ;
@@ -86,8 +91,9 @@ SD_DO		.EQU	%10000000	; PPIB:7 IS DATA OUT (CARD -> CPU)
 ;
 #IF (SDMODE == SDMODE_UART)
 SD_UNITCNT	.EQU	1		; NUMBER OF PHYSICAL UNITS (SOCKETS)
-SD_MCR		.EQU	SIO_MCR		; UART MCR PORT (OUTPUT: CS, CLK, DIN)
-SD_MSR		.EQU	SIO_MSR		; UART MSR PORT (INPUT: DOUT)
+SD_OPRREG	.EQU	SIO_MCR		; UART MCR PORT (OUTPUT: CS, CLK, DIN)
+SD_OPRDEF	.EQU	%00001100	; QUIESCENT STATE
+SD_INPREG	.EQU	SIO_MSR		; INPUT REGISTER IS MSR
 SD_CS		.EQU	%00001000	; UART MCR:3 IS SELECT
 SD_CLK		.EQU	%00000100	; UART MCR:2 IS CLOCK
 SD_DI		.EQU	%00000001	; UART MCR:0 IS DATA IN (CARD <- CPU)
@@ -107,6 +113,15 @@ SD_DI		.EQU	%00000001	; RTC:6 IS DATA IN (CARD <- CPU)
 SD_DO		.EQU	%00000001	; RTC:0 IS DATA OUT (CARD -> CPU)
 #ENDIF
 ;
+#IF (SDMODE == SDMODE_MK4)		; MARK IV (CSIO STYLE INTERFACE)
+SD_UNITCNT	.EQU	1		; NUMBER OF PHYSICAL UNITS (SOCKETS)
+SD_OPRREG	.EQU	MK4_SD		; DEDICATED MK4 SDCARD REGISTER
+SD_OPRDEF	.EQU	%00000000	; QUIESCENT STATE
+SD_CS		.EQU	%00000100	; SELECT ACTIVE
+SD_CNTR		.EQU	CPU_CNTR
+SD_TRDR		.EQU	CPU_TRDR
+#ENDIF
+;
 ; SD CARD COMMANDS
 ;
 SD_CMD0		.EQU	$40 | 0		; 0x40, GO_IDLE_STATE
@@ -194,7 +209,7 @@ SD_INIT:
   #IF (SDCSIOFAST)
 	PRTS(" FAST$")
   #ENDIF
-	PRTS(" IO=0x$")
+	PRTS(" OPR=0x$")
 	LD	A,SD_OPRREG
 	CALL	PRTHEXBYTE
 	PRTS(" CNTR=0x$")
@@ -215,10 +230,10 @@ SD_INIT:
 #IF (SDMODE == SDMODE_UART)
 	PRTS(" MODE=UART$")
 	PRTS(" MCR=0x$")
-	LD	A,SD_MCR
+	LD	A,SIO_MCR
 	CALL	PRTHEXBYTE
 	PRTS(" MSR=0x$")
-	LD	A,SD_MSR
+	LD	A,SIO_MSR
 	CALL	PRTHEXBYTE
 #ENDIF
 ;
@@ -231,6 +246,22 @@ SD_INIT:
 	LD	A,SD_SELREG
 	CALL	PRTHEXBYTE
 #ENDIF
+;
+#IF (SDMODE == SDMODE_MK4)
+	PRTS(" MODE=MK4$")
+  #IF (SDCSIOFAST)
+	PRTS(" FAST$")
+  #ENDIF
+	PRTS(" OPR=0x$")
+	LD	A,SD_OPRREG
+	CALL	PRTHEXBYTE
+	PRTS(" CNTR=0x$")
+	LD	A,SD_CNTR
+	CALL	PRTHEXBYTE
+	PRTS(" TRDR=0x$")
+	LD	A,SD_TRDR
+	CALL	PRTHEXBYTE
+#ENDIF
 ;
 	LD	A,SD_STNOTRDY
 	LD	HL,SD_STATLST
@@ -319,13 +350,13 @@ SD_SELUNIT:
 ;
 SD_SETUP:
 ;
-#IF ((SDMODE == SDMODE_JUHA) | (SDMODE == SDMODE_N8))
+#IF ((SDMODE == SDMODE_JUHA) | (SDMODE == SDMODE_N8) | (SDMODE == SDMODE_DSD))
 	LD	A,SD_OPRDEF
 	LD	(SD_OPRVAL),A
 	OUT	(SD_OPRREG),A
 #ENDIF
 ;
-#IF (SDMODE == SDMODE_CSIO)
+#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4))
 	; CSIO SETUP
 ;	LD	A,2			; 18MHz/20 <= 400kHz
 	LD	A,6			; ???
@@ -338,25 +369,21 @@ SD_SETUP:
 #IF (SDMODE == SDMODE_PPI)
 	LD	A,82H			; PPI PORT A=OUT, B=IN, C=OUT
 	OUT	(PPIX),A
-	;LD	A,30H			; PC4,5 /CS HIGH
 	LD	A,SD_OPRDEF
 	LD	(SD_OPRVAL),A
 	OUT	(SD_OPRREG),A
 #ENDIF
 ;
 #IF (SDMODE == SDMODE_UART)
-	IN	A,(SD_MCR)
-	OR	SD_CS			; DEASSERT = HI = 1
-	AND	~SD_DI			; ASSERT DIN = LO = 0 (INVERTED)
-	AND	~SD_CLK			; DEASSERT CLK = HI = 1 (INVERTED)
-	OUT	(SD_MCR),A
+SD_OPRMSK	.EQU	(SD_CS | SD_CLK | SD_DI)
+	IN	A,(SD_OPRREG)		; OPRREG == SIO_MCR
+	AND	~SD_OPRMSK		; MASK OFF SD CONTROL BITS
+	OR	SD_OPRDEF		; SET DEFAULT BITS
+	LD	(SD_OPRVAL),A		; RECORD THE WORKING VALLUE
+	OUT	(SD_OPRREG),A		; OPRREG == SIO_MCR
 #ENDIF
 ;
-#IF (SDMODE == SDMODE_DSD)
-	LD	A,SD_OPRDEF
-	LD	(SD_OPRVAL),A
-	OUT	(SD_OPRREG),A
-;
+#IF ((SDMODE == SDMODE_DSD) | (SDMODE == SDMODE_MK4))
 	IN	A,(SD_OPRREG)
 	BIT	5,A			; CARD DETECT
 	JP	Z,SD_NOMEDIA		; NO MEDIA DETECTED
@@ -369,7 +396,7 @@ SD_SETUP:
 ;
 SD_SELECT:
 	LD	A,(SD_OPRVAL)
-#IF (SDMODE == SDMODE_PPI)
+#IF ((SDMODE == SDMODE_PPI) | (SDMODE == SDMODE_UART))
 	AND	~SD_CS		; SET SD_CS (CHIP SELECT)
 #ELSE
 	OR	SD_CS		; SET SD_CS (CHIP SELECT)
@@ -382,7 +409,7 @@ SD_SELECT:
 ;
 SD_DESELECT:
 	LD	A,(SD_OPRVAL)
-#IF (SDMODE == SDMODE_PPI)
+#IF ((SDMODE == SDMODE_PPI) | (SDMODE == SDMODE_UART))
 	OR	SD_CS		; RESET SD_CS (CHIP SELECT)
 #ELSE
 	AND	~SD_CS		; RESET SD_CS (CHIP SELECT)
@@ -394,49 +421,50 @@ SD_DESELECT:
 ; CHECK FOR WRITE PROTECT (NZ = WRITE PROTECTED)
 ;
 SD_CHKWP:
-	XOR	A		; ASSUME NOT WRITE PROTECTED
-#IF (SDMODE == SDMODE_DSD)
+#IF ((SDMODE == SDMODE_DSD) | (SDMODE == SDMODE_MK4))
 	IN	A,(SD_OPRREG)
 	BIT	4,A
+#ELSE
+	XOR	A
 #ENDIF
 	RET
 ;
 ;
 ;
-#IF (SDMODE == SDMODE_CSIO)
+#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4))
 SD_WAITTX:			; WAIT FOR TX EMPTY	
-	IN0	A,(SD_CNTR)	; get CSIO status
-	BIT	4,A		; Tx empty?
+	IN0	A,(SD_CNTR)	; GET CSIO STATUS
+	BIT	4,A		; TX EMPTY?
 	JR	NZ,SD_WAITTX
 	RET
 ;
 ;
 ;
 SD_WAITRX:
-	IN0	A,(SD_CNTR)	; wait for receiver to finish
+	IN0	A,(SD_CNTR)	; WAIT FOR RECEIVER TO FINISH
 	BIT	5,A
 	JR	NZ,SD_WAITRX
 	RET
 ;
 ;
 ;
-MIRROR:				; MSB<-->LSB mirror bits in A, result in C
-  #IF (!SDCSIOFAST)		; slow speed, least code space
-	LD      B,8		; bit counter
+MIRROR:				; MSB<-->LSB MIRROR BITS IN A, RESULT IN C
+  #IF (!SDCSIOFAST)		; SLOW SPEED, LEAST CODE SPACE
+	LD      B,8		; BIT COUNTER
 MIRROR1:
-	RLA			; rotate bit 7 into carry
-	RR	C		; rotate carry into result
-	DJNZ	MIRROR1		; do all 8 bits
+	RLA			; ROTATE BIT 7 INTO CARRY
+	RR	C		; ROTATE CARRY INTO RESULT
+	DJNZ	MIRROR1		; DO ALL 8 BITS
 	RET
-  #ELSE				; fastest but uses most code space
-	LD	BC,MIRTAB	; 256 byte mirror table
-	ADD	A,C		; add offset
+  #ELSE				; FASTEST BUT USES MOST CODE SPACE
+	LD	BC,MIRTAB	; 256 BYTE MIRROR TABLE
+	ADD	A,C		; ADD OFFSET
 	LD	C,A
 	JR	NC,MIRROR2
 	INC	B
 MIRROR2:
-	LD	A,(BC)		; get result
-	LD	C,A		; return result in C
+	LD	A,(BC)		; GET RESULT
+	LD	C,A		; RETURN RESULT IN C
 	RET
   #ENDIF
 ;
@@ -461,14 +489,17 @@ MIRTAB:	.DB 00H, 80H, 40H, 0C0H, 20H, 0A0H, 60H, 0E0H, 10H, 90H, 50H, 0D0H, 30H,
 ; SEND ONE BYTE
 ;
 SD_PUT:
-#IF (SDMODE == SDMODE_CSIO)
-	CALL	MIRROR		; MSB<-->LSB mirror bits, result in C
+#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4))
+	CALL	MIRROR		; MSB<-->LSB MIRROR BITS, RESULT IN C
 	CALL	SD_WAITTX	; MAKE SURE WE ARE DONE SENDING
-	OUT0	(SD_TRDR),C	; put byte in buffer
+	OUT0	(SD_TRDR),C	; PUT BYTE IN BUFFER
 	IN0	A,(SD_CNTR)
-	SET	4,A		; set transmit enable
+	SET	4,A		; SET TRANSMIT ENABLE
 	OUT0	(SD_CNTR),A
 #ELSE
+#IF (SDMODE == SDMODE_UART)
+	XOR	$FF		; DI IS INVERTED ON UART
+#ENDIF
 	LD	C,A		; C=BYTE TO SEND
 	LD	B,8		; SEND 8 BITS (LOOP 8 TIMES)
 	LD	A,(SD_OPRVAL)	; LOAD CURRENT OPR VALUE
@@ -490,15 +521,15 @@ SD_PUT1:
 ; RECEIVE ONE BYTE
 ;
 SD_GET:
-#IF (SDMODE == SDMODE_CSIO)
+#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4))
 	CALL	SD_WAITTX	; MAKE SURE WE ARE DONE SENDING
-	IN0	A,(CPU_CNTR)	; get CSIO status
-	SET	5,A		; start receiver
+	IN0	A,(CPU_CNTR)	; GET CSIO STATUS
+	SET	5,A		; START RECEIVER
 	OUT0	(CPU_CNTR),A
 	CALL	SD_WAITRX
-	IN0	A,(CPU_TRDR)	; get received byte
-	CALL	MIRROR		; MSB<-->LSB mirror bits
-	LD	A,C		; keep result
+	IN0	A,(CPU_TRDR)	; GET RECEIVED BYTE
+	CALL	MIRROR		; MSB<-->LSB MIRROR BITS
+	LD	A,C		; KEEP RESULT
 #ELSE
 	LD	B,8		; RECEIVE 8 BITS (LOOP 8 TIMES)
 	LD	A,(SD_OPRVAL)	; LOAD CURRENT OPR VALUE
@@ -513,6 +544,11 @@ SD_GET1:
 	RLA			; ROTATE INP:6 INTO CF
 	RLA			; "
   #ENDIF
+  #IF (SDMODE == SDMODE_UART)
+	RLA			; ROTATE INP:5 INTO CF
+	RLA			; "
+	RLA			; "
+  #ENDIF
   #IF (SDMODE == SDMODE_DSD)
 	RRA			; ROTATE INP:0 INTO CF
   #ENDIF
@@ -521,6 +557,9 @@ SD_GET1:
 	OUT	(SD_OPRREG),A	; DO IT
 	DJNZ	SD_GET1		; REPEAT FOR ALL 8 BITS
 	LD	A,C		; GET BYTE RECEIVED INTO A
+#IF (SDMODE == SDMODE_UART)
+	XOR	$FF		; DO IS INVERTED ON UART
+#ENDIF
 #ENDIF
 	RET
 ;
@@ -752,7 +791,7 @@ SD_INITCARD000:
 	; PUT CARD IN IDLE STATE
 	CALL	SD_GOIDLE
 	RET	NZ			; FAILED
-	
+
 SD_INITCARD00:
 	LD	A,SD_TYPESDSC		; ASSUME SDSC CARD TYPE
 	LD	HL,(SD_TYPEPTR)		; LOAD THE CARD TYPE ADDRESS
@@ -851,7 +890,7 @@ SD_INITCARD21:
 	CALL	PRTHEXBYTE
 #ENDIF
 
-#IF (SDMODE == SDMODE_CSIO)
+#IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4))
 	CALL	SD_WAITTX	; MAKE SURE WE ARE DONE SENDING
 	XOR	A		; NOW SET CSIO PORT TO FULL SPEED
 	OUT	(CPU_CNTR),A
@@ -1067,27 +1106,29 @@ SD_SETADDR:
 	JR	Z,SD_SETADDRSDHC
 	CALL	PANIC
 
+;
+; SDSC CARDS USE A BYTE OFFSET
+;
+; TT:SS = BC:DE -> TS:S0, THEN LEFT SHIFT ONE BIT
 SD_SETADDRSDSC:
-	LD	HL,(HSTSEC)
+	LD	BC,(HSTTRK)
+	LD	DE,(HSTSEC)
+	LD	B,C
+	LD	C,D
+	LD	D,E
 	LD	E,0
-	LD	D,L
-	LD	HL,(HSTTRK)
-	LD	C,L
-	LD	B,H
-	XOR	A
+	SLA	E
 	RL	D
 	RL	C
 	RL	B
 	RET
-
+;
+; SDHC CARDS USE SIMPLE LBA, NO TRANSLATION NEEDED
+;
 SD_SETADDRSDHC:
-	LD	A,(HSTSEC)	; GET SECTOR (LSB ONLY)
-	LD	E,A		; PUT IN E
-	LD	HL,(HSTTRK)	; GET TRACK
-	LD	D,L		; TRACK LSB -> D
-	LD	C,H		; TRACK MSB -> C
-	LD	B,0		; B ALWAYS ZERO
-	RET
+	LD	BC,(HSTTRK)	; LBA HIGH WORD
+	LD	DE,(HSTSEC)	; LBA LOW WORD
+	RET			; DONE
 ;
 ; HANDLE READY TIMEOUT ERROR
 ;

Source/sd_dph.asm

@@ -1,72 +0,0 @@
-;
-;==================================================================================================
-;   IDE DISK DRIVER - DATA
-;==================================================================================================
-;
-SD_SLICETRKS	.EQU	65			; TRACKS PER SLICE
-SD_TRKSIZE	.EQU	128			; SIZE OF TRACK (IN KB)
-SD_SLICESIZE	.EQU	((SD_SLICETRKS * SD_TRKSIZE) + 1023) / 1024 ; SIZE OF EACH SLICE (IN MB)
-SD_NUMSLICES	.EQU	SDCAPACITY / SD_SLICESIZE ; TOTAL SLICES IN DEVICE
-SD0_UNITNUM	.EQU	DIODEV_SD + 0		; DEFAULT UNIT FOR LOGICAL UNIT 0
-SD0_SLICEDEF	.EQU	0			; DEFAULT SLICE FOR LOGICAL UNIT 0
-SD1_UNITNUM	.EQU	DIODEV_SD + 0		; DEFAULT UNIT FOR LOGICAL UNIT 1
-SD1_SLICEDEF	.EQU	1			; DEFAULT SLICE FOR LOGICAL UNIT 1
-#IF (SDMODE == SDMODE_DSD)
-SD2_UNITNUM	.EQU	DIODEV_SD + 1		; DEFAULT UNIT FOR LOGICAL UNIT 2
-SD2_SLICEDEF	.EQU	0			; DEFAULT SLICE FOR LOGICAL UNIT 2
-SD3_UNITNUM	.EQU	DIODEV_SD + 1		; DEFAULT UNIT FOR LOGICAL UNIT 3
-SD3_SLICEDEF	.EQU	1			; DEFAULT SLICE FOR LOGICAL UNIT 3
-#ELSE
-SD2_UNITNUM	.EQU	DIODEV_SD + 0		; DEFAULT UNIT FOR LOGICAL UNIT 2
-SD2_SLICEDEF	.EQU	2			; DEFAULT SLICE FOR LOGICAL UNIT 2
-SD3_UNITNUM	.EQU	DIODEV_SD + 0		; DEFAULT UNIT FOR LOGICAL UNIT 3
-SD3_SLICEDEF	.EQU	3			; DEFAULT SLICE FOR LOGICAL UNIT 3
-#ENDIF
-;
-		.DB	SD0_UNITNUM
-SDDPH0	 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	SDCSV0,SDALV0
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-SD0_SLICE	.DW	SD0_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	SD_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-		.DB	SD1_UNITNUM
-SDDPH1	 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	SDCSV1,SDALV1
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-SD1_SLICE	.DW	SD1_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	SD_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-		.DB	SD2_UNITNUM
-SDDPH2	 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	SDCSV2,SDALV2
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-SD2_SLICE	.DW	SD2_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	SD_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-		.DB	SD3_UNITNUM
-SDDPH3	 	.DW 	0000,0000
-		.DW 	0000,0000
-		.DW 	DIRBF,DPB_HD
-		.DW 	SDCSV3,SDALV3
-		.DB	"LU"			; LOGICAL UNIT ENHANCEMENT SIGNATURE
-SD3_SLICE	.DW	SD3_SLICEDEF		; CURRENTLY ACTIVE SLICE
-		.DW	SD_NUMSLICES		; NUMBER OF SLICES AVAILABLE
-;
-SDCKS		.EQU	0			; CKS: 0 FOR NON-REMOVABLE MEDIA
-SDALS		.EQU	256			; ALS: BLKS / 8 = 2048 / 8 = 256 (ROUNDED UP)
-;
-SDCSV0:		.FILL	SDCKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-SDALV0:		.FILL	SDALS			; MAX OF 2048 DATA BLOCKS
-SDCSV1:		.FILL	SDCKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-SDALV1:		.FILL	SDALS			; MAX OF 2048 DATA BLOCKS
-SDCSV2:		.FILL	SDCKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-SDALV2:		.FILL	SDALS			; MAX OF 2048 DATA BLOCKS
-SDCSV3:		.FILL	SDCKS			; NO DIRECTORY CHECKSUM, NON-REMOVABLE DRIVE
-SDALV3:		.FILL	SDALS			; MAX OF 2048 DATA BLOCKS

Source/simrtc.asm

@@ -0,0 +1,169 @@
+;
+;==================================================================================================
+; SIMH RTC DRIVER
+;==================================================================================================
+;
+SIMRTC_IO	.EQU	$FE	; SIMH IO PORT
+SIMRTC_CLKREAD	.EQU	7	; READ CLOCK COMMAND
+SIMRTC_CLKWRITE	.EQU	8	; WRITE CLOCK COMMAND
+SIMRTC_BUFSIZ	.EQU	6	; SIX BYTE BUFFER (YYMMDDHHMMSS)
+;
+; RTC DEVICE INITIALIZATION ENTRY
+;
+SIMRTC_INIT:
+	PRTS("SIMRTC: $")
+;
+	; DISPLAY CURRENT TIME
+	LD	HL,SIMRTC_BUF
+	PUSH	HL
+	CALL	SIMRTC_GETTIM0
+	POP	HL
+	CALL	PRTDT
+;
+	XOR	A		; SIGNAL SUCCESS
+	RET
+;
+; RTC DEVICE FUNCTION DISPATCH ENTRY
+;   A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
+;   B: FUNCTION (IN)
+;
+SIMRTC_DISPATCH:
+	LD	A,B		; GET REQUESTED FUNCTION
+	AND	$0F		; ISOLATE SUB-FUNCTION
+	JP	Z,SIMRTC_GETTIM	; GET TIME
+	DEC	A
+	JP	Z,SIMRTC_SETTIM	; SET TIME
+	DEC	A
+	JP	Z,SIMRTC_GETBYT	; GET NVRAM BYTE VALUE
+	DEC	A
+	JP	Z,SIMRTC_SETBYT	; SET NVRAM BYTE VALUE
+	DEC	A
+	JP	Z,SIMRTC_GETBLK	; GET NVRAM DATA BLOCK VALUES
+	DEC	A
+	JP	Z,SIMRTC_SETBLK	; SET NVRAM DATA BLOCK VALUES 
+	CALL	PANIC
+;
+; NVRAM FUNCTIONS ARE NOT AVAILABLE IN SIMULATOR
+;
+SIMRTC_GETBYT:
+SIMRTC_SETBYT:
+SIMRTC_GETBLK:
+SIMRTC_SETBLK:
+	CALL	PANIC
+;
+; RTC GET TIME
+;   A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
+;   HL: DATE/TIME BUFFER (OUT)
+; BUFFER FORMAT IS BCD: YYMMDDHHMMSS
+; 24 HOUR TIME FORMAT IS ASSUMED
+;
+SIMRTC_GETTIM:
+;	PUSH	HL
+;	POP	BC
+;	CALL	NEWLINE
+;	CALL	PRTHEXWORD
+;	CALL	NEWLINE
+
+;	LD	A,SIMRTC_CLKREAD	; READ CLOCK COMMAND
+;	OUT     (SIMRTC_IO),A		; SEND IT TO SIMH
+;	LD	B,SIMRTC_BUFSIZ		; SETUP TO GET 6 BYTES
+;	LD	C,SIMRTC_IO		; FROM SIMH PORT
+;	INIR				; GET BYTES TO (HL)
+;;
+;	XOR	A			; SIGNAL SUCCESS
+;	RET				; AND RETURN
+
+	; GET THE TIME INTO TEMP BUF
+	PUSH	HL			; SAVE PTR TO CALLS BUFFER
+	CALL	SIMRTC_GETTIM0		; GET TIME TO WORK BUFFER
+;
+	; NOW COPY TO REAL DESTINATION (INTERBANK SAFE)
+	LD	C,BID_HB		; SOURCE BANK IS OUT BANK
+	CALL	HBXX_GETBNK
+	LD	B,A			; .. AND USE AS DEST BANK
+	CALL	HBXX_XCOPY		; SET COPY BANKS
+	LD	HL,SIMRTC_BUF		; SOURCE ADR
+	POP	DE			; DEST ADR
+	LD	BC,SIMRTC_BUFSIZ	; LENGTH
+	CALL	HBXX_COPY
+	
+;	; FILL IN DAY OF WEEK VIA ALGORITHM ASSUMING CENTURY IS 20XX
+;	PUSH	HL
+;	LD	A,(SIMRTC_YR)
+;	CALL	BCD2BIN
+;	LD	L,A			; YEAR VALUE
+;	LD	H,0			; .. IN HL
+;	LD	DE,2000			; ASSUME CENTURY IS 20XX
+;	ADD	HL,DE			; .. AND ADD IT IN TO THE YEAR VALUE IN HL
+;	LD	A,(SIMRTC_MO)
+;	CALL	BCD2BIN
+;	LD	D,A			; MONTH VALUE IN D
+;	LD	A,(SIMRTC_DT)
+;	CALL	BCD2BIN
+;	LD	E,A			; DATE VALUE IN E
+;	CALL	DOW
+;	POP	HL
+;	LD	(HL),A			; FILL IN THE FINAL VALUE
+
+	XOR	A			; SIGNAL SUCCESS
+	RET				; AND RETURN
+;
+SIMRTC_GETTIM0:
+	LD	HL,SIMRTC_BUF
+	LD	A,SIMRTC_CLKREAD	; READ CLOCK COMMAND
+	OUT     (SIMRTC_IO),A		; SEND IT TO SIMH
+	LD	B,SIMRTC_BUFSIZ		; SETUP TO GET 6 BYTES
+	LD	C,SIMRTC_IO		; FROM SIMH PORT
+	INIR				; GET BYTES TO (HL)
+	RET
+
+;
+; RTC SET TIME
+;   A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
+;   HL: DATE/TIME BUFFER (IN)
+; BUFFER FORMAT IS BCD: YYMMDDHHMMSSWW
+; 24 HOUR TIME FORMAT IS ASSUMED
+;
+SIMRTC_SETTIM:
+;
+;	LD	A,SIMRTC_CLKWRITE	; WRITE CLOCK COMMAND
+;	OUT     (SIMRTC_IO),A		; SEND COMMAND TO SIMH
+;	LD      A,L			; LOW BYTE OF BUFFER ADDRESS
+;	OUT     (SIMRTC_IO),A		; SEND IT
+;	LD      A,H			; HIGH BYTE OF BUFFER ADDRESS
+;	OUT     (SIMRTC_IO),A		; SEND IT
+;;
+;	XOR	A			; SIGNAL SUCCESS
+;	RET				; AND RETURN
+
+	
+;
+	; COPY TO TEMP BUF
+	CALL	HBXX_GETBNK
+	LD	C,A			; .. AND USE AS SOURCE BANK
+	LD	B,BID_HB		; DESTINATION BANK
+	CALL	HBXX_XCOPY		; SET COPY BANKS
+	LD	DE,SIMRTC_BUF		; DEST ADR
+	LD	BC,SIMRTC_BUFSIZ	; LENGTH
+	CALL	HBXX_COPY		; DO THE COPY
+;
+	LD	HL,SIMRTC_BUF		; POINT TO TEMP BUF
+	LD	A,SIMRTC_CLKWRITE	; WRITE CLOCK COMMAND
+	OUT     (SIMRTC_IO),A		; SEND COMMAND TO SIMH
+	LD      A,L			; LOW BYTE OF BUFFER ADDRESS
+	OUT     (SIMRTC_IO),A		; SEND IT
+	LD      A,H			; HIGH BYTE OF BUFFER ADDRESS
+	OUT     (SIMRTC_IO),A		; SEND IT
+;
+	XOR	A			; SIGNAL SUCCESS
+	RET				; AND RETURN
+;
+; WORKING VARIABLES
+;
+SIMRTC_BUF:	; ALL IN BCD!!!
+SIMRTC_YR	.DB	0
+SIMRTC_MO	.DB	0
+SIMRTC_DT	.DB	0
+SIMRTC_HH	.DB	0
+SIMRTC_MM	.DB	0
+SIMRTC_SS	.DB	0

Source/std-n8vem.inc

@@ -9,6 +9,7 @@ CIODEV_UPD7220	.EQU	$40
 CIODEV_N8V	.EQU	$50
 CIODEV_PRPCON	.EQU	$60
 CIODEV_PPPCON	.EQU	$70
+CIODEV_CONSOLE	.EQU	$C0
 CIODEV_CRT	.EQU	$D0
 CIODEV_BAT	.EQU	$E0
 CIODEV_NUL	.EQU	$F0
@@ -17,14 +18,14 @@ CIODEV_NUL	.EQU	$F0
 ;
 DIODEV_MD	.EQU	$00
 DIODEV_FD	.EQU	$10
-DIODEV_IDE	.EQU	$20
-DIODEV_ATAPI	.EQU	$30
-DIODEV_PPIDE	.EQU	$40
-DIODEV_SD	.EQU	$50
-DIODEV_PRPSD	.EQU	$60
-DIODEV_PPPSD	.EQU	$70
-DIODEV_HDSK	.EQU	$80
-DIODEV_RF	.EQU	$90
+DIODEV_RF	.EQU	$20
+DIODEV_IDE	.EQU	$30
+DIODEV_ATAPI	.EQU	$40
+DIODEV_PPIDE	.EQU	$50
+DIODEV_SD	.EQU	$60
+DIODEV_PRPSD	.EQU	$70
+DIODEV_PPPSD	.EQU	$80
+DIODEV_HDSK	.EQU	$90
 ;
 ; VDA DEVICES (VIDEO DISPLAY ADAPTER)
 ;

Source/std.asm

@@ -32,8 +32,10 @@ BIOSSIZE	.EQU	0100H		; DEPRECATED!!!
 PLT_N8VEM	.EQU	1		; N8VEM ECB Z80 SBC
 PLT_ZETA	.EQU	2		; ZETA Z80 SBC
 PLT_N8		.EQU	3		; N8 (HOME COMPUTER) Z180 SBC
-PLT_S2I		.EQU	4		; SCSI2IDE
-PLT_S100	.EQU	5		; S100COMPUTERS Z80 based system
+PLT_MK4		.EQU	4
+PLT_S2I		.EQU	5		; SCSI2IDE
+PLT_S100	.EQU	6		; S100COMPUTERS Z80 based system
+PLT_UNA		.EQU	7		; UNA BIOS
 ;
 ; BOOT STYLE
 ;
@@ -51,13 +53,13 @@ CLR_ALWAYS	.EQU	2		; ALWAYS CLEAR RAM DISK
 DM_ROM		.EQU	1		; ROM DRIVE PRIORITY
 DM_RAM		.EQU	2		; RAM DRIVE PRIORITY
 DM_FD		.EQU	3		; FLOPPY DRIVE PRIORITY
-DM_IDE		.EQU	4		; IDE DRIVE PRIORITY
-DM_PPIDE	.EQU	5		; PPIDE DRIVE PRIORITY
-DM_SD		.EQU	6		; SD DRIVE PRIORITY
-DM_PRPSD	.EQU	7		; PROPIO SD DRIVE PRIORITY
-DM_PPPSD	.EQU	8		; PROPIO SD DRIVE PRIORITY
-DM_HDSK		.EQU	9		; SIMH HARD DISK DRIVE PRIORITY
-DM_RF		.EQU	10		; RAM FLOPPY PRIORITY
+DM_RF		.EQU	4		; FLOPPY DRIVE PRIORITY
+DM_IDE		.EQU	5		; IDE DRIVE PRIORITY
+DM_PPIDE	.EQU	6		; PPIDE DRIVE PRIORITY
+DM_SD		.EQU	7		; SD DRIVE PRIORITY
+DM_PRPSD	.EQU	8		; PROPIO SD DRIVE PRIORITY
+DM_PPPSD	.EQU	9		; PROPIO SD DRIVE PRIORITY
+DM_HDSK		.EQU	10		; SIMH HARD DISK DRIVE PRIORITY
 ;
 ; FLOPPY DISK MEDIA SELECTIONS (ID'S MUST BE INDEX OF ENTRY IN FCD_TBL)
 ;
@@ -72,17 +74,17 @@ FDM111		.EQU	4		; 8" FLOPPY, 1.11MB, 2 SIDES, 74 TRKS, 15 SECTORS
 MID_NONE	.EQU	0
 MID_MDROM	.EQU	1
 MID_MDRAM	.EQU	2
-MID_HD		.EQU	3
-MID_FD720	.EQU	4
-MID_FD144	.EQU	5
-MID_FD360	.EQU	6
-MID_FD120	.EQU	7
-MID_FD111	.EQU	8
-MID_RF		.EQU	9
+MID_RF		.EQU	3
+MID_HD		.EQU	4
+MID_FD720	.EQU	5
+MID_FD144	.EQU	6
+MID_FD360	.EQU	7
+MID_FD120	.EQU	8
+MID_FD111	.EQU	9
 ;
 ; FD MODE SELECTIONS
 ;
-FDMODE_NONE	.equ	0		; FD modes defined in std-*.inc
+FDMODE_NONE	.EQU	0		; FD modes defined in std-*.inc
 FDMODE_DIO	.EQU	1		; DISKIO V1
 FDMODE_ZETA	.EQU	2		; ZETA
 FDMODE_DIDE	.EQU	3		; DUAL IDE
@@ -94,6 +96,7 @@ FDMODE_DIO3	.EQU	5		; DISKIO V3
 IDEMODE_NONE	.EQU	0
 IDEMODE_DIO	.EQU	1		; DISKIO V1
 IDEMODE_DIDE	.EQU	2		; DUAL IDE
+IDEMODE_MK4	.EQU	3		; MARK IV ONBOARD IDE (8 BIT)
 ;
 ; PPIDE MODE SELECTIONS
 ;
@@ -111,6 +114,7 @@ SDMODE_CSIO	.EQU	3		; N8-2312 OR N8-2511 MODIFIED
 SDMODE_PPI	.EQU	4		; PPISD MINI BOARD
 SDMODE_UART	.EQU	5		; S2ISD
 SDMODE_DSD	.EQU	6		; DUAL SD
+SDMODE_MK4	.EQU	7		; MARK IV
 ;
 ; CONSOLE TERMINAL TYPE CHOICES
 ;
@@ -182,6 +186,14 @@ CP		.EQU	CP_ZCPR
 #INCLUDE "n8.inc"
 #ENDIF
 ;
+#IF (PLATFORM == PLT_MK4)
+#INCLUDE "mk4.inc"
+#ENDIF
+;
+#IF (PLATFORM == PLT_UNA)
+#INCLUDE "una.inc"
+#ENDIF
+;
 #IF (PLATFORM == PLT_S100)
 ;
 #DEFINE S100_IOB			; WBW: FORCED ON TO MAKE BUILD WORK!
@@ -229,6 +241,61 @@ DF_FORMAT	.EQU	5
 ;
 ; BIOS FUNCTIONS
 ;
+#IF (PLATFORM == PLT_UNA)
+BF_CIO		.EQU	$10
+BF_CIOIN	.EQU	BF_CIO + 1	; CHARACTER INPUT
+BF_CIOOUT	.EQU	BF_CIO + 2	; CHARACTER OUTPUT
+BF_CIOIST	.EQU	BF_CIO + 3	; CHARACTER INPUT STATUS
+BF_CIOOST	.EQU	BF_CIO + 4	; CHARACTER OUTPUT STATUS
+;
+BF_DIO		.EQU	$40
+BF_DIORD	.EQU	BF_DIO + 2	; DISK READ
+BF_DIOWR	.EQU	BF_DIO + 3	; DISK WRITE
+BF_DIOST	.EQU	$FF		; DISK STATUS
+BF_DIOMED	.EQU	$FF		; DISK MEDIA
+BF_DIOID	.EQU	$FF		; DISK IDENTIFY
+BF_DIOGETBUF	.EQU	$FF		; DISK GET BUFFER ADR
+BF_DIOSETBUF	.EQU	$FF		; DISK SET BUFFER ADR
+;
+BF_RTC		.EQU	$20
+BF_RTCGETTIM	.EQU	BF_RTC + 0	; GET TIME
+BF_RTCSETTIM	.EQU	BF_RTC + 1	; SET TIME
+BF_RTCGETBYT	.EQU	BF_RTC + 2	; GET NVRAM BYTE BY INDEX
+BF_RTCSETBYT	.EQU	BF_RTC + 3	; SET NVRAM BYTE BY INDEX
+BF_RTCGETBLK	.EQU	BF_RTC + 4	; GET NVRAM DATA BLOCK
+BF_RTCSETBLK	.EQU	BF_RTC + 5	; SET NVRAM DATA BLOCK
+;
+BF_EMU		.EQU	$30
+BF_EMUIN	.EQU	BF_EMU + 0	; EMULATOR CHARACTER INPUT
+BF_EMUOUT	.EQU	BF_EMU + 1	; EMULATOR CHARACTER OUTPUT
+BF_EMUIST	.EQU	BF_EMU + 2	; EMULATOR CHARACTER INPUT STATUS
+BF_EMUOST	.EQU	BF_EMU + 3	; EMULATOR CHARACTER OUTPUT STATUS
+BF_EMUCFG	.EQU	BF_EMU + 4	; EMULATOR CHARACTER I/O CONFIG
+BF_EMUINI	.EQU	BF_EMU + 8	; INITIALIZE EMULATION
+BF_EMUQRY	.EQU	BF_EMU + 9	; QUERY EMULATION STATUS
+;
+BF_VDA		.EQU	$40
+BF_VDAINI	.EQU	BF_VDA + 0	; INITIALIZE VDU
+BF_VDAQRY	.EQU	BF_VDA + 1	; QUERY VDU STATUS
+BF_VDARES	.EQU	BF_VDA + 2	; SOFT RESET VDU
+BF_VDASCS	.EQU	BF_VDA + 3	; SET CURSOR STYLE
+BF_VDASCP	.EQU	BF_VDA + 4	; SET CURSOR POSITION
+BF_VDASAT	.EQU	BF_VDA + 5	; SET CHARACTER ATTRIBUTE
+BF_VDASCO	.EQU	BF_VDA + 6	; SET CHARACTER COLOR
+BF_VDAWRC	.EQU	BF_VDA + 7	; WRITE CHARACTER
+BF_VDAFIL	.EQU	BF_VDA + 8	; FILL
+BF_VDACPY	.EQU	BF_VDA + 9	; COPY
+BF_VDASCR	.EQU	BF_VDA + 10	; SCROLL
+BF_VDAKST	.EQU	BF_VDA + 11	; GET KEYBOARD STATUS
+BF_VDAKFL	.EQU	BF_VDA + 12	; FLUSH KEYBOARD BUFFER
+BF_VDAKRD	.EQU	BF_VDA + 13	; READ KEYBOARD
+;
+BF_SYS		.EQU	$F0
+BF_SYSGETCFG	.EQU	BF_SYS + 0	; GET CONFIGURATION DATA BLOCK
+BF_SYSSETCFG	.EQU	BF_SYS + 1	; SET CONFIGURATION DATA BLOCK
+BF_SYSBNKCPY	.EQU	BF_SYS + 2	; COPY TO/FROM RAM/ROM MEMORY BANK
+BF_SYSGETVER	.EQU	BF_SYS + 3	; GET VERSION OF HBIOS
+#ELSE
 BF_CIO		.EQU	$00
 BF_CIOIN	.EQU	BF_CIO + 0	; CHARACTER INPUT
 BF_CIOOUT	.EQU	BF_CIO + 1	; CHARACTER OUTPUT
@@ -283,11 +350,12 @@ BF_SYSGETCFG	.EQU	BF_SYS + 0	; GET CONFIGURATION DATA BLOCK
 BF_SYSSETCFG	.EQU	BF_SYS + 1	; SET CONFIGURATION DATA BLOCK
 BF_SYSBNKCPY	.EQU	BF_SYS + 2	; COPY TO/FROM RAM/ROM MEMORY BANK
 BF_SYSGETVER	.EQU	BF_SYS + 3	; GET VERSION OF HBIOS
+#ENDIF
 ;
 ; MEMORY LAYOUT
 ;
 CPM_LOC		.EQU	0D000H			; CONFIGURABLE: LOCATION OF CPM FOR RUNNING SYSTEM
-CPM_SIZ		.EQU	2F00H			; SIZE OF CPM IMAGE (CCP + BDOS + CBIOS (INCLUDING DATA))
+CPM_SIZ		.EQU	2C00H			; SIZE OF CPM IMAGE (CCP + BDOS + CBIOS (INCLUDING DATA))
 CPM_END		.EQU	CPM_LOC + CPM_SIZ
 ;
 CCP_LOC		.EQU	CPM_LOC			; START OF COMMAND PROCESSOR
@@ -304,9 +372,9 @@ CBIOS_END	.EQU	CBIOS_LOC + CBIOS_SIZ
 ;
 CPM_ENT		.EQU	CBIOS_LOC
 ;
-HB_LOC		.EQU	CPM_END
-HB_SIZ		.EQU	100H
-HB_END		.EQU	HB_LOC + HB_SIZ
+HBX_LOC		.EQU	CPM_END
+HBX_SIZ		.EQU	400H
+HBX_END		.EQU	HBX_LOC + HBX_SIZ
 ;
 MON_LOC		.EQU	0C000H			; LOCATION OF MONITOR FOR RUNNING SYSTEM
 MON_SIZ		.EQU	01000H			; SIZE OF MONITOR BINARY IMAGE
@@ -346,6 +414,19 @@ CBIOS_RSVD2	.EQU	CBIOS_LOC + 76
 CBIOS_RSVD3	.EQU	CBIOS_LOC + 69
 CBIOS_RSVD4	.EQU	CBIOS_LOC + 72
 ;
+; BIOS ENTRY POINTS
+;
+HB_INIT		.EQU	HBX_LOC + (0 * 3)
+HB_INVOKE	.EQU	HBX_LOC + (1 * 3)
+HB_SETBNK	.EQU	HBX_LOC + (2 * 3)
+HB_GETBNK	.EQU	HBX_LOC + (3 * 3)
+HB_COPY		.EQU	HBX_LOC + (4 * 3)
+HB_XCOPY	.EQU	HBX_LOC + (5 * 3)
+HB_FRGETB	.EQU	HBX_LOC + (6 * 3)
+HB_FRGETW	.EQU	HBX_LOC + (7 * 3)
+HB_FRPUTB	.EQU	HBX_LOC + (8 * 3)
+HB_FRPUTW	.EQU	HBX_LOC + (9 * 3)
+;
 CDISK:	 	.EQU 	00004H		; LOC IN PAGE 0 OF CURRENT DISK NUMBER 0=A,...,15=P
 IOBYTE:	 	.EQU 	00003H		; LOC IN PAGE 0 OF I/O DEFINITION BYTE.
 ;
@@ -371,12 +452,18 @@ CCPSIZ:		.EQU	00800H
 #IF (PLATFORM == PLT_N8)
   #DEFINE 	PLATFORM_NAME	"N8 Z180"
 #ENDIF
+#IF (PLATFORM == PLT_MK4)
+  #DEFINE 	PLATFORM_NAME	"MARK IV Z180"
+#ENDIF
 #IF (PLATFORM == PLT_S2I)
   #DEFINE 	PLATFORM_NAME	"SCSI2IDE Z80"
 #ENDIF
 #IF (PLATFORM == PLT_S100)
   #DEFINE	PLATFORM_NAME	"S100"
 #ENDIF
+#IF (PLATFORM == PLT_UNA)
+  #DEFINE	PLATFORM_NAME	"UNA"
+#ENDIF
 ;
 ; HELPER MACROS
 ;
@@ -384,6 +471,6 @@ CCPSIZ:		.EQU	00800H
 #DEFINE	PRTS(S)	CALL PRTSTRD \ .DB S			; PRINT STRING S TO CONSOLE - PRTD("HELLO")
 #DEFINE	PRTX(X) CALL PRTSTRI \ .DW X			; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO)
 ;
-#DEFINE	XIO_PRTC(C)	CALL XIO_PRTCH \ .DB C	; PRINT CHARACTER C TO CONSOLE - PRTC('X')
+#DEFINE	XIO_PRTC(C)	CALL XIO_PRTCH \ .DB C		; PRINT CHARACTER C TO CONSOLE - PRTC('X')
 #DEFINE	XIO_PRTS(S)	CALL XIO_PRTSTRD \ .DB S	; PRINT STRING S TO CONSOLE - PRTD("HELLO")
 #DEFINE	XIO_PRTX(X)	CALL XIO_PRTSTRI \ .DW X	; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO)

Source/syscfg.asm

@@ -5,6 +5,8 @@
 ; INCLUDE STANDARD BIOS DEFINITIONS
 ;
 #INCLUDE "std.asm"
+;
+#IF (PLATFORM != PLT_UNA)
 ;
 	.ORG	0			; ALL ADDRESSES GENERATED WILL BE ZERO BASED
 ;
@@ -68,7 +70,7 @@ BOOTTIME	.DB	0,0,0,0,0,0	; SYSTEM STARTUP TIME (YY,MM,DD,HH,MM,SS)
 		.DB	ALTIOBYTE
 		.DB	WRTCACHE
 		.DB	DSKTRACE
-		.DB	DSKMAP
+		.DB	0		; DSKMAP
 		.DB	CLRRAMDISK
 		
 		.DB	DSKYENABLE
@@ -180,7 +182,9 @@ SC_TIMESTAMP	.DB	TIMESTAMP, "$"
 SC_BUILD	.DB	BIOSBLD, "$"
 ;
 	.EXPORT	DISKBOOT,BOOTDEVICE,BOOTLU
-;	
+;
+#ENDIF
+;
 	.FILL	$200-$,$FF
 ;
 	.END

Source/time.asm

@@ -0,0 +1,187 @@
+;
+;==================================================================================================
+; TIME ROUTINES
+;==================================================================================================
+;
+; COMPUTE DAY OF WEEK FROM YEAR, MONTH, DAY
+;   INPUT: HL IS FULL YEAR VALUE,
+;          D IS MONTH, E IS DATE
+;   RESULT: A=0-6 (SUN-SAT)
+;
+; DD + MX + YY + (YY/4) + CX
+; MX IS LOOKUP BASED ON ZERO INDEXED MONTH FOR
+;   LEAP YEAR: 0,3,3,6,1,4,6,2,5,0,3,5
+;   NON-LEAP YEAR: -1,2,3,6,1,4,6,2,5,0,3,5
+; CX IS 6 IF CENTURY DIVISIBLE BY 4, THEN, 4, 2, 0
+;   SO 20XX = 6, 19XX = 4, 18XX = 2, 17XX = 0, 16XX = 6, ETC.
+;
+DOW:
+	; SAVE INCOMING MONTH AND DATE
+	LD	(DOW_DT),DE	; SAVE DATE TO DT AND MONTH TO MO
+	; DETERMINE CENTURY AND YEAR OF CENTURY FROM FULL YEAR
+	PUSH	HL		; SAVE FULL YEAR VALUE
+	LD	DE,100		; DIVIDE BY 100 TO GET CC/YY
+	CALL	DIV		; BC NOW HAS CENTURY, HL HAS YEAR OF CENTURY
+	LD	A,L		; MOVE YEAR TO A, DISCARD H NOT NEEDED
+	LD	(DOW_YR),A	; SAVE YY
+	LD	A,C		; MOVE CENTURY TO A, DISCARD B NOT NEEDED
+	LD	(DOW_CC),A	; SAVE CENTURY
+	; USING FULL YEAR VALUE, CHECK FOR LEAP YEAR
+	POP	HL		; GET FULL YEAR VALUE BACK
+	CALL	LEAP		; CHECK FOR LEAP YEAR, Z IF SO
+DOW1:
+	; LOOKUP MX VALUE BASED MONTH USING APPROPRIATE TABLE
+	LD	HL,DOW_MX1	; POINT TO MONTH VALUE TABLE
+	JR	NZ,DOW2		; NOT LEAP, USE STD TBL
+	LD	HL,DOW_MX2	; LEAP YEAR, USE LEAP TBL
+DOW2:
+	LD	A,(DOW_MO)	; GET MONTH
+	DEC	A		; ZERO OFFSET
+	CALL	ADDHLA		; LOOKUP SPECIAL MONTH VALUE
+	LD	A,(HL)		; A NOW HAS SPECIAL MONTH VALUE
+	LD	B,A		; SAVE IT IN B
+;
+	; B NOW HAS INITIAL WORKING VALUE, ADD IN DATE
+	LD	A,(DOW_DT)	; GET DATE
+	ADD	A,B		; ADD WITH SPECIAL MONTH VALUE
+	LD	B,A		; SAVE IT
+;
+	; ADD IN YEAR OF CENTURY
+	LD	A,(DOW_YR)	; GET TWO DIGIT YEAR VALUE
+	ADD	A,B		; ADD WITH WORKING VALUE
+	LD	B,A		; SAVE IT
+;
+	; ADD IN (YEAR OF CENTURY / 4)
+	LD	A,(DOW_YR)	; GET TWO DIGIT YEAR AGAIN
+	SRL	A		; DIVIDE BY 4
+	SRL	A		; .. BY SHIFTING
+	ADD	A,B		; ADD WITH WORKING VALUE
+	LD	B,A		; SAVE IT
+;
+	; DETERMINE CX = 6 - ((CC % 4) * 2)
+	LD	A,(DOW_CC)	; GET CC
+	AND	3		; MOD 4
+	SLA	A		; * 2
+	NEG
+	ADD	A,6
+;
+	; COMBINE CX WITH WORKING VALUE TO GET FINAL VALUE IN A
+	ADD	A,B		; ADD WITH WORKING VALUE
+	; CALC FINAL VALUE MOD 7 TO GET WEEKDAY VALUE 0-6
+	LD	B,7		; SUB IN INCREMENTS OF 7
+DOW3:
+	SUB	B		; NEXT SUBTRACTION
+	JR	NC,DOW3		; IF NO CARRY, KEEP GOING SUBTRACTING
+	ADD	A,B		; WENT TOO FAR, ADD 7 BACK TO GET RESULT
+	RET
+;
+DOW_MX1		.DB	0,3,3,6,1,4,6,2,5,0,3,5
+DOW_MX2		.DB	-1,2,3,6,1,4,6,2,5,0,3,5
+;
+DOW_CC	.DB	0
+DOW_YR	.DB	0
+DOW_DT	.DB	0
+DOW_MO	.DB	0
+;
+; PRINT DATE AND TIME
+;   INPUT: YYMMDDHHMMSS BUFFER AT HL (BCD ENCODED)
+;
+PRTDT:
+	PUSH	HL			; SAVE BUFFER POINTER
+	INC	HL			; POINT TO MONTH
+	LD	A,(HL)			; LOAD MONTH (BCD)
+	CALL	BCD2BIN			; CVT TO BINARY
+	LD	D,A			; D := MONTH (BINARY)
+	INC	HL			; POINT TO DATE
+	LD	A,(HL)			; LOAD DATE (BCD)
+	CALL	BCD2BIN			; CVT TO BINARY
+	LD	E,A			; E := DATE (BINARY)
+	POP	HL			; RECOVER PTR TO START OF BUF
+	PUSH	HL
+	PUSH	DE			; SAVE DE FOR NOW
+	LD	A,(HL)			; LOAD YEAR OF CENTURY (BCD)
+	CALL	BCD2BIN			; CVT TO BINARY
+	LD	L,A			; YEAR VALUE
+	LD	H,0			; .. IN HL
+	LD	DE,2000			; ASSUME CENTURY IS 20XX
+	ADD	HL,DE			; .. AND ADD IT IN TO THE YEAR VALUE IN HL
+	POP	DE			; RECOVER DE (MONTH, DATE)
+	CALL	DOW
+	CALL	PRTDOW
+	POP	HL			; RECOVER PTR TO START OF BUF
+	CALL	PC_SPACE
+	LD	A,'2'
+	CALL	COUT
+	LD	A,'0'
+	CALL	COUT
+	LD	A,(HL)
+	INC	HL
+	CALL	PRTHEXBYTE
+	LD	A,'-'
+	CALL	COUT
+	LD	A,(HL)
+	INC	HL
+	CALL	PRTHEXBYTE
+	LD	A,'-'
+	CALL	COUT
+	LD	A,(HL)
+	INC	HL
+	CALL	PRTHEXBYTE
+	CALL	PC_SPACE
+	LD	A,(HL)
+	INC	HL
+	CALL	PRTHEXBYTE
+	CALL	PC_COLON
+	LD	A,(HL)
+	INC	HL
+	CALL	PRTHEXBYTE
+	CALL	PC_COLON
+	LD	A,(HL)
+	INC	HL
+	CALL	PRTHEXBYTE
+	RET
+;
+; PRINT DAY OF WEEK BASED ON A
+;   0-6 IS SUN-SAT
+;
+PRTDOW:
+	; BOUNDS CHECK FIRST
+	CP	7		; MAX VALUE + 1
+	RET	NC		; ABORT IF OUT OF RANGE!
+	LD	HL,DOWTBL
+	SLA	A
+	SLA	A
+	CALL	ADDHLA
+	JP	PRTSTR
+;
+DOWTBL		.DB	"Sun$", "Mon$", "Tue$", "Wed$"
+		.DB	"Thu$", "Fri$", "Sat$"
+;
+; SET Z IF YEAR VALUE IN HL REPRESENTS A LEAP YEAR, ELSE NZ
+; HL IS PRESERVED
+;
+LEAP:
+	PUSH	HL
+	LD	DE,4
+	CALL	DIV
+	POP	HL
+	JR	NZ,NOLEAP	; IF YEAR NOT DIVISIBLE BY 4: NOT LEAP
+	PUSH	HL
+	LD	DE,100
+	CALL	DIV
+	POP	HL
+	JR	NZ,ISLEAP	; ELSE IF YEAR NOT DIVISIBLE BY 100: LEAP
+	PUSH	HL
+	LD	DE,400
+	CALL	DIV
+	POP	HL
+	JR	Z,ISLEAP	; ELSE IF YEAR DIVISIBLE BY 400: LEAP
+	JR	NOLEAP		; OTHERWISE NOT LEAP
+;
+NOLEAP:
+	OR	$FF		; ZF=NZ SIGNALS FALSE (NOT LEAP YEAR)
+	RET
+;
+ISLEAP:
+	XOR	A		; ZF=Z SIGNALS TRUE (IS LEAP YEAR)
+	RET

Source/ubios.asm

@@ -0,0 +1,15 @@
+;
+;==================================================================================================
+;   UBIOS - JUST FILLER TO REPLACE THE SPACE HBIOS WOULD NORMALLY USE
+;==================================================================================================
+;
+	.ORG	$1000
+;
+; INCLUDE GENERIC STUFF
+;
+#INCLUDE "std.asm"
+;
+	.FILL	(HBX_LOC - $8000 - $),$FF
+	.ORG	HBX_LOC
+	.FILL	HBX_END - $,$FF
+	.END

Source/una.inc

@@ -0,0 +1,29 @@
+;
+; UNA HARDWARE DEFINITIONS
+;
+; DUMMY VALUES BELOW TO ALLOW DBGMON TO BUILD...
+; NEED TO REMOVE AND CLEAN THIS UP LATER.
+;
+PPIBASE		.EQU	$00
+PPIA		.EQU 	PPIBASE + 0	; PORT A
+PPIB		.EQU 	PPIBASE + 1	; PORT B
+PPIC		.EQU 	PPIBASE + 2	; PORT C
+PPIX	 	.EQU 	PPIBASE + 3	; PPI CONTROL PORT
+;
+; MEMORY BANK CONFIGURATION (THIS NEEDS TO BE ERADICATED)
+;
+BID_BOOT	.EQU	$00		; HARDWARE COLD BOOT (SETUP)
+;		.EQU	$01		; UNA BIOS
+BID_COMIMG	.EQU	$02		; LOADER + CP/M IMAGE TO COPY TO BID_COM
+;		.EQU	$03		; UNA FATFS DRIVER
+BID_HBIMG	.EQU	$00		; NO HBIOS IMAGE FOR UNA
+BID_ROMD	.EQU	$05		; FIRST ROM DRIVE BANK
+BID_ROMDN	.EQU	$0F		; LAST ROM DRIVE BANK
+
+BID_RAMD	.EQU	$10		; START OF RAM DRIVE
+BID_RAMDN	.EQU	$1B		; LAST RAM DRIVE BANK
+BID_BPB		.EQU	$1C		; RESERVED FOR BPBIOS BANK
+BID_HB		.EQU	$00		; NO HBIOS FOR UNA
+;		.EQU	$1D		; SHADOW COPY OF UNABIOS IN RAM
+BID_USR		.EQU	$1E		; LOW 32K OF TPA
+BID_COM		.EQU	$1F		; COMMON BANK, UPPER 32K

Source/util.asm

@@ -297,22 +297,36 @@ COUT:
 	PUSH	BC
 	PUSH	DE
 	PUSH	HL
+#IF (PLATFORM == PLT_UNA)
+#IFDEF CIOMODE_CONSOLE
+  #DEFINE CIOMODE_NONDOS
+	LD	E,A
+	LD	BC,$12
+	RST	08
+#ENDIF
+#IFDEF CIOMODE_HBIOS
+  #DEFINE CIOMODE_NONDOS
+	LD	E,A
+	LD	BC,$12
+	RST	08
+#ENDIF
+#ELSE
 #IFDEF CIOMODE_CONSOLE
   #DEFINE CIOMODE_NONDOS
 	LD	E,A
 	LD	A,(CONDEV)
 	LD	C,A
 	LD	B,BF_CIOOUT
-	CALL	BIOS_DISPATCH
+	CALL	HB_DISPATCH
 #ENDIF
 #IFDEF CIOMODE_HBIOS
   #DEFINE CIOMODE_NONDOS
 	LD	E,A
-	LD	A,DEFCON
-	LD	C,A
+	LD	C,CIODEV_CONSOLE
 	LD	B,BF_CIOOUT
 	RST	08
 #ENDIF
+#ENDIF
 #IFDEF CIOMODE_CBIOS
   #DEFINE CIOMODE_NONDOS
 	LD	C,A
@@ -335,22 +349,36 @@ CIN:
 	PUSH	BC
 	PUSH	DE
 	PUSH	HL
+#IF (PLATFORM == PLT_UNA)
+#IFDEF CIOMODE_CONSOLE
+  #DEFINE CIOMODE_NONDOS
+	LD	BC,$11
+	RST	08
+	LD	A,E
+#ENDIF
+#IFDEF CIOMODE_HBIOS
+  #DEFINE CIOMODE_NONDOS
+	LD	BC,$11
+	RST	08
+	LD	A,E
+#ENDIF
+#ELSE
 #IFDEF CIOMODE_CONSOLE
   #DEFINE CIOMODE_NONDOS
 	LD	A,(CONDEV)
 	LD	C,A
 	LD	B,BF_CIOIN
-	CALL	BIOS_DISPATCH
+	CALL	HB_DISPATCH
 	LD	A,E
 #ENDIF
 #IFDEF CIOMODE_HBIOS
   #DEFINE CIOMODE_NONDOS
-	LD	A,DEFCON
-	LD	C,A
+	LD	C,CIODEV_CONSOLE
 	LD	B,BF_CIOIN
 	RST	08
 	LD	A,E
 #ENDIF
+#ENDIF
 #IFDEF CIOMODE_CBIOS
   #DEFINE CIOMODE_NONDOS
 	CALL	CBIOS_CONIN
@@ -370,20 +398,34 @@ CST:
 	PUSH	BC
 	PUSH	DE
 	PUSH	HL
+#IF (PLATFORM == PLT_UNA)
+#IFDEF CIOMODE_CONSOLE
+  #DEFINE CIOMODE_NONDOS
+	LD	BC,$13
+	RST	08
+	LD	A,E
+#ENDIF
+#IFDEF CIOMODE_HBIOS
+  #DEFINE CIOMODE_NONDOS
+	LD	BC,$13
+	RST	08
+	LD	A,E
+#ENDIF
+#ELSE
 #IFDEF CIOMODE_CONSOLE
   #DEFINE CIOMODE_NONDOS
 	LD	B,BF_CIOIST
 	LD	A,(CONDEV)
 	LD	C,A
-	CALL	BIOS_DISPATCH
+	CALL	HB_DISPATCH
 #ENDIF
 #IFDEF CIOMODE_HBIOS
   #DEFINE CIOMODE_NONDOS
 	LD	B,BF_CIOIST
-	LD	A,DEFCON
-	LD	C,A
+	LD	C,CIODEV_CONSOLE
 	RST	08
 #ENDIF
+#ENDIF
 #IFDEF CIOMODE_CBIOS
   #DEFINE CIOMODE_NONDOS
 	CALL	CBIOS_CONST
@@ -413,6 +455,64 @@ STR_SP		.DB	" SP=$"
 ;
 JPHL:	JP	(HL)
 ;
+; ADD HL,A
+;
+;   A REGISTER IS DESTROYED!
+;
+
+ADDHLA:
+	ADD	A,L
+	LD	L,A
+	RET	NC
+	INC	H
+	RET
+;
+;****************************
+;	A(BCD) => A(BIN) 
+;	[00H..99H] -> [0..99]
+;****************************
+;
+BCD2BIN:
+	PUSH	BC
+	LD	C,A
+	AND	0F0H
+	SRL	A
+	LD	B,A
+	SRL	A
+	SRL	A
+	ADD	A,B
+	LD	B,A
+	LD	A,C
+	AND	0FH
+	ADD	A,B
+	POP	BC
+	RET
+;
+;*****************************
+;	 A(BIN) =>  A(BCD) 
+;	[0..99] => [00H..99H]
+;*****************************
+;
+BIN2BCD:
+	PUSH	BC
+	LD	B,10
+	LD	C,-1
+DIV10:	INC	C
+	SUB	B
+	JR	NC,DIV10
+	ADD	A,B
+	LD	B,A
+	LD	A,C
+	ADD	A,A
+	ADD	A,A
+	ADD	A,A
+	ADD	A,A
+	OR	B
+	POP	BC
+	RET
+;
+;*******************************
+;
 ; DELAY ABOUT 25us (100 TSTATES INCLUDING CALL AND RET)
 ;
 ;	TOTAL T STATES = ((B*13) + 51)
@@ -461,8 +561,35 @@ MULT8_LOOP:
 MULT8_NOADD:
 	DJNZ MULT8_LOOP
 	RET
-	
-	
+;
+; COMPUTE HL / DE
+; RESULT IN BC, REMAINDER IN HL, AND SET ZF DEPENDING ON REMAINDER
+; A, DE DESTROYED
+;
+DIV:
+	XOR	A
+	LD	BC,0
+DIV1:
+	SBC	HL,DE
+	JR	C,DIV2
+	INC	BC
+	JR	DIV1
+DIV2:
+	XOR	A
+	ADC	HL,DE		; USE ADC SO ZF IS SET
+	RET
+;
+; FILL MEMORY AT HL WITH VALUE A, LENGTH IN BC, ALL REGS USED
+; LENGTH *MSUT* BE GREATER THAN 1 FOR PROPER OPERATION!!!
+;
+FILL:
+	LD	D,H		; SET DE TO HL
+	LD	E,L		; SO DESTINATION EQUALS SOURCE
+	LD	(HL),A		; FILL THE FIRST BYTE WITH DESIRED VALUE
+	INC	DE		; INCREMENT DESTINATION
+	DEC	BC		; DECREMENT THE COUNT
+	LDIR			; DO THE REST
+	RET			; RETURN
 ;
 ; SET A BIT IN BYTE ARRAY AT HL, INDEX IN A
 ;
@@ -509,9 +636,24 @@ BITLOC1:
 	DJNZ	BITLOC1		; LOOP AS NEEDED
 	RET			; DONE
 ;
+; PRINT VALUE OF A IN DECIMAL WITH LEADING ZERO SUPPRESSION
+;
+PRTDECB:
+	PUSH	HL
+	PUSH	AF
+	LD	L,A
+	LD	H,0
+	CALL	PRTDEC
+	POP	AF
+	POP	HL
+	RET
+;
 ; PRINT VALUE OF HL IN DECIMAL WITH LEADING ZERO SUPPRESSION
 ;
 PRTDEC:
+	PUSH	BC
+	PUSH	DE
+	PUSH	HL
 	LD	E,'0'
 	LD	BC,-10000
 	CALL	PRTDEC1
@@ -523,6 +665,11 @@ PRTDEC:
 	CALL	PRTDEC1
 	LD	E,0
 	LD	C,-1
+	CALL	PRTDEC1
+	POP	HL
+	POP	DE
+	POP	BC
+	RET
 PRTDEC1:
 	LD	A,'0' - 1
 PRTDEC2:
@@ -531,9 +678,10 @@ PRTDEC2:
 	JR	C,PRTDEC2
 	SBC	HL,BC
 	CP	E
-	RET	Z
+	JR	Z,PRTDEC3
 	LD	E,0
 	CALL	COUT
+PRTDEC3:
 	RET
 ;
 ;==================================================================================================

Source/ver.inc

@@ -1,7 +1,7 @@
 #DEFINE	RMJ	2
-#DEFINE	RMN	5
-#DEFINE	RUP	4
-#DEFINE	RTP	20
-#DEFINE BIOSVER	"2.5.4"
-#DEFINE BIOSBLD "Build 20"
+#DEFINE	RMN	6
+#DEFINE	RUP	0
+#DEFINE	RTP	11
+#DEFINE BIOSVER	"2.6.0"
+#DEFINE BIOSBLD "Build 11"
 #DEFINE REVISION 500

Source/xio.asm

@@ -7,7 +7,15 @@
 ;______________________________________________________________________________________________________________________
 ;
 XIO_INIT:	; MINIMAL UART INIT
-#IF (PLATFORM == PLT_N8)
+
+#IF (PLATFORM == PLT_UNA)
+	; SHOULD UNA SERIAL I/O BE RESET HERE???
+#ENDIF
+
+#IFNDEF UNALOAD
+;
+#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4))
+
 	; ASCI0
 	LD	A,66H
 	OUT0	(CPU_ASEXT0),A
@@ -15,8 +23,11 @@ XIO_INIT:	; MINIMAL UART INIT
 	OUT0	(CPU_CNTLA0),A
 	LD	A,Z180_CNTLB0
 	OUT0	(CPU_CNTLB0),A
-	RET
-#ELSE
+	
+#ENDIF
+
+#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA) | (PLATFORM == PLT_S2I))
+
 XIO_DIV		.EQU	(1843200 / (16 * CONBAUD))
 
 	LD	A,$80			; LCR := DLAB ON
@@ -30,8 +41,12 @@ XIO_DIV		.EQU	(1843200 / (16 * CONBAUD))
 	OUT  	(SIO_MCR),A		; MCR := 3, DTR ON, RTS ON
 	LD	A,6			; DISABLE & RESET FIFO'S
 	OUT	(SIO_FCR),A		; DO IT
-	RET
+
 #ENDIF
+
+#ENDIF
+
+	RET
 ;
 XIO_CRLF:	; OUTPUT A NEWLINE
 	LD	A,13			; A = CR
@@ -47,7 +62,17 @@ XIO_DOT:	; OUTPUT A DOT (MARK PROGRESS)
 	LD	A,'.'
 ;	
 XIO_OUTC:	; OUTPUT BYTE IN A
-#IF (PLATFORM == PLT_N8)
+
+#IF (PLATFORM == PLT_UNA)
+	PUSH	DE		; PRESERVE DE
+	LD	BC,$0012	; UNA UNIT = 0, FUNC = WRITE CHAR
+	LD	E,A		; CHAR TO E
+	CALL	$FFFD		; DO IT (RST 08 NOT SETUP YET)
+	POP	DE		; RESTORE DE
+	RET			; DONE
+#ENDIF
+
+#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4))
 	PUSH	AF			; SAVE INCOMING BYTE
 XIO_OUTC1:
 	IN0	A,(CPU_STAT0)
@@ -56,7 +81,9 @@ XIO_OUTC1:
 	POP	AF
 	OUT0	(CPU_TDR0),A
 	RET
-#ELSE
+#ENDIF
+
+#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA) | (PLATFORM == PLT_S2I))
 	PUSH	AF			; SAVE INCOMING BYTE
 XIO_OUTC1:
 	IN	A,(SIO_LSR)		; READ LINE STATUS REGISTER

Source/zcprw.asm

@@ -1,64 +0,0 @@
-;
-;==================================================================================================
-;   WRAPPER FOR ZCPR FOR N8VEM PROJECT
-;   WAYNE WARTHEN - 2011-01-10
-;==================================================================================================
-;
-; THE FOLLOWING MACROS DO THE HEAVY LIFTING TO MAKE THE ZCPR SOURCE
-; COMPATIBLE WITH TASM
-;
-;#DEFINE	DS	.DS
-;#DEFINE	ds	.ds
-#DEFINE	DS	.FILL
-#DEFINE	ds	.fill
-#DEFINE	TITLE	.TITLE
-#DEFINE	title	.title
-#DEFINE	EQU	.EQU
-#define equ	.equ
-#DEFINE	NAME	\;
-#DEFINE	PAGE	.PAGE
-#DEFINE	page	.page
-#DEFINE	CSEG	.CSEG
-#DEFINE	ORG	.ORG
-#DEFINE	org	.org
-#DEFINE	END	.END
-#DEFINE	IF	.IF
-#DEFINE if	.if
-#DEFINE	ELSE	.ELSE
-#DEFINE	else	.else
-#DEFINE	ENDIF	.ENDIF
-#DEFINE endif	.endif
-#DEFINE	DEFB	.DB
-#DEFINE	defb	.db
-#DEFINE	DEFW	.DW
-#DEFINE	defw	.dw
-#DEFINE	DEFL	.EQU
-#DEFINE	defl	.equ
-#DEFINE	DEFS	.DB
-#DEFINE	defs	.db
-#DEFINE	DW	.DW
-#DEFINE	dw	.dw
-#DEFINE	DB	.DB
-#DEFINE	db	.db
-#DEFINE	END	.END
-#DEFINE	end	.end
-;
-;    Add some Z80 instructions
-;
-#ADDINSTR	JR	*	18   2 R1  1
-#ADDINSTR	JRC	*	38   2 R1  1
-#ADDINSTR	JRNC	*	30   2 R1  1
-#ADDINSTR	JRZ	*	28   2 R1  1
-#ADDINSTR	JRNZ	*	20   2 R1  1
-#ADDINSTR	LDIR	""	B0ED 2 NOP 1
-#ADDINSTR	DJNZ	*	10   2 R1  1
-#ADDINSTR	LDED	*	5BED 4 NOP 1
-#ADDINSTR	SDED	*	53ED 4 NOP 1
-;
-; NOW INCLUDE THE MAIN SOURCE
-;
-#INCLUDE "zcpr.asm"
-;
-	.FILL	((CPRLOC + 0800H) - $),055H
-;
-	.END

Source/zsdos.asm

@@ -1,39 +0,0 @@
-;
-;==================================================================================================
-;   WRAPPER FOR ZSDOS/ZDDOS FOR N8VEM PROJECT
-;   WAYNE WARTHEN - 2011-01-09
-;==================================================================================================
-;
-; THE FOLLOWING MACROS DO THE HEAVY LIFTING TO MAKE THE ZSDOS SOURCE
-; COMPATIBLE WITH TASM
-;
-#DEFINE	EQU	.EQU
-#DEFINE	NAME	\;
-#DEFINE	PAGE	.PAGE
-#DEFINE	CSEG	.CSEG
-#DEFINE	DSEG	.DSEG
-#DEFINE	ORG	.ORG
-#DEFINE	END	.END
-#DEFINE	IF	.IF
-#DEFINE	ELSE	.ELSE
-#DEFINE	ENDIF	.ENDIF
-#DEFINE	DEFB	.DB
-#DEFINE	DEFW	.DW
-#DEFINE	FILL	.FILL
-;
-; ZSDOS USES A .LIB FILE FOR CONFIGURATION.  SINCE TASM HAS NO SUPPORT FOR THIS
-; WE JUST INCLUDE THE FILE HERE.
-;
-#DEFINE	BLD_ZSDOS11	TRUE	; TRUE BUILDS VER 1.1, FALSE BUILDS VER 1.2
-#DEFINE	BLD_ZS		TRUE	; TRUE FOR ZSDOS BUILD, FALSE FOR ZDDOS BUILD
-#DEFINE	BLD_ROM		FALSE
-#INCLUDE "zsdos.lib"
-;
-;
-; ESTABLISH STARTING ADDRESS FOR ZSDOS
-;
-	.ORG	0D800H
-;
-; NOW INCLUDE THE MAIN SOURCE
-;
-#INCLUDE "zsdos-gp.z80"

Source/zsdos.lib

@@ -1,185 +0,0 @@
-;
-; WW - CUSTOMIZED FOR N8VEM PROJECT
-;
-
-;.....
-; ZSDOS Customization.  		-HFB,  18 Sept 1987
-;					revised 07/17/88 CWC
-
-FALSE	.EQU	0
-TRUE	.EQU	~FALSE
-
-; Set these conditionals before assembly
-
-;****************************************************************************
-; In the General Public Release version, we have included an equate which
-; controls an additional unreleased fix (which only Howard Goldstein found).
-; If the following equate is set TRUE, a version 1.1 BDOS will be produced
-; which will require no changes to any released utilities.  If set to FALSE,
-; a version 1.2 BDOS will result, and many support utility libraries and
-; overlays will need to be revised to make them function properly.    HFB
-
-;WW - NOW USES BLD_ZSDOS11 TO INHERIT SETTING FROM WRAPPER
-ZSDOS11	.EQU	BLD_ZSDOS11	; Set True for Ver 1.1, False for 1.2
-
-;****************************************************************************
-
-;WW - NOW USES BLD_ZS TO INHERIT SETTING FROM WRAPPER
-ZS	.EQU	BLD_ZS		; Set True for ZSDOS, False for ZDDOS
-
-;----------
-;   Select assembler for ZSDOS.  Any modifications to source code must
-; support these assemblers at minimum.
-
-SLR	.EQU	FALSE		; SLR Z80ASM or SLR180 Assembler, OR ZMAC
-ZAS	.EQU	TRUE 		; MITEK/ECHELON ZAS Assembler (3.0 or later)
-
-	  IF ZAS
-	NAME	DOS
-	  ENDIF
-
-	  IF  SLR
-	.Z80
-	NAME	('DOS')
-	  ENDIF
-
-	  IF ZAS & ZS
-	   IF  ZSDOS11
-	.TITLE	'ZSDOS 1.1 - Enhanced CP/M BDOS Replacement'
-	   ELSE		;~Zsdos11
-	.TITLE	'ZSDOS 1.2 - Enhanced CP/M BDOS Replacement'
-	   ENDIF	;Zsdos11
-	  ENDIF
-	  IF ZAS & (~ZS)
-	   IF  ZSDOS11
-	.TITLE	'ZDDOS 1.1 - Enhanced CP/M BDOS Replacement w/DS'
-	   ELSE		;~Zsdos11	
-	.TITLE	'ZDDOS 1.2 - Enhanced CP/M BDOS Replacement w/DS'
-	   ENDIF	;Zsdos11
-	  ENDIF
-
-	  IF SLR & ZS
-	   IF  ZSDOS11
-	TITLE	"ZSDOS 1.1 - Enhanced CP/M BDOS Replacement"
-	   ELSE		;~Zsdos11
-	TITLE	"ZSDOS 1.2 - Enhanced CP/M BDOS Replacement"
-	   ENDIF	;Zsdos11
-	  ENDIF
-	  IF SLR & (~ZS)
-	   IF  ZSDOS11
-	TITLE	"ZDDOS 1.1 - Enhanced CP/M BDOS Replacement w/DS"
-	   ELSE		;~Zsdos11	
-	TITLE	"ZDDOS 1.2 - Enhanced CP/M BDOS Replacement w/DS"
-	   ENDIF	;Zsdos11
-	  ENDIF
-
-;----------
-;   P2DOS introduced a search path feature compatible with that used in
-; Richard Conn's ZCPR2 and ZCPR3.  If a requested file is not located in
-; the currently logged Drive/User, the SEARCH routine will sequentially
-; scan along the path until either the file is found or the end of the
-; path is reached.
-
-	  IF	ZS
-;WW - changed from EQU to #DEFINE to avoid forward reference error in TASM
-;PATHAD	EQU	IPATH		; Set to the desired ZCPR2/3 search path.
-#DEFINE	PATHAD	IPATH
-	  ELSE			; use 0000H to disable path.  A short
-PATHAD	.EQU	00000H		; 3 element internal path is provided
-	  ENDIF			; in ZSDOS.  ZDDOS does not use path.
-
-;----------
-;   The WHEEL byte may be sensed from within ZSDOS by setting the following
-; address to that of the ZCPR3 WHEEL byte.  A value of 0 disables the WHEEL
-; byte sensing.
-
-WHLADR	.EQU	00000H		; Set WHEEL byte address (0FDFFH for SB180)
-
-;----------
-;   Some systems, like the Kaypro 4, only recognize changes between single
-; and double-sided disks when the system is warm booted; BDOS Function 13
-; (reset disk) will not work.  By adding a "hook" to the BIOS of these mach-
-; ines and setting RESDSK to TRUE, BDOS functions 13 and 37 will allow changes
-; between single and double-sided disks; very handy for disk housekeeping
-; utilities such as NSWP, NULU, and cataloging programs.
-
-;   The "hook" is added as follows: Obtain the source to your computer's BIOS.
-; Examine the code for WARM BOOT.  Somewhere, there should be a call to a rou-
-; tine which initializes the disk system after a warm boot, or which detects
-; changes between single and double-sided disks.  Call this routine DISKINT
-; for purposes of discussion.  Modify your BIOS's cold boot routine to ini-
-; tialize 3 bytes at address SETDSK as "JP DISKINT".  The location of SETDSK
-; is arbitrary, it may be in your BIOS, or in a reserved spot in CP/M's page 0.
-
-RESDSK	.EQU	FALSE
-
-   IF	   RESDSK
-SETDSK	.EQU	004BH		; Set to suit your system (bh)
-   ENDIF		; resdsk (bh)
-
-;----------
-;   The following equate is used to produce separate code and data segments
-; for blowing ZSDOS into ROM.  Calling BDOS Function 0 will initialize the
-; Data Segment to default values.
-
-ROM	.EQU	BLD_ROM		; Separate data and code?
-
-;----------
-;   Many ZSDOS features can be controlled while ZSDOS is running by altering
-; the FLAG byte.  Set the following equate to your desired configuration based
-; on your requirements.  The individual bit assignments in the FLAG byte are:
-;
-; Bit -	7 6 5 4 3 2 1 0
-;	 \ \ \ \ \ \ \ \__Public File Enable (1) / Disable (0)
-;	  \ \ \ \ \ \ \___Public/Path Write Enable (1) / Disable (0)
-;	   \ \ \ \ \ \____Read-Only Enable (1) / Disable (0)
-;	    \ \ \ \ \_____Fast Fixed Disk Relog Enable (1) / Disable (0)
-;	     \ \ \ \______Disk Change Warning Enable (1) / Disable (0)
-;	      \ \ \_______ZCPR2/3 Path Enable (1) / Disable (0)
-;	       \ \________Path without System Enable (1) / Disable (0)
-;		\_________(Reserved)
-
-FLGBITS	.EQU	01101101B	; PUBLIC On, P/P Write Off, R/O On, 
-				; Fast Relog On,Disk Change warning Off, 
-				; Path On, No System path On
-
-; The operation of Bit 6 represents a deviation from the description of PUBLIC
-; Files as given in DDJ Article by Bridger Mitchell and Derek McKay of Plu*
-; Perfect Systems.  The PUBLIC Specification states that Public Files will NOT
-; be found by any wildcard reference except when a "?" is in the FCB+0 byte.
-; The code here relaxes that requirement as follows:  If we are in the same
-; user area as the public file, then don't report the file as PUBLIC, but find
-; it.  This has a nasty side effect - it allows erasing of PUBLIC files if we
-; are in the same area.  However, these files also show up on the directory
-; (they wouldn't otherwise), so at least we should know we're blasting them.
-
-;----------
-; Equates for selecting ZSDOS or ZDDOS configurations
-
-; Since much ZSDOS code must be deleted to embed DateStamper in ZDDOS, the
-; following flags do the stripping:
-;	PICKEY	- True = Don't save users' DE register
-;	CTLREN	- True = Add ^R Retype line to cons read, False = No ^R
-;	UNROLL	- True = Inline code for shifts, False = collapse into loops
-;	UPATH	- True = Add User path from OS, False = No OS path search
-
-	  IF ZS
-CTLREN	.EQU	TRUE
-UNROLL	.EQU	TRUE
-UPATH	.EQU	TRUE
-PICKEY	.EQU	FALSE
-	  ELSE
-CTLREN	.EQU	FALSE
-UNROLL	.EQU	FALSE
-UPATH	.EQU	FALSE
-PICKEY	.EQU	FALSE
-	  ENDIF
-
-;----------
-; To Use the Named-COMMON aspect of NZCOM and JETLOADER (tm), the BIOS must
-; be referenced from the _BIOS_ name.  If operating under this scheme, set
-; the ZRL equate to TRUE.  With the ZRL equate set to FALSE, a standalone
-; .REL file will be produced with no external requirements.
-
-ZRL	.EQU	FALSE		; Set True .ZRL file with COMMON for NZCOM,
-				;     False to produce straight .REL file