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Minor Cosmetic Cleanup

Primarily fixed the Z280 config files to display the correct CPU speed in boot messages.
pull/283/head
Wayne Warthen 4 years ago
parent
commit
36b160f934
  1. 7
      Source/CBIOS/cbios.asm
  2. 7
      Source/CPM3/diskio.z80
  3. 2
      Source/HBIOS/Config/RCZ280_nat.asm
  4. 6
      Source/HBIOS/Config/RCZ280_nat_zzr.asm
  5. 2
      Source/HBIOS/cfg_rcz280.asm
  6. 13
      Source/HBIOS/std.asm
  7. 45
      Source/ZZR/Bank Layout.txt
  8. 30
      Source/ZZR/Build.cmd
  9. 22
      Source/ZZR/Makefile
  10. 2
      Source/ver.inc
  11. 2
      Source/ver.lib

7
Source/CBIOS/cbios.asm

@ -2412,6 +2412,13 @@ MD_INIT:
; UDPATE THE RAM/ROM DPB STRUCTURES BASED ON HARDWARE
;
#IFDEF PLTWBW
; TODO: HANDLE DISABLED RAM/ROM DISK BETTER.
; IF RAM OR ROM DISK ARE DISABLED, BELOW WILL STILL
; TRY TO ADJUST THE DPB BASED ON RAM BANK CALCULATIONS.
; IT SHOULD NOT MATTER BECAUSE THE DPB SHOULD NEVER BE
; USED. IT WOULD BE BETTER TO GET RAMD0/ROMD0 AND
; RAMDN/ROMDN FROM THE HCB AND USE THOSE TO CALC THE
; DPB ADJUSTMENT. IF DN-D0=0, BYPASS ADJUSTMENT.
LD A,(HCB + HCB_ROMBANKS) ; ROM BANK COUNT
SUB 4 ; REDUCE BANK COUNT BY RESERVED PAGES
LD IX,DPB_ROM ; ADDRESS OF DPB

7
Source/CPM3/diskio.z80

@ -355,6 +355,13 @@ dpb$hdnew: ; 8MB Hard Disk Drive (new format)
; called for first time initialization.
dsk$init:
; TODO: Handle disabled RAM/ROM disk better.
; If RAM or ROM disk are disabled, below will still
; try to adjust the DPB based on RAM bank calculations.
; It should not matter because the DPB should never be
; used. It would be better to get RAMD0/ROMD0 and
; RAMDN/ROMDN from the HCB and use those to calc the
; DPB adjustment. If DN-D0=0, bypass adjustment.
ld b,0FAh ; HBIOS Peek Function
ld a,(@hbbio) ; HBIOS bank id
ld d,a ; ... goes in D

2
Source/HBIOS/Config/RCZ280_nat.asm

@ -28,7 +28,7 @@
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 24000000 ; CPU OSC FREQ IN MHZ
CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;

6
Source/HBIOS/Config/RCZ280_nat_zzr.asm

@ -28,7 +28,7 @@
;
#include "Config/RCZ280_nat.asm"
;
CPUOSC .SET 29491200 ; CPU OSC FREQ IN MHZ
CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
;
RAMSIZE .SET 256 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .SET 256 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
@ -39,4 +39,6 @@ RAMBIAS .SET (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS
MDROM .SET TRUE ; MD: ENABLE ROM DISK
MDRAM .SET FALSE ; MD: ENABLE RAM DISK
;
Z2U0HFC .SET TRUE ; Z2U 0: ENABLE HARDWARE FLOW CONTROL
;
Z2UOSC .SET (CPUOSC / 8) ; Z2U: OSC FREQUENCY IN MHZ
Z2U0HFC .SET TRUE ; Z2U0: ENABLE HARDWARE FLOW CONTROL

2
Source/HBIOS/cfg_rcz280.asm

@ -27,7 +27,7 @@ BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMED
;
CPUSPDCAP .EQU SPD_FIXED ; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
CPUSPDDEF .EQU SPD_HIGH ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
CPUOSC .EQU 24000000 ; CPU OSC FREQ IN MHZ
CPUOSC .EQU 12000000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;

13
Source/HBIOS/std.asm

@ -528,7 +528,18 @@ BID_IMG2 .EQU BID_ROM0 + 3 ; NETWORK BOOT -+ ROM BANKS
BID_ROMD0 .EQU BID_ROM0 + 4 ; FIRST ROM DRIVE BANK | ROM
BID_ROMDN .EQU BID_ROMN ; LAST ROM DRIVE BANK V DRIVE
;
#IF FALSE
#IF (!MDRAM)
BID_RAMD0 .SET $FF ; RAM DRIVE DISABLED
BID_RAMDN .SET $FF ; RAM DRIVE DISABLED
#ENDIF
;
#IF (!MDROM)
BID_ROMD0 .SET $FF ; ROM DRIVE DISABLED
BID_ROMDN .SET $FF ; ROM DRIVE DISABLED
#ENDIF
;
;
#IF TRUE
.ECHO "BID_AUX: " \ .ECHO BID_AUX \ .ECHO "\n"
.ECHO "BID_BIOS: " \ .ECHO BID_BIOS \ .ECHO "\n"
.ECHO "BID_USR: " \ .ECHO BID_USR \ .ECHO "\n"

45
Source/ZZR/Bank Layout.txt

@ -1,19 +1,32 @@
ZZRCC has no real ROM. It has a single 512K RAM chip. The first
256K of the RAM chip is loaded from the CF card. This 256K is
treated like ROM by RomWBW. The remainder of the RAM (256K) is
treated like RAM by RomWBW.
Because of the memory constraints, notice that there is no RAM Disk,
only a ROM disk. If you perform a ROM boot to an OS, the A: drive
will be the ROM disk and will not be writable. Booting a ROM OS
on this system is not typical since the system has a CF card by
definition.
Bank ROM RAM RAM
---- --- --- ---
0 HBIOS (IMG) RAMDISK RAMDISK
1 ROMLDR+MON+CP/M2+ZSYS RAMDISK RAMDISK
2 FTH+BAS+TBAS+PLAY+USR RAMDISK RAMDISK
3 RESERVED RAMDISK RAMDISK
4 ROMDISK RAMDISK RAMDISK
5 ROMDISK RAMDISK RAMDISK
6 ROMDISK RAMDISK RAMDISK
7 ROMDISK RAMDISK RAMDISK
0 HBIOS (IMG)
1 ROMLDR+MON+CP/M2+ZSYS
2 FTH+BAS+TBAS+PLAY+USR
3 RESERVED
4 ROMDISK
5 ROMDISK
6 ROMDISK
7 ROMDISK
8 ROMDISK BUF (CPM3) BUF (CPM3)
9 ROMDISK BUF (CPM3) BUF (CPM3)
A ROMDISK BUF (CPM3) BUF (CPM3)
B ROMDISK BUF (CPM3) BUF (CPM3)
C ROMDISK AUX (CPM3) TPA (CPM3)
D ROMDISK HBIOS (EXEC) HBIOS (EXEC)
E ROMDISK TPA-LO OS (CPM3)
F ROMDISK COMMON (TPA-HI) COMMON (TPA-HI)
8 BUF (CPM3) BUF (CPM3)
9 BUF (CPM3) BUF (CPM3)
A BUF (CPM3) BUF (CPM3)
B BUF (CPM3) BUF (CPM3)
C AUX (CPM3) TPA (CPM3)
D HBIOS (EXEC) HBIOS (EXEC)
E TPA-LO OS (CPM3)
F COMMON (TPA-HI) COMMON (TPA-HI)
--WBW 6:40 PM 2/16/2022

30
Source/ZZR/Build.cmd

@ -1,7 +1,27 @@
@echo off
setlocal
if not exist ..\..\Binary\RCZ280_nat_zzr.rom goto :eof
set ROMFILE=..\..\Binary\RCZ280_nat_zzr.rom
set ROMSIZE=262144
if not exist %ROMFILE% goto :eof
::
:: The ROM image *must* be exactly 256K or the resulting disk
:: image produced below will be invalid. Check for the proper size.
::
call :filesize %ROMFILE%
if "%FILESIZE%" neq "%ROMSIZE%" (
echo.
echo.
echo ERROR: "%ROMFILE%" is not exactly %ROMSIZE% bytes as required!!!
echo You must specify a ROMSIZE of "256" when building the ZZRCC ROM image.
echo.
echo.
exit /b 1
)
rem ..\..\Tools\srecord\srec_cat.exe ..\..\Binary\RCZ280_nat_zzr.rom -Binary -Exclude 0x5000 0x7000 zzr_romldr.hex -Intel -Output ..\..\Binary\RCZ280_nat_zzr.hex -Intel || exit /b
@ -13,4 +33,10 @@ rem copy /b zzr_cfldr.bin + zzr_ptbl.bin + zzr_fill_1.bin + zzr_mon.bin + zzr_fi
copy /b zzr_cfldr.bin + zzr_ptbl.bin + zzr_fill_1.bin + zzr_mon.bin + zzr_fill_2.bin + ..\..\Binary\RCZ280_nat_zzr.rom + zzr_fill_3.bin ..\..\Binary\hd1024_zzr_prefix.dat || exit /b
copy /b ..\..\Binary\hd1024_zzr_prefix.dat + ..\..\Binary\hd1024_cpm22.img + ..\..\Binary\hd1024_zsdos.img + ..\..\Binary\hd1024_nzcom.img + ..\..\Binary\hd1024_cpm3.img + ..\..\Binary\hd1024_zpm3.img + ..\..\Binary\hd1024_ws4.img ..\..\Binary\hd1024_zzr_combo.img || exit /b
copy /b ..\..\Binary\hd1024_zzr_prefix.dat + ..\..\Binary\hd1024_cpm22.img + ..\..\Binary\hd1024_zsdos.img + ..\..\Binary\hd1024_nzcom.img + ..\..\Binary\hd1024_cpm3.img + ..\..\Binary\hd1024_zpm3.img + ..\..\Binary\hd1024_ws4.img ..\..\Binary\hd1024_zzr_combo.img || exit /b
goto :eof
:filesize
set FILESIZE=%~z1
goto :eof

22
Source/ZZR/Makefile

@ -1,17 +1,15 @@
HD1024ZZRPREFIX = hd1024_zzr_prefix.dat
HD1024ZZZROMBOIMG = hd1024_zzr_combo.img
ZZRROM = ../../Binary/RCZ280_nat_zzr.rom
ZZRLDRROM = RCZ280_nat_zzr_ldr.rom
ZZRROMHEX = RCZ280_nat_zzr.hex
HD1024IMGS = ../../Binary/hd1024_cpm22.img ../../Binary/hd1024_zsdos.img ../../Binary/hd1024_nzcom.img \
../../Binary/hd1024_cpm3.img ../../Binary/hd1024_zpm3.img ../../Binary/hd1024_ws4.img
ZZRROMSIZE = 262144
OBJECTS :=
ifneq ($(wildcard $(ZZRROM)),)
# OBJECTS += $(ZZRROMHEX) $(ZZRLDRROM) $(HD1024ZZRPREFIX) $(HD1024ZZZROMBOIMG)
OBJECTS += $(ZZRROMHEX) $(HD1024ZZRPREFIX) $(HD1024ZZZROMBOIMG)
OBJECTS += $(ZZRROMHEX) $(HD1024ZZRPREFIX) $(HD1024ZZZROMBOIMG)
endif
DEST=../../Binary
@ -22,16 +20,14 @@ include $(TOOLS)/Makefile.inc
DIFFPATH = $(DIFFTO)/Binary
$(HD1024ZZRPREFIX):
# cat zzr_cfldr.bin zzr_ptbl.bin zzr_fill_1.bin zzr_mon.bin zzr_fill_2.bin $(ZZRLDRROM) zzr_fill_3.bin >$@
zzrromchk:
[ `stat -c%s $(ZZRROM)` = $(ZZRROMSIZE) ]
$(HD1024ZZRPREFIX): zzrromchk
cat zzr_cfldr.bin zzr_ptbl.bin zzr_fill_1.bin zzr_mon.bin zzr_fill_2.bin $(ZZRROM) zzr_fill_3.bin >$@
$(HD1024ZZZROMBOIMG): $(HD1024ZZRPREFIX) $(HD1024IMGS)
cat $^ > $@
$(HD1024ZZZROMBOIMG): zzrromchk $(HD1024ZZRPREFIX) $(HD1024IMGS)
cat $(HD1024ZZRPREFIX) $(HD1024IMGS) > $@
$(ZZRROMHEX): $(ZZRROM)
# srec_cat $(ZZRROM) -Binary -Exclude 0x5000 0x7000 zzr_romldr.hex -Intel -Output $(ZZRROMHEX) -Intel
$(ZZRROMHEX): zzrromchk $(ZZRROM)
srec_cat $(ZZRROM) -Binary -Output $(ZZRROMHEX) -Intel -CRLF
$(ZZRLDRROM): $(ZZRROMHEX)
srec_cat $(ZZRROMHEX) -Intel -Output $(ZZRLDRROM) -Binary

2
Source/ver.inc

@ -2,4 +2,4 @@
#DEFINE RMN 1
#DEFINE RUP 1
#DEFINE RTP 0
#DEFINE BIOSVER "3.1.1-pre.157"
#DEFINE BIOSVER "3.1.1-pre.158"

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 1
rup equ 1
rtp equ 0
biosver macro
db "3.1.1-pre.157"
db "3.1.1-pre.158"
endm

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