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ez80: some general improvements to ez80 HBIOS drivers and implemented a true interrupt driver timer tick driver

pull/424/head
Dean Netherton 2 years ago
parent
commit
37e682adc7
  1. 6
      Source/HBIOS/Config/RCEZ80_std.asm
  2. 4
      Source/HBIOS/cfg_rcez80.asm
  3. 76
      Source/HBIOS/ez80cpudrv.asm
  4. 19
      Source/HBIOS/ez80instr.inc
  5. 2
      Source/HBIOS/ez80rtc.asm
  6. 81
      Source/HBIOS/ez80systmr.asm
  7. 3
      Source/HBIOS/ez80uart.asm
  8. 205
      Source/HBIOS/hbios.asm
  9. 6
      Source/HBIOS/std.asm
  10. 2
      Source/HBIOS/tms.asm

6
Source/HBIOS/Config/RCEZ80_std.asm

@ -33,13 +33,10 @@ CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES
;
EZ80RTCENABLE .SET TRUE ; EZ80 ON CHIP RTC
;
UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
EZ80UARTENABLE .SET TRUE ; EZ80UART: ENABLE EZ80 UART DRIVER (EZ80UART.ASM)
;
LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
@ -67,5 +64,8 @@ IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
EZ80UARTENABLE .SET TRUE ; EZ80 UART: ENABLE EZ80 UART0 DRIVER (EZ80UART.ASM)
EZ80RTCENABLE .SET TRUE ; EZ80 ON CHIP RTC
EZ80TIMER .SET EZ80TMR_INT ; EZ80: TIMER TICK MODEL: EZ80TMR_[INT|FIRM]
EZ80_IO_FREQ .SET 5250
EZ80_MEM_FREQ .SET 8000

4
Source/HBIOS/cfg_rcez80.asm

@ -130,6 +130,10 @@ BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
EZ80RTCENABLE .EQU TRUE ; EZ80 ON CHIP RTC
;
EZ80TMR_INT .EQU 1 ; MARSHALL TIMER TICK INTERRUPTS FROM EZ80 TO HBIOS
EZ80TMR_FIRM .EQU 2 ; DELEGATE SYS TIMER HBIOS CALL TO EZ80 FIRMWARE (TIMER TICK INTS DISABLED)
EZ80TIMER .EQU EZ80TMR_INT ; EZ80: TIMER TICK MODEL: EZ80TMR_[INT|FIRM]
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
RP5RTCENABLE .EQU FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)

76
Source/HBIOS/ez80cpudrv.asm

@ -0,0 +1,76 @@
;
;==================================================================================================
; EZ80 50/60HZ TIMER TICK DRIVER
;==================================================================================================
;
; Communicate with on-chip eZ80 firmware to:
; 1. Exchange platform version numbers
; 2. Configure memory banking type
; 3. Retrieve CPU Frequency
; 4. Set Memory and I/O Bus Timings
; 5. Set Timer Tick Frequency
;
EZ80_PREINIT:
EZ80_TMR_INT_DISABLE()
; PROVIDE THE EZ80 FIRMWARE WITH PLATFORM CONFIGUATIONS
LD C, 1 ; RomWBW'S ASSIGNED CODE
LD D, RMJ
LD E, RMN
LD H, RUP
LD L, RTP
EZ80_UTIL_VER_EXCH()
; TODO CHECK RETURNED VERSION AND WARN IF NOT GOOD
; EXPECT A VERSION NUMBER > 0.1.0.0
LD C, MEMMGR
LD HL, ROMSIZE
LD DE, RAMSIZE
EZ80_UTIL_BNK_HLP() ; INSTAL HIGH PERFORMANCE BANK SWITCHER
; TODO CHECK RESULT AND USE STANDARD BANK SWITCHER IF NZ RETURNED
; OTHERWISE USE RST.L %18 FOR BANK SWITCH HELPER
EZ80_UTIL_GET_CPU_FQ()
LD A, E
LD (CB_CPUMHZ), A
LD (CB_CPUKHZ), HL
LD (HB_CPUOSC), HL
#IF (EZ80_ASSIGN == 1)
LD H, EZ80_MEM_CYCLES
LD L, EZ80_IO_CYCLES
EZ80_UTIL_SET_BUSTM()
#ELSE
LD HL, EZ80_MEM_FREQ
LD DE, EZ80_IO_FREQ
EZ80_UTIL_SET_BUSFQ() ; H -> CS3 CYCLES, L -> CS2 CYCLES
#ENDIF
LD A, H
LD (EZ80_PLT_C3CYL), A
LD A, L
LD (EZ80_PLT_C2CYL), A
LD C, TICKFREQ
EZ80_TMR_SET_FREQTICK
LD A, 5 ; HB_CPUTYPE = 5 FOR eZ80
LD (HB_CPUTYPE),A
RET
EZ80_RPT_TIMINGS:
LD A,(EZ80_PLT_C3CYL)
CALL PRTDECB
CALL PRTSTRD
.TEXT " MEM B/C, $"
LD A,(EZ80_PLT_C2CYL)
CALL PRTDECB
CALL PRTSTRD
.TEXT " I/O B/C$"
RET
EZ80_PLT_C3CYL:
.DB EZ80_MEM_CYCLES
EZ80_PLT_C2CYL:
.DB EZ80_IO_CYCLES

19
Source/HBIOS/ez80instr.inc

@ -27,14 +27,17 @@
#DEFINE EZ80_RTC_GET_TIME LD A, 1 \ LD B, 1 \ EZ80_FN
#DEFINE EZ80_RTC_SET_TIME LD A, 1 \ LD B, 2 \ EZ80_FN
#DEFINE EZ80_TMR_GET_TICKS LD A, 2 \ LD B, 0 \ EZ80_FN
#DEFINE EZ80_TMR_GET_SECONDS LD A, 2 \ LD B, 1 \ EZ80_FN
#DEFINE EZ80_TMR_SET_TICKS LD A, 2 \ LD B, 2 \ EZ80_FN
#DEFINE EZ80_TMR_SET_SECONDS LD A, 2 \ LD B, 3 \ EZ80_FN
#DEFINE EZ80_TMR_GET_FREQTICK LD A, 2 \ LD B, 4 \ EZ80_FN
#DEFINE EZ80_TMR_SET_FREQTICK LD A, 2 \ LD B, 5 \ EZ80_FN
#DEFINE EZ80_TMR_DELAY_START LD A, 2 \ LD B, 6 \ EZ80_FN
#DEFINE EZ80_TMR_DELAY_WAIT LD A, 2 \ LD B, 7 \ EZ80_FN
#DEFINE EZ80_TMR_GET_TICKS LD A, 2 \ LD B, 0 \ EZ80_FN
#DEFINE EZ80_TMR_GET_SECONDS LD A, 2 \ LD B, 1 \ EZ80_FN
#DEFINE EZ80_TMR_SET_TICKS LD A, 2 \ LD B, 2 \ EZ80_FN
#DEFINE EZ80_TMR_SET_SECONDS LD A, 2 \ LD B, 3 \ EZ80_FN
#DEFINE EZ80_TMR_GET_FREQTICK LD A, 2 \ LD B, 4 \ EZ80_FN
#DEFINE EZ80_TMR_SET_FREQTICK LD A, 2 \ LD B, 5 \ EZ80_FN
#DEFINE EZ80_TMR_DELAY_START LD A, 2 \ LD B, 6 \ EZ80_FN
#DEFINE EZ80_TMR_DELAY_WAIT LD A, 2 \ LD B, 7 \ EZ80_FN
#DEFINE EZ80_TMR_INT_DISABLE LD A, 2 \ LD B, 8 \ EZ80_FN
#DEFINE EZ80_TMR_INT_ENABLE LD A, 2 \ LD B, 9 \ EZ80_FN
#DEFINE EZ80_TMR_IS_TICK_ISR LD A, 2 \ LD B, 10 \ EZ80_FN
#DEFINE EZ80_DELAY_START(p,store) \
#DEFCONT \ PUSH AF

2
Source/HBIOS/ez80rtc.asm

@ -18,7 +18,7 @@ EZ80RTC_INIT:
RET NZ ; IF ALREADY ACTIVE, ABORT
CALL NEWLINE ; FORMATTING
PRTS("EZ80 RTC: ON-CHIP $")
PRTS("EZ80 RTC: POWERED $")
EZ80_RTC_INIT()
JR Z, RTC_POWERED

81
Source/HBIOS/ez80systmr.asm

@ -0,0 +1,81 @@
;
;==================================================================================================
; EZ80 50/60HZ TIMER TICK DRIVER
;==================================================================================================
;
; Configuration options:
; EZ80TIMER:
; 0 -> No timer tick interrupts MARSHALLED to HBIOS.
; HBIOS System calls SYS_GETTIMER, SYS_GETSECS, SYS_SETTIMER, SYS_SETSECS are implemented here and DELEGATED to eZ80 firmware functions
; 1 -> Timer tick interrupts MARSHALLED to HBIOS.
; HBIOS System calls SYS_GETTIMER, SYS_GETSECS, SYS_SETTIMER, SYS_SETSECS are implemented within HBIOS
;
#IF (EZ80TIMER == EZ80TMR_INT)
EZ80_TMR_INIT:
CALL NEWLINE ; FORMATTING
PRTS("EZ80 TIMER: INTERRUPTS ENABLED$")
LD HL,EZ80_TMR_INT ; GET INT VECTOR
CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST
EZ80_TMR_INT_ENABLE() ; INSTALL TIMER HOOK
RET
EZ80_TMR_INT:
EZ80_TMR_IS_TICK_ISR()
RET Z ; NOT A EZ80 TIMER TICK
CALL HB_TIMINT ; RETURN NZ - HANDLED
OR $FF
RET
#ELSE
EZ80_TMR_INIT:
CALL NEWLINE ; FORMATTING
PRTS("EZ80 TIMER: FIRMWARE$")
RET
; -----------------------------------------------
; Implementation of HBIOS SYS TIMER functions to
; delegate to eZ80 firmware functions
; GET TIMER
; RETURNS:
; DE:HL: TIMER VALUE (32 BIT)
;
SYS_GETTIMER:
EZ80_TMR_GET_TICKS()
RET
;
; GET SECONDS
; RETURNS:
; DE:HL: SECONDS VALUE (32 BIT)
; C: NUM TICKS WITHIN CURRENT SECOND
;
SYS_GETSECS:
EZ80_TMR_GET_SECONDS()
EZ80_UTIL_HL_TO_EHL() ; E:HL{15:0} <- HL{23:0}
LD D, 0
RET
;
; SET TIMER
; ON ENTRY:
; DE:HL: TIMER VALUE (32 BIT)
;
SYS_SETTIMER:
EZ80_UTIL_EHL_TO_HL() ; HL{23:0} <- E:HL{15:0}
EZ80_TMR_SET_TICKS()
RET
;
; SET SECS
; ON ENTRY:
; DE:HL: SECONDS VALUE (32 BIT)
;
SYS_SETSECS:
EZ80_UTIL_EHL_TO_HL() ; HL{23:0} <- E:HL{15:0}
EZ80_TMR_SET_SECONDS()
RET
#ENDIF

3
Source/HBIOS/ez80uart.asm

@ -44,6 +44,9 @@ EZUART_PREINIT:
RET
EZUART_INIT:
CALL NEWLINE ; FORMATTING
PRTS("EZ80 UART: UART0$")
XOR A
RET
;

205
Source/HBIOS/hbios.asm

@ -2135,86 +2135,6 @@ HB_CLRIVT_Z:
;
LD HL,0 ; L = 0 MEANS Z80
;
#IF (CPUFAM == CPU_EZ80)
; PROVIDE THE EZ80 FIRMWARE WITH PLATFORM CONFIGUATIONS
LD C, 1 ; RomWBW'S ASSIGNED CODE
LD D, RMJ
LD E, RMN
LD H, RUP
LD L, RTP
EZ80_UTIL_VER_EXCH()
; TODO CHECK RETURNED VERSION AND WARN IF NOT GOOD
; EXPECT A VERSION NUMBER > 0.1.0.0
LD C, MEMMGR
LD HL, ROMSIZE
LD DE, RAMSIZE
EZ80_UTIL_BNK_HLP() ; INSTAL HIGH PERFORMANCE BANK SWITCHER
; TODO CHECK RESULT AND USE STANDARD BANK SWITCHER IF NZ RETURNED
; OTHERWISE USE RST.L %18 FOR BANK SWITCH HELPER
EZ80_UTIL_GET_CPU_FQ()
LD A, E
LD (CB_CPUMHZ), A
LD (CB_CPUKHZ), HL
LD (HB_CPUOSC), HL
#IF (EZ80_ASSIGN == 1)
LD H, EZ80_MEM_CYCLES
LD L, EZ80_IO_CYCLES
EZ80_UTIL_SET_BUSTM()
#ELSE
LD HL, EZ80_MEM_FREQ
LD DE, EZ80_IO_FREQ
EZ80_UTIL_SET_BUSFQ() ; H -> CS3 CYCLES, L -> CS2 CYCLES
#ENDIF
LD A, H
LD (EZ80_PLT_C3CYL), A
LD A, L
LD (EZ80_PLT_C2CYL), A
LD C, TICKFREQ
EZ80_TMR_SET_FREQTICK
LD HL, 5 ; HB_CPUTYPE = 5 FOR eZ80
JR PLT_DESCR_END
PLT_DESCR:
EZ80_PLT_EZ80VER:
.DB RMJ
.DB RMN
.DB RUP
.DB RTP
EZ80_PLT_CPUOSC:
.DW CPUOSC & $FFFF
.DW CPUOSC >> 16
EZ80_PLT_CPUMHZ:
.DB PLATFORM
EZ80_PLT_CPUKHZ:
.DB MEMMGR
.DB RAMSIZE & $FF
EZ80_PLT_CHIP_ID:
.DB RAMSIZE >> 8
EZ80_PLT_RESVRD:
.DB ROMSIZE & $FF
.DB ROMSIZE >> 8
.DB 0 ; RESERVED
.DB 0 ; RESERVED
EZ80_PLT_C3CYL:
.DB EZ80_MEM_CYCLES
EZ80_PLT_C2CYL:
.DB EZ80_IO_CYCLES
PLT_DESCR_END:
#ENDIF
;
#IF (CPUFAM == CPU_Z180)
;
; TEST FOR ORIGINAL Z180 USING MLT
@ -2265,6 +2185,10 @@ HB_CPU1:
; SOME DRIVERS NEED TO BE CALLED AS EARLY AS WE CAN ONE AN OPERATING
; ENVIRONMENT IS ESTABLISHED.
;
#IF (CPUFAM == CPU_EZ80)
; THIS WILL RE-ASSIGN HB_CPUTYPE
CALL EZ80_PREINIT
#ENDIF
#IF (SN76489ENABLE)
; SN76489 CHIP GENERATES UGLY NOISE AFTER HARDWARE RESET.
; WE CALL THIS DRIVER'S PREINIT ASAP TO SHUT OFF THE NOISE.
@ -3004,10 +2928,7 @@ HB_Z280BUS1:
; DISPLAY MEMORY TIMINGS
;
#IF (CPUFAM == CPU_EZ80)
LD A,(EZ80_PLT_C3CYL)
CALL PRTDECB
CALL PRTSTRD
.TEXT " MEM B/C, $"
CALL EZ80_RPT_TIMINGS
#ELSE
#IF (CPUFAM == CPU_Z280)
@ -3033,11 +2954,7 @@ HB_Z280BUS1:
; DISPLAY I/O TIMINGS
;
#IF (CPUFAM == CPU_EZ80)
LD A,(EZ80_PLT_C2CYL)
CALL PRTDECB
CALL PRTSTRD
.TEXT " I/O B/C$"
; ALREADY REPORTED BY DRIVER
#ELSE
LD A,1
#IF (CPUFAM == CPU_Z180)
@ -3848,6 +3765,10 @@ HB_INITTBL:
#IF (EZ80RTCENABLE)
.DW EZ80RTC_INIT
#ENDIF
#IF (CPUFAM == CPU_EZ80)
; INITALISE ONE OF THE SUPPORTED SYSTEM TIMER TICKS DRIVERS
.DW EZ80_TMR_INIT
#ENDIF
#IF (VDUENABLE)
.DW VDU_INIT
#ENDIF
@ -5119,16 +5040,16 @@ SYS_GETFN:
POP DE ; ... TO DE
RET ; AF STILL HAS RESULT OF CALC
;
#IF ((CPUFAM == CPU_EZ80) & (EZ80TIMER == EZ80TMR_FIRM))
; IMPLEMENTED IN EZ80DRV.ASM
;
#ELSE
;
; GET TIMER
; RETURNS:
; DE:HL: TIMER VALUE (32 BIT)
;
SYS_GETTIMER:
#IF (CPUFAM == CPU_EZ80)
EZ80_TMR_GET_TICKS()
RET
#ELSE
LD HL,HB_TICKS
HB_DI
CALL LD32
@ -5137,7 +5058,11 @@ SYS_GETTIMER:
XOR A
RET
#ENDIF
;
#IF ((CPUFAM == CPU_EZ80) & (EZ80TIMER == EZ80TMR_FIRM))
; IMPLEMENTED IN EZ80DRV.ASM
;
#ELSE
;
; GET SECONDS
; RETURNS:
@ -5145,14 +5070,6 @@ SYS_GETTIMER:
; C: NUM TICKS WITHIN CURRENT SECOND
;
SYS_GETSECS:
#IF (CPUFAM == CPU_EZ80)
EZ80_TMR_GET_SECONDS()
EZ80_UTIL_HL_TO_EHL() ; E:HL{15:0} <- HL{23:0}
LD D, 0
RET
#ELSE
LD HL,HB_SECS
HB_DI
CALL LD32
@ -5366,16 +5283,16 @@ SYS_SETBOOTINFO:
XOR A
RET
;
#IF ((CPUFAM == CPU_EZ80) & (EZ80TIMER == EZ80TMR_FIRM))
; IMPLEMENTED IN EZ80DRV.ASM
;
#ELSE
;
; SET TIMER
; ON ENTRY:
; DE:HL: TIMER VALUE (32 BIT)
;
SYS_SETTIMER:
#IF (CPUFAM == CPU_EZ80)
EZ80_UTIL_EHL_TO_HL() ; HL{23:0} <- E:HL{15:0}
EZ80_TMR_SET_TICKS()
RET
#ELSE
LD BC,HB_TICKS
HB_DI
CALL ST32
@ -5383,18 +5300,16 @@ SYS_SETTIMER:
XOR A
RET
#ENDIF
#IF ((CPUFAM == CPU_EZ80) & (EZ80TIMER == EZ80TMR_FIRM))
; IMPLEMENTED IN EZ80DRV.ASM
;
#ELSE
;
; SET SECS
; ON ENTRY:
; DE:HL: SECONDS VALUE (32 BIT)
;
SYS_SETSECS:
#IF (CPUFAM == CPU_EZ80)
EZ80_UTIL_EHL_TO_HL() ; HL{23:0} <- E:HL{15:0}
EZ80_TMR_SET_SECONDS()
RET
#ELSE
LD BC,HB_SECS
HB_DI
CALL ST32
@ -8152,14 +8067,7 @@ SIZ_RP5RTC .EQU $ - ORG_RP5RTC
MEMECHO SIZ_RP5RTC
MEMECHO " bytes.\n"
#ENDIF
#IF (EZ80RTCENABLE)
ORG_EZ80RTC .EQU $
#INCLUDE "ez80rtc.asm"
SIZ_EZ80RTC .EQU $ - ORG_EZ80RTC
MEMECHO "EZ80RTC occupies "
MEMECHO SIZ_EZ80RTC
MEMECHO " bytes.\n"
#ENDIF
;
#IF (ASCIENABLE)
ORG_ASCI .EQU $
#INCLUDE "asci.asm"
@ -8205,15 +8113,6 @@ SIZ_SIO .EQU $ - ORG_SIO
MEMECHO " bytes.\n"
#ENDIF
;
#IF (EZ80UARTENABLE)
ORG_EZU .EQU $
#INCLUDE "ez80uart.asm"
SIZ_EZU .EQU $ - ORG_EZU
MEMECHO "EZ80 UART occupies "
MEMECHO SIZ_EZU
MEMECHO " bytes.\n"
#ENDIF
;
#IF (ACIAENABLE)
ORG_ACIA .EQU $
#INCLUDE "acia.asm"
@ -8560,6 +8459,50 @@ SIZ_YM2612 .EQU $ - ORG_YM2612
MEMECHO " bytes.\n"
#ENDIF
;
;
#IF (CPUFAM == CPU_EZ80)
MEMECHO "EZ80 DRIVERS\n"
ORG_EZ80DRVS .EQU $
;
ORG_EZ80CPUDRV .EQU $
#INCLUDE "ez80cpudrv.asm"
SIZ_EZ80CPUDRV .EQU $ - ORG_EZ80CPUDRV
MEMECHO " EZ80 CPU DRIVER occupies "
MEMECHO SIZ_EZ80CPUDRV
MEMECHO " bytes.\n"
;
ORG_EZ80SYSTMR .EQU $
#INCLUDE "ez80systmr.asm"
SIZ_EZ80SYSTMR .EQU $ - ORG_EZ80SYSTMR
MEMECHO " EZ80 SYS TIMER occupies "
MEMECHO SIZ_EZ80SYSTMR
MEMECHO " bytes.\n"
;
#IF (EZ80RTCENABLE)
ORG_EZ80RTC .EQU $
#INCLUDE "ez80rtc.asm"
SIZ_EZ80RTC .EQU $ - ORG_EZ80RTC
MEMECHO " EZ80 RTC occupies "
MEMECHO SIZ_EZ80RTC
MEMECHO " bytes.\n"
#ENDIF
;
#IF (EZ80UARTENABLE)
ORG_EZU .EQU $
#INCLUDE "ez80uart.asm"
SIZ_EZU .EQU $ - ORG_EZU
MEMECHO " EZ80 UART occupies "
MEMECHO SIZ_EZU
MEMECHO " bytes.\n"
#ENDIF
SIZ_EZ80DRVS .EQU $ - ORG_EZ80DRVS
MEMECHO " Total "
MEMECHO SIZ_EZ80DRVS
MEMECHO " bytes.\n"
#ENDIF
MEMECHO "RTCDEF="
MEMECHO RTCDEF
MEMECHO "\n"

6
Source/HBIOS/std.asm

@ -609,6 +609,7 @@ TM_TMS .EQU 2
TM_SIMH .EQU 3
TM_Z180 .EQU 4
TM_Z280 .EQU 5
TM_EZ80 .EQU 6
;
SYSECHO "SYSTEM TIMER:"
SYSTIM .EQU TM_NONE
@ -647,6 +648,11 @@ SYSTIM .SET TM_Z280
SYSECHO " Z280"
#ENDIF
#ENDIF
;
#IF ((CPUFAM == CPU_EZ80) & (EZ80TIMER == EZ80TMR_INT))
SYSTIM .SET TM_EZ80
SYSECHO " EZ80"
#ENDIF
;
#IF SYSTIM == TM_NONE
SYSECHO " NONE"

2
Source/HBIOS/tms.asm

@ -290,12 +290,10 @@ TMS_INIT1:
#IF ((TMSMODE == TMSMODE_NABU40) | (TMSMODE == TMSMODE_NABU80))
; ENABLE VDP INTERRUPTS ON NABU INTERRUPT CONTROLLER
LD A,14 ; PSG R14 (PORT A DATA)
EZ80_IO
OUT (NABU_RSEL),A ; SELECT IT
LD A,(NABU_CTLVAL) ; GET NABU CTL PORT SHADOW REG
SET 4,A ; ENABLE VDP INTERRUPTS
LD (NABU_CTLVAL),A ; UPDATE SHADOW REG
EZ80_IO
OUT (NABU_RDAT),A ; WRITE TO HARDWARE
#ENDIF
;

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