From 382b5594f06da75ff854f19f4cf0a328e02ebead Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Tue, 11 Feb 2020 17:01:55 -0800 Subject: [PATCH] Support multiple devices in IDE driver --- Doc/ChangeLog.txt | 4 + Source/HBIOS/Config/MK4_std.asm | 1 - Source/HBIOS/Config/RCZ180_ext.asm | 1 - Source/HBIOS/Config/RCZ180_nat.asm | 1 - Source/HBIOS/Config/RCZ80_kio.asm | 1 - Source/HBIOS/Config/RCZ80_std.asm | 1 - Source/HBIOS/Config/SBC_std.asm | 1 - Source/HBIOS/Config/SCZ180_126.asm | 1 - Source/HBIOS/Config/SCZ180_130.asm | 1 - Source/HBIOS/cfg_dyno.asm | 21 +- Source/HBIOS/cfg_ezz80.asm | 21 +- Source/HBIOS/cfg_master.asm | 21 +- Source/HBIOS/cfg_mk4.asm | 21 +- Source/HBIOS/cfg_n8.asm | 21 +- Source/HBIOS/cfg_rcz180.asm | 21 +- Source/HBIOS/cfg_rcz80.asm | 21 +- Source/HBIOS/cfg_sbc.asm | 21 +- Source/HBIOS/cfg_scz180.asm | 21 +- Source/HBIOS/ide.asm | 878 ++++++++++++++++++----------- Source/HBIOS/ppide.asm | 85 ++- Source/HBIOS/std.asm | 6 +- 21 files changed, 755 insertions(+), 415 deletions(-) diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt index 1edf01e5..2dbd6d4e 100644 --- a/Doc/ChangeLog.txt +++ b/Doc/ChangeLog.txt @@ -43,6 +43,10 @@ Version 2.9.2 - PMS: Enhanced PPIDE driver to handle multiple PPI interfaces - PMS: Added a ROM based game - WBW: Only assign drive letters to hard disk devices with media +- WBW: Enhanced IDE driver to handle multiple IDE interfaces +- D?R: Contributed SC126 How-To: Preparing a MicroSD Card to Transfer Files to/from a Linux System +- PMS: Updated romldr to handle more than 9 drives +- PMS: Added "user" rom module template Version 2.9.1 ------------- diff --git a/Source/HBIOS/Config/MK4_std.asm b/Source/HBIOS/Config/MK4_std.asm index b144c790..4909dc00 100644 --- a/Source/HBIOS/Config/MK4_std.asm +++ b/Source/HBIOS/Config/MK4_std.asm @@ -38,7 +38,6 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_DIDE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] ; IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .SET IDEMODE_MK4 ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] ; PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) ; diff --git a/Source/HBIOS/Config/RCZ180_ext.asm b/Source/HBIOS/Config/RCZ180_ext.asm index 29837d4a..7c9cca5b 100644 --- a/Source/HBIOS/Config/RCZ180_ext.asm +++ b/Source/HBIOS/Config/RCZ180_ext.asm @@ -41,6 +41,5 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] ; IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] ; PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) diff --git a/Source/HBIOS/Config/RCZ180_nat.asm b/Source/HBIOS/Config/RCZ180_nat.asm index 2ebeebf9..5c83fe9a 100644 --- a/Source/HBIOS/Config/RCZ180_nat.asm +++ b/Source/HBIOS/Config/RCZ180_nat.asm @@ -41,6 +41,5 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] ; IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] ; PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) diff --git a/Source/HBIOS/Config/RCZ80_kio.asm b/Source/HBIOS/Config/RCZ80_kio.asm index d30c7ff0..eeede184 100644 --- a/Source/HBIOS/Config/RCZ80_kio.asm +++ b/Source/HBIOS/Config/RCZ80_kio.asm @@ -47,6 +47,5 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] ; IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] ; PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) diff --git a/Source/HBIOS/Config/RCZ80_std.asm b/Source/HBIOS/Config/RCZ80_std.asm index 61ef8517..d266d9f2 100644 --- a/Source/HBIOS/Config/RCZ80_std.asm +++ b/Source/HBIOS/Config/RCZ80_std.asm @@ -34,6 +34,5 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] ; IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] ; PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) diff --git a/Source/HBIOS/Config/SBC_std.asm b/Source/HBIOS/Config/SBC_std.asm index 31e094cf..d5cb313a 100644 --- a/Source/HBIOS/Config/SBC_std.asm +++ b/Source/HBIOS/Config/SBC_std.asm @@ -34,7 +34,6 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_DIO3 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] ; IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .SET IDEMODE_DIO ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] ; PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) ; diff --git a/Source/HBIOS/Config/SCZ180_126.asm b/Source/HBIOS/Config/SCZ180_126.asm index 01f051ca..09d2100a 100644 --- a/Source/HBIOS/Config/SCZ180_126.asm +++ b/Source/HBIOS/Config/SCZ180_126.asm @@ -41,7 +41,6 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] ; IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] ; PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) ; diff --git a/Source/HBIOS/Config/SCZ180_130.asm b/Source/HBIOS/Config/SCZ180_130.asm index 60de55b9..ae332544 100644 --- a/Source/HBIOS/Config/SCZ180_130.asm +++ b/Source/HBIOS/Config/SCZ180_130.asm @@ -43,7 +43,6 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] ; IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] ; PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) ; diff --git a/Source/HBIOS/cfg_dyno.asm b/Source/HBIOS/cfg_dyno.asm index e6808004..0babcf5d 100644 --- a/Source/HBIOS/cfg_dyno.asm +++ b/Source/HBIOS/cfg_dyno.asm @@ -105,9 +105,26 @@ FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER ; IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .EQU IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -IDE8BIT .EQU TRUE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY) +IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH +IDE0MODE .EQU IDEMODE_RC ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE0BASE .EQU $10 ; IDE 0: IO BASE ADDRESS +IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O +IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O +IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER +IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER +IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS +IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O +IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O +IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER +IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER +IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS +IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O +IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O +IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER +IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER ; PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) diff --git a/Source/HBIOS/cfg_ezz80.asm b/Source/HBIOS/cfg_ezz80.asm index d38b3587..d691eb2d 100644 --- a/Source/HBIOS/cfg_ezz80.asm +++ b/Source/HBIOS/cfg_ezz80.asm @@ -120,9 +120,26 @@ FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER ; IDEENABLE .EQU TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .EQU IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -IDE8BIT .EQU TRUE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY) +IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH +IDE0MODE .EQU IDEMODE_RC ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE0BASE .EQU $10 ; IDE 0: IO BASE ADDRESS +IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O +IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O +IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER +IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER +IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS +IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O +IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O +IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER +IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER +IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS +IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O +IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O +IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER +IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER ; PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) diff --git a/Source/HBIOS/cfg_master.asm b/Source/HBIOS/cfg_master.asm index a63aa593..f02968d7 100644 --- a/Source/HBIOS/cfg_master.asm +++ b/Source/HBIOS/cfg_master.asm @@ -164,9 +164,26 @@ RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4) ; IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .EQU IDEMODE_NONE ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -IDE8BIT .EQU FALSE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY) +IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH +IDE0MODE .EQU IDEMODE_NONE ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE0BASE .EQU $20 ; IDE 0: IO BASE ADDRESS +IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O +IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O +IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER +IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER +IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS +IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O +IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O +IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER +IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER +IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS +IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O +IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O +IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER +IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER ; PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) diff --git a/Source/HBIOS/cfg_mk4.asm b/Source/HBIOS/cfg_mk4.asm index 448d6361..37025c1a 100644 --- a/Source/HBIOS/cfg_mk4.asm +++ b/Source/HBIOS/cfg_mk4.asm @@ -119,9 +119,26 @@ RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4) ; IDEENABLE .EQU TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .EQU IDEMODE_MK4 ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -IDE8BIT .EQU TRUE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY) +IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH +IDE0MODE .EQU IDEMODE_MK4 ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE0BASE .EQU $80 ; IDE 0: IO BASE ADDRESS +IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O +IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O +IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER +IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER +IDE1MODE .EQU IDEMODE_DIDE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE1BASE .EQU $20 ; IDE 1: IO BASE ADDRESS +IDE1DATLO .EQU $28 ; IDE 1: DATA LO PORT FOR 16-BIT I/O +IDE1DATHI .EQU $28 ; IDE 1: DATA HI PORT FOR 16-BIT I/O +IDE1A8BIT .EQU FALSE ; IDE 1A (MASTER): 8 BIT XFER +IDE1B8BIT .EQU FALSE ; IDE 1B (MASTER): 8 BIT XFER +IDE2MODE .EQU IDEMODE_DIDE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE2BASE .EQU $30 ; IDE 2: IO BASE ADDRESS +IDE2DATLO .EQU $38 ; IDE 2: DATA LO PORT FOR 16-BIT I/O +IDE2DATHI .EQU $38 ; IDE 2: DATA HI PORT FOR 16-BIT I/O +IDE2A8BIT .EQU FALSE ; IDE 2A (MASTER): 8 BIT XFER +IDE2B8BIT .EQU FALSE ; IDE 2B (MASTER): 8 BIT XFER ; PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) diff --git a/Source/HBIOS/cfg_n8.asm b/Source/HBIOS/cfg_n8.asm index 0a1b2aa6..3592584b 100644 --- a/Source/HBIOS/cfg_n8.asm +++ b/Source/HBIOS/cfg_n8.asm @@ -122,9 +122,26 @@ RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4) ; IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .EQU IDEMODE_DIO ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -IDE8BIT .EQU FALSE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY) +IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH +IDE0MODE .EQU IDEMODE_DIO ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE0BASE .EQU $20 ; IDE 0: IO BASE ADDRESS +IDE0DATLO .EQU $20 ; IDE 0: DATA LO PORT FOR 16-BIT I/O +IDE0DATHI .EQU $28 ; IDE 0: DATA HI PORT FOR 16-BIT I/O +IDE0A8BIT .EQU FALSE ; IDE 0A (MASTER): 8 BIT XFER +IDE0B8BIT .EQU FALSE ; IDE 0B (MASTER): 8 BIT XFER +IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS +IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O +IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O +IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER +IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER +IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS +IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O +IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O +IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER +IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER ; PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm index 9e1ba907..aeb1f0c4 100644 --- a/Source/HBIOS/cfg_rcz180.asm +++ b/Source/HBIOS/cfg_rcz180.asm @@ -125,9 +125,26 @@ FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER ; IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .EQU IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -IDE8BIT .EQU TRUE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY) +IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH +IDE0MODE .EQU IDEMODE_RC ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE0BASE .EQU $10 ; IDE 0: IO BASE ADDRESS +IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O +IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O +IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER +IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER +IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS +IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O +IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O +IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER +IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER +IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS +IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O +IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O +IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER +IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER ; PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) diff --git a/Source/HBIOS/cfg_rcz80.asm b/Source/HBIOS/cfg_rcz80.asm index 1a79f75a..3a49b4d3 100644 --- a/Source/HBIOS/cfg_rcz80.asm +++ b/Source/HBIOS/cfg_rcz80.asm @@ -129,9 +129,26 @@ FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER ; IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .EQU IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -IDE8BIT .EQU TRUE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY) +IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH +IDE0MODE .EQU IDEMODE_RC ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE0BASE .EQU $10 ; IDE 0: IO BASE ADDRESS +IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O +IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O +IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER +IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER +IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS +IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O +IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O +IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER +IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER +IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS +IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O +IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O +IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER +IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER ; PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) diff --git a/Source/HBIOS/cfg_sbc.asm b/Source/HBIOS/cfg_sbc.asm index 67c1b36a..78193630 100644 --- a/Source/HBIOS/cfg_sbc.asm +++ b/Source/HBIOS/cfg_sbc.asm @@ -122,9 +122,26 @@ RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4) ; IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .EQU IDEMODE_DIO ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -IDE8BIT .EQU FALSE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY) +IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH +IDE0MODE .EQU IDEMODE_DIO ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE0BASE .EQU $20 ; IDE 0: IO BASE ADDRESS +IDE0DATLO .EQU $20 ; IDE 0: DATA LO PORT FOR 16-BIT I/O +IDE0DATHI .EQU $28 ; IDE 0: DATA HI PORT FOR 16-BIT I/O +IDE0A8BIT .EQU FALSE ; IDE 0A (MASTER): 8 BIT XFER +IDE0B8BIT .EQU FALSE ; IDE 0B (MASTER): 8 BIT XFER +IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS +IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O +IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O +IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER +IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER +IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS +IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O +IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O +IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER +IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER ; PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) diff --git a/Source/HBIOS/cfg_scz180.asm b/Source/HBIOS/cfg_scz180.asm index 79f88b5e..532544d7 100644 --- a/Source/HBIOS/cfg_scz180.asm +++ b/Source/HBIOS/cfg_scz180.asm @@ -120,9 +120,26 @@ FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER ; IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -IDEMODE .EQU IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -IDE8BIT .EQU TRUE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY) +IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH +IDE0MODE .EQU IDEMODE_RC ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE0BASE .EQU $10 ; IDE 0: IO BASE ADDRESS +IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O +IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O +IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER +IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER +IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS +IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O +IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O +IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER +IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER +IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] +IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS +IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O +IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O +IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER +IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER ; PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) diff --git a/Source/HBIOS/ide.asm b/Source/HBIOS/ide.asm index c9149ca7..5c4240a9 100644 --- a/Source/HBIOS/ide.asm +++ b/Source/HBIOS/ide.asm @@ -4,9 +4,20 @@ ;============================================================================= ; ; TODO: -; - IMPLEMENT IDE_INITDEVICE -; - HANDLE SECONDARY INTERFACE ON DIDE -; - IMPLEMENT INTELLIGENT RESET, CHECK IF DEVICE IS ACTUALLY BROKEN BEFORE RESET +; - FIX SCALER CONSTANT +; - GOPARTNER NEEDS TO HANDLE "NO PARTNER" CONDITION +; - IMPLEMENT H/W PROBES FOR DIO AND DIDE +; +; NOTES: +; - WELL KNOWN IDE PORT ADDRESSES: +; BOARD BASE DATLO DATHI +; ------ ------ ------ ------ +; DIO $20 $20 $28 +; DIDE-A $20 $28 $28 +; DIDE-B $30 $38 $38 +; MK4 $80 N/A N/A +; RC $10 N/A N/A +; SMB $E0 N/A N/A ; ; +-----------------------------------------------------------------------+ ; | CONTROL BLOCK REGISTERS | @@ -100,77 +111,31 @@ #DEFINE DCALL \; #ENDIF ; -; UNIT MAPPING IS AS FOLLOWS: -; IDE0: PRIMARY MASTER -; IDE1: PRIMARY SLAVE -; IDE2: SECONDARY MASTER -; IDE3: SECONDARY SLAVE -; -IDE_DEVCNT .EQU 2 ; ASSUME ONLY PRIMARY INTERFACE -IDE_IO_BASE .EQU $20 ; DEFAULT IO BASE (NOTE OVERRIDES BELOW) -; -#IF (IDEMODE == IDEMODE_MK4) -IDE_IO_BASE .SET $80 -IDE_XAR .EQU $88 ; EXTERNAL ADDRESS REGISTER (XAR)#ENDIF -#ENDIF - -#IF (IDEMODE == IDEMODE_RC) -IDE_IO_BASE .SET $10 -#ENDIF - -#IF (IDEMODE == IDEMODE_SMB) -IDE_IO_BASE .SET $E0 -#ENDIF - -#IF ((IDEMODE == IDEMODE_DIO) | (IDEMODE == IDEMODE_MK4)) -#IF (IDE8BIT) -IDE_IO_DATA .EQU $IDE_IO_BASE + $00 ; DATA PORT (8 BIT PIO) (R/W) -#ELSE -IDE_IO_DATALO .EQU $IDE_IO_BASE + $00 ; DATA PORT (16 BIT PIO LO BYTE) (R/W) -IDE_IO_DATAHI .EQU $IDE_IO_BASE + $08 ; DATA PORT (16 BIT PIO HI BYTE) (R/W) -IDE_IO_DATA .EQU IDE_IO_DATALO -#ENDIF -#ENDIF -; -#IF (IDEMODE == IDEMODE_DIDE) -IDE_DEVCNT .SET 4 ; DIDE HAS PRIMARY AND SECONDARY INTERACES -#IF (IDE8BIT) -IDE_IO_DATA .EQU $IDE_IO_BASE + $00 ; DATA PORT (8 BIT PIO) (R/W) -#ELSE -IDE_IO_DATA .EQU $IDE_IO_BASE + $08 ; DATA PORT (16 BIT PIO LO/HI BYTES) (R/W) -IDE_IO_DMA .EQU $IDE_IO_BASE + $09 ; DATA PORT (16 BIT DMA LO/HI BYTES) (R/W) -#ENDIF -#ENDIF -; -#IF ((IDEMODE == IDEMODE_RC) | (IDEMODE == IDEMODE_SMB)) -IDE_DEVCNT .SET 1 ; RC2014 COMPACT FLASH SUPPORTS ONLY 1 DEVICE -IDE_IO_DATA .EQU $IDE_IO_BASE + $00 ; DATA PORT (8 BIT) (R/W) -#ENDIF -; -;IDE_IO_DATA .EQU $IDE_IO_BASE + $00 ; DATA INPUT/OUTPUT (R/W) -IDE_IO_ERR .EQU $IDE_IO_BASE + $01 ; ERROR REGISTER (R) -IDE_IO_FEAT .EQU $IDE_IO_BASE + $01 ; FEATURES REGISTER (W) -IDE_IO_COUNT .EQU $IDE_IO_BASE + $02 ; SECTOR COUNT REGISTER (R/W) -IDE_IO_SECT .EQU $IDE_IO_BASE + $03 ; SECTOR NUMBER REGISTER (R/W) -IDE_IO_CYLLO .EQU $IDE_IO_BASE + $04 ; CYLINDER NUM REGISTER (LSB) (R/W) -IDE_IO_CYLHI .EQU $IDE_IO_BASE + $05 ; CYLINDER NUM REGISTER (MSB) (R/W) -IDE_IO_DRVHD .EQU $IDE_IO_BASE + $06 ; DRIVE/HEAD REGISTER (R/W) -IDE_IO_LBA0 .EQU $IDE_IO_BASE + $03 ; LBA BYTE 0 (BITS 0-7) (R/W) -IDE_IO_LBA1 .EQU $IDE_IO_BASE + $03 ; LBA BYTE 1 (BITS 8-15) (R/W) -IDE_IO_LBA2 .EQU $IDE_IO_BASE + $03 ; LBA BYTE 2 (BITS 16-23) (R/W) -IDE_IO_LBA3 .EQU $IDE_IO_BASE + $03 ; LBA BYTE 3 (BITS 24-27) (R/W) -IDE_IO_STAT .EQU $IDE_IO_BASE + $07 ; STATUS REGISTER (R) -IDE_IO_CMD .EQU $IDE_IO_BASE + $07 ; COMMAND REGISTER (EXECUTE) (W) -IDE_IO_ALTSTAT .EQU $IDE_IO_BASE + $0E ; ALTERNATE STATUS REGISTER (R) -IDE_IO_CTRL .EQU $IDE_IO_BASE + $0E ; DEVICE CONTROL REGISTER (W) -IDE_IO_DRVADR .EQU $IDE_IO_BASE + $0F ; DRIVE ADDRESS REGISTER (R) +IDE_REG_DATA .EQU $00 ; DATA /OUTPUT (R/W) +IDE_REG_ERR .EQU $01 ; ERROR REGISTER (R) +IDE_REG_FEAT .EQU $01 ; FEATURES REGISTER (W) +IDE_REG_COUNT .EQU $02 ; SECTOR COUNT REGISTER (R/W) +IDE_REG_SECT .EQU $03 ; SECTOR NUMBER REGISTER (R/W) +IDE_REG_CYLLO .EQU $04 ; CYLINDER NUM REGISTER (LSB) (R/W) +IDE_REG_CYLHI .EQU $05 ; CYLINDER NUM REGISTER (MSB) (R/W) +IDE_REG_DRVHD .EQU $06 ; DRIVE/HEAD REGISTER (R/W) +IDE_REG_LBA0 .EQU $03 ; LBA BYTE 0 (BITS 0-7) (R/W) +IDE_REG_LBA1 .EQU $04 ; LBA BYTE 1 (BITS 8-15) (R/W) +IDE_REG_LBA2 .EQU $05 ; LBA BYTE 2 (BITS 16-23) (R/W) +IDE_REG_LBA3 .EQU $06 ; LBA BYTE 3 (BITS 24-27) (R/W) +IDE_REG_STAT .EQU $07 ; STATUS REGISTER (R) +IDE_REG_CMD .EQU $07 ; COMMAND REGISTER (EXECUTE) (W) +IDE_REG_XAR .EQU $08 ; ECB DIDE EXTERNAL ADDRESS REGISTER (W) +IDE_REG_ALTSTAT .EQU $0E ; ALTERNATE STATUS REGISTER (R) +IDE_REG_CTRL .EQU $0E ; DEVICE CONTROL REGISTER (W) +IDE_REG_DRVADR .EQU $0F ; DRIVE ADDRESS REGISTER (R) ; ; COMMAND BYTES ; -IDE_CIDE_RECAL .EQU $10 -IDE_CIDE_READ .EQU $20 -IDE_CIDE_WRITE .EQU $30 -IDE_CIDE_IDDEV .EQU $EC +IDE_CIDE_RECAL .EQU $10 +IDE_CIDE_READ .EQU $20 +IDE_CIDE_WRITE .EQU $30 +IDE_CIDE_IDDEV .EQU $EC IDE_CIDE_SETFEAT .EQU $EF ; ; FEATURE BYTES @@ -197,57 +162,130 @@ IDE_STBSYTO .EQU -7 ; ; DRIVE SELECTION BYTES (FOR USE IN DRIVE/HEAD REGISTER) ; -IDE_DRVSEL: -IDE_DRVMASTER .DB %11100000 ; LBA, MASTER DEVICE -IDE_DRVSLAVE .DB %11110000 ; LBA, SLAVE DEVICE +;IDE_DRVSEL: +IDE_DRVMASTER .EQU %11100000 ; LBA, MASTER DEVICE +IDE_DRVSLAVE .EQU %11110000 ; LBA, SLAVE DEVICE ; ; IDE DEVICE CONFIGURATION ; -IDE_CFGSIZ .EQU 12 ; SIZE OF CFG TBL ENTRIES +IDE_CFGSIZ .EQU 19 ; SIZE OF CFG TBL ENTRIES ; ; PER DEVICE DATA OFFSETS ; IDE_DEV .EQU 0 ; OFFSET OF DEVICE NUMBER (BYTE) -IDE_STAT .EQU 1 ; LAST STATUS (BYTE) -IDE_TYPE .EQU 2 ; DEVICE TYPE (BYTE) -IDE_FLAGS .EQU 3 ; FLAG BITS BIT 0=CF, 1=LBA (BYTE) -IDE_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD) -IDE_LBA .EQU 8 ; OFFSET OF LBA (DWORD) +IDE_MODE .EQU 1 ; OPERATION MODE: IDE MODE (BYTE) +IDE_STAT .EQU 2 ; LAST STATUS (BYTE) +IDE_TYPE .EQU 3 ; DEVICE TYPE (BYTE) +IDE_ACC .EQU 4 ; ACCESS FLAG BITS BIT 0=MASTER, 1=8BIT (BYTE) +IDE_MED .EQU 5 ; MEDIA FLAG BITS BIT 0=CF, 1=LBA (BYTE) +IDE_MEDCAP .EQU 6 ; MEDIA CAPACITY (DWORD) +IDE_LBA .EQU 10 ; OFFSET OF LBA (DWORD) +IDE_IOBASE .EQU 14 ; IO BASE ADDRESS (BYTE) +IDE_DATALO .EQU 15 ; 16 BIT DATA LO BYTE +IDE_DATAHI .EQU 16 ; 16 BIT DATA HI BYTE +IDE_PARTNER .EQU 17 ; PARTNER DEVICE (MASTER <-> SLAVE) (WORD) +; +IDE_ACC_MAS .EQU %00000001 ; UNIT IS MASTER (ELSE SLAVE) +IDE_ACC_8BIT .EQU %00000010 ; UNIT WANTS 8 BIT I/O (ELSE 16 BIT) +; +IDE_MED_CF .EQU %00000001 ; MEDIA IS CF CARD +IDE_MED_LBA .EQU %00000010 ; MEDIA HAS LBA CAPABILITY +; +IDE_DEVCNT .EQU IDECNT * 2 ; IDE_CFGTBL: - ; DEVICE 0, PRIMARY MASTER +; +#IF (IDECNT >= 1) +; +IDE_DEV0M: ; DEVICE 0, MASTER .DB 0 ; DRIVER DEVICE NUMBER + .DB IDE0MODE ; DRIVER DEVICE MODE .DB 0 ; DEVICE STATUS .DB 0 ; DEVICE TYPE - .DB 0 ; FLAGS BYTE + .DB IDE_ACC_MAS | (IDE0A8BIT & IDE_ACC_8BIT) ; UNIT ACCESS FLAGS + .DB 0 ; MEDIA FLAGS .DW 0,0 ; DEVICE CAPACITY .DW 0,0 ; CURRENT LBA -#IF (IDE_DEVCNT >= 2) - ; DEVICE 1, PRIMARY SLAVE - .DB 1 ; DRIVER DEVICE NUMBER + .DB IDE0BASE ; IO BASE ADDRESS + .DB IDE0DATLO ; IO BASE ADDRESS + .DB IDE0DATHI ; IO BASE ADDRESS + .DW IDE_DEV0S ; PARTNER +; +IDE_DEV0S: ; DEVICE 0, SLAVE + .DB 0 ; DRIVER DEVICE NUMBER + .DB IDE0MODE ; DRIVER DEVICE MODE .DB 0 ; DEVICE STATUS .DB 0 ; DEVICE TYPE - .DB 0 ; FLAGS BYTE + .DB (IDE0B8BIT & IDE_ACC_8BIT) ; UNIT ACCESS FLAGS + .DB 0 ; MEDIA FLAGS .DW 0,0 ; DEVICE CAPACITY .DW 0,0 ; CURRENT LBA + .DB IDE0BASE ; IO BASE ADDRESS + .DB IDE0DATLO ; IO BASE ADDRESS + .DB IDE0DATHI ; IO BASE ADDRESS + .DW IDE_DEV0M ; PARTNER #ENDIF -#IF (IDE_DEVCNT >= 3) - ; DEVICE 2, SECONDARY MASTER - .DB 2 ; DRIVER DEVICE NUMBER +; +#IF (IDECNT >= 2) +; +IDE_DEV1M: ; DEVICE 1, MASTER + .DB 0 ; DRIVER DEVICE NUMBER + .DB IDE1MODE ; DRIVER DEVICE MODE + .DB 0 ; DEVICE STATUS + .DB 0 ; DEVICE TYPE + .DB IDE_ACC_MAS | (IDE1A8BIT & IDE_ACC_8BIT) ; UNIT ACCESS FLAGS + .DB 0 ; MEDIA FLAGS + .DW 0,0 ; DEVICE CAPACITY + .DW 0,0 ; CURRENT LBA + .DB IDE1BASE ; IO BASE ADDRESS + .DB IDE1DATLO ; IO BASE ADDRESS + .DB IDE1DATHI ; IO BASE ADDRESS + .DW IDE_DEV1S ; PARTNER +; +IDE_DEV1S: ; DEVICE 1, SLAVE + .DB 0 ; DRIVER DEVICE NUMBER + .DB IDE1MODE ; DRIVER DEVICE MODE .DB 0 ; DEVICE STATUS .DB 0 ; DEVICE TYPE - .DB 0 ; FLAGS BYTE + .DB (IDE1B8BIT & IDE_ACC_8BIT) ; UNIT ACCESS FLAGS + .DB 0 ; MEDIA FLAGS .DW 0,0 ; DEVICE CAPACITY .DW 0,0 ; CURRENT LBA + .DB IDE1BASE ; IO BASE ADDRESS + .DB IDE1DATLO ; IO BASE ADDRESS + .DB IDE1DATHI ; IO BASE ADDRESS + .DW IDE_DEV1M ; PARTNER #ENDIF -#IF (IDE_DEVCNT >= 4) - ; DEVICE 2, SECONDARY SLAVE - .DB 3 ; DRIVER DEVICE NUMBER +; +#IF (IDECNT >= 3) +; +IDE_DEV2M: ; DEVICE 2, MASTER + .DB 0 ; DRIVER DEVICE NUMBER + .DB IDE2MODE ; DRIVER DEVICE MODE + .DB 0 ; DEVICE STATUS + .DB 0 ; DEVICE TYPE + .DB IDE_ACC_MAS | (IDE2A8BIT & IDE_ACC_8BIT) ; UNIT ACCESS FLAGS + .DB 0 ; MEDIA FLAGS + .DW 0,0 ; DEVICE CAPACITY + .DW 0,0 ; CURRENT LBA + .DB IDE2BASE ; IO BASE ADDRESS + .DB IDE2DATLO ; IO BASE ADDRESS + .DB IDE2DATHI ; IO BASE ADDRESS + .DW IDE_DEV2S ; PARTNER +; +IDE_DEV2S: ; DEVICE 2, SLAVE + .DB 0 ; DRIVER DEVICE NUMBER + .DB IDE2MODE ; DRIVER DEVICE MODE .DB 0 ; DEVICE STATUS .DB 0 ; DEVICE TYPE - .DB 0 ; FLAGS BYTE + .DB (IDE2B8BIT & IDE_ACC_8BIT) ; UNIT ACCESS FLAGS + .DB 0 ; MEDIA FLAGS .DW 0,0 ; DEVICE CAPACITY .DW 0,0 ; CURRENT LBA + .DB IDE2BASE ; IO BASE ADDRESS + .DB IDE2DATLO ; IO BASE ADDRESS + .DB IDE2DATHI ; IO BASE ADDRESS + .DW IDE_DEV1M ; PARTNER #ENDIF ; #IF ($ - IDE_CFGTBL) != (IDE_DEVCNT * IDE_CFGSIZ) @@ -273,78 +311,87 @@ IDE_TOFAST .EQU 10 ; FAST TIMEOUT IS 0.5 SECS ;============================================================================= ; IDE_INIT: - CALL NEWLINE ; FORMATTING - PRTS("IDE:$") -; ; COMPUTE CPU SPEED COMPENSATED TIMEOUT SCALER - ; AT 1MHZ, THE SCALER IS 961 (50000US / 52TS = 961) - ; SCALER IS THEREFORE 961 * CPU SPEED IN MHZ + ; AT 1MHZ, THE SCALER IS 218 (50000US / 229TS = 218) + ; SCALER IS THEREFORE 218 * CPU SPEED IN MHZ LD DE,961 ; LOAD SCALER FOR 1MHZ LD A,(CB_CPUMHZ) ; LOAD CPU SPEED IN MHZ CALL MULT8X16 ; HL := DE * A LD (IDE_TOSCALER),HL ; SAVE IT ; -#IF (IDEMODE == IDEMODE_DIO) - PRTS(" MODE=DIO$") -#ENDIF -#IF (IDEMODE == IDEMODE_DIDE) - PRTS(" MODE=DIDE$") -#ENDIF -#IF (IDEMODE == IDEMODE_MK4) - PRTS(" MODE=MK4$") -#ENDIF - ; PRINT IDE INTERFACE PORT ADDRESS - PRTS(" IO=0x$") ; LABEL FOR IO ADDRESS - LD A,IDE_IO_DATA ; GET IO ADDRESS - CALL PRTHEXBYTE ; PRINT IT -; -; - CALL IDE_DETECT ; CHECK FOR HARDWARE - JR Z,IDE_INIT00 ; CONTINUE IF PRESENT + XOR A ; ZERO ACCUM + LD (IDE_DEVNUM),A ; INIT DEV UNIT NUM FOR DYNAMIC ASSIGNMENT + LD IY,IDE_CFGTBL ; POINT TO START OF CONFIG TABLE ; - ; HARDWARE NOT PRESENT - PRTS(" NOT PRESENT$") - OR $FF ; SIGNAL FAILURE - RET +IDE_INIT1: + LD A,(IY) ; LOAD FIRST BYTE TO CHECK FOR END + CP $FF ; CHECK FOR END OF TABLE VALUE + JR NZ,IDE_INIT2 ; IF NOT END OF TABLE, CONTINUE + XOR A ; SIGNAL SUCCESS + RET ; AND RETURN ; -IDE_INIT00: - ; PRINT UNIT COUNT - PRTS(" DEVICES=$") ; PRINT LABEL FOR DEVICE COUNT - LD A,IDE_DEVCNT ; GET UNIT COUNT - CALL PRTDECB ; PRINT IT IN DECIMAL +IDE_INIT2: + BIT 0,(IY+IDE_ACC) ; MASTER? + JR Z,IDE_INIT4 ; IF NOT MASTER, SKIP AHEAD ; -; SETUP THE DISPATCH TABLE ENTRIES + CALL NEWLINE ; FORMATTING + PRTS("IDE:$") ; LABEL FOR IO ADDRESS ; - LD B,IDE_DEVCNT ; LOOP CONTROL - LD IY,IDE_CFGTBL ; START OF CFG TABLE -IDE_INIT0: - PUSH BC ; SAVE LOOP CONTROL + PRTS(" IO=0x$") ; LABEL FOR IO ADDRESS + LD A,(IY+IDE_IOBASE) ; GET IO BASE ADDRES + CALL PRTHEXBYTE ; DISPLAY IT +; + PRTS(" MODE=$") ; LABEL FOR MODE + LD A,(IY+IDE_MODE) ; GET MODE BITS + LD DE,IDE_STR_MODE_DIO ; MODE LABEL + CP IDEMODE_DIO ; TEST FOR MODE + JR Z,IDE_INIT2A ; IF SO, DISPLAY IT + LD DE,IDE_STR_MODE_DIDE ; MODE LABEL + CP IDEMODE_DIDE ; TEST FOR MODE + JR Z,IDE_INIT2A ; IF SO, DISPLAY IT + LD DE,IDE_STR_MODE_MK4 ; MODE LABEL + CP IDEMODE_MK4 ; TEST FOR MODE + JR Z,IDE_INIT2A ; IF SO, DISPLAY IT + LD DE,IDE_STR_MODE_RC ; MODE LABEL + CP IDEMODE_RC ; TEST FOR MODE + JR Z,IDE_INIT2A ; IF SO, DISPLAY IT + JR IDE_INIT4 ; NO MODE? BYPASS ENTRY +IDE_INIT2A: + CALL WRITESTR ; DISPLAY MODE +; + CALL IDE_DETECT ; PROBE FOR INTERFACE + JR Z,IDE_INIT3 ; GOT IT, MOVE ON TO INIT UNITS + CALL PC_SPACE ; FORMATTING + LD DE,IDE_STR_NOHW ; NOT PRESENT MESSAGE + CALL WRITESTR ; DISPLAY IT + JR IDE_INIT4 ; SKIP CFG ENTRY +; +IDE_INIT3: + CALL IDE_RESET ; RESET THE BUS + CALL IDE_INIT5 ; DETECT/INIT MASTER + PUSH IY ; SAVE CFG PTR + CALL IDE_GOPARTNER ; SWITCH IY TO PARTNER CFG + CALL IDE_INIT5 ; DETECT/INIT SLAVE + POP IY ; RESTORE CFG PTR +; +IDE_INIT4: + LD DE,IDE_CFGSIZ ; SIZE OF CFG TABLE ENTRY + ADD IY,DE ; BUMP POINTER + JP IDE_INIT1 ; AND LOOP +; +IDE_INIT5: + ; UPDATE DRIVER RELATIVE UNIT NUMBER IN CONFIG TABLE + LD A,(IDE_DEVNUM) ; GET NEXT UNIT NUM TO ASSIGN + LD (IY+IDE_DEV),A ; UPDATE IT + INC A ; BUMP TO NEXT UNIT NUM TO ASSIGN + LD (IDE_DEVNUM),A ; SAVE IT +; + ; ADD UNIT TO GLOBAL DISK UNIT TABLE LD BC,IDE_FNTBL ; BC := FUNC TABLE ADR PUSH IY ; CFG ENTRY POINTER POP DE ; COPY TO DE - CALL DIO_ADDENT ; ADD ENTRY, BC IS NOT DESTROYED - LD BC,IDE_CFGSIZ ; SIZE OF CFG ENTRY - ADD IY,BC ; BUMP IY TO NEXT ENTRY - POP BC ; RESTORE BC - DJNZ IDE_INIT0 ; LOOP AS NEEDED -; - ; INITIALIZE THE IDE INTERFACE NOW - CALL IDE_RESET ; DO HARDWARE SETUP/INIT - RET NZ ; ABORT IF RESET FAILS -; - ; DEVICE DISPLAY LOOP - LD B,IDE_DEVCNT ; LOOP ONCE PER DEVICE - LD IY,IDE_CFGTBL ; START OF CFG TABLE -IDE_INIT1: - PUSH BC ; SAVE LOOP CONTROL - CALL IDE_INIT2 ; DISPLAY UNIT INFO - LD BC,IDE_CFGSIZ ; SIZE OF CFG ENTRY - ADD IY,BC ; BUMP IY TO NEXT ENTRY - POP BC ; RESTORE LOOP CONTROL - DJNZ IDE_INIT1 ; LOOP UNTIL DONE - RET ; DONE + CALL DIO_ADDENT ; ADD ENTRY TO GLOBAL DISK DEV TABLE ; -IDE_INIT2: ; CHECK FOR BAD STATUS LD A,(IY+IDE_STAT) ; GET STATUS OR A ; SET FLAGS @@ -352,13 +399,13 @@ IDE_INIT2: ; CALL IDE_PRTPREFIX ; PRINT DEVICE PREFIX ; -#IF (IDE8BIT) - PRTS(" 8BIT$") -#ENDIF + LD DE,IDE_STR_8BIT + BIT 1,(IY+IDE_ACC) ; 8 BIT ACCESS? + CALL NZ,WRITESTR ; ; PRINT LBA/NOLBA CALL PC_SPACE ; FORMATTING - BIT 1,(IY+IDE_FLAGS) ; TEST LBA FLAG + BIT 1,(IY+IDE_MED) ; TEST LBA FLAG LD DE,IDE_STR_NO ; POINT TO "NO" STRING CALL Z,WRITESTR ; PRINT "NO" BEFORE "LBA" IF LBA NOT SUPPORTED PRTS("LBA$") ; PRINT "LBA" REGARDLESS @@ -377,8 +424,7 @@ IDE_INIT2: CALL PRTDEC ; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED) PRTS("MB$") ; PRINT SUFFIX ; - XOR A ; SIGNAL SUCCESS - RET ; RETURN WITH A=0, AND Z SET + RET ; ;---------------------------------------------------------------------- ; PROBE FOR IDE HARDWARE @@ -388,8 +434,11 @@ IDE_INIT2: ; IDE_DETECT: ; -#IF (IDEMODE == IDEMODE_DIDE) -#ENDIF +;#IF (IDEMODE == IDEMODE_DIDE) +;#ENDIF +;; +;#IF (IDEMODE == IDEMODE_DIO) +;#ENDIF ; XOR A ; SIGNAL SUCCESS RET ; AND RETURN @@ -451,7 +500,7 @@ IDE_IO: #ENDIF PUSH BC ; SAVE COUNTERS CALL IDE_SELUNIT ; HARDWARE SELECTION OF TARGET UNIT - CALL IDE_CHKDEVICE ; CHECK DEVICE AND CLEAR STATUS + CALL IDE_CHKERR ; CHECK FOR ERR STATUS AND RESET IF SO POP BC ; RESTORE COUNTERS JR NZ,IDE_IO3 ; BAIL OUT ON ERROR IDE_IO1: @@ -492,7 +541,7 @@ IDE_STATUS: IDE_DEVICE: LD D,DIODEV_IDE ; D := DEVICE TYPE LD E,(IY+IDE_DEV) ; E := PHYSICAL DEVICE NUMBER - BIT 0,(IY+IDE_FLAGS) ; TEST CF BIT IN FLAGS + BIT 0,(IY+IDE_MED) ; TEST CF BIT IN FLAGS LD C,%00000000 ; ASSUME NON-REMOVABLE HARD DISK JR Z,IDE_DEVICE1 ; IF Z, WE ARE DONE LD C,%01001000 ; OTHERWISE REMOVABLE COMPACT FLASH @@ -582,11 +631,15 @@ IDE_SETFEAT: PRTS(" SETFEAT$") #ENDIF LD A,(IDE_DRVHD) - OUT (IDE_IO_DRVHD),A + ;OUT (IDE_IO_DRVHD),A + CALL IDE_OUT + .DB IDE_REG_DRVHD DCALL PC_SPACE DCALL PRTHEXBYTE POP AF - OUT (IDE_IO_FEAT),A ; SET THE FEATURE VALUE + ;OUT (IDE_IO_FEAT),A ; SET THE FEATURE VALUE + CALL IDE_OUT + .DB IDE_REG_FEAT DCALL PC_SPACE DCALL PRTHEXBYTE LD A,IDE_CIDE_SETFEAT ; CMD = SETFEAT @@ -601,7 +654,9 @@ IDE_IDENTIFY: PRTS(" IDDEV$") #ENDIF LD A,(IDE_DRVHD) - OUT (IDE_IO_DRVHD),A + ;OUT (IDE_IO_DRVHD),A + CALL IDE_OUT + .DB IDE_REG_DRVHD DCALL PC_SPACE DCALL PRTHEXBYTE LD A,IDE_CIDE_IDDEV @@ -620,7 +675,9 @@ IDE_RDSEC: PRTS(" READ$") #ENDIF LD A,(IDE_DRVHD) - OUT (IDE_IO_DRVHD),A + ;OUT (IDE_IO_DRVHD),A + CALL IDE_OUT + .DB IDE_REG_DRVHD DCALL PC_SPACE DCALL PRTHEXBYTE CALL IDE_SETADDR ; SETUP CYL, TRK, HEAD @@ -640,7 +697,9 @@ IDE_WRSEC: PRTS(" WRITE$") #ENDIF LD A,(IDE_DRVHD) - OUT (IDE_IO_DRVHD),A + ;OUT (IDE_IO_DRVHD),A + CALL IDE_OUT + .DB IDE_REG_DRVHD DCALL PC_SPACE DCALL PRTHEXBYTE CALL IDE_SETADDR ; SETUP CYL, TRK, HEAD @@ -657,33 +716,29 @@ IDE_SETADDR: ; SEND 3 LOWEST BYTES OF LBA IN REVERSE ORDER ; IDE_IO_LBA3 HAS ALREADY BEEN SET ; HSTLBA2-0 --> IDE_IO_LBA2-0 - LD C,IDE_IO_LBA0 + 3 ; STARTING IO PORT (NOT PRE-DEC BELOW) - LD A,IDE_LBA + 2 ; OFFSET OF 3RD BYTE OF LBA IN CFG - CALL LDHLIYA ; HL := IY + A, REG A TRASHED - LD B,3 ; SEND 3 BYTES -IDE_SETADDR1: -; -#IF (IDETRACE >= 3) - LD A,(HL) - CALL PC_SPACE - CALL PRTHEXBYTE -#ENDIF -; - DEC C ; NEXT PORT - OUTD ; SEND NEXT BYTE - JR NZ,IDE_SETADDR1 ; LOOP TILL DONE + LD A,(IY+IDE_LBA+2) + DCALL PC_SPACE + DCALL PRTHEXBYTE + CALL IDE_OUT + .DB IDE_REG_LBA2 ; - ; SEND COUNT OF BLOCKS TO TRANSFER - ; 1 --> IDE_IO_COUNT - LD A,1 ; COUNT VALUE IS 1 BLOCK + LD A,(IY+IDE_LBA+1) + DCALL PC_SPACE + DCALL PRTHEXBYTE + CALL IDE_OUT + .DB IDE_REG_LBA1 ; -#IF (IDETRACE >= 3) + LD A,(IY+IDE_LBA+0) DCALL PC_SPACE DCALL PRTHEXBYTE -#ENDIF + CALL IDE_OUT + .DB IDE_REG_LBA0 ; - DEC C ; PORT := IDE_IO_COUNT - OUT (C),A ; SEND IT + LD A,1 + DCALL PC_SPACE + DCALL PRTHEXBYTE + CALL IDE_OUT + .DB IDE_REG_COUNT ; #IF (DSKYENABLE) CALL IDE_DSKY @@ -702,7 +757,9 @@ IDE_RUNCMD: LD A,(IDE_CMD) ; GET THE COMMAND DCALL PC_SPACE DCALL PRTHEXBYTE - OUT (IDE_IO_CMD),A ; SEND IT (STARTS EXECUTION) + ;OUT (IDE_IO_CMD),A ; SEND IT (STARTS EXECUTION) + CALL IDE_OUT + .DB IDE_REG_CMD #IF (IDETRACE >= 3) PRTS(" -->$") #ENDIF @@ -720,79 +777,116 @@ IDE_GETBUF: #IF (IDETRACE >= 3) PRTS(" GETBUF$") #ENDIF - +; CALL IDE_WAITDRQ ; WAIT FOR BUFFER READY RET NZ ; BAIL OUT IF TIMEOUT - +; LD B,0 - -#IF (IDE8BIT | (IDEMODE == IDEMODE_DIDE)) - LD C,IDE_IO_DATA - INIR - INIR -;X1: -; NOP -; INI -; JR NZ,X1 -;X2: -; NOP -; INI -; JR NZ,X2 -#ELSE - LD C,IDE_IO_DATAHI +; + BIT 1,(IY+IDE_ACC) ; 8 BIT? + JR Z,IDE_GETBUF1 ; IF NOT, DO 16 BIT + CALL IDE_GETBUF8 ; DO 8 BIT + JR IDE_GETBUF2 +; IDE_GETBUF1: - IN A,(IDE_IO_DATALO) ; READ THE LO BYTE - LD (HL),A ; SAVE IN BUFFER - INC HL ; INC BUFFER POINTER - INI ; READ AND SAVE HI BYTE, INC HL, DEC B - JP NZ,IDE_GETBUF1 ; LOOP AS NEEDED -#ENDIF + CALL IDE_GETBUF16 +; +IDE_GETBUF2: CALL IDE_WAITRDY ; PROBLEMS IF THIS IS REMOVED! CALL IDE_GETRES JP NZ,IDE_IOERR RET ; +IDE_GETBUF8: + ; 8 BIT I/O + ;LD C,IDE_IO_DATA + LD C,(IY+IDE_IOBASE) + INIR + INIR + RET +; +IDE_GETBUF16: + ; 16 BIT I/O + ;LD C,IDE_IO_DATAHI + LD D,(IY+IDE_DATALO) + LD E,(IY+IDE_DATAHI) + CALL IDE_GETBUF16A ; GET FIRST 256 BYTES + CALL IDE_GETBUF16A ; GET SECOND 256 BYTES + RET +; +IDE_GETBUF16A: + LD C,D ; PORT FOR LSB + INI ; GET IT, SAVE IT, AND DEC B + LD C,E ; PORT FOR MSB + INI ; GET IT, SAVE IT, AND DEC B + JR NZ,IDE_GETBUF16A ; LOOP TILL COUNTER EXHAUSTED + RET +; ; ; IDE_PUTBUF: #IF (IDETRACE >= 3) - PRTS(" GETBUF$") + PRTS(" PUTBUF$") #ENDIF - +; CALL IDE_WAITDRQ ; WAIT FOR BUFFER READY RET NZ ; BAIL OUT IF TIMEOUT ; - ;LD HL,(IDE_DSKBUF) LD B,0 - -#IF (IDE8BIT | (IDEMODE == IDEMODE_DIDE)) - LD C,IDE_IO_DATA - OTIR - OTIR -#ELSE - LD C,IDE_IO_DATAHI +; + BIT 1,(IY+IDE_ACC) ; 8 BIT? + JR Z,IDE_PUTBUF1 ; IF NOT, DO 16 BIT + CALL IDE_PUTBUF8 ; DO 8 BIT + JR IDE_PUTBUF2 +; IDE_PUTBUF1: - LD A,(HL) ; GET THE LO BYTE AND KEEP IT IN A FOR LATER - INC HL ; BUMP TO NEXT BYTE IN BUFFER - OUTI ; WRITE HI BYTE, INC HL, DEC B - OUT (IDE_IO_DATALO),A ; NOW WRITE THE SAVED LO BYTE TO LO BYTE - JP NZ,IDE_PUTBUF1 ; LOOP AS NEEDED -#ENDIF + CALL IDE_PUTBUF16 +; +IDE_PUTBUF2: CALL IDE_WAITRDY ; PROBLEMS IF THIS IS REMOVED! CALL IDE_GETRES JP NZ,IDE_IOERR RET ; +IDE_PUTBUF8: + ; 8 BIT I/O + ;LD C,IDE_IO_DATA + LD C,(IY+IDE_IOBASE) + OTIR + OTIR + RET +; +IDE_PUTBUF16: + ; 16 BIT I/O + ;LD C,IDE_IO_DATAHI + LD D,(IY+IDE_DATALO) + LD E,(IY+IDE_DATAHI) + CALL IDE_PUTBUF16A ; PUT FIRST 256 BYTES + CALL IDE_PUTBUF16A ; PUT SECOND 256 BYTES + RET +; +IDE_PUTBUF16A: + LD C,D ; PORT FOR LSB + OUTI ; PUT IT AND DEC B + LD C,E ; PORT FOR MSB + OUTI ; PUT IT AND DEC B + JR NZ,IDE_PUTBUF16A ; LOOP TILL COUNTER EXHAUSTED + RET +; ; ; IDE_GETRES: - IN A,(IDE_IO_STAT) ; GET STATUS + ;IN A,(IDE_IO_STAT) ; GET STATUS + CALL IDE_IN + .DB IDE_REG_STAT DCALL PC_SPACE DCALL PRTHEXBYTE AND %00000001 ; ERROR BIT SET? RET Z ; NOPE, RETURN WITH ZF ; - IN A,(IDE_IO_ERR) ; READ ERROR REGISTER + ;IN A,(IDE_IO_ERR) ; READ ERROR REGISTER + CALL IDE_IN + .DB IDE_REG_ERR DCALL PC_SPACE DCALL PRTHEXBYTE OR $FF ; FORCE NZ TO SIGNAL ERROR @@ -805,44 +899,102 @@ IDE_GETRES: ; RESET ALL DEVICES ON BUS ; IDE_RESET: +#IF (IDETRACE >= 3) + CALL IDE_PRTPREFIX + PRTS(" RESET$") +#ENDIF +; +;#IF (IDEMODE == IDEMODE_MK4) +; + LD A,(IY+IDE_MODE) ; GET MODE + CP IDEMODE_MK4 ; MK4? + JR NZ,IDE_RESET1 ; IF NOT, BYPASS ; -#IF (IDEMODE == IDEMODE_MK4) ; USE HARDWARE RESET LINE + PRTS(" HARD$") LD A,$80 ; HIGH BIT OF XAR IS IDE RESET - OUT (IDE_XAR),A + ;OUT (IDE_IO_XAR),A + CALL IDE_OUT + .DB IDE_REG_XAR LD DE,2 ; DELAY 32US (SPEC IS >= 25US) CALL VDELAY XOR A ; CLEAR RESET BIT - OUT (IDE_XAR),A -#ENDIF - -#IF ((IDEMODE == IDEMODE_RC) | (IDEMODE == IDEMODE_SMB)) + ;OUT (IDE_IO_XAR),A + CALL IDE_OUT + .DB IDE_REG_XAR +; +IDE_RESET1: +; +;#ENDIF +; +;#IF (IDEMODE == IDEMODE_RC) +; + LD A,(IY+IDE_MODE) ; GET MODE + CP IDEMODE_RC ; RC2014? + JR NZ,IDE_RESET2 ; IF NOT, BYPASS +; ; RC2014 CANNOT ADDRESS THE DEVICE CONTROL PORT AND ; HAS NO WAY TO PERFORM A HARD RESET FROM SOFTWARE, ; SO FAKE IT BY SETTING THE REGISTERS TO THE SAME ; VALUES THAT A RESET WOULD CAUSE. + PRTS(" FAKE$") XOR A - OUT (IDE_IO_CYLLO),A - OUT (IDE_IO_CYLHI),A + ;OUT (IDE_IO_CYLLO),A + CALL IDE_OUT + .DB IDE_REG_CYLLO + ;OUT (IDE_IO_CYLHI),A + CALL IDE_OUT + .DB IDE_REG_CYLHI INC A - OUT (IDE_IO_COUNT),A - OUT (IDE_IO_SECT),A -#ENDIF - -#IF ((IDEMODE != IDEMODE_MK4) & (IDEMODE != IDEMODE_RC) & (IDEMODE != IDEMODE_SMB)) + ;OUT (IDE_IO_COUNT),A + CALL IDE_OUT + .DB IDE_REG_COUNT + ;OUT (IDE_IO_SECT),A + CALL IDE_OUT + .DB IDE_REG_SECT +; +IDE_RESET2: +; +;#ENDIF +; +;#IF ((IDEMODE != IDEMODE_MK4) & (IDEMODE != IDEMODE_RC)) +; + LD A,(IY+IDE_MODE) ; GET MODE + CP IDEMODE_MK4 ; MK4? + JR Z,IDE_RESET3 ; IF SO, BYPASS + CP IDEMODE_RC ; RC2014? + JR Z,IDE_RESET3 ; IF SO, BYPASS +; ; INITIATE SOFT RESET + PRTS(" SOFT$") LD A,%00001110 ; NO INTERRUPTS, ASSERT RESET BOTH DRIVES - OUT (IDE_IO_CTRL),A -#ENDIF + ;OUT (IDE_IO_CTRL),A + CALL IDE_OUT + .DB IDE_REG_CTRL +; +IDE_RESET3: +; +;#ENDIF ; LD DE,2 ; DELAY 32US (SPEC IS >= 25US) CALL VDELAY ; -#IF ((IDEMODE != IDEMODE_RC) & (IDEMODE != IDEMODE_SMB)) +;#IF (IDEMODE != IDEMODE_RC) +; + LD A,(IY+IDE_MODE) ; GET MODE + CP IDEMODE_RC ; RC2014? + JR Z,IDE_RESET4 ; IF SO, BYPASS +; ; CONFIGURE OPERATION AND END SOFT RESET + PRTS(" CONFIG$") LD A,%00001010 ; NO INTERRUPTS, DEASSERT RESET - OUT (IDE_IO_CTRL),A ; PUSH TO REGISTER -#ENDIF + ;OUT (IDE_IO_CTRL),A ; PUSH TO REGISTER + CALL IDE_OUT + .DB IDE_REG_CTRL +; +IDE_RESET4: +; +;#ENDIF ; ; SPEC ALLOWS UP TO 450MS FOR DEVICES TO ASSERT THEIR PRESENCE ; VIA -DASP. I ENCOUNTER PROBLEMS LATER ON IF I DON'T WAIT HERE @@ -854,28 +1006,16 @@ IDE_RESET: LD DE,150000/16 ; ~???MS CALL VDELAY ; - ;; CLEAR OUT ALL DATA (FOR ALL UNITS) - ;LD HL,IDE_UDATA - ;LD BC,IDE_UDLEN - ;XOR A - ;CALL FILL -; - ;LD A,(IDE_UNIT) ; GET THE CURRENT UNIT SELECTION - ;PUSH AF ; AND SAVE IT - PUSH IY ; SAVE CURRENT DEVICE CFG PTR - - ; PROBE / INITIALIZE ALL UNITS - LD B,IDE_DEVCNT ; NUMBER OF UNITS TO TRY - LD IY,IDE_CFGTBL ; START OF CFG TABLE -IDE_RESET1: - PUSH BC ; SAVE LOOP CONTROL - CALL IDE_INITUNIT ; PROBE/INIT UNIT - LD BC,IDE_CFGSIZ ; SIZE OF CFG ENTRY - ADD IY,BC ; BUMP IY TO NEXT ENTRY - POP BC ; RESTORE BC - DJNZ IDE_RESET1 ; LOOP AS NEEDED -; - POP IY ; RECOVER DEVICE CFG PTR + ; INITIALIZE THE INDIVIDUAL UNITS (MASTER AND SLAVE). + ; BASED ON TESTING, IT APPEARS THAT THE MASTER UNIT MUST + ; BE DONE FIRST OR THIS BEHAVES BADLY. + PUSH IY ; SAVE CFG PTR + BIT 0,(IY+IDE_ACC) ; MASTER? + CALL Z,IDE_GOPARTNER ; IF NOT, SWITCH TO MASTER + CALL IDE_INITUNIT ; INIT CURRENT UNIT + CALL IDE_GOPARTNER ; POINT TO SLAVE + CALL IDE_INITUNIT ; INIT PARTNER UNIT + POP IY ; RECOVER ORIG CFG PTR ; XOR A ; SIGNAL SUCCESS RET ; AND DONE @@ -886,19 +1026,14 @@ IDE_INITUNIT: CALL IDE_SELUNIT ; SELECT UNIT RET NZ ; ABORT IF ERROR - ;LD HL,IDE_TIMEOUT ; POINT TO TIMEOUT - ;LD (HL),IDE_TOFAST ; USE FAST TIMEOUT DURING INIT - LD HL,IDE_TIMEOUT ; POINT TO TIMEOUT LD (HL),IDE_TONORM ; SET NORMAL TIMEOUT CALL IDE_PROBE ; DO PROBE - CALL Z,IDE_INITDEV ; IF FOUND, ATTEMPT TO INIT DEVICE - - ;LD HL,IDE_TIMEOUT ; POINT TO TIMEOUT - ;LD (HL),IDE_TONORM ; BACK TO NORMAL TIMEOUT + RET NZ ; JUST RETURN IF NOTHING THERE - RET + CALL IDE_INITDEV ; IF FOUND, ATTEMPT TO INIT DEVICE + RET ; DONE ; ; TAKE ANY ACTIONS REQUIRED TO SELECT DESIRED PHYSICAL UNIT ; UNIT IS SPECIFIED IN IDE_UNIT @@ -910,22 +1045,16 @@ IDE_SELUNIT: PRTS(" SELUNIT$") #ENDIF ; -#IF (IDEMODE == IDEMODE_DIDE) - ; SELECT PRIMARY/SECONDARY INTERFACE FOR DIDE HARDWARE -#ENDIF - PUSH HL ; SAVE HL, IT IS DESTROYED BELOW - PUSH IY - POP BC - LD A,(IY+IDE_DEV) ; GET DEVICE - AND $01 ; LS BIT DETERMINES MASTER/SLAVE - LD HL,IDE_DRVSEL - CALL ADDHLA - LD A,(HL) ; LOAD DRIVE/HEAD VALUE - POP HL ; RECOVER HL + BIT 0,(IY+IDE_ACC) ; MASTER? + JR Z,IDE_SELUNIT1 ; HANDLE SLAVE + LD A,IDE_DRVMASTER ; MASTER + JR IDE_SELUNIT2 +IDE_SELUNIT1: + LD A,IDE_DRVSLAVE ; SLAVE +IDE_SELUNIT2: LD (IDE_DRVHD),A ; SAVE IT -; - XOR A ; SIGNAL SUCCESS - RET ; AND DONE + XOR A ; SUCCESS + RET ; ; ; @@ -936,14 +1065,18 @@ IDE_PROBE: #ENDIF ; LD A,(IDE_DRVHD) - OUT (IDE_IO_DRVHD),A + ;OUT (IDE_IO_DRVHD),A + CALL IDE_OUT + .DB IDE_REG_DRVHD DCALL PC_SPACE DCALL PRTHEXBYTE CALL DELAY ; DELAY ~16US ; - LD C,IDE_IO_STAT - IN A,(C) + ;LD C,IDE_IO_STAT + ;IN A,(C) + CALL IDE_IN + .DB IDE_REG_STAT DCALL PC_SPACE DCALL PRTHEXBYTE CP $FF @@ -962,7 +1095,9 @@ IDE_PROBE0: DCALL IDE_REGDUMP ; ; CHECK STATUS - IN A,(IDE_IO_STAT) ; GET STATUS + ;IN A,(IDE_IO_STAT) ; GET STATUS + CALL IDE_IN + .DB IDE_REG_STAT DCALL PC_SPACE DCALL PRTHEXBYTE ; IF DEBUG, PRINT STATUS OR A ; SET FLAGS TO TEST FOR ZERO @@ -970,22 +1105,30 @@ IDE_PROBE0: ; ; CHECK SIGNATURE DCALL PC_SPACE - IN A,(IDE_IO_COUNT) + ;IN A,(IDE_IO_COUNT) + CALL IDE_IN + .DB IDE_REG_COUNT DCALL PRTHEXBYTE CP $01 JP NZ,IDE_NOMEDIA DCALL PC_SPACE - IN A,(IDE_IO_SECT) + ;IN A,(IDE_IO_SECT) + CALL IDE_IN + .DB IDE_REG_SECT DCALL PRTHEXBYTE CP $01 JP NZ,IDE_NOMEDIA DCALL PC_SPACE - IN A,(IDE_IO_CYLLO) + ;IN A,(IDE_IO_CYLLO) + CALL IDE_IN + .DB IDE_REG_CYLLO DCALL PRTHEXBYTE CP $00 JP NZ,IDE_NOMEDIA DCALL PC_SPACE - IN A,(IDE_IO_CYLHI) + ;IN A,(IDE_IO_CYLHI) + CALL IDE_IN + .DB IDE_REG_CYLHI DCALL PRTHEXBYTE CP $00 JP NZ,IDE_NOMEDIA @@ -1005,33 +1148,21 @@ IDE_INITDEV: OR A ; SET FLAGS JP Z,IDE_NOMEDIA ; EXIT SETTING NO MEDIA STATUS ; - ; CLEAR OUT UNIT SPECIFIC DATA, BUT PRESERVE THE EXISTING - ; VALUE OF THE UNIT TYPE WHICH WAS ESTABLISHED BY THE DEVICE - ; PROBES WHEN THE IDE BUS WAS RESET - ;PUSH AF ; SAVE UNIT TYPE VALUE FROM ABOVE - ;PUSH HL ; SAVE UNIT TYPE FIELD POINTER - ;IDE_DPTR(0) ; SET HL TO START OF UNIT DATA - ;LD BC,IDE_UDLEN - ;XOR A - ;CALL FILL - ;POP HL ; RECOVER UNIT TYPE FIELD POINTER - ;POP AF ; RECOVER UNIT TYPE VALUE - ;LD (HL),A ; AND PUT IT BACK -; -#IF (IDE8BIT) + BIT 1,(IY+IDE_ACC) ; 8 BIT ACCESS? + JR Z,IDE_INITDEV0 ; NO, DO 16 BIT INIT LD A,IDE_FEAT_ENABLE8BIT ; FEATURE VALUE = ENABLE 8-BIT PIO -#ELSE - LD A,IDE_FEAT_DISABLE8BIT ; FEATURE VALUE = DISABLE 8-BIT PIO -#ENDIF - CALL IDE_SETFEAT ; SET FEATURE - -#IF (IDE8BIT) + RET NZ ; BAIL OUT ON ERROR + JR IDE_INITDEV00 ; CONTINUE +; +IDE_INITDEV0: ; "REAL" IDE DRIVES MAY NOT ACCEPT THE DISABLE8BIT FEATURE COMMAND, ; SO IT IS ONLY AN ERROR IF WE ARE ATTEMPTING TO ENABLE8BIT. - ; CREDIT TO ED BRINDLEY FOR THIS CORRECTION. - RET NZ ; BAIL OUT ON ERROR -#ENDIF + ; CREDIT TO ED BRINDLEY FOR THIS CORRECTION. SO ERROR RETURN IGNORED HERE. + LD A,IDE_FEAT_DISABLE8BIT ; FEATURE VALUE = ENABLE 8-BIT PIO + CALL IDE_SETFEAT ; SET FEATURE, IGNORE ERRORS +; +IDE_INITDEV00: ; CALL IDE_IDENTIFY ; EXECUTE IDENTIFY COMMAND RET NZ ; BAIL OUT ON ERROR @@ -1040,7 +1171,7 @@ IDE_INITDEV: DCALL DUMP_BUFFER ; DUMP IT IF DEBUGGING ; XOR A - LD (IY+IDE_FLAGS),0 ; CLEAR FLAGS + LD (IY+IDE_MED),0 ; CLEAR FLAGS ; DETERMINE IF CF DEVICE LD HL,HB_WRKBUF ; FIRST WORD OF IDENTIFY DATA HAS CF FLAG @@ -1051,14 +1182,14 @@ IDE_INITDEV: LD A,$84 ; SECOND BYTE OF MARKER IS $84 CP (HL) ; COMPARE JR NZ,IDE_INITDEV1 ; IF NOT MATCH, NOT CF - SET 0,(IY+IDE_FLAGS) ; SET FLAGS BIT FOR CF MEDIA + SET 0,(IY+IDE_MED) ; SET FLAGS BIT FOR CF MEDIA ; IDE_INITDEV1: ; DETERMINE IF LBA CAPABLE LD A,(HB_WRKBUF+98+1) ; GET BYTE WITH LBA BIT FROM BUFFER BIT 1,A ; CHECK THE LBA BIT JR Z,IDE_INITDEV2 ; NOT SET, BYPASS - SET 1,(IY+IDE_FLAGS) ; SET FLAGS BIT FOR LBA + SET 1,(IY+IDE_MED) ; SET FLAGS BIT FOR LBA ; IDE_INITDEV2: ; GET DEVICE CAPACITY AND SAVE IT @@ -1078,15 +1209,24 @@ IDE_INITDEV2: ; RET ; RETURN, A=0, Z SET ; +; SWITCH IY POINTER FROM CURRENT UNIT CFG TO PARTNER UNIT CFG ; +IDE_GOPARTNER: + PUSH HL ; SAVE HL + LD L,(IY+IDE_PARTNER) ; GET PARTNER ENTRY + LD H,(IY+IDE_PARTNER+1) ; ... + PUSH HL ; MOVE HL + POP IY ; ... TO IY + POP HL ; RESTORE INCOMING HL + RET ; AND DONE +; +; CHECK CURRENT DEVICE FOR ERROR STATUS AND ATTEMPT TO RECOVER +; VIA RESET IF DEVICE IS IN ERROR. ; -IDE_CHKDEVICE: +IDE_CHKERR: LD A,(IY+IDE_STAT) ; GET STATUS OR A ; SET FLAGS - RET Z ; RETURN IF ALL IS WELL -; - ; ATTEMPT TO REINITIALIZE HERE??? - JP IDE_ERR + CALL NZ,IDE_RESET ; IF ERROR STATUS, RESET BUS RET ; ; @@ -1097,7 +1237,9 @@ IDE_WAITRDY: IDE_WAITRDY1: LD DE,(IDE_TOSCALER) ; CPU SPPED SCALER TO INNER LOOP VAR IDE_WAITRDY2: - IN A,(IDE_IO_STAT) ; READ STATUS + ;IN A,(IDE_IO_STAT) ; READ STATUS + CALL IDE_IN + .DB IDE_REG_STAT LD C,A ; SAVE IT AND %11000000 ; ISOLATE BUSY AND RDY BITS XOR %01000000 ; WE WANT BUSY(7) TO BE 0 AND RDY(6) TO BE 1 @@ -1117,7 +1259,9 @@ IDE_WAITDRQ: IDE_WAITDRQ1: LD DE,(IDE_TOSCALER) ; CPU SPPED SCALER TO INNER LOOP VAR IDE_WAITDRQ2: - IN A,(IDE_IO_STAT) ; WAIT FOR DRIVE'S 512 BYTE READ BUFFER + ;IN A,(IDE_IO_STAT) ; WAIT FOR DRIVE'S 512 BYTE READ BUFFER + CALL IDE_IN + .DB IDE_REG_STAT LD C,A ; SAVE IT AND %10001000 ; TO FILL (OR READY TO FILL) XOR %00001000 @@ -1137,7 +1281,9 @@ IDE_WAITBSY: IDE_WAITBSY1: LD DE,(IDE_TOSCALER) ; CPU SPPED SCALER TO INNER LOOP VAR IDE_WAITBSY2: - IN A,(IDE_IO_STAT) ; WAIT FOR DRIVE'S 512 BYTE READ BUFFER ; 11TS + ;IN A,(IDE_IO_STAT) ; WAIT FOR DRIVE'S 512 BYTE READ BUFFER ; 11TS + CALL IDE_IN ; 17TS + ???TS + .DB IDE_REG_STAT ; 0TS LD C,A ; SAVE IT ; 4TS AND %10000000 ; TO FILL (OR READY TO FILL) ; 7TS RET Z ; 5TS @@ -1146,7 +1292,39 @@ IDE_WAITBSY2: OR E ; 4TS JR NZ,IDE_WAITBSY2 ; 12TS DJNZ IDE_WAITBSY1 ; ----- - JP IDE_BSYTO ; EXIT WITH BSYTO ERR ; 52TS + JP IDE_BSYTO ; EXIT WITH BSYTO ERR ; ??TS +; +; READ A VALUE FROM THE DEVICE POINTED TO BY IY AND RETURN IT IN A +; +IDE_IN: + EX (SP),HL ; GET PARM POINTER + PUSH BC + LD A,(HL) + INC HL + LD C,(IY+IDE_IOBASE) + ADD A,C + LD C,A + IN A,(C) + POP BC + EX (SP),HL ; RESTORE STACK + RET +; +; OUTPUT VALUE IN A TO THE DEVICE POINTED TO BY IY +; +IDE_OUT: + EX (SP),HL ; GET PARM POINTER + PUSH BC + PUSH AF + LD A,(HL) + INC HL + LD C,(IY+IDE_IOBASE) + ADD A,C + LD C,A + POP AF + OUT (C),A + POP BC + EX (SP),HL ; RESTORE STACK + RET ; ;============================================================================= ; ERROR HANDLING AND DIAGNOSTICS @@ -1252,7 +1430,10 @@ IDE_REGDUMP: PUSH BC CALL PC_SPACE CALL PC_LBKT - LD C,IDE_IO_CMD + ;LD C,IDE_IO_CMD + LD A,(IY+IDE_IOBASE) + ADD A,IDE_REG_CMD + LD C,A LD B,7 IDE_REGDUMP1: IN A,(C) @@ -1284,16 +1465,20 @@ IDE_PRTPREFIX: #IF (DSKYENABLE) IDE_DSKY: LD HL,DSKY_HEXBUF ; POINT TO DSKY BUFFER - IN A,(IDE_IO_DRVHD) ; GET DRIVE/HEAD + CALL IDE_IN + .DB IDE_REG_DRVHD LD (HL),A ; SAVE IN BUFFER INC HL ; INCREMENT BUFFER POINTER - IN A,(IDE_IO_CYLHI) ; GET DRIVE/HEAD + CALL IDE_IN + .DB IDE_REG_CYLHI LD (HL),A ; SAVE IN BUFFER INC HL ; INCREMENT BUFFER POINTER - IN A,(IDE_IO_CYLLO) ; GET DRIVE/HEAD + CALL IDE_IN + .DB IDE_REG_CYLLO LD (HL),A ; SAVE IN BUFFER INC HL ; INCREMENT BUFFER POINTER - IN A,(IDE_IO_SECT) ; GET DRIVE/HEAD + CALL IDE_IN + .DB IDE_REG_SECT LD (HL),A ; SAVE IN BUFFER CALL DSKY_HEXOUT ; SEND IT TO DSKY RET @@ -1314,6 +1499,13 @@ IDE_STR_STBSYTO .TEXT "BUSY TIMEOUT$" IDE_STR_STUNK .TEXT "UNKNOWN ERROR$" ; IDE_STR_NO .TEXT "NO$" +IDE_STR_NOHW .TEXT "NOT PRESENT$" +IDE_STR_8BIT .TEXT " 8-BIT$" +; +IDE_STR_MODE_DIO .TEXT "DIO$" +IDE_STR_MODE_DIDE .TEXT "DIDE$" +IDE_STR_MODE_MK4 .TEXT "MK4$" +IDE_STR_MODE_RC .TEXT "RC$" ; ;============================================================================= ; DATA STORAGE @@ -1327,3 +1519,5 @@ IDE_IOFNADR .DW 0 ; PENDING IO FUNCTION ADDRESS IDE_DRVHD .DB 0 ; CURRENT DRIVE/HEAD MASK ; IDE_DSKBUF .DW 0 ; ACTIVE DISK BUFFER +; +IDE_DEVNUM .DB 0 ; TEMP DEVICE NUM USED DURING INIT diff --git a/Source/HBIOS/ppide.asm b/Source/HBIOS/ppide.asm index fc964390..3cb48b86 100644 --- a/Source/HBIOS/ppide.asm +++ b/Source/HBIOS/ppide.asm @@ -4,8 +4,8 @@ ;============================================================================= ; ; TODO: -; - IMPLEMENT INTELLIGENT RESET, CHECK IF DEVICE IS ACTUALLY BROKEN BEFORE RESET ; - FIX SCALER CONSTANT +; - GOPARTNER NEEDS TO HANDLE "NO PARTNER" CONDITION ; ; NOTES: ; - WELL KNOWN PPIDE PORT ADDRESSES: @@ -30,8 +30,8 @@ PPIDE_DIR_WRITE .EQU %10000000 ; IDE BUS DATA OUTPUT MODE PPIDE_CTL_DA0 .EQU %00000001 ; DRIVE ADDRESS BUS - BIT 0 (DA0) PPIDE_CTL_DA1 .EQU %00000010 ; DRIVE ADDRESS BUS - BIT 1 (DA1) PPIDE_CTL_DA2 .EQU %00000100 ; DRIVE ADDRESS BUS - BIT 2 (DA2) -PPIDE_CTL_CS1FX .EQU %00001000 ; DRIVE CHIP SELECT 0 (ACTIVE LOW, INVERTED) -PPIDE_CTL_CS3FX .EQU %00010000 ; DRIVE CHIP SELECT 1 (ACTIVE LOW, INVERTED) +PPIDE_CTL_CS1 .EQU %00001000 ; DRIVE CHIP SELECT 0 (ACTIVE LOW, INVERTED) +PPIDE_CTL_CS3 .EQU %00010000 ; DRIVE CHIP SELECT 1 (ACTIVE LOW, INVERTED) PPIDE_CTL_DIOW .EQU %00100000 ; DRIVE I/O WRITE (ACTIVE LOW, INVERTED) PPIDE_CTL_DIOR .EQU %01000000 ; DRIVE I/O READ (ACTIVE LOW, INVERTED) PPIDE_CTL_RESET .EQU %10000000 ; DRIVE RESET (ACTIVE LOW, INVERTED) @@ -66,7 +66,7 @@ PPIDE_CTL_RESET .EQU %10000000 ; DRIVE RESET (ACTIVE LOW, INVERTED) ; | PPIDE_REG_STAT | 0x07 | R | STATUS REGISTER | ; | PPIDE_REG_CMD | 0x07 | W | COMMAND REGISTER (EXECUTE) | ; +-----------------------+-------+-------+-------------------------------+ -; * LBA0-4 ARE ALTERNATE DEFINITIONS OF SECT, CYL, AND DRVHD PORTS +; * LBA0-3 ARE ALTERNATE DEFINITIONS OF SECT, CYL, AND DRVHD PORTS ; ; === STATUS REGISTER === ; @@ -122,33 +122,31 @@ PPIDE_CTL_RESET .EQU %10000000 ; DRIVE RESET (ACTIVE LOW, INVERTED) ; SRST: SOFTWARE RESET ; ~IEN: INTERRUPT ENABLE ; -; CONTROL VALUES TO USE WHEN ACCESSING THE VARIOUS IDE DEVICE REGISTERS -; -PPIDE_REG_DATA .EQU PPIDE_CTL_CS1FX | $00 ; DATA INPUT/OUTPUT (R/W) -PPIDE_REG_ERR .EQU PPIDE_CTL_CS1FX | $01 ; ERROR REGISTER (R) -PPIDE_REG_FEAT .EQU PPIDE_CTL_CS1FX | $01 ; FEATURES REGISTER (W) -PPIDE_REG_COUNT .EQU PPIDE_CTL_CS1FX | $02 ; SECTOR COUNT REGISTER (R/W) -PPIDE_REG_SECT .EQU PPIDE_CTL_CS1FX | $03 ; SECTOR NUMBER REGISTER (R/W) -PPIDE_REG_CYLLO .EQU PPIDE_CTL_CS1FX | $04 ; CYLINDER NUM REGISTER (LSB) (R/W) -PPIDE_REG_CYLHI .EQU PPIDE_CTL_CS1FX | $05 ; CYLINDER NUM REGISTER (MSB) (R/W) -PPIDE_REG_DRVHD .EQU PPIDE_CTL_CS1FX | $06 ; DRIVE/HEAD REGISTER (R/W) -PPIDE_REG_LBA0 .EQU PPIDE_CTL_CS1FX | $03 ; LBA BYTE 0 (BITS 0-7) (R/W) -PPIDE_REG_LBA1 .EQU PPIDE_CTL_CS1FX | $04 ; LBA BYTE 1 (BITS 8-15) (R/W) -PPIDE_REG_LBA2 .EQU PPIDE_CTL_CS1FX | $05 ; LBA BYTE 2 (BITS 16-23) (R/W) -PPIDE_REG_LBA3 .EQU PPIDE_CTL_CS1FX | $06 ; LBA BYTE 3 (BITS 24-27) (R/W) -PPIDE_REG_STAT .EQU PPIDE_CTL_CS1FX | $07 ; STATUS REGISTER (R) -PPIDE_REG_CMD .EQU PPIDE_CTL_CS1FX | $07 ; COMMAND REGISTER (EXECUTE) (W) -PPIDE_REG_ALTSTAT .EQU PPIDE_CTL_CS3FX | $06 ; ALTERNATE STATUS REGISTER (R) -PPIDE_REG_CTRL .EQU PPIDE_CTL_CS3FX | $06 ; DEVICE CONTROL REGISTER (W) -PPIDE_REG_DRVADR .EQU PPIDE_CTL_CS3FX | $07 ; DRIVE ADDRESS REGISTER (R) -; #IF (PPIDETRACE >= 3) #DEFINE DCALL CALL #ELSE #DEFINE DCALL \; #ENDIF ; -PPIDE_DEVCNT .EQU PPIDECNT * 2 ; ASSUME ONLY PRIMARY INTERFACE +; CONTROL VALUES TO USE WHEN ACCESSING THE VARIOUS IDE DEVICE REGISTERS +; +PPIDE_REG_DATA .EQU PPIDE_CTL_CS1 | $00 ; DATA INPUT/OUTPUT (R/W) +PPIDE_REG_ERR .EQU PPIDE_CTL_CS1 | $01 ; ERROR REGISTER (R) +PPIDE_REG_FEAT .EQU PPIDE_CTL_CS1 | $01 ; FEATURES REGISTER (W) +PPIDE_REG_COUNT .EQU PPIDE_CTL_CS1 | $02 ; SECTOR COUNT REGISTER (R/W) +PPIDE_REG_SECT .EQU PPIDE_CTL_CS1 | $03 ; SECTOR NUMBER REGISTER (R/W) +PPIDE_REG_CYLLO .EQU PPIDE_CTL_CS1 | $04 ; CYLINDER NUM REGISTER (LSB) (R/W) +PPIDE_REG_CYLHI .EQU PPIDE_CTL_CS1 | $05 ; CYLINDER NUM REGISTER (MSB) (R/W) +PPIDE_REG_DRVHD .EQU PPIDE_CTL_CS1 | $06 ; DRIVE/HEAD REGISTER (R/W) +PPIDE_REG_LBA0 .EQU PPIDE_CTL_CS1 | $03 ; LBA BYTE 0 (BITS 0-7) (R/W) +PPIDE_REG_LBA1 .EQU PPIDE_CTL_CS1 | $04 ; LBA BYTE 1 (BITS 8-15) (R/W) +PPIDE_REG_LBA2 .EQU PPIDE_CTL_CS1 | $05 ; LBA BYTE 2 (BITS 16-23) (R/W) +PPIDE_REG_LBA3 .EQU PPIDE_CTL_CS1 | $06 ; LBA BYTE 3 (BITS 24-27) (R/W) +PPIDE_REG_STAT .EQU PPIDE_CTL_CS1 | $07 ; STATUS REGISTER (R) +PPIDE_REG_CMD .EQU PPIDE_CTL_CS1 | $07 ; COMMAND REGISTER (EXECUTE) (W) +PPIDE_REG_ALTSTAT .EQU PPIDE_CTL_CS3 | $06 ; ALTERNATE STATUS REGISTER (R) +PPIDE_REG_CTRL .EQU PPIDE_CTL_CS3 | $06 ; DEVICE CONTROL REGISTER (W) +PPIDE_REG_DRVADR .EQU PPIDE_CTL_CS3 | $07 ; DRIVE ADDRESS REGISTER (R) ; ; COMMAND BYTES ; @@ -202,7 +200,7 @@ PPIDE_LBA .EQU 9 ; OFFSET OF LBA (DWORD) PPIDE_DATALO .EQU 13 ; BASE PORT AND IDE DATA BUS LSB (8255 PORT A) (BYTE) PPIDE_CTL .EQU 14 ; IDE ADDRESS BUS AND CONTROL SIGNALS (8255 PORT C)(BYTE) PPIDE_PPI .EQU 15 ; 8255 CONTROL PORT(BYTE) -PPIDE_PARTNER .EQU 16 ; PARTNER DEVICE (MASTER <-> SLAVE) +PPIDE_PARTNER .EQU 16 ; PARTNER DEVICE (MASTER <-> SLAVE) (WORD) ; PPIDE_ACC_MAS .EQU %00000001 ; UNIT IS MASTER (ELSE SLAVE) PPIDE_ACC_8BIT .EQU %00000010 ; UNIT WANTS 8 BIT I/O (ELSE 16 BIT) @@ -210,6 +208,8 @@ PPIDE_ACC_8BIT .EQU %00000010 ; UNIT WANTS 8 BIT I/O (ELSE 16 BIT) PPIDE_MED_CF .EQU %00000001 ; MEDIA IS CF CARD PPIDE_MED_LBA .EQU %00000010 ; MEDIA HAS LBA CAPABILITY ; +PPIDE_DEVCNT .EQU PPIDECNT * 2 +; PPIDE_CFGTBL: ; #IF (PPIDECNT >= 1) @@ -722,7 +722,6 @@ PPIDE_WRSEC: ; ; PPIDE_SETADDR: - ; XXX ; SEND 3 LOWEST BYTES OF LBA IN REVERSE ORDER ; IDE_IO_LBA3 HAS ALREADY BEEN SET ; HSTLBA2-0 --> IDE_IO_LBA2-0 @@ -731,19 +730,19 @@ PPIDE_SETADDR: DCALL PRTHEXBYTE CALL PPIDE_OUT .DB PPIDE_REG_LBA2 - +; LD A,(IY+PPIDE_LBA+1) DCALL PC_SPACE DCALL PRTHEXBYTE CALL PPIDE_OUT .DB PPIDE_REG_LBA1 - +; LD A,(IY+PPIDE_LBA+0) DCALL PC_SPACE DCALL PRTHEXBYTE CALL PPIDE_OUT .DB PPIDE_REG_LBA0 - +; LD A,1 DCALL PC_SPACE DCALL PRTHEXBYTE @@ -1000,7 +999,9 @@ PPIDE_RESET: CALL PPIDE_GOPARTNER ; POINT TO SLAVE CALL PPIDE_INITUNIT ; INIT PARTNER UNIT POP IY ; RECOVER ORIG CFG PTR - RET +; + XOR A ; SIGNAL SUCCESS + RET ; AND DONE ; ; ; @@ -1015,9 +1016,7 @@ PPIDE_INITUNIT: RET NZ ; JUST RETURN IF NOTHING THERE CALL PPIDE_INITDEV ; IF FOUND, ATTEMPT TO INIT DEVICE - RET NZ ; IF FAILED, ALL DONE - - RET + RET ; DONE ; ; TAKE ANY ACTIONS REQUIRED TO SELECT DESIRED PHYSICAL UNIT ; @@ -1026,15 +1025,15 @@ PPIDE_SELUNIT: CALL PPIDE_PRTPREFIX PRTS(" SELUNIT$") #ENDIF - BIT 0,(IY+PPIDE_ACC) ; MASTER? - JR Z,PPIDE_SELUNIT1 ; HANDLE SLAVE - LD A,PPIDE_DRVMASTER ; MASTER - JR PPIDE_SELUNIT2 -PPIDE_SELUNIT1: - LD A,PPIDE_DRVSLAVE ; SLAVE -PPIDE_SELUNIT2: - LD (PPIDE_DRVHD),A ; SAVE IT - XOR A ; SUCCESS + BIT 0,(IY+PPIDE_ACC) ; MASTER? + JR Z,PPIDE_SELUNIT1 ; HANDLE SLAVE + LD A,PPIDE_DRVMASTER ; MASTER + JR PPIDE_SELUNIT2 +PPIDE_SELUNIT1: + LD A,PPIDE_DRVSLAVE ; SLAVE +PPIDE_SELUNIT2: + LD (PPIDE_DRVHD),A ; SAVE IT + XOR A ; SUCCESS RET ; ; diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm index e8ecf3a6..aa6ae0aa 100644 --- a/Source/HBIOS/std.asm +++ b/Source/HBIOS/std.asm @@ -151,10 +151,8 @@ FDMODE_DYNO .EQU 9 ; DYNO WDC 37C65 @ $84 IDEMODE_NONE .EQU 0 IDEMODE_DIO .EQU 1 ; DISKIO V1 IDEMODE_DIDE .EQU 2 ; DUAL IDE -IDEMODE_MK4 .EQU 3 ; MARK IV ONBOARD IDE (8 BIT) -IDEMODE_RC .EQU 4 ; RC2014 CF MODULE (8 BIT) @ $10 (SPENCER OWEN) -IDEMODE_SMB .EQU 5 ; RC2014 IDE MODULE (8 BIT) @ $E0 (SCOTT BAKER) -IDEMODE_DYNO .EQU 6 ; DYNO IDE MODULE (8 BIT) @4A +IDEMODE_MK4 .EQU 3 ; MARK IV ONBOARD IDE (8 BIT ONLY) +IDEMODE_RC .EQU 4 ; RC2014 CF MODULE (8 BIT ONLY) ; ; PPIDE MODE SELECTIONS ;