From 3999039102ad60917a0c494227b953b3aee2b7c5 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Fri, 19 Jul 2024 17:31:53 -0700 Subject: [PATCH] Support for Les Bird's Dual 16C550 UART Module --- Doc/ChangeLog.txt | 1 + Source/HBIOS/cfg_rcz180.asm | 2 +- Source/HBIOS/cfg_rcz280.asm | 2 +- Source/HBIOS/cfg_rcz80.asm | 2 +- Source/HBIOS/cfg_scz180.asm | 2 +- Source/HBIOS/uart.asm | 12 ++++++------ Source/ver.inc | 2 +- Source/ver.lib | 2 +- 8 files changed, 13 insertions(+), 12 deletions(-) diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt index 89b9bd13..54ab204d 100644 --- a/Doc/ChangeLog.txt +++ b/Doc/ChangeLog.txt @@ -26,6 +26,7 @@ Version 3.5 - M?R: Reviewed and substantially improved the Applications document - WBW: Added support for DS1305 RTC on S100 FPGA Z80 - WBW: Added support for Les Bird's RCBus Graphics/Sound/Joystick module +- WBW: Added support for Les Bird's Dual 16C550 UART module Version 3.4 ----------- diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm index acad574e..7cd19ece 100644 --- a/Source/HBIOS/cfg_rcz180.asm +++ b/Source/HBIOS/cfg_rcz180.asm @@ -162,7 +162,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART -UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART +UARTDUAL .EQU TRUE ; UART: AUTO-DETECT DUAL UART ; ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 diff --git a/Source/HBIOS/cfg_rcz280.asm b/Source/HBIOS/cfg_rcz280.asm index 6ad568c1..a3118fd6 100644 --- a/Source/HBIOS/cfg_rcz280.asm +++ b/Source/HBIOS/cfg_rcz280.asm @@ -156,7 +156,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART -UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART +UARTDUAL .EQU TRUE ; UART: AUTO-DETECT DUAL UART ; ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) ; diff --git a/Source/HBIOS/cfg_rcz80.asm b/Source/HBIOS/cfg_rcz80.asm index 5afe6ec1..c5de8b14 100644 --- a/Source/HBIOS/cfg_rcz80.asm +++ b/Source/HBIOS/cfg_rcz80.asm @@ -156,7 +156,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART -UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART +UARTDUAL .EQU TRUE ; UART: AUTO-DETECT DUAL UART ; ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) ; diff --git a/Source/HBIOS/cfg_scz180.asm b/Source/HBIOS/cfg_scz180.asm index 8362f79c..ac236b5a 100644 --- a/Source/HBIOS/cfg_scz180.asm +++ b/Source/HBIOS/cfg_scz180.asm @@ -156,7 +156,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART -UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART +UARTDUAL .EQU TRUE ; UART: AUTO-DETECT DUAL UART ; ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 diff --git a/Source/HBIOS/uart.asm b/Source/HBIOS/uart.asm index bedf4487..df531d69 100644 --- a/Source/HBIOS/uart.asm +++ b/Source/HBIOS/uart.asm @@ -1169,24 +1169,24 @@ UART_CFG_MFP: ; DUAL UART CHANNEL A .DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) .DB 0 ; UART TYPE - .DB UARTDBASE+8 ; IO PORT BASE (RBR, THR) - .DB UARTDBASE+8 + UART_LSR ; LINE STATUS PORT (LSR) + .DB UARTDBASE ; IO PORT BASE (RBR, THR) + .DB UARTDBASE + UART_LSR ; LINE STATUS PORT (LSR) .DW UARTCFG ; LINE CONFIGURATION .DW 0 ; SHOULD NEVER NEED INT HANDLER ; DUAL UART CHANNEL B .DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) .DB 0 ; UART TYPE - .DB UARTDBASE ; IO PORT BASE (RBR, THR) - .DB UARTDBASE + UART_LSR ; LINE STATUS PORT (LSR) + .DB UARTDBASE+8 ; IO PORT BASE (RBR, THR) + .DB UARTDBASE+8 + UART_LSR ; LINE STATUS PORT (LSR) .DW UARTCFG ; LINE CONFIGURATION .DW 0 ; SHOULD NEVER NEED INT HANDLER ; DEVECHO "UART: MODE=DUAL, IO=" - DEVECHO UARTDBASE+8 + DEVECHO UARTDBASE+0 DEVECHO "\n" ; DEVECHO "UART: MODE=DUAL, IO=" - DEVECHO UARTDBASE+0 + DEVECHO UARTDBASE+8 DEVECHO "\n" ; #ENDIF diff --git a/Source/ver.inc b/Source/ver.inc index dc86e1e3..33888bd6 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,7 +2,7 @@ #DEFINE RMN 5 #DEFINE RUP 0 #DEFINE RTP 0 -#DEFINE BIOSVER "3.5.0-dev.57" +#DEFINE BIOSVER "3.5.0-dev.58" #define rmj RMJ #define rmn RMN #define rup RUP diff --git a/Source/ver.lib b/Source/ver.lib index d5156e0b..dc48519a 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 5 rup equ 0 rtp equ 0 biosver macro - db "3.5.0-dev.57" + db "3.5.0-dev.58" endm