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Merge pull request #44 from wwarthen/dev 

Dev
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b1ackmai1er 3 years ago
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90 changed files with 3192 additions and 2710 deletions
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  1. 5
      .gitignore
  2. 260
      Binary/RomList.txt
  3. BIN
      Binary/cpnos-wbw.sys
  4. 1
      Doc/ChangeLog.txt
  5. BIN
      Doc/RomWBW Applications.pdf
  6. BIN
      Doc/RomWBW Disk Catalog.pdf
  7. BIN
      Doc/RomWBW Errata.pdf
  8. BIN
      Doc/RomWBW ROM Applications.pdf
  9. BIN
      Doc/RomWBW System Guide.pdf
  10. BIN
      Doc/RomWBW User Guide.pdf
  11. BIN
      Doc/Z180 ASCI Baud Rate Options.pdf
  12. 2
      ReadMe.md
  13. 2
      ReadMe.txt
  14. 4
      Source/Apps/Build.cmd
  15. 1
      Source/Apps/Clean.cmd
  16. 10
      Source/Apps/Makefile
  17. 16
      Source/Apps/Survey/Build.cmd
  18. 8
      Source/Apps/Survey/Clean.cmd
  19. 6
      Source/Apps/Survey/Makefile
  20. 53
      Source/Apps/Survey/survey.mac
  21. 2
      Source/Build.cmd
  22. 4
      Source/BuildZZR.cmd
  23. 4
      Source/BuildZZRC.cmd
  24. 2
      Source/CPM3/genbnk.dat
  25. 2
      Source/Clean.cmd
  26. 2
      Source/Doc/Basic.h
  27. 2
      Source/Doc/Build.cmd
  28. 3304
      Source/Doc/SystemGuide.md
  29. 786
      Source/Doc/UserGuide.md
  30. BIN
      Source/Doc/Z180 ASCI Baud Rate Options.xlsx
  31. 22
      Source/HBIOS/Build.cmd
  32. 22
      Source/HBIOS/Build.sh
  33. 1
      Source/HBIOS/Config/DYNO_std.asm
  34. 38
      Source/HBIOS/Config/EZZ80_std.asm
  35. 41
      Source/HBIOS/Config/EZZ80_tz80.asm
  36. 23
      Source/HBIOS/Config/MBC_std.asm
  37. 35
      Source/HBIOS/Config/RCZ180_126.asm
  38. 30
      Source/HBIOS/Config/RCZ180_130.asm
  39. 20
      Source/HBIOS/Config/RCZ180_131.asm
  40. 27
      Source/HBIOS/Config/RCZ180_140.asm
  41. 19
      Source/HBIOS/Config/RCZ180_ext.asm
  42. 21
      Source/HBIOS/Config/RCZ180_nat.asm
  43. 18
      Source/HBIOS/Config/RCZ280_ext.asm
  44. 20
      Source/HBIOS/Config/RCZ280_nat.asm
  45. 32
      Source/HBIOS/Config/RCZ280_nat_zz.asm
  46. 43
      Source/HBIOS/Config/RCZ280_nat_zzr.asm
  47. 68
      Source/HBIOS/Config/RCZ280_zz80mb.asm
  48. 76
      Source/HBIOS/Config/RCZ280_zzrc.asm
  49. 34
      Source/HBIOS/Config/RCZ80_duart.asm
  50. 76
      Source/HBIOS/Config/RCZ80_easy.asm
  51. 28
      Source/HBIOS/Config/RCZ80_kio.asm
  52. 34
      Source/HBIOS/Config/RCZ80_mt.asm
  53. 37
      Source/HBIOS/Config/RCZ80_skz.asm
  54. 14
      Source/HBIOS/Config/RCZ80_std.asm
  55. 82
      Source/HBIOS/Config/RCZ80_tiny.asm
  56. 17
      Source/HBIOS/Config/RCZ80_zrc.asm
  57. 16
      Source/HBIOS/Config/RCZ80_zrc_ram.asm
  58. 3
      Source/HBIOS/Config/RPH_std.asm
  59. 63
      Source/HBIOS/cfg_dyno.asm
  60. 260
      Source/HBIOS/cfg_ezz80.asm
  61. 4
      Source/HBIOS/cfg_master.asm
  62. 2
      Source/HBIOS/cfg_mbc.asm
  63. 2
      Source/HBIOS/cfg_mk4.asm
  64. 2
      Source/HBIOS/cfg_n8.asm
  65. 4
      Source/HBIOS/cfg_rcz180.asm
  66. 9
      Source/HBIOS/cfg_rcz280.asm
  67. 9
      Source/HBIOS/cfg_rcz80.asm
  68. 2
      Source/HBIOS/cfg_rph.asm
  69. 2
      Source/HBIOS/cfg_sbc.asm
  70. 4
      Source/HBIOS/cfg_scz180.asm
  71. 2
      Source/HBIOS/cfg_zeta.asm
  72. 2
      Source/HBIOS/cfg_zeta2.asm
  73. 2
      Source/HBIOS/hbios.asm
  74. 4
      Source/HBIOS/sd.asm
  75. 2
      Source/Makefile
  76. 42
      Source/ZZR/Build.cmd
  77. 33
      Source/ZZR/Makefile
  78. 0
      Source/ZZRC/Bank Layout.txt
  79. 42
      Source/ZZRC/Build.cmd
  80. 0
      Source/ZZRC/Clean.cmd
  81. 33
      Source/ZZRC/Makefile
  82. 0
      Source/ZZRC/ZZRC Disk Layout.txt
  83. 0
      Source/ZZRC/zzrc_cfldr.bin
  84. 0
      Source/ZZRC/zzrc_fill_1.bin
  85. 0
      Source/ZZRC/zzrc_fill_2.bin
  86. 0
      Source/ZZRC/zzrc_fill_3.bin
  87. 0
      Source/ZZRC/zzrc_mon.bin
  88. 0
      Source/ZZRC/zzrc_ptbl.bin
  89. 2
      Source/ver.inc
  90. 2
      Source/ver.lib

5
.gitignore
View File

@ -20,6 +20,7 @@
Binary/**/*.mym
Binary/**/*.pt3
!Binary/cpnos-wbw.sys
Source/**/eeprom
Source/Apps/Assign.com
@ -94,8 +95,8 @@ Tools/unix/zx/zx
!Source/ZPM3/*.[Cc][Oo][Mm]
!Source/ZSDOS/*.[Cc][Oo][Mm]
!Source/ZRC/*.bin
!Source/ZZR/*.bin
!Source/ZZR/*.hex
!Source/ZZRC/*.bin
!Source/ZZRC/*.hex
!Tools/cpm/**
!Tools/unix/zx/*
!Tools/zx/*

260
Binary/RomList.txt
View File

@ -1,260 +0,0 @@
***********************************************************************
*** ***
*** R o m W B W ***
*** ***
*** Z80/Z180 System Software ***
*** ***
***********************************************************************
This directory ("Binary") is part of the RomWBW System Software
distribution archive. Refer to the ReadMe.txt file in this
directory for more information on the overall contents of the
directory.
When distributed, RomWBW contains a set of pre-built ROM images that
are ready to program onto the EEPROM of any of the Z80/Z180 based
RetroBrew Computers CPU boards. Additionally, any custom built ROM
images will be placed in this directory.
All of the pre-built ROM images are 512KB. This size is compatible
with all of the Z80/Z180 systems. Some systems can accept different
size ROM images. Creating alternative sizes requires a custom ROM
build (see ReadMe.txt in the Source directory).
It is critical that the right ROM Imgae be selected for the target
platform being used. The table below indicates the correct ROM
image to use for each platform:
SBC V1/V2 SBC_std.rom
SBC SimH SBC_simh.rom
Zeta V1 ZETA_std.rom
Zeta V2 ZETA2_std.rom
N8 N8_std.rom
Mark IV MK4_std.rom
RC2014 w/ Z80 RCZ80_std.rom
RC2014 w/ Z180 RCZ180_nat.rom (native Z180 memory addressing)
RC2014 w/ Z180 RCZ180_ext.rom (external 512K RAM/ROM module)
SC-series SC126, SC130, SC131
Easy Z80 EZZ180_std.rom
Dyno DYNO_std.rom
You will find there is one additional ROM image called
"UNA_std.rom". This ROM image is an UNA-based RomWBW ROM image. As
such, this ROM image can be used on any Z80/Z180 platform supported
by John Coffman's UNA BIOS. Refer to RetroBrew Computers Wiki for
more information on UNA hardware support.
For each of the ROM Images (".rom"), there are corresponding files
with the extensions of ".com" and ".img". The .com variant can be
copied to a functional RomWBW-based system and executed like a
normal application under CP/M or Z-System. This will load the new
ROM on-the-fly. It is an excellent way to test a ROM Image before
actually burning it. Similarly, the .img files can be loaded using
the UNA FAT loader for testing.
All of the standard ROM Images are configured for:
- 512KB ROM Disk
- 512KB RAM Disk
- 38.4Kbps baud serial console (*)
- Auto-discovery of all serial ports
* RC2014 and Stephen Cousins' kits run at 115,200Kbps baud
All hard disk type devices (IDE, PPIDE, CF Card, SD Card) will be
automatically assigned at least two drive letters per device. The
drive letters will refer to the first 2 slices of the device. The
ASSIGN command can be used to display and reassign drives to disk
devices and slices as desired.
Standard ROM Image Notes
------------------------
The standard ROM images will detect and install support for certain
devices and peripherals that are on-board or frequently used with
each platform as documented below. If the device or peripheral is
not detected at boot, the ROM will simply bypass support
appropriately.
SBC (SBC_std.rom):
- CPU speed is detected at startup
- Console on onboard UART serial port at 38400 baud
- Includes support for PPIDE/CF Card(s) connected to on-board
parallel port.
- Includes support for CVDU and VGA3 boards. If detected at
startup, support for video and keyboard is installed
including VT-100/ANSI terminal emulation.
- Auto detects DiskIO v3 floppy disk controller and installs
support for two attached 3.5" floppy disks if found
- Auto-detects PropIO or PropIO V2 and installs associated
video, keyboard and SD Card support if present.
- If PropIO, PropIO V2, CVDU, or VGA hardware is detected,
initial console output is determined by JP2. If JP2 is
shorted, console will go to on-board serial port, if JP2
is open, console will go to the detected video and keyboard
ports.
- SBC V1 has a known race condition in the bank switching
circuit which is likely to cause system instability. SBC
V2 does not have this issue.
SBC (SBC_simh.rom):
- SBC variant customized to run under SimH
- Implments two emulated SimH hard disk images
- Uses SimH RTC
ZETA (ZETA_std.rom):
- CPU speed is detected at startup
- Console on onboard UART serial port at 38400 baud
- Auto-detects FDC and installs 3.5" disk support
if found
- Auto detects on-board floppy disk controller and installs
support for one attached 3.5" floppy disk if found
- Auto-detects ParPortProp and includes support for it if it
is attached.
- If ParPortProp is installed, initial console output is
determined by JP1. If JP1 is shorted, console will go to
on-board serial port, if JP1 is open, console will go to
ParPortProp video and keyboard ports.
ZETA2 (ZETA2_std.rom):
- CPU speed is detected at startup
- Console on onboard UART serial port at 38400 baud
- Auto detects on-board floppy disk controller and installs
support for one attached 3.5" floppy disk if found
- Auto-detects ParPortProp and includes support for it if it
is attached.
- Uses CTC to generate periodic timer interrupts.
- If ParPortProp is installed, initial console output is
determined by JP1. If JP1 is shorted, console will go to
on-board serial port, if JP1 is open, console will go to
ParPortProp video and keyboard ports.
N8 (N8_std.rom):
- CPU speed is detected at startup
- Console on Z180 onboard primary ASCI serial port at 38400 baud
- Auto detects onboard floppy disk controller and installs
support for two attached 3.5" floppy disks if found
- Includes support for on-board TMS9918 video and keyboard
including VT-100/ANSI terminal emulation.
- Includes support for on-board SD Card as hard disk and
assumes a production level N8 board (date code >= 2312).
MK4 (MK4_std.rom):
- CPU speed is detected at startup
- Console on Z180 onboard primary ASCI serial port at 38400 baud
- Includes support for on-board IDE port (CF Card via adapter).
- Includes support for on-board SD Card port.
- Auto detects Dual IDE floppy disk controller and installs
support for two attached 3.5" floppy disks if found
- Auto-detects PropIO or PropIO V2 and installs associated
video, keyboard and SD Card support if present.
- Includes support for CVDU and VGA3 boards. If detected at
startup, support for video and keyboard is installed
including VT-100/ANSI terminal emulation.
RCZ80 (RCZ80_std.rom):
- Assumes CPU oscillator of 7.3728 MHz
- Requires 512K RAM/ROM module
- Auto detects Serial I/O Module (ACIA), Dual Serial
Module (SIO/2), and EP Dual UART.
- Console on whichever serial module is installed,
order of priority is UART, SIO, then ACIA.
- Baud rate is determined by hardware, but normally 115200.
- Auto support for RC2014 Compact Flash Module
- Auto support for RC2014 PPIDE Module
- Support for Scott Baker SIO board may be enabled in config
- Auto detects WDC floppy disk controller and installs
support for two attached 3.5" floppy disks if found
- Support for SMC floppy controller may be enabled in config
- Support for J.B. Lang TMS9918 video card may be enabled in config
- Support for PropIO V2 may be enabled in config (PRPENABLE). If
enabled, will auto-detect and install associated
video, keyboard and SD Card support if present.
RCZ80 w/ KIO (RCZ80_kio.rom):
- Same as RCZ80_std
- Requires KIO module
- SIO ports provided by KIO
RCZ180 (RCZ180_nat.rom & RCZ180_ext.rom):
- Assumes CPU oscillator of 18.432 MHz
- Console on Z180 onboard primary ASCI serial port at 115200 baud
- Auto support for RC2014 Compact Flash Module
- Auto support for RC2014 PPIDE Module
- Support for alternative serial modules may be enabled in config
- Auto detects WDC floppy disk controller and installs
support for two attached 3.5" floppy disks if found
- Support for SMC floppy controller may be enabled in config
- Support for J.B. Lang TMS9918 video card may be enabled in config
- You must pick the variant (_ext or _nat) depending
on which memory module you are using:
- RCZ180_ext.rom uses external bank management to access
memory, such as the 512K RAM/ROM module.
- RCZ180_nat.rom uses the built-in Z180 memory manager
for use with memory modules using direct physical
addressing of memory, such as the SC119.
- Support for PropIO V2 may be enabled in config (PRPENABLE). If
enabled, will auto-detect and install associated
video, keyboard and SD Card support if present.
RCZ280 (RCZ280_ext.rom, RCZ280_nat.rom, RCZ280_nat_zz.rom):
- Assumes CPU oscillator of 24 MHz
- Bus clock will be 6 MHz or 12 MHz, so does not match RC2014 standard!!!
- Requires 512K RAM/ROM module (unless using ZZ80MB)
- Auto detects Serial I/O Module (ACIA), Dual Serial
Module (SIO), EP Dual UART (DUART), and built-in Z280 UART (Z2U).
- ACIA module is only supported on _ext variant.
- Built-in Z280 UART (Z2U) is buffered and interrupt driven only
on _nat and _nat_zz variants. It uses polling I/O on _ext.
- Console on whichever serial module is installed,
order of priority is Z2U, UART, SIO, DUART, ACIA
- Baud rate is determined by hardware, but normally 115200.
- Auto support for RC2014 Compact Flash Module
- Auto support for RC2014 PPIDE Module
- Support for Scott Baker SIO board may be enabled in config
- Auto detects WDC floppy disk controller and installs
support for two attached 3.5" floppy disks if found
- Support for SMC floppy controllers may be enabled in config
- Support for J.B. Lang TMS9918 video card may be enabled in config
- You must pick the variant (_ext, _nat, or _nat_zz) depending
on which platform or memory module you are using:
- RCZ280_ext.rom uses external bank management to access
memory, such as the 512K RAM/ROM module.
- RCZ280_nat.rom uses the built-in Z280 memory manager
for use with memory modules using direct physical
addressing of memory, such as the SC119.
- RCZ280_nat_zz.rom is specifically for the ZZ80MB platform
which has both CPU and memory onboard.
- Support for PropIO V2 may be enabled in config (PRPENABLE). If
enabled, will auto-detect and install associated
video, keyboard and SD Card support if present.
SCZ180 (SCZ180_126.rom, SCZ180_130.rom, SCZ180_131.rom, SCZ140.rom):
- Same as RCZ180
- Adds auto support for onboard SPI SD Card
- The 4 different variants of SCZ180 are provided to match the
4 corresponding systems (SC126, SC130, SC131, and SC140)
designed by Stephen Cousins.
- Support for PropIO V2 may be enabled in config (PRPENABLE). If
enabled, will auto-detect and install associated
video, keyboard and SD Card support if present.
EZZ80 (EZZ80_std.rom):
- Assumes CPU oscillator of 10.000 MHz
- Console on primary SIO serial port at 115200 baud
- Includes support for on-board SIO
- Auto support for RC2014 Compact Flash Module
- Auto support for RC2014 PPIDE Module
- Auto detects WDC floppy disk controller and installs
support for two attached 3.5" floppy disks if found
- Support for SMC floppy controllers may be enabled in config
- Support for PropIO V2 may be enabled in config (PRPENABLE). If
enabled, will auto-detect and install associated
video, keyboard and SD Card support if present.
DYNO (DYNO_std.rom):
- Assumes CPU oscillator of 18.432 MHz
- Console on Z180 onboard serial ports at 38400 baud
- Includes support for BQ4842 RTC
- Auto detects Dyno floppy disk controller and installs
support for two attached 3.5" floppy disks if found
- Includes support for onboard PPIDE

BIN
Binary/cpnos-wbw.sys
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1
Doc/ChangeLog.txt
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@ -68,6 +68,7 @@ Version 3.1.1
- L?N: Updated ZDE to v1.8 including time stamp preservation fixes
- D?M: Minor update to CP/NET client files, fix to CPNBOOT
- WBW: Added p-System IV.0 Z80 implementation
- WBW: Hacked SURVEY to work around bank switching crash
Version 3.1
-----------

BIN
Doc/RomWBW Applications.pdf
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BIN
Doc/RomWBW Disk Catalog.pdf
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BIN
Doc/RomWBW Errata.pdf
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BIN
Doc/RomWBW ROM Applications.pdf
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BIN
Doc/RomWBW System Guide.pdf
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BIN
Doc/RomWBW User Guide.pdf
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BIN
Doc/Z180 ASCI Baud Rate Options.pdf
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2
ReadMe.md
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@ -3,7 +3,7 @@
**RomWBW ReadMe** \
Version 3.1 Pre-release \
Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
07 Feb 2023
13 Feb 2023
# Overview

2
ReadMe.txt
View File

@ -1,6 +1,6 @@
RomWBW ReadMe
Wayne Warthen (wwarthen@gmail.com)
07 Feb 2023
13 Feb 2023

4
Source/Apps/Build.cmd
View File

@ -21,9 +21,6 @@ call :asm rtchb || exit /b
zxcc Z80ASM -SYSGEN/F || exit /b
zxcc MAC SURVEY.ASM -$PO || exit /b
zxcc MLOAD25 -SURVEY.COM=SURVEY.HEX || exit /b
pushd XM && call Build || exit /b & popd
pushd FDU && call Build || exit /b & popd
pushd Tune && call Build || exit /b & popd
@ -34,6 +31,7 @@ pushd ZMD && call Build || exit /b & popd
pushd Dev && call Build || exit /b & popd
pushd VGM && call Build || exit /b & popd
pushd cpuspd && call Build || exit /b & popd
pushd Survey && call Build || exit /b & popd
copy *.com %APPBIN%\ || exit /b

1
Source/Apps/Clean.cmd
View File

@ -17,3 +17,4 @@ pushd ZMD && call Clean || exit /b 1 & popd
pushd Dev && call Clean || exit /b 1 & popd
pushd VGM && call Clean || exit /b 1 & popd
pushd cpuspd && call Clean || exit /b 1 & popd
pushd Survey && call Clean || exit /b 1 & popd

10
Source/Apps/Makefile
View File

@ -1,13 +1,9 @@
OBJECTS = sysgen.com survey.com \
syscopy.com assign.com format.com talk.com mode.com rtc.com \
timer.com rtchb.com
SUBDIRS = XM FDU FAT Tune Test ZMP ZMD Dev VGM cpuspd
OBJECTS = sysgen.com syscopy.com assign.com format.com talk.com \
mode.com rtc.com timer.com rtchb.com
SUBDIRS = XM FDU FAT Tune Test ZMP ZMD Dev VGM cpuspd Survey
DEST = ../../Binary/Apps
TOOLS =../../Tools
include $(TOOLS)/Makefile.inc
USETASM = 1
survey.com: USETASM = 0

16
Source/Apps/Survey/Build.cmd
View File

@ -0,0 +1,16 @@
@echo off
setlocal
set TOOLS=..\..\..\Tools
set PATH=%TOOLS%\zxcc;%PATH%
set CPMDIR80=%TOOLS%/cpm/
:: zxcc MAC survey.asm -$PO || exit /b
:: zxcc MLOAD25 survey || exit /b
zxcc M80 -,=survey/L/R
zxcc L80 -survey,survey/N/E
copy /Y survey.com ..\..\..\Binary\Apps\ || exit /b

8
Source/Apps/Survey/Clean.cmd
View File

@ -0,0 +1,8 @@
@echo off
setlocal
if exist *.hex del *.hex
if exist *.rel del *.rel
if exist *.prn del *.prn
if exist *.lst del *.lst
if exist *.com del *.com

6
Source/Apps/Survey/Makefile
View File

@ -0,0 +1,6 @@
OBJECTS = survey.com
DEST = ../../../Binary/Apps
TOOLS = ../../../Tools
OTHERS = *.hex
include $(TOOLS)/Makefile.inc

53
Source/Apps/survey.asm → Source/Apps/Survey/survey.mac
View File

@ -15,6 +15,10 @@
;
;VERSION LIST - Most recent version first.
;
;10/Feb/23 - Total hack to avoid crash on ECB SBC
; RomWBW now required by this version
; Wayne Warthen
;
;16/Dec/17 - Handle 16-bit port addressing using
; Z80 IN A,(C) instruction. Wayne Warthen
;
@ -234,7 +238,21 @@ TABS EQU 9 ; Tab columns
; MAIN PROGRAM ;
;***********************;
;
ORG 100H
;ORG 100H
;
;
;
.Z80
LD HL,IMGORG
LD DE,START
LD BC,IMGEND-IMGORG
LDIR
JP START
.8080
;
IMGORG:
;
.PHASE 8000H
;
START:
LXI H,0 ; Save stack pointer
@ -242,7 +260,8 @@ START:
SHLD OLDSP
LXI SP,FINIS+64
CALL TYPE ; Type initial CRLF
DB TAB,TAB,'*** System Survey (December 17) ***'
DW CRLF,CRLF
DB TAB,'*** RomWBW System Survey (Feb 2023) ***'
DW CRLF,CRLFE
;DISK SURVEY
@ -586,6 +605,13 @@ PDLY:
MOV A,H ; ON CONSOLE STATUS PORT
ORA L
JNZ PDLY
;
.Z80
; RECORD THE ACTIVE BANK
LD A,(0FFE0H) ; GET CURRENT HBIOS BANK ID
LD (BANK),A ; AND SAVE IT
.8080
;
LXI H,0 ; Init active port counter
mvi d,0 ; Init port counter
mvi e,0ffh ; init port group variable
@ -596,11 +622,23 @@ PORTLP:
CPI SKIPORT
JZ ISPORT ; Print mask port
ENDIF
;
mov c,a ; port number to reg c
mvi b,0 ; for 16 bit port addressing
db 0edh,078h ; z80: in a,(c)
.Z80
in a,(c)
.8080
;
.Z80
; MAKE SURE CORRECT BANK IS STILL SELECTED!
push af
ld a,(BANK)
call 0FFF3H
pop af
.8080
;
; inactive port could return 0xFF or 0x78 or the port address
;
cmp c
jz nextpt
cpi 0FFh
@ -708,7 +746,6 @@ BITSHF:
JNZ BITSHF
RET
;***********************;
; DATA STORAGE ;
;***********************;
@ -722,6 +759,12 @@ RAMF: DS 1 ; RAM good flag
EMPF: DS 1 ; Empty so far flag
BLKSHF: DS 1 ; block shift factor
MAXALL: DS 2 ; maximum block number
BANK: DS 1 ; saved HBIOS bank id
FINIS EQU $ ; End of program
;
.DEPHASE
;
IMGEND:
;
END


2
Source/Build.cmd
View File

@ -8,7 +8,7 @@ call BuildShared || exit /b
call BuildImages || exit /b
call BuildROM %* || exit /b
call BuildZRC || exit /b
call BuildZZR || exit /b
call BuildZZRC || exit /b
if "%1" == "dist" (
call Clean || exit /b

4
Source/BuildZZR.cmd
View File

@ -1,4 +0,0 @@
@echo off
setlocal
pushd ZZR && call Build || exit /b & popd

4
Source/BuildZZRC.cmd
View File

@ -0,0 +1,4 @@
@echo off
setlocal
pushd ZZRC && call Build || exit /b & popd

2
Source/CPM3/genbnk.dat
View File

@ -9,7 +9,7 @@ BNKSWT = Y
COMBAS = 80
LERROR = Y
NUMSEGS = 04
MEMSEG00 = 01,43,00
MEMSEG00 = 01,17,00
MEMSEG01 = 0E,72,02
MEMSEG02 = 01,7F,03
MEMSEG03 = 01,7F,04

2
Source/Clean.cmd
View File

@ -20,3 +20,5 @@ pushd Images && call Clean & popd
pushd Prop && call Clean & popd
pushd RomDsk && call Clean & popd
pushd Doc && call Clean & popd
pushd ZRC && call Clean & popd
pushd ZZRC && call Clean & popd

2
Source/Doc/Basic.h
View File

@ -34,10 +34,12 @@ colorlinks: true
# sansfont: helvetic
sansfont: roboto
# sansfont: bera
# sansfont: DejaVuSans
# sansfont: arial
monofont: roboto-mono
# monofont: bera
# monofont: inconsolata
# monofont: DejaVuSansMono
monofontoptions: 'Scale=0.75'
header-includes:
- |

2
Source/Doc/Build.cmd
View File

@ -42,7 +42,7 @@ echo Processing document %1...
::gpp -o %1.tmp -U "" "" "(" "," ")" "(" ")" "#" "" -M "#" "\n" " " " " "\n" "(" ")" %1.md
gpp -o %1.tmp -U "$" "$" "{" "}{" "}$" "{" "}" "@@@" "" -M "$" "$" "{" "}{" "}$" "{" "}" %1.md || exit /b
::pandoc %1.tmp -f markdown -s -o %1.tex --default-image-extension=pdf || exit /b
::pandoc %1.tmp -f markdown -t latex -s -o %1.tex --default-image-extension=pdf || exit /b
::::rem texify --pdf --clean %1.ltx || exit /b
::texify --pdf --clean --engine=luatex --verbose %1.tex || exit /b
::goto :eof

3304
Source/Doc/SystemGuide.md
View File

File diff suppressed because it is too large

786
Source/Doc/UserGuide.md
View File

@ -137,12 +137,12 @@ a set of directories. Each of these directories has it's own
ReadMe.txt file describing the contents in detail. In summary, these
directories are:
| Directory | Description |
| --------------- | -------------------------------------------------------------- |
| **Directory** | **Description** |
|-----------------|--------------------------------------------------------------------------------------------------------------------------------------------------------------------|
| **Binary** | The final output files of the build process are placed here. Most importantly, the ROM images with the file names ending in ".rom" and disk images ending in .img. |
| **Doc** | Contains various detailed documentation, both RomWBW specifically as well as the operating systems and applications. |
| **Source** | Contains the source code files used to build the software and ROM images. |
| **Tools** | Contains the programs that are used by the build process or that may be useful in setting up your system. |
| **Doc** | Contains various detailed documentation, both RomWBW specifically as well as the operating systems and applications. |
| **Source** | Contains the source code files used to build the software and ROM images. |
| **Tools** | Contains the programs that are used by the build process or that may be useful in setting up your system. |
## Installation
@ -173,37 +173,48 @@ The Binary directory of the distribution contains the pre-built ROM and
disk images. The ROM image files all end in ".rom". Based on the table
below, **carefully** pick the appropriate ROM image for your hardware.
| **Description** | **ROM Image File** | **Baud Rate** |
| ------------------------------------------------ | --------------------- | ------------: |
| RetroBrew Z80 SBC for ECB Bus | SBC_std.rom | 38400 |
| RetroBrew Zeta V1 Z80, ParPortProp | ZETA_std.rom | 38400 |
| RetroBrew Zeta V2 Z80, ParPortProp | ZETA2_std.rom | 38400 |
| RetroBrew N8 Z180 (date code >= 2312) | N8_std.rom | 38400 |
| RetroBrew Mark IV Z180 for ECB Bus | MK4_std.rom | 38400 |
| RC/BP80 Bus Z80, 512K RAM/ROM | RCZ80_std.rom | 115200 |
| RC/BP80 Bus Z80, 512K RAM/ROM, DUART | RCZ80_duart.rom | 115200 |
| RC/BP80 Bus Z80, 512K RAM/ROM, MT011 | RCZ80_mt.rom | 115200 |
| RC/BP80 Bus Z80, 512K RAM/ROM, KIO | RCZ80_kio.rom | 115200 |
| RC/BP80 Bus Z180 w/ external banking | RCZ180_ext.rom | 115200 |
| RC/BP80 Bus Z180 w/ native banking | RCZ180_nat.rom | 115200 |
| RC/BP80 Bus Z280 w/ external banking | RCZ180_ext.rom | 115200 |
| RC/BP80 Bus Z280 w/ native banking | RCZ180_nat.rom | 115200 |
| Sergey Kiselev's Easy Z80 SBC w/ RCBus | EZZ80_std.rom | 115200 |
| Sergey Kiselev's Tiny EIPC Z80 SBC w/ RCBus | EZZ80_tz80.rom | 115200 |
| Sergey Kiselev's Z80-512K Module for RCBus | EZZ80_skz.rom | 115200 |
| Stephen Cousins' SC126 Z180 SBC w/ BP80 Bus | SCZ180_126.rom | 115200 |
| Stephen Cousins' SC130 Z180 SBC w/ RCBus | SCZ180_130.rom | 115200 |
| Stephen Cousins' SC131 Z180 Pocket Computer | SCZ180_131.rom | 115200 |
| Stephen Cousins' SC140 Z180 for Z50Bus | SCZ180_140.rom | 115200 |
| Steve Garcia's Z180 Dyno SBC w/ Dyno Bus | DYNO_std.rom | 38400 |
| Andrew Lynch's Nhyodyne Z80 MBC | MBC_std.rom | 38400 |
| Andrew Lynch's Rhyophyre Z180 SBC | RPH_std.rom | 38400 |
| Bill Shen's Z80 ZRC for RCBus | RCZ80_zrc.rom | 115200 |
| Bill Shen's Z280 ZZRCC for RCBus | RCZ280_nat_zzr.rom | 115200 |
| Bill Shen's Z280 ZZ80MB SBC w/ RCBus | RCZ280_nat_zz.rom | 115200 |
RCBus refers to Spencer Owen's RC2014 bus specification. BP80 Bus is
an enhanced 80-pin version of the RC2014 bus.
| **Description** | **Bus** | **ROM Image File** | **Baud Rate** |
|----------------------------------------------------------------|---------|--------------------|--------------:|
| [RetroBrew Z80 SBC]^1^ | ECB | SBC_std.rom | 38400 |
| [RetroBrew Z80 SimH]^1^ | - | SBC_simh.rom | 38400 |
| [RetroBrew Zeta Z80 SBC]^2^, ParPortProp | - | ZETA_std.rom | 38400 |
| [RetroBrew Zeta V2 Z80 SBC]^2^, ParPortProp | - | ZETA2_std.rom | 38400 |
| [RetroBrew N8 Z180 SBC]^1^ (date code >= 2312) | ECB | N8_std.rom | 38400 |
| [RetroBrew Mark IV Z180 SBC]^3^ | ECB | MK4_std.rom | 38400 |
| [RCBus Z80 CPU Module]^4^, 512K RAM/ROM | RCBus | RCZ80_std.rom | 115200 |
| [RCBus Z80 CPU Module]^4^, 512K RAM/ROM, KIO | RCBus | RCZ80_kio.rom | 115200 |
| [RCBus Z180 CPU Module]^4^ w/ external banking | RCBus | RCZ180_ext.rom | 115200 |
| [RCBus Z180 CPU Module]^4^ w/ native banking | RCBus | RCZ180_nat.rom | 115200 |
| [RCBus Z280 CPU Module]^4^ w/ external banking | RCBus | RCZ180_ext.rom | 115200 |
| [RCBus Z280 CPU Module]^4^ w/ native banking | RCBus | RCZ180_nat.rom | 115200 |
| [Easy Z80 SBC]^2^ | RCBus | RCZ80_easy.rom | 115200 |
| [Tiny Z80 SBC]^2^ | RCBus | RCZ80_tiny.rom | 115200 |
| [Z80-512K CPU/RAM/ROM Module]^2^ | RCBus | RCZ80_skz.rom | 115200 |
| [SC126 Z180 SBC]^5^ | BP80 | RCZ180_126.rom | 115200 |
| [SC130 Z180 SBC]^5^ | RCBus | RCZ180_130.rom | 115200 |
| [SC131 Z180 Pocket Computer]^5^ | - | RCZ180_131.rom | 115200 |
| [SC140 Z180 CPU Module]^5^ | Z50 | RCZ180_140.rom | 115200 |
| [Dyno Z180 SBC]^6^ | Dyno | DYNO_std.rom | 38400 |
| [Nhyodyne Z80 MBC]^1^ | MBC | MBC_std.rom | 38400 |
| [Rhyophyre Z180 SBC]^1^ | - | RPH_std.rom | 38400 |
| [Z80 ZRC CPU Module]^7^ | RCBus | RCZ80_zrc.rom | 115200 |
| [Z280 ZZRCC CPU Module]^7^ | RCBus | RCZ280_zzrc.rom | 115200 |
| [Z280 ZZ80MB SBC]^7^ | RCBus | RCZ280_zz80mb.rom | 115200 |
| ^1^Designed by Andrew Lynch
| ^2^Designed by Sergey Kiselev
| ^3^Designed by John Coffman
| ^4^RCBus compliant (multiple products/designers)
| ^5^Designed by Stephen Cousins
| ^6^Designed by Steve Garcia
| ^7^Designed by Bill Shen
RCBus refers to Spencer Owen's RC2014 bus specification and derivatives
including RC26, RC40, RC80, and BP80.
Additional information for each of the system configurations supported
by the ROM images listed above is found in
[Appendix A - Pre-built ROM Images].
The RCBus Z180 & Z280 require a separate RAM/ROM memory module. There
are two types of these modules and you must pick the correct ROM for
@ -238,8 +249,7 @@ emulation.
RomWBW will automatically attempt to detect and support typical add-on
components for each of the systems supported. More information on the
required system configuration and optional supported components for
each ROM is found in the file called "RomList.txt" in the Binary
directory.
each ROM is found in [Appendix A - Pre-built ROM Images].
## System Startup
@ -541,8 +551,8 @@ Boot [H=Help]:
The following ROM applications and OSes are available at the boot loader
prompt:
| Application | Description |
| ----------------- | -------------------------------------------------------------- |
| **Application** | **Description** |
|-------------------|----------------------------------------------------------------|
| Monitor | Z80 system debug monitor w/ Intel Hex loader |
| CP/M 2.2 | Digital Research CP/M 2.2 OS |
| Z-System | ZSDOS 1.1 w/ ZCPR 1 (Enhanced CP/M compatible OS) |
@ -1148,7 +1158,7 @@ boot messages meaning the first IDE device. To refer to the fourth
slice of IDE0, you would type "IDE0:3". Here are some examples:
| | |
| -------- | ---------------------------- |
|----------|------------------------------|
| `IDE0:0` | First slice of disk in IDE0 |
| `IDE0:` | First slice of disk in IDE0 |
| `IDE0:3` | Fourth slice of disk in IDE0 |
@ -1383,8 +1393,8 @@ Each disk image has the complete set of normal applications and tools
distributed with the associated operating system or application suite.
The following table shows the disk images available.
| Disk Image | Description | Bootable |
| --------------- | -------------------------------------- | -------- |
| **Disk Image** | **Description** | **Boot** |
|-----------------|----------------------------------------|----------|
| xxx_cpm22.img | DRI CP/M 2.2 Operating System | Yes |
| xxx_zsdos.img | ZCPR-DJ & ZSDOS 1.1 Operating System | Yes |
| xxx_nzcom.img | NZCOM ZCPR 3.4 Operating System | Yes |
@ -1455,14 +1465,14 @@ The combo disk image is essentially just a single image that has several
combo disk image contains the following 6 slices in the positions
indicated:
| Slice | Description |
| ------- | ---------------------------------------------------------------- |
| Slice 0 | DRI CP/M 2.2 Operating System |
| Slice 1 | ZCPR-DJ & ZSDOS 1.1 Operating System |
| Slice 2 | NZCOM ZCPR 3.4 Operating System |
| Slice 3 | DRI CP/M 3 Operating System |
| Slice 4 | ZPM3 Operating System |
| Slice 5 | WordStar v4 & ZDE Applications |
| **Slice** | **Description** |
|-----------|------------------------------------------------------------------|
| Slice 0 | DRI CP/M 2.2 Operating System |
| Slice 1 | ZCPR-DJ & ZSDOS 1.1 Operating System |
| Slice 2 | NZCOM ZCPR 3.4 Operating System |
| Slice 3 | DRI CP/M 3 Operating System |
| Slice 4 | ZPM3 Operating System |
| Slice 5 | WordStar v4 & ZDE Applications |
You will notice that there are actually 2 combo disk images in the
distribution. One for an hd512 disk layout (hd512_combo.img) and one
@ -2126,30 +2136,30 @@ directory of the distribution.
The following custom applications are found on the ROM disk and are,
therefore, globally available.
| Application | Description |
| ----------- | -------------------------------------------------------------- |
| ASSIGN | Add, change, and delete drive letter assignments. Use ASSIGN /? for usage instructions. |
| SYSCOPY | Copy system image to a device to make it bootable. Use SYSCOPY with no parms for usage instructions. |
| MODE | Reconfigures serial ports dynamically. |
| FDU | Format and test floppy disks. Menu driven interface. |
| FORMAT | Will someday be a command line tool to format floppy disks. Currently does nothing! |
| XM | XModem file transfer program adapted to hardware. Automatically uses primary serial port on system. |
| FLASH | Will Sowerbutts' in-situ ROM programming utility. |
| FDISK80 | John Coffman's Z80 hard disk partitioning tool. See documentation in Doc directory. |
| TALK | Direct console I/O to a specified character device. |
| RTC | Manage and test the Real Time Clock hardware. |
| TIMER | Display value of running periodic system timer. |
| CPUSPD | Change the running CPU speed and wait states of the system. |
| **Application** | **Description |
|-----------------|------------------------------------------------------------------------------------------------------|
| ASSIGN | Add, change, and delete drive letter assignments. Use ASSIGN /? for usage instructions. |
| SYSCOPY | Copy system image to a device to make it bootable. Use SYSCOPY with no parms for usage instructions. |
| MODE | Reconfigures serial ports dynamically. |
| FDU | Format and test floppy disks. Menu driven interface. |
| FORMAT | Will someday be a command line tool to format floppy disks. Currently does nothing! |
| XM | XModem file transfer program adapted to hardware. Automatically uses primary serial port on system. |
| FLASH | Will Sowerbutts' in-situ ROM programming utility. |
| FDISK80 | John Coffman's Z80 hard disk partitioning tool. See documentation in Doc directory. |
| TALK | Direct console I/O to a specified character device. |
| RTC | Manage and test the Real Time Clock hardware. |
| TIMER | Display value of running periodic system timer. |
| CPUSPD | Change the running CPU speed and wait states of the system. |
Some custom applications do not fit on the ROM disk. They are found on the
disk image files or the individual files can be found in the Binary\\Apps
directory of the distribution.
| Application | Description |
| ----------- | -------------------------------------------------------------- |
| TUNE | Play .PT2, .PT3, .MYM audio files. |
| FAT | Access MS-DOS FAT filesystems from RomWBW (based on FatFs). |
| INTTEST | Test interrupt vector hooking. |
| **Application** | **Description** |
|-----------------|--------------------------------------------------------------------|
| TUNE | Play .PT2, .PT3, .MYM audio files. |
| FAT | Access MS-DOS FAT filesystems from RomWBW (based on FatFs). |
| INTTEST | Test interrupt vector hooking. |
# FAT Filesystem
@ -3112,56 +3122,594 @@ Also feel free to email $doc_author$ at [$doc_authmail$](mailto:$doc_authmail$).
# Appendixes
`\newpage`{=latex}
## Appendix A - Device Summary
`\clearpage`{=latex}
## Appendix A - Pre-built ROM Images
The standard ROM images will detect and install support for certain
devices and peripherals that are on-board or frequently used with
each platform as documented below. If the device or peripheral is
not detected at boot, the ROM will simply bypass support
appropriately.
By default, RomWBW will use the first available character device it
discovers for the initial console. Serial devices are scanned in
the following order:
#. ASCI: Zilog Z180 CPU Built-in Serial Ports
#. Z2U: Zilog Z280 CPU Built-in Serial Ports
#. UART: 16C550 Family Serial Interface
#. DUART: SCC2681 or compatible Dual UART
#. SIO: Zilog Serial Port Interface
#. ACIA: MC68B50 Asynchronous Communications Interface Adapter
In some cases, support for multiple hardware components with potentially
conflicting resource usage are handled by a single ROM image. It is up
to the user to ensure that no conflicting hardware is in use.
The RomWBW `TUNE` application will detect an AY-3-8910/YM2149
Sound Module regardless of whether support for it is included in
the RomWBW HBIOS configuration.
`\clearpage`{=latex}
### RetroBrew Z80 SBC
| | |
|-------------------|---------------|
| ROM Image File | SBC_std.rom |
| Console Baud Rate | 38400 |
- CPU speed is detected at startup if DS1302 RTC is active
- Hardware auto-detected:
- Onboard DS1302 RTC
- Onboard UART Serial Adapter
- Onboard PPIDE Hard Disk Interface
- Zilog Peripherals SIO Serial Interface
- CVDU Display Adapter
- VGA3 Display Adapter
- DiskIO V3 Floppy Disk Controller w/ 3.5" HD Drives
- PropIO Video, Keyboard, & SD Card
- SBC V1 has a known race condition in the bank switching
circuit which is likely to cause system instability. SBC
V2 does not have this issue.
`\clearpage`{=latex}
### RetroBrew Z80 SimH
| | |
|-------------------|---------------|
| ROM Image File | SBC_simh.rom |
| Console Baud Rate | 38400 |
- Hardware auto-detected:
- SimH emulated 8250 Serial Adapter
- SimH emulated hard disk drives
- SimH RTC
`\clearpage`{=latex}
### RetroBrew Zeta Z80 SBC
| | |
|-------------------|---------------|
| ROM Image File | ZETA_std.rom |
| Console Baud Rate | 38400 |
- CPU speed is detected at startup if DS1302 RTC is active
- Hardware auto-detected:
- Onboard DS1302 RTC
- Onboard UART Serial Adapter
- Onboard Floppy Disk Controller w/ 1 3.5" HD Drive
- ParPortProp Video, Keyboard, & SD Card
- If ParPortProp is installed, initial console output is determined
by JP1:
- Shorted: console to on-board serial port
- Open: console to ParPortProp video and keyboard
`\clearpage`{=latex}
### RetroBrew Zeta V2 Z80 SBC
| | |
|-------------------|---------------|
| ROM Image File | ZETA2_std.rom |
| Console Baud Rate | 38400 |
- CPU speed is detected at startup if DS1302 RTC is active
- System timer is generated by onboard CTC
- Hardware auto-detected:
- Onboard DS1302 RTC
- Onboard CTC
- Onboard UART Serial Adapter
- Onboard Floppy Disk Controller w/ 1 3.5" HD Drive
- ParPortProp Video, Keyboard, & SD Card
- If ParPortProp is installed, initial console output is determined
by JP1:
- Shorted: console to on-board serial port
- Open: console to ParPortProp video and keyboard
`\clearpage`{=latex}
### RetroBrew N8 Z180 SBC
| | |
|-------------------|---------------|
| ROM Image File | N8_std.rom |
| Console Baud Rate | 38400 |
- CPU speed is detected at startup if DS1302 RTC is active
- System timer is generated by Z180 CPU
- Hardware auto-detected:
- Onboard Z180 ASCI Serial Ports
- Onboard Floppy Disk Controller w/ 3.5" HD Drives
- Onboard TMS9918 Video Controller
- Onboard PS/2 Keyboard Controller
- Onboard SD Card Interface via CSIO
- Assumes N8 with date code >= 2312 for CSIO interface to SD Card
`\clearpage`{=latex}
### RetroBrew Mark IV Z180 SBC
| | |
|-------------------|---------------|
| ROM Image File | MK4_std.rom |
| Console Baud Rate | 38400 |
- CPU speed is detected at startup if DS1302 RTC is active
- System timer is generated by Z180 CPU
- Hardware auto-detected:
- Onboard Z180 ASCI Serial Ports
- Onboard SD Card Interface via CSIO
- Onboard IDE CF Card Interface
- DIDE Floppy Disk Controller w/ 3.5" HD Drives
- DIDE IDE Hard Disk Controller
- PropIO Video, Keyboard, & SD Card
- CVDU Display Adapter
- VGA3 Display Adapter
`\clearpage`{=latex}
### RCBus Z80 CPU Module
| | |
|-------------------|---------------|
| ROM Image File | RCZ80_std.rom |
| Console Baud Rate | 115200 |
| Interrupts | Mode 1 |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 7.3728 MHz assumed
- Requires 512K RAM/ROM Module
- Hardware auto-detected:
- DS1302 RTC
- ACIA Serial Interface Module
- SIO Serial Interface Module
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- Serial baud rate is usually determined by hardware for ACIA and
SIO interfaces
| | |
|-------------------|---------------|
| ROM Image File | RCZ80_kio.rom |
| Console Baud Rate | 38400 |
| Interrupts | Mode 2 |
- Equivalent to RCZ80_std w/ following modifications:
- KIO-SIO Serial Interface uses KIO port standards
- KIO-CTC generates system timer
- SIO Serial baud rate managed by KIO-CTC
- Use of Interrupt Mode 2 requires proper IEI/IEO configuration
for all peripherals generating interrupts
`\clearpage`{=latex}
### RCBus Z180 CPU Module
| | |
|-------------------|----------------|
| ROM Image Files | RCZ180_ext.rom |
| | RCZ180_nat.rom |
| Console Baud Rate | 115200 |
| Interrupts | Mode 2 |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 18.432 MHz assumed
- System timer is generated by Z180 CPU
- Hardware auto-detected:
- DS1302 RTC
- Z180 ASCI Serial Ports
- SIO Serial Interface Module
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- Specific ROM image determined by memory module used:
- RCZ180_ext - Bank switching on memory module (external of CPU)
- RCZ180_nat - Linear memory module (native CPU bank switching)
- Use of Interrupt Mode 2 requires proper IEI/IEO configuration
for all peripherals generating interrupts
`\clearpage`{=latex}
### RCBus Z280 CPU Module
| | |
|-------------------|----------------|
| ROM Image Files | RCZ280_ext.rom |
| | RCZ280_nat.rom |
| Console Baud Rate | 115200 |
| Interrupts | Mode 1 (ext) |
| | Mode 3 (nat) |
- CPU speed is assumed to be 12 MHz (24 MHz oscillator)
- System timer is generated by Z280 CPU
- Hardware auto-detected:
- DS1302 RTC
- Z280 Z2U Serial Ports
- ACIA Serial Interface Module (ext only)
- SIO Serial Interface Module
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- Serial baud rate is usually determined by hardware for ACIA and
SIO interfaces
- Requires 512K RAM/ROM module
- Specific ROM image determined by memory module used:
- RCZ180_ext - Bank switching on memory module (external of CPU)
- RCZ180_nat - Linear memory module (native CPU bank switching)
`\clearpage`{=latex}
### Easy Z80 SBC
| | |
|-------------------|----------------|
| ROM Image File | RCZ80_easy.rom |
| Console Baud Rate | 115200 |
| Interrupt Mode | 2 |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 10.000 MHz assumed
- System timer is generated by onboard CTC
- Hardware auto-detected:
- DS1302 RTC
- Onboard SIO Serial Interface
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- SIO Serial baud rate managed by CTC
`\clearpage`{=latex}
### Tiny Z80 SBC
| | |
|-------------------|----------------|
| ROM Image File | RCZ80_tiny.rom |
| Console Baud Rate | 115200 |
| Interrupt Mode | 2 |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 16.000 MHz assumed
- System timer is generated by onboard CTC
- Hardware auto-detected:
- DS1302 RTC
- Onboard SIO Serial Interface
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- SIO Serial baud rate managed by CTC
`\clearpage`{=latex}
### Z80-512K CPU/RAM/ROM Module
| | |
|-------------------|----------------|
| ROM Image File | RCZ80_skz.rom |
| Console Baud Rate | 115200 |
| Interrupt Mode | 1 |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 7.3728 MHz assumed
- Hardware auto-detected:
- DS1302 RTC
- ACIA Serial Interface Module
- SIO Serial Interface Module
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- Serial baud rate is determined by hardware for ACIA and SIO
interfaces
`\clearpage`{=latex}
### SC126 Z180 SBC
| | |
|-------------------|----------------|
| ROM Image Files | RCZ180_126.rom |
| Console Baud Rate | 115200 |
| Interrupts | Mode 2 |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 18.432 MHz assumed
- System timer is generated by Z180 CPU
- Hardware auto-detected:
- DS1302 RTC
- Z180 ASCI Serial Ports
- SIO Serial Interface Module
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- Onboard SD Card Interface
- Use of Interrupt Mode 2 requires proper IEI/IEO configuration
for all peripherals generating interrupts
`\clearpage`{=latex}
### SC130 Z180 SBC
| | |
|-------------------|----------------|
| ROM Image Files | RCZ180_130.rom |
| Console Baud Rate | 115200 |
| Interrupts | Mode 2 |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 18.432 MHz assumed
- System timer is generated by Z180 CPU
- Hardware auto-detected:
- DS1302 RTC
- Z180 ASCI Serial Ports
- SIO Serial Interface Module
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- Onboard SD Card Interface
- Use of Interrupt Mode 2 requires proper IEI/IEO configuration
for all peripherals generating interrupts
`\clearpage`{=latex}
### SC131 Z180 Pocket Computer
| | |
|-------------------|----------------|
| ROM Image Files | RCZ180_131.rom |
| Console Baud Rate | 115200 |
| Interrupts | Mode 2 |
- CPU speed assumed to be 18.432 MHz
- System timer is generated by Z180 CPU
- Hardware auto-detected:
- Interrupt-driven RTC
- Z180 ASCI Serial Ports
- Onboard SD Card Interface
`\clearpage`{=latex}
### SC140 Z180 CPU Module
| | |
|-------------------|----------------|
| ROM Image Files | RCZ180_140.rom |
| Console Baud Rate | 115200 |
| Interrupts | Mode 2 |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 18.432 MHz assumed
- System timer is generated by Z180 CPU
- Hardware auto-detected:
- DS1302 RTC
- Z180 ASCI Serial Ports
- SIO Serial Interface Module
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- Onboard SD Card Interface
- Use of Interrupt Mode 2 requires proper IEI/IEO configuration
for all peripherals generating interrupts
`\clearpage`{=latex}
### Dyno Z180 SBC
| | |
|-------------------|----------------|
| ROM Image Files | DYNO0_std.rom |
| Console Baud Rate | 38400 |
| Interrupts | Mode 2 |
- CPU speed is assumed to be 18.432 MHz
- System timer is generated by Z180 CPU
- Hardware auto-detected:
- BQ4845P RTC
- Z180 ASCI Serial Ports
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- Onboard PPIDE Hard Disk Interface Module
`\clearpage`{=latex}
### Nhyodyne Z80 MBC
| | |
|-------------------|---------------|
| ROM Image File | MBC_std.rom |
| Console Baud Rate | 38400 |
| Interrupts | None |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 8.000 MHz assumed
- System timer is generated by CTC if available
- Hardware auto-detected:
- DS1302 RTC
- Zilog CTC
- Zilog DMA Module
- UART Serial Adapter
- SIO Serial Interface
- LPT Printer Interface
- Zilog Parallel Interface
- CVDU Display Adapter
- TMS9938/58 Display Adapter
- PS/2 Keyboard Interface
- AY-3-8910/YM2149 Sound Module
- Floppy Disk Controller w/ 3.5" HD Drives
- PPIDE Hard Disk Interface
- Interrupts may be enabled in build options
`\clearpage`{=latex}
### Rhyophyre Z180 SBC
| | |
|-------------------|---------------|
| ROM Image File | RPH_std.rom |
| Console Baud Rate | 38400 |
| Interrupts | None |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 18.432 MHz assumed
- System timer is generated by Z180 CPU
- Hardware auto-detected:
- Onboard Z180 ASCI Serial Ports
- Onboard PPIDE CF Interface
- Onboard PS/2 Keyboard Controller
- Interrupts may be enabled in build options
`\clearpage`{=latex}
### Z80 ZRC CPU Module
| | |
|-------------------|--------------------|
| ROM Image Files | RCZ80_zrc.rom |
| Console Baud Rate | 115200 |
| Interrupts | Mode 1 |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 14.7456 MHz assumed
- Hardware auto-detected:
- DS1302 RTC
- ACIA Serial Interface Module
- SIO Serial Interface Module
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- Onboard IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- Serial baud rate is usually determined by hardware for ACIA and
SIO interfaces
`\clearpage`{=latex}
### Z280 ZZRCC CPU Module
| | |
|-------------------|--------------------|
| ROM Image Files | RCZ280_zzrc.rom |
| Console Baud Rate | 115200 |
| Interrupts | Mode 3 |
- CPU speed is assumed to be 12 MHz (24 MHz oscillator)
- System timer is generated by Z280 CPU
- Hardware auto-detected:
- DS1302 RTC
- Z280 Z2U Serial Ports
- SIO Serial Interface Module
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- Onboard IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- Serial baud rate is usually determined by hardware for ACIA and
SIO interfaces
`\clearpage`{=latex}
### Z280 ZZ80MB SBC
| | |
|-------------------|-------------------|
| ROM Image Files | RCZ280_zz80mb.rom |
| Console Baud Rate | 115200 |
| Interrupts | Mode 3 |
- CPU speed is assumed to be 12 MHz (24 MHz oscillator)
- System timer is generated by Z280 CPU
- Hardware auto-detected:
- DS1302 RTC
- Z280 Z2U Serial Ports
- SIO Serial Interface Module
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- Onboard IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- Serial baud rate is usually determined by hardware for ACIA and
SIO interfaces
`\clearpage`{=latex}
## Appendix B - Device Summary
The table below briefly describes each of the possible devices that
may be discovered by RomWBW in your system.
| ID | Type | Description |
|---------- | ------- | ------------------------------------------------------ |
| ACIA | Char | MC68B50 Asynchronous Communications Interface Adapter |
| ASCI | Char | Z180 Built-in Serial Ports |
| AY | Audio | AY-3-8910/YM2149 Programmable Sound Generator |
| BQRTC | RTC | BQ4845P Real Time Clock |
| CTC | System | Zilog Clock/Timer |
| CVDU | Video | MC8563-based Video Display Controller |
| DMA | System | Zilog DMA Controller |
| DS1307 | RTC | Maxim DS1307 PCF I2C Real-Time Clock w/ NVRAM |
| DS1501RTC | RTC | Maxim DS1501/DS1511 Watchdog Real-Time Clock |
| DSKY | System | Keypad & Display |
| DSRTC | RTC | Maxim DS1302 Real-Time Clock w/ NVRAM |
| DUART | Char | SCC2681 or compatible Dual UART |
| FD | Disk | 8272 of compatible Floppy Disk Controller |
| GDC | Video | uPD7220 Video Display Controller |
| HDSK | Disk | SIMH Simulator Hard Disk |
| IDE | Disk | IDE/ATA Hard Disk Interface |
| INTRTC | RTC | Interrupt-based Real Time Clock |
| KBD | Kbd | 8242 PS/2 Keyboard Controller |
| KIO | System | Zilog Serial/ Parallel Counter/Timer |
| LPT | Char | Parallel I/O Controller |
| MD | Disk | ROM/RAM Disk |
| MSXKYB | Kbd | MSX Compliant Matrix Keyboard |
| I2C | System | I2C Interface |
| PIO | Char | Zilog Parallel Interface Controller |
| PPIDE | Disk | 8255 IDE/ATA Hard Disk Interface |
| PPK | Kbd | Matrix Keyboard |
| PPPSD | Disk | ParPortProp SD Card Interface |
| PPPCON | Serial | ParPortProp Serial Console Interface |
| PRPSD | Disk | PropIO SD Card Interface |
| PRPCON | Serial | PropIO Serial Console Interface |
| RF | Disk | RAM Floppy Disk Interface |
| RP5C01 | RTC | Ricoh RPC01A Real-Time Clock w/ NVRAM |
| SD | Disk | SD Card Interface |
| SIMRTC | RTC | SIMH Simulator Real-Time Clock |
| SIO | Char | Zilog Serial Port Interface |
| SN76489 | Sound | SN76489 Programmable Sound Generator |
| SPK | Sound | Bit-bang Speaker |
| TMS | Video | TMS9918/38/58 Video Display Controller |
| UART | Char | 16C550 Family Serial Interface |
| USB-FIFO | Char | FT232H-based ECB USB FIFO |
| VDU | Video | MC6845 Family Video Display Controller |
| VGA | Video | HD6445CP4-based Video Display Controller |
| YM | Audio | YM2612 Programmable Sound Generator |
| Z2U | Char | Zilog Z280 Built-in Serial Ports |
| **ID** | **Type** | **Description** |
|-----------|----------|--------------------------------------------------------|
| ACIA | Char | MC68B50 Asynchronous Communications Interface Adapter |
| ASCI | Char | Zilog Z180 CPU Built-in Serial Ports |
| AY | Audio | AY-3-8910/YM2149 Programmable Sound Generator |
| BQRTC | RTC | BQ4845P Real Time Clock |
| CTC | System | Zilog Clock/Timer |
| CVDU | Video | MC8563-based Video Display Controller |
| DMA | System | Zilog DMA Controller |
| DS1307 | RTC | Maxim DS1307 PCF I2C Real-Time Clock w/ NVRAM |
| DS1501RTC | RTC | Maxim DS1501/DS1511 Watchdog Real-Time Clock |
| DSKY | System | Keypad & Display |
| DSRTC | RTC | Maxim DS1302 Real-Time Clock w/ NVRAM |
| DUART | Char | SCC2681 or compatible Dual UART |
| FD | Disk | 8272 of compatible Floppy Disk Controller |
| GDC | Video | uPD7220 Video Display Controller |
| HDSK | Disk | SIMH Simulator Hard Disk |
| IDE | Disk | IDE/ATA Hard Disk Interface |
| INTRTC | RTC | Interrupt-based Real Time Clock |
| KBD | Kbd | 8242 PS/2 Keyboard Controller |
| KIO | System | Zilog Serial/ Parallel Counter/Timer |
| LPT | Char | Parallel I/O Controller |
| MD | Disk | ROM/RAM Disk |
| MSXKYB | Kbd | MSX Compliant Matrix Keyboard |
| I2C | System | I2C Interface |
| PIO | Char | Zilog Parallel Interface Controller |
| PPIDE | Disk | 8255 IDE/ATA Hard Disk Interface |
| PPK | Kbd | Matrix Keyboard |
| PPPSD | Disk | ParPortProp SD Card Interface |
| PPPCON | Serial | ParPortProp Serial Console Interface |
| PRPSD | Disk | PropIO SD Card Interface |
| PRPCON | Serial | PropIO Serial Console Interface |
| RF | Disk | RAM Floppy Disk Interface |
| RP5C01 | RTC | Ricoh RPC01A Real-Time Clock w/ NVRAM |
| SD | Disk | SD Card Interface |
| SIMRTC | RTC | SIMH Simulator Real-Time Clock |
| SIO | Char | Zilog Serial Port Interface |
| SN76489 | Sound | SN76489 Programmable Sound Generator |
| SPK | Sound | Bit-bang Speaker |
| TMS | Video | TMS9918/38/58 Video Display Controller |
| UART | Char | 16C550 Family Serial Interface |
| USB-FIFO | Char | FT232H-based ECB USB FIFO |
| VDU | Video | MC6845 Family Video Display Controller |
| VGA | Video | HD6445CP4-based Video Display Controller |
| YM | Audio | YM2612 Programmable Sound Generator |
| Z2U | Char | Zilog Z280 CPU Built-in Serial Ports |

BIN
Source/Doc/Z180 ASCI Baud Rate Options.xlsx
View File

Binary file not shown.

22
Source/HBIOS/Build.cmd
View File

@ -201,24 +201,24 @@ call Build ZETA2 std || exit /b
call Build N8 std || exit /b
call Build MK4 std || exit /b
call Build RCZ80 std || exit /b
call Build RCZ80 skz || exit /b
call Build RCZ80 kio || exit /b
call Build RCZ80 mt || exit /b
call Build RCZ80 duart || exit /b
call Build RCZ80 easy || exit /b
call Build RCZ80 tiny || exit /b
call Build RCZ80 skz || exit /b
:: call Build RCZ80 mt || exit /b
:: call Build RCZ80 duart || exit /b
call Build RCZ80 zrc || exit /b
call Build RCZ80 zrc_ram || exit /b
call Build RCZ180 ext || exit /b
call Build RCZ180 nat || exit /b
call Build RCZ280 ext || exit /b
call Build RCZ280 nat || exit /b
call Build RCZ280 nat_zz || exit /b
call Build RCZ280 nat_zzr || exit /b
call Build SCZ180 126 || exit /b
call Build SCZ180 130 || exit /b
call Build SCZ180 131 || exit /b
call Build SCZ180 140 || exit /b
call Build EZZ80 std || exit /b
call Build EZZ80 tz80 || exit /b
call Build RCZ280 zz80mb || exit /b
call Build RCZ280 zzrc || exit /b
call Build RCZ180 126 || exit /b
call Build RCZ180 130 || exit /b
call Build RCZ180 131 || exit /b
call Build RCZ180 140 || exit /b
call Build DYNO std || exit /b
call Build UNA std || exit /b
call Build RPH std || exit /b

22
Source/HBIOS/Build.sh
View File

@ -11,20 +11,20 @@ export CPUFAM
if [ "${ROM_PLATFORM}" == "dist" ] ; then
echo "!!!DISTRIBUTION BUILD!!!"
ROM_PLATFORM="DYNO"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="EZZ80"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="EZZ80"; ROM_CONFIG="tz80"; bash Build.sh
ROM_PLATFORM="MK4"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="N8"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="ext"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="nat"; bash Build.sh
ROM_PLATFORM="RCZ280"; ROM_CONFIG="ext"; bash Build.sh
ROM_PLATFORM="RCZ280"; ROM_CONFIG="nat"; bash Build.sh
ROM_PLATFORM="RCZ280"; ROM_CONFIG="nat_zz"; bash Build.sh
ROM_PLATFORM="RCZ280"; ROM_CONFIG="nat_zzr"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="kio"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="mt"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="duart"; bash Build.sh
ROM_PLATFORM="RCZ280"; ROM_CONFIG="zz80mb"; bash Build.sh
ROM_PLATFORM="RCZ280"; ROM_CONFIG="zzrc"; bash Build.sh
# ROM_PLATFORM="RCZ80"; ROM_CONFIG="mt"; bash Build.sh
# ROM_PLATFORM="RCZ80"; ROM_CONFIG="duart"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="kio"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="easy"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="tiny"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="skz"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc_ram"; bash Build.sh
@ -32,10 +32,10 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
ROM_PLATFORM="SBC"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="SBC"; ROM_CONFIG="simh"; bash Build.sh
ROM_PLATFORM="MBC"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="126"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="130"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="131"; bash Build.sh
ROM_PLATFORM="SCZ180"; ROM_CONFIG="140"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="126"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="130"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="131"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="140"; bash Build.sh
ROM_PLATFORM="UNA"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="ZETA"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="ZETA2"; ROM_CONFIG="std"; bash Build.sh

1
Source/HBIOS/Config/DYNO_std.asm
View File

@ -27,6 +27,7 @@
#include "cfg_dyno.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)

38
Source/HBIOS/Config/EZZ80_std.asm
View File

@ -1,38 +0,0 @@
;
;==================================================================================================
; EASY Z80 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_ezz80.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 10000000 ; CPU OSC FREQ IN MHZ
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

41
Source/HBIOS/Config/EZZ80_tz80.asm
View File

@ -1,41 +0,0 @@
;
;==================================================================================================
; EASY Z80 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#include "cfg_ezz80.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 16000000 ; CPU OSC FREQ IN MHZ
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
EIPCENABLE .SET TRUE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
CTCBASE .SET $10 ; CTC BASE I/O ADDRESS
LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED)
LEDPORT .SET $6E ; STATUS LED PORT ADDRESS
SIO0BASE .SET $18 ; SIO 0: REGISTERS BASE ADR
IDE0BASE .SET $90 ; IDE 0: IO BASE ADDRESS

23
Source/HBIOS/Config/MBC_std.asm
View File

@ -26,13 +26,30 @@
;
#include "cfg_mbc.asm"
;
BATCOND .SET FALSE
CPUOSC .SET 8000000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
INTMODE .SET 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
DMAENABLE .SET FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
;
BATCOND .SET FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
;
CPUSPDDEF .SET SPD_LOW ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
MDFFENABLE .SET FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
DSKYENABLE .SET FALSE ; ENABLES DSKY
DSKYMODE .SET DSKYMODE_NG ; DSKY VERSION: DSKYMODE_[V1|NG]
;
UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
;UARTCFG .SET UARTCFG | SER_RTS
;
CVDUMON .SET CVDUMON_CGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

35
Source/HBIOS/Config/SCZ180_140.asm → Source/HBIOS/Config/RCZ180_126.asm
View File

@ -1,6 +1,6 @@
;
;==================================================================================================
; SC140 STANDARD CONFIGURATION
; SC126 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@ -22,36 +22,47 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#include "cfg_scz180.asm"
#DEFINE PLATFORM_NAME "Small Computer SC126", " [", CONFIG, "]"
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz180.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
HBIOS_MUTEX .SET FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
;
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .SET $0D ; DIAGNOSTIC PORT ADDRESS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_LINC ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

30
Source/HBIOS/Config/SCZ180_130.asm → Source/HBIOS/Config/RCZ180_130.asm
View File

@ -22,43 +22,47 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE PLATFORM_NAME "Small Computer SC130", " [", CONFIG, "]"
;
#include "cfg_scz180.asm"
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
#include "cfg_rcz180.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
HBIOS_MUTEX .SET FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
;
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

20
Source/HBIOS/Config/SCZ180_131.asm → Source/HBIOS/Config/RCZ180_131.asm
View File

@ -22,11 +22,11 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE PLATFORM_NAME "Small Computer SC131", " [", CONFIG, "]"
;
#include "cfg_scz180.asm"
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
#include "cfg_rcz180.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
;
@ -34,10 +34,7 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
HBIOS_MUTEX .SET FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
;
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
@ -48,15 +45,8 @@ ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY

27
Source/HBIOS/Config/SCZ180_126.asm → Source/HBIOS/Config/RCZ180_140.asm
View File

@ -1,6 +1,6 @@
;
;==================================================================================================
; SC126 STANDARD CONFIGURATION
; SC140 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@ -22,11 +22,11 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE PLATFORM_NAME "Small Computer SC140", " [", CONFIG, "]"
;
#include "cfg_scz180.asm"
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
#include "cfg_rcz180.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
;
@ -34,25 +34,28 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
HBIOS_MUTEX .SET FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .SET $0D ; DIAGNOSTIC PORT ADDRESS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_LINC ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

19
Source/HBIOS/Config/RCZ180_ext.asm
View File

@ -26,9 +26,8 @@
;
#include "cfg_rcz180.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
@ -36,20 +35,30 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

21
Source/HBIOS/Config/RCZ180_nat.asm
View File

@ -1,6 +1,6 @@
;
;==================================================================================================
; RC2014 Z180 STANDARD CONFIGURATION (NATIVE Z180 MMU W/ LINEAR MEMORY)
; RC2014 Z180 STANDARD CONFIGURATION (NATIVE Z180 MMU W/ LINEAR MEMORY MODULE)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@ -26,9 +26,8 @@
;
#include "cfg_rcz180.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
@ -36,20 +35,30 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

18
Source/HBIOS/Config/RCZ280_ext.asm
View File

@ -26,11 +26,11 @@
;
#include "cfg_rcz280.asm"
;
CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 24000000 ; CPU OSC FREQ IN MHZ
;
INTMODE .SET 1
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
Z280_MEMLOWAIT .SET 0 ; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
Z280_MEMHIWAIT .SET 0 ; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)
@ -42,11 +42,21 @@ UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

20
Source/HBIOS/Config/RCZ280_nat.asm
View File

@ -26,14 +26,12 @@
;
#include "cfg_rcz280.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
INTMODE .SET 3
;
Z280_MEMLOWAIT .SET 0 ; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
Z280_MEMHIWAIT .SET 0 ; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)
Z280_IOWAIT .SET 1 ; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
@ -41,14 +39,24 @@ Z280_INTWAIT .SET 0 ; Z280: INT ACK WAIT STATUS (0-3)
;
Z2UENABLE .SET TRUE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

32
Source/HBIOS/Config/RCZ280_nat_zz.asm
View File

@ -1,32 +0,0 @@
;
;==================================================================================================
; RC2014 Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZ80MB)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "Config/RCZ280_nat.asm"
;
RAMLOC .SET 23 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .SET (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
Z2U0HFC .SET TRUE ; Z2U 0: ENABLE HARDWARE FLOW CONTROL

43
Source/HBIOS/Config/RCZ280_nat_zzr.asm
View File

@ -1,43 +0,0 @@
;
;==================================================================================================
; RC2014 Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZRCC)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "Config/RCZ280_nat.asm"
;
CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
;
RAMSIZE .SET 256 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 256 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .SET 256 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
;
RAMLOC .SET 18 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .SET (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
MDROM .SET TRUE ; MD: ENABLE ROM DISK
MDRAM .SET FALSE ; MD: ENABLE RAM DISK
;
;
Z2UOSC .SET (CPUOSC / 8) ; Z2U: OSC FREQUENCY IN MHZ
Z2U0HFC .SET TRUE ; Z2U0: ENABLE HARDWARE FLOW CONTROL

68
Source/HBIOS/Config/RCZ280_zz80mb.asm
View File

@ -0,0 +1,68 @@
;
;==================================================================================================
; RC2014 Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZ80MB)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "ZZ80MB", " [", CONFIG, "]"
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz280.asm"
;
CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
RAMLOC .SET 23 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .SET (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
Z280_MEMLOWAIT .SET 0 ; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
Z280_MEMHIWAIT .SET 0 ; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)
Z280_IOWAIT .SET 1 ; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
Z280_INTWAIT .SET 0 ; Z280: INT ACK WAIT STATUS (0-3)
;
Z2UENABLE .SET TRUE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
Z2U0HFC .SET TRUE ; Z2U 0: ENABLE HARDWARE FLOW CONTROL
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

76
Source/HBIOS/Config/RCZ280_zzrc.asm
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@ -0,0 +1,76 @@
;
;==================================================================================================
; RC2014 Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZRC)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "ZZRC", " [", CONFIG, "]"
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz280.asm"
;
CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
RAMSIZE .SET 256 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 256 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .SET 256 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
;
RAMLOC .SET 18 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .SET (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
Z280_MEMLOWAIT .SET 0 ; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
Z280_MEMHIWAIT .SET 0 ; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)
Z280_IOWAIT .SET 1 ; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
Z280_INTWAIT .SET 0 ; Z280: INT ACK WAIT STATUS (0-3)
;
MDROM .SET TRUE ; MD: ENABLE ROM DISK
MDRAM .SET FALSE ; MD: ENABLE RAM DISK
;
Z2UENABLE .SET TRUE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
Z2UOSC .SET (CPUOSC / 8) ; Z2U: OSC FREQUENCY IN MHZ
Z2U0HFC .SET TRUE ; Z2U0: ENABLE HARDWARE FLOW CONTROL
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

34
Source/HBIOS/Config/RCZ80_duart.asm
View File

@ -1,34 +0,0 @@
;
;==================================================================================================
; RC2014 Z80 CONFIGURATION W/ DUART
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "Config/RCZ80_std.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
DUARTENABLE .SET TRUE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .SET 1 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

76
Source/HBIOS/Config/RCZ80_easy.asm
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@ -0,0 +1,76 @@
;
;==================================================================================================
; EASY Z80 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "Easy-Z80", " [", CONFIG, "]"
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz80.asm"
;
CPUOSC .SET 10000000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
WDOGMODE .SET WDOG_EZZ80 ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .SET $6F ; WATCHDOG REGISTER ADR
;
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT
CTCTIMER .SET TRUE ; ENABLE CTC PERIODIC TIMER
CTCMODE .SET CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
CTCOSC .SET 921600 ; CTC CLOCK FREQUENCY
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIO0MODE .SET SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0ACLK .SET 1843200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCLK .SET 1843200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACLK .SET 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1BCLK .SET 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

28
Source/HBIOS/Config/RCZ80_kio.asm
View File

@ -24,19 +24,23 @@
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "Config/RCZ80_std.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
#include "cfg_rcz80.asm"
;
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT
;
CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT
CTCTIMER .SET TRUE ; ENABLE CTC PERIODIC TIMER
CTCBASE .SET KIOBASE+$04 ; CTC BASE I/O ADDRESS
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIOCNT .SET 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
@ -47,4 +51,22 @@ SIO0ACTCC .SET 0 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .SET 1843200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCTCC .SET 1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

34
Source/HBIOS/Config/RCZ80_mt.asm
View File

@ -1,34 +0,0 @@
;
;==================================================================================================
; RC2014 Z80 CONFIGURATION W/ MT011
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "Config/RCZ80_std.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)

37
Source/HBIOS/Config/RCZ80_skz.asm
View File

@ -24,15 +24,44 @@
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "Config/RCZ80_std.asm"
#include "cfg_rcz80.asm"
;
LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED)
LEDPORT .SET $6E ; STATUS LED PORT ADDRESS
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
SKZENABLE .SET TRUE ; ENABLE SERGEY'S Z80-512K FEATURES
SKZDIV .SET DIV_12 ; UART CLK (CLK2) DIVIDER FOR Z80-512K
;
WDOGMODE .SET WDOG_SKZ ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED)
LEDPORT .SET $6E ; STATUS LED PORT ADDRESS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIO0BCLK .SET CPUOSC / 12 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .SET SER_38400_8N1 ; SIO 0B: SERIAL LINE CONFIG
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

14
Source/HBIOS/Config/RCZ80_std.asm
View File

@ -26,13 +26,16 @@
;
#include "cfg_rcz80.asm"
;
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
@ -40,15 +43,16 @@ TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCK
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
;
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)

82
Source/HBIOS/Config/RCZ80_tiny.asm
View File

@ -0,0 +1,82 @@
;
;==================================================================================================
; TINY Z80 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "Tiny-Z80", " [", CONFIG, "]"
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz80.asm"
;
CPUOSC .SET 16000000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
EIPCENABLE .SET TRUE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
WDOGMODE .SET WDOG_EZZ80 ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .SET $6F ; WATCHDOG REGISTER ADR
;
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED)
LEDPORT .SET $6E ; STATUS LED PORT ADDRESS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT
CTCBASE .SET $10 ; CTC BASE I/O ADDRESS
CTCTIMER .SET TRUE ; ENABLE CTC PERIODIC TIMER
CTCMODE .SET CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
CTCOSC .SET 921600 ; CTC CLOCK FREQUENCY
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIO0MODE .SET SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0BASE .SET $18 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .SET 1843200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCLK .SET 1843200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACLK .SET 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1BCLK .SET 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDE0BASE .SET $90 ; IDE 0: IO BASE ADDRESS
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

17
Source/HBIOS/Config/RCZ80_zrc.asm
View File

@ -22,31 +22,38 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "ZRC", " [", CONFIG, "]"
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz80.asm"
;
CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
;
RAMSIZE .SET 1536 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .SET MM_ZRC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

16
Source/HBIOS/Config/RCZ80_zrc_ram.asm
View File

@ -22,13 +22,14 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "ZRC", " [", CONFIG, "]"
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz80.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
RAMSIZE .SET 2048 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@ -39,17 +40,24 @@ MDROM .SET FALSE ; MD: ENABLE ROM DISK
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

3
Source/HBIOS/Config/RPH_std.asm
View File

@ -27,6 +27,7 @@
#include "cfg_rph.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
INTMODE .SET 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
@ -36,6 +37,4 @@ Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

63
Source/HBIOS/cfg_dyno.asm
View File

@ -3,7 +3,7 @@
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR DYNO
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL EQU OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED. INSTEAD, YOU SHOULD
; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY
; UNDER THIS DIRECTORY.
@ -56,6 +56,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
@ -80,7 +83,12 @@ CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI]
VDAEMU_SERKBD .EQU $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKTRACE .EQU 1 ; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
KBDTRACE .EQU 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
KBDKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
;
DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
@ -103,8 +111,25 @@ DS7RTCENABLE .EQU FALSE ; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
DS7RTCMODE .EQU DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 1 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
DUART1BASE .EQU $40 ; DUART 1: BASE ADDRESS OF CHIP
DUART1ACFG .EQU DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG
DUART1BCFG .EQU DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG
;
UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@ -118,6 +143,25 @@ Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG
SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1BCLK .EQU 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1BCFG .EQU SER_115200_8N1 ; SIO 1B: SERIAL LINE CONFIG
SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG
;
@ -125,7 +169,7 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
;
@ -173,21 +217,34 @@ PPIDECNT .EQU 1 ; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
PPIDE0BASE .EQU $4C ; PPIDE 0: PPI REGISTERS BASE ADR
PPIDE0A8BIT .EQU FALSE ; PPIDE 0A (MASTER): 8 BIT XFER
PPIDE0B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
PPIDE1BASE .EQU $00 ; PPIDE 1: PPI REGISTERS BASE ADR
PPIDE1A8BIT .EQU FALSE ; PPIDE 1A (MASTER): 8 BIT XFER
PPIDE1B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
PPIDE2BASE .EQU $00 ; PPIDE 2: PPI REGISTERS BASE ADR
PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;

260
Source/HBIOS/cfg_ezz80.asm
View File

@ -1,260 +0,0 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR EASY Z80
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED. INSTEAD, YOU SHOULD
; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY
; UNDER THIS DIRECTORY.
;
; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
; FOR THE PLATFORM.
;
#DEFINE PLATFORM_NAME "Easy-Z80", " [", CONFIG, "]"
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_EZZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
BOOT_DELAY .EQU 0 ; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
;
CPUSPDCAP .EQU SPD_FIXED ; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
CPUSPDDEF .EQU SPD_HIGH ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
CPUOSC .EQU 10000000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .EQU $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
MPGSEL_3 .EQU $7B ; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
MPGENA .EQU $7C ; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
;
RTCIO .EQU $C0 ; RTC LATCH REGISTER ADR
;
KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU TRUE ; ENABLE ZILOG CTC SUPPORT
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER
CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
CTCPRE .EQU 256 ; PRESCALE CONSTANT (1-256)
CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3)
CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3)
CTCOSC .EQU 921600 ; CTC CLOCK FREQUENCY
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_EZZ80 ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .EQU $6F ; WATCHDOG REGISTER ADR
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI]
VDAEMU_SERKBD .EQU $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKTRACE .EQU 1 ; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
KBDTRACE .EQU 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
KBDKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
;
DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS
;
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
RP5RTCENABLE .EQU FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DS7RTCENABLE .EQU FALSE ; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
DS7RTCMODE .EQU DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
DUART1BASE .EQU $40 ; DUART 1: BASE ADDRESS OF CHIP
DUART1ACFG .EQU DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG
DUART1BCFG .EQU DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 1843200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 1843200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1BCLK .EQU 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG
SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG
;
VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
IDE0MODE .EQU IDEMODE_RC ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE0BASE .EQU $10 ; IDE 0: IO BASE ADDRESS
IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O
IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O
IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER
IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER
IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS
IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O
IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O
IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER
IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER
IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS
IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O
IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O
IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER
IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER
;
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPIDECNT .EQU 1 ; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
PPIDE0BASE .EQU $20 ; PPIDE 0: PPI REGISTERS BASE ADR
PPIDE0A8BIT .EQU FALSE ; PPIDE 0A (MASTER): 8 BIT XFER
PPIDE0B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPT0BASE .EQU $E4 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $E8 ; LPT 1: REGISTERS BASE ADR
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
;
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
;
SN76489ENABLE .EQU FALSE ; SN: ENABLE SN76489 SOUND DRIVER
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN7CLK .EQU 3579545 ; SN: PSG CLOCK FREQ, ASSUME MSX STD
SNMODE .EQU SNMODE_RC ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
;
AY38910ENABLE .EQU FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .EQU 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD
AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
;
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

4
Source/HBIOS/cfg_master.asm
View File

@ -143,7 +143,7 @@ DS7RTCENABLE .EQU FALSE ; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
DS7RTCMODE .EQU DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUARTCNT .EQU 1 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
@ -282,7 +282,7 @@ PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_NONE ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011

2
Source/HBIOS/cfg_mbc.asm
View File

@ -211,7 +211,7 @@ PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;

2
Source/HBIOS/cfg_mk4.asm
View File

@ -210,7 +210,7 @@ PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
SDENABLE .EQU TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU TRUE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;

2
Source/HBIOS/cfg_n8.asm
View File

@ -212,7 +212,7 @@ PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
SDENABLE .EQU TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
SDPPIBASE .EQU N8_PPI0 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;

4
Source/HBIOS/cfg_rcz180.asm
View File

@ -111,7 +111,7 @@ DS7RTCENABLE .EQU FALSE ; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
DS7RTCMODE .EQU DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUARTCNT .EQU 1 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
@ -227,7 +227,7 @@ PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011

9
Source/HBIOS/cfg_rcz280.asm
View File

@ -59,11 +59,6 @@ CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER
CTCMODE .EQU CTCMODE_TIM16 ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
CTCPRE .EQU 256 ; PRESCALE CONSTANT (1-256)
CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3)
CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3)
CTCOSC .EQU 7372800 ; CTC CLOCK FREQUENCY
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
@ -116,7 +111,7 @@ DS7RTCENABLE .EQU FALSE ; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
DS7RTCMODE .EQU DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUARTCNT .EQU 1 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
@ -242,7 +237,7 @@ PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011

9
Source/HBIOS/cfg_rcz80.asm
View File

@ -110,7 +110,7 @@ DS7RTCENABLE .EQU FALSE ; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
DS7RTCMODE .EQU DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUARTCNT .EQU 1 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
@ -173,7 +173,7 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
GDCENABLE .EQU FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
TMSMODE .EQU TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|RCV9958|RCKBD]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
;
@ -231,7 +231,7 @@ PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
@ -251,9 +251,6 @@ PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPT0BASE .EQU $E4 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $E8 ; LPT 1: REGISTERS BASE ADR
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_rph.asm
View File

@ -212,7 +212,7 @@ PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDPPIBASE .EQU RPH_PPI0 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;

2
Source/HBIOS/cfg_sbc.asm
View File

@ -211,7 +211,7 @@ PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;

4
Source/HBIOS/cfg_scz180.asm
View File

@ -106,7 +106,7 @@ DS7RTCENABLE .EQU FALSE ; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
DS7RTCMODE .EQU DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUARTCNT .EQU 1 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
@ -222,7 +222,7 @@ PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
SDENABLE .EQU TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011

2
Source/HBIOS/cfg_zeta.asm
View File

@ -155,7 +155,7 @@ PPIDE0B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;

2
Source/HBIOS/cfg_zeta2.asm
View File

@ -166,7 +166,7 @@ PPIDE0B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;

2
Source/HBIOS/hbios.asm
View File

@ -4829,7 +4829,7 @@ SYS_INTGET:
;
; SET AN INTERRUPT VECTOR FOR A SPECIFIED POSITION IN THE INT VECTOR LIST / TABLE
; ENTRY: E=LIST/TABLE POSITION, HL=NEW INTERRUPT VECTOR
; RETURN: HL=PREVIOUS INTERRUPT VECTOR, DE=ADR OF INT ROUTING ENGINE FOR IM2
; RETURN: HL=PREVIOUS INTERRUPT VECTOR
;
SYS_INTSET:
PUSH HL ; SAVE NEW VECTOR

4
Source/HBIOS/sd.asm
View File

@ -1798,7 +1798,7 @@ SD_SELECT:
; CALL SD_WAITTX
;#ENDIF
;
#IF (SDMODE == SDMODE_SC)
#IF ((SDMODE == SDMODE_SC) | SDMODE == SDMODE_MT))
LD A,(IY+SD_DEV) ; GET CURRENT DEVICE
OR A ; SET FLAGS
LD A,(SD_OPRVAL) ; GET CURRENT OPRVAL BACK
@ -1857,7 +1857,7 @@ SD_DESELECT:
#ENDIF
;
LD A,(SD_OPRVAL)
#IF ((SDMODE == SDMODE_SC) & (SD_DEVCNT > 1))
#IF (((SDMODE == SDMODE_SC) | (SDMODE_MT)) & (SD_DEVCNT > 1))
AND ~(SD_CS0 | SD_CS1)
#ELSE
AND ~SD_CS0

2
Source/Makefile
View File

@ -15,7 +15,7 @@ SUBDIRS += RomDsk
SUBDIRS += HBIOS
SUBDIRS += Images
SUBDIRS += ZRC
SUBDIRS += ZZR
SUBDIRS += ZZRC
#SUBDIRS += Doc
TOOLS = ../Tools
include $(TOOLS)/Makefile.inc

42
Source/ZZR/Build.cmd
View File

@ -1,42 +0,0 @@
@echo off
setlocal
set ROMFILE=..\..\Binary\RCZ280_nat_zzr.rom
set ROMSIZE=262144
if not exist %ROMFILE% goto :eof
::
:: The ROM image *must* be exactly 256K or the resulting disk
:: image produced below will be invalid. Check for the proper size.
::
call :filesize %ROMFILE%
if "%FILESIZE%" neq "%ROMSIZE%" (
echo.
echo.
echo ERROR: "%ROMFILE%" is not exactly %ROMSIZE% bytes as required!!!
echo You must specify a ROMSIZE of "256" when building the ZZRCC ROM image.
echo.
echo.
exit /b 1
)
rem ..\..\Tools\srecord\srec_cat.exe ..\..\Binary\RCZ280_nat_zzr.rom -Binary -Exclude 0x5000 0x7000 zzr_romldr.hex -Intel -Output ..\..\Binary\RCZ280_nat_zzr.hex -Intel || exit /b
..\..\Tools\srecord\srec_cat.exe ..\..\Binary\RCZ280_nat_zzr.rom -Binary -Output ..\..\Binary\RCZ280_nat_zzr.hex -Intel || exit /b
rem ..\..\Tools\srecord\srec_cat.exe ..\..\Binary\RCZ280_nat_zzr.hex -Intel -Output ..\..\Binary\RCZ280_nat_zzr_ldr.rom -Binary || exit /b
rem copy /b zzr_cfldr.bin + zzr_ptbl.bin + zzr_fill_1.bin + zzr_mon.bin + zzr_fill_2.bin + ..\..\Binary\RCZ280_nat_zzr_ldr.rom + zzr_fill_3.bin ..\..\Binary\hd1k_zzr_prefix.dat || exit /b
copy /b zzr_cfldr.bin + zzr_ptbl.bin + zzr_fill_1.bin + zzr_mon.bin + zzr_fill_2.bin + ..\..\Binary\RCZ280_nat_zzr.rom + zzr_fill_3.bin ..\..\Binary\hd1k_zzr_prefix.dat || exit /b
copy /b ..\..\Binary\hd1k_zzr_prefix.dat + ..\..\Binary\hd1k_cpm22.img + ..\..\Binary\hd1k_zsdos.img + ..\..\Binary\hd1k_nzcom.img + ..\..\Binary\hd1k_cpm3.img + ..\..\Binary\hd1k_zpm3.img + ..\..\Binary\hd1k_ws4.img ..\..\Binary\hd1k_zzr_combo.img || exit /b
goto :eof
:filesize
set FILESIZE=%~z1
goto :eof

33
Source/ZZR/Makefile
View File

@ -1,33 +0,0 @@
HD1KZZRPREFIX = hd1k_zzr_prefix.dat
HD1KZZZROMBOIMG = hd1k_zzr_combo.img
ZZRROM = ../../Binary/RCZ280_nat_zzr.rom
ZZRROMHEX = RCZ280_nat_zzr.hex
HD1KIMGS = ../../Binary/hd1k_cpm22.img ../../Binary/hd1k_zsdos.img ../../Binary/hd1k_nzcom.img \
../../Binary/hd1k_cpm3.img ../../Binary/hd1k_zpm3.img ../../Binary/hd1k_ws4.img
ZZRROMSIZE = 262144
OBJECTS :=
ifneq ($(wildcard $(ZZRROM)),)
OBJECTS += $(ZZRROMHEX) $(HD1KZZRPREFIX) $(HD1KZZZROMBOIMG)
endif
DEST=../../Binary
TOOLS = ../../Tools
include $(TOOLS)/Makefile.inc
DIFFPATH = $(DIFFTO)/Binary
zzrromchk:
[ `wc -c $(ZZRROM) | awk '{print $$1}'` = $(ZZRROMSIZE) ]
$(HD1KZZRPREFIX): zzrromchk
cat zzr_cfldr.bin zzr_ptbl.bin zzr_fill_1.bin zzr_mon.bin zzr_fill_2.bin $(ZZRROM) zzr_fill_3.bin >$@
$(HD1KZZZROMBOIMG): zzrromchk $(HD1KZZRPREFIX) $(HD1KIMGS)
cat $(HD1KZZRPREFIX) $(HD1KIMGS) > $@
$(ZZRROMHEX): zzrromchk $(ZZRROM)
srec_cat $(ZZRROM) -Binary -Output $(ZZRROMHEX) -Intel -CRLF

0
Source/ZZR/Bank Layout.txt → Source/ZZRC/Bank Layout.txt
View File

42
Source/ZZRC/Build.cmd
View File

@ -0,0 +1,42 @@
:: @echo off
setlocal
set ROMFILE=..\..\Binary\RCZ280_zzrc.rom
set ROMSIZE=262144
if not exist %ROMFILE% goto :eof
::
:: The ROM image *must* be exactly 256K or the resulting disk
:: image produced below will be invalid. Check for the proper size.
::
call :filesize %ROMFILE%
if "%FILESIZE%" neq "%ROMSIZE%" (
echo.
echo.
echo ERROR: "%ROMFILE%" is not exactly %ROMSIZE% bytes as required!!!
echo You must specify a ROMSIZE of "256" when building the ZZRCC ROM image.
echo.
echo.
exit /b 1
)
rem ..\..\Tools\srecord\srec_cat.exe ..\..\Binary\RCZ280_zzrc.rom -Binary -Exclude 0x5000 0x7000 zzrc_romldr.hex -Intel -Output ..\..\Binary\RCZ280_zzrc.hex -Intel || exit /b
..\..\Tools\srecord\srec_cat.exe ..\..\Binary\RCZ280_zzrc.rom -Binary -Output ..\..\Binary\RCZ280_zzrc.hex -Intel || exit /b
rem ..\..\Tools\srecord\srec_cat.exe ..\..\Binary\RCZ280_zzrc.hex -Intel -Output ..\..\Binary\RCZ280_zzrc_ldr.rom -Binary || exit /b
rem copy /b zzrc_cfldr.bin + zzrc_ptbl.bin + zzrc_fill_1.bin + zzrc_mon.bin + zzrc_fill_2.bin + ..\..\Binary\RCZ280_zzrc_ldr.rom + zzrc_fill_3.bin ..\..\Binary\hd1k_zzrc_prefix.dat || exit /b
copy /b zzrc_cfldr.bin + zzrc_ptbl.bin + zzrc_fill_1.bin + zzrc_mon.bin + zzrc_fill_2.bin + ..\..\Binary\RCZ280_zzrc.rom + zzrc_fill_3.bin ..\..\Binary\hd1k_zzrc_prefix.dat || exit /b
copy /b ..\..\Binary\hd1k_zzrc_prefix.dat + ..\..\Binary\hd1k_cpm22.img + ..\..\Binary\hd1k_zsdos.img + ..\..\Binary\hd1k_nzcom.img + ..\..\Binary\hd1k_cpm3.img + ..\..\Binary\hd1k_zpm3.img + ..\..\Binary\hd1k_ws4.img ..\..\Binary\hd1k_zzrc_combo.img || exit /b
goto :eof
:filesize
set FILESIZE=%~z1
goto :eof

0
Source/ZZR/Clean.cmd → Source/ZZRC/Clean.cmd
View File

33
Source/ZZRC/Makefile
View File

@ -0,0 +1,33 @@
HD1KZZRCPREFIX = hd1k_zzrc_prefix.dat
HD1KZZRCCOMBOIMG = hd1k_zzrc_combo.img
ZZRCROM = ../../Binary/RCZ280_zzrc.rom
ZZRCROMHEX = RCZ280_zzrc.hex
HD1KIMGS = ../../Binary/hd1k_cpm22.img ../../Binary/hd1k_zsdos.img ../../Binary/hd1k_nzcom.img \
../../Binary/hd1k_cpm3.img ../../Binary/hd1k_zpm3.img ../../Binary/hd1k_ws4.img
ZZRCROMSIZE = 262144
OBJECTS :=
ifneq ($(wildcard $(ZZRCROM)),)
OBJECTS += $(ZZRCROMHEX) $(HD1KZZRCPREFIX) $(HD1KZZRCCOMBOIMG)
endif
DEST=../../Binary
TOOLS = ../../Tools
include $(TOOLS)/Makefile.inc
DIFFPATH = $(DIFFTO)/Binary
zzrcromchk:
[ `wc -c $(ZZRCROM) | awk '{print $$1}'` = $(ZZRCROMSIZE) ]
$(HD1KZZRCPREFIX): zzrcromchk
cat zzrc_cfldr.bin zzrc_ptbl.bin zzrc_fill_1.bin zzrc_mon.bin zzrc_fill_2.bin $(ZZRCROM) zzrc_fill_3.bin >$@
$(HD1KZZRCCOMBOIMG): zzrcromchk $(HD1KZZRCPREFIX) $(HD1KIMGS)
cat $(HD1KZZRCPREFIX) $(HD1KIMGS) > $@
$(ZZRCROMHEX): zzrcromchk $(ZZRCROM)
srec_cat $(ZZRCROM) -Binary -Output $(ZZRCROMHEX) -Intel -CRLF

0
Source/ZZR/ZZR Disk Layout.txt → Source/ZZRC/ZZRC Disk Layout.txt
View File

0
Source/ZZR/zzr_cfldr.bin → Source/ZZRC/zzrc_cfldr.bin
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0
Source/ZZR/zzr_fill_1.bin → Source/ZZRC/zzrc_fill_1.bin
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0
Source/ZZR/zzr_fill_2.bin → Source/ZZRC/zzrc_fill_2.bin
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0
Source/ZZR/zzr_fill_3.bin → Source/ZZRC/zzrc_fill_3.bin
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0
Source/ZZR/zzr_mon.bin → Source/ZZRC/zzrc_mon.bin
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0
Source/ZZR/zzr_ptbl.bin → Source/ZZRC/zzrc_ptbl.bin
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2
Source/ver.inc
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@ -2,4 +2,4 @@
#DEFINE RMN 1
#DEFINE RUP 1
#DEFINE RTP 0
#DEFINE BIOSVER "3.1.1-pre.195"
#DEFINE BIOSVER "3.1.1-pre.197"

2
Source/ver.lib
View File

@ -3,5 +3,5 @@ rmn equ 1
rup equ 1
rtp equ 0
biosver macro
db "3.1.1-pre.195"
db "3.1.1-pre.197"
endm

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