Browse Source

Add ZRC512 Support

Thanks and credit to Bill Shen for providing the build updates.
pull/378/head
Wayne Warthen 2 years ago
parent
commit
3df34b4ce0
  1. BIN
      Doc/RomWBW Applications.pdf
  2. BIN
      Doc/RomWBW Disk Catalog.pdf
  3. BIN
      Doc/RomWBW Errata.pdf
  4. BIN
      Doc/RomWBW ROM Applications.pdf
  5. BIN
      Doc/RomWBW System Guide.pdf
  6. BIN
      Doc/RomWBW User Guide.pdf
  7. 2
      ReadMe.md
  8. 2
      ReadMe.txt
  9. 1
      Source/Build.cmd
  10. 4
      Source/BuildZRC512.cmd
  11. 44
      Source/Doc/UserGuide.md
  12. 1
      Source/HBIOS/Build.cmd
  13. 1
      Source/HBIOS/Build.sh
  14. 68
      Source/HBIOS/Config/RCZ80_zrc512.asm
  15. 7
      Source/Makefile
  16. 41
      Source/ZRC512/Bank Layout.txt
  17. 23
      Source/ZRC512/Build.cmd
  18. 3
      Source/ZRC512/Clean.cmd
  19. 30
      Source/ZRC512/Makefile
  20. 24
      Source/ZRC512/ZRC512 Disk Layout.txt
  21. 2
      Source/ver.inc
  22. 2
      Source/ver.lib

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Doc/RomWBW Applications.pdf

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Doc/RomWBW Disk Catalog.pdf

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Doc/RomWBW Errata.pdf

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Doc/RomWBW ROM Applications.pdf

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Doc/RomWBW System Guide.pdf

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Doc/RomWBW User Guide.pdf

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2
ReadMe.md

@ -3,7 +3,7 @@
**RomWBW ReadMe** \
Version 3.4 \
Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
30 Nov 2023
09 Dec 2023
# Overview

2
ReadMe.txt

@ -1,6 +1,6 @@
RomWBW ReadMe
Wayne Warthen (wwarthen@gmail.com)
30 Nov 2023
09 Dec 2023

1
Source/Build.cmd

@ -10,6 +10,7 @@ call BuildROM %* || exit /b
call BuildZRC || exit /b
call BuildZ1RCC || exit /b
call BuildZZRCC || exit /b
call BuildZRC512 || exit /b
if "%1" == "dist" (
call Clean || exit /b

4
Source/BuildZRC512.cmd

@ -0,0 +1,4 @@
@echo off
setlocal
pushd ZRC512 && call Build || exit /b & popd

44
Source/Doc/UserGuide.md

@ -253,6 +253,7 @@ is discussed in [Customizing RomWBW].
| [Rhyophyre Z180 SBC]^1^ | - | RPH_std.rom | 38400 |
| [Z80 ZRC CPU Module]^7^ | RCBus | RCZ80_zrc.rom | 115200 |
| [Z80 ZRC CPU Module]^7^ ROMless | RCBus | RCZ80_zrc_ram.rom | 115200 |
| [Z80 ZRC512 CPU Module]^7^ | RCBus | RCZ80_zrc512.rom | 115200 |
| [Z180 Z1RCC CPU Module]^7^ | RCBus | RCZ180_z1rcc.rom | 115200 |
| [Z280 ZZRCC CPU Module]^7^ | RCBus | RCZ280_zzrcc.rom | 115200 |
| [Z280 ZZRCC CPU Module]^7^ ROMless | RCBus | RCZ280_zzrcc_ram.rom | 115200 |
@ -5031,6 +5032,49 @@ the RomWBW HBIOS configuration.
`\clearpage`{=latex}
### Z80 ZRC512 CPU Module
#### ROM Image File: RCZ80_zrc512.rom
| | |
|-------------------|---------------|
| Default CPU Speed | 22.000 MHz |
| Interrupts | Mode 1 |
| System Timer | None |
| Serial Default | 115200 Baud |
| Memory Manager | ZRC |
| ROM Size | 0 KB |
| RAM Size | 512 KB |
##### Supported Hardware (see [Appendix B - Device Summary]):
- FP: LEDIO=0, SWIO=0
- DSRTC: MODE=STD, IO=192
- UART: MODE=RC, IO=160
- UART: MODE=RC, IO=168
- SIO MODE=RC, IO=128, CHANNEL A, INTERRUPTS ENABLED
- SIO MODE=RC, IO=128, CHANNEL B, INTERRUPTS ENABLED
- SIO MODE=RC, IO=132, CHANNEL A, INTERRUPTS ENABLED
- SIO MODE=RC, IO=132, CHANNEL B, INTERRUPTS ENABLED
- ACIA: IO=128, INTERRUPTS ENABLED
- VRC: IO=0, KBD MODE=VRC, KBD IO=244
- KBD: ENABLED
- MD: TYPE=RAM
- FD: MODE=RCWDC, IO=80, DRIVE 0, TYPE=3.5" HD
- FD: MODE=RCWDC, IO=80, DRIVE 1, TYPE=3.5" HD
- IDE: MODE=RC, IO=16, MASTER
- IDE: MODE=RC, IO=16, SLAVE
- PPIDE: IO=32, MASTER
- PPIDE: IO=32, SLAVE
- CTC: IO=136
##### Notes:
- ROMless boot -- HBIOS is loaded from disk at boot
- CPU speed will be dynamically measured at startup if DSRTC is present
`\clearpage`{=latex}
### Z180 Z1RCC CPU Module
#### ROM Image File: RCZ180_z1rcc.rom

1
Source/HBIOS/Build.cmd

@ -218,6 +218,7 @@ call Build RCZ80 skz || exit /b
:: call Build RCZ80 duart || exit /b
call Build RCZ80 zrc || exit /b
call Build RCZ80 zrc_ram || exit /b
call Build RCZ80 zrc512 || exit /b
call Build RCZ180 ext || exit /b
call Build RCZ180 nat || exit /b
call Build RCZ180 z1rcc || exit /b

1
Source/HBIOS/Build.sh

@ -30,6 +30,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
ROM_PLATFORM="RCZ80"; ROM_CONFIG="skz"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc_ram"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc512"; bash Build.sh
ROM_PLATFORM="RPH"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="SBC"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="SBC"; ROM_CONFIG="simh"; bash Build.sh

68
Source/HBIOS/Config/RCZ80_zrc512.asm

@ -0,0 +1,68 @@
;
;==================================================================================================
; RCBUS Z80 ZRC512 CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "ZRC512", " [", CONFIG, "]"
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz80.asm"
;
CPUOSC .SET 22000000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .SET MM_ZRC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
MDROM .SET FALSE ; MD: ENABLE ROM DISK
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

7
Source/Makefile

@ -2,12 +2,12 @@
# order is actually important, because of build dependencies
#
.PHONY: doc prop shared bp images rom zrc z1rcc zzrcc
.PHONY: doc prop shared bp images rom zrc z1rcc zzrcc zrc512
.ONESHELL:
.SHELLFLAGS = -cex
all: prop shared bp images rom zrc z1rcc zzrcc
all: prop shared bp images rom zrc z1rcc zzrcc zrc512
doc:
$(MAKE) --directory Doc $(ACTION)
@ -50,6 +50,9 @@ z1rcc:
zzrcc:
$(MAKE) --directory ZZRCC $(ACTION)
zrc512:
$(MAKE) --directory ZRC512 $(ACTION)
clean: ACTION=clean
clean: all

41
Source/ZRC512/Bank Layout.txt

@ -0,0 +1,41 @@
ZRC has no real ROM. It has a single 2048K RAM chip. There
are two startup modes supported by RomWBW.
The normal startup mode treats the first 512KB like ROM and the
remaining 1536KB as RAM. The first 512KB (pseudo-ROM) must be preloaded
by the ZRC CF Loader. This mode simulates a normal ROM-based RomWBW
startup.
Bank Contents Description
---- -------- -----------
0x0 BOOT Boot Bank (HBIOS image) +
0x1 IMG0 ROM Loader, Monitor, ROM OSes |
0x2 IMG1 ROM Applications | Pseudo-ROM
0x3 IMG2 Reserved |
0x4-0xF ROMD ROM Disk Banks +
0x10 BIOS HBIOS Bank (operating)
0x11-0x3B RAMD RAM Disk Banks
0x3C BUF OS Buffers (CP/M3)
0x3D AUX Aux Bank (CP/M 3, BPBIOS, etc.)
0x3E USR User Bank (CP/M TPA, etc.)
0x3F COM Common Bank, Upper 32KB
The ROMless startup mode treats the entire 2048KB as RAM. However, in
this mode, only the first 512KB of RAM is utilized. This is because
the RAM Disk is seeded by the CF Loader which is currently constrained
to loading 512KB. The entire 512KB of RAM (less the top 32KB) must be
preloaded by the ZRC CF Loader. There will be no ROM disk available
under RomWBW. There will be a RAM Disk and it's initial contents will
be seeded by the image loaded by the CF Loader.
Bank Contents Description
-------- -------- -----------
0x0 BIOS HBIOS Bank (operating)
0x1 IMG0 ROM Loader, Monitor, ROM OSes
0x2 IMG1 ROM Applications
0x3 IMG2 Reserved
0x4-0xB RAMD RAM Disk Banks
0xC BUF OS Buffers (CP/M3)
0xD AUX Aux Bank (CP/M 3, BPBIOS, etc.)
0xE USR User Bank (CP/M TPA, etc.)
0xF COM Common Bank, Upper 32KB

23
Source/ZRC512/Build.cmd

@ -0,0 +1,23 @@
@echo off
setlocal
set TOOLS=../../Tools
set PATH=%TOOLS%\srecord;%PATH%
if exist ..\..\Binary\RCZ80_zrc512.rom call :build_zrc512
goto :eof
:build_zrc512
srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x0 0x200 zrc512_cfldr.bin -binary -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1B8 0x200 zrc512_ptbl.bin -binary -offset 0x1B8 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zrc512_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x24000 0xA4000 ..\..\Binary\RCZ80_zrc512.rom -binary -offset 0x24000 -o temp.dat -binary
move temp.dat ..\..\Binary\hd1k_zrc512_prefix.dat
copy /b ..\..\Binary\hd1k_zrc512_prefix.dat + ..\..\Binary\hd1k_cpm22.img + ..\..\Binary\hd1k_zsdos.img + ..\..\Binary\hd1k_nzcom.img + ..\..\Binary\hd1k_cpm3.img + ..\..\Binary\hd1k_zpm3.img + ..\..\Binary\hd1k_ws4.img ..\..\Binary\hd1k_zrc512_combo.img || exit /b
goto :eof

3
Source/ZRC512/Clean.cmd

@ -0,0 +1,3 @@
@echo off
setlocal

30
Source/ZRC512/Makefile

@ -0,0 +1,30 @@
HD1KZRC512PREFIX = hd1k_zrc512_prefix.dat
HD1KZRC512COMBOIMG = hd1k_zrc512_combo.img
ZRC512ROM = ../../Binary/RCZ80_zrc512.rom
HD1KIMGS = ../../Binary/hd1k_cpm22.img ../../Binary/hd1k_zsdos.img ../../Binary/hd1k_nzcom.img \
../../Binary/hd1k_cpm3.img ../../Binary/hd1k_zpm3.img ../../Binary/hd1k_ws4.img
OBJECTS :=
ifneq ($(wildcard $(ZRC512ROM)),)
OBJECTS += $(HD1KZRC512PREFIX) $(HD1KZRC512COMBOIMG)
endif
DEST=../../Binary
TOOLS = ../../Tools
include $(TOOLS)/Makefile.inc
DIFFPATH = $(DIFFTO)/Binary
$(HD1KZRC512PREFIX):
srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x0 0x200 zrc512_cfldr.bin -binary -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1B8 0x200 zrc512_ptbl.bin -binary -offset 0x1B8 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zrc512_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x24000 0xA4000 $(ZRC512ROM) -binary -offset 0x24000 -o temp.dat -binary
mv temp.dat $@
$(HD1KZRC512COMBOIMG): $(HD1KZRC512PREFIX) $(HD1KIMGS)
cat $^ > $@

24
Source/ZRC512/ZRC512 Disk Layout.txt

@ -0,0 +1,24 @@
ZRC512 Disk Prefix Layout
======================
---- Bytes ---- --- Sectors ---
Start Length Start Length Description
------- ------- ------- ------- ---------------------------
0x00000 0x001BE 0 1 CF Boot Loader
0x001B8 0x00048 RomWBW Partition Table
0x00200 0x1EE00 1 247 Unused
0x1F000 0x01000 248 8 ZRC512 Monitor v0.3
0x20000 0x04000 256 32 Unused
0x24000 0x80000 288 1024 RomWBW
0xA4000 0x5C000 1312 736 Unused
0x100000 2048 Start of slices (partition 0x1E)
Notes
-----
- At startup CPLD ROM is mapped to Z80 CPU address space 0x0000-0x003F, CPU begins execution at 0x0000
- CPLD ROM (CF bootstrap mode) reads CF Boot Loader (512B) from start of CF (MBR) to 0xB000 and runs it
- CF Boot Loader reads ZRC512 Monitor (4KB) from sectors 0xF8-0xFF of CF to 0xB400 and runs it
- ZRC Monitor reads 480KB (RomWBW) from sectors 0x120-0x4DF of CF into 480KB of physical RAM
- ZRC Monitor maps first 32KB of physical RAM to first 32KB of CPU RAM and starts execution at 0x0000

2
Source/ver.inc

@ -2,7 +2,7 @@
#DEFINE RMN 4
#DEFINE RUP 0
#DEFINE RTP 0
#DEFINE BIOSVER "3.4.0-dev.30"
#DEFINE BIOSVER "3.4.0-dev.31"
#define rmj RMJ
#define rmn RMN
#define rup RUP

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 4
rup equ 0
rtp equ 0
biosver macro
db "3.4.0-dev.30"
db "3.4.0-dev.31"
endm

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