MirrorRepos/RomWBW
1
0
Fork 1
mirror of https://github.com/wwarthen/RomWBW.git synced 2026-02-06 14:11:48 -06:00
Code Issues Projects Releases Wiki Activity

ay-3-8910 sound driver updates

Browse Source
This commit is contained in:
b1ackmai1er
2020-05-02 12:28:35 +08:00
parent 5ff9dbb67e
commit 3dfeaabe2f
4 changed files with 148 additions and 117 deletions
Download Patch File Download Diff File Expand all files Collapse all files

218
Source/Apps/Tune/Tune.asm
View File

@@ -40,6 +40,7 @@
; 2020-02-11 [WBW] Made hardware config & detection more flexible
; 2020-03-29 [WBW] Fix error in Z180 I/O W/S bracketing
; 2020-04-25 [DEN] Added support to use HBIOS Sound driver
; 2020-05-02 [PMS] Add support for SBC-V2 slow-io hack
;_______________________________________________________________________________
;
; ToDo:
@@ -53,14 +54,18 @@
#include "hbios.inc"
#include "cpm.inc"
#include "tune.inc"
;
HEAPEND .EQU $C000 ; End of heap storage
;
TYPPT2 .EQU 1 ; FILTYP value for PT2 sound file
TYPPT3 .EQU 2 ; FILTYP value for PT3 sound file
TYPMYM .EQU 3 ; FILTYP value for MYM sound file
;
; HIGH SPEED CPU CONTROL
;
SBCV2004 .EQU 1 ; USE SBC-V2-004 HALF CLOCK DIVIDER
CPUFAMZ180 .EQU 1 ; USE Z180 WAIT STATE MANAGEMENT
;
;Conditional assembly - use -D switch on TASM or uz80as assembler to control
_ZX .EQU 0 ; 1) Version of ROUT (ZX or MSX standards)
_MSX .EQU 0
@@ -401,43 +406,44 @@ IDBIO2:
;
;
;
SLOWCPU:
LD A,(Z180) ; Z180 base I/O port
CP $FF ; Check for no value
RET Z ; Bail out if no value
ADD A,$1E ; Apply offset of CMR register
LD C,A ; And put it in C
LD B,0 ; MSB for 16-bit I/O
IN A,(C) ; Get current value
LD (CMRSAV),A ; Save it to restore later
XOR A ; Go slow
OUT (C),A ; And update CMR
INC C ; Now point to CCR register
IN A,(C) ; Get current value
LD (CCRSAV),A ; Save it to restore later
XOR A ; Go slow
OUT (C),A ; And update CCR
RET
;SLOWCPU:
; LD A,(Z180) ; Z180 base I/O port
; CP $FF ; Check for no value
; RET Z ; Bail out if no value
; ADD A,$1E ; Apply offset of CMR register
; LD C,A ; And put it in C
; LD B,0 ; MSB for 16-bit I/O
; IN A,(C) ; Get current value
; LD (CMRSAV),A ; Save it to restore later
; XOR A ; Go slow
; OUT (C),A ; And update CMR
; INC C ; Now point to CCR register
; IN A,(C) ; Get current value
; LD (CCRSAV),A ; Save it to restore later
; XOR A ; Go slow
; OUT (C),A ; And update CCR
; RET
;
;
;
NORMCPU:
LD A,(Z180) ; Z180 base I/O port
CP $FF ; Check for no value
RET Z ; Bail out if no value
ADD A,$1E ; Apply offset of CMR register
LD C,A ; And put it in C
LD B,0 ; MSB for 16-bit I/O
LD A,(CMRSAV) ; Get original CMR value
OUT (C),A ; And update CMR
INC C ; Now point to CCR register
LD A,(CCRSAV) ; Get original CCR value
OUT (C),A ; And update CCR
RET
;
;NORMCPU:
; LD A,(Z180) ; Z180 base I/O port
; CP $FF ; Check for no value
; RET Z ; Bail out if no value
; ADD A,$1E ; Apply offset of CMR register
; LD C,A ; And put it in C
; LD B,0 ; MSB for 16-bit I/O
; LD A,(CMRSAV) ; Get original CMR value
; OUT (C),A ; And update CMR
; INC C ; Now point to CCR register
; LD A,(CCRSAV) ; Get original CCR value
; OUT (C),A ; And update CCR
; RET
;
; SLOW DOWN I/O FOR FAST CPU'S
;
SLOWIO:
#IF (CPUFAMZ180)
LD A,(Z180) ; Z180 base I/O port
CP $FF ; Check for no value
RET Z ; Bail out if no value
@@ -448,11 +454,17 @@ SLOWIO:
LD (DCSAV),A ; Save it to restore later
OR %00110000 ; Force slow operation (I/O W/S=3)
OUT (C),A ; And update DCNTL
#ENDIF
#IF (SBCV2004)
LD A,8 ; sbc-v2-004 change to
OUT (112),A ; half clock speed
#ENDIF
RET
;
;
; RESTORE I/O SPEED FOR FAST CPU'S
;
NORMIO:
#IF (CPUFAMZ180)
LD A,(Z180) ; Z180 base I/O port
CP $FF ; Check for no value
RET Z ; Bail out if no value
@@ -461,8 +473,12 @@ NORMIO:
LD B,0 ; MSB for 16-bit I/O
LD A,(DCSAV) ; Get saved DCNTL value
OUT (C),A ; And restore it
#ENDIF
#IF (SBCV2004)
LD A,0 ; sbc-v2-004 change to
OUT (112),A ; normal clock speed
#ENDIF
RET
;
ERRBIO: ; Invalid BIOS or version
LD DE,MSGBIO
@@ -1982,87 +1998,93 @@ LOUT OUT (C), A ; SELECT REGISTER
JP M, LOUT2 ; IF BIT 7 SET, RETURN W/O WRITING VALUE
LD C, D ; SELECT DATA PORT
OUT (C), A ; WRITE VALUE TO REGISTER 13
LOUT2
CALL NORMIO
LOUT2 CALL NORMIO
EI
RET ; AND DONE
PLAYVIAHBIOS:
LD B, BF_SNDVOL
LD C, 0
LD H, 0
LD A, (AYREGS + AmplA)
AND $0F
rlca
rlca
rlca
rlca
;
; CHANNEL 0 (LEFT)
;
LD B, BF_SNDVOL ; SET VOLUME
LD C, 0 ; DEVICE 0
; LD H, 0
LD A, (AYREGS + AmplA) ; GET 4-BIT
AND $0F ; VOLUME 0-15
RLCA ; AND CONVERT
RLCA ; TO HBIOS
RLCA ; RANGE 0-255
RLCA
LD L, A
RST 08
LD B, BF_SNDPRD
LD C, 0
LD HL, (AYREGS+TonA)
ld a, h
AND $0F
;
LD B, BF_SNDPRD ; SET PERIOD
LD C, 0 ; DEVICE 0
LD HL, (AYREGS+TonA) ; GET 12-BIT TONE PERIOD
ld A, H ; MASK OFF HIGH
AND $0F ; NIBBLE
LD H, A
RST 08
LD B, BF_SNDPLAY
LD C, 0
LD D, 0
;
LD B, BF_SNDPLAY ; PLAY
LD C, 0 ; DEVICE 0
LD D, 0 ; CHANNEL 0
RST 08
LD B, BF_SNDVOL
LD C, 0
LD H, 0
LD A, (AYREGS + AmplB)
AND $0F
rlca
rlca
rlca
rlca
;
; CHANNEL 1 (MIDDLE)
;
LD B, BF_SNDVOL ; SET VOLUME
LD C, 0 ; DEVICE 0
; LD H, 0
LD A, (AYREGS + AmplB) ; GET 4-BIT
AND $0F ; VOLUME 0-15
RLCA ; AND CONVERT
RLCA ; TO HBIOS
RLCA ; RANGE 0-255
RLCA
LD L, A
RST 08
LD B, BF_SNDPRD
LD C, 0
LD HL, (AYREGS+TonB)
ld a, h
AND $0F
;
LD B, BF_SNDPRD ; SET PERIOD
LD C, 0 ; DEVICE 0
LD HL, (AYREGS+TonB) ; GET 12-BIT ONE PERIOD
ld a, h ; MASK OFF HIGH
AND $0F ; NIBBLE
LD H, A
RST 08
LD B, BF_SNDPLAY
LD C, 0
LD D, 1
;
LD B, BF_SNDPLAY ; PLAY
LD C, 0 ; DEVICE 0
LD D, 1 ; CHANNEL 1
RST 08
LD B, BF_SNDVOL
LD C, 0
LD H, 0
LD A, (AYREGS + AmplC)
AND $0F
rlca
rlca
rlca
rlca
;
; CHANNEL 2 (RIGHT)
;
LD B, BF_SNDVOL ; SET VOLUME
LD C, 0 ; DEVICE 0
; LD H, 0
LD A, (AYREGS + AmplC) ; GET 4-BIT
AND $0F ; VOLUME 0-15
RLCA ; AND CONVERT
RLCA ; TO HBIOS
RLCA ; RANGE 0-255
RLCA
LD L, A
RST 08
LD B, BF_SNDPRD
LD C, 0
LD HL, (AYREGS+TonC)
ld a, h
AND $0F
;
LD B, BF_SNDPRD ; SET PERIOD
LD C, 0 ; DEVICE 0
LD HL, (AYREGS+TonC) ; GET 12-BIT ONE PERIOD
ld A, H ; MASK OFF HIGH
AND $0F ; NIBBLE
LD H, A
RST 08
LD B, BF_SNDPLAY
LD C, 0
LD D, 2
RST 08
;
LD B, BF_SNDPLAY ; PLAY
LD C, 0 ; DEVICE 0
LD D, 2 ; CHANNEL 2
RST 08 ; HBIOS CALL
RET
#ENDIF