mirror of
https://github.com/wwarthen/RomWBW.git
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Miscellaneous
- Support RCBus PS/2 Keyboard (EtchedPixels & Sally) - Added AT-3-8910 register spreadsheet (Martin R) - Improved FD hardware detection to eliminate a false positive - Reorder Boot Loader menu (Martin R) - Minor enhancement to new usrrom.asm (Martin R)
This commit is contained in:
Wayne Warthen
@@ -19,6 +19,15 @@
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; UNUSED BITS CAN BE READ BACK AND WRITTEN ON YM.
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; VOLTAGE LEVEL OUTPUT ON A AY-3-8910 IS LOW AND AROUND 2V ON YM2149.
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;
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; THERE ARE TWO VARIANTS OF AY-3-8910 SOUND CARDS THAT HAVE BEEN
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; PRODUCED FOR THE RCBUS. THE ONE PRODUCED BY ED BRINDLEY (EB) USES
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; THE SAME PORT FOR REGISTER SELECT (RSEL) AND REGISTER IN (RIN).
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; THE ONE PRODUCED BY MARTEN FELDTMANN (MF) USES THE PORT FOLLOWING
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; REGISTER SELECT (RSEL) FOR THE REGISTER IN (RIN) PORT. THE FOLLOWING
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; EQUATE MUST BE SET CORRECTLY FOR THE HARDWARE BEING USED. THIS
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; HAS NOT BEEN MOVED TO A CONFIG VARIABLE BECAUSE THE MF MODULE IS
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; RARELY ENCOUNTERED IN THE WILD.
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;
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AY_RCSND .EQU 0 ; 0 = EB MODULE, 1=MF MODULE
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;
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DEVECHO "AY38910: MODE="
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@@ -894,11 +894,11 @@ FD_DETECT:
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IN A,(FDC_MSR) ; ... AND REREAD THE STATUS
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;CALL PC_SPACE ; *DEBUG*
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;CALL PRTHEXBYTE ; *DEBUG*
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;
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FD_DETECT1:
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CP $80 ; WE EXPECT $80
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RET Z ; IF SO, ALL DONE
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JR Z,FD_DETECT2 ; IF SO, CONTINUE CHECKING
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;
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; WE HAVE SEEN AN FDC THAT NEEDS A SECOND READ TO GET
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; DESIRED VALUE, SO TRY ONE MORE TIME
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CALL DLY32 ; WAIT A BIT
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@@ -906,7 +906,19 @@ FD_DETECT1:
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;CALL PC_SPACE ; *DEBUG*
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;CALL PRTHEXBYTE ; *DEBUG*
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CP $80 ; CHECK FOR CORRECT VALUE
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RET ; RETURN WITH ZF ACCORDING TO RESULT
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RET NZ ; RETURN IF FAILED WITH ZF RESET
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;
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FD_DETECT2:
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; AS A FINAL TEST, WE REREAD THE MSR USING A DIFFERENT
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; OPCODE. THIS SHOULD ELIMINATE ANY FALSE POSITIVES FROM
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; A FLOATING BUS.
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CALL DLY32 ; WAIT A BIT
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LD C,FDC_MSR ; POINT TO MSR PORT
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IN A,(C) ; READ USING (C) FORM OF INPUT
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;CALL PC_SPACE ; *DEBUG*
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;CALL PRTHEXBYTE ; *DEBUG*
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CP $80 ; CHECK FOR CORRECT VALUE
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RET ; RETURN WITH ZF SET CORRECTLY
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;
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; UNIT INITIALIZATION
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;
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@@ -2415,8 +2415,8 @@ ra_ent .equ 12
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;
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; Note: The loadable ROM images are placed in ROM banks BID_IMG0 and
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; BID_IMG1. However, RomWBW supports a mechanism to load a complete
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; new system dynamically as a runnable application (see appboot and
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; imgboot in hbios.asm). In this case, the contents of BID_IMG0 will
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; new system dynamically as a runnable application (see appboot
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; in hbios.asm). In this case, the contents of BID_IMG0 will
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; be pre-loaded into the currently executing ram bank thereby allowing
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; those images to be dynamically loaded as well. To support this
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; concept, a pseudo-bank called bid_cur is used to specify the images
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@@ -2436,14 +2436,13 @@ ra_entsiz .equ $ - ra_tbl
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ra_ent(str_smon, 'S', $FF, bid_cur , $8000, $8000, $0001, s100mon)
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#endif
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#endif
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ra_ent(str_zsys, 'Z', KY_FW, BID_IMG0, ZSYS_IMGLOC, CPM_LOC, CPM_SIZ, CPM_ENT)
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ra_ent(str_cpm22, 'C', KY_BK, BID_IMG0, CPM_IMGLOC, CPM_LOC, CPM_SIZ, CPM_ENT)
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ra_ent(str_zsys, 'Z', KY_FW, BID_IMG0, ZSYS_IMGLOC, CPM_LOC, CPM_SIZ, CPM_ENT)
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#if (BIOS == BIOS_WBW)
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ra_ent(str_fth, 'F', KY_EX, BID_IMG1, FTH_IMGLOC, FTH_LOC, FTH_SIZ, FTH_LOC)
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ra_ent(str_bas, 'B', KY_DE, BID_IMG1, BAS_IMGLOC, BAS_LOC, BAS_SIZ, BAS_LOC)
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ra_ent(str_tbas, 'T', KY_EN, BID_IMG1, TBC_IMGLOC, TBC_LOC, TBC_SIZ, TBC_LOC)
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ra_ent(str_fth, 'F', KY_EX, BID_IMG1, FTH_IMGLOC, FTH_LOC, FTH_SIZ, FTH_LOC)
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ra_ent(str_play, 'P', $FF, BID_IMG1, GAM_IMGLOC, GAM_LOC, GAM_SIZ, GAM_LOC)
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ra_ent(str_egg, 'E'+$80, $FF, BID_IMG1, EGG_IMGLOC, EGG_LOC, EGG_SIZ, EGG_LOC)
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ra_ent(str_net, 'N', $FF, BID_IMG1, NET_IMGLOC, NET_LOC, NET_SIZ, NET_LOC)
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ra_ent(str_upd, 'X', $FF, BID_IMG1, UPD_IMGLOC, UPD_LOC, UPD_SIZ, UPD_LOC)
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ra_ent(str_user, 'U', $FF, BID_IMG1, USR_IMGLOC, USR_LOC, USR_SIZ, USR_LOC)
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@@ -2451,6 +2450,7 @@ ra_ent(str_user, 'U', $FF, BID_IMG1, USR_IMGLOC, USR_LOC, USR_SIZ, USR_LO
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#if (DSKYENABLE)
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ra_ent(str_dsky, 'Y'+$80, KY_GO, BID_IMG0, MON_IMGLOC, MON_LOC, MON_SIZ, MON_DSKY)
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#endif
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ra_ent(str_egg, 'E'+$80, $FF, BID_IMG1, EGG_IMGLOC, EGG_LOC, EGG_SIZ, EGG_LOC)
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.dw 0 ; table terminator
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;
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ra_tbl_app:
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@@ -66,8 +66,8 @@ TMS_CMDREG .EQU $BF ; READ STATUS / WRITE REG SEL
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#IF (TMSMODE == TMSMODE_MSXKBD)
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TMS_DATREG .EQU $98 ; READ/WRITE DATA
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TMS_CMDREG .EQU $99 ; READ STATUS / WRITE REG SEL
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TMS_KBDDATA .EQU $E0 ; KBD CTLR DATA PORT
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TMS_KBDST .EQU $E1 ; KBD CTLR STATUS/CMD PORT
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TMS_KBDDATA .EQU $60 ; KBD CTLR DATA PORT
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TMS_KBDST .EQU $64 ; KBD CTLR STATUS/CMD PORT
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DEVECHO "MSXKBD"
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#ENDIF
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;
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@@ -21,6 +21,13 @@
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; HBIOS WARM RESET FUNCTION AS DEMONSTRATED BELOW.
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; - THE APPLICATION MAY MAKE HBIOS FUNCTION CALLS WITHOUT RESTRICTION,
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; BUT CANNOT USE ANY OS (CP/M) FUNCTIONS BECAUSE NO OS IS LOADED.
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; - THE APPLICATION MAY NOT CHANGE THE INTERRUPT MODE (WHICH IS DEFINED
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; IN THE ROM CONFIGURATION). THE SYSTEM'S INTERRUPT
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; MODE CAN BE QUERIED BY AN HBIOS API CALL IF DESIRED.
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; - THE APPLICATION MAY TEMPORARILY DISABLE INTERRUPTS BY BRACKETING
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; SECTIONS OF CODE WITH DI/EI AS NEEDED. IF INTERRUPTS ARE
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; TEMPORARILY DISABLED, THEY SHOULD NOT SHOULD NOT
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; BE LEFT DISABLED ACROSS HBIOS API CALLS.
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;
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; INCLUDE STD.ASM WHICH DEFINES SOME KEY EQUATES USED BELOW. MOST
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; IMPORTANT ARE USR_LOC, USR_SIZ, AND USR_END. IT ALSO DEFINES EQUATES
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@@ -33,8 +40,8 @@
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CR .EQU 0DH
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LF .EQU 0AH
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;
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ROWS .EQU 008H ; NUMBER OF PIXEL ROWS PER CHARACTER
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COLS .EQU 008H ; NUMBER OF PIXEL COLUMNS PER CHARACTER
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ROWS .EQU 8 ; NUMBER OF PIXEL ROWS PER CHARACTER
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COLS .EQU 8 ; NUMBER OF PIXEL COLUMNS PER CHARACTER
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;
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; APPLICATION WILL WILL BE LOADED AT USR_LOC. THEREFORE, THE CODE
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; MUST "ORG" AT THIS ADDRESS. TO CHANGE THE LOAD LOCATION OF THIS
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@@ -145,10 +152,10 @@ CIN: PUSH BC
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; DATA SECTION
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;
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BANNER:
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.DB 006H; THE NUMBER OF CHARACTERS IN THE BANNER
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.DB 6 ; THE NUMBER OF CHARACTERS IN THE BANNER
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;
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#IF FALSE
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; UPPER CASE LOGO
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; UPPER CASE LOGO ("ROMWBW")
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.DB %01111100, %00011100, %01000001, %01000001, %01111100, %01000001
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.DB %01000010, %00100010, %01100011, %01000001, %01000010, %01000001
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.DB %01000001, %01000001, %01010101, %01000001, %01000001, %01000001
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@@ -160,7 +167,7 @@ BANNER:
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#ENDIF
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;
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#IF TRUE
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; UPPER AND LOWER CASE LOGO
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; UPPER AND LOWER CASE LOGO ("RomWBW")
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.DB %00000000, %00000000, %00000000, %00000000, %00000000, %00000000
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.DB %01111000, %00000000, %00000000, %01000100, %01111000, %01000100
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.DB %01000100, %00000000, %00000000, %01000100, %01000100, %01000100
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