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HBIOS Cleaning 

- Rearranged HBIOS code to improve colocation of related code.
- Implemented macros to improve control over assembly diagnostic output.
- Improved handling of diagnostic LEDs.
- Improved application boot bank management.
- Implemented application boot for Z280 systems.
- Moved Z280_BNKSEL into proxy.
-
pull/396/head v3.5.0-dev.34
Wayne Warthen 2 years ago
parent
c8794d2b9c
commit
3f63c92fd5
87 changed files with 2216 additions and 1830 deletions
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  1. 8
      Source/CBIOS/cbios.asm
  2. 8
      Source/CPM3/boot.z80
  3. 33
      Source/HBIOS/Bank Layout.txt
  4. 1
      Source/HBIOS/Build.cmd
  5. 9
      Source/HBIOS/Config/DUO_std.asm
  6. 1
      Source/HBIOS/Config/SCZ180_sc700.asm
  7. 16
      Source/HBIOS/acia.asm
  8. 32
      Source/HBIOS/asci.asm
  9. 30
      Source/HBIOS/ay38910.asm
  10. 6
      Source/HBIOS/bqrtc.asm
  11. 4
      Source/HBIOS/cfg_duo.asm
  12. 2
      Source/HBIOS/cfg_dyno.asm
  13. 2
      Source/HBIOS/cfg_epitx.asm
  14. 2
      Source/HBIOS/cfg_heath.asm
  15. 2
      Source/HBIOS/cfg_master.asm
  16. 2
      Source/HBIOS/cfg_mbc.asm
  17. 2
      Source/HBIOS/cfg_mk4.asm
  18. 2
      Source/HBIOS/cfg_mon.asm
  19. 2
      Source/HBIOS/cfg_n8.asm
  20. 2
      Source/HBIOS/cfg_nabu.asm
  21. 2
      Source/HBIOS/cfg_rcz180.asm
  22. 2
      Source/HBIOS/cfg_rcz280.asm
  23. 2
      Source/HBIOS/cfg_rcz80.asm
  24. 2
      Source/HBIOS/cfg_rph.asm
  25. 2
      Source/HBIOS/cfg_s100.asm
  26. 2
      Source/HBIOS/cfg_sbc.asm
  27. 2
      Source/HBIOS/cfg_scz180.asm
  28. 2
      Source/HBIOS/cfg_z80retro.asm
  29. 2
      Source/HBIOS/cfg_zeta.asm
  30. 2
      Source/HBIOS/cfg_zeta2.asm
  31. 12
      Source/HBIOS/ch.asm
  32. 12
      Source/HBIOS/chsd.asm
  33. 12
      Source/HBIOS/chusb.asm
  34. 38
      Source/HBIOS/ctc.asm
  35. 18
      Source/HBIOS/cvdu.asm
  36. 14
      Source/HBIOS/dma.asm
  37. 10
      Source/HBIOS/ds1501rtc.asm
  38. 2
      Source/HBIOS/ds7rtc.asm
  39. 60
      Source/HBIOS/dsrtc.asm
  40. 24
      Source/HBIOS/duart.asm
  41. 4
      Source/HBIOS/ef.asm
  42. 12
      Source/HBIOS/esp.asm
  43. 52
      Source/HBIOS/fd.asm
  44. 18
      Source/HBIOS/gdc.asm
  45. 5
      Source/HBIOS/h8p.asm
  46. 2675
      Source/HBIOS/hbios.asm
  47. 10
      Source/HBIOS/hdsk.asm
  48. 4
      Source/HBIOS/icm.asm
  49. 120
      Source/HBIOS/ide.asm
  50. 24
      Source/HBIOS/imm.asm
  51. 2
      Source/HBIOS/intrtc.asm
  52. 2
      Source/HBIOS/kbd.asm
  53. 4
      Source/HBIOS/kio.asm
  54. 24
      Source/HBIOS/lpt.asm
  55. 4
      Source/HBIOS/md.asm
  56. 5
      Source/HBIOS/mky.asm
  57. 5
      Source/HBIOS/nabu.asm
  58. 4
      Source/HBIOS/nabukb.asm
  59. 6
      Source/HBIOS/pcf.asm
  60. 24
      Source/HBIOS/pio.asm
  61. 6
      Source/HBIOS/pkd.asm
  62. 24
      Source/HBIOS/ppa.asm
  63. 48
      Source/HBIOS/ppide.asm
  64. 2
      Source/HBIOS/ppk.asm
  65. 10
      Source/HBIOS/ppp.asm
  66. 10
      Source/HBIOS/prp.asm
  67. 24
      Source/HBIOS/rf.asm
  68. 45
      Source/HBIOS/romldr.asm
  69. 6
      Source/HBIOS/rp5rtc.asm
  70. 6
      Source/HBIOS/scon.asm
  71. 35
      Source/HBIOS/sd.asm
  72. 6
      Source/HBIOS/simrtc.asm
  73. 88
      Source/HBIOS/sio.asm
  74. 22
      Source/HBIOS/sn76489.asm
  75. 6
      Source/HBIOS/spk.asm
  76. 120
      Source/HBIOS/std.asm
  77. 24
      Source/HBIOS/syq.asm
  78. 30
      Source/HBIOS/tms.asm
  79. 82
      Source/HBIOS/uart.asm
  80. 6
      Source/HBIOS/uf.asm
  81. 10
      Source/HBIOS/vdu.asm
  82. 14
      Source/HBIOS/vga.asm
  83. 12
      Source/HBIOS/vrc.asm
  84. 6
      Source/HBIOS/ym2612.asm
  85. 8
      Source/HBIOS/z2u.asm
  86. 2
      Source/ver.inc
  87. 2
      Source/ver.lib

8
Source/CBIOS/cbios.asm
View File

@ -2266,13 +2266,7 @@ INIT:
RST 08 ; DO IT, DE=MAJ/MIN/UP/PAT
LD A,D ; A := MAJ/MIN
CP ((RMJ << 4) | RMN) ; MATCH?
JR NZ,INIT1 ; HANDLE VER MISMATCH
LD A,E ; A := OS UP/PAT
AND $F0 ; PAT NOT INCLUDED IN MATCH
CP (RUP << 4) ; MATCH?
JR NZ,INIT1 ; HANDLE VER MISMATCH
JR INIT2 ; ALL GOOD, CONTINUE
INIT1:
JR Z,INIT2 ; ALL GOOD, CONTINUE
; DISPLAY VERSION MISMATCH
CALL NEWLINE2 ; FORMATTING
LD DE,STR_VERMIS ; VERSION MISMATCH

8
Source/CPM3/boot.z80
View File

@ -96,13 +96,7 @@ init$2:
rst 08 ; do it, de=maj/min/up/pat
ld a,d ; a := maj/min
cp ((rmj << 4) | rmn) ; match?
jr nz,init$3 ; handle ver mismatch
ld a,e ; a := os up/pat
and 0F0h ; pat not included in match
cp (rup << 4) ; match?
jr nz,init$3 ; handle ver mismatch
jr init$4 ; all good, continue
init$3:
jr z,init$4 ; all good, continue
; display version mismatch
ld hl,vermis$msg ; version mismatch
call ?pmsg ; display it

33
Source/HBIOS/Bank Layout.txt
View File

@ -27,7 +27,7 @@ Bank ID Module Start Size
0x04 - N ROM Disk Data
Typical ROM Bank Layout
Typical ROM Bank Layout (512K)
Bank ID Usage
------- ------
@ -35,22 +35,43 @@ Bank ID Usage
0x01 ROM Loader, Monitor, ROM OSes
0x02 ROM Applications
0x03 Reserved
0x04-0x0F ROM Disk Banks
0x04-0x0F ROM Disk Banks (12)
Typical RAM Bank Layout
Standard RAM Bank Layout (512K)
Bank ID Usage
------- ------
0x80 RomWBW HBIOS
0x81-0x8B RAM Disk Data
0x81-0x88 RAM Disk Data (3)
0x89-0x8B App Banks (8)
0x8C CP/M 3 Buffers
0x8D CP/M 3 OS
0x8E User TPA
0x8F Common
Large RAM Bank Layout (2048K)
Typical ROMless Bank Layout
Bank ID Usage
------- ------
0x80 RomWBW HBIOS
0x81-0xB0 RAM Disk Data (30)
0xB1-0xBB App Banks (11)
0xBC CP/M 3 Buffers
0x8D CP/M 3 OS
0x8E User TPA
0x8F Common
Tiny RAM Bank Layout (128K)
Bank ID Usage
------- ------
0x80 RomWBW HBIOS
0x81 CP/M 3 OS
0x82 User TPA
0x83 Common
ROMless Standard Bank Layout (512K)
Bank ID Usage
------- ------
@ -58,7 +79,7 @@ Bank ID Usage
0x81 Loader, DbgMon, CP/M 2.2, ZSDOS
0x82 ROM Apps
0x83 More ROM Apps
0x84-0x8B RAM Disk Data
0x84-0x8B RAM Disk Data (8)
0x8C CP/M 3 Buffers
0x8D CP/M 3 OS
0x8E User TPA

1
Source/HBIOS/Build.cmd
View File

@ -50,6 +50,7 @@ echo.
::
tasm -t80 -g3 -dCMD hbios_env.asm hbios_env.com hbios_env.lst || exit /b
zxcc hbios_env
zxcc hbios_env >hbios_env.cmd
call hbios_env.cmd

9
Source/HBIOS/Config/DUO_std.asm
View File

@ -31,18 +31,21 @@ CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
;;;DMAENABLE .SET TRUE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMAENABLE .SET TRUE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
;
BATCOND .SET TRUE ; ENABLE LOW BATTERY WARNING MESSAGE
;
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
;
PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER
PCFENABLE .SET TRUE ; ENABLE PCF8584 I2C CONTROLLER
;
MDFFENABLE .SET FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
;
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
CHENABLE .SET TRUE ; CH: ENABLE CH375/376 USB SUPPORT
ESPENABLE .SET TRUE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
;
ESPENABLE .SET FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)

1
Source/HBIOS/Config/SCZ180_sc700.asm
View File

@ -36,6 +36,7 @@ Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
LEDMODE .SET LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .SET $0E ; STATUS LED PORT ADDRESS
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS

16
Source/HBIOS/acia.asm
View File

@ -705,12 +705,12 @@ ACIA0_CFG:
.DW (ACIA0CLK / ACIA0DIV) & $FFFF ; CLOCK FREQ AS
.DW (ACIA0CLK / ACIA0DIV) >> 16 ; ... DWORD VALUE
;
.ECHO "ACIA: IO="
.ECHO ACIA0BASE
DEVECHO "ACIA: IO="
DEVECHO ACIA0BASE
#IF (INTMODE == 1)
.ECHO ", INTERRUPTS ENABLED"
DEVECHO ", INTERRUPTS ENABLED"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
;
ACIA_CFGSIZ .EQU $ - ACIA_CFG ; SIZE OF ONE CFG TABLE ENTRY
;
@ -728,12 +728,12 @@ ACIA1_CFG:
.DW (ACIA1CLK / ACIA1DIV) & $FFFF ; CLOCK FREQ AS
.DW (ACIA1CLK / ACIA1DIV) >> 16 ; ... DWORD VALUE
;
.ECHO "ACIA: IO="
.ECHO ACIA1BASE
DEVECHO "ACIA: IO="
DEVECHO ACIA1BASE
#IF (INTMODE == 1)
.ECHO ", INTERRUPTS ENABLED"
DEVECHO ", INTERRUPTS ENABLED"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
;
#ENDIF
;

32
Source/HBIOS/asci.asm
View File

@ -837,12 +837,12 @@ ASCI1_CFG:
.DW ASCI1CFG ; LINE CONFIGURATION
.DW ASCI1_RCVBUF ; POINTER TO RCV BUFFER STRUCT
;
.ECHO "ASCI: IO="
.ECHO ASCI1_BASE
DEVECHO "ASCI: IO="
DEVECHO ASCI1_BASE
#IF ((ASCIINTS) & (INTMODE >0))
.ECHO ", INTERRUPTS ENABLED"
DEVECHO ", INTERRUPTS ENABLED"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
;
ASCI_CFGSIZ .EQU $ - ASCI_CFG ; SIZE OF ONE CFG TABLE ENTRY
;
@ -855,12 +855,12 @@ ASCI0_CFG:
.DW ASCI0CFG ; LINE CONFIGURATION
.DW ASCI0_RCVBUF ; POINTER TO RCV BUFFER STRUCT
;
.ECHO "ASCI: IO="
.ECHO ASCI0_BASE
DEVECHO "ASCI: IO="
DEVECHO ASCI0_BASE
#IF ((ASCIINTS) & (INTMODE >0))
.ECHO ", INTERRUPTS ENABLED"
DEVECHO ", INTERRUPTS ENABLED"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
;
#ELSE
;
@ -873,12 +873,12 @@ ASCI0_CFG:
.DW ASCI0CFG ; LINE CONFIGURATION
.DW ASCI0_RCVBUF ; POINTER TO RCV BUFFER STRUCT
;
.ECHO "ASCI: IO="
.ECHO ASCI0_BASE
DEVECHO "ASCI: IO="
DEVECHO ASCI0_BASE
#IF ((ASCIINTS) & (INTMODE >0))
.ECHO ", INTERRUPTS ENABLED"
DEVECHO ", INTERRUPTS ENABLED"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
;
ASCI_CFGSIZ .EQU $ - ASCI_CFG ; SIZE OF ONE CFG TABLE ENTRY
;
@ -891,12 +891,12 @@ ASCI1_CFG:
.DW ASCI1CFG ; LINE CONFIGURATION
.DW ASCI1_RCVBUF ; POINTER TO RCV BUFFER STRUCT
;
.ECHO "ASCI: IO="
.ECHO ASCI1_BASE
DEVECHO "ASCI: IO="
DEVECHO ASCI1_BASE
#IF ((ASCIINTS) & (INTMODE > 0))
.ECHO ", INTERRUPTS ENABLED"
DEVECHO ", INTERRUPTS ENABLED"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
;
#ENDIF
;

30
Source/HBIOS/ay38910.asm
View File

@ -21,14 +21,14 @@
;
AY_RCSND .EQU 0 ; 0 = EB MODULE, 1=MF MODULE
;
.ECHO "AY38910: MODE="
DEVECHO "AY38910: MODE="
;
#IF (AYMODE == AYMODE_SCG)
AY_RSEL .EQU $9A
AY_RDAT .EQU $9B
AY_RIN .EQU AY_RSEL
AY_ACR .EQU $9C
.ECHO "SCG"
DEVECHO "SCG"
#ENDIF
;
#IF (AYMODE == AYMODE_N8)
@ -36,35 +36,35 @@ AY_RSEL .EQU $9C
AY_RDAT .EQU $9D
AY_RIN .EQU AY_RSEL
AY_ACR .EQU N8_ACR
.ECHO "N8"
DEVECHO "N8"
#ENDIF
;
#IF (AYMODE == AYMODE_RCZ80)
AY_RSEL .EQU $D8
AY_RDAT .EQU $D0
AY_RIN .EQU AY_RSEL+AY_RCSND
.ECHO "RCZ80"
DEVECHO "RCZ80"
#ENDIF
;
#IF (AYMODE == AYMODE_RCZ180)
AY_RSEL .EQU $68
AY_RDAT .EQU $60
AY_RIN .EQU AY_RSEL+AY_RCSND
.ECHO "RCZ180"
DEVECHO "RCZ180"
#ENDIF
;
#IF (AYMODE == AYMODE_MSX)
AY_RSEL .EQU $A0
AY_RDAT .EQU $A1
AY_RIN .EQU $A2
.ECHO "MSX"
DEVECHO "MSX"
#ENDIF
;
#IF (AYMODE == AYMODE_LINC)
AY_RSEL .EQU $33
AY_RDAT .EQU $32
AY_RIN .EQU $32
.ECHO "LINC"
DEVECHO "LINC"
#ENDIF
;
#IF (AYMODE == AYMODE_MBC)
@ -72,7 +72,7 @@ AY_RSEL .EQU $A0
AY_RDAT .EQU $A1
AY_RIN .EQU AY_RSEL
AY_ACR .EQU $A2
.ECHO "MBC"
DEVECHO "MBC"
#ENDIF
;
#IF (AYMODE == AYMODE_DUO)
@ -80,21 +80,21 @@ AY_RSEL .EQU $A4
AY_RDAT .EQU $A5
AY_RIN .EQU AY_RSEL
AY_ACR .EQU $A6
.ECHO "DUO"
DEVECHO "DUO"
#ENDIF
;
#IF (AYMODE == AYMODE_NABU)
AY_RSEL .EQU $41
AY_RDAT .EQU $40
AY_RIN .EQU $40
.ECHO "NABU"
DEVECHO "NABU"
#ENDIF
;
.ECHO ", IO="
.ECHO AY_RSEL
.ECHO ", CLOCK="
.ECHO AY_CLK
.ECHO " HZ\n"
DEVECHO ", IO="
DEVECHO AY_RSEL
DEVECHO ", CLOCK="
DEVECHO AY_CLK
DEVECHO " HZ\n"
;
;======================================================================
;

6
Source/HBIOS/bqrtc.asm
View File

@ -91,9 +91,9 @@ BQRTC_UTI .EQU %00001000
BQRTC_BUFSIZE .EQU 6 ; 6 BYTE BUFFER (YYMMDDHHMMSS)
.ECHO "BQRTC: IO="
.ECHO BQRTC_BASE
.ECHO "\n"
DEVECHO "BQRTC: IO="
DEVECHO BQRTC_BASE
DEVECHO "\n"
; RTC Device Initialization Entry

4
Source/HBIOS/cfg_duo.asm
View File

@ -78,7 +78,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU TRUE ; ENABLES STATUS LED
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
@ -306,7 +306,7 @@ PIOSBASE .EQU $60 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
UFBASE .EQU $0C ; UF: REGISTERS BASE ADR
;
SN76489ENABLE .EQU TRUE ; SN: ENABLE SN76489 SOUND DRIVER
SN76489ENABLE .EQU FALSE ; SN: ENABLE SN76489 SOUND DRIVER
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN7CLK .EQU 3579545 ; SN: PSG CLOCK FREQ, ASSUME MSX STD
SNMODE .EQU SNMODE_DUO ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]

2
Source/HBIOS/cfg_dyno.asm
View File

@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_epitx.asm
View File

@ -81,7 +81,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_heath.asm
View File

@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_SC ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_master.asm
View File

@ -109,7 +109,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_mbc.asm
View File

@ -75,7 +75,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU TRUE ; ENABLES STATUS LED
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_mk4.asm
View File

@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_mon.asm
View File

@ -75,7 +75,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_n8.asm
View File

@ -82,7 +82,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_nabu.asm
View File

@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU TRUE ; ENABLES STATUS LED (SINGLE LED)
LEDMODE .EQU LEDMODE_NABU ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_NABU ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU $00 ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_rcz180.asm
View File

@ -86,7 +86,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_rcz280.asm
View File

@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_rcz80.asm
View File

@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_rph.asm
View File

@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_s100.asm
View File

@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU TRUE ; ENABLES STATUS LED (SINGLE LED)
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_SC ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_sbc.asm
View File

@ -75,7 +75,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_scz180.asm
View File

@ -80,7 +80,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_SC ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_z80retro.asm
View File

@ -78,7 +78,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU $00 ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_zeta.asm
View File

@ -67,7 +67,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

2
Source/HBIOS/cfg_zeta2.asm
View File

@ -78,7 +78,7 @@ FPSW_INV .EQU FALSE ; FP: SWITCH BITS ARE INVERTED
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED
LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC|NABU]
LEDMODE .EQU LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;

12
Source/HBIOS/ch.asm
View File

@ -105,9 +105,9 @@ CH_CFG0: ; DEVICE 0
.DB CH0SDENABLE ; ENABLE SD CARD SUB-DRIVER
.DW CHSD_CFG0 ; SD CARD SUB-DRIVER INIT ADR
;
.ECHO "CH: IO="
.ECHO CH0BASE
.ECHO "\n"
DEVECHO "CH: IO="
DEVECHO CH0BASE
DEVECHO "\n"
#ENDIF
;
#IF (CHCNT >= 2)
@ -120,9 +120,9 @@ CH_CFG1: ; DEVICE 1
.DB CH1SDENABLE ; ENABLE SD CARD SUB-DRIVER
.DW CHSD_CFG1 ; SD CARD SUB-DRIVER INIT ADR
;
.ECHO "CH: IO="
.ECHO CH1BASE
.ECHO "\n"
DEVECHO "CH: IO="
DEVECHO CH1BASE
DEVECHO "\n"
#ENDIF
;
#IF ($ - CH_CFGTBL) != (CHCNT * CH_CFGSIZ)

12
Source/HBIOS/chsd.asm
View File

@ -60,9 +60,9 @@ CHSD_CFG0:
.DW CH0_MODE ; POINTER TO MODE BYTE
;
#IF (CH0SDENABLE)
.ECHO "CHSD: IO="
.ECHO CH0BASE
.ECHO "\n"
DEVECHO "CHSD: IO="
DEVECHO CH0BASE
DEVECHO "\n"
#ENDIF
#ENDIF
;
@ -77,9 +77,9 @@ CHSD_CFG1:
.DW CH1_MODE ; POINTER TO MODE BYTE
;
#IF (CH1SDENABLE)
.ECHO "CHSD: IO="
.ECHO CH1BASE
.ECHO "\n"
DEVECHO "CHSD: IO="
DEVECHO CH1BASE
DEVECHO "\n"
#ENDIF
#ENDIF
;

12
Source/HBIOS/chusb.asm
View File

@ -65,9 +65,9 @@ CHUSB_CFG0:
.DW CH0_MODE ; POINTER TO MODE BYTE
;
#IF (CH0USBENABLE)
.ECHO "CHUSB: IO="
.ECHO CH0BASE
.ECHO "\n"
DEVECHO "CHUSB: IO="
DEVECHO CH0BASE
DEVECHO "\n"
#ENDIF
#ENDIF
;
@ -82,9 +82,9 @@ CHUSB_CFG1:
.DW CH1_MODE ; POINTER TO MODE BYTE
;
#IF (CH1USBENABLE)
.ECHO "CHUSB: IO="
.ECHO CH1BASE
.ECHO "\n"
DEVECHO "CHUSB: IO="
DEVECHO CH1BASE
DEVECHO "\n"
#ENDIF
#ENDIF
;

38
Source/HBIOS/ctc.asm
View File

@ -28,19 +28,19 @@ CTC_TIM256CFG .EQU %00110111 ; CTC TIMER/256 MODE CONFIG
#IF (CTCTIMER & (INTMODE != 2))
.ECHO "*** WARNING: CTC TIMER DISABLED -- INTMODE 2 REQUIRED!!!\n"
#ENDIF
.ECHO "CTC: IO="
.ECHO CTCBASE
DEVECHO "CTC: IO="
DEVECHO CTCBASE
;
#IF (CTCTIMER & (INTMODE == 2))
;
#IF (INT_CTC0A % 4)
.ECHO INT_CTC0A
.ECHO "\n"
.ECHO (INT_CTC0A % 4)
.ECHO "\n"
DEVECHO INT_CTC0A
DEVECHO "\n"
DEVECHO (INT_CTC0A % 4)
DEVECHO "\n"
.ECHO "*** ERROR: CTC BASE VECTOR NOT DWORD ALIGNED!!!\n"
DEVECHO "*** ERROR: CTC BASE VECTOR NOT DWORD ALIGNED!!!\n"
!!! ; FORCE AN ASSEMBLY ERROR
#ENDIF
;
@ -112,23 +112,23 @@ CTC_DIVHI .EQU CTCPRE
CTC_DIVLO .EQU (CTC_DIV / CTC_DIVHI)
;
.ECHO ", TIMER MODE="
DEVECHO ", TIMER MODE="
#IF (CTCMODE == CTCMODE_CTR)
.ECHO "COUNTER"
DEVECHO "COUNTER"
#ENDIF
#IF (CTCMODE == CTCMODE_TIM16)
.ECHO "TIMER/16"
DEVECHO "TIMER/16"
#ENDIF
#IF (CTCMODE == CTCMODE_TIM256)
.ECHO "TIMER/256"
DEVECHO "TIMER/256"
#ENDIF
.ECHO ", DIVISOR="
.ECHO CTC_DIV
.ECHO ", HI="
.ECHO CTC_DIVHI
.ECHO ", LO="
.ECHO CTC_DIVLO
.ECHO ", INTERRUPTS ENABLED"
DEVECHO ", DIVISOR="
DEVECHO CTC_DIV
DEVECHO ", HI="
DEVECHO CTC_DIVHI
DEVECHO ", LO="
DEVECHO CTC_DIVLO
DEVECHO ", INTERRUPTS ENABLED"
;
#IF ((CTC_DIV == 0) | (CTC_DIV > $FFFF))
.ECHO "COMPUTED CTC DIVISOR IS UNUSABLE!\n"
@ -148,7 +148,7 @@ CTCTIVT .EQU INT_CTC0A + CTCTIMCH
;
#ENDIF
;
.ECHO "\n"
DEVECHO "\n"
;
;==================================================================================================
; CTC PRE-INITIALIZATION

18
Source/HBIOS/cvdu.asm
View File

@ -18,7 +18,7 @@
;
CVDU_BASE .EQU $E0
;
.ECHO "CVDU: MODE="
DEVECHO "CVDU: MODE="
;
#IF (CVDUMODE == CVDUMODE_ECB)
CVDU_KBDDATA .EQU CVDU_BASE + $02 ; KBD CTLR DATA PORT
@ -26,7 +26,7 @@ CVDU_KBDST .EQU CVDU_BASE + $0A ; KBD CTLR STATUS/CMD PORT
CVDU_STAT .EQU CVDU_BASE + $04 ; READ M8563 STATUS
CVDU_REG .EQU CVDU_BASE + $04 ; SELECT M8563 REGISTER
CVDU_DATA .EQU CVDU_BASE + $0C ; READ/WRITE M8563 DATA
.ECHO "ECB"
DEVECHO "ECB"
#ENDIF
;
#IF (CVDUMODE == CVDUMODE_MBC)
@ -35,15 +35,15 @@ CVDU_KBDST .EQU CVDU_BASE + $03 ; KBD CTLR STATUS/CMD PORT
CVDU_STAT .EQU CVDU_BASE + $04 ; READ M8563 STATUS
CVDU_REG .EQU CVDU_BASE + $04 ; SELECT M8563 REGISTER
CVDU_DATA .EQU CVDU_BASE + $05 ; READ/WRITE M8563 DATA
.ECHO "MBC"
DEVECHO "MBC"
#ENDIF
;
.ECHO ", IO="
.ECHO CVDU_BASE
.ECHO ", KBD MODE=PS/2"
.ECHO ", KBD IO="
.ECHO CVDU_KBDDATA
.ECHO "\n"
DEVECHO ", IO="
DEVECHO CVDU_BASE
DEVECHO ", KBD MODE=PS/2"
DEVECHO ", KBD IO="
DEVECHO CVDU_KBDDATA
DEVECHO "\n"
;
CVDU_ROWS .EQU 25
CVDU_COLS .EQU 80

14
Source/HBIOS/dma.asm
View File

@ -3,17 +3,17 @@
;==================================================================================================
;
;
.ECHO "DMA: MODE="
DEVECHO "DMA: MODE="
;
#IF ((DMAMODE == DMAMODE_ECB) | (DMAMODE == DMAMODE_MBC))
DMA_IO .EQU DMABASE
DMA_CTL .EQU DMABASE + 1
DMA_USEHALF .EQU TRUE
#IF (DMAMODE == DMAMODE_ECB)
.ECHO "ECB"
DEVECHO "ECB"
#ENDIF
#IF (DMAMODE == DMAMODE_MBC)
.ECHO "MBC"
DEVECHO "MBC"
#ENDIF
#ENDIF
;
@ -21,12 +21,12 @@ DMA_USEHALF .EQU TRUE
DMA_IO .EQU DMABASE
DMA_CTL .EQU DMABASE + 3
DMA_USEHALF .EQU FALSE
.ECHO "DUO"
DEVECHO "DUO"
#ENDIF
;S
.ECHO ", IO="
.ECHO DMA_IO
.ECHO "\n"
DEVECHO ", IO="
DEVECHO DMA_IO
DEVECHO "\n"
;
DMA_CONTINUOUS .equ %10111101 ; + Pulse
DMA_BYTE .equ %10011101 ; + Pulse

10
Source/HBIOS/ds1501rtc.asm
View File

@ -111,11 +111,11 @@ DS1501RTC_TE .EQU %10000000
;
DS1501RTC_BUFSIZE .EQU 6 ; 6 BYTE BUFFER (YYMMDDHHMMSS)
.ECHO "DS1501RTC: RTCIO="
.ECHO DS1501RTC_BASE
.ECHO ", NVMIO="
.ECHO DS1501NVM_BASE
.ECHO "\n"
DEVECHO "DS1501RTC: RTCIO="
DEVECHO DS1501RTC_BASE
DEVECHO ", NVMIO="
DEVECHO DS1501NVM_BASE
DEVECHO "\n"
;
; RTC Device Initialization Entry
;

2
Source/HBIOS/ds7rtc.asm
View File

@ -23,7 +23,7 @@ DS7_WRITE .EQU (DS7_DS1307 | DS7_W) ; WRITE
;
DS7_CTL .EQU (DS7_OUT | DS7_SQWE | DS7_RATE)
;
.ECHO "DS1307: ENABLED\n"
DEVECHO "DS1307: ENABLED\n"
;
;-----------------------------------------------------------------------------
; DS1307 INITIALIZATION

60
Source/HBIOS/dsrtc.asm
View File

@ -66,30 +66,30 @@
; RTC LATCH WRITE
; ---------------
;
; BIT SBC RCBUS SBC-004 MFPIC K80W N8 N8-CSIO MK4 SC130 SC131 SC126 MBC RPH
; ----- ------- ------- ------- ------- ------- ------- ------- ------- ------- ------- --------------- ------- -------
; D7 RTC_OUT RTC_OUT RTC_OUT -- -- RTC_OUT RTC_OUT RTC_OUT -- -- RTC_OUT,I2C_SDA RTC_OUT RTC_OUT
; D6 RTC_CLK RTC_CLK RTC_CLK -- -- RTC_CLK RTC_CLK RTC_CLK -- -- RTC_CLK RTC_CLK RTC_CLK
; D5 /RTC_WE /RTC_WE /RTC_WE -- -- /RTC_WE /RTC_WE /RTC_WE -- -- /RTC_WE /RTC_WE /RTC_WE
; D4 RTC_CE RTC_CE RTC_CE -- -- RTC_CE RTC_CE RTC_CE -- -- RTC_CE RTC_CE RTC_CE
; D3 NC NC CLKSEL /RTC_CE /RTC_CE NC NC NC -- -- /SPI_CS2 CLKSEL --
; D2 NC NC SPK RTC_CLK RTC_CLK SPI_CS SPI_CS NC /SPI_CS1/SPI_CS1/SPI_CS1 SPK --
; D1 -- -- -- RTC_WE RTC_WE SPI_CLK NC NC -- -- FS LED1 --
; D0 -- -- -- RTC_OUT RTC_OUT SPI_DI NC NC -- -- I2C_SCL LED0 --
;
; RTC LATCH READTCH READ
; ----------------------
;
; D7 -- -- -- -- -- -- -- -- -- -- I2C_SDA -- --
; D6 CFG -- CFG -- -- SPI_DO CFG -- -- -- -- CFG --
; D5 -- -- -- -- -- -- -- -- -- -- -- -- --
; D4 -- -- -- -- -- -- -- -- -- -- -- -- --
; D3 -- -- -- -- -- -- -- -- -- -- -- -- --
; D2 -- -- -- -- -- -- -- -- -- -- -- -- --
; D1 -- -- -- -- -- -- -- -- -- -- -- CLKSEL --
; D0 RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN -- -- RTC_IN RTC_IN RTC_IN
;
.ECHO "DSRTC: MODE="
; BIT SBC RCBUS SBC-004 MFPIC K80W N8 N8-CSIO MK4 SC126 SC130 SC131 SC140 SC503 SC722 MBC RPH
; ----- ------- ------- ------- ------- ------- ------- ------- ------- --------------- ------- ------- ------- ------- ------- ------- -------
; D7 RTC_OUT RTC_OUT RTC_OUT -- -- RTC_OUT RTC_OUT RTC_OUT RTC_OUT,I2C_SDA -- -- -- -- -- RTC_OUT RTC_OUT
; D6 RTC_CLK RTC_CLK RTC_CLK -- -- RTC_CLK RTC_CLK RTC_CLK RTC_CLK -- -- -- -- -- RTC_CLK RTC_CLK
; D5 /RTC_WE /RTC_WE /RTC_WE -- -- /RTC_WE /RTC_WE /RTC_WE /RTC_WE -- -- -- -- -- /RTC_WE /RTC_WE
; D4 RTC_CE RTC_CE RTC_CE -- -- RTC_CE RTC_CE RTC_CE RTC_CE -- -- -- -- -- RTC_CE RTC_CE
; D3 NC NC CLKSEL /RTC_CE /RTC_CE NC NC NC /SPI_CS2 -- -- -- -- -- CLKSEL --
; D2 NC NC SPK RTC_CLK RTC_CLK SPI_CS SPI_CS NC /SPI_CS1 /SPI_CS1/SPI_CS1/SPI_CS1/SPI_CS1/SPI_CS1SPK --
; D1 -- -- -- RTC_WE RTC_WE SPI_CLK NC NC FS -- -- -- -- -- LED1 --
; D0 -- -- -- RTC_OUT RTC_OUT SPI_DI NC NC I2C_SCL -- -- -- -- -- LED0 --
;
; RTC LATCH LATCH READ
; --------------------
;
; D7 -- -- -- -- -- -- -- -- I2C_SDA -- -- -- -- -- -- --
; D6 CFG -- CFG -- -- SPI_DO CFG -- -- -- -- -- -- -- CFG --
; D5 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
; D4 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
; D3 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
; D2 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
; D1 -- -- -- -- -- -- -- -- -- -- -- -- -- -- CLKSEL --
; D0 RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN -- -- -- -- -- RTC_IN RTC_IN
;
DEVECHO "DSRTC: MODE="
;
#IF (DSRTCMODE == DSRTCMODE_STD)
;
@ -107,7 +107,7 @@ RTCDEF .SET RTCDEF | DSRTC_IDLE ; FOR HBIOS MAINLINE
;
#DEFINE DSRTC_OPRVAL HB_RTCVAL
;
.ECHO "STD"
DEVECHO "STD"
;
#ENDIF
;
@ -125,7 +125,7 @@ DSRTC_IDLE .EQU %00001000 ; QUIESCENT STATE
;
#DEFINE DSRTC_OPRVAL DSRTC_RTCVAL
;
.ECHO "MFPIC"
DEVECHO "MFPIC"
;
#ENDIF
;
@ -143,13 +143,13 @@ DSRTC_IDLE .EQU %00001000 ; QUIESCENT STATE
;
#DEFINE DSRTC_OPRVAL HB_RTCVAL
;
.ECHO "K80W"
DEVECHO "K80W"
;
#ENDIF
;
.ECHO ", IO="
.ECHO DSRTC_IO
.ECHO "\n"
DEVECHO ", IO="
DEVECHO DSRTC_IO
DEVECHO "\n"
;
; VALUES FOR DIFFERENT BATTERY OR SUPERCAPACITOR CHARGE RATES
;

24
Source/HBIOS/duart.asm
View File

@ -823,9 +823,9 @@ DUART0A_CFG:
.DW DUART0ACFG ; IY+8 LINE CONFIGURATION
.DB 1 ; IY+10 MULTIPLIER WRT 3.6864MHZ CLOCK
;
.ECHO "DUART: IO="
.ECHO DUART0BASE + $00
.ECHO ", CHANNEL A\n"
DEVECHO "DUART: IO="
DEVECHO DUART0BASE + $00
DEVECHO ", CHANNEL A\n"
;
DUART_CFGSIZ .EQU $ - DUART_CFG ; SIZE OF ONE CFG TABLE ENTRY
;
@ -840,9 +840,9 @@ DUART0B_CFG:
.DW DUART0BCFG ; LINE CONFIGURATION
.DB 1 ; MULTIPLIER WRT 3.6864MHZ CLOCK
;
.ECHO "DUART: IO="
.ECHO DUART0BASE + $08
.ECHO ", CHANNEL B\n"
DEVECHO "DUART: IO="
DEVECHO DUART0BASE + $08
DEVECHO ", CHANNEL B\n"
;
#IF (DUARTCNT >= 2)
;
@ -857,9 +857,9 @@ DUART1A_CFG:
.DW DUART1ACFG ; LINE CONFIGURATION
.DB 1 ; MULTIPLIER WRT 3.6864MHZ CLOCK
;
.ECHO "DUART: IO="
.ECHO DUART1BASE + $00
.ECHO ", CHANNEL A\n"
DEVECHO "DUART: IO="
DEVECHO DUART1BASE + $00
DEVECHO ", CHANNEL A\n"
;
DUART1B_CFG:
; 2ND DUART MODULE CHANNEL B
@ -872,9 +872,9 @@ DUART1B_CFG:
.DW DUART1BCFG ; LINE CONFIGURATION
.DB 1 ; MULTIPLIER WRT 3.6864MHZ CLOCK
;
.ECHO "DUART: IO="
.ECHO DUART1BASE + $08
.ECHO ", CHANNEL B\n"
DEVECHO "DUART: IO="
DEVECHO DUART1BASE + $08
DEVECHO ", CHANNEL B\n"
;
#ENDIF
;

4
Source/HBIOS/ef.asm
View File

@ -153,6 +153,10 @@ EF_FG_CYAN .EQU 6
EF_FG_WHITE .EQU 7
;
EF_SCREENSIZE .EQU EF_DROWS * EF_DLINES
;
DEVECHO "EF: IO="
DEVECHO EF_BASE
DEVECHO "\n"
;
;======================================================================
; VDU DRIVER - INITIALIZATION

12
Source/HBIOS/esp.asm
View File

@ -54,9 +54,9 @@ ESP_CFG_ST .EQU 2 ; ESP STATUS PORT
ESP_CFG_RDYMSK .EQU 3 ; ESP READY MASK
ESP_CFG_BSYMSK .EQU 4 ; ESP BUSY MASK
;
.ECHO "ESP: IO="
.ECHO ESP_IOBASE
.ECHO "\n"
DEVECHO "ESP: IO="
DEVECHO ESP_IOBASE
DEVECHO "\n"
;
; GLOBAL ESP INITIALIZATION
;
@ -348,7 +348,7 @@ ESP_STR_UPGRADE .TEXT "!!!UPGRADE REQUIRED!!!$"
ESPCON_ROWS .EQU 25 ; VGA DISPLAY ROWS
ESPCON_COLS .EQU 80 ; VGA DISPLAY COLS
;
.ECHO "ESPCON: ENABLED\n"
DEVECHO "ESPCON: ENABLED\n"
;
;
;
@ -692,7 +692,7 @@ ESPSER0_CFG:
.DB ESP_0_BUSY ; ESP BUSY BIT MASK
.DW ESPSER_LINECFG ; LINE CONFIGURATION
;
.ECHO "ESPSER: DEVICE=0\n"
DEVECHO "ESPSER: DEVICE=0\n"
;
ESPSER1_CFG:
.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
@ -702,7 +702,7 @@ ESPSER1_CFG:
.DB ESP_1_BUSY ; ESP BUSY BIT MASK
.DW ESPSER_LINECFG ; LINE CONFIGURATION
;
.ECHO "ESPSER: DEVICE=1\n"
DEVECHO "ESPSER: DEVICE=1\n"
;
;
;

52
Source/HBIOS/fd.asm
View File

@ -152,31 +152,31 @@ FD_CFGTBL:
.DB 0 ; HOST HEAD
.DB FD0TYPE ; DRIVE TYPE
;
.ECHO "FD: MODE="
.ECHO FDMODE_STR
.ECHO ", IO="
.ECHO FDC_MSR
.ECHO ", DRIVE 0"
.ECHO ", TYPE="
DEVECHO "FD: MODE="
DEVECHO FDMODE_STR
DEVECHO ", IO="
DEVECHO FDC_MSR
DEVECHO ", DRIVE 0"
DEVECHO ", TYPE="
#IF (FD0TYPE == FDT_NONE
.ECHO "NONE"
DEVECHO "NONE"
#ENDIF
#IF (FD0TYPE == FDT_3DD
.ECHO "3.5\" DD"
DEVECHO "3.5\" DD"
#ENDIF
#IF (FD0TYPE == FDT_3HD
.ECHO "3.5\" HD"
DEVECHO "3.5\" HD"
#ENDIF
#IF (FD0TYPE == FDT_5DD
.ECHO "5.25\" DD"
DEVECHO "5.25\" DD"
#ENDIF
#IF (FD0TYPE == FDT_5HD
.ECHO "5.25\" HD"
DEVECHO "5.25\" HD"
#ENDIF
#IF (FD0TYPE == FDT_8
.ECHO "8\" DD"
DEVECHO "8\" DD"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
;
#IF (FD_DEVCNT >= 2)
; DEVICE 1, PRIMARY SLAVE
@ -189,31 +189,31 @@ FD_CFGTBL:
.DB 0 ; HOST HEAD
.DB FD1TYPE ; DRIVE TYPE
;
.ECHO "FD: MODE="
.ECHO FDMODE_STR
.ECHO ", IO="
.ECHO FDC_MSR
.ECHO ", DRIVE 1"
.ECHO ", TYPE="
DEVECHO "FD: MODE="
DEVECHO FDMODE_STR
DEVECHO ", IO="
DEVECHO FDC_MSR
DEVECHO ", DRIVE 1"
DEVECHO ", TYPE="
#IF (FD1TYPE == FDT_NONE
.ECHO "NONE"
DEVECHO "NONE"
#ENDIF
#IF (FD1TYPE == FDT_3DD
.ECHO "3.5\" DD"
DEVECHO "3.5\" DD"
#ENDIF
#IF (FD1TYPE == FDT_3HD
.ECHO "3.5\" HD"
DEVECHO "3.5\" HD"
#ENDIF
#IF (FD1TYPE == FDT_5DD
.ECHO "5.25\" DD"
DEVECHO "5.25\" DD"
#ENDIF
#IF (FD1TYPE == FDT_5HD
.ECHO "5.25\" HD"
DEVECHO "5.25\" HD"
#ENDIF
#IF (FD1TYPE == FDT_8
.ECHO "8\" DD"
DEVECHO "8\" DD"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
#ENDIF
;
#IF ($ - FD_CFGTBL) != (FD_DEVCNT * FD_CFGSIZ)

18
Source/HBIOS/gdc.asm
View File

@ -37,32 +37,32 @@ GDC_COLS .EQU 80
; BE USED TO ALLOW FOR MULTIPLE MONITOR TIMINGS AND/OR FONT
; DEFINITIONS.
;
.ECHO "GDC: MODE="
DEVECHO "GDC: MODE="
;
#IF (GDCMODE == GDCMODE_ECB)
.ECHO "ECB"
DEVECHO "ECB"
#ENDIF
#IF (GDCMODE == GDCMODE_RPH)
.ECHO "RPH"
DEVECHO "RPH"
#ENDIF
;
.ECHO ", DISPLAY="
DEVECHO ", DISPLAY="
;
#IF (GDCMON == GDCMON_CGA)
#DEFINE USEFONTCGA
#DEFINE GDC_FONT FONTCGA
.ECHO "CGA"
DEVECHO "CGA"
#ENDIF
;
#IF (GDCMON == GDCMON_EGA)
#DEFINE USEFONT8X16
#DEFINE GDC_FONT FONT8X16
.ECHO "EGA"
DEVECHO "EGA"
#ENDIF
;
.ECHO ", IO="
.ECHO GDC_BASE
.ECHO "\n"
DEVECHO ", IO="
DEVECHO GDC_BASE
DEVECHO "\n"
;
TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER
KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT

5
Source/HBIOS/h8p.asm
View File

@ -11,6 +11,11 @@
; 20 08
; +--10--+ 80
;
;
DEVECHO "H8P: IO=??"
;DEVECHO 0
DEVECHO "\n"
;
;__H8P_PREINIT_______________________________________________________________________________________
;
; CONFIGURE AND RESET PANEL

2675
Source/HBIOS/hbios.asm
View File

File diff suppressed because it is too large

10
Source/HBIOS/hdsk.asm
View File

@ -22,11 +22,11 @@ HDSK_DEV .EQU 0 ; OFFSET OF DEVICE NUMBER (BYTE)
HDSK_STAT .EQU 1 ; OFFSET OF STATUS (BYTE)
HDSK_LBA .EQU 2 ; OFFSET OF LBA (DWORD)
;
.ECHO "HDSK: IO="
.ECHO HDSK_IO
.ECHO ", DEVICE COUNT="
.ECHO HDSK_DEVCNT
.ECHO "\n"
DEVECHO "HDSK: IO="
DEVECHO HDSK_IO
DEVECHO ", DEVICE COUNT="
DEVECHO HDSK_DEVCNT
DEVECHO "\n"
;
HDSK_CFGTBL:
; DEVICE 0

4
Source/HBIOS/icm.asm
View File

@ -31,6 +31,10 @@ ICM_PPIA .EQU ICMPPIBASE + 0 ; PORT A
ICM_PPIB .EQU ICMPPIBASE + 1 ; PORT B
ICM_PPIC .EQU ICMPPIBASE + 2 ; PORT C
ICM_PPIX .EQU ICMPPIBASE + 3 ; PPI CONTROL PORT
;
DEVECHO "ICM: IO="
DEVECHO ICMPPIBASE
DEVECHO "\n"
;
;__ICM_INIT__________________________________________________________________________________________
;

120
Source/HBIOS/ide.asm
View File

@ -214,26 +214,26 @@ IDE_DEV0M: ; DEVICE 0, MASTER
.DB IDE0DATHI ; IO BASE ADDRESS
.DW IDE_DEV0S ; PARTNER
;
.ECHO "IDE: MODE="
DEVECHO "IDE: MODE="
#IF (IDE0MODE == IDEMODE_NONE)
.ECHO "NONE"
DEVECHO "NONE"
#ENDIF
#IF (IDE0MODE == IDEMODE_DIO)
.ECHO "DIO"
DEVECHO "DIO"
#ENDIF
#IF (IDE0MODE == IDEMODE_DIDE)
.ECHO "DIDE"
DEVECHO "DIDE"
#ENDIF
#IF (IDE0MODE == IDEMODE_MK4)
.ECHO "MK4"
DEVECHO "MK4"
#ENDIF
#IF (IDE0MODE == IDEMODE_RC)
.ECHO "RC"
DEVECHO "RC"
#ENDIF
.ECHO ", IO="
.ECHO IDE0BASE
.ECHO ", MASTER"
.ECHO "\n"
DEVECHO ", IO="
DEVECHO IDE0BASE
DEVECHO ", MASTER"
DEVECHO "\n"
;
IDE_DEV0S: ; DEVICE 0, SLAVE
.DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY)
@ -249,26 +249,26 @@ IDE_DEV0S: ; DEVICE 0, SLAVE
.DB IDE0DATHI ; IO BASE ADDRESS
.DW IDE_DEV0M ; PARTNER
;
.ECHO "IDE: MODE="
DEVECHO "IDE: MODE="
#IF (IDE0MODE == IDEMODE_NONE)
.ECHO "NONE"
DEVECHO "NONE"
#ENDIF
#IF (IDE0MODE == IDEMODE_DIO)
.ECHO "DIO"
DEVECHO "DIO"
#ENDIF
#IF (IDE0MODE == IDEMODE_DIDE)
.ECHO "DIDE"
DEVECHO "DIDE"
#ENDIF
#IF (IDE0MODE == IDEMODE_MK4)
.ECHO "MK4"
DEVECHO "MK4"
#ENDIF
#IF (IDE0MODE == IDEMODE_RC)
.ECHO "RC"
DEVECHO "RC"
#ENDIF
.ECHO ", IO="
.ECHO IDE0BASE
.ECHO ", SLAVE"
.ECHO "\n"
DEVECHO ", IO="
DEVECHO IDE0BASE
DEVECHO ", SLAVE"
DEVECHO "\n"
#ENDIF
;
#IF (IDECNT >= 2)
@ -287,26 +287,26 @@ IDE_DEV1M: ; DEVICE 1, MASTER
.DB IDE1DATHI ; IO BASE ADDRESS
.DW IDE_DEV1S ; PARTNER
;
.ECHO "IDE: MODE="
DEVECHO "IDE: MODE="
#IF (IDE1MODE == IDEMODE_NONE)
.ECHO "NONE"
DEVECHO "NONE"
#ENDIF
#IF (IDE1MODE == IDEMODE_DIO)
.ECHO "DIO"
DEVECHO "DIO"
#ENDIF
#IF (IDE1MODE == IDEMODE_DIDE)
.ECHO "DIDE"
DEVECHO "DIDE"
#ENDIF
#IF (IDE1MODE == IDEMODE_MK4)
.ECHO "MK4"
DEVECHO "MK4"
#ENDIF
#IF (IDE1MODE == IDEMODE_RC)
.ECHO "RC"
DEVECHO "RC"
#ENDIF
.ECHO ", IO="
.ECHO IDE1BASE
.ECHO ", MASTER"
.ECHO "\n"
DEVECHO ", IO="
DEVECHO IDE1BASE
DEVECHO ", MASTER"
DEVECHO "\n"
;
IDE_DEV1S: ; DEVICE 1, SLAVE
.DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY)
@ -322,26 +322,26 @@ IDE_DEV1S: ; DEVICE 1, SLAVE
.DB IDE1DATHI ; IO BASE ADDRESS
.DW IDE_DEV1M ; PARTNER
;
.ECHO "IDE: MODE="
DEVECHO "IDE: MODE="
#IF (IDE1MODE == IDEMODE_NONE)
.ECHO "NONE"
DEVECHO "NONE"
#ENDIF
#IF (IDE1MODE == IDEMODE_DIO)
.ECHO "DIO"
DEVECHO "DIO"
#ENDIF
#IF (IDE1MODE == IDEMODE_DIDE)
.ECHO "DIDE"
DEVECHO "DIDE"
#ENDIF
#IF (IDE1MODE == IDEMODE_MK4)
.ECHO "MK4"
DEVECHO "MK4"
#ENDIF
#IF (IDE1MODE == IDEMODE_RC)
.ECHO "RC"
DEVECHO "RC"
#ENDIF
.ECHO ", IO="
.ECHO IDE1BASE
.ECHO ", SLAVE"
.ECHO "\n"
DEVECHO ", IO="
DEVECHO IDE1BASE
DEVECHO ", SLAVE"
DEVECHO "\n"
#ENDIF
;
#IF (IDECNT >= 3)
@ -360,26 +360,26 @@ IDE_DEV2M: ; DEVICE 2, MASTER
.DB IDE2DATHI ; IO BASE ADDRESS
.DW IDE_DEV2S ; PARTNER
;
.ECHO "IDE: MODE="
DEVECHO "IDE: MODE="
#IF (IDE2MODE == IDEMODE_NONE)
.ECHO "NONE"
DEVECHO "NONE"
#ENDIF
#IF (IDE2MODE == IDEMODE_DIO)
.ECHO "DIO"
DEVECHO "DIO"
#ENDIF
#IF (IDE2MODE == IDEMODE_DIDE)
.ECHO "DIDE"
DEVECHO "DIDE"
#ENDIF
#IF (IDE2MODE == IDEMODE_MK4)
.ECHO "MK4"
DEVECHO "MK4"
#ENDIF
#IF (IDE2MODE == IDEMODE_RC)
.ECHO "RC"
DEVECHO "RC"
#ENDIF
.ECHO ", IO="
.ECHO IDE2BASE
.ECHO ", MASTER"
.ECHO "\n"
DEVECHO ", IO="
DEVECHO IDE2BASE
DEVECHO ", MASTER"
DEVECHO "\n"
;
IDE_DEV2S: ; DEVICE 2, SLAVE
.DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY)
@ -395,26 +395,26 @@ IDE_DEV2S: ; DEVICE 2, SLAVE
.DB IDE2DATHI ; IO BASE ADDRESS
.DW IDE_DEV1M ; PARTNER
;
.ECHO "IDE: MODE="
DEVECHO "IDE: MODE="
#IF (IDE2MODE == IDEMODE_NONE)
.ECHO "NONE"
DEVECHO "NONE"
#ENDIF
#IF (IDE2MODE == IDEMODE_DIO)
.ECHO "DIO"
DEVECHO "DIO"
#ENDIF
#IF (IDE2MODE == IDEMODE_DIDE)
.ECHO "DIDE"
DEVECHO "DIDE"
#ENDIF
#IF (IDE2MODE == IDEMODE_MK4)
.ECHO "MK4"
DEVECHO "MK4"
#ENDIF
#IF (IDE2MODE == IDEMODE_RC)
.ECHO "RC"
DEVECHO "RC"
#ENDIF
.ECHO ", IO="
.ECHO IDE2BASE
.ECHO ", SLAVE"
.ECHO "\n"
DEVECHO ", IO="
DEVECHO IDE2BASE
DEVECHO ", SLAVE"
DEVECHO "\n"
#ENDIF
;
#IF ($ - IDE_CFGTBL) != (IDE_DEVCNT * IDE_CFGSIZ)

24
Source/HBIOS/imm.asm
View File

@ -1526,16 +1526,16 @@ IMM0_CFG: ; DEVICE 0
.DW 0,0 ; DEVICE CAPACITY
.DW 0,0 ; CURRENT LBA
;
.ECHO "IMM: MODE="
DEVECHO "IMM: MODE="
#IF (IMMMODE == IMMMODE_SPP)
.ECHO "SPP"
DEVECHO "SPP"
#ENDIF
#IF (IMMMODE == IMMMODE_MG014)
.ECHO "MG014"
DEVECHO "MG014"
#ENDIF
.ECHO ", IO="
.ECHO IMM0BASE
.ECHO "\n"
DEVECHO ", IO="
DEVECHO IMM0BASE
DEVECHO "\n"
#ENDIF
;
#IF (IMMCNT >= 2)
@ -1548,16 +1548,16 @@ IMM1_CFG: ; DEVICE 1
.DW 0,0 ; DEVICE CAPACITY
.DW 0,0 ; CURRENT LBA
;
.ECHO "IMM: MODE="
DEVECHO "IMM: MODE="
#IF (IMMMODE == IMMMODE_SPP)
.ECHO "SPP"
DEVECHO "SPP"
#ENDIF
#IF (IMMMODE == IMMMODE_MG014)
.ECHO "MG014"
DEVECHO "MG014"
#ENDIF
.ECHO ", IO="
.ECHO IMM1BASE
.ECHO "\n"
DEVECHO ", IO="
DEVECHO IMM1BASE
DEVECHO "\n"
#ENDIF
;
#IF ($ - IMM_CFG) != (IMMCNT * IMM_CFGSIZ)

2
Source/HBIOS/intrtc.asm
View File

@ -5,7 +5,7 @@
;
INTRTC_BUFSIZ .EQU 6 ; SIX BYTE BUFFER (YYMMDDHHMMSS)
;
.ECHO "INTRTC: ENABLED\n"
DEVECHO "INTRTC: ENABLED\n"
;
; RTC DEVICE INITIALIZATION ENTRY
;

2
Source/HBIOS/kbd.asm
View File

@ -56,7 +56,7 @@ KBD_STATUS .DB 0 ; CURRENT STATUS BITS (SEE ABOVE)
KBD_REPEAT .DB 0 ; CURRENT REPEAT RATE
KBD_IDLE .DB 0 ; IDLE COUNT
;
.ECHO "KBD: ENABLED\n"
DEVECHO "KBD: ENABLED\n"
;
;__________________________________________________________________________________________________
; KEYBOARD INITIALIZATION

4
Source/HBIOS/kio.asm
View File

@ -25,6 +25,10 @@ KIO_KIOCMD .EQU KIOBASE + $0E
KIO_KIOCMDB .EQU KIOBASE + $0F
;
;
;
DEVECHO "KIO: IO="
DEVECHO KIOBASE
DEVECHO "\n"
;
KIO_PREINIT:
CALL KIO_DETECT

24
Source/HBIOS/lpt.asm
View File

@ -421,16 +421,16 @@ LPT0_CFG:
.DB LPT0BASE ; BASE PORT
.DW 0 ; LINE CONFIGURATION
;
.ECHO "LPT: MODE="
DEVECHO "LPT: MODE="
#IF (LPTMODE == LPTMODE_SPP)
.ECHO "SPP"
DEVECHO "SPP"
#ENDIF
#IF (LPTMODE == LPTMODE_MG014)
.ECHO "MG014"
DEVECHO "MG014"
#ENDIF
.ECHO ", IO="
.ECHO LPT0BASE
.ECHO "\n"
DEVECHO ", IO="
DEVECHO LPT0BASE
DEVECHO "\n"
;
LPT_CFGSIZ .EQU $ - LPT_CFG ; SIZE OF ONE CFG TABLE ENTRY
;
@ -444,16 +444,16 @@ LPT1_CFG:
.DB LPT1BASE ; BASE PORT
.DW 0 ; LINE CONFIGURATION
;
.ECHO "LPT: MODE="
DEVECHO "LPT: MODE="
#IF (LPTMODE == LPTMODE_SPP)
.ECHO "SPP"
DEVECHO "SPP"
#ENDIF
#IF (LPTMODE == LPTMODE_MG014)
.ECHO "MG014"
DEVECHO "MG014"
#ENDIF
.ECHO ", IO="
.ECHO LPT1BASE
.ECHO "\n"
DEVECHO ", IO="
DEVECHO LPT1BASE
DEVECHO "\n"
;
#ENDIF
;

4
Source/HBIOS/md.asm
View File

@ -40,7 +40,7 @@ MD_CFGTBL:
.DB MID_MDRAM ; DEVICE MEDIA ID
.DB MD_ARAM ; DEVICE ATTRIBUTE
;
.ECHO "MD: TYPE=RAM\n"
DEVECHO "MD: TYPE=RAM\n"
#ENDIF
;
#IF (MDROM)
@ -51,7 +51,7 @@ MD_CFGTBL:
.DB MID_MDROM ; DEVICE MEDIA ID
.DB MD_AROM ; DEVICE ATTRIBUTE
;
.ECHO "MD: TYPE=ROM\n"
DEVECHO "MD: TYPE=ROM\n"
#ENDIF
;
MD_DEVCNT .EQU ($ - MD_CFGTBL) / MD_CFGSIZ

5
Source/HBIOS/mky.asm
View File

@ -177,6 +177,11 @@ SCANCODE_TBL:
.DB S_RETURN, S_SELECT, S_BACKSPACE, S_STOP, S_TAB, S_ESC, S_F5, S_F4 ; 07
.DB S_RIGHT, S_DOWN, S_UP, S_LEFT, S_DELETE, S_INSERT, S_HOME, S_SPACE ; 08
DEVECHO "MKY: IO="
DEVECHO MKY_REGA
DEVECHO "\n"
;__________________________________________________________________________________________________
; KEYBOARD INITIALIZATION
;__________________________________________________________________________________________________

5
Source/HBIOS/nabu.asm
View File

@ -4,6 +4,11 @@
;==================================================================================================
NABU_INT1CLR .EQU $68
NABU_TICCNT .EQU $FFEA ; TICCNT AT $FFEA IS COPIED DOWN TO $000B
;
DEVECHO "NABU: IO="
DEVECHO NABU_INT1CLR
DEVECHO "\n"
;
;
; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION

4
Source/HBIOS/nabukb.asm
View File

@ -45,6 +45,10 @@
; CALL SUB12
;
NABUKB_DAT .EQU $90
;
DEVECHO "NABUKB: IO="
DEVECHO NABUKB_DAT
DEVECHO "\n"
;
NABUKB_INIT:
CALL NEWLINE

6
Source/HBIOS/pcf.asm
View File

@ -94,9 +94,9 @@ PCF_ACKTO .EQU 65000
PCF_BBTO .EQU 65000
PCF_LABDLY .EQU 65000
;
.ECHO "PCF: IO="
.ECHO PCF_BASE
.ECHO "\n"
DEVECHO "PCF: IO="
DEVECHO PCF_BASE
DEVECHO "\n"
;
; DATA PORT REGISTERS
;

24
Source/HBIOS/pio.asm
View File

@ -308,9 +308,9 @@ PIO0A_CFG:
.DW DEFSERCFG ; LINE CONFIGURATION
.DW PIO0A_RCVBUF ; POINTER TO RCV BUFFER STRUCT
;
.ECHO "PIO: IO="
.ECHO PIO0BASE
.ECHO ", CHANNEL A\n"
DEVECHO "PIO: IO="
DEVECHO PIO0BASE
DEVECHO ", CHANNEL A\n"
;
PIO_CFGSIZ .EQU $ - PIO_CFG ; SIZE OF ONE CFG TABLE ENTRY
;
@ -324,9 +324,9 @@ PIO0B_CFG:
.DW DEFSERCFG ; LINE CONFIGURATION
.DW PIO0B_RCVBUF ; POINTER TO RCV BUFFER STRUCT
;
.ECHO "PIO: IO="
.ECHO PIO0BASE
.ECHO ", CHANNEL B\n"
DEVECHO "PIO: IO="
DEVECHO PIO0BASE
DEVECHO ", CHANNEL B\n"
;
#IF (PIOCNT >= 2)
;
@ -340,9 +340,9 @@ PIO1A_CFG:
.DW DEFSERCFG ; LINE CONFIGURATION
.DW PIO1A_RCVBUF ; POINTER TO RCV BUFFER STRUCT
;
.ECHO "PIO: IO="
.ECHO PIO1BASE
.ECHO ", CHANNEL A\n"
DEVECHO "PIO: IO="
DEVECHO PIO1BASE
DEVECHO ", CHANNEL A\n"
;
; PIO1 CHANNEL B
PIO1B_CFG:
@ -354,9 +354,9 @@ PIO1B_CFG:
.DW DEFSERCFG ; LINE CONFIGURATION
.DW PIO1B_RCVBUF ; POINTER TO RCV BUFFER STRUCT
;
.ECHO "PIO: IO="
.ECHO PIO1BASE
.ECHO ", CHANNEL B\n"
DEVECHO "PIO: IO="
DEVECHO PIO1BASE
DEVECHO ", CHANNEL B\n"
;
#ENDIF
;

6
Source/HBIOS/pkd.asm
View File

@ -66,9 +66,9 @@ PKD_CMD_FIFO .EQU %01000000 ; READ FIFO
;
PKD_PRESCL .EQU PKDOSC/100000 ; PRESCALER
;
.ECHO "PKD: IO="
.ECHO PKDPPIBASE
.ECHO "\n"
DEVECHO "PKD: IO="
DEVECHO PKDPPIBASE
DEVECHO "\n"
;
;__PKD_PREINIT_______________________________________________________________________________________
;

24
Source/HBIOS/ppa.asm
View File

@ -1386,16 +1386,16 @@ PPA0_CFG: ; DEVICE 0
.DW 0,0 ; DEVICE CAPACITY
.DW 0,0 ; CURRENT LBA
;
.ECHO "PPA: MODE="
DEVECHO "PPA: MODE="
#IF (PPAMODE == PPAMODE_SPP)
.ECHO "SPP"
DEVECHO "SPP"
#ENDIF
#IF (PPAMODE == PPAMODE_MG014)
.ECHO "MG014"
DEVECHO "MG014"
#ENDIF
.ECHO ", IO="
.ECHO PPA0BASE
.ECHO "\n"
DEVECHO ", IO="
DEVECHO PPA0BASE
DEVECHO "\n"
#ENDIF
;
#IF (PPACNT >= 2)
@ -1408,16 +1408,16 @@ PPA1_CFG: ; DEVICE 1
.DW 0,0 ; DEVICE CAPACITY
.DW 0,0 ; CURRENT LBA
;
.ECHO "PPA: MODE="
DEVECHO "PPA: MODE="
#IF (PPAMODE == PPAMODE_SPP)
.ECHO "SPP"
DEVECHO "SPP"
#ENDIF
#IF (PPAMODE == PPAMODE_MG014)
.ECHO "MG014"
DEVECHO "MG014"
#ENDIF
.ECHO ", IO="
.ECHO PPA1BASE
.ECHO "\n"
DEVECHO ", IO="
DEVECHO PPA1BASE
DEVECHO "\n"
#ENDIF
;
#IF ($ - PPA_CFG) != (PPACNT * PPA_CFGSIZ)

48
Source/HBIOS/ppide.asm
View File

@ -230,10 +230,10 @@ PPIDE_DEV0M: ; DEVICE 0, MASTER
.DB PPIDE0BASE+3 ; PPI
.DW PPIDE_DEV0S ; PARTNER
;
.ECHO "PPIDE: IO="
.ECHO PPIDE0BASE
.ECHO ", MASTER"
.ECHO "\n"
DEVECHO "PPIDE: IO="
DEVECHO PPIDE0BASE
DEVECHO ", MASTER"
DEVECHO "\n"
;
PPIDE_DEV0S: ; DEVICE 0, SLAVE
.DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY)
@ -248,10 +248,10 @@ PPIDE_DEV0S: ; DEVICE 0, SLAVE
.DB PPIDE0BASE+3 ; PPI
.DW PPIDE_DEV0M ; PARTNER
;
.ECHO "PPIDE: IO="
.ECHO PPIDE0BASE
.ECHO ", SLAVE"
.ECHO "\n"
DEVECHO "PPIDE: IO="
DEVECHO PPIDE0BASE
DEVECHO ", SLAVE"
DEVECHO "\n"
;
#ENDIF
;
@ -270,10 +270,10 @@ PPIDE_DEV1M: ; DEVICE 1, MASTER
.DB PPIDE1BASE+3 ; PPI
.DW PPIDE_DEV1S ; PARTNER
;
.ECHO "PPIDE: IO="
.ECHO PPIDE1BASE
.ECHO ", MASTER"
.ECHO "\n"
DEVECHO "PPIDE: IO="
DEVECHO PPIDE1BASE
DEVECHO ", MASTER"
DEVECHO "\n"
;
PPIDE_DEV1S: ; DEVICE 1, SLAVE
.DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY)
@ -288,10 +288,10 @@ PPIDE_DEV1S: ; DEVICE 1, SLAVE
.DB PPIDE1BASE+3 ; PPI
.DW PPIDE_DEV1M ; PARTNER
;
.ECHO "PPIDE: IO="
.ECHO PPIDE1BASE
.ECHO ", SLAVE"
.ECHO "\n"
DEVECHO "PPIDE: IO="
DEVECHO PPIDE1BASE
DEVECHO ", SLAVE"
DEVECHO "\n"
;
#ENDIF
;
@ -310,10 +310,10 @@ PPIDE_DEV2M: ; DEVICE 2, MASTER
.DB PPIDE2BASE+3 ; PPI
.DW PPIDE_DEV2S ; PARTNER
;
.ECHO "PPIDE: IO="
.ECHO PPIDE2BASE
.ECHO ", MASTER"
.ECHO "\n"
DEVECHO "PPIDE: IO="
DEVECHO PPIDE2BASE
DEVECHO ", MASTER"
DEVECHO "\n"
;
PPIDE_DEV2S: ; DEVICE 2, SLAVE
.DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY)
@ -328,10 +328,10 @@ PPIDE_DEV2S: ; DEVICE 2, SLAVE
.DB PPIDE2BASE+3 ; PPI
.DW PPIDE_DEV2M ; PARTNER
;
.ECHO "PPIDE: IO="
.ECHO PPIDE2BASE
.ECHO ", SLAVE"
.ECHO "\n"
DEVECHO "PPIDE: IO="
DEVECHO PPIDE2BASE
DEVECHO ", SLAVE"
DEVECHO "\n"
;
#ENDIF
;

2
Source/HBIOS/ppk.asm
View File

@ -60,7 +60,7 @@ PPK_REPEAT .DB 0 ; CURRENT REPEAT RATE
PPK_IDLE .DB 0 ; IDLE COUNT
PPK_WAITTO .DW 0 ; TIMEOUT WAIT LOOP COUNT (COMPUTED IN INIT)
;
.ECHO "PPK: ENABLED\n"
DEVECHO "PPK: ENABLED\n"
;
;__________________________________________________________________________________________________
; KEYBOARD INITIALIZATION

10
Source/HBIOS/ppp.asm
View File

@ -9,9 +9,9 @@ PPP_IO .EQU PPPBASE + 0 ; PPP DATA I/O (PPI PORT A)
PPP_CTL .EQU PPPBASE + 2 ; PPP CTL LINES (PPI PORT C)
PPP_PPICTL .EQU PPPBASE + 3 ; PPI CONTROL PORT
;
.ECHO "PPP: IO="
.ECHO PPP_IO
.ECHO "\n"
DEVECHO "PPP: IO="
DEVECHO PPP_IO
DEVECHO "\n"
;
; COMMAND BYTES
;
@ -253,7 +253,7 @@ PPP_FWVER .DB $00, $00, $00, $00 ; MMNNBBB (M=MAJOR, N=MINOR, B=BUILD)
PPPCON_ROWS .EQU 29 ; PROPELLER VGA DISPLAY ROWS (30 - 1 STATUS LINES)
PPPCON_COLS .EQU 80 ; PROPELLER VGA DISPLAY COLS
;
.ECHO "PPPCON: ENABLED\n"
DEVECHO "PPPCON: ENABLED\n"
;
PPPCON_INIT:
CALL NEWLINE
@ -420,7 +420,7 @@ PPPSD_CFGTBL:
;
.DB $FF ; END MARKER
;
.ECHO "PPPSD: ENABLED\n"
DEVECHO "PPPSD: ENABLED\n"
;
; SD CARD INITIALIZATION
;

10
Source/HBIOS/prp.asm
View File

@ -7,9 +7,9 @@
;
PRP_IOBASE .EQU $A8
;
.ECHO "PRP: IO="
.ECHO PRP_IOBASE
.ECHO "\n"
DEVECHO "PRP: IO="
DEVECHO PRP_IOBASE
DEVECHO "\n"
;
; GLOBAL PROPIO INITIALIZATION
;
@ -124,7 +124,7 @@ PRPCON_DSPRDY .EQU $10 ; BIT SET WHEN DISPLAY BUF IS READY FOR A BYTE (BUF EMPT
PRPCON_ROWS .EQU 29 ; PROPELLER VGA DISPLAY ROWS (30 - 1 STATUS LINES)
PRPCON_COLS .EQU 80 ; PROPELLER VGA DISPLAY COLS
;
.ECHO "PRPCON: ENABLED\n"
DEVECHO "PRPCON: ENABLED\n"
;
;
;
@ -317,7 +317,7 @@ PRPSD_CFGTBL:
;
.DB $FF ; END MARKER
;
.ECHO "PRPSD: ENABLED\n"
DEVECHO "PRPSD: ENABLED\n"
;
; SD CARD INITIALIZATION
;

24
Source/HBIOS/rf.asm
View File

@ -43,9 +43,9 @@ RF_CFGTBL:
.DB 0 ; UNUSED
.DB RF_U0IO ; DEVICE BASE ADDR
;
.ECHO "RF: IO="
.ECHO RF_U0IO
.ECHO "\n"
DEVECHO "RF: IO="
DEVECHO RF_U0IO
DEVECHO "\n"
;
#IF (RF_DEVCNT > 1)
; DEVICE 1
@ -56,9 +56,9 @@ RF_CFGTBL:
.DB RF_U1IO ; DEVICE BASE ADDR
#ENDIF
;
.ECHO "RF: IO="
.ECHO RF_U1IO
.ECHO "\n"
DEVECHO "RF: IO="
DEVECHO RF_U1IO
DEVECHO "\n"
;
#IF (RF_DEVCNT > 2)
; DEVICE 2
@ -69,9 +69,9 @@ RF_CFGTBL:
.DB RF_U2IO ; DEVICE BASE ADDR
#ENDIF
;
.ECHO "RF: IO="
.ECHO RF_U2IO
.ECHO "\n"
DEVECHO "RF: IO="
DEVECHO RF_U2IO
DEVECHO "\n"
;
#IF (RF_DEVCNT > 3)
; DEVICE 3
@ -81,9 +81,9 @@ RF_CFGTBL:
.DB 0 ; UNUSED
.DB RF_U3IO ; DEVICE BASE ADDR
;
.ECHO "RF: IO="
.ECHO RF_U3IO
.ECHO "\n"
DEVECHO "RF: IO="
DEVECHO RF_U3IO
DEVECHO "\n"
;
#ENDIF
;

45
Source/HBIOS/romldr.asm
View File

@ -148,7 +148,7 @@ start:
ld bc,$01FB ; UNA func: set bank
ld de,BID_USR ; select user bank
rst 08 ; do it
ld (bid_ldr),de ; ... for later
ld (bid_ldr),de ; save previous bank for later
bit 7,d ; starting from ROM?
#endif
;
@ -156,6 +156,8 @@ start:
ld hl,ra_tbl ; assume ROM startup
jr z,start1 ; if so, ra_tbl OK, skip ahead
ld hl,ra_tbl_app ; not ROM boot, get app tbl loc
ld a,$ff ; signal for app boot
ld (appboot),a ; ... goes in flag
start1:
ld (ra_tbl_loc),hl ; and overlay pointer
;
@ -206,6 +208,10 @@ start1:
call nl2 ; formatting
ld hl,str_banner ; display boot banner
call pstr ; do it
ld a,(appboot) ; get app boot flag
or a ; set flags
ld hl,str_appboot ; signal application boot mode
call nz,pstr ; print if app boot active
call clrbuf ; zero fill the cmd buffer
;
#if ((BIOS == BIOS_WBW) & FPSW_ENABLE)
@ -398,7 +404,6 @@ conpoll4:
;=======================================================================
;
concmd:
call clrled ; clear LEDs
;
#if (DSKYENABLE)
call dsky_highlightkeysoff
@ -617,7 +622,6 @@ fp_flopboot2:
#if (DSKYENABLE)
;
dskycmd:
call clrled ; clear LEDs
;
call dsky_getkey ; get DSKY key
ld a,e ; put in A
@ -1474,37 +1478,6 @@ str_s100con .db "\r\n\r\nConsole on S100 Bus",0
; Utility functions
;=======================================================================
;
; Clear LEDs
;
clrled:
#if (BIOS == BIOS_WBW)
#if (FPLED_ENABLE)
ld b,BF_SYSSET ; HBIOS SysGet
ld c,BF_SYSSET_PANEL ; ... Panel swiches value
ld l,$00 ; all LEDs off
rst 08 ; do it
#endif
#if (LEDENABLE)
#if (LEDMODE == LEDMODE_STD)
ld a,$FF ; led is inverted
out (LEDPORT),a ; clear led
#endif
#if (LEDMODE == LEDMODE_RTC)
; Bits 0 and 1 of the RTC latch are for the LEDs.
ld a,(HB_RTCVAL)
and ~%00000011
out (RTCIO),a ; clear led
ld (HB_RTCVAL),a
#endif
#if (LEDMODE == LEDMODE_NABU)
; Bits 0 and 1 of the RTC latch are for the LEDs.
xor a
out (LEDPORT),a
#endif
#endif
#endif
ret
;
; Print string at HL on console, null terminated
;
pstr:
@ -2320,6 +2293,7 @@ acmd_to .dw BOOT_TIMEOUT ; auto cmd timeout
;=======================================================================
;
str_banner .db PLATFORM_NAME," Boot Loader",0
str_appboot .db " (App Boot)",0
str_autoboot .db "AutoBoot: ",0
str_prompt .db "Boot [H=Help]: ",0
str_bs .db bs,' ',bs,0
@ -2435,7 +2409,7 @@ ra_ent .equ 12
; be pre-loaded into the currently executing ram bank thereby allowing
; those images to be dynamically loaded as well. To support this
; concept, a pseudo-bank called bid_cur is used to specify the images
; normally found in BID_IMG0. In romload, this special value will cause
; normally found in BID_IMG0. This special value will cause
; the associated image to be loaded from the currently executing bank
; which will be correct regardless of the load mode. Images in other
; banks (BID_IMG1) will always be loaded directly from ROM.
@ -2514,6 +2488,7 @@ dma .dw 0 ; address for load
sps .dw 0 ; sectors per slice
mediaid .db 0 ; media id
;
appboot .db 0 ; app boot if != 0
ra_tbl_loc .dw 0 ; points to active ra_tbl
bootunit .db 0 ; boot disk unit
bootslice .db 0 ; boot disk slice

6
Source/HBIOS/rp5rtc.asm
View File

@ -55,9 +55,9 @@ MODE_RAM1 .EQU 3
MD_TIME .EQU 8
MD_ALRM .EQU 4
.ECHO "RP5C01: IO="
.ECHO RP5RTC_REG
.ECHO "\n"
DEVECHO "RP5C01: IO="
DEVECHO RP5RTC_REG
DEVECHO "\n"
RP5RTC_INIT:
LD A, (RTC_DISPACT) ; RTC DISPATCHER ALREADY SET?

6
Source/HBIOS/scon.asm
View File

@ -16,9 +16,9 @@ SCON_DSPRDY .EQU %00000100
SCON_COLS .EQU 80
SCON_ROWS .EQU 40
;
.ECHO "SCON: IO="
.ECHO SCON_IOBASE
.ECHO "\n"
DEVECHO "SCON: IO="
DEVECHO SCON_IOBASE
DEVECHO "\n"
;
;
;

35
Source/HBIOS/sd.asm
View File

@ -117,7 +117,7 @@ SD_NOPULLUP .EQU TRUE ; ASSUME NO PULLUP
;
SD_DEVCNT .EQU SDCNT ; SET SD_DEVCNT TO SDCNT CONFIG VAR
;
.ECHO "SD: MODE="
DEVECHO "SD: MODE="
;
#IF (SDMODE == SDMODE_JUHA) ; JUHA MINI-BOARD
SD_DEVMAX .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
@ -131,7 +131,7 @@ SD_DI .EQU %00000001 ; RTC:0 IS DATA IN (CARD <- CPU)
SD_DO .EQU %10000000 ; RTC:7 IS DATA OUT (CARD -> CPU)
SD_IOBASE .EQU SD_OPRREG ; IOBASE
SD_INVCS .EQU FALSE ; INVERT CS
.ECHO "JUHA"
DEVECHO "JUHA"
;
RTCDEF .SET RTCDEF | SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE
#ENDIF
@ -148,7 +148,7 @@ SD_DI .EQU %00000001 ; RTC:0 IS DATA IN (CARD <- CPU)
SD_DO .EQU %01000000 ; RTC:6 IS DATA OUT (CARD -> CPU)
SD_IOBASE .EQU SD_OPRREG ; IOBASE
SD_INVCS .EQU FALSE ; INVERT CS
.ECHO "N8"
DEVECHO "N8"
;
RTCDEF .SET RTCDEF | SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE
#ENDIF
@ -163,7 +163,7 @@ SD_CNTR .EQU Z180_CNTR
SD_TRDR .EQU Z180_TRDR
SD_IOBASE .EQU SD_OPRREG ; IOBASE
SD_INVCS .EQU FALSE ; INVERT CS
.ECHO "CSIO"
DEVECHO "CSIO"
;
RTCDEF .SET RTCDEF | SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE
#ENDIF
@ -184,7 +184,7 @@ SD_DI .EQU %00000001 ; PPIC:0 IS DATA IN (CARD <- CPU)
SD_DO .EQU %10000000 ; PPIB:7 IS DATA OUT (CARD -> CPU)
SD_IOBASE .EQU SD_PPIBASE ; IOBASE
SD_INVCS .EQU TRUE ; INVERT CS
.ECHO "PPI"
DEVECHO "PPI"
#ENDIF
;
#IF (SDMODE == SDMODE_UART)
@ -199,7 +199,7 @@ SD_DI .EQU %00000001 ; UART MCR:0 IS DATA IN (CARD <- CPU)
SD_DO .EQU %00100000 ; UART MSR:5 IS DATA OUT (CARD -> CPU)
SD_IOBASE .EQU UARTIOB ; IOBASE
SD_INVCS .EQU TRUE ; INVERT CS
.ECHO "UART"
DEVECHO "UART"
#ENDIF
;
#IF (SDMODE == SDMODE_DSD) ; DUAL SD
@ -215,7 +215,7 @@ SD_DI .EQU %00000001 ; RTC:6 IS DATA IN (CARD <- CPU)
SD_DO .EQU %00000001 ; RTC:0 IS DATA OUT (CARD -> CPU)
SD_IOBASE .EQU SD_OPRREG ; IOBASE
SD_INVCS .EQU FALSE ; INVERT CS
.ECHO "DSD"
DEVECHO "DSD"
#ENDIF
;
#IF (SDMODE == SDMODE_MK4) ; MARK IV (CSIO STYLE INTERFACE)
@ -227,7 +227,7 @@ SD_CNTR .EQU Z180_CNTR
SD_TRDR .EQU Z180_TRDR
SD_IOBASE .EQU SD_OPRREG ; IOBASE
SD_INVCS .EQU FALSE ; INVERT CS
.ECHO "MK4"
DEVECHO "MK4"
#ENDIF
;
#IF (SDMODE == SDMODE_SC) ; SC
@ -241,16 +241,10 @@ SD_CNTR .EQU Z180_CNTR
SD_TRDR .EQU Z180_TRDR
SD_IOBASE .EQU SD_OPRREG ; IOBASE
SD_INVCS .EQU TRUE ; INVERT CS
.ECHO "SC"
DEVECHO "SC"
;
RTCDEF .SET RTCDEF | SD_OPRDEF ; SET DEFAULT IN HBIOS MAINLINE
#ENDIF
;
.ECHO ", IO="
.ECHO SD_IOBASE
.ECHO ", UNITS="
.ECHO SDCNT
.ECHO "\n"
;
#IF (SDMODE == SDMODE_MT) ; MT shift register for RCBUS (ref SDMODE_CSIO)
;
@ -300,6 +294,7 @@ SD_CS1 .EQU %00010000 ; IN/OUT:SD_OPREG:4 = CS1, SDCARD1 CS, IN=1 Card present
#ENDIF
SD_IOBASE .EQU SD_BASE ; IOBASE
SD_INVCS .EQU FALSE ; INVERT CS
DEVECHO "DUO"
#ENDIF
;
;
@ -332,6 +327,7 @@ SD_CINIT .EQU TRUE ; INITIALIZE OUTPUT PORT
SD_DDR .EQU $6B ; DATA DIRECTION REGISTER
SD_DDRVAL .EQU %11100110 ; DATA DIRECTION REGISTER VALUE
SD_INVCS .EQU TRUE ; INVERT CS
DEVECHO "PIO"
#ENDIF
;
;
@ -355,6 +351,7 @@ SD_CINIT .EQU TRUE ; INITIALIZE OUTPUT PORT
SD_DDR .EQU $03 ; DATA DIRECTION REGISTER
SD_DDRVAL .EQU %00001101 ; DATA DIRECTION REGISTER VALUE
SD_INVCS .EQU FALSE ; INVERT CS
DEVECHO "USR"
#ENDIF
;
#IF (SDMODE == SDMODE_Z80R) ; Z80 Retro
@ -376,6 +373,7 @@ SD_DI .EQU %00000001 ; DATA IN (CARD <- CPU) MOSI
SD_DO .EQU %00000001 ; DATA OUT (CARD -> CPU) MISO
SD_CINIT .EQU FALSE ; INITIALIZE OUTPUT PORT
SD_INVCS .EQU FALSE ; INVERT CS
DEVECHO "Z80R"
#ENDIF
; FOR NOW WE JUST HOOK UP ONE UNIT. THERE ARE EIGHT PORTS FOR DIFFERENT
@ -389,7 +387,14 @@ SD_CNTR .EQU Z180_CNTR
SD_TRDR .EQU Z180_TRDR
SD_IOBASE .EQU SD_OPRREG ; IOBASE
SD_INVCS .EQU FALSE ; INVERT CS
DEVECHO "EPITX"
#ENDIF
;
DEVECHO ", IO="
DEVECHO SD_IOBASE
DEVECHO ", UNITS="
DEVECHO SDCNT
DEVECHO "\n"
;
#IF (SD_DEVCNT > SD_DEVMAX)
.ECHO "*** ERROR: SDCNT EXCEEDS MAXIMUM SUPPORTED BY INTERFACE!!!\n"

6
Source/HBIOS/simrtc.asm
View File

@ -8,9 +8,9 @@ SIMRTC_CLKREAD .EQU 7 ; READ CLOCK COMMAND
SIMRTC_CLKWRITE .EQU 8 ; WRITE CLOCK COMMAND
SIMRTC_BUFSIZ .EQU 6 ; SIX BYTE BUFFER (YYMMDDHHMMSS)
;
.ECHO "SIMRTC: IO="
.ECHO SIMRTC_IO
.ECHO "\n"
DEVECHO "SIMRTC: IO="
DEVECHO SIMRTC_IO
DEVECHO "\n"
;
; RTC DEVICE INITIALIZATION ENTRY
;

88
Source/HBIOS/sio.asm
View File

@ -1171,30 +1171,30 @@ SIO0A_CFG:
.DB SIO0ACTCC ; CTC CHANNEL
.DB SIO0MODE ; MODE
;
.ECHO "SIO MODE="
DEVECHO "SIO MODE="
#IF (SIO0MODE == SIOMODE_STD)
.ECHO "STD"
DEVECHO "STD"
#ENDIF
#IF (SIO0MODE == SIOMODE_RC)
.ECHO "RC"
DEVECHO "RC"
#ENDIF
#IF (SIO0MODE == SIOMODE_SMB)
.ECHO "SMB"
DEVECHO "SMB"
#ENDIF
#IF (SIO0MODE == SIOMODE_ZP)
.ECHO "ZP"
DEVECHO "ZP"
#ENDIF
#IF (SIO0MODE == SIOMODE_Z80R)
.ECHO "Z80R"
DEVECHO "Z80R"
#ENDIF
.ECHO ", IO="
.ECHO SIO0BASE
.ECHO ", CHANNEL A"
DEVECHO ", IO="
DEVECHO SIO0BASE
DEVECHO ", CHANNEL A"
#IF (INTMODE > 0)
.ECHO ", INTERRUPTS ENABLED"
DEVECHO ", INTERRUPTS ENABLED"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
;
SIO_CFGSIZ .EQU $ - SIO_CFG ; SIZE OF ONE CFG TABLE ENTRY
;
@ -1212,29 +1212,29 @@ SIO0B_CFG:
.DB SIO0BCTCC ; CTC CHANNEL
.DB SIO0MODE ; MODE
;
.ECHO "SIO MODE="
DEVECHO "SIO MODE="
#IF (SIO0MODE == SIOMODE_STD)
.ECHO "STD"
DEVECHO "STD"
#ENDIF
#IF (SIO0MODE == SIOMODE_RC)
.ECHO "RC"
DEVECHO "RC"
#ENDIF
#IF (SIO0MODE == SIOMODE_SMB)
.ECHO "SMB"
DEVECHO "SMB"
#ENDIF
#IF (SIO0MODE == SIOMODE_ZP)
.ECHO "ZP"
DEVECHO "ZP"
#ENDIF
#IF (SIO0MODE == SIOMODE_Z80R)
.ECHO "Z80R"
DEVECHO "Z80R"
#ENDIF
.ECHO ", IO="
.ECHO SIO0BASE
.ECHO ", CHANNEL B"
DEVECHO ", IO="
DEVECHO SIO0BASE
DEVECHO ", CHANNEL B"
#IF (INTMODE > 0)
.ECHO ", INTERRUPTS ENABLED"
DEVECHO ", INTERRUPTS ENABLED"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
;
#IF (SIOCNT >= 2)
;
@ -1252,30 +1252,30 @@ SIO1A_CFG:
.DB SIO1ACTCC ; CTC CHANNEL
.DB SIO1MODE ; MODE
;
.ECHO "SIO MODE="
DEVECHO "SIO MODE="
#IF (SIO1MODE == SIOMODE_STD)
.ECHO "STD"
DEVECHO "STD"
#ENDIF
#IF (SIO1MODE == SIOMODE_RC)
.ECHO "RC"
DEVECHO "RC"
#ENDIF
#IF (SIO1MODE == SIOMODE_SMB)
.ECHO "SMB"
DEVECHO "SMB"
#ENDIF
#IF (SIO1MODE == SIOMODE_ZP)
.ECHO "ZP"
DEVECHO "ZP"
#ENDIF
#IF (SIO1MODE == SIOMODE_Z80R)
.ECHO "Z80R"
DEVECHO "Z80R"
#ENDIF
.ECHO ", IO="
.ECHO SIO1BASE
.ECHO ", CHANNEL A"
DEVECHO ", IO="
DEVECHO SIO1BASE
DEVECHO ", CHANNEL A"
#IF (INTMODE > 0)
.ECHO ", INTERRUPTS ENABLED"
DEVECHO ", INTERRUPTS ENABLED"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
;
; SIO1 CHANNEL B
SIO1B_CFG:
@ -1291,29 +1291,29 @@ SIO1B_CFG:
.DB SIO1BCTCC ; CTC CHANNEL
.DB SIO1MODE ; MODE
;
.ECHO "SIO MODE="
DEVECHO "SIO MODE="
#IF (SIO1MODE == SIOMODE_STD)
.ECHO "STD"
DEVECHO "STD"
#ENDIF
#IF (SIO1MODE == SIOMODE_RC)
.ECHO "RC"
DEVECHO "RC"
#ENDIF
#IF (SIO1MODE == SIOMODE_SMB)
.ECHO "SMB"
DEVECHO "SMB"
#ENDIF
#IF (SIO1MODE == SIOMODE_ZP)
.ECHO "ZP"
DEVECHO "ZP"
#ENDIF
#IF (SIO1MODE == SIOMODE_Z80R)
.ECHO "Z80R"
DEVECHO "Z80R"
#ENDIF
.ECHO ", IO="
.ECHO SIO1BASE
.ECHO ", CHANNEL B"
DEVECHO ", IO="
DEVECHO SIO1BASE
DEVECHO ", CHANNEL B"
#IF (INTMODE > 0)
.ECHO ", INTERRUPTS ENABLED"
DEVECHO ", INTERRUPTS ENABLED"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
;
#ENDIF
;

22
Source/HBIOS/sn76489.asm
View File

@ -17,33 +17,33 @@
;======================================================================
;
.ECHO "SN76489 MODE="
DEVECHO "SN76489 MODE="
;
#IF (SNMODE == SNMODE_VGM)
SN76489_PORT_LEFT .EQU $C6 ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT)
SN76489_PORT_RIGHT .EQU $C7 ; PORTS FOR ACCESSING THE SN76489 CHIP (RIGHT)
.ECHO "VGM"
DEVECHO "VGM"
#ENDIF
;
#IF (SNMODE == SNMODE_RC)
SN76489_PORT_LEFT .EQU $FF ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT)
SN76489_PORT_RIGHT .EQU $FB ; PORTS FOR ACCESSING THE SN76489 CHIP (RIGHT)
.ECHO "RC"
DEVECHO "RC"
#ENDIF
;
#IF (SNMODE == SNMODE_DUO)
SN76489_PORT_LEFT .EQU $BE ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT)
SN76489_PORT_RIGHT .EQU $BF ; PORTS FOR ACCESSING THE SN76489 CHIP (RIGHT)
.ECHO "RC"
DEVECHO "RC"
#ENDIF
;
.ECHO ", IO_LEFT="
.ECHO SN76489_PORT_LEFT
.ECHO ", IO_RIGHT="
.ECHO SN76489_PORT_RIGHT
.ECHO ", CLOCK="
.ECHO SN7CLK
.ECHO " HZ\n"
DEVECHO ", IO_LEFT="
DEVECHO SN76489_PORT_LEFT
DEVECHO ", IO_RIGHT="
DEVECHO SN76489_PORT_RIGHT
DEVECHO ", CLOCK="
DEVECHO SN7CLK
DEVECHO " HZ\n"
;
SN7_IDAT .EQU 0
SN7_TONECNT .EQU 3 ; COUNT NUMBER OF TONE CHANNELS

6
Source/HBIOS/spk.asm
View File

@ -41,9 +41,9 @@ SP_PENDING_PERIOD .DW SP_NOTE_C8 ; PENDING PERIOD (16 BITS)
SP_PENDING_VOLUME .DB $FF ; PENDING VOL (8 BITS)
SP_PENDING_DURATION .DW 0 ; PENDING DURATION (16 BITS)
;
.ECHO "SPK: IO="
.ECHO RTCIO
.ECHO "\n"
DEVECHO "SPK: IO="
DEVECHO RTCIO
DEVECHO "\n"
;
;======================================================================
; DRIVER INITIALIZATION

120
Source/HBIOS/std.asm
View File

@ -34,6 +34,14 @@
FALSE .EQU 0
TRUE .EQU ~FALSE
;
; CONTROLS PRINTING OF SYSTEM INFORMATION IN ASSEMBLY OUTPUT
;
#IFDEF SYSINFO
#DEFINE SYSECHO .ECHO
#ELSE
#DEFINE SYSECHO \;
#ENDIF
;
; DEBUGGING OPTIONS
;
USENONE .EQU 0 ; NO DEBUG
@ -147,8 +155,9 @@ CONBELL_IOBIT .EQU 2
;
LEDMODE_NONE .EQU 0
LEDMODE_STD .EQU 1
LEDMODE_RTC .EQU 2
LEDMODE_NABU .EQU 3
LEDMODE_SC .EQU 2
LEDMODE_RTC .EQU 3
LEDMODE_NABU .EQU 4
;
; DSKY MODE SELECTIONS
;
@ -564,24 +573,20 @@ CPUKHZ .SET CPUKHZ / 2 ; Z180 PHI IS ALWAYS 1/2 OSC
;
CPUMHZ .EQU CPUKHZ / 1000 ; CPU FREQ IN MHZ
;
.ECHO "ASSUMED CPU SPEED: "
.ECHO CPUKHZ
.ECHO " KHZ\n"
;
.ECHO "INTERRUPTS: "
SYSECHO "INTERRUPTS: "
#IF (INTMODE == 0)
.ECHO "NONE"
SYSECHO "NONE"
#ENDIF
#IF (INTMODE == 1)
.ECHO "MODE 1"
SYSECHO "MODE 1"
#ENDIF
#IF (INTMODE == 2)
.ECHO "MODE 2"
SYSECHO "MODE 2"
#ENDIF
#IF (INTMODE == 3)
.ECHO "MODE 3"
SYSECHO "MODE 3"
#ENDIF
.ECHO "\n"
SYSECHO "\n"
;
; SYSTEM PERIODIC TIMER MODE
;
@ -594,110 +599,110 @@ TM_SIMH .EQU 3
TM_Z180 .EQU 4
TM_Z280 .EQU 5
;
.ECHO "SYSTEM TIMER:"
SYSECHO "SYSTEM TIMER:"
SYSTIM .EQU TM_NONE
;
#IF (CTCENABLE & (INTMODE == 2))
#IF (CTCTIMER)
SYSTIM .SET TM_CTC
.ECHO " CTC"
SYSECHO " CTC"
#ENDIF
#ENDIF
;
#IF (TMSENABLE & (INTMODE == 1))
#IF (TMSTIMENABLE)
SYSTIM .SET TM_TMS
.ECHO " TMS9918/V9958"
SYSECHO " TMS9918/V9958"
#ENDIF
#ENDIF
;
#IF ((PLATFORM == PLT_SBC) & (INTMODE == 1))
#IF (HTIMENABLE)
SYSTIM .SET TM_SIMH
.ECHO " SIMH"
SYSECHO " SIMH"
#ENDIF
#ENDIF
;
#IF ((CPUFAM == CPU_Z180) & (INTMODE == 2))
#IF (Z180_TIMER)
SYSTIM .SET TM_Z180
.ECHO " Z180"
SYSECHO " Z180"
#ENDIF
#ENDIF
;
#IF ((CPUFAM == CPU_Z280) & (MEMMGR == MM_Z280))
#IF (Z280_TIMER)
SYSTIM .SET TM_Z280
.ECHO " Z280"
SYSECHO " Z280"
#ENDIF
#ENDIF
;
#IF SYSTIM == TM_NONE
.ECHO " NONE"
SYSECHO " NONE"
#ENDIF
;
.ECHO "\n"
SYSECHO "\n"
;
#ENDIF
;
#IF (BIOS == BIOS_WBW)
.ECHO "DEFAULT SERIAL CONFIGURATION: "
SYSECHO "DEFAULT SERIAL CONFIGURATION: "
#IF ((DEFSERCFG & %1111100000000) == SER_BAUD9600
.ECHO "9600"
SYSECHO "9600"
#ENDIF
#IF ((DEFSERCFG & %1111100000000) == SER_BAUD38400
.ECHO "38400"
SYSECHO "38400"
#ENDIF
#IF ((DEFSERCFG & %1111100000000) == SER_BAUD57600
.ECHO "57600"
SYSECHO "57600"
#ENDIF
#IF ((DEFSERCFG & %1111100000000) == SER_BAUD115200
.ECHO "115200"
SYSECHO "115200"
#ENDIF
.ECHO " BAUD\n"
SYSECHO " BAUD\n"
#ENDIF
;
;
;
#IF (BIOS == BIOS_WBW)
.ECHO "MEMORY MANAGER: "
SYSECHO "MEMORY MANAGER: "
#IF (MEMMGR == MM_SBC)
.ECHO "N8VEM (SBC)"
SYSECHO "N8VEM (SBC)"
#ENDIF
#IF (MEMMGR == MM_Z2)
.ECHO "ZETA 2 (Z2)"
SYSECHO "ZETA 2 (Z2)"
#ENDIF
#IF (MEMMGR == MM_N8)
.ECHO "N8 ONBOARD (N8)"
SYSECHO "N8 ONBOARD (N8)"
#ENDIF
#IF (MEMMGR == MM_Z180)
.ECHO "Z180 NATIVE (Z180)"
SYSECHO "Z180 NATIVE (Z180)"
#ENDIF
#IF (MEMMGR == MM_Z280)
.ECHO "Z280 NATIVE (Z280)"
SYSECHO "Z280 NATIVE (Z280)"
#ENDIF
#IF (MEMMGR == MM_ZRC)
.ECHO "ZRC ONBOARD (ZRC)"
SYSECHO "ZRC ONBOARD (ZRC)"
#ENDIF
#IF (MEMMGR == MM_MBC)
.ECHO "NHYODYNE (MBC)"
SYSECHO "NHYODYNE (MBC)"
#ENDIF
#IF (MEMMGR == MM_RPH)
.ECHO "RHYOPHYRE ONBOARD (RPH)"
SYSECHO "RHYOPHYRE ONBOARD (RPH)"
#ENDIF
#IF (MEMMGR == MM_MON)
.ECHO "MONSPUTER ONBOARD (MON)"
SYSECHO "MONSPUTER ONBOARD (MON)"
#ENDIF
.ECHO "\n"
SYSECHO "\n"
#ENDIF
;
.ECHO "ROM SIZE: "
.ECHO ROMSIZE
.ECHO " KB\n"
SYSECHO "ROM SIZE: "
SYSECHO ROMSIZE
SYSECHO " KB\n"
;
.ECHO "RAM SIZE: "
.ECHO RAMSIZE
.ECHO " KB\n"
SYSECHO "RAM SIZE: "
SYSECHO RAMSIZE
SYSECHO " KB\n"
;
; MEMORY BANK CONFIGURATION
;
@ -832,11 +837,26 @@ BID_ROMD0 .EQU 0 ; NO ROM DRIVE
;
#ENDIF
;
#IF ((!MDRAM) | (RAMD_BNKS <= 0))
BID_RAMD0 .SET $FF
MDRAM .SET FALSE
#ENDIF
;
#IF ((!MDROM) | (ROMD_BNKS <= 0))
BID_ROMD0 .SET $FF
MDROM .SET FALSE
#ENDIF
;
APP_BNKS .SET BID_BUF - BID_APP0
;
BID_RAMDN .EQU BID_RAMD0 + RAMD_BNKS - 1 ; LAST RAM DRIVE BANK
BID_ROMDN .EQU BID_ROMD0 + ROMD_BNKS - 1 ; LAST ROM DRIVE BANK
BID_APPN .EQU BID_APP0 + APP_BNKS - 1 ; LAST APP BANK
#IF (APP_BNKS <= 0)
BID_APP0 .SET $FF
APP_BNKS .SET 0
#ENDIF
;
;;;BID_RAMDN .EQU BID_RAMD0 + RAMD_BNKS - 1 ; LAST RAM DRIVE BANK
;;;BID_ROMDN .EQU BID_ROMD0 + ROMD_BNKS - 1 ; LAST ROM DRIVE BANK
;;;BID_APPN .EQU BID_APP0 + APP_BNKS - 1 ; LAST APP BANK
;
#IF TRUE
.ECHO "------------- CAPACITY -----------------\n"
@ -856,12 +876,12 @@ BID_APPN .EQU BID_APP0 + APP_BNKS - 1 ; LAST APP BANK
.ECHO "BID_IMG1: " \ .ECHO BID_IMG1 \ .ECHO "\n"
.ECHO "BID_IMG2: " \ .ECHO BID_IMG2 \ .ECHO "\n"
.ECHO "BID_ROMD0: " \ .ECHO BID_ROMD0 \ .ECHO "\n"
.ECHO "BID_ROMDN: " \ .ECHO BID_ROMDN \ .ECHO "\n"
;;; .ECHO "BID_ROMDN: " \ .ECHO BID_ROMDN \ .ECHO "\n"
.ECHO "BID_BIOS: " \ .ECHO BID_BIOS \ .ECHO "\n"
.ECHO "BID_RAMD0: " \ .ECHO BID_RAMD0 \ .ECHO "\n"
.ECHO "BID_RAMDN: " \ .ECHO BID_RAMDN \ .ECHO "\n"
;;; .ECHO "BID_RAMDN: " \ .ECHO BID_RAMDN \ .ECHO "\n"
.ECHO "BID_APP0: " \ .ECHO BID_APP0 \ .ECHO "\n"
.ECHO "BID_APPN: " \ .ECHO BID_APPN \ .ECHO "\n"
;;; .ECHO "BID_APPN: " \ .ECHO BID_APPN \ .ECHO "\n"
.ECHO "BID_BUF: " \ .ECHO BID_BUF \ .ECHO "\n"
.ECHO "BID_AUX: " \ .ECHO BID_AUX \ .ECHO "\n"
.ECHO "BID_USR: " \ .ECHO BID_USR \ .ECHO "\n"
@ -1089,6 +1109,8 @@ Z180_CNTR_DEF .EQU $06 ; DEFAULT VALUE FOR Z180 CSIO CONFIG
;
; HELPER MACROS
;
#DEFINE ALIGN(N) .FILL ((($+(N-1)) & ~(N-1)) - $)
;
#DEFINE PRTC(C) CALL PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X')
#DEFINE PRTS(S) CALL PRTSTRD \ .TEXT S ; PRINT STRING S TO CONSOLE - PRTD("HELLO")
#DEFINE PRTX(X) CALL PRTSTRI \ .DW X ; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO)

24
Source/HBIOS/syq.asm
View File

@ -1447,16 +1447,16 @@ SYQ0_CFG: ; DEVICE 0
.DW 0,0 ; DEVICE CAPACITY
.DW 0,0 ; CURRENT LBA
;
.ECHO "SYQ: MODE="
DEVECHO "SYQ: MODE="
#IF (SYQMODE == SYQMODE_SPP)
.ECHO "SPP"
DEVECHO "SPP"
#ENDIF
#IF (SYQMODE == SYQMODE_MG014)
.ECHO "MG014"
DEVECHO "MG014"
#ENDIF
.ECHO ", IO="
.ECHO SYQ0BASE
.ECHO "\n"
DEVECHO ", IO="
DEVECHO SYQ0BASE
DEVECHO "\n"
#ENDIF
;
#IF (SYQCNT >= 2)
@ -1469,16 +1469,16 @@ SYQ1_CFG: ; DEVICE 1
.DW 0,0 ; DEVICE CAPACITY
.DW 0,0 ; CURRENT LBA
;
.ECHO "SYQ: MODE="
DEVECHO "SYQ: MODE="
#IF (SYQMODE == SYQMODE_SPP)
.ECHO "SPP"
DEVECHO "SPP"
#ENDIF
#IF (SYQMODE == SYQMODE_MG014)
.ECHO "MG014"
DEVECHO "MG014"
#ENDIF
.ECHO ", IO="
.ECHO SYQ1BASE
.ECHO "\n"
DEVECHO ", IO="
DEVECHO SYQ1BASE
DEVECHO "\n"
#ENDIF
;
#IF ($ - SYQ_CFG) != (SYQCNT * SYQ_CFGSIZ)

30
Source/HBIOS/tms.asm
View File

@ -43,24 +43,24 @@
TMSCTRL1: .EQU 1 ; CONTROL BITS
TMSINTEN: .EQU 5 ; INTERRUPT ENABLE BIT
;
.ECHO "TMS: MODE="
DEVECHO "TMS: MODE="
;
#IF ((TMSMODE == TMSMODE_MSX) | (TMSMODE == TMSMODE_MSX9958))
TMS_DATREG .EQU $98 ; READ/WRITE DATA
TMS_CMDREG .EQU $99 ; READ STATUS / WRITE REG SEL
;
#IF (TMSMODE == TMSMODE_MSX)
.ECHO "MSX"
DEVECHO "MSX"
#ENDIF
#IF (TMSMODE == TMSMODE_MSX9958)
.ECHO "MSX9958"
DEVECHO "MSX9958"
#ENDIF
#ENDIF
;
#IF (TMSMODE == TMSMODE_COLECO)
TMS_DATREG .EQU $BE ; READ/WRITE DATA
TMS_CMDREG .EQU $BF ; READ STATUS / WRITE REG SEL
.ECHO "COLECO"
DEVECHO "COLECO"
#ENDIF
;
#IF (TMSMODE == TMSMODE_MSXKBD)
@ -68,7 +68,7 @@ TMS_DATREG .EQU $98 ; READ/WRITE DATA
TMS_CMDREG .EQU $99 ; READ STATUS / WRITE REG SEL
TMS_KBDDATA .EQU $E0 ; KBD CTLR DATA PORT
TMS_KBDST .EQU $E1 ; KBD CTLR STATUS/CMD PORT
.ECHO "MSXKBD"
DEVECHO "MSXKBD"
#ENDIF
;
#IF (TMSMODE == TMSMODE_N8)
@ -78,14 +78,14 @@ TMS_PPIA .EQU $84 ; PPI PORT A
TMS_PPIB .EQU $85 ; PPI PORT B
TMS_PPIC .EQU $86 ; PPI PORT C
TMS_PPIX .EQU $87 ; PPI CONTROL PORT
.ECHO "N8"
DEVECHO "N8"
#ENDIF
;
#IF (TMSMODE == TMSMODE_SCG)
TMS_DATREG .EQU $98 ; READ/WRITE DATA
TMS_CMDREG .EQU $99 ; READ STATUS / WRITE REG SEL
TMS_ACR .EQU $9C ; AUX CONTROL REGISTER
.ECHO "SCG"
DEVECHO "SCG"
#ENDIF
;
#IF (TMSMODE == TMSMODE_MBC)
@ -94,7 +94,7 @@ TMS_CMDREG .EQU $99 ; READ STATUS / WRITE REG SEL
TMS_ACR .EQU $9C ; AUX CONTROL REGISTER
TMS_KBDDATA .EQU $E2 ; KBD CTLR DATA PORT
TMS_KBDST .EQU $E3 ; KBD CTLR STATUS/CMD PORT
.ECHO "MBC"
DEVECHO "MBC"
#ENDIF
#IF (TMSMODE == TMSMODE_DUO)
@ -103,7 +103,7 @@ TMS_CMDREG .EQU $A1 ; READ STATUS / WRITE REG SEL
TMS_ACR .EQU $A6 ; AUX CONTROL REGISTER
TMS_KBDDATA .EQU $4C ; KBD CTLR DATA PORT
TMS_KBDST .EQU $4D ; KBD CTLR STATUS/CMD PORT
.ECHO "DUO"
DEVECHO "DUO"
#ENDIF
;
#IF ((TMSMODE == TMSMODE_NABU40) | (TMSMODE == TMSMODE_NABU80))
@ -111,19 +111,19 @@ TMS_DATREG .EQU $A0 ; READ/WRITE DATA
TMS_CMDREG .EQU $A1 ; READ STATUS / WRITE REG SEL
;
#IF (TMSMODE == TMSMODE_NABU40)
.ECHO "NABU-40"
DEVECHO "NABU-40"
#ENDIF
#IF (TMSMODE == TMSMODE_NABU80)
.ECHO "NABU-80"
DEVECHO "NABU-80"
#ENDIF
#ENDIF
;
.ECHO ", IO="
.ECHO TMS_DATREG
DEVECHO ", IO="
DEVECHO TMS_DATREG
#IF TMSTIMENABLE
.ECHO ", INTERRUPTS ENABLED"
DEVECHO ", INTERRUPTS ENABLED"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
;
TMS_ROWS .EQU 24
;

82
Source/HBIOS/uart.asm
View File

@ -1033,12 +1033,12 @@ UART_CFG_SBC:
.DW UARTCFG ; LINE CONFIGURATION
.DW UARTSBC_RCVBUF ; POINTER TO RCV BUFFER STRUCT
;
.ECHO "UART: MODE=SBC, IO="
.ECHO UARTSBASE
DEVECHO "UART: MODE=SBC, IO="
DEVECHO UARTSBASE
#IF ((UARTINTS) & (INTMODE > 0))
.ECHO ", INTERRUPTS ENABLED"
DEVECHO ", INTERRUPTS ENABLED"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
#ENDIF
#IF (UARTAUX)
UART_CFG_AUX:
@ -1050,9 +1050,9 @@ UART_CFG_AUX:
.DW UARTCFG ; LINE CONFIGURATION
.DW 0 ; NO INT HANDLER
;
.ECHO "UART: MODE=AUX, IO="
.ECHO UARTABASE
.ECHO "\n"
DEVECHO "UART: MODE=AUX, IO="
DEVECHO UARTABASE
DEVECHO "\n"
#ENDIF
#IF (UARTCAS)
UART_CFG_CAS:
@ -1064,12 +1064,12 @@ UART_CFG_CAS:
.DW UARTCASSPD ; LINE CONFIGURATION
.DW UARTCAS_RCVBUF ; POINTER TO RCV BUFFER STRUCT
;
.ECHO "UART: MODE=CAS, IO="
.ECHO UARTCBASE
DEVECHO "UART: MODE=CAS, IO="
DEVECHO UARTCBASE
#IF ((UARTINTS) & (INTMODE > 0))
.ECHO ", INTERRUPTS ENABLED"
DEVECHO ", INTERRUPTS ENABLED"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
#ENDIF
#IF (UARTMFP)
UART_CFG_MFP:
@ -1081,9 +1081,9 @@ UART_CFG_MFP:
.DW UARTCFG ; LINE CONFIGURATION
.DW 0 ; SHOULD NEVER NEED INT HANDLER
;
.ECHO "UART: MODE=MFP, IO="
.ECHO UARTSBASE
.ECHO "\n"
DEVECHO "UART: MODE=MFP, IO="
DEVECHO UARTSBASE
DEVECHO "\n"
#ENDIF
#IF (UART4)
; 4UART SERIAL PORT A
@ -1094,9 +1094,9 @@ UART_CFG_MFP:
.DW UARTCFG ; LINE CONFIGURATION
.DW 0 ; SHOULD NEVER NEED INT HANDLER
;
.ECHO "UART: MODE=4UART, IO="
.ECHO UART4BASE+0
.ECHO "\n"
DEVECHO "UART: MODE=4UART, IO="
DEVECHO UART4BASE+0
DEVECHO "\n"
;
; 4UART SERIAL PORT B
.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
@ -1106,9 +1106,9 @@ UART_CFG_MFP:
.DW UARTCFG ; LINE CONFIGURATION
.DW 0 ; SHOULD NEVER NEED INT HANDLER
;
.ECHO "UART: MODE=4UART, IO="
.ECHO UART4BASE+8
.ECHO "\n"
DEVECHO "UART: MODE=4UART, IO="
DEVECHO UART4BASE+8
DEVECHO "\n"
;
; 4UART SERIAL PORT C
.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
@ -1118,9 +1118,9 @@ UART_CFG_MFP:
.DW UARTCFG ; LINE CONFIGURATION
.DW 0 ; SHOULD NEVER NEED INT HANDLER
;
.ECHO "UART: MODE=4UART, IO="
.ECHO UART4BASE+16
.ECHO "\n"
DEVECHO "UART: MODE=4UART, IO="
DEVECHO UART4BASE+16
DEVECHO "\n"
;
; 4UART SERIAL PORT D
.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
@ -1130,9 +1130,9 @@ UART_CFG_MFP:
.DW UARTCFG ; LINE CONFIGURATION
.DW 0 ; SHOULD NEVER NEED INT HANDLER
;
.ECHO "UART: MODE=4UART, IO="
.ECHO UART4BASE+24
.ECHO "\n"
DEVECHO "UART: MODE=4UART, IO="
DEVECHO UART4BASE+24
DEVECHO "\n"
#ENDIF
#IF (UARTRC)
; UARTRC SERIAL PORT A
@ -1143,9 +1143,9 @@ UART_CFG_MFP:
.DW UARTCFG ; LINE CONFIGURATION
.DW 0 ; SHOULD NEVER NEED INT HANDLER
;
.ECHO "UART: MODE=RC, IO="
.ECHO UARTRBASE+0
.ECHO "\n"
DEVECHO "UART: MODE=RC, IO="
DEVECHO UARTRBASE+0
DEVECHO "\n"
;
; UARTRC SERIAL PORT B
.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
@ -1155,9 +1155,9 @@ UART_CFG_MFP:
.DW UARTCFG ; LINE CONFIGURATION
.DW 0 ; SHOULD NEVER NEED INT HANDLER
;
.ECHO "UART: MODE=RC, IO="
.ECHO UARTRBASE+8
.ECHO "\n"
DEVECHO "UART: MODE=RC, IO="
DEVECHO UARTRBASE+8
DEVECHO "\n"
;
#ENDIF
#IF (UARTDUAL)
@ -1176,13 +1176,13 @@ UART_CFG_MFP:
.DW UARTCFG ; LINE CONFIGURATION
.DW 0 ; SHOULD NEVER NEED INT HANDLER
;
.ECHO "UART: MODE=DUAL, IO="
.ECHO UARTDBASE+8
.ECHO "\n"
DEVECHO "UART: MODE=DUAL, IO="
DEVECHO UARTDBASE+8
DEVECHO "\n"
;
.ECHO "UART: MODE=DUAL, IO="
.ECHO UARTDBASE+0
.ECHO "\n"
DEVECHO "UART: MODE=DUAL, IO="
DEVECHO UARTDBASE+0
DEVECHO "\n"
;
#ENDIF
#IF (UARTNABU)
@ -1193,9 +1193,9 @@ UART_CFG_MFP:
.DW UARTCFG ; LINE CONFIGURATION
.DW 0 ; SHOULD NEVER NEED INT HANDLER
;
.ECHO "UART: MODE=NABU, IO="
.ECHO UARTNBASE
.ECHO "\n"
DEVECHO "UART: MODE=NABU, IO="
DEVECHO UARTNBASE
DEVECHO "\n"
#ENDIF
;
UART_CNT .EQU ($ - UART_CFG) / 8

6
Source/HBIOS/uf.asm
View File

@ -24,9 +24,9 @@ UF_USB_ACTIVE .DB 0 ; USB CABLE CONNECTED STATUS FLAG
;
UF_CFG: .DW SER_9600_8N1 ; DUMMY CONFIGURATION
;
.ECHO "USB-FIFO: IO="
.ECHO UFBASE
.ECHO "\n"
DEVECHO "USB-FIFO: IO="
DEVECHO UFBASE
DEVECHO "\n"
;
; SETUP THE DISPATCH TABLE ENTRY AND INITIALIZE HARDWARE
;

10
Source/HBIOS/vdu.asm
View File

@ -83,11 +83,11 @@ VDU_R10 .EQU (VDU_BLNK + DSCANL-1)
VDU_R11 .EQU DSCANL-1
#ENDIF
;
.ECHO "VDU: IO="
.ECHO VDU_RAMRD
.ECHO ", PPK IO="
.ECHO VDU_PPIA
.ECHO "\n"
DEVECHO "VDU: IO="
DEVECHO VDU_RAMRD
DEVECHO ", PPK IO="
DEVECHO VDU_PPIA
DEVECHO "\n"
;
;======================================================================
; VDU DRIVER - INITIALIZATION

14
Source/HBIOS/vga.asm
View File

@ -21,13 +21,13 @@ VGA_HI .EQU VGA_BASE + $05 ; BOARD RAM HI ADDRESS
VGA_LO .EQU VGA_BASE + $06 ; BOARD RAM LO ADDRESS
VGA_DAT .EQU VGA_BASE + $07 ; BOARD RAM BYTE R/W
;
.ECHO "VGA: "
.ECHO "IO="
.ECHO VGA_BASE
.ECHO ", KBD MODE=PS/2"
.ECHO ", KBD IO="
.ECHO VGA_KBDDATA
.ECHO "\n"
DEVECHO "VGA: "
DEVECHO "IO="
DEVECHO VGA_BASE
DEVECHO ", KBD MODE=PS/2"
DEVECHO ", KBD IO="
DEVECHO VGA_KBDDATA
DEVECHO "\n"
;
VGA_NOBL .EQU 00000000B ; NO BLINK
VGA_NOCU .EQU 00100000B ; NO CURSOR

12
Source/HBIOS/vrc.asm
View File

@ -27,12 +27,12 @@ VRC_COLS .EQU 64
TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER
KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT
;
.ECHO "VRC: IO="
.ECHO VRC_BASE
.ECHO ", KBD MODE=VRC"
.ECHO ", KBD IO="
.ECHO VRC_KBDDATA
.ECHO "\n"
DEVECHO "VRC: IO="
DEVECHO VRC_BASE
DEVECHO ", KBD MODE=VRC"
DEVECHO ", KBD IO="
DEVECHO VRC_KBDDATA
DEVECHO "\n"
;
;======================================================================
; VRC DRIVER - INITIALIZATION

6
Source/HBIOS/ym2612.asm
View File

@ -39,9 +39,9 @@ YM_DEBUG .EQU 0 ; CHANGE TO 1 TO ENABLE DEBUGGING
YM_RSTCFG .EQU 0 ; SET TO 1 FOR FULL REGISTER CLEAR
YM_FAST3438 .EQU 0 ; FAST CPU'S WITH A YM3438 MAY REQUIRE A DELAY
;
.ECHO "YM: IO="
.ECHO YMSEL
.ECHO "\n"
DEVECHO "YM: IO="
DEVECHO YMSEL
DEVECHO "\n"
;
;------------------------------------------------------------------------------
; Driver function table and instance data

8
Source/HBIOS/z2u.asm
View File

@ -716,12 +716,12 @@ Z2U0_CFG:
.DW Z2U0_RCVBUF ; POINTER TO RCV BUFFER STRUCT
;
;
.ECHO "Z2U: IO="
.ECHO Z2U0BASE
DEVECHO "Z2U: IO="
DEVECHO Z2U0BASE
#IF (INTMODE == 3)
.ECHO ", INTERRUPTS ENABLED"
DEVECHO ", INTERRUPTS ENABLED"
#ENDIF
.ECHO "\n"
DEVECHO "\n"
;
Z2U_CFGSIZ .EQU $ - Z2U_CFG ; SIZE OF ONE CFG TABLE ENTRY

2
Source/ver.inc
View File

@ -2,7 +2,7 @@
#DEFINE RMN 5
#DEFINE RUP 0
#DEFINE RTP 0
#DEFINE BIOSVER "3.5.0-dev.31"
#DEFINE BIOSVER "3.5.0-dev.34"
#define rmj RMJ
#define rmn RMN
#define rup RUP

2
Source/ver.lib
View File

@ -3,5 +3,5 @@ rmn equ 5
rup equ 0
rtp equ 0
biosver macro
db "3.5.0-dev.31"
db "3.5.0-dev.34"
endm

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