From 427c762eecb0bae3171e4e99979649375387a383 Mon Sep 17 00:00:00 2001
From: b1ackmai1er <difficultylevelhigh@gmail.com>
Date: Sat, 26 Sep 2020 11:55:31 +0800
Subject: [PATCH] Update flashfs.asm

Implement Chip Erase
---
 Source/HBIOS/flashfs.asm | 80 +++++++++++++++++++++++++++++++++++++++-
 1 file changed, 78 insertions(+), 2 deletions(-)

diff --git a/Source/HBIOS/flashfs.asm b/Source/HBIOS/flashfs.asm
index baf6af34..7955dd2f 100644
--- a/Source/HBIOS/flashfs.asm
+++ b/Source/HBIOS/flashfs.asm
@@ -2,7 +2,8 @@
 ;==================================================================================================
 ;   FLASH DRIVER FOR FLASH & EEPROM PROGRAMMING 
 ;
-;	26 SEP 2020 - CURRENTLY ONLY IMPLEMENTS CHIP IDENTIFICATION -- PHIL SUMMERS
+;	26 SEP 2020 - CHIP IDENTIFICATION IMPLMENTED -- PHIL SUMMERS
+;		    - CHIP ERASE IMPLEMENTED
 ;==================================================================================================
 ;
 ;	UPPER RAM BANK IS ALWAYS AVAILABLE REGARDLESS OF MEMORY BANK SELECTION. HBX_BNKSEL AND
@@ -59,7 +60,7 @@ FF_NXT1:LD	A,(HL)
 	INC	HL
 	INC	HL
 	JR	FF_NXT2			; MATCH SO EXIT
-
+;
 FF_NXT0:PUSH	BC			; WE DIDN'T MATCH SO POINT
 	LD	BC,17			; TO THE NEXT TABLE ENTRY
 	ADD	HL,BC
@@ -109,6 +110,81 @@ FF_IDENT:				; FLASH ROM ID CODE			``
 ;
 FF_I_SZ	.EQU	$-FF_IDENT
 ;
+;======================================================================
+; ERASE FLASH CHIP.
+;======================================================================
+;
+FF_INIT_E:
+	LD	(FF_STACK),SP		; SAVE STACK
+	LD	HL,(FF_STACK)
+;
+	LD	BC,FF_E_SZ		; CODE SIZE REQUIRED
+	CCF				; CREATE A RELOCATABLE
+	SBC	HL,BC			; CODE BUFFER IN THE
+	LD	SP,HL			; STACK AREA
+;
+	PUSH	HL			; SAVE THE EXECUTE ADDRESS
+	EX	DE,HL			; PUT EXECUTE / START ADDRESS IN DE
+	LD	HL,FF_ERASE		; COPY OUR RELOCATABLE
+	LDIR				; CODE TO THE BUFFER
+;
+	LD	A,(HB_CURBNK)		; WE ARE STARTING IN HB_CURBNK
+	LD	B,A			; WHICH IS THE RAM COPY OF THE BIOS
+	LD	A,BID_BOOT		; BID_BOOT IS ROM BANK 0
+;
+	POP	HL			; CALL OUR RELOCATABLE CODE
+	CALL	JPHL
+;
+	LD	HL,(FF_STACK)		; RESTORE ORIGINAL 
+	LD	SP,HL			; STACK POSITION
+;
+	XOR	A
+	RET
+;
+;======================================================================
+; ERASE FLASH CHIP. THIS CODE IS RELOCATED AND EXECUTED IN THE STACK.
+; IT SWITCHES THE BOTTOM BANK TO ROM BANK 0 I.E. BOTTOM OF CHIP ADDRESS RANGE.
+; RETURNS THE BOTTOM BANK TO INITIAL STATE. ERASE COMMAND IS ISSUED TO
+; THE FLASH CHIP AND THEN TOGGLE BIT IS MONITORED FOR COMPLETION.
+;======================================================================
+;
+FF_ERASE:
+	HB_DI
+	CALL	HBX_BNKSEL		; SELECT ROM BANK 0
+;
+	LD	A,$AA			; SET CHIP ERASE
+	LD	($5555),A
+;
+	LD	A,$55
+	LD	($2AAA),A
+;
+	LD	A,$80
+	LD	($5555),A
+;
+	LD	A,$AA
+	LD	($5555),A
+;
+	LD	A,$55
+	LD	($2AAA),A
+;
+	LD	A,$10
+	LD	($5555),A
+;
+	LD	HL,$5555		; WAIT FOR TOGGLE
+FF_WAIT:LD	A,(HL)			; BIT CHANGE
+	CP	(HL)
+	JR	NZ,FF_WAIT
+	LD	A,(HL)
+	LD	A,(HL)
+;
+	LD	A,B			; RETURN TO ORIGINAL BANK
+	CALL	HBX_BNKSEL		; WHICH IS OUR RAM BIOS COPY
+	HB_EI
+;
+	RET
+;
+FF_E_SZ	.EQU	$-FF_ERASE
+;
 ;	FLASH STYLE
 ;
 ST_NORMAL	.EQU	0