diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt
index 3dbc8c4d..7f3b22c9 100644
--- a/Doc/ChangeLog.txt
+++ b/Doc/ChangeLog.txt
@@ -13,6 +13,7 @@ Version 2.9.1
 - WBW: Preliminary support for RC180 platform (Z180 module in RC2014)
 - WBW: Added NZCOM distribution files to third slice of hard disk image
 - WBW: Fixed getnum32 bug in MODE command (found by Phil Summers)
+- P?S: Added serial support for Zilog Peripherals Baord
 
 Version 2.9.0
 -------------
diff --git a/ReadMe.txt b/ReadMe.txt
index 4b41fbdf..8067f003 100644
--- a/ReadMe.txt
+++ b/ReadMe.txt
@@ -7,7 +7,7 @@
 ***********************************************************************
 
 Wayne Warthen (wwarthen@gmail.com)
-Version 2.9.1-pre.5, 2018-06-06
+Version 2.9.1-pre.6, 2018-08-01
 https://www.retrobrewcomputers.org/
 
 RomWBW is a ROM-based implementation of CP/M-80 2.2 and Z-System for 
diff --git a/Source/CBIOS/ver.inc b/Source/CBIOS/ver.inc
index 5554ec7e..1f3e0de7 100644
--- a/Source/CBIOS/ver.inc
+++ b/Source/CBIOS/ver.inc
@@ -2,4 +2,4 @@
 #DEFINE	RMN	9
 #DEFINE	RUP	1
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"2.9.1-pre.5"
+#DEFINE BIOSVER	"2.9.1-pre.6"
diff --git a/Source/HBIOS/cfg_rc.asm b/Source/HBIOS/cfg_rc.asm
index 5ceec867..6ccd56e6 100644
--- a/Source/HBIOS/cfg_rc.asm
+++ b/Source/HBIOS/cfg_rc.asm
@@ -25,11 +25,11 @@ UARTENABLE	.EQU	FALSE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TR
 UARTOSC		.EQU	1843200		; UART OSC FREQUENCY
 ACIAENABLE	.EQU	TRUE		; TRUE FOR MOTOROLA 6850 ACIA SUPPORT
 ;
-SIOENABLE	.EQU	TRUE		; TRUE FOR ZILOG SIO SUPPORT									;PS 
-SIOMODE		.EQU	SIOMODE_RC	; SIOMODE_RC, SIOMODE_SMB, SIOMODE_ZP							;PS
-DEFSIOACFG	.EQU	DEFSERCFG	; DEFAULT SERIAL LINE CONFIG								;PS
-DEFSIOBCFG	.EQU	DEFSERCFG	; DEFAULT SERIAL LINE CONFIG								;PS
-DEFSIODIV	.EQU	1			; 1=RC2014/SMB, 2/4/8/16/32/64/128/256=ZP depending on jumper X5    ;PS
+SIOENABLE	.EQU	TRUE		; TRUE FOR ZILOG SIO SUPPORT						;PS 
+SIOMODE		.EQU	SIOMODE_RC	; SIOMODE_RC, SIOMODE_SMB, SIOMODE_ZP					;PS
+DEFSIOACFG	.EQU	DEFSERCFG	; DEFAULT SERIAL LINE CONFIG						;PS
+DEFSIOBCFG	.EQU	DEFSERCFG	; DEFAULT SERIAL LINE CONFIG						;PS
+DEFSIODIV	.EQU	1		; 1=RC2014/SMB, 2/4/8/16/32/64/128/256=ZP depending on jumper X5	;PS
 DEFSIOCLK	.EQU	CPUOSC		; 2457600/4915200=ZP,7372800=RC/SMB - SIO FIXED OSC FREQUENCY		;PS
 SIODEBUG	.EQU	FALSE		;PS
 ;
diff --git a/Source/HBIOS/cfg_sbc.asm b/Source/HBIOS/cfg_sbc.asm
index ad320eed..7b6d0c5b 100644
--- a/Source/HBIOS/cfg_sbc.asm
+++ b/Source/HBIOS/cfg_sbc.asm
@@ -25,11 +25,11 @@ UARTENABLE	.EQU	TRUE		; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRU
 UARTOSC		.EQU	1843200		; UART OSC FREQUENCY
 ACIAENABLE	.EQU	FALSE		; TRUE FOR MOTOROLA 6850 ACIA SUPPORT
 ;
-SIOENABLE	.EQU	TRUE		; TRUE FOR ZILOG SIO SUPPORT									;PS 
-SIOMODE		.EQU	SIOMODE_ZP	; SIOMODE_RC, SIOMODE_SMB, SIOMODE_ZP							;PS
-DEFSIOACFG	.EQU	SER_9600_8N1	; DEFAULT SERIAL LINE CONFIG								;PS
-DEFSIOBCFG	.EQU	SER_9600_8N1	; DEFAULT SERIAL LINE CONFIG								;PS
-DEFSIODIV	.EQU	8			; 1=RC2014, SMB, 2/4/8/16/32/64/128/256 for ZP depending on jumper X5                    ;PS
+SIOENABLE	.EQU	TRUE		; TRUE FOR ZILOG SIO SUPPORT						;PS 
+SIOMODE		.EQU	SIOMODE_ZP	; SIOMODE_RC, SIOMODE_SMB, SIOMODE_ZP					;PS
+DEFSIOACFG	.EQU	SER_9600_8N1	; DEFAULT SERIAL LINE CONFIG						;PS
+DEFSIOBCFG	.EQU	SER_9600_8N1	; DEFAULT SERIAL LINE CONFIG						;PS
+DEFSIODIV	.EQU	8		; 1=RC2014, SMB, 2/4/8/16/32/64/128/256 for ZP depending on jumper X5	;PS
 DEFSIOCLK	.EQU	4915200		; 2457600/4915200=ZP,7372800=RC/SMB - SIO FIXED OSC FREQUENCY		;PS
 SIODEBUG	.EQU	TRUE		;PS
 ;
diff --git a/Source/HBIOS/sio.asm b/Source/HBIOS/sio.asm
index bf26c114..0e95cc28 100644
--- a/Source/HBIOS/sio.asm
+++ b/Source/HBIOS/sio.asm
@@ -15,25 +15,25 @@ SIO_NONE	.EQU	0
 SIO_SIO		.EQU	1
 ;               
 #IF (SIOMODE == SIOMODE_RC)
-SIOA_CMD	.EQU	SIOBASE + $00      ;PS	
-SIOA_DAT	.EQU	SIOBASE + $01      ;PS 
-SIOB_CMD	.EQU	SIOBASE + $02      ;PS 
-SIOB_DAT	.EQU	SIOBASE + $03      ;PS
-#ENDIF
-;
-#IF (SIOMODE == SIOMODE_SMB)
-SIOA_CMD	.EQU	SIOBASE + $02      ;PS
-SIOA_DAT	.EQU	SIOBASE + $00      ;PS
-SIOB_CMD	.EQU	SIOBASE + $03      ;PS
-SIOB_WR4	.EQU	SIOBASE + $01      ;PS
+SIOA_CMD	.EQU	SIOBASE + $00	;PS	
+SIOA_DAT	.EQU	SIOBASE + $01	;PS 
+SIOB_CMD	.EQU	SIOBASE + $02	;PS 
+SIOB_DAT	.EQU	SIOBASE + $03	;PS
+#ENDIF	
+;	
+#IF (SIOMODE == SIOMODE_SMB)	
+SIOA_CMD	.EQU	SIOBASE + $02	;PS
+SIOA_DAT	.EQU	SIOBASE + $00	;PS
+SIOB_CMD	.EQU	SIOBASE + $03	;PS
+SIOB_WR4	.EQU	SIOBASE + $01	;PS
 #ENDIF
 ;
-#IF (SIOMODE == SIOMODE_ZP)	;PS	
-SIOA_CMD	.EQU	SIOBASE + $06		;PS
-SIOA_DAT	.EQU	SIOBASE + $04		;PS 
-SIOB_CMD	.EQU	SIOBASE + $07		;PS 
-SIOB_DAT	.EQU	SIOBASE + $05		;PS 
-#ENDIF						            ;PS 
+#IF (SIOMODE == SIOMODE_ZP)		;PS	
+SIOA_CMD	.EQU	SIOBASE + $06	;PS
+SIOA_DAT	.EQU	SIOBASE + $04	;PS 
+SIOB_CMD	.EQU	SIOBASE + $07	;PS 
+SIOB_DAT	.EQU	SIOBASE + $05	;PS 
+#ENDIF					;PS 
 ;
 
 #IF (DEFSIOCLK/DEFSIODIV/1 ==     75) 
@@ -78,10 +78,10 @@ SIOBAUD1  .EQU 12
 #IF (DEFSIOCLK/DEFSIODIV/1 == 614400) 
 SIOBAUD1  .EQU 13 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/1 =1228800) 
+#IF (DEFSIOCLK/DEFSIODIV/1 ==1228800) 
 SIOBAUD1  .EQU 14 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/1 =2457600) 
+#IF (DEFSIOCLK/DEFSIODIV/1 ==2457600) 
 SIOBAUD1  .EQU 15 
 #ENDIF
 #IF (DEFSIOCLK/DEFSIODIV/1 ==    225) 
@@ -120,19 +120,19 @@ SIOBAUD1  .EQU 26
 #IF (DEFSIOCLK/DEFSIODIV/1 == 921600) 
 SIOBAUD1  .EQU 28 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/1 =1843200) 
+#IF (DEFSIOCLK/DEFSIODIV/1 ==1843200) 
 SIOBAUD1  .EQU 29 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/1 =3686400) 
+#IF (DEFSIOCLK/DEFSIODIV/1 ==3686400) 
 SIOBAUD1  .EQU 30 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/1 =7372800) 
+#IF (DEFSIOCLK/DEFSIODIV/1 ==7372800) 
 SIOBAUD1  .EQU 31 
 #ENDIF
 
 
 #IF (DEFSIOCLK/DEFSIODIV/16 ==     75) 
-SIOBAUD1 .EQU  0 
+SIOBAUD2 .EQU  0 
 #ENDIF
 #IF (DEFSIOCLK/DEFSIODIV/16 ==    150) 
 SIOBAUD2  .EQU  1 
@@ -173,10 +173,10 @@ SIOBAUD2  .EQU 12
 #IF (DEFSIOCLK/DEFSIODIV/16 == 614400) 
 SIOBAUD2  .EQU 13 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/16 =1228800) 
+#IF (DEFSIOCLK/DEFSIODIV/16 ==1228800) 
 SIOBAUD2  .EQU 14 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/16 =2457600) 
+#IF (DEFSIOCLK/DEFSIODIV/16 ==2457600) 
 SIOBAUD2  .EQU 15 
 #ENDIF
 #IF (DEFSIOCLK/DEFSIODIV/16 ==    225) 
@@ -228,197 +228,197 @@ SIOBAUD2  .EQU 30
 SIOBAUD2  .EQU 31 
 #ENDIF
 
-#IF (DEFSIOCLK/DEFSIODIV/32==     75) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==     75) 
 SIOBAUD3  .EQU  0 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==    150) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==    150) 
 SIOBAUD3  .EQU  1 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==    300) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==    300) 
 SIOBAUD3  .EQU  2 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==    600) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==    600) 
 SIOBAUD3  .EQU  3 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==   1200) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==   1200) 
 SIOBAUD3  .EQU  4 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==   2400) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==   2400) 
 SIOBAUD3  .EQU  5 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==   4800) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==   4800) 
 SIOBAUD3  .EQU  6 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==   9600) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==   9600) 
 SIOBAUD3  .EQU  7 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==  19200) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==  19200) 
 SIOBAUD3  .EQU  8 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==  38400) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==  38400) 
 SIOBAUD3  .EQU  9 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==  76800) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==  76800) 
 SIOBAUD3  .EQU 10 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32== 153600) 
+#IF (DEFSIOCLK/DEFSIODIV/32 == 153600) 
 SIOBAUD3  .EQU 11 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32== 307200) 
+#IF (DEFSIOCLK/DEFSIODIV/32 == 307200) 
 SIOBAUD3  .EQU 12 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32== 614400) 
+#IF (DEFSIOCLK/DEFSIODIV/32 == 614400) 
 SIOBAUD3  .EQU 13 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==1228800) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==1228800) 
 SIOBAUD3  .EQU 14 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==2457600) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==2457600) 
 SIOBAUD3  .EQU 15 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==    225) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==    225) 
 SIOBAUD3  .EQU 16 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==    450) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==    450) 
 SIOBAUD3  .EQU 17 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==    900) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==    900) 
 SIOBAUD3  .EQU 18 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==   1800) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==   1800) 
 SIOBAUD3  .EQU 19 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==   3600) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==   3600) 
 SIOBAUD3  .EQU 20 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==   7200) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==   7200) 
 SIOBAUD3  .EQU 21 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==  14400) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==  14400) 
 SIOBAUD3  .EQU 22 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==  28800) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==  28800) 
 SIOBAUD3  .EQU 23 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==  57600) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==  57600) 
 SIOBAUD3  .EQU 24 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32= 115200) 
+#IF (DEFSIOCLK/DEFSIODIV/32 == 115200) 
 SIOBAUD3  .EQU 25 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32= 230400) 
+#IF (DEFSIOCLK/DEFSIODIV/32 == 230400) 
 SIOBAUD3  .EQU 26 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32== 460800) 
+#IF (DEFSIOCLK/DEFSIODIV/32 == 460800) 
 SIOBAUD3  .EQU 27 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32== 921600) 
+#IF (DEFSIOCLK/DEFSIODIV/32 == 921600) 
 SIOBAUD3  .EQU 28 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==1843200) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==1843200) 
 SIOBAUD3  .EQU 29 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==3686400) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==3686400) 
 SIOBAUD3  .EQU 30 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/32==7372800) 
+#IF (DEFSIOCLK/DEFSIODIV/32 ==7372800) 
 SIOBAUD3  .EQU 31 
 #ENDIF
 
-#IF (DEFSIOCLK/DEFSIODIV/64==     75) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==     75) 
 SIOBAUD4  .EQU  0 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==    150) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==    150) 
 SIOBAUD4  .EQU  1 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==    300) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==    300) 
 SIOBAUD4  .EQU  2 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==    600) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==    600) 
 SIOBAUD4  .EQU  3 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==   1200) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==   1200) 
 SIOBAUD4  .EQU  4 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==   2400) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==   2400) 
 SIOBAUD4  .EQU  5 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==   4800) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==   4800) 
 SIOBAUD4  .EQU  6 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==  9600) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==  9600) 
 SIOBAUD4  .EQU  7 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==  19200) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==  19200) 
 SIOBAUD4  .EQU  8 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==  38400) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==  38400) 
 SIOBAUD4  .EQU  9 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==  76800) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==  76800) 
 SIOBAUD4  .EQU 10 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64== 153600) 
+#IF (DEFSIOCLK/DEFSIODIV/64 == 153600) 
 SIOBAUD4  .EQU 11 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64== 307200) 
+#IF (DEFSIOCLK/DEFSIODIV/64 == 307200) 
 SIOBAUD4  .EQU 12 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64== 614400) 
+#IF (DEFSIOCLK/DEFSIODIV/64 == 614400) 
 SIOBAUD4  .EQU 13 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==1228800) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==1228800) 
 SIOBAUD4  .EQU 14 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==2457600) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==2457600) 
 SIOBAUD4  .EQU 15 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==    225) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==    225) 
 SIOBAUD4  .EQU 16 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==    450) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==    450) 
 SIOBAUD4  .EQU 17 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==    900) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==    900) 
 SIOBAUD4  .EQU 18 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==   1800) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==   1800) 
 SIOBAUD4  .EQU 19 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==   3600) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==   3600) 
 SIOBAUD4  .EQU 20 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==   7200) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==   7200) 
 SIOBAUD4  .EQU 21 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==  14400) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==  14400) 
 SIOBAUD4  .EQU 22 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==  28800) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==  28800) 
 SIOBAUD4  .EQU 23 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==  57600) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==  57600) 
 SIOBAUD4  .EQU 24 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64== 115200) 
+#IF (DEFSIOCLK/DEFSIODIV/64 == 115200) 
 SIOBAUD4  .EQU 25 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64== 230400) 
+#IF (DEFSIOCLK/DEFSIODIV/64 == 230400) 
 SIOBAUD4  .EQU 26 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64== 460800) 
+#IF (DEFSIOCLK/DEFSIODIV/64 == 460800) 
 SIOBAUD4  .EQU 27 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64== 921600) 
+#IF (DEFSIOCLK/DEFSIODIV/64 == 921600) 
 SIOBAUD4  .EQU 28 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==1843200) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==1843200) 
 SIOBAUD4  .EQU 29 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==3686400) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==3686400) 
 SIOBAUD4  .EQU 30 
 #ENDIF
-#IF (DEFSIOCLK/DEFSIODIV/64==7372800) 
+#IF (DEFSIOCLK/DEFSIODIV/64 ==7372800) 
 SIOBAUD4  .EQU 31 
 #ENDIF
 
diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm
index e2e497d5..c197e897 100644
--- a/Source/HBIOS/std.asm
+++ b/Source/HBIOS/std.asm
@@ -77,6 +77,7 @@ DSRTCMODE_MFPIC	.EQU	2		; MF/PIC VARIANT
 SIOMODE_NONE	.EQU	0
 SIOMODE_RC	.EQU	1		; RC2014 SIO MODULE (SPENCER OWEN)
 SIOMODE_SMB	.EQU	2		; RC2014 SIO MODULE (SCOTT BAKER)
+SIOMODE_ZP	.EQU	3		; ZILOG PERIPHERALS BOARD
 ;
 ; FD MODE SELECTIONS
 ;
@@ -139,8 +140,8 @@ SER_STOP2	.EQU	1 << 2
 ; SERIAL BAUD RATES ENCODED AS V = 75 * 2^X * 3^Y
 ; AND STORED AS 5 BITS: YXXXX
 ;
-SER_BAUD75	.EQU	$00 << 8														;PS
-SER_BAUD150	.EQU	$01 << 8														;PS
+SER_BAUD75	.EQU	$00 << 8							;PS
+SER_BAUD150	.EQU	$01 << 8							;PS
 SER_BAUD300	.EQU	$02 << 8
 SER_BAUD600	.EQU	$03 << 8
 SER_BAUD1200	.EQU	$04 << 8
@@ -150,35 +151,35 @@ SER_BAUD9600	.EQU	$07 << 8
 SER_BAUD19200	.EQU	$08 << 8
 SER_BAUD38400	.EQU	$09 << 8
 SER_BAUD76800	.EQU	$0A << 8
-SER_BAUD153600	.EQU	$0B << 8													;PS
-SER_BAUD307200	.EQU	$0C << 8													;PS
-SER_BAUD614400	.EQU	$0D << 8													;PS
-SER_BAUD1228800	.EQU	$0E << 8													;PS
-SER_BAUD2457600	.EQU	$0F << 8													;PS
-SER_BAUD225	.EQU	$10 << 8														;PS
-SER_BAUD450	.EQU	$11 << 8														;PS
-SER_BAUD900	.EQU	$12 << 8														;PS
-SER_BAUD1800	.EQU	$13 << 8													;PS
-SER_BAUD3600	.EQU	$14 << 8													;PS
-SER_BAUD7200	.EQU	$15 << 8													;PS
-SER_BAUD14400	.EQU	$16 << 8													;PS
-SER_BAUD28800	.EQU	$17 << 8													;PS
-SER_BAUD57600	.EQU	$18 << 8													;PS
+SER_BAUD153600	.EQU	$0B << 8							;PS
+SER_BAUD307200	.EQU	$0C << 8							;PS
+SER_BAUD614400	.EQU	$0D << 8							;PS
+SER_BAUD1228800	.EQU	$0E << 8							;PS
+SER_BAUD2457600	.EQU	$0F << 8							;PS
+SER_BAUD225	.EQU	$10 << 8							;PS
+SER_BAUD450	.EQU	$11 << 8							;PS
+SER_BAUD900	.EQU	$12 << 8							;PS
+SER_BAUD1800	.EQU	$13 << 8							;PS
+SER_BAUD3600	.EQU	$14 << 8							;PS
+SER_BAUD7200	.EQU	$15 << 8							;PS
+SER_BAUD14400	.EQU	$16 << 8							;PS
+SER_BAUD28800	.EQU	$17 << 8							;PS
+SER_BAUD57600	.EQU	$18 << 8							;PS
 
 SER_BAUD115200	.EQU	$19 << 8
 SER_BAUD230400	.EQU	$1A << 8
 SER_BAUD460800	.EQU	$1B << 8
-SER_BAUD921600	.EQU	$1C << 8													;PS
-SER_BAUD1843200	.EQU	$1D << 8													;PS
-SER_BAUD3686400	.EQU	$1E << 8													;PS
-SER_BAUD7372800	.EQU	$1F << 8													;PS
+SER_BAUD921600	.EQU	$1C << 8							;PS
+SER_BAUD1843200	.EQU	$1D << 8							;PS
+SER_BAUD3686400	.EQU	$1E << 8							;PS
+SER_BAUD7372800	.EQU	$1F << 8							;PS
 ;
 SER_XON		.EQU	1 << 6
 SER_DTR		.EQU	1 << 7
 SER_RTS		.EQU	1 << 13
 ;
-SER_75_8N1	.EQU	SER_BAUD75 | SER_DATA8 | SER_PARNONE | SER_STOP1				;PS
-SER_150_8N1	.EQU	SER_BAUD150 | SER_DATA8 | SER_PARNONE | SER_STOP1				;PS
+SER_75_8N1	.EQU	SER_BAUD75 | SER_DATA8 | SER_PARNONE | SER_STOP1		;PS
+SER_150_8N1	.EQU	SER_BAUD150 | SER_DATA8 | SER_PARNONE | SER_STOP1		;PS
 SER_300_8N1	.EQU	SER_BAUD300 | SER_DATA8 | SER_PARNONE | SER_STOP1
 SER_600_8N1	.EQU	SER_BAUD600 | SER_DATA8 | SER_PARNONE | SER_STOP1
 SER_1200_8N1	.EQU	SER_BAUD1200 | SER_DATA8 | SER_PARNONE | SER_STOP1
@@ -193,15 +194,15 @@ SER_307200_8N1	.EQU	SER_BAUD307200 | SER_DATA8 | SER_PARNONE | SER_STOP1		;PS
 SER_614400_8N1	.EQU	SER_BAUD614400 | SER_DATA8 | SER_PARNONE | SER_STOP1		;PS
 SER_1228800_8N1	.EQU	SER_BAUD1228800 | SER_DATA8 | SER_PARNONE | SER_STOP1		;PS
 SER_2457600_8N1	.EQU	SER_BAUD2457600 | SER_DATA8 | SER_PARNONE | SER_STOP1		;PS
-SER_225_8N1	.EQU	SER_BAUD225 | SER_DATA8 | SER_PARNONE | SER_STOP1				;PS
-SER_450_8N1	.EQU	SER_BAUD450 | SER_DATA8 | SER_PARNONE | SER_STOP1				;PS
-SER_900_8N1	.EQU	SER_BAUD900 | SER_DATA8 | SER_PARNONE | SER_STOP1				;PS
-SER_1800_8N1	.EQU	SER_BAUD1800 | SER_DATA8 | SER_PARNONE | SER_STOP1			;PS
-SER_3600_8N1	.EQU	SER_BAUD3600 | SER_DATA8 | SER_PARNONE | SER_STOP1			;PS
-SER_7200_8N1	.EQU	SER_BAUD7200 | SER_DATA8 | SER_PARNONE | SER_STOP1			;PS
-SER_14400_8N1	.EQU	SER_BAUD14400 | SER_DATA8 | SER_PARNONE | SER_STOP1			;PS
-SER_28800_8N1	.EQU	SER_BAUD28800 | SER_DATA8 | SER_PARNONE | SER_STOP1			;PS
-SER_57600_8N1	.EQU	SER_BAUD57600 | SER_DATA8 | SER_PARNONE | SER_STOP1			;PS
+SER_225_8N1	.EQU	SER_BAUD225 | SER_DATA8 | SER_PARNONE | SER_STOP1		;PS
+SER_450_8N1	.EQU	SER_BAUD450 | SER_DATA8 | SER_PARNONE | SER_STOP1		;PS
+SER_900_8N1	.EQU	SER_BAUD900 | SER_DATA8 | SER_PARNONE | SER_STOP1		;PS
+SER_1800_8N1	.EQU	SER_BAUD1800 | SER_DATA8 | SER_PARNONE | SER_STOP1		;PS
+SER_3600_8N1	.EQU	SER_BAUD3600 | SER_DATA8 | SER_PARNONE | SER_STOP1		;PS
+SER_7200_8N1	.EQU	SER_BAUD7200 | SER_DATA8 | SER_PARNONE | SER_STOP1		;PS
+SER_14400_8N1	.EQU	SER_BAUD14400 | SER_DATA8 | SER_PARNONE | SER_STOP1		;PS
+SER_28800_8N1	.EQU	SER_BAUD28800 | SER_DATA8 | SER_PARNONE | SER_STOP1		;PS
+SER_57600_8N1	.EQU	SER_BAUD57600 | SER_DATA8 | SER_PARNONE | SER_STOP1		;PS
 SER_115200_8N1	.EQU	SER_BAUD115200 | SER_DATA8 | SER_PARNONE | SER_STOP1
 SER_230400_8N1	.EQU	SER_BAUD230400 | SER_DATA8 | SER_PARNONE | SER_STOP1
 SER_460800_8N1	.EQU	SER_BAUD460800 | SER_DATA8 | SER_PARNONE | SER_STOP1
diff --git a/Source/HBIOS/ver.inc b/Source/HBIOS/ver.inc
index 5554ec7e..1f3e0de7 100644
--- a/Source/HBIOS/ver.inc
+++ b/Source/HBIOS/ver.inc
@@ -2,4 +2,4 @@
 #DEFINE	RMN	9
 #DEFINE	RUP	1
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"2.9.1-pre.5"
+#DEFINE BIOSVER	"2.9.1-pre.6"