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eZ80: hbios io out operations now managed through a expected feature in the eZ80 on-chip rom

pull/424/head
Dean Netherton 2 years ago
parent
commit
46cc57e5fc
  1. 90
      Source/HBIOS/hbios.asm

90
Source/HBIOS/hbios.asm

@ -351,6 +351,14 @@ RTCDEF .SET RTCDEF | %00001000 ; INITIAL SPEED LOW
DEVECHO "\n"
#ENDIF
;
; EMIT PREFIX REQUIRED BY EZ80 TO ENSURE CORRECT 16 BIT IO OPERATION
;
#IF (CPUFAM == CPU_EZ80)
#DEFINE EZ80_IO .DB $49 $CF
#ELSE
#DEFINE EZ80_IO
#ENDIF
;
;==================================================================================================
; Z80 PAGE ZERO, VECTORS, ETC.
;==================================================================================================
@ -623,21 +631,13 @@ HBX_ROM:
;
HBX_ROM:
RLCA ; TIMES 2 - GET 16K PAGE INSTEAD OF 32K
#IF (CPUFAM == CPU_EZ80)
EXX
LD BC,EZ80IOBASE<<8+MPGSEL_0
OUT (C),A ; BANK_0: 0K - 16K
INC A
INC BC ; BC = MPGSEL_0
OUT (C),A ; BANK_1: 16K - 32K
EXX
#ELSE
EZ80_IO()
OUT (MPGSEL_0),A ; BANK_0: 0K - 16K
INC A ;
EZ80_IO()
OUT (MPGSEL_1),A ; BANK_1: 16K - 32K
#IF (CPUFAM == CPU_Z280)
#IF (CPUFAM == CPU_Z280)
PCACHE
#ENDIF
#ENDIF
RET ; DONE
#ENDIF
@ -1407,12 +1407,8 @@ BOOTWAIT:
;
;LD A,(RTCDEFVAL) ; GET DEFAULT VALUE
LD A,RTCDEF ; DEFAULT VALUE
#IF (CPUFAM == CPU_EZ80)
LD BC,EZ80IOBASE << 8 + RTCIO
OUT (C),A ; BC IS THE APPLIED IO ADDRESS
#ELSE
EZ80_IO()
OUT (RTCIO),A ; SET IT
#ENDIF
;
#IF (PLATFORM == PLT_N8)
LD A,N8_DEFACR ; ENSURE N8 ACR
@ -1436,12 +1432,8 @@ BOOTWAIT:
LD A,DIAG_01
#ENDIF
;
#IF (CPUFAM == CPU_EZ80)
LD BC,EZ80IOBASE << 8 + FPLED_IO
OUT (C),A ; BC IS THE APPLIED IO ADDRESS
#ELSE
EZ80_IO
OUT (FPLED_IO),A
#ENDIF
#ENDIF
;
@ -1710,27 +1702,7 @@ ROMRESUME:
;
#IF (MEMMGR == MM_Z2)
;
#IF (CPUFAM == CPU_EZ80)
XOR A
LD BC,EZ80IOBASE << 8 + MPGSEL_0
OUT (C),A ; BC IS THE APPLIED IO ADDRESS
INC A
INC BC ; BC = MPGSEL_1
OUT (C),A ; OUT (MPGSEL_1), $01
LD A,64 - 2
INC BC ; BC = MPGSEL_2
OUT (C),A ; PROG THIRD 16K MMU REGISTER
INC A
INC BC ; BC = MPGSEL_3
OUT (C),A ; PROG FOURTH 16K MMU REGISTER
; ENABLE PAGING
LD A,1
INC BC ; BC = MPGENA
OUT (C),A ; ENABLE MMU NOW
#ELSE
#IFDEF ROMBOOT
#IFDEF ROMBOOT
; IF THIS IS A ROM BOOT, SETUP THE FIRST 2 16K MMU REGISTERS
; TO MAP THE LOWEST 32K OF PHYSICAL ROM TO THE LOW 32K OF
; CPU ADDRESS SPACE (BANKING AREA). THE FIRST 16K MAPPING IS
@ -1739,28 +1711,32 @@ ROMRESUME:
; MMU REGISTERS WILL BE 0 AT RESET!
XOR A
EZ80_IO()
OUT (MPGSEL_0),A ; PROG FIRST 16K MMU REGISTER
INC A
EZ80_IO()
OUT (MPGSEL_1),A ; PROG SECOND 16K MMU REGISTER
#ENDIF
#ENDIF
;
#IF (PLATFORM == PLT_DUO)
#IF (PLATFORM == PLT_DUO)
; DUO HAS VARIABLE RAM SIZE. RAM ALWAYS STARTS AT 2048K.
; SETUP COMMON RAM FOR HIGHEST 32K OF RAM BASED ON TOTAL RAM.
LD A,128 + (RAMSIZE / 16) - 2
#ELSE
#ELSE
; NORMAL ZETA 2 SYSTEM HAS FIXED 512K OF RAM. SETUP COMMON
; FOR TOP 32K OF THIS.
LD A,64 - 2
#ENDIF
#ENDIF
;
EZ80_IO()
OUT (MPGSEL_2),A ; PROG THIRD 16K MMU REGISTER
INC A
EZ80_IO()
OUT (MPGSEL_3),A ; PROG FOURTH 16K MMU REGISTER
; ENABLE PAGING
LD A,1
EZ80_IO()
OUT (MPGENA),A ; ENABLE MMU NOW
#ENDIF
#ENDIF
;
@ -1853,19 +1829,11 @@ S100MON_SKIP:
; SEE COMMENTS ABOVE REGARDING THE FUNKY WAY THAT THE RTCDEFVAL IS
; CREATED.
;
#IF (CPUFAM == CPU_EZ80)
#DEFINE OUTA(p) PUSH BC
#DEFCONT \ LD BC,EZ80IOBASE << 8 + p
#DEFCONT \ OUT (C),A
#DEFCONT \ POP BC
#ELSE
#DEFINE OUTA(P) OUT (RTCIO),A
#ENDIF
LD A,(RTCDEFVAL)
LD (HB_RTCVAL),A
OUTA(RTCIO) ; SET IT
EZ80_IO()
OUT (RTCIO),A ; SET IT
DIAG(1) ; REAPPLY CURRENT DIAG LED SETUP
;
;--------------------------------------------------------------------------------------------------
@ -7183,14 +7151,8 @@ FP_SETLEDS:
XOR $FF ; INVERT BITS IF NEEDED
#ENDIF
#IF (CPUFAM == CPU_EZ80)
PUSH BC
LD BC,EZ80IOBASE << 8 + FPLED_IO
OUT (C),A ; BC IS THE APPLIED IO ADDRESS
POP BC
#ELSE
EZ80_IO
OUT (FPLED_IO),A ; WRITE
#ENDIF
FP_SETLEDS1:
POP HL ; RESTORE HL
RET ; DONE

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