diff --git a/Source/Apps/Test/Build.cmd b/Source/Apps/Test/Build.cmd
index fb322d6b..f8e126d4 100644
--- a/Source/Apps/Test/Build.cmd
+++ b/Source/Apps/Test/Build.cmd
@@ -22,6 +22,7 @@ pushd rzsz && call Build || exit /b & popd
 pushd vdctest && call Build || exit /b & popd
 pushd kbdtest && call Build || exit /b & popd
 pushd ps2info && call Build || exit /b & popd
+pushd cpuspd && call Build || exit /b & popd
 
 goto :eof
 
diff --git a/Source/Apps/Test/Clean.cmd b/Source/Apps/Test/Clean.cmd
index 9e1f36d9..7cedf243 100644
--- a/Source/Apps/Test/Clean.cmd
+++ b/Source/Apps/Test/Clean.cmd
@@ -17,3 +17,4 @@ pushd rzsz && call Clean || exit /b 1 & popd
 pushd vdctest && call Clean || exit /b 1 & popd
 pushd kbdtest && call Clean || exit /b 1 & popd
 pushd ps2info && call Clean || exit /b 1 & popd
+pushd cpuspd && call Clean || exit /b 1 & popd
diff --git a/Source/Apps/Test/Makefile b/Source/Apps/Test/Makefile
index aed32df2..db9b6b34 100644
--- a/Source/Apps/Test/Makefile
+++ b/Source/Apps/Test/Makefile
@@ -1,5 +1,5 @@
 OBJECTS = 
-SUBDIRS = DMAmon I2C inttest ppidetst ramtest tstdskng rzsz vdctest kbdtest ps2info
+SUBDIRS = DMAmon I2C inttest ppidetst ramtest tstdskng rzsz vdctest kbdtest ps2info cpuspd
 DEST = ../../../Binary/Apps/Test
 TOOLS =../../../Tools
 
diff --git a/Source/Apps/Test/cpuspd/Build.cmd b/Source/Apps/Test/cpuspd/Build.cmd
new file mode 100644
index 00000000..c99af191
--- /dev/null
+++ b/Source/Apps/Test/cpuspd/Build.cmd
@@ -0,0 +1,10 @@
+@echo off
+setlocal
+
+set TOOLS=../../../../Tools
+set PATH=%TOOLS%\tasm32;%PATH%
+set TASMTABS=%TOOLS%\tasm32
+
+tasm -t180 -g3 -fFF cpuspd.asm cpuspd.com cpuspd.lst || exit /b
+
+copy /Y cpuspd.com ..\..\..\..\Binary\Apps\Test\ || exit /b
diff --git a/Source/Apps/Test/cpuspd/Clean.cmd b/Source/Apps/Test/cpuspd/Clean.cmd
new file mode 100644
index 00000000..9ecb428f
--- /dev/null
+++ b/Source/Apps/Test/cpuspd/Clean.cmd
@@ -0,0 +1,6 @@
+@echo off
+setlocal
+
+if exist *.com del *.com
+if exist *.lst del *.lst
+if exist *.bin del *.bin
diff --git a/Source/Apps/Test/cpuspd/Makefile b/Source/Apps/Test/cpuspd/Makefile
new file mode 100644
index 00000000..aedcb761
--- /dev/null
+++ b/Source/Apps/Test/cpuspd/Makefile
@@ -0,0 +1,7 @@
+OBJECTS = cpuspd.com
+DEST = ../../../../Binary/Apps/Test
+TOOLS =../../../../Tools
+
+USETASM=1
+
+include $(TOOLS)/Makefile.inc
\ No newline at end of file
diff --git a/Source/Apps/Test/cpuspd/cpuspd.asm b/Source/Apps/Test/cpuspd/cpuspd.asm
new file mode 100644
index 00000000..4ce9e457
--- /dev/null
+++ b/Source/Apps/Test/cpuspd/cpuspd.asm
@@ -0,0 +1,392 @@
+;
+;=======================================================================
+; HBIOS CPU Speed Selection Tool
+;=======================================================================
+;
+; Simple utility that sets CPU speed on RomWBW systems that support
+; software speed selection.
+;
+;=======================================================================
+;
+#include "../../../HBIOS/hbios.inc"
+;
+cpumhz		.equ	8		; for time delay calculations (not critical)
+;
+; General operational equates (should not requre adjustment)
+;
+stksiz		.equ	$40		; Working stack size
+;
+rtc_port	.equ	$70		; RTC latch port adr
+;
+restart		.equ	$0000		; CP/M restart vector
+bdos		.equ	$0005		; BDOS invocation vector
+;
+; primary hardware platforms
+;
+plt_sbc		.equ	1		; SBC ECB Z80 SBC
+plt_zeta	.equ	2		; ZETA Z80 SBC
+plt_zeta2	.equ	3		; ZETA Z80 V2 SBC
+plt_n8		.equ	4		; N8 (HOME COMPUTER) Z180 SBC
+plt_mk4		.equ	5		; MARK IV
+plt_una		.equ	6		; UNA BIOS
+plt_rcz80	.equ	7		; RC2014 W/ Z80
+plt_rcz180	.equ	8		; RC2014 W/ Z180
+plt_ezz80	.equ	9		; EASY Z80
+plt_scz180	.equ	10		; SCZ180
+plt_dyno	.equ	11		; DYNO MICRO-ATX MOTHERBOARD
+plt_rcz280	.equ	12		; RC2014 W/ Z280
+plt_mbc		.equ	13		; MULTI BOARD COMPUTER
+
+;
+;=======================================================================
+;
+	.org	$100	; standard CP/M executable
+;
+;
+	; setup stack (save old value)
+	ld	(stksav),sp		; save stack
+	ld	sp,stack		; set new stack
+;
+	call	crlf
+	ld	de,str_banner		; banner
+	call	prtstr
+;
+	call	main			; do the real work
+;
+exit:
+	; clean up and return to command processor
+	call	crlf			; formatting
+	ld	sp,(stksav)		; restore stack
+	jp	restart			; return to CP/M via restart
+;
+;
+;=======================================================================
+; Main Program
+;=======================================================================
+;
+main:
+;
+; Get HBIOS platform ID
+;
+;
+	; Get platform id from RomWBW HBIOS
+	ld	b,BF_SYSVER	; HBIOS VER function 0xF1
+	ld	c,0		; Required reserved value
+	rst	08		; Do it, L := Platform ID
+	ld	a,l		; Move to A
+;
+	cp	plt_sbc
+	jr	set_spd
+	cp	plt_mbc
+	jr	set_spd
+	jp	err_not_sup	; Platform not supported
+;
+set_spd:
+	; Use first char of FCB for speed selection
+	ld	a,($5D)
+	cp	' '
+	jr	z,show_spd
+	and	$5F		; make upper case
+	cp	'F'		; fast
+	jr	z,set_fast
+	cp	'H'		; high
+	jr	z,set_fast
+	cp	'S'		; slow
+	jr	z,set_slow
+	cp	'L'		; low
+	jr	z,set_slow
+	jr	usage
+;
+set_slow:
+	ld	a,(HB_RTCVAL)
+	and	~%00001000
+	jr	new_spd
+;
+set_fast:
+	ld	a,(HB_RTCVAL)
+	or	%00001000
+	jr	new_spd
+;
+new_spd:
+	ld	(HB_RTCVAL),a
+	out	(rtc_port),a
+	call	show_spd
+	xor	a
+	ret
+;
+show_spd:
+	ld	a,(HB_RTCVAL)
+	and	%00001000
+	jr	z,show_spd1
+	ld	de,str_fast
+	jr	show_spd2
+show_spd1:
+	ld	de,str_slow
+show_spd2:
+	call	crlf2
+	call	prtstr
+	ret
+;
+usage:
+	call	crlf2
+	ld	de,str_usage
+	call	prtstr
+	or	$FF
+	ret
+;
+; Error Handlers
+;
+err_not_sup:
+	ld	de,str_err_not_sup
+	jr	err_ret
+;
+err_ret:
+	call	crlf2
+	call	prtstr
+	or	$FF			; signal error
+	ret
+;
+;=======================================================================
+; Utility Routines
+;=======================================================================
+;
+;
+; Print character in A without destroying any registers
+;
+prtchr:
+	push	af
+	push	bc		; save registers
+	push	de
+	push	hl
+	ld	e,a		; character to print in E
+	ld	c,$02		; BDOS function to output a character
+	call	bdos		; do it
+	pop	hl		; restore registers
+	pop	de
+	pop	bc
+	pop	af
+	ret
+;
+prtdot:
+;
+	; shortcut to print a dot preserving all regs
+	push	af		; save af
+	ld	a,'.'		; load dot char
+	call	prtchr		; print it
+	pop	af		; restore af
+	ret			; done
+;
+; Print a zero terminated string at (de) without destroying any registers
+;
+prtstr:
+	push	af
+	push	de
+;
+prtstr1:
+	ld	a,(de)		; get next char
+	or	a
+	jr	z,prtstr2
+	call	prtchr
+	inc	de
+	jr	prtstr1
+;
+prtstr2:
+	pop	de		; restore registers
+	pop	af
+	ret
+;
+; Print a hex value prefix "0x"
+;
+prthexpre:
+	push	af
+	ld	a,'0'
+	call	prtchr
+	ld	a,'x'
+	call	prtchr
+	pop	af
+	ret
+;
+; Print the value in A in hex without destroying any registers
+;
+prthex:
+	call	prthexpre
+prthex1:
+	push	af		; save AF
+	push	de		; save DE
+	call	hexascii	; convert value in A to hex chars in DE
+	ld	a,d		; get the high order hex char
+	call	prtchr		; print it
+	ld	a,e		; get the low order hex char
+	call	prtchr		; print it
+	pop	de		; restore DE
+	pop	af		; restore AF
+	ret			; done
+;
+; print the hex word value in hl
+;
+prthexword:
+	call	prthexpre
+prthexword1:
+	push	af
+	ld	a,h
+	call	prthex1
+	ld	a,l
+	call	prthex1 
+	pop	af
+	ret
+;
+; print the hex dword value in de:hl
+;
+prthex32:
+	call	prthexpre
+	push	bc
+	push	de
+	pop	bc
+	call	prthexword1
+	push	hl
+	pop	bc
+	call	prthexword1
+	pop	bc
+	ret
+;
+; Convert binary value in A to ascii hex characters in DE
+;
+hexascii:
+	ld	d,a		; save A in D
+	call	hexconv		; convert low nibble of A to hex
+	ld	e,a		; save it in E
+	ld	a,d		; get original value back
+	rlca			; rotate high order nibble to low bits
+	rlca
+	rlca
+	rlca
+	call	hexconv		; convert nibble
+	ld	d,a		; save it in D
+	ret			; done
+;
+; Convert low nibble of A to ascii hex
+;
+hexconv:
+	and	$0F	     	; low nibble only
+	add	a,$90
+	daa	
+	adc	a,$40
+	daa	
+	ret
+;
+; Print value of A or HL in decimal with leading zero suppression
+; Use prtdecb for A or prtdecw for HL
+;
+prtdecb:
+	push	hl
+	ld	h,0
+	ld	l,a
+	call	prtdecw		; print it
+	pop	hl
+	ret
+;
+prtdecw:
+	push	af
+	push	bc
+	push	de
+	push	hl
+	call	prtdec0
+	pop	hl
+	pop	de
+	pop	bc
+	pop	af
+	ret
+;
+prtdec0:
+	ld	e,'0'
+	ld	bc,-10000
+	call	prtdec1
+	ld	bc,-1000
+	call	prtdec1
+	ld	bc,-100
+	call	prtdec1
+	ld	c,-10
+	call	prtdec1
+	ld	e,0
+	ld	c,-1
+prtdec1:
+	ld	a,'0' - 1
+prtdec2:
+	inc	a
+	add	hl,bc
+	jr	c,prtdec2
+	sbc	hl,bc
+	cp	e
+	ret	z
+	ld	e,0
+	call	prtchr
+	ret
+;
+; Start a new line
+;
+crlf2:
+	call	crlf		; two of them
+crlf:
+	push	af		; preserve AF
+	ld	a,13		; <CR>
+	call	prtchr		; print it
+	ld	a,10		; <LF>
+	call	prtchr		; print it
+	pop	af		; restore AF
+	ret
+;
+; Add hl,a
+;
+;   A register is destroyed!
+;
+addhla:
+	add	a,l
+	ld	l,a
+	ret	nc
+	inc	h
+	ret
+;
+; Delay ~10ms
+;
+delay:
+	push	af
+	push	de
+	ld	de,625			; 10000us/16us
+delay0:
+	ld	a,(cpuscl)
+delay1:
+	dec	a
+	jr	nz,delay1
+	dec	de
+	ld	a,d
+	or	e
+	jp	nz,delay0
+	pop	de
+	pop	af
+	ret
+;
+;
+;
+;=======================================================================
+; Constants
+;=======================================================================
+;
+str_banner		.db	"RomWBW CPU Speed Selector v0.1, 25-Jan-2022",0
+str_slow		.db	"  CPU speed is SLOW",0
+str_fast		.db	"  CPU speed is FAST",0
+str_err_not_sup		.db	"  ERROR: Platform not supported!",0
+str_usage		.db	"  Usage: CPUSPD [F|S]",0
+;
+;=======================================================================
+; Working data
+;=======================================================================
+;
+stksav		.dw	0		; stack pointer saved at start
+		.fill	stksiz,0	; stack
+stack		.equ	$		; stack top
+;
+cpuscl		.db	cpumhz - 2
+;
+;=======================================================================
+;
+	.end
\ No newline at end of file
diff --git a/Source/HBIOS/ctc.asm b/Source/HBIOS/ctc.asm
index 9d0d69f7..b1698699 100644
--- a/Source/HBIOS/ctc.asm
+++ b/Source/HBIOS/ctc.asm
@@ -173,6 +173,7 @@ CTC_PRTCFG1:
 	PRTS("TIM256$")
   #ENDIF
 ;
+  #IF (CTCDEBUG)
 	PRTS(" DIVHI=$")
 	LD	A,CTC_DIVHI & $FF
 	CALL	PRTHEXBYTE
@@ -181,7 +182,6 @@ CTC_PRTCFG1:
 	LD	A,CTC_DIVLO & $FF
 	CALL	PRTHEXBYTE
 ;
-  #IF (CTCDEBUG)
 	PRTS(" PREIO=$")
 	LD	A,CTC_PREIO
 	CALL	PRTHEXBYTE
diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm
index 7ed0e96e..198b6fcc 100644
--- a/Source/HBIOS/hbios.asm
+++ b/Source/HBIOS/hbios.asm
@@ -70,6 +70,8 @@
 ;
 #DEFINE	HBIOS
 ;
+;;;#DEFINE TESTING
+;
 ; MAKE SURE EXACTLY ONE OF ROMBOOT, APPBOOT, IMGBOOT IS DEFINED.
 ;
 MODCNT	.EQU	0
@@ -170,16 +172,14 @@ MODCNT	.SET	MODCNT + 1
 ;
 ;
 ;
-#IF (CTCENABLE)
-CTCA		.EQU	CTCBASE + 0	; CTC: CHANNEL A REGISTER ADR
-CTCB		.EQU	CTCBASE + 1	; CTC: CHANNEL B REGISTER ADR
-CTCC		.EQU	CTCBASE + 2	; CTC: CHANNEL C REGISTER ADR
-CTCD		.EQU	CTCBASE + 3	; CTC: CHANNEL D REGISTER ADR
-#ENDIF
-;
-; THIS EQUATE IS UPDATED BY DRIVER INCLUDES THAT SHARE THE RTC LATCH.
-; AS DRIVER IS INCLUDED, IT WILL USE .SET TO SET ANY BITS THEY OWN
-; AND WANT TO SET AS DEFAULT.
+; THE RTCDEF EQUATE IS INITIALIZED HERE AND UPDATED BY DRIVER INCLUDES
+; THAT SHARE THE RTC LATCH.  AS EACH DRIVER FILE IS INCLUDED, IT CAN
+; USE .SET TO SET ANY BITS THEY OWN WITHIN THE RTC LATCH BYTE.
+; SINCE RTCDEF IS CHANGED AFTER IT NEEDS TO BE USED BY THE CODE, IT
+; CANNOT BE USED DIRECTLY TO SET THE LATCH.  INSTEAD, THE FINAL VALUE
+; OF RTCDEF IS USED TO INITIALIZE A STORAGE BYTE CALLED RTCDEFVAL AT
+; THE END OF HBIOS.ASM.  SO (RTCDEFVAL) CAN BE USED ANYWHERE IN
+; HBIOS.ASM TO ACCESS THE FINAL RTCDEF VALUE.
 ;
 RTCDEF		.EQU	0		; ALLOWS DRIVERS TO SET BITS
 ;
@@ -188,19 +188,19 @@ RTCDEF		.SET	RTCDEF | %00000001	; SC128 I2C SCL BIT
 #ENDIF
 ;
 #IF ((CPUSPDCAP==SPD_HILO) & (PLATFORM==PLT_MBC))
-#IF (CPUSPDDEF==SPD_HIGH)
+  #IF (CPUSPDDEF==SPD_HIGH)
 RTCDEF		.SET	RTCDEF | %00001000	; DEFAULT SPEED HIGH
-#ELSE
+  #ELSE
 RTCDEF		.SET	RTCDEF & ~%00001000	; DEFAULT SPEED LOW
-#ENDIF
+  #ENDIF
 #ENDIF
 ;
 #IF ((CPUSPDCAP==SPD_HILO) & (PLATFORM==PLT_SBC))
-#IF (CPUSPDDEF==SPD_HIGH)
+  #IF (CPUSPDDEF==SPD_HIGH)
 RTCDEF		.SET	RTCDEF & ~%00001000	; DEFAULT SPEED HIGH
-#ELSE
+  #ELSE
 RTCDEF		.SET	RTCDEF | %00001000	; DEFAULT SPEED LOW
-#ENDIF
+  #ENDIF
 #ENDIF
 ;
 ;
@@ -470,6 +470,7 @@ HBX_RAM:
 	RLCA				; SCALE SELECTOR TO
 	RLCA				; ... GO FROM Z180 4K PAGE SIZE
 	RLCA				; ... TO DESIRED 32K PAGE SIZE
+	AND	%11111000
 	OUT0	(Z180_BBR),A		; WRITE TO BANK BASE
 	LD	A,N8_DEFACR | 80H	; SELECT RAM BY SETTING BIT 7
 	OUT0	(N8_ACR),A		; ... IN N8 ACR REGISTER
@@ -491,6 +492,7 @@ HBX_ROM:
 HBX_BNKSEL1:
 	RLCA				; CONTINUE SHIFTING TO SCALE SELECTOR
 	RLCA				; FOR Z180 4K PAGE -> DESIRED 32K PAGE
+	AND	%11111000
 	OUT0	(Z180_BBR),A		; WRITE TO BANK BASE
 	RET				; DONE
 #ENDIF
@@ -962,7 +964,7 @@ HBX_BUF_END	.EQU	$
 	.DB	BID_USR			; HB_DSTBNK: BNKCPY DESTINATION BANK ID
 	.DW	0			; HB_CPYLEN: BNKCPY LENGTH
 	.FILL	4,0			; FILLER, RESERVED FOR FUTURE HBIOS USE
-	.DB	RTCDEF			; SHADOW VALUE FOR RTC LATCH PORT
+	.DB	0			; SHADOW VALUE FOR RTC LATCH PORT
 	.DB	$FE			; HB_LOCK: HBIOS MUTEX LOCK
 	JP	HBX_INVOKE		; HB_INVOKE: FIXED ADR ENTRY FOR HBX_INVOKE (ALT FOR RST 08)
 	JP	HBX_BNKSEL		; HB_BNKSEL: FIXED ADR ENTRY FOR HBX_BNKSEL
@@ -1085,10 +1087,12 @@ Z280_BOOTERR	.TEXT	"\r\n\r\n*** Application mode boot not supported under Z280 n
 	DI				; NO INTERRUPTS
 	IM	1			; INTERRUPT MODE 1
 
-#IF ((PLATFORM=PLT_MBC) | (PLATFORM=PLT_SBC))
-	LD	A,(HB_RTCVAL)		; SET DEFAULT
-	OUT	(RTCIO),A		; SPEED
-#ENDIF
+;#IF ((PLATFORM=PLT_MBC) | (PLATFORM=PLT_SBC))
+	; INITIALIZE RTC LATCH BYTE
+	; FOR SOME PLATFORMS THIS CONTROLS HI/LO SPEED CIRCUIT
+	LD	A,(RTCDEFVAL)		; GET DEFAULT VALUE
+	OUT	(RTCIO),A		; SET IT
+;#ENDIF
 ;
 #IF (DIAGENABLE)
 	LD	A,%00000001
@@ -1099,13 +1103,15 @@ Z280_BOOTERR	.TEXT	"\r\n\r\n*** Application mode boot not supported under Z280 n
 	XOR	A			; LED IS INVERTED, TURN IT ON
   #ENDIF
   #IF (LEDMODE == LEDMODE_RTC)
-	LD	A,(HB_RTCVAL)
-	OR	%00000001		; LED 0
-	LD	(HB_RTCVAL),A		; SAVE TO SHADOW REGISTER
+	LD	A,(RTCDEFVAL)		; DEFAULT LATCH VALUE
+	OR	%00000001		; LED 0 ON
   #ENDIF
 	OUT	(LEDPORT),A
 #ENDIF
 ;
+	; WARNING: ALTHOUGH WE ARE INITIALIZING SP HERE, IT IS NOT YET
+	; SAFE TO PUSH VALUES TO THE STACK BECAUSE SOME PLATFORMS WILL
+	; NOT YET HAVE RAM MAPPED TO THE UPPER 32K YET!
 	LD	SP,HBX_LOC		; SETUP INITIAL STACK JUST BELOW HBIOS PROXY
 ;
 #IF (CPUFAM == CPU_Z280)
@@ -1288,25 +1294,54 @@ Z280_INITZ:
 ; AT THIS POINT, RAM SHOULD BE AVAILABLE IN THE COMMON BANK
 ; (TOP 32K).
 ;
-	DIAG(%00000011)
+; NOTIFICATION THAT WE HAVE MADE THE JUMP TO RAM BANK!
+; THE DIAG() MACRO IS NOT USED BECAUSE IT USES THE STACK AND WE DO
+; NOT WANT TO EFFECT RAM UNTIL AFTER THE BACKUP BATTERY STATUS CHECK
+; IS PERFORMED NEXT.
+;
+	LD	A,%00000011
+	OUT	(DIAGPORT),A
+;
+; WE USE THE TWO BYTES IMMEDIATELY BELOW THE PROXY TO STORE A COUPLE
+; VALUES TEMPORARILY BECAUSE WE MAY BE OPERATING IN ROM AT THIS POINT.
+; (HBX_LOC - 1) = BATCOND, (HBX_LOC - 2) = APPBANK
+; THERE IS NOTHING ON THE STACK AT THIS POINT SO, HERE, WE JUST RESET
+; THE STACK TO HBX_LOC - 2.
+;
+	LD	SP,HBX_LOC - 2
 ;
-; CHECK BATTERY BACKUP STATUS BEFORE WE COPY PROXY TO UPPER MEMORY
+; CHECK BATTERY BACKUP STATUS BEFORE WE TOUCH RAM (UPPER MEMORY)
 ;
 ; IF A DS1210 POWER CONTROLLER IS INSTALLED AND BATTERY BACKUP IS NOT INSTALLED
 ; OR IS LESS THAN 2V THEN THE DS1210 WILL BLOCK THE SECOND RAM ACCESS.
 ; FAILURE TO COMPLETE TWO RAM ACCESSES BEFORE INSTALLING PROXY WILL RESULT
 ; IN THE ROM ID BYTES NOT BEING COPIED CORRECTLY AND CP/M APPLICATIONS
 ; WILL NOT START CORRECTLY WHEN THEY CHECK THE ROM ID VERSION BYTES.
-; THE BATTERY CONDITION VALUE IS TEMPORARILY STORED AT HBX_LOC - 1.
+; THE BATTERY CONDITION VALUE IS TEMPORARILY STORED AT HBX_LOC - 1
+; BECAUSE WE ARE CURRENTLY RUNNING IN ROM.  AFTER WE TRANSITION HBIOS
+; TO RAM, THE VALUE IS MOVED TO IT'S REAL LCOATION AT HB_BATCOND.
 ; IF THERE IS NO DS1210 IN THE SYSTEM, THE CODE BELOW DOES NO HARM.
 ;
-	DEC	SP			; RESERVE A STACK BYTE
+	LD	HL,HBX_LOC - 1		; POINT TO BYTE
 	XOR	A			; ZERO MEANS LOW BAT
-	LD	(HBX_LOC - 1),A		; WRITE IT (SHOULD ALWAYS WORK)
+	LD	(HL),A	
 	INC	A			; 1 MEANS BAT OK
-	LD	(HBX_LOC - 1),A		; OVERWRITE IF NVC ALLOWS IT
+	LD	(HL),A
 ;
-; IF APPBOOT, SAVE CURRENT BANKID
+; INSTALL PROXY IN UPPER MEMORY
+; THE HB_CURBNK MUST BE PRESERVED IF THIS IS AN APPBOOT.
+;
+	LD	A,(HB_CURBNK)		; SAVE EXISTING HB_CURBNK
+	LD	DE,HBX_LOC		; AS PER ABOVE
+	LD	HL,HBX_IMG
+	LD	BC,HBX_SIZ
+	LDIR
+;
+#IFDEF APPBOOT
+	LD	(HB_CURBNK),A		; RESTORE HB_CURBNK
+#ENDIF
+;
+; SAVE CURRENT BANKID
 ;
 ; THIS IS NOT GOING TO WORK IF THE APP BOOT IMAGE IS LOADED
 ; USING THE UNA FAT32 LOADER.  SHOULD PROBABLY CHECK THAT THERE
@@ -1314,23 +1349,101 @@ Z280_INITZ:
 ; THIS USE CASE IS PROBABLY NON-EXISTENT.  THE IMG BOOT IMAGE
 ; SHOULD WORK FINE WITH THE UNA FAT32 LOADER.
 ;
-#IFDEF APPBOOT
-	LD	A,(HB_CURBNK)
-	DEC	SP			; RESERVE A STACK BYTE
-	LD	(HBX_LOC - 2),A		; SAVE BANK
-	PUSH	AF			; ALSO ON STACK
-#ENDIF
+; THIS VALUE IS TEMPORARILY STORED AT HBX_LOC - 2
+; BECAUSE WE ARE CURRENTLY RUNNING IN ROM.  AFTER WE TRANSITION HBIOS
+; TO RAM, THE VALUE IS MOVED TO IT'S REAL LCOATION AT HB_APPBNK.
 ;
-; INSTALL PROXY IN UPPER MEMORY
+	LD	A,(HB_CURBNK)		; GET HB_CURBNK
+	LD	(HBX_LOC - 2),A		; ... AND SAVE TEMP FOR APPBNK
 ;
-	LD	DE,HBX_LOC		; AS PER ABOVE
-	LD	HL,HBX_IMG
-	LD	BC,HBX_SIZ
-	LDIR
+; THE RTCVAL FIELD OF THE PROXY DATA NEEDS TO BE INITIALIZED HERE
+; BECAUSE IT CANNOT BE PRE-INITIALIZED (SEE COMMENTS ABOVE WHERE
+; RTCVAL EQUATE IS DEFINED).
 ;
-; THIS IS WHERE WE SHOULD PROBE FOR THE ACTUAL NUMBER OF RAM
-; BANKS AVAILABLE IN THE SYSTEM.  THE PROBE CODE WOULD NEED
+	LD	A,(RTCDEFVAL)
+	LD	(HB_RTCVAL),A
+;
+#IFDEF TESTING
+;
+; THIS IS WHERE WE PROBE FOR THE ACTUAL NUMBER OF RAM
+; BANKS AVAILABLE IN THE SYSTEM.  THE PROBE CODE NEEDS
 ; TO BE COPIED TO AND RUN FROM THE COMMON RAM BANK.
+;
+	LD	DE,$F000
+	LD	HL,RS_IMAGE
+	LD	BC,RS_LEN
+	LDIR
+	CALL	RS_START
+	JP	RS_IMAGE + RS_LEN
+;
+; CODE THAT IS COPIED TO $F000 TO PERFORM RAM SIZE DETECTION
+;
+RS_IMAGE:
+	.ORG	$F000
+RS_START:
+	LD	A,(HB_CURBNK)		; GET CURRENT BANK
+	PUSH	AF			; SAVE IT
+	
+	LD	C,0			; RUNNING BANK COUNT
+	LD	IX,RS_ARY		; ORIG BYTE STORAGE ARRAY PTR
+RS_LOOP1:
+	LD	A,C
+	ADD	A,$80			; OFFSET BY START OF RAM BANKS
+	CALL	HBX_BNKSEL		; SELECT THE BANK
+
+	LD	A,($7FFF)		; GET ORIGINAL VALUE
+	LD	(IX),A			; SAVE IT TO RESTORE LATER
+	INC	IX			; BUMP IX
+
+	LD	A,$AA			; TEST LOC WITH $AA
+	LD	($7FFF),A
+	LD	A,($7FFF)
+	CP	$AA
+	JR	NZ,RS_DONE
+
+	LD	A,$55			; TEST LOC WITH $55
+	LD	($7FFF),A
+	LD	A,($7FFF)
+	CP	$55
+	JR	NZ,RS_DONE
+
+	; STORE A UNIQUE VALUE
+	LD	A,C
+	LD	($7FFF),A
+	OR	A			; ZERO?
+	JR	Z,RS_NEXT		; SKIP STORED VALUE CHECK
+	
+	; VERIFY ALL STORED VALUES
+	LD	B,C			; INIT LOOP COUNTER
+	LD	E,0			; INIT BANK ID
+RS_LOOP3:
+	LD	A,E
+	ADD	A,$80
+	CALL	HBX_BNKSEL
+	LD	A,($7FFF)
+	CP	E			; VERIFY
+	JR	NZ,RS_DONE		; ABORT IF MISCOMPARE
+	INC	E			; NEXT BANK
+	DJNZ	RS_LOOP3
+;
+RS_NEXT:
+	INC	C			; ADD 1 TO RAM BANK COUNT
+	JR	RS_LOOP1		; AND LOOP TILL DONE
+;	
+RS_DONE:
+	LD	E,C			; FINAL BANK COUNT TO E
+	; RESTORE SAVED VALUES
+	LD	IX,RS_ARY
+	LD	B,C			; LOOP COUNT
+	LD	C,$80			; BANK ID
+RS_LOOP2:
+	LD	A,C
+	CALL	HBX_BNKSEL
+	INC	C
+	LD	A,(IX)			; GET VALUE
+	LD	($7FFF),A		; RESTORE IT
+	INC	IX
+	DJNZ	RS_LOOP2		; ALL BANKS
 ;
 ; MBC RUNTIME MEMORY SIZE ADJUSTMENT
 ;
@@ -1348,21 +1461,59 @@ Z280_INITZ:
 ; AND THEN POKES THE MASK INTO AN XOR INSTRUCTION IN THE MBC
 ; MEMORY MANAGER.
 ;
-#IF (MEMMGR == MM_MBC)
-	LD	HL,CB_RAMBANKS		; IN NUMBER OF RAMBANKS DETECTED FOR MBC
+  #IF (MEMMGR == MM_MBC)
+;
+	;LD	HL,CB_RAMBANKS		; IN NUMBER OF RAMBANKS DETECTED FOR MBC
 	LD	A,%11101011		; IS 4 (128KB) OR 16 (512KB) THEN
-	AND	(HL)			; ZERO THE LAST BANK MASK OTHERWISE
+	;AND	(HL)			; ZERO THE LAST BANK MASK OTHERWISE
+	AND	E			; ZERO THE LAST BANK MASK OTHERWISE
 	JR	Z,MBC_SINGLE		; CALCULATE THE LAST BANK MASK (BANKS/2)
 	RRA				; 256K = %00000100, 1024K = %00010000
 MBC_SINGLE:
 	LD	(HBX_MBCMSK),A		
-#ENDIF
 ;
-; IF APPBOOT, RESTORE CURRENT BANK ID
+  #ENDIF
 ;
-#IFDEF APPBOOT
+	; RETURN TO ORIGINAL BANK
 	POP	AF
-	LD	(HB_CURBNK),A
+	CALL	HBX_BNKSEL
+	LD	A,E			; RETURN BANK COUNT
+	LD	($FFEA),A		; STASH HERE FOR A BIT
+	RET
+;
+RS_ARY	.EQU	$
+;
+RS_LEN	.EQU	$ - RS_START
+	.ORG	RS_IMAGE + RS_LEN
+;
+#ELSE
+;
+; MBC RUNTIME MEMORY SIZE ADJUSTMENT
+;
+; THE MBC RAM BOARD CAN CONTAIN 1 OR 2 RAM CHIPS.  THEY CAN BE
+; EITHER 128K OR 512K EACH.  SO THE MBC RAM BOARD CAN HAVE A
+; TOTAL OF 128K, 256K, 512K, OR 1024K.  THE COMMON (HIMEM) RAM
+; IS ALWAYS MAPPED TO THE LAST 32K OF THE FIRST CHIP ON THE BOARD.
+; IF THERE ARE TWO CHIPS ON THE BOARD, THIS MEANS THE COMMON
+; BANK WILL APPEAR IN THE "MIDDLE" OF THE PHYSICAL RAM BANKS.
+; ROMWBW NEEDS THE COMMON BANK TO BE AT THE LAST BANK OF PHYSICAL
+; RAM IN ORDER TO HAVE SEQUENTIAL RAM BANKS AVAILABLE FOR THE
+; RAM DISK.  TO WORK AROUND THIS, WE FLIP THE HIGH BIT OF THE
+; BANK ID FOR AN MBC SYSTEM IFF IT HAS 2 CHIPS (256K OR 1024K).
+; THE CODE BELOW GENERATES THE CORRECT MASK TO ACCOMPLISH THIS
+; AND THEN POKES THE MASK INTO AN XOR INSTRUCTION IN THE MBC
+; MEMORY MANAGER.
+;
+  #IF (MEMMGR == MM_MBC)
+	LD	HL,CB_RAMBANKS		; IF NUMBER OF RAMBANKS DETECTED FOR MBC
+	LD	A,%11101011		; IS 4 (128KB) OR 16 (512KB) THEN
+	AND	(HL)			; ZERO THE LAST BANK MASK OTHERWISE
+	JR	Z,MBC_SINGLE		; CALCULATE THE LAST BANK MASK (BANKS/2)
+	RRA				; 256K = %00000100, 1024K = %00010000
+MBC_SINGLE:
+	LD	(HBX_MBCMSK),A		
+  #ENDIF
+;
 #ENDIF
 ;
 ; IF ALREADY EXECUTING IN RAM, BYPASS RAM BANK INSTALLATION
@@ -1382,39 +1533,6 @@ MBC_SINGLE:
 	LD	BC,$8000
 	CALL	HBX_BNKCPY
 ;
-#IF (1)
-;
-; POPULATE THE CRITICAL RAM BANK NUMBERS.
-;
-; ASSUME THAT CB_RAMBANKS IS THE NUMBER OF 32K RAM BANKS THAT HAS BEEN SET EITHER
-; AT ASSEMBLY TIME OR BY PROBING THE ACTUAL AVAILABLE MEMORY (NOT IMPLEMENTED YET).
-;
-	LD	A,(CB_RAMBANKS)			; CALCULATE START
-	DEC	A				; RAMBANK AFTER
-	ADD	A,($80 + (PLT_RAM_R / 32))	; RESERVED BANKS
-;
-	LD	HL,CB_BIDCOM
-	LD	B,4
-CB_IDS:	LD	(HL),A				; POPULATE CB_BIDCOM
-	INC	HL				; POPULATE CB_BIDUSR
-	DEC	A				; POPULATE CB_BIDBIOS
-	DJNZ	CB_IDS				; POPULATE CB_BIDAUX
-
-	LD	A,(CB_BIDUSR)
-	LD	(HB_SRCBNK),A			; POPULATE HB_SRCBNK
-	LD	(HB_DSTBNK),A			; POPULATE HB_DSTBNK		
-;
-	LD	A,+($80 + (PLT_RAM_R / 32))	; POPULATE CB_BIDRAMD0	; START RAMBANK
-	LD	(HL),A
-	INC	HL
-;
-	LD	A,(CB_RAMBANKS)			; POPULATE CB_BIDRAMDN	; END RAMBANK
-	DEC	A
-	SUB	TOT_RAM_RB
-	LD	(HL),A
-;
-#ENDIF
-;
 ; TRANSITION TO HBIOS IN RAM BANK
 ;
 #IF (MEMMGR == MM_Z280)
@@ -1435,15 +1553,30 @@ HB_RAMFLAG	.DB	FALSE		; INITIALLY FALSE, SET TO TRUE BELOW AFTER RAM TRANSITION
 ;
 HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 ;
+	; WE RESET THE STACK HERE BECAUSE WE ARE NOT GOING TO RETURN
+	; FROM THE BNKCALL.  REMEMBER THAT WE STORED A COUPLE BYTES
+	; RIGHT BELOW HBX_LOC, SO THE STACK IS SET TO START JUST BELOW
+	; THAT.
+	LD	SP,HBX_LOC - 2		; RESET STACK
+;
+	; NOTIFY THAT WE MADE THE TRANSTION!
 	DIAG(%00000111)
 	LED(%00000010)
 ;
-	LD	A,(HBX_LOC - 1)		; RECALL BATTERY STATE AND SAVE
-	LD	(HB_BATCOND),A		; FOR FUTURE REFERENCE
-;
-	LD	SP,HBX_LOC		; RESET STACK SINCE WE DO NOT RETURN
+	; SET THE IN-RAM FLAG
 	LD	A,TRUE			; ACCUM := TRUE
 	LD	(HB_RAMFLAG),A		; SET RAMFLAG
+;
+	; RECOVER DATA PASSED PRIOR TO RAM TRANSITION
+	; (HBX_LOC - 1) = BATCOND, (HBX_LOC - 2) = APPBNK
+	POP	HL			; POP 2 BYTES
+	LD	A,H			; GET FIRST BYTE PUSHED
+	LD	(HB_BATCOND),A		; ... AND SAVE AS BAT COND
+;
+#IFDEF APPBOOT
+	LD	A,L			; GET SECOND BYTE PUSHED
+	LD	(HB_APPBNK),A		; ... AND SAVE AS APPBNK
+#ENDIF
 ;
 #IF (MEMMGR == MM_Z280)
 	; NOW POINT TO RAM COPY OF Z280 INT/TRAP TABLE
@@ -1457,10 +1590,6 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 ; IF APPBOOT, WE NEED TO FIX UP A FEW THINGS IN PAGE ZERO
 ;
 #IFDEF APPBOOT
-;
-	; GET AND SAVE APP BOOT BANK ID
-	LD	A,(HBX_LOC - 2)
-	LD	(HB_APPBNK),A
 ;
 	; MAKE SURE RST 08 VECTOR IS RIGHT
 	LD	A,$C3
@@ -1484,6 +1613,39 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
   #ENDIF
 #ENDIF
 ;
+#IF FALSE
+;
+; POPULATE THE CRITICAL RAM BANK NUMBERS.
+;
+; ASSUME THAT CB_RAMBANKS IS THE NUMBER OF 32K RAM BANKS THAT HAS BEEN SET EITHER
+; AT ASSEMBLY TIME OR BY PROBING THE ACTUAL AVAILABLE MEMORY (NOT IMPLEMENTED YET).
+;
+	LD	A,(CB_RAMBANKS)			; CALCULATE START
+	DEC	A				; RAMBANK AFTER
+	ADD	A,($80 + (PLT_RAM_R / 32))	; RESERVED BANKS
+;
+	LD	HL,CB_BIDCOM
+	LD	B,4
+CB_IDS:	LD	(HL),A				; POPULATE CB_BIDCOM
+	INC	HL				; POPULATE CB_BIDUSR
+	DEC	A				; POPULATE CB_BIDBIOS
+	DJNZ	CB_IDS				; POPULATE CB_BIDAUX
+
+	LD	A,(CB_BIDUSR)
+	LD	(HB_SRCBNK),A			; POPULATE HB_SRCBNK
+	LD	(HB_DSTBNK),A			; POPULATE HB_DSTBNK		
+;
+	LD	A,+($80 + (PLT_RAM_R / 32))	; POPULATE CB_BIDRAMD0	; START RAMBANK
+	LD	(HL),A
+	INC	HL
+;
+	LD	A,(CB_RAMBANKS)			; POPULATE CB_BIDRAMDN	; END RAMBANK
+	DEC	A
+	SUB	TOT_RAM_RB
+	LD	(HL),A
+;
+#ENDIF
+;
 ;==================================================================================================
 ;	RECOVERY MODE
 ;==================================================================================================
@@ -2137,6 +2299,20 @@ HB_Z280BUS1:
 	CALL	PRTSTRD
 	.TEXT	"KB RAM$"
 ;
+#IFDEF TESTING
+;
+	CALL	PRTSTRD
+	.TEXT	", RAMBANKS=0x$"
+	LD	A,($FFEA)
+	CALL	PRTHEXBYTE
+;
+	CALL	PRTSTRD
+	.TEXT	", RTCDEF=0x$"
+	LD	A,(RTCDEFVAL)
+	CALL	PRTHEXBYTE
+;
+#ENDIF
+;
 #IF 0
 ;
 ; DIAGNOSTIC DISPLAY OF BANK IDS IN HCB
@@ -6245,6 +6421,8 @@ IOPRVAL		.DW	0		; TEMP STORAGE FOR IOPR
 ;
 HB_BATCOND	.DB	0		; BATTERY CONDITION (0=LOW, 1=OK)
 ;
+RTCDEFVAL	.DB	RTCDEF		; STORAGE FOR RTC DEFAULT VALUE
+;
 #IF (BT_REC_TYPE != BT_REC_NONE)
 HB_BOOT_REC	.DB	0		; BOOT MODE (0=NORMAL, 1=RECOVERY MODE)
 #ENDIF
diff --git a/Source/HBIOS/sio.asm b/Source/HBIOS/sio.asm
index 8e7e323a..f1de029c 100644
--- a/Source/HBIOS/sio.asm
+++ b/Source/HBIOS/sio.asm
@@ -716,7 +716,7 @@ SIO_INITDEV4:
 ;
 	; ALL GOOD.  PROGRAM THE CTC CHANNEL
 	LD	A,(IY+13)		; GET CTC CHANNEL
-	ADD	A,CTCA			; ADD TO CTC BASE PORT ADR
+	ADD	A,CTCBASE		; ADD TO CTC BASE PORT ADR
   #IF (SIODEBUG)
 	PRTS(" CTC=$")
 	CALL	PRTHEXBYTE
@@ -815,7 +815,7 @@ SIO_INITSAFE:
 	; IF A CTC CHANNEL IS CONFIGURED, PROGRAM IT FOR
 	; SIMPLE 1:1 SCALING.
 	LD	A,(IY+13)		; GET CTC CHANNEL
-	ADD	A,CTCA			; ADD TO CTC BASE PORT ADR
+	ADD	A,CTCBASE		; ADD TO CTC BASE PORT ADR
 	LD	C,A			; AND PUT IN C FOR I/O
 	LD	A,%01010111		; CTCC CONTROL WORD VALUE
 	OUT	(C),A			; PREP CTC CHANNEL
diff --git a/Source/ver.inc b/Source/ver.inc
index 1176d907..50edcccd 100644
--- a/Source/ver.inc
+++ b/Source/ver.inc
@@ -2,4 +2,4 @@
 #DEFINE	RMN	1
 #DEFINE	RUP	1
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.1.1-pre.148"
+#DEFINE BIOSVER	"3.1.1-pre.150"
diff --git a/Source/ver.lib b/Source/ver.lib
index 496282d8..091ba1e6 100644
--- a/Source/ver.lib
+++ b/Source/ver.lib
@@ -3,5 +3,5 @@ rmn	equ	1
 rup	equ	1
 rtp	equ	0
 biosver	macro
-	db	"3.1.1-pre.148"
+	db	"3.1.1-pre.150"
 	endm