From a9780aa8be0aeb17f26a511911c7f0d8a61f41e6 Mon Sep 17 00:00:00 2001
From: b1ackmai1er <difficultylevelhigh@gmail.com>
Date: Sun, 18 Aug 2019 20:22:04 +0800
Subject: [PATCH 1/2] Fix for usb-fifo boot display

---
 Source/HBIOS/hbios.asm |  3 ++-
 Source/HBIOS/uf.asm    | 15 ++++++++-------
 2 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm
index 8ce3088b..9ee0452e 100644
--- a/Source/HBIOS/hbios.asm
+++ b/Source/HBIOS/hbios.asm
@@ -3550,7 +3550,7 @@ PS_FLPED	.TEXT	"ED$"
 ;
 PS_SDSTRREF:
 	.DW	PS_SDUART, PS_SDASCI, PS_SDTERM,
-	.DW	PS_SDPRPCON, PS_SDPPPCON, PS_SDSIO, PS_SDACIA, PS_SDPIO
+	.DW	PS_SDPRPCON, PS_SDPPPCON, PS_SDSIO, PS_SDACIA, PS_SDPIO,PS_SDUF
 ;
 PS_SDUART	.TEXT	"UART$"
 PS_SDASCI	.TEXT	"ASCI$"
@@ -3560,6 +3560,7 @@ PS_SDPPPCON	.TEXT	"PPPCON$"
 PS_SDSIO	.TEXT	"SIO$"
 PS_SDACIA	.TEXT	"ACIA$"
 PS_SDPIO	.TEXT	"PORT$"
+PS_SDUF		.TEXT	"UF$"
 ;
 ; SERIAL TYPE STRINGS
 ;
diff --git a/Source/HBIOS/uf.asm b/Source/HBIOS/uf.asm
index 4e2d7ce5..d19f3925 100644
--- a/Source/HBIOS/uf.asm
+++ b/Source/HBIOS/uf.asm
@@ -4,7 +4,7 @@
 ;	PHIL SUMMERS (b1ackmai1er)
 ;==================================================================================================
 ;
-;	BASE PORT IS SET IN PLT_SBC.INC
+;	BASE PORT IS SET IN CFG_SBC.INC
 ;	INTERRUPTS ARE NOT USED.
 ;	ONLY ONE BOARD SUPPORTED.
 ;
@@ -60,10 +60,11 @@ UF_INIT:
 	PRTS("IO=0x$")
 	LD	A,UFBASE		; PRINT PORT
 	CALL	PRTHEXBYTE
-	LD	A,(UF_USB_ACTIVE)	; PRINT CABLE STATUS
-	OR	A
-	RET	NZ
-	PRTS(" No Cable$")
+	LD	A,(UF_USB_ACTIVE)	; PRINT CONNECTION STATUS
+	OR	A			; REQUIRES TERMINAL PROGRAM
+	RET	NZ			; TO HAVE INITIALIZED PORT
+	PRTS(" No $")			; ON PC SIDE.
+	PRTS("connection$")
 	RET
 ;
 ; INPUT A CHARACTER AND RETURN IT IN E
@@ -161,9 +162,9 @@ UF_DETECT:
 	IN	A,(FIFO_STATUS)
 	AND	10000001B
 	SUB	10000001B		; A=0 CABLE DISCONNECTED
-	RET	Z
+	RET	Z			; OR PC PORT CLOSED
 	LD	A,1			; A=1 CABLE CONNECTED
-	RET
+	RET				; AND PC PORT OPEN
 ;
 ; DRIVER FUNCTION TABLE
 ;

From 03c6cf9d51b197b7a410ef304360656ff7010e5d Mon Sep 17 00:00:00 2001
From: b1ackmai1er <difficultylevelhigh@gmail.com>
Date: Sun, 18 Aug 2019 21:07:06 +0800
Subject: [PATCH 2/2] Update dsrtc.asm

Make it easier to define customer battery or supercapacitor charge rates.
---
 Source/HBIOS/dsrtc.asm | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/Source/HBIOS/dsrtc.asm b/Source/HBIOS/dsrtc.asm
index e91c9093..7a882ebc 100644
--- a/Source/HBIOS/dsrtc.asm
+++ b/Source/HBIOS/dsrtc.asm
@@ -95,6 +95,15 @@ DSRTC_CE	.EQU	%00010000	; BIT 4 IS CHIP ENABLE (CE)
 DSRTC_MASK	.EQU	%11110000	; MASK FOR BITS WE OWN IN RTC LATCH PORT
 DSRTC_IDLE	.EQU	%00100000	; QUIESCENT STATE
 ;
+; VALUES FOR DIFFERENT BATTERY OR SUPERCAPACITOR CHARGE RATES
+;
+DS1d2k		.EQU	%10100101	; 1 DIODE 2K RESISTOR (DEFAULT)
+DS1d4k		.EQU	%10100110	; 1 DIODE 4K RESISTOR
+DS1d8k		.EQU	%10100111	; 1 DOIDE 8K RESISTOR
+DS2d2k		.EQU	%10101001	; 2 DIODES 2K RESISTOR
+DS2d4k		.EQU	%10101010	; 2 DIODES 4K RESISTOR
+DS2d8k		.EQU	%10101011	; 2 DIODES 8K RESISTOR
+;
 #ENDIF
 ;
 #IF (DSRTCMODE == DSRTCMODE_MFPIC)
@@ -161,7 +170,7 @@ DSRTC_INIT1:
 	
 	LD	E,$90			; ACCESS CHARGE REGISTER
 	CALL	DSRTC_CMD		; 
-	LD	E,$A5			; STD CHARGE VALUES
+	LD	E,DS1d2k		; STD CHARGE VALUES
 	CALL	DSRTC_PUT		; 
 	CALL	DSRTC_END		; FINISH REG WRITE