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Merge pull request #16 from wwarthen/dev

Dev
pull/293/head
b1ackmai1er 4 years ago
committed by GitHub
parent
commit
4d5f2ab219
No known key found for this signature in database GPG Key ID: 4AEE18F83AFDEB23
  1. 3
      Source/CBIOS/cbios.asm
  2. 24
      Source/Doc/Architecture.md
  3. 99
      Source/HBIOS/ay38910.asm
  4. 2
      Source/HBIOS/cfg_dyno.asm
  5. 2
      Source/HBIOS/cfg_ezz80.asm
  6. 8
      Source/HBIOS/cfg_master.asm
  7. 8
      Source/HBIOS/cfg_mbc.asm
  8. 2
      Source/HBIOS/cfg_mk4.asm
  9. 2
      Source/HBIOS/cfg_n8.asm
  10. 2
      Source/HBIOS/cfg_rcz180.asm
  11. 2
      Source/HBIOS/cfg_rcz280.asm
  12. 2
      Source/HBIOS/cfg_rcz80.asm
  13. 2
      Source/HBIOS/cfg_rph.asm
  14. 2
      Source/HBIOS/cfg_sbc.asm
  15. 4
      Source/HBIOS/cfg_scz180.asm
  16. 5
      Source/HBIOS/cfg_zeta.asm
  17. 2
      Source/HBIOS/cfg_zeta2.asm
  18. 157
      Source/HBIOS/hbios.asm
  19. 2
      Source/HBIOS/hbios.inc
  20. 220
      Source/HBIOS/lpt.asm
  21. 2
      Source/ver.inc
  22. 2
      Source/ver.lib

3
Source/CBIOS/cbios.asm

@ -432,6 +432,8 @@ WBOOT:
#ENDIF
;
#IFDEF PLTUNA
LD SP,STACK ; STACK FOR INITIALIZATION
; RESTORE COMMAND PROCESSOR FROM UNA BIOS CACHE
LD BC,$01FB ; UNA FUNC = SET BANK
LD DE,(BNKBIOS) ; UBIOS_PAGE (SEE PAGES.INC)
@ -1626,6 +1628,7 @@ LBA_IO:
;
DSK_IO2:
PUSH BC ; SAVE INCOMING FUNCTION, UNIT
RES 7,D ; CLEAR LBA BIT FOR UNA
LD B,C ; UNIT TO B
LD C,$41 ; UNA SET LBA
RST 08 ; CALL UNA

24
Source/Doc/Architecture.md

@ -1399,7 +1399,7 @@ If the driver is able to generate the requested note, a success (0) is
returned, otherwise a non-zero error state will be returned.
The sound chip resolution and its oscillator limit the range and
accuracy of the notes played. The typically range of the AY-3-8910
accuracy of the notes played. The typical range of the AY-3-8910
is six octaves, Bb2/A#2-A7, where each value is a unique tone. Values
above and below can still be played but each quarter tone step may not
result in a note change.
@ -1409,18 +1409,18 @@ to the corresponding octave and note.
| Note | Oct 0 | Oct 1 | Oct 2 | Oct 3 | Oct 4 | Oct 5 | Oct 6 | Oct 7 |
|:----- | -----:| -----:| -----:| -----:| -----:| -----:| -----:| -----:|
| Bb/A# | 0 | 48 | 96 | 144 | 192 | 240 | 288 | 336 |
| C | X | 8 | 56 | 104 | 152 | 200 | 248 | 296 |
| C#/Db | X | 12 | 60 | 108 | 156 | 204 | 252 | 300 |
| D | X | 16 | 64 | 112 | 160 | 208 | 256 | 304 |
| D#/Eb | X | 20 | 68 | 116 | 164 | 212 | 260 | 308 |
| E | X | 24 | 72 | 120 | 168 | 216 | 264 | 312 |
| F | X | 28 | 76 | 124 | 172 | 220 | 268 | 316 |
| F#/Gb | X | 32 | 80 | 128 | 176 | 224 | 272 | 320 |
| G | X | 36 | 84 | 132 | 180 | 228 | 276 | 324 |
| G#/Ab | X | 40 | 88 | 136 | 184 | 232 | 280 | 328 |
| A | X | 44 | 92 | 140 | 188 | 236 | 284 | 332 |
| A#/Bb | 0 | 48 | 96 | 144 | 192 | 240 | 288 | 336 |
| B | 4 | 52 | 100 | 148 | 196 | 244 | 292 | 340 |
| C | 8 | 56 | 104 | 152 | 200 | 248 | 296 | 344 |
| C#/Db | 12 | 60 | 108 | 156 | 204 | 252 | 300 | 348 |
| D | 16 | 64 | 112 | 160 | 208 | 256 | 304 | 352 |
| Eb/D# | 20 | 68 | 116 | 164 | 212 | 260 | 308 | 356 |
| E | 24 | 72 | 120 | 168 | 216 | 264 | 312 | 360 |
| F | 28 | 76 | 124 | 172 | 220 | 268 | 316 | 364 |
| F#/Gb | 32 | 80 | 128 | 176 | 224 | 272 | 320 | 368 |
| G | 36 | 84 | 132 | 180 | 228 | 276 | 324 | 372 |
| Ab/G# | 40 | 88 | 136 | 184 | 232 | 280 | 328 | 376 |
| A | 44 | 92 | 140 | 188 | 236 | 284 | 332 | 380 |
### Function 0x54 -- Sound Play (SNDPLAY)

99
Source/HBIOS/ay38910.asm

@ -327,7 +327,8 @@ AY_NOTE:
LD H, (HL) ; SO WE CAN UPDATE IT FOR THE REQUIRED OCTAVE
LD L, A
;
LD A,AY_SCALE-1 ; THE NOTE TABLE PERIOD DATA HAS BEEN
;LD A,AY_SCALE - 1 ; THE NOTE TABLE PERIOD DATA HAS BEEN
LD A,AY_SCALE ; THE NOTE TABLE PERIOD DATA HAS BEEN
ADD A,C ; PRESCALED TO MAINTAIN RANGE SO ALLOW
LD B,A ; FOR THIS WHEN CHANGING OCTAVE
AY_NOTE1:
@ -617,51 +618,51 @@ AYT_REGWR .DB "\r\nOUT AY-3-8910 $"
; ASSUMING A CLOCK OF 1843200 THIS MAPS TO A0#
;
AY3NOTETBL:
.DW AY_RATIO / 2913
.DW AY_RATIO / 2956
.DW AY_RATIO / 2999
.DW AY_RATIO / 3042
.DW AY_RATIO / 3086
.DW AY_RATIO / 3131
.DW AY_RATIO / 3177
.DW AY_RATIO / 3223
.DW AY_RATIO / 3270
.DW AY_RATIO / 3318
.DW AY_RATIO / 3366
.DW AY_RATIO / 3415
.DW AY_RATIO / 3464
.DW AY_RATIO / 3515
.DW AY_RATIO / 3566
.DW AY_RATIO / 3618
.DW AY_RATIO / 3670
.DW AY_RATIO / 3724
.DW AY_RATIO / 3778
.DW AY_RATIO / 3833
.DW AY_RATIO / 3889
.DW AY_RATIO / 3945
.DW AY_RATIO / 4003
.DW AY_RATIO / 4061
.DW AY_RATIO / 4120
.DW AY_RATIO / 4180
.DW AY_RATIO / 4241
.DW AY_RATIO / 4302
.DW AY_RATIO / 4365
.DW AY_RATIO / 4428
.DW AY_RATIO / 4493
.DW AY_RATIO / 4558
.DW AY_RATIO / 4624
.DW AY_RATIO / 4692
.DW AY_RATIO / 4760
.DW AY_RATIO / 4829
.DW AY_RATIO / 4899
.DW AY_RATIO / 4971
.DW AY_RATIO / 5043
.DW AY_RATIO / 5116
.DW AY_RATIO / 5191
.DW AY_RATIO / 5266
.DW AY_RATIO / 5343
.DW AY_RATIO / 5421
.DW AY_RATIO / 5499
.DW AY_RATIO / 5579
.DW AY_RATIO / 5661
.DW AY_RATIO / 5743
.DW AY_RATIO / 2913 ; A0#/B0b 178977250 / 2913 = 61440; PROOF: 61440 >> 3 = 7680, 3579545 / 7680 / 16 = 29.13
.DW AY_RATIO / 2956 ;
.DW AY_RATIO / 2999 ;
.DW AY_RATIO / 3042 ;
.DW AY_RATIO / 3086 ; B0
.DW AY_RATIO / 3131 ;
.DW AY_RATIO / 3177 ;
.DW AY_RATIO / 3223 ;
.DW AY_RATIO / 3270 ; C1
.DW AY_RATIO / 3318 ;
.DW AY_RATIO / 3366 ;
.DW AY_RATIO / 3415 ;
.DW AY_RATIO / 3464 ; C1#/D1b
.DW AY_RATIO / 3515 ;
.DW AY_RATIO / 3566 ;
.DW AY_RATIO / 3618 ;
.DW AY_RATIO / 3670 ; D1
.DW AY_RATIO / 3724 ;
.DW AY_RATIO / 3778 ;
.DW AY_RATIO / 3833 ;
.DW AY_RATIO / 3889 ; D1#/E1b
.DW AY_RATIO / 3945 ;
.DW AY_RATIO / 4003 ;
.DW AY_RATIO / 4061 ;
.DW AY_RATIO / 4120 ; E1
.DW AY_RATIO / 4180 ;
.DW AY_RATIO / 4241 ;
.DW AY_RATIO / 4302 ;
.DW AY_RATIO / 4365 ; F1
.DW AY_RATIO / 4428 ;
.DW AY_RATIO / 4493 ;
.DW AY_RATIO / 4558 ;
.DW AY_RATIO / 4624 ; F1#/G1b
.DW AY_RATIO / 4692 ;
.DW AY_RATIO / 4760 ;
.DW AY_RATIO / 4829 ;
.DW AY_RATIO / 4899 ; G1
.DW AY_RATIO / 4971 ;
.DW AY_RATIO / 5043 ;
.DW AY_RATIO / 5116 ;
.DW AY_RATIO / 5191 ; G1#/A1b
.DW AY_RATIO / 5266 ;
.DW AY_RATIO / 5343 ;
.DW AY_RATIO / 5421 ;
.DW AY_RATIO / 5499 ; A1
.DW AY_RATIO / 5579 ;
.DW AY_RATIO / 5661 ;
.DW AY_RATIO / 5743 ;

2
Source/HBIOS/cfg_dyno.asm

@ -183,7 +183,7 @@ HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
;
CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_ezz80.asm

@ -224,7 +224,7 @@ HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
;
CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

8
Source/HBIOS/cfg_master.asm

@ -300,10 +300,10 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
CENCNT .EQU 1 ; CEN: NUMBER OF CHIPS TO DETECT (1-2)
CEN0BASE .EQU $E8 ; CEN 0: REGISTERS BASE ADR
CEN1BASE .EQU $EC ; CEN 1: REGISTERS BASE ADR
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD

8
Source/HBIOS/cfg_mbc.asm

@ -224,10 +224,10 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
CENENABLE .EQU TRUE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
CENCNT .EQU 1 ; CEN: NUMBER OF CHIPS TO DETECT (1-2)
CEN0BASE .EQU $E8 ; CEN 0: REGISTERS BASE ADR
CEN1BASE .EQU $EC ; CEN 1: REGISTERS BASE ADR
LPTENABLE .EQU TRUE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTCNT .EQU 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPT0BASE .EQU $E8 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .EQU $EC ; LPT 1: REGISTERS BASE ADR
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD

2
Source/HBIOS/cfg_mk4.asm

@ -226,7 +226,7 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD

2
Source/HBIOS/cfg_n8.asm

@ -224,7 +224,7 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD

2
Source/HBIOS/cfg_rcz180.asm

@ -240,7 +240,7 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_rcz280.asm

@ -255,7 +255,7 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_rcz80.asm

@ -244,7 +244,7 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_rph.asm

@ -224,7 +224,7 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD

2
Source/HBIOS/cfg_sbc.asm

@ -224,7 +224,7 @@ PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD

4
Source/HBIOS/cfg_scz180.asm

@ -230,13 +230,13 @@ PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (P
;
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

5
Source/HBIOS/cfg_zeta.asm

@ -164,11 +164,8 @@ PPPCONENABLE .EQU TRUE ; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
PIOCNT .EQU 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .EQU $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .EQU $BC ; PIO 1: REGISTERS BASE ADR
;
CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

2
Source/HBIOS/cfg_zeta2.asm

@ -176,7 +176,7 @@ HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIOENABLE .EQU FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
;
CENENABLE .EQU FALSE ; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
LPTENABLE .EQU FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

157
Source/HBIOS/hbios.asm

@ -2826,6 +2826,45 @@ INITSYS4:
LDCTL (C),HL
#ENDIF
;
#IFDEF TESTING
;
; ROUTINE TO BEEP THE DEAULT SOUND UNIT (NOT FINISHED)
; NEED TO CHECK FOR EXISTENCE OF SOUND UNIT 0
; NEED TO TEST AGAINST ALL SOUND DRIVERS
; CAN SPEAKER DRIVER BE MODIFIED TO PLAY ARBITRARY DURATION?
; WHICH CHANNEL SHOULD BE USED? IS THERE A GOOD DEFAULT CHANNEL?
;
SNDUNIT .EQU 0
;
HB_BEEP:
LD B,$50 ; SOUND RESET FUNCTION
LD C,SNDUNIT ; SOUND UNIT NUMBER
CALL SND_DISPATCH ; DO IT
LD B,$51 ; VOLUME
LD C,SNDUNIT ; SOUND UNIT NUMBER
LD L,$FF ; MAX
CALL SND_DISPATCH ; DO IT
LD B,$53 ; SELECT NOTE
LD C,SNDUNIT ; SOUND UNIT NUMBER
;LD HL,0 ; A0#
LD HL,200 ; C4
CALL SND_DISPATCH ; DO IT
;LD B,$56 ; DURATION
;LD C,SNDUNIT ; SOUND UNIT NUMBER
;LD HL,500 ; 1/2 SECOND
;CALL SND_DISPATCH ; DO IT
LD B,$54 ; PLAY SOUND
LD C,SNDUNIT ; SOUND UNIT NUMBER
LD D,1 ; CHANNEL 0
CALL SND_DISPATCH ; DO IT
LD DE,15625 ; PLAY FOR 1/4 SECOND
CALL VDELAY
LD B,$50 ; SOUND RESET FUNCTION
LD C,SNDUNIT ; SOUND UNIT NUMBER
CALL SND_DISPATCH ; DO IT
;
#ENDIF
;
#IFNDEF ROMBOOT
;
; COPY OS IMAGE: BID_USR:<IMG START> --> BID_USR:0
@ -2931,8 +2970,8 @@ HB_PCINITTBL:
#IF (PIOENABLE)
.DW PIO_PREINIT
#ENDIF
#IF CENENABLE)
.DW CEN_PREINIT
#IF LPTENABLE)
.DW LPT_PREINIT
#ENDIF
#IF (PIO_4P | PIO_ZP)
.DW PIO_PREINIT
@ -2986,6 +3025,18 @@ HB_INITTBL:
#IF (ACIAENABLE)
.DW ACIA_INIT
#ENDIF
#IF (PIOENABLE)
.DW PIO_INIT
#ENDIF
#IF (LPTENABLE)
.DW LPT_INIT
#ENDIF
#IF (PIO_4P | PIO_ZP)
.DW PIO_INIT
#ENDIF
#IF (UFENABLE)
.DW UF_INIT
#ENDIF
#IF (DSRTCENABLE)
.DW DSRTC_INIT
#ENDIF
@ -3053,18 +3104,6 @@ HB_INITTBL:
#IF (PPPENABLE)
.DW PPP_INIT
#ENDIF
#IF (PIOENABLE)
.DW PIO_INIT
#ENDIF
#IF (CENENABLE)
.DW CEN_INIT
#ENDIF
#IF (PIO_4P | PIO_ZP)
.DW PIO_INIT
#ENDIF
#IF (UFENABLE)
.DW UF_INIT
#ENDIF
;
HB_INITTBLLEN .EQU (($ - HB_INITTBL) / 2)
@ -4114,10 +4153,10 @@ SYS_GETCPUSPD:
;
#IF (((PLATFORM == PLT_SBC) | (PLATFORM == PLT_MBC)) & (CPUSPDCAP==SPD_HILO))
LD A,(HB_RTCVAL)
BIT 3,A
#IF (PLATFORM == PLT_SBC)
XOR %00001000 ; SBC SPEED BIT IS INVERTED
#ENDIF
BIT 3,A
LD L,0 ; ASSUME HALF SPEED
JR Z,SYS_GETCPUSPD1
LD L,1
@ -5785,6 +5824,15 @@ SIZ_ASCI .EQU $ - ORG_ASCI
.ECHO " bytes.\n"
#ENDIF
;
#IF (Z2UENABLE)
ORG_Z2U .EQU $
#INCLUDE "z2u.asm"
SIZ_Z2U .EQU $ - ORG_Z2U
.ECHO "Z2U occupies "
.ECHO SIZ_Z2U
.ECHO " bytes.\n"
#ENDIF
;
#IF (UARTENABLE)
ORG_UART .EQU $
#INCLUDE "uart.asm"
@ -5821,12 +5869,39 @@ SIZ_ACIA .EQU $ - ORG_ACIA
.ECHO " bytes.\n"
#ENDIF
;
#IF (Z2UENABLE)
ORG_Z2U .EQU $
#INCLUDE "z2u.asm"
SIZ_Z2U .EQU $ - ORG_Z2U
.ECHO "Z2U occupies "
.ECHO SIZ_Z2U
#IF (PIOENABLE)
ORG_PIO .EQU $
#INCLUDE "pio.asm"
SIZ_PIO .EQU $ - ORG_PIO
.ECHO "PIO occupies "
.ECHO SIZ_PIO
.ECHO " bytes.\n"
#ENDIF
;
#IF (LPTENABLE)
ORG_LPT .EQU $
#INCLUDE "lpt.asm"
SIZ_LPT .EQU $ - ORG_LPT
.ECHO "LPT occupies "
.ECHO SIZ_LPT
.ECHO " bytes.\n"
#ENDIF
;
#IF (PIO_4P | PIO_ZP | PIO_SBC)
ORG_PIO .EQU $
#INCLUDE "pio.asm"
SIZ_PIO .EQU $ - ORG_PIO
.ECHO "PIO occupies "
.ECHO SIZ_PIO
.ECHO " bytes.\n"
#ENDIF
;
#IF (UFENABLE)
ORG_UF .EQU $
#INCLUDE "uf.asm"
SIZ_UF .EQU $ - ORG_UF
.ECHO "UF occupies "
.ECHO SIZ_UF
.ECHO " bytes.\n"
#ENDIF
;
@ -6061,42 +6136,6 @@ SIZ_SPK .EQU $ - ORG_SPK
.ECHO SIZ_SPK
.ECHO " bytes.\n"
#ENDIF
;
#IF (PIOENABLE)
ORG_PIO .EQU $
#INCLUDE "pio.asm"
SIZ_PIO .EQU $ - ORG_PIO
.ECHO "PIO occupies "
.ECHO SIZ_PIO
.ECHO " bytes.\n"
#ENDIF
;
#IF (CENENABLE)
ORG_CEN .EQU $
#INCLUDE "cen.asm"
SIZ_CEN .EQU $ - ORG_CEN
.ECHO "CEN occupies "
.ECHO SIZ_CEN
.ECHO " bytes.\n"
#ENDIF
;
#IF (PIO_4P | PIO_ZP | PIO_SBC)
ORG_PIO .EQU $
#INCLUDE "pio.asm"
SIZ_PIO .EQU $ - ORG_PIO
.ECHO "PIO occupies "
.ECHO SIZ_PIO
.ECHO " bytes.\n"
#ENDIF
;
#IF (UFENABLE)
ORG_UF .EQU $
#INCLUDE "uf.asm"
SIZ_UF .EQU $ - ORG_UF
.ECHO "UF occupies "
.ECHO SIZ_UF
.ECHO " bytes.\n"
#ENDIF
#IF (KIOENABLE)
ORG_KIO .EQU $
#INCLUDE "kio.asm"
@ -6921,7 +6960,7 @@ PS_FLP_DSTR: .TEXT "SD$" ; PS_FLPSD
;
PS_SDSTRREF:
.DW PS_SDUART, PS_SDASCI, PS_SDTERM, PS_SDPRPCON, PS_SDPPPCON
.DW PS_SDSIO, PS_SDACIA, PS_SDPIO, PS_SDUF, PS_SDDUART, PS_SDZ2U, PS_SDCEN
.DW PS_SDSIO, PS_SDACIA, PS_SDPIO, PS_SDUF, PS_SDDUART, PS_SDZ2U, PS_SDLPT
;
PS_SDUART .TEXT "UART$"
PS_SDASCI .TEXT "ASCI$"
@ -6934,7 +6973,7 @@ PS_SDPIO .TEXT "PIO$"
PS_SDUF .TEXT "UF$"
PS_SDDUART .TEXT "DUART$"
PS_SDZ2U .TEXT "Z2U$"
PS_SDCEN .TEXT "CEN$"
PS_SDLPT .TEXT "LPT$"
;
; CHARACTER SUB TYPE STRINGS
;

2
Source/HBIOS/hbios.inc

@ -183,7 +183,7 @@ CIODEV_PIO .EQU $70
CIODEV_UF .EQU $80
CIODEV_DUART .EQU $90
CIODEV_Z2U .EQU $A0
CIODEV_CEN .EQU $B0
CIODEV_LPT .EQU $B0
;
; SUB TYPES OF CHAR DEVICES
;

220
Source/HBIOS/cen.asm → Source/HBIOS/lpt.asm

@ -1,10 +1,10 @@
;
;==================================================================================================
; CENTRONICS INTERFACE DRIVER
; CENTRONICS (LPT) INTERFACE DRIVER
;==================================================================================================
;
; CENTRONICS-STYLE PARALLEL PRINTER DRIVER. ASSUMES MBC PRINT BOARD
; AS HARDWARE.
; CENTRONICS-STYLE PARALLEL PRINTER DRIVER. ASSUMES IBM STYLE
; HARDWARE INTERFACE AS DESCRIBED BELOW.
;
; IMPLEMENTED AS A ROMWBW CHARACTER DEVICE. CURRENTLY HANDLES OUPUT
; ONLY.
@ -30,56 +30,56 @@
; | STAT1 | STAT0 | ENBL | PINT | SEL | RES | LF | STB |
; +-------+-------+-------+-------+-------+-------+-------+-------+
;
CEN_NONE .EQU 0
CEN_MBC .EQU 1
LPT_NONE .EQU 0 ; NOT PRESENT
LPT_IBM .EQU 1 ; IBM PC STYLE INTERFACE
;
; PRE-CONSOLE INITIALIZATION - DETECT AND INIT HARDWARE
;
CEN_PREINIT:
LPT_PREINIT:
;
; SETUP THE DISPATCH TABLE ENTRIES
; NOTE: INTS WILL BE DISABLED WHEN PREINIT IS CALLED AND THEY MUST REMIAIN
; DISABLED.
;
LD B,CEN_CFGCNT ; LOOP CONTROL
LD B,LPT_CFGCNT ; LOOP CONTROL
XOR A ; ZERO TO ACCUM
LD (CEN_DEV),A ; CURRENT DEVICE NUMBER
LD IY,CEN_CFG ; POINT TO START OF CFG TABLE
CEN_PREINIT0:
LD (LPT_DEV),A ; CURRENT DEVICE NUMBER
LD IY,LPT_CFG ; POINT TO START OF CFG TABLE
LPT_PREINIT0:
PUSH BC ; SAVE LOOP CONTROL
CALL CEN_INITUNIT ; HAND OFF TO UNIT INIT CODE
CALL LPT_INITUNIT ; HAND OFF TO UNIT INIT CODE
POP BC ; RESTORE LOOP CONTROL
;
LD A,(IY+1) ; GET THE CEN TYPE DETECTED
LD A,(IY+1) ; GET THE LPT TYPE DETECTED
OR A ; SET FLAGS
JR Z,CEN_PREINIT2 ; SKIP IT IF NOTHING FOUND
JR Z,LPT_PREINIT2 ; SKIP IT IF NOTHING FOUND
;
PUSH BC ; SAVE LOOP CONTROL
PUSH IY ; CFG ENTRY ADDRESS
POP DE ; ... TO DE
LD BC,CEN_FNTBL ; BC := FUNCTION TABLE ADDRESS
CALL NZ,CIO_ADDENT ; ADD ENTRY IF CEN FOUND, BC:DE
LD BC,LPT_FNTBL ; BC := FUNCTION TABLE ADDRESS
CALL NZ,CIO_ADDENT ; ADD ENTRY IF LPT FOUND, BC:DE
POP BC ; RESTORE LOOP CONTROL
;
CEN_PREINIT2:
LD DE,CEN_CFGSIZ ; SIZE OF CFG ENTRY
LPT_PREINIT2:
LD DE,LPT_CFGSIZ ; SIZE OF CFG ENTRY
ADD IY,DE ; BUMP IY TO NEXT ENTRY
DJNZ CEN_PREINIT0 ; LOOP UNTIL DONE
DJNZ LPT_PREINIT0 ; LOOP UNTIL DONE
;
CEN_PREINIT3:
LPT_PREINIT3:
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
;
; CEN INITIALIZATION ROUTINE
; LPT INITIALIZATION ROUTINE
;
CEN_INITUNIT:
CALL CEN_DETECT ; DETERMINE CEN TYPE
LPT_INITUNIT:
CALL LPT_DETECT ; DETERMINE LPT TYPE
LD (IY+1),A ; SAVE IN CONFIG TABLE
OR A ; SET FLAGS
RET Z ; ABORT IF NOTHING THERE
;
; UPDATE WORKING CEN DEVICE NUM
LD HL,CEN_DEV ; POINT TO CURRENT DEVICE NUM
; UPDATE WORKING LPT DEVICE NUM
LD HL,LPT_DEV ; POINT TO CURRENT DEVICE NUM
LD A,(HL) ; PUT IN ACCUM
INC (HL) ; INCREMENT IT (FOR NEXT LOOP)
LD (IY),A ; UPDATE UNIT NUM
@ -88,44 +88,44 @@ CEN_INITUNIT:
LD DE,-1 ; LEAVE CONFIG ALONE
; CALL INITDEV TO IMPLEMENT CONFIG, BUT NOTE THAT WE CALL
; THE INITDEV ENTRY POINT THAT DOES NOT ENABLE/DISABLE INTS!
JP CEN_INITDEVX ; IMPLEMENT IT AND RETURN
JP LPT_INITDEVX ; IMPLEMENT IT AND RETURN
;
;
;
CEN_INIT:
LD B,CEN_CFGCNT ; COUNT OF POSSIBLE CEN UNITS
LD IY,CEN_CFG ; POINT TO START OF CFG TABLE
CEN_INIT1:
LPT_INIT:
LD B,LPT_CFGCNT ; COUNT OF POSSIBLE LPT UNITS
LD IY,LPT_CFG ; POINT TO START OF CFG TABLE
LPT_INIT1:
PUSH BC ; SAVE LOOP CONTROL
LD A,(IY+1) ; GET CEN TYPE
LD A,(IY+1) ; GET LPT TYPE
OR A ; SET FLAGS
CALL NZ,CEN_PRTCFG ; PRINT IF NOT ZERO
CALL NZ,LPT_PRTCFG ; PRINT IF NOT ZERO
POP BC ; RESTORE LOOP CONTROL
LD DE,CEN_CFGSIZ ; SIZE OF CFG ENTRY
LD DE,LPT_CFGSIZ ; SIZE OF CFG ENTRY
ADD IY,DE ; BUMP IY TO NEXT ENTRY
DJNZ CEN_INIT1 ; LOOP TILL DONE
DJNZ LPT_INIT1 ; LOOP TILL DONE
;
XOR A ; SIGNAL SUCCESS
RET ; DONE
;
; DRIVER FUNCTION TABLE
;
CEN_FNTBL:
.DW CEN_IN
.DW CEN_OUT
.DW CEN_IST
.DW CEN_OST
.DW CEN_INITDEV
.DW CEN_QUERY
.DW CEN_DEVICE
#IF (($ - CEN_FNTBL) != (CIO_FNCNT * 2))
.ECHO "*** INVALID CEN FUNCTION TABLE ***\n"
LPT_FNTBL:
.DW LPT_IN
.DW LPT_OUT
.DW LPT_IST
.DW LPT_OST
.DW LPT_INITDEV
.DW LPT_QUERY
.DW LPT_DEVICE
#IF (($ - LPT_FNTBL) != (CIO_FNCNT * 2))
.ECHO "*** INVALID LPT FUNCTION TABLE ***\n"
!!! ; FORCE AN ASSEMBLY ERROR
#ENDIF
;
; BYTE INTPUT
;
CEN_IN:
LPT_IN:
; INPUT NOT SUPPORTED - RETURN NULL BYTE
LD E,0 ; NULL BYTE
XOR A ; SIGNAL SUCCESS
@ -133,20 +133,19 @@ CEN_IN:
;
; BYTE OUTPUT
;
CEN_OUT:
CALL CEN_OST ; READY TO SEND?
JR Z,CEN_OUT ; LOOP IF NOT
; *** ADD CODE TO OUTPUT BYTE ***
LPT_OUT:
CALL LPT_OST ; READY TO SEND?
JR Z,LPT_OUT ; LOOP IF NOT
LD A,(IY+3)
LD C,A ; PORT 0 (DATA)
OUT (C),E ; OUTPUT DATA TO PORT
call DELAY ; ignore anything back after a reset
ld A,%00001101 ; select & strobe, LEDS OFF
CALL DELAY ; IGNORE ANYTHING BACK AFTER A RESET
LD A,%00001101 ; SELECT & STROBE, LEDS OFF
INC C ; PUT CONTROL PORT IN C
INC C
OUT (C),A ; OUTPUT DATA TO PORT
call DELAY ; ignore anything back after a reset
ld A,%00001100 ; select, LEDS OFF
CALL DELAY ; IGNORE ANYTHING BACK AFTER A RESET
LD A,%00001100 ; SELECT, LEDS OFF
OUT (C),A ; OUTPUT DATA TO PORT
XOR A ; SIGNAL SUCCESS
@ -154,14 +153,14 @@ CEN_OUT:
;
; INPUT STATUS
;
CEN_IST:
LPT_IST:
; INPUT NOT SUPPORTED - RETURN NOT READY
XOR A ; ZERO BYTES AVAILABLE
RET ; DONE
;
; OUTPUT STATUS
;
CEN_OST:
LPT_OST:
LD A,(IY+3)
LD C,A ; PORT 0 (DATA)
INC C ; SELECT STATUS PORT
@ -171,16 +170,16 @@ CEN_OST:
;
; INITIALIZE DEVICE
;
CEN_INITDEV:
LPT_INITDEV:
HB_DI ; AVOID CONFLICTS
CALL CEN_INITDEVX ; DO THE REAL WORK
CALL LPT_INITDEVX ; DO THE REAL WORK
HB_EI ; INTS BACK ON
RET ; DONE
;
; THIS ENTRY POINT BYPASSES DISABLING/ENABLING INTS WHICH IS REQUIRED BY
; PREINIT ABOVE. PREINIT IS NOT ALLOWED TO ENABLE INTS!
;
CEN_INITDEVX:
LPT_INITDEVX:
LD A,(IY+3)
LD C,A ; PORT 0 (DATA)
XOR A ; CLEAR ACCUM
@ -197,7 +196,7 @@ CEN_INITDEVX:
;
;
;
CEN_QUERY:
LPT_QUERY:
LD E,(IY+4) ; FIRST CONFIG BYTE TO E
LD D,(IY+5) ; SECOND CONFIG BYTE TO D
XOR A ; SIGNAL SUCCESS
@ -205,8 +204,8 @@ CEN_QUERY:
;
;
;
CEN_DEVICE:
LD D,CIODEV_CEN ; D := DEVICE TYPE
LPT_DEVICE:
LD D,CIODEV_LPT ; D := DEVICE TYPE
LD E,(IY) ; E := PHYSICAL UNIT
LD C,$40 ; C := DEVICE TYPE, 0x40 IS PIO
LD H,(IY+1) ; H := MODE
@ -214,62 +213,71 @@ CEN_DEVICE:
XOR A ; SIGNAL SUCCESS
RET
;
; CEN DETECTION ROUTINE
; LPT DETECTION ROUTINE
;
CEN_DETECT:
LPT_DETECT:
LD A,(IY+3) ; BASE PORT ADDRESS
ADD A,2 ; USE PORT 2 FOR DETECT
LD C,A ; PUT IN C FOR I/O
CALL CEN_DETECT2 ; CHECK IT
JR Z,CEN_DETECT1 ; FOUND IT, RECORD IT
LD A,CEN_NONE ; NOTHING FOUND
CALL LPT_DETECT2 ; CHECK IT
JR Z,LPT_DETECT1 ; FOUND IT, RECORD IT
LD A,LPT_NONE ; NOTHING FOUND
RET ; DONE
;
CEN_DETECT1:
; CEN FOUND, RECORD IT
LD A,CEN_MBC ; RETURN CHIP TYPE
LPT_DETECT1:
; LPT FOUND, RECORD IT
LD A,LPT_IBM ; RETURN CHIP TYPE
RET ; DONE
;
CEN_DETECT2:
; LOOK FOR CEN AT PORT ADDRESS IN C
XOR A ; DEFAULT VALUE
LPT_DETECT2:
; LOOK FOR LPT AT BASE PORT ADDRESS IN C
INC C ; PORT C FOR I/O
INC C ; ...
XOR A ; DEFAULT VALUE (TRI-STATE OFF)
OUT (C),A ; SEND IT
IN A,(C) ; READ IT
AND %11000000 ; ISOLATE STATUS BITS
CP %00000000 ; CORRECT VALUE?
RET NZ ; IF NOT, RETURN
LD A,%11000000 ; STATUS BITS ON (LEDS OFF)
;
;IN A,(C) ; READ IT
;AND %11000000 ; ISOLATE STATUS BITS
;CP %00000000 ; CORRECT VALUE?
;RET NZ ; IF NOT, RETURN
;LD A,%11000000 ; STATUS BITS ON (LEDS OFF)
;OUT (C),A ; SEND IT
;IN A,(C) ; READ IT
;AND %11000000 ; ISOLATE STATUS BITS
;CP %11000000 ; CORRECT VALUE?
;
DEC C ; BACK TO BASE PORT
DEC C ; ...
LD A,$A5 ; TEST VALUE
OUT (C),A ; SEND IT
IN A,(C) ; READ IT
AND %11000000 ; ISOLATE STATUS BITS
CP %11000000 ; CORRECT VALUE?
IN A,(C) ; READ IT BACK
CP $A5 ; CORRECT?
RET ; RETURN (ZF SET CORRECTLY)
;
;
;
CEN_PRTCFG:
LPT_PRTCFG:
; ANNOUNCE PORT
CALL NEWLINE ; FORMATTING
PRTS("CEN$") ; FORMATTING
PRTS("LPT$") ; FORMATTING
LD A,(IY) ; DEVICE NUM
CALL PRTDECB ; PRINT DEVICE NUM
PRTS(": IO=0x$") ; FORMATTING
LD A,(IY+3) ; GET BASE PORT
CALL PRTHEXBYTE ; PRINT BASE PORT
; PRINT THE CEN TYPE
; PRINT THE LPT TYPE
CALL PC_SPACE ; FORMATTING
LD A,(IY+1) ; GET CEN TYPE BYTE
LD A,(IY+1) ; GET LPT TYPE BYTE
RLCA ; MAKE IT A WORD OFFSET
LD HL,CEN_TYPE_MAP ; POINT HL TO TYPE MAP TABLE
LD HL,LPT_TYPE_MAP ; POINT HL TO TYPE MAP TABLE
CALL ADDHLA ; HL := ENTRY
LD E,(HL) ; DEREFERENCE
INC HL ; ...
LD D,(HL) ; ... TO GET STRING POINTER
CALL WRITESTR ; PRINT IT
;
; ALL DONE IF NO CEN WAS DETECTED
LD A,(IY+1) ; GET CEN TYPE BYTE
; ALL DONE IF NO LPT WAS DETECTED
LD A,(IY+1) ; GET LPT TYPE BYTE
OR A ; SET FLAGS
RET Z ; IF ZERO, NOT PRESENT
;
@ -280,41 +288,41 @@ CEN_PRTCFG:
;
;
;
CEN_TYPE_MAP:
.DW CEN_STR_NONE
.DW CEN_STR_MBC
LPT_TYPE_MAP:
.DW LPT_STR_NONE
.DW LPT_STR_IBM
;
CEN_STR_NONE .DB "<NOT PRESENT>$"
CEN_STR_MBC .DB "MBC$"
LPT_STR_NONE .DB "<NOT PRESENT>$"
LPT_STR_IBM .DB "IBM$"
;
; WORKING VARIABLES
;
CEN_DEV .DB 0 ; DEVICE NUM USED DURING INIT
LPT_DEV .DB 0 ; DEVICE NUM USED DURING INIT
;
; CEN DEVICE CONFIGURATION TABLE
; LPT DEVICE CONFIGURATION TABLE
;
CEN_CFG:
LPT_CFG:
;
CEN0_CFG:
; CEN MODULE A CONFIG
LPT0_CFG:
; LPT MODULE A CONFIG
.DB 0 ; DEVICE NUMBER (SET DURING INIT)
.DB 0 ; CEN TYPE (SET DURING INIT)
.DB 0 ; LPT TYPE (SET DURING INIT)
.DB 0 ; MODULE ID
.DB CEN0BASE ; BASE PORT
.DB LPT0BASE ; BASE PORT
.DW 0 ; LINE CONFIGURATION
;
CEN_CFGSIZ .EQU $ - CEN_CFG ; SIZE OF ONE CFG TABLE ENTRY
LPT_CFGSIZ .EQU $ - LPT_CFG ; SIZE OF ONE CFG TABLE ENTRY
;
#IF (CENCNT >= 2)
#IF (LPTCNT >= 2)
;
CEN1_CFG:
; CEN MODULE B CONFIG
LPT1_CFG:
; LPT MODULE B CONFIG
.DB 0 ; DEVICE NUMBER (SET DURING INIT)
.DB 0 ; CEN TYPE (SET DURING INIT)
.DB 0 ; LPT TYPE (SET DURING INIT)
.DB 1 ; MODULE ID
.DB CEN1BASE ; BASE PORT
.DB LPT1BASE ; BASE PORT
.DW 0 ; LINE CONFIGURATION
;
#ENDIF
;
CEN_CFGCNT .EQU ($ - CEN_CFG) / CEN_CFGSIZ
LPT_CFGCNT .EQU ($ - LPT_CFG) / LPT_CFGSIZ

2
Source/ver.inc

@ -2,4 +2,4 @@
#DEFINE RMN 1
#DEFINE RUP 1
#DEFINE RTP 0
#DEFINE BIOSVER "3.1.1-pre.173"
#DEFINE BIOSVER "3.1.1-pre.176"

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 1
rup equ 1
rtp equ 0
biosver macro
db "3.1.1-pre.173"
db "3.1.1-pre.176"
endm

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