From 500e0e9f6315713eeefd01678b680ac877b580a8 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Sun, 1 Feb 2026 15:10:40 -0800 Subject: [PATCH] Regression Testing General regression testing of all platforms/drivers in preparation for v3.6 lockdown. Review/sync of all config files. --- Doc/RomWBW Applications.pdf | Bin 413967 -> 413967 bytes Doc/RomWBW Disk Catalog.pdf | Bin 257606 -> 257607 bytes Doc/RomWBW Hardware.pdf | Bin 395297 -> 395338 bytes Doc/RomWBW Introduction.pdf | Bin 96604 -> 96604 bytes Doc/RomWBW System Guide.pdf | Bin 634425 -> 634428 bytes Doc/RomWBW User Guide.pdf | Bin 572652 -> 572652 bytes ReadMe.md | 2 +- ReadMe.txt | 2 +- Source/Apps/Tune/tune.asm | 32 +++- Source/Apps/rtc/rtc.asm | 11 +- Source/Doc/Hardware.md | 1 + Source/HBIOS/Config/EPITX_std.asm | 1 + Source/HBIOS/Config/EZZ80_easy_std.asm | 9 +- Source/HBIOS/Config/EZZ80_tiny_std.asm | 7 - Source/HBIOS/Config/GMZ180_std.asm | 2 - Source/HBIOS/Config/MK4_std.asm | 1 + Source/HBIOS/Config/N8_std.asm | 8 +- Source/HBIOS/Config/RC2014_std.asm | 16 +- Source/HBIOS/Config/RCEZ80_std.asm | 2 +- Source/HBIOS/Config/RCZ180_ext_std.asm | 14 +- Source/HBIOS/Config/RCZ180_nat_std.asm | 14 +- Source/HBIOS/Config/RCZ180_z1rcc_std.asm | 14 +- Source/HBIOS/Config/RCZ280_ext_std.asm | 12 +- Source/HBIOS/Config/RCZ280_nat_std.asm | 12 +- Source/HBIOS/Config/RCZ280_zz80mb_std.asm | 14 +- Source/HBIOS/Config/RCZ280_zzrcc_ram_std.asm | 14 +- Source/HBIOS/Config/RCZ280_zzrcc_std.asm | 14 +- Source/HBIOS/Config/RCZ80_coleco_std.asm | 48 +++++- Source/HBIOS/Config/RCZ80_ez512_std.asm | 35 +--- Source/HBIOS/Config/RCZ80_k80w_std.asm | 63 ++++++- Source/HBIOS/Config/RCZ80_kio_std.asm | 67 +++++++- Source/HBIOS/Config/RCZ80_skz_std.asm | 14 +- Source/HBIOS/Config/RCZ80_std.asm | 15 +- Source/HBIOS/Config/RCZ80_zrc512_std.asm | 15 +- Source/HBIOS/Config/RCZ80_zrc_ram_std.asm | 13 +- Source/HBIOS/Config/RCZ80_zrc_std.asm | 15 +- Source/HBIOS/Config/SCZ180_sc126_std.asm | 14 +- Source/HBIOS/Config/SCZ180_sc130_std.asm | 16 +- Source/HBIOS/Config/SCZ180_sc131_std.asm | 9 - Source/HBIOS/Config/SCZ180_sc140_std.asm | 23 +-- Source/HBIOS/Config/SCZ180_sc503_std.asm | 24 +-- Source/HBIOS/Config/SCZ180_sc700_std.asm | 39 ++++- Source/HBIOS/Config/ZETA2_std.asm | 5 +- Source/HBIOS/Config/ZETA_std.asm | 2 + Source/HBIOS/cfg_DUO.asm | 4 + Source/HBIOS/cfg_DYNO.asm | 10 +- Source/HBIOS/cfg_EPITX.asm | 6 + Source/HBIOS/cfg_EZZ80.asm | 60 +++++-- Source/HBIOS/cfg_GMZ180.asm | 4 + Source/HBIOS/cfg_HEATH.asm | 10 +- Source/HBIOS/cfg_MASTER.asm | 24 +-- Source/HBIOS/cfg_MBC.asm | 4 + Source/HBIOS/cfg_MK4.asm | 32 ++-- Source/HBIOS/cfg_MON.asm | 10 +- Source/HBIOS/cfg_MSX.asm | 13 +- Source/HBIOS/cfg_N8.asm | 28 +--- Source/HBIOS/cfg_N8PC.asm | 4 + Source/HBIOS/cfg_NABU.asm | 10 +- Source/HBIOS/cfg_RC2014.asm | 20 ++- Source/HBIOS/cfg_RCEZ80.asm | 27 +-- Source/HBIOS/cfg_RCZ180.asm | 30 ++-- Source/HBIOS/cfg_RCZ280.asm | 53 +++--- Source/HBIOS/cfg_RCZ80.asm | 22 ++- Source/HBIOS/cfg_RPH.asm | 4 + Source/HBIOS/cfg_SBC.asm | 18 +- Source/HBIOS/cfg_SCZ180.asm | 72 +++++--- Source/HBIOS/cfg_SZ180.asm | 4 + Source/HBIOS/cfg_SZ80.asm | 4 + Source/HBIOS/cfg_TEMPLATE.asm | 22 +-- Source/HBIOS/cfg_Z80RETRO.asm | 4 + Source/HBIOS/cfg_ZETA.asm | 30 +--- Source/HBIOS/cfg_ZETA2.asm | 28 ++-- Source/HBIOS/ctc.asm | 1 - Source/HBIOS/ef.asm | 2 + Source/HBIOS/hbios.asm | 4 + Source/HBIOS/sctim.asm | 166 +++++++++++++++++++ Source/HBIOS/sd.asm | 6 +- Source/HBIOS/sn76489.asm | 2 +- Source/HBIOS/std.asm | 20 ++- 79 files changed, 959 insertions(+), 418 deletions(-) create mode 100644 Source/HBIOS/sctim.asm diff --git a/Doc/RomWBW Applications.pdf b/Doc/RomWBW Applications.pdf index 61dfc653e4cceaca37bc88f6efdaf737c8a148ab..1cff7a499f6aba3f30dd8216a7eed2933922a4a3 100644 GIT binary patch delta 557 zcmeBQB-y`6a>Ar~fv*fq%!QM6w{4Go680q|p_)tV?SJ`cJu1-$?s^r6^(dQ=w};S1OXWIzFBl z@%{PfFZ>>ww^AoNUKeh*V`{f!VgzCk%?!jWK+L+`j*0CKv$nB;p`oFsSB) delta 557 zcmeBQB-y`6a>Atg3*8P03VEB3e%sc4r)wTpj{m_$fBzqzG%-c{;39(zFSVnRe5nQU ze0M&x@XLMW<&$+PoY=)K_`Pnfo%$EWKrK_7HQ5{HX32lEU;o0detG<_FBi^fy=$9v zI`!876OSTn3YI+4tG||#_Kk7!V}V)$-q^dZ85@K*%(*(RWG_R2k$wIC*tjfBFS!oo zzNITR=pX89tZBI89XO}+>hTLa42L{*SHD!7wyS@QTUO=0KmqHO2LhwErFtp{oDi%? zT4p1}!KHJHne|J|wzxjyhX?zzccw5XFKA5dT~z1Vdi*h4(+lIQe{&NSDTqvU_%P)$ zm(teV(&z6@E!5X;aC*FJaq;QJe!D9&>Qn{)`74Q?SKv$jvZQWy)Z0xF%Z(2$EX%xn zd2flJ*x{aIO6HOq&bpaB3teSeyi>pOG>`eTsh6(1KmPW+azSK1Q&HI3YmG;i-ky^) z`5vQ$spfB;RYncRx7?M?dF-inAaTdi6r=Lc2RFiVHrHoaZn#@?bw&DrTUNT zvX5U@@3-bw#$?Cq!p(L}?RHFzKn$XpftUq|S-0CUvE5j?B-&ru94|P diff --git a/Doc/RomWBW Disk Catalog.pdf b/Doc/RomWBW Disk Catalog.pdf index 3fa3c12d77756d4d2de1c1ba0c65b63b46d4a09e..b0f1d37915662a91b016ad39d52f9d8ca082240e 100644 GIT binary patch delta 13610 zcmai*d8}VW6~}EW1q-n(644UUBDK^d+?lyEcP_MrmL)V^h)5$Eums9d5)~*)1Bm{`qM!M__gn7yzQmU_Y0sN;&&-)K z-}60ZroVq~?jz65y?V`zH1W#=XYJnm*0qnVdA8c=k=HJsv*Dm)FW$K8(R*Amao5vp z=6!wM`5(Le#!GMh#(y9B!-;pic*+Ai?|a=L|M>GwpZd^mzjn#%`#*5mp>JJ&$&3Zt z-?Hb;*S&uJyk)c3U$gIvPd@+H313=zTyx|7TdGy>?)1X8r&cXGVaa*dyy=&0SikVA z-+thT#h>`i-KU&>)uoGXKjX-29$MSm@xYsA_P&LWeqe{a-Cv$w zw99V$E!=L`^&1a(?V`Qwk3W3cF-M*MnT6k9^2!+}-L-n3c`q-0-{<#y{I7GH#n-Rf z^qzgb^YSkaU$yGUe8H;^KXv(gpXeQb?rmouaM0S`ujZ|Ld)|t3PTP0JaUWUq>i&0b z@oycqXx+>Ixqi!n&rKY^Zu2>3-uCYeJN^2JFK>SIsbkLi-kU4`wb$YcHtzn)n;Y(U z=fZ8(;yLSQTy)oG&szP|Jy$Ni=nMC~x^&B|4NIQ5;hp_1IPS%Fwyrw$yC?6l=*sIh z-Ctj^{;eAxeCEbYd)@lMZ{D(T!NfCLpZM_Blk!*2zUsU;u6_5yyPtpmODFzqub*%J zr+<69JCEMobOp_$lr&#ZZ)f9-tltRF3{=U3%t z{+ju7`hTga#(67qxy@GQUF#=ayLZ+{d%4ozh18Y#P*+tnGG8ax7?}%oHuljC(RIf$ z*OVu1^u{J1U1gN9>Z37?tadW#7*nuDV&i1tF*hAqulOxhp(E_eoO&&VC`M9rvbvNS zm1W=B38pspWW|lERTk7UO`UX{YzYy;k2T!1VM^8;#ZInT8JK+(Be~WUXMAmqluev&B>`; zOZXcbJ~}^`OmA>>akLorF;w=0KIg`I!RNNMff-_!I0~_?%r^C^kScHYsji}|u1>ng zbxN|wY>326^Z=9bLX07%`E5CCBMgX~ZR@VcNV~cSd_DfhS-bV>+BztuXtAnFDS7L( zrV5n}6JWMgS&oC<8f;e6gw$UT;X6D)+1CQToS$G9j;yr~wiI^Pb%WMJ5Zssq@4 z_;SHZjJXiRhzqf{&UK+-3EfR_Aq(ibx{@>CYS)t!>FQw9LgngOw%-9?cI#Z-bXHfU z36PCd~PdUl3w$~O94Rr}TiA(SG?I6UZOTt?Vkh;uk*N;XU%Aesb7ku}B( z$eayK;{}C)5Vl+aJdw-Gce*vz!pD{waEmgYa+1Q^+G}R zwzla5T2&b%l}q?ql!G%yD({2cCS=|&4#ROcnNj-iL4XGAN%p+^x|Or-eVt`ogrb>A zlee(9% zTjFygxWKMEYnWs^N=LmZ;vKx7W_6Xs0tZpDeDKZ^?h09}-r}H`#r4QT!GZ;jP9h^d z?0$yWShik45yUevgf8jF|KQ|I;+?N-oOYQ5*`DO03wTW1{x5(Vx5~w%7*puU!d@ z-U1E9xlJ5ZY@H<*MJAqsxKFbX;I?mfjQ=qkaTgE}?GfXHLc@R=$%>Q=LdiKdT>?`4 z4;~2ykQ0SaCJuy6v#Cv%a`8QdWk`tt9K^lt*?nP>~xTvOt1yfDs zDH}unM~S65zbT+;;)6&SC=X9g`JNruR8SS8OUY)q0sd!CBuO-&qjfb%F%>kUBijH; z7AvR$C8Hvdq6R{qE6e{H`fv8=G$aHu(h!Aqb@WSAR!bd`0nx$thWsznBeX~e-<8Y; zpOK@OU6S*jT^8~JbGN6dS7ooIQ>I82_cu|tBy&7162kPPR?HsoH{OEa6CZv28}275 zm2_tZ0{wO}nP9cSRr)GoB)94XIOb4y!2d`a(zk#o>Pk2}L**&%n5o1D`#Grdp&GXO zsdA!LH;d~*ZY7uJlyr3fy;aT>5;j;frN78hBN%{g3G}}IhvztF#rc-Tmfhplw}P0h z55fa7G|YO7N_dQtPw_uW;nos{7W}YC*e0f9T!;-hC7`!}4_!s+p0qvs*ye+-a1CP^ z83=9-194_c7^g)lvPQmFPc~tT{|D};&Ibg#MjS=Ch2YW;uq#F;U3$kUwnx?#rZ;xN z`umSEw9p!+A7DMh^enHV5kbR9be)ZK#!2%ES&#f=l<8t*`$3vWHqucB&qNo8smx|d zRN1>Sj`a`S4|f^XTo;y$|KU;f*pcX0M98F$LnbZe zvJ%_%XPmU*kTGjBX-L?_@+WD+LiyxZ!QML1Ceuxz^I(&=gLYXmR&;G%CDAsMeYf#V zph&Y|T6+I#gchQ8xNln3Wqz_aQvdjY>~BJ#^HU&~<%504%sEdtBGj5iT8T*%CU9-OIz$orb~m>`LgB z3lLN6TaJtJ@E&f6A~jze53X{+fmh3a&>d2pAqfZOoJ2YeKSA-D62nfK4uB zN+3&D*}+tC z4Lhb>#zm5nMFP&0fGOXT)C^sb$ zD2ISuvaY6AA1VvFl*QWnr|oLvBSo5q;}a|}QfhCRHDuKWA#6?<58P5#*OVUoxDjkL zBshzQ4Ov`Zq|}J2T-!R2+X-laH3DQ9MvP&_$R@f$Nj-uQt~(@Q)ELLGN|P-BGn8ujb^wt(!e>a3>dd3qCCV<-C)7&Sd7rv z?0%3tDMGy~E8{d48bQaRJ8|h z<8Mm}FwCuoHB4he!i4QN&MmsOMc{bk(rH8Vk-b#b#t6#N=th}jA(Lrr=%CB{039bl z%#)j*g@>XnM1i{-!KKpwFq1)->pg3@B_D~5E7HDfgzP9&rOH64smP#`U76=t*uDn* zwVqDaZ6)A;l(St4$}qaF5oF2ocywtB>NufLx#eL;tIb_p69X||j}8D=Yn zxw;owvKbv+tz1aca!b!-q`T&M`7_Px`-VqG?74RerH0VOFyY4T#a_kr*6nI~_Gj zP!1Ez|4v#Ue|5i$E#Y5fxa3zZitP5I3(e?$4_$5pyRz~`WAc0BX#qU6Mo?DP$T%DD ze2|7o*9f|D4aPVM{jqWVv_P9ufetFEv!2G|yd*ORgDz?o#z_iQZ~1(h&B`cuI~%2{ zptmY~iRo$fE)Vay5f<^iu6-(XDk#Ja`kIq1yM) z*iNGis>(d0HNs?gMARLJuGifs#?)~4@lx4olwmX74`Rd=A;samNRV)%J~L;KaoS~o zPuRC;*riQr!UScSQ+6`7T-TNRQ|T_XBo449npi!fI(&b?9$t zlY1W7+eQRsQ?fTDj0@Aqu(qoENCE#NsTQS6RU(+J9XSTFG4X7}V>-32qZ=1E^)O;9G z+8)e}F*IoTint;yKe$^v>e_QJT>Hh-=kQ*b Q|C};s;le{deb}7;0n9|CeE~UM2)LlQ;GRlEEvP8shD+Rj^S?z;7u!D3dG~(j-ETc_{lo9Q>miq2bl0m7 zIQ(Aky5QhF``>w6{PC;fS8x8&0dKkSBe#C>^=JP2S8u!ge%oH~mdjT@dymKOd(xKk z_x$aB-~8qY-8~<;@lBs!u{WV$qgSqa_=u) zwBM7v$Nb@S-+sVl&)IUX3-|xYuC0%$zj^5i{UI0Z`18}=_~0jf;a^`l<{dlVd+EBj z|KeXeuDka7^Ul8fn!ms95#1TPpS^u}`D?eo?by$MVBqWOb{N$A@Hh%u>Gd}f~YxX|r2WS4|;vYTz<(K?<-#>kL%Q+W6>wCAK zd-L7DyyC)RPB>-nuYLRnXWVi1O?SNif_%e`x7>K{@rS(Ux8M5DiRT=#=k<5&zV4wf zeDI@pT=e}H?0@79|Gw#zGmm@jA)k2A8+Kj0^23My`g7?!AAjX7e|p{zuRrIXdw%w% z5551zJI+1zQ`bEHD=)n2=I?*^O$YAv)&uui&!4@nJaDfK*Il{M_bzqLyOley+Hk<) zU;AFY;bVt|&0YJo`K-;GCV%O=?3|UkQnQtLSKZ28S8sUKkgNV*h+~-#eb@Cy=KJK5 zk-5+pV;|iRyYV>Yn#$D1ur>I-}fm(MMw#S>MT|V@%!}iP_1*W62}g(EOIVFcMB= zPQ8{w6eEdQTf-@3l@(uPTrGpFIJ;hDK|Pc4zx`mAEg>RuHrs@(hE>_Hh@H|^8CZN2 zBc<0Bm#8Z)*~>PSQpPdc{9n6%ENn90sVpRwMJH~pDO;KIIms5+63Sp**yC3#^Fafy zFWGv=)sW4}>0IrD4PbogXOkIbN7qLVlrijM=cy?j z*Ll#)V#WndvN7xeh%2%nHe853<0k%}V}J{(>IaKJup=MHIP%oot*c&jeXu#AbA7)Q z3&S*VxjuQjcdpO6y1we_Vpr@oIZl&ICI;C~H?-)o?jq3jgGE=Dx;22Nmy^@gDkrSv z^k$>^f8l-~#r-A4-cE){5Dcik1iO%$ij98P5n4+@IN5*an2re=hYS7Ezy=!5mFP`W zBTM!uI$tC{nk<=^K{min#_lJ8dmHI4)N1nqaa3)Jc71d<=ew9VW5z~`#Z54U_0Qbz zQY{uhkkw?BbM(bx061T*`yENl0+&lJE-!fM{~DYz(s>`2_o=xbnYXJ0yP-7W)iqrK z8n7psE$)0@2RYl`_eBQAPSPh?teAx5yO=Z)Id79r7eJrsf|vLoJ`l(RKE!ZvWr5$T zKoekV%Wj=`t9FuzJi$5&>gIna=4ekQ$|Vafkb0fnV^Xgqr{MkS>gKVDqFh`M8?t;aN5LYg{e!~L>Lc)egh}p9B4vHYYAiD|9g_`Xl?SNMS z;#N2`pEW0a_t4;xsTb&EuZSC$OWC#EP9tdf)=ZBw$&`WNm`N%koc zc-An~N%kEeSa$1Vf{_*5?TlR=Vd=#GIA7`*xUf`i(e*kR7v+RUm*uRGpw^g7HwZ5E zsR%^?(yBdFa962!Fd_skHh4B$0=ZcI-V)A5tf&z$pc|u?Qx89u%%9fq7FlMzb7ZJa0O%t{huKvq|SAbYDYEY47ym%)Az$5<-SArsFeuR#bZc)O5TK>?XG zRnSznsB`(Cl#Jk}smKh<6`aH=@l&blfrLqi1Na;uW9 zE?A*5iZ5H|Lbs)6Nht_&Q9udr1sjVR(JY_gnlo?B>)cfG8p>sj)xkr|>L}8L4X`DW zBQn{^#K(p%hn4kT-mu>QGTG0DENPQZNad1qFA$V7_+`IGN)a2`Pl?Ae5X0i-0AWOm zg#v8a4;F~7jd$pYq_X1r5lx!_adAmbcyUEecxmj?td1;bV!P`Kzm3D`J4L$*9mH)A zPDZJ`R1i+7?{x1UR&@jYz#vy)-JIg1V4) zSe7T){9mZHWIw5oYyzg_lt6;OO7bo#>6U=@VuRfjAT9-bUY_A(f>};|sZk=mlr#!1 zRKX;v5s|^rrZyHpTz!ztUm#v1cTGN+g?3ZzO1VW#Nbs;ykBkEo|6@ar34m>bi*dQN zNZPMCccP@WAP%#a8UPv9q}9zFV*|ttT&+YGMw%>}Af#@Wwkt9U_puR>qML*6YM-dp z{PP9RfEc0l@nW$$}KR(KaTVu00X-6|yCA1HyhjoB0euBonQSn{=p_-QOA& z;(i(x#b5v?strtZfjHA}#0K6rE<|Q?Bf4y!9Y;&w;0NE69x%ETJTu+ZhGP@j{yj3< z60?ER$`*tZSZ?gco(N=8xFM6CvZLXWZRx;3X|*9M!EOnKt&Qq7&K7gXg1vNboX)l- zll(I~P6##niB(I+nz98SdgvtIvA1X_G1AJo6tbbu7%C?dM>zIZ$|1&TPWYPh!91iLT&5_9f0!9{TW}8fjjWFr}OzqY|22wcN zG>fwI?m$+6-Wm>4xH%RgfD|E$Q{4ssqcJ@0QM4IG3Ld*+I;S>^F)mAAm@?PaPr!E_ zgBkv(2aF-JlH_P1i;T)dWUvw|>&P%h#vO+601j9jM49P`tgDvEy2LG<4a^j!nqnNO z(o6=Q&YF93{)gEtIiG6NayULn!(Be;t*aprp|fm=8rk&z2i#x55cweV*2*{~vQ2EK z4MK`@VM8oK7MJP4N6Y^pNDFc>&G`DhD2$ELS1zh1 z`DX#aG#(_|QO(-!FYpG7upb1zZ7h`D+e-{|mu^&M{IB%Xxb}mTb|T~IR@@5zuz|^Q z1lziVPSP+jHU^##NVFmoG~)uq1|e5cRd@j7BxZPIW53sQ+jdU;KhJhFgLI!V(($ZO z&Vmc@SoH#rSX6fzF<1E?j+SFm*b##Z80JD`JQ+BX*GPvf8&@}7+e>hT{AW8Be2_-* z*a*tf17}>a%`0Tt#u2(+V}U(su-yE=aDO4L#W1vWEW=0@kZO$*^%hyo>eg=gN@KGB zt<7$unptx{Bg#OW$hf2$%RGm~c0jPvuOScFvS>k^Tv_Xg$qzy+ct89pI zvUOa)ja)tPG*@FINXP#GwU$XxcbnfatTiCxqyy5fQcR9$1-N>KUiDxD4l-o%8)bP^ zz@$lS*8Poak7Z3)jvZGdGjA>U9}RX(kx-Ub4;aq&!lubAHEX((dbvrA0)jSFJM^tWc4dMf7Pzt=~9e8%W%0O!xZ)TcpNf$mOx!k=TpY5;c#j+ zi}omUbVXSX3x*{rw}yfqK3-Fp-A5PFys$Ardz6zs7{I^QCp?3(d=_14PopdMf5<4c z7KS-{z+3|DWrjhXfuStz2$Vs|@dw*DYXn)cqzzp^#l9u9XJFR7BizjdQI>}_=xTXF zdeegoL0JA?^FMW^_9I{ywt0qOM%xwl!LmTUx473^%>ceVEj5AO#_{YyK1iiImZ2;G zhccHM<8jD@)uSu?r;S_P_GPq(TrWlDG(dPYZe%FSRV#QQk8LnaHD@Qt)&6MG6SOB$ zo4kdx);nC02+5+_w2$l1l}KlT^nPSAk#5Uai1HelI?BabL&#Aewd2GMiA_ zm#ufW_LIsUnRNYWfzyjN)jqH#Jr88uQke;Ik89mZ?>)$*X&hV5%(JJ(eaNiZrw=8s z6j&T>9&4EA+sgpb_MLvFJ=@4A*^Mrj5|(}ryyXOk?ZDQ$x3Yl0L?$n!c-BihPR5OX z>}C75Q%`@{Y1=j(dg$hrtA4-Xai``Zw;q{}+InKledf rs~o=h(EmT=`I`?veAC(6Pu;ftHQP>m$tHT1q4%2(I_Rk5j^6Y?oY%iF diff --git a/Doc/RomWBW Hardware.pdf b/Doc/RomWBW Hardware.pdf index 63cc87a993c8f8351d1e91cf721528ecc0b06f74..16145259ed9be7153a69b403257442f5954fcdc4 100644 GIT binary patch delta 24611 zcmai637pOK+JB`%w#hD(Nr;gDzGzIAF^p`btI%Q_j3R4U%KutQyh+2&LCEl;+(b;4 zLY7ubhN2`dq7Y+=vUPdCzcbF6bDr;fKJWc>@73eCKEG%EKF|MTzg2bnTUFm0RK&`9 zp-Ql8&_S*ASLeo-+|=yJ=?gdgb91wKeZCld@JRPPoyYxIv2@<`nrU6z_Nm^oRLdm| z9}RA_*?#-EX6LQkZ&z)+qw1{kBh%aX+YXMnQnjkxrp<^k_KJ7%9`8Q#%BT$Q=G|it z3_IAQ;uqW64xKY;QcZorjyB&u^3SWg4;}C)Z7=dvn|hD-+_ZH^ko9%K(5t?cG15 z(Fe6>4O_WjN{uGRj@8>xqj6hj;jZ0%=asoDap9g94|M7JeDYsOJF6b}d+nvlsmZUW z);>I;;*jM(mKwUOh&}MOlX;IkxNAkxiK`9=XYOusGx2DJCfhgby*gy>n>r_>+kh{J zf6#U2hd)2}|6P}%7ruXWRjpSxxoZx0Y|yUx;u15b z@7sP@d!+m6sx33y)xTcth1M&^j9z_ssQZr}rgbRu;`JxqfA7$9i4FI6$;+FYR`%C_ z)qLcIm)AeI>gUZ}rk!1xs;}JFyQOEBzWSk8zxS#&-CoF=b@_{{Eq?su(Lp~wezEbJ zJ4P&-Gi=4Kx<@x|+_~-HPIZ30GC{v>l73qe{8#;d(Y5+*w}1Y6QD3)b9R0FN@aFL^ z%Wc^G#HGY`@BQ&~Lc?l59++Jz>D|)1+vlc_e|hC!3uXj|zi9ng-)=>V4Beb^=b7K` zoAq|rtbg>WeW2{kNMvPa51cWR}J zSH3%)nAmtl;%A>_KGSkajj=cWI)AL=u+xo)T|JuHV^Pf;8}GTC*W)qF8yt)3qj)M-)HA0Pp)#=MWUfgO}=Y~^1Y|wc7-3=OKRj9wQ_odPO zPR+XBVdjA0$CH2Slh^vArdzu8XmX~;;S+Ugo1;_ysIh6+*L4P+Xfv>+)`Xt&$dtLM&MIZ&yO)8fqUH%}}+_d(O=p8qH} zd0^Lj>(^ErMXD0q$=jAc;yLNv4=RV^%^{dh~dHVI= zf}hrmdiKBe|9$bqFToFI+gzI6;lsSKUHd;=<#4T4mmZw)%Hh*n#ee;HwZy{@HXU(!<(iJ63Ews! zbpH?Y$9ysJ^e+#eS#>?*r%;2Nm&&Bich{~taXoMU*0+WXxV*RXnjquo_XED2ns@qe z@}GNt-TGJN>cRf$Pi|gY??3xjqvuB6sB-nb&yQrd19x_=-Z|xvexv+eppPO;2&Kv8iuU`MyPiJ>z>>oBi$Za?~Z{E#}n(utI@5%@6forEK4{f@4 z#n!!LZ#J1b_CI<16PFd;_GhQnlg}+}*ZZjrNpC$gW678*>sqWGHFHF@YwgDOwT8Dm zxgh(Yw)0-Qr|O0Ul~c#Rma=r_uyq;Pi91i#E_LW&le}KprLHZ=`ligl+^>(9&9jVA zn;)9mE@e{5`3FmF>>u>`!!KE7YP&rPW?RF@-9NQm_OQQ~))}u|T98$L&Gj*rNB7$M z_G`}!UQ}m%#*)64^F_0z33f(@S($y>zWP9;a>qCHE>~^#-uoLiD%WR$TW$6#?Zgf1 zQp)ayS@nxQpIg3pqiLlwkBt94C%MyZMD*~ z>z*mmt=7qbuY9|?Md*#WMH>V&`;DLa<&vH&(|Uh5`25PEe*dScO-|`Qs>kr04#)OZ zoz->v#6ioq{QJAygsy2VpSV=R8s7SmrP;;%ztm@c`FonTY}}_rnT?Ac+GXy|?LU3u zRPMcPO{TW1R$@-=o^#$?n3Y+7)q>3OON!?7d$n(wv>CN`-kxO{vlos(ao4sI z)n+%`KgX>+dh1+gS+{$!W7pPqH7fVxf3?rC-|bhwQDVb7&s*ueUaT@PxBR$=rqoTJ zRlL~pHd{6%P5q%?lYe#jpB^bktn{r5@6Bvgvhw&2-_>qd+6v{AEm9#^TB-h%4PU5{ zyKqjKwhbOzSX+|5YSFZrC0^S+a?0nOZeO0d<+W`5 zX>jRolgCe;c)sG~M>X}Qvhz2%#in%0J~FUZZpAxZn3DGIN6+`g3G@>^26vk}er>b8 z+d~`cG+CaurF-iJOS2Q};ZKXV%=ofyx!g--tF%hI=i0UGgleOk%}cAB?zPVvT)%eS z$LT@n%?_PwKUKXN{`|zay|wRnB4PRY&-c}BIJMpHr=KYKKLb!yz^*#u|q*m6;N`T1oR zZ*)%GH5h-t{^cc;on?K;b;&xm<3z2@7ut`u>$RVLzPy*WJiT!%+^=!Vr5o*2mHOih z4YD`9(`3m5c=7WIGhJ(6vlE%+H}rh}^ytc^4)qAKTO7^1HlguPR|n_R+2B6=arcK0 zt$StJg^3sbxOTqgjBg%%GjwnI?G+{soqqe;q0y3I6G6Py7PEXN9HvSSGLW1#C23teA6lcsr^M;!DFizLD` z{mA8ls5p6eWO*3R)o5c6L^;maOuDhJd-O~=vzQD1`<73v@g19P;(L1J)X_uxK5<6Z zbh(M9o1QJXpleXKq)^UB33mpC@W`bB{~QyGTg$x|7IX~}VxW$E$+mh0zBD3}mc z0}x#~(6%&J^4E4fVw;Iy_T63n2==)Ck03mW;1pN?~@zTu*aIwLRN2Y~k9m zt>cKdgJh8v2hF#IiW!P&G{^_ciTa-?w=fQYjilMWd}9rAB%cm61VBkznE#PC z0nzknW5*^v#v@Dh#9Ys#1G*fp71~iAp*_;O8O+4|O zni*)eCE0Hx^O05$;fEtFoQbo@8=J@tX+4A>Jl6_y`o7rrGV=S22a?-&zEfoN>oft++4ZG~u$v?U0>OKnI#H z7qsApCCzlfY`Gr7=~(uMEvaPzvylTe;W?~wAxE;iu z1`M%W&H^mU=E<%n(=#l{V1Y_Vcn>S$sR|-VTVp$7Lm?zvEideX)Z;~E#@6_DSkI6g zM3yg95%Os3SsYXh#%Ns*EDHQ_E*F+=bXY#eI# zRYIkJ0x7%zu}mSDlHHC4WJ=z~Wh>{vlG1@(L}B5%F&53i`$-Q4fQZa1f^WW|%jyW= zl-ccyJ(Ndr@elFa_an$~RBv$;atfGBZ{->s10&3)J#Y;tkfsy~s!Yyc)j9fe5qL=U z!}^nOf@aIh;V_XyThZIWlKONQWF^u#xV9Y{_cdY>N+O{yPMo_|!s>c>S0N^V8!3#& zV^QRa3Iv%A*Yom`z}Q#>BE}c@8H&fo6cXTo-TOt2dmL!KVqtR6i-#GTxL2Mlt^#|ae!N;42yk)Q#bmZ>R11w%d- zY&<{&@u)Z^#RVR=&u0%zMfBcqLNY8zT18TV7$uaw1A>MSM(%|}@e;Po@ih;^$KwdW zfX_z>MC^eAR=&o@3K}|4D1AU3g7P{aNRw11V9wEMM}!xE7Dzj>aYQ@AJPQjNPDqh8 z@_G3(s9~TyL^m<%r7@Q@!H53RTvrRoD*F~oIM8!?CV&g{OrX&-`L4z6N5L)sFa<6G zXuKoCI8<5iQ1Lg$IExI2kJv&y3C1Dmpt*j0APoLv6NHO$Ab=*?SO>x@$7xha!)hpH z%5jK#=`hHk1Mw!PKcF^4lT9fLI5cutIS!VeX@<1?*aIP3{@iHLt2UOfsJaPn;*zj} zRfx~%Ft$WBFiuw70H1=>GFAi)Fo0N4*O8nM4UvkZ85Fx<3rdP`7!OI8oD927n?U%5 zLB#pMe>vA6!-srCtaBZ zV-Y7H>c$Rv4;W{Q4~TonO>F45G;l!0qMV7kG8FmAU<0or8d?)1Yzkln)miaOb|KFR znv{rrIj!H34cBlx0P0(c} zH$f&#G(fIVOL(gi2uVN<5veO4o+{ksAZfm+Fc5gX}zFJF*`x`bA^b3%|c=sEB!!aB&tio8AuTaC{>T ztRoIcCfG%9jZ{1I2NbeL;F45hvUI61w~mBXk+lJ45S&3UL=A~c9I!HWNCGNmjY`etRwg|M7d%mdOM^PX4^>!E5O zL9fG|?ra0z8&198OKPLZM4iw|xY5Qf6=wN@>xiVp04DMw6QO z4mv7gPpuBEN|us_HfSjes=uocT0~|F;y-N6lNIDAH$jiL^olTBgukGPOor)5KxM0K z06(ttd-`bL5e7sxTFDR^G-Uhn2UN63bQ@7^&=C2{aTcoKBK|{uP39Jp^Sd@;Of|+K z%!ywRMhf-Qcp5+ufNVr7Fx8Rx4>>o|csbBRom!{L#|JNJ!nG3pdf&qWzkB_MFAk}f1)NBtt}|riW{rOTge%K4AS|T2IJ5IrNc4|#NV>dO>HbA8g*(JbAt#fc&C@EIH#*TN*k^jadH@et!@xQZdjXPNLv| zIzVu-2@WmeL^OE#v74x%1d@PKnw)FlO90_ua2Wc)2a_R7axxk^mU; zYUIWJ3vP!1l@5dIYFxmeZUPfbN za6&=6WZ{6^Mv61h=frxXiYOD|!IeDTdUo(1h%uabEK$*ruF#VJ?ht~c`lxv>KJ23P zfR+|Qb7UzC8+$U;h6_XAlQQpfR$B_L7h(xzT z=QydSjRsW7Erq_u(-8lGNNh!gozxB>k_4a(gj}*a05n~u+t>r3o8%ypDMQA8NHlq} zgBEU@?2;Mw#^@5`_zt8>0)Y z5Sq+{F&8Bcnu`z#G{ye{_H(ruWjji@L4)fS3#w3$XsX>uj8pk&%((FTV?inmfCfxl zOfIAg4C6S;!J#Rh^i+$xT+a+(RwNP73lF3|ZeV8A3y0Qcc3Aj?gW`T*(D?xf?jL18 zJ~@&|6&3^xEe;5HSbn$w+4soyqgX5J#26P3*D3zv8zwk-+Jx%p7)Nz<(5TR_Xc8X= z4JA$5!wksjz@*SS0rDXW2O4n!4Tf}M(8%h6gSXa;iT}_;B`co*a?tTer}mkKQZGG| zNgr;i55D4`IFxuXp;*8Nbg3B(bCD9sv$)jE4m_6X5ugEAqPYmU!n6V=z_D=*0eDPS z)zO{=H%1G>6G<9y5`jfxF8Cii4nl|^(Ug@p&|r{a2ZqN{+=&l)V!o}*@9)4|r1UhG z45s=#&Xd1%0U~|WhXv8mEEh!Gh-faLFEI`wgtXMim!r){(I8kQ(ee3#(o8rzVWZSI z8Eb$RS6Km5)LaU#Fis+Kjlh0YmyxGdpScJc#)b4h)pt))SFjhgc4ArdYta()D;=0i zKQV#16qz8`zlF2M*iB4E$Bx_tE+86YMMQ$T_%WBdO|S_ycz}l6#q6Oz48!C?Ucs|M z%GC zWcsEOtu{~;F%Cb(K++G)EDoDc{sogw321>vzYKshj7+r}C!rkBkcx@JV6IFB)VP3k z7FoVXfo-=TxycQ#;C1?*NZW&h)D`zHGWz{Y^-7zxiP-^Bt1gb zB?Ddn%iLcC;;m-0f>;Bm7LEwdq&jN(FcctRF4dhemrBB*d5AB??U35ZU{np1)m6~g z>LFE>slOV>T)<6k33`EP#V?>p7pSmJ8JdBH)^j>Ee^-rS90?%`M52Hmz)GNZjo7L> zLd7PK4tjTF(PZaQyOc4j`u>+L0vN(}LguxEasmCs4e%0_sl)-$3L;@1HBS0;g|$d9 z1D9k&hjICKIo1dvb)cIgVJ~EpLWB{qiPQ{$>f~;5k2q}!8zFQc%64bK;_QkrPFCUZ z>j(5H)D8#dR6;VPO1M2Fh~k0LA#mZ0RsA?#B6ZBjH$#5dum~ z?+&4rm=iVza3pT0J|mQ7R}Z5o*e=GlpkNk{>Vp4Z7gSX&h=Jtwpcv$6&}>Ei0|hgg zog+LhXl%RnJqPv$$R_m}1EUC7WFX276r-UPfx;Y&Bm00xAqjY+S>KN!bOlC8eS;|S z1Qb)ype#6J<7Z4H`!P-!7aR`Ar*vj0J&F7TMhFAR_ros9at}`JNFW^nz$ng8Gy2B-OF@`yg!bG_s8A6) zF3zMoA?;>D#rhC(`Wp@yP$3QJSSUatl7=HGAR1d`l-5a(bYQSF7r#0nt+(p036Be{ zEmEuuz9OaDAh#en!|(pkVG;Gq#qog_WoJN#*=hrs3-c<@vm z!guFVd(oaK5dzGO_wJ!*ZYx$iAajKu=wQ79R7&rQtX0y~5BEr2gWD}+u7At6$Jkxf z-$@Q1-D2`?_+=-GQt&CX1P<~09Q5-F>eqAPEts;q>f3606AUC9tNM*3^Hql|Ne4nO zISvRuiKvaXH(6Z53F-S5(CAlPaA;~YQ{!ak18DfvPe=^X{zw!XV|P*5mIDzzlT4%i zmwYt>R@wyZPZV_mXB8zj*j)r21z`WJJQScFO@;xZ11dmU>J4x-u?Zr6;EPf)krE^L z7Oa5|M_3a99r1Ala3whox+&in9}rMj1Yn-Vsjl{jyhVyjI1G{ou?bp%DBQ)*0+OWT zB9vv~_q+%uLAR(>*#Lq>?J^1%BDMmPCUfM#(M!XNj-0qJK~L`6Le7HsxXPi*%I90yiv(@7mlFI4GC|;gF|Lee)QiZe^r;scC7p+q}7f$8Tk)HgDcsVJKEhvsFq`^8Y{N>7rE2U(Ov8F{7J&~oW+`xcXuCCRR| z60(d)NW$Pn388HN?|q(mw)36O=U<=Rw~ljv_ug~QJo+2&+S86 zoh?xKQpGd1_fLCuWX+Mm(UZ+}GuAG7`{CC{KeF=C^K14!xMIx5T;*~Ra4(Mziz@0=^x)bedy8Ty6wA{`rjMFPb?qN_tTS0pZuY%cXP2hUX8(Z7FB)! zxuvtm-&OXzQ(cDE?=rc6+O$JcUvNHn;Pv$Vy*l?=Hh6vEZr^Rn{bK&g)Zd#_t^7~5 zmL>O&Z&)ci<)NIrzHEB_YPIa#8q-D$7&3N8;83OEOyHD5Y;QOE0} z9{c6-7WcI3(Q4n`q4&RZFlXAe;M#?2j-A-ib!Fha@xQFU_+|G2Kh2-fZ2O$)=SG~& zs<*fKf;)fy-!iXF$^L);T=$NFDPylbI(@SKSm#exw%mH<_p6oqAH3Hc@Zmq@zCT&N z!?s}yw^cv9zG2qE+aKL@>`HKO!KBi!wJ12QMZp62NBw`Hl`RSuUiNw+&vk<%XBSKk zzPqbX;lSzdN*+8_E4S$LyZ&BWq;BB@y>IGWChh*OYZcvGdBZJB&RxlzXjaLpddqDS z3)OplO6J6IKmBLKN7J4ge^+*3=65Hzzc}meKd)c-BsX*J+|Ccab7R${6+NaOtvaur zUGVq8FI|1*-@m>t|9Fqf$5(t?{&2rje~(zaefX+JXPqkcSc}&i9cZy-$kh#j8FN1>O5`HpR@L4t{%~)N!_x? znhm*^s#za22H!=8)70xx8~we0Uc_P2XZzLeX1 z*w;U_I@+|=pskA^{qK(}{_MUmy~PyYSSH-FCis>)x?rzAzfhTz$Fi*PRd9!&f(2@W4IquUU8JysQ77KYiIw?)gH~ z)BFB>XaCRpTI^}iea^7VeZ%i~>Hg1G4hh^Cdh5dM0#6*TRk5!3qj&qN^_h3=uh8@S zj*q)6`m4tF15e%l>6AeuhA%#J>F(7f`d)cy$R+Q~YdKj-!9CkPAJpQhGo@08?Hzrh zaf$U)m;PuBTXkqynN#O_yVourdusaG8_%?!+<4ZBdB@97srT}(BMVO6wLAOljPqM( zHa%Ls^aX$IrrZe)0`A_Ox$6s@{^$6mZ*R0+TV-dh84XrmIhB58#Xlt{40wLZ^hfG-a}5T-MHeVAHIM2+}lU)U3RME z^`%+6mydg4_|W<%QjQKDeCCBmwg&57-&X164O=f?-TJ_Y)Xl-KKRL2x|Fu0|O&)gg zQow2d_JAY12mY9K=F0YUZ|ywu)y2b0pSl0kKbQaR_hO@2oiCofTJoPN-~86g9kI3b zJsldY>vpxng&Q9}xXy3;O{ZBmemXtGEVpEH_igW-y6@k{~n#wVA`{tY98sI z`}youi_3ie!CxQsdv@l<+~o_~4JvgwyYr@NEdymgAN=p$ljqLVTN&u`(2VyNXFvYr z@bxKE&Tqb@;IJMI&+SQ?IcI9!=(^0F=jg)A0;S(vY+V?2XPuJ$YuWRb)vP|X?C#`6 z-=>y$a!#w(g;x(OGCF<1g{0Q43s*SNq)Lafdw!WU_SaLjQ>HxoRrNY0cVBFGSBWPc zYP+S-{P){d>EQ2KU$aERuFb3DtjT`+gKDGhdt}$9&${;BQL4%9Eq83%UGTY-X^)qD zut$eGf5`0L_j@a4TK!7tHG6a@*Cw<7|I+WxYTNMPraf|=D3AYnWYg?rnJN8u{A^Wh zaJun>DZ!`b)(HOAwNSl4ZiNcvt&FeIW_PrnACpt{=F-jXt5fpzd6^SOXLK)Cr)0|} znNvq+y!Lrhd&;IJRVLkbVfMbopK5)2w(s0~XQ`3(7iIR`)p$qMn{(32WVPvhtzg?p z+Kk!P9_{0F#W&mBkx^w*&HIMV)VI!_u(^A^8a?LJ*qXWgqcWqaXS{F!(C3XWtM{oq z_mh9>x6T~a_2b*-Wt8f-Ds}XKiye3vgBxg>&5P$IRamD7D;6zOH_-pvtDk+C`|7Uo z$+eRnoK&@TnT%TPms)4{{86F&XDMS=Tpp8>)#kBhetoL@>aOplFPPqEYUOU#$~Udj zq2}ZTEjv{hzT>->{XSI|6tpv+_~?o9R^2+CGH3R#{#JI&3yqTpv>(vqujDs6wt2i^ z_KIdh$EOv2tE1gxMzNVycP9NhtJT5x8#M1;WZ>;vc9z;0+)=cU8|YV}NcKM= zDf@5Qj%07;$hkF34IGtmWme9%##h#E3vBE5+1iYijdvv9yfW>t-2S!N;Nwmu%zmlB zyqcx{7&ZH+dso#Ozo6x!6-BCllD@HFD&*O)+q&6hM=fZ%${pWv-fxZc%=r)9eX923 zS);~%)o0Z5ah3Ym#qWOmgNDw@l6|IDKm2g{203@OnpCwx_32pX@y5HV-rTN9&fU{4 zShr5C8aRCNA?##kf$WS@GxxWi+Gly+vVF?<8`i%u;o|NO_Pz?{dLwgYPQB2+YTJot z4eQLpj3r;r&M4L8=3@t~|7^sj2Q6Kua7G}COGTQbvu8| z?$Q77`e7d*yx#GfBXwRc_tuhkUc6CY%$8e^7VkB%=X1|L+pF8S2@?yioG>xzt%|h_ zOLsKgvg&AF4Na?2GqqmZK|RyDJ>M(!-n9CLX5bGaEWwsbljgQ}{Zvi;l{zrBc<5g= z%{5I)(|w)z3|-SDpJ94#u)(sV8UdUC$Q10RZCk#R$Y)x%?}+J5)3QAAJ&g4%FL5lE z??#psi0#L=eM>UhuH_QV*9=K>G@JMwY@GN^CvkxREXJ`7W^~*{M#blu%;$TwJ6Go& zyQU_j1tD0D9*`?^v23Ebt`I*4`|_AH&C@)Rpl6t*5uWKsHW!GhlV{tsJI~c!S`6L?Ov1up1r$<&DU9|6$WT5SG5>Px#Nq2JVD7PRp{i=wbqSx7l)i(pJ!%C}SRjp+AN4xhYLWGJYubpn128}g6 zLmsDY1uV^!AG9@mGI7;#6|@u3bXQ(k-7@2L7xolzGd}Yf4qj?u#RPq(3kF=FUW>bB35I2xH--7$C)2jY_7b8MUDZ~`t} zJ1B@NO)vy)N^7ROI$b;6HErgzrEY1u>$oAwVE-}kyB^te9m*xInC|IToCw3xf>JY| zMOIYzoP-UBWgdM=HWVHuhX*Fe)X zIkDyG5nBJSjsFY--ZDWnN;45(2^yjt=>avvh8!fHqsgN~Rs&T^WN(q(pMZ zrsg@)!kGwf<&I4qZbwJ~SC*0$6TVzZI$*;1NTR7c41Lg-77i|vLv7PADE>1IWIFPD zN*QGQr(#T+7#BsDWzB>b67R7F8ni)9Vp^oECVW$D!{PW3XQIg~hI2P5(KJmMaGJ!i znC9j)7P*}q8$eV@L=Bc%GP*WJNG8k~?HDmRjfHojIXt)o%%S{$#5_V*P4e%iXH$%C zdJd)PkgBwBxJp`ltQQJYOnAFET?oY=V1)6PJN7NsYG4kuJKrS>XZk(`89J{e_&bhKeZ_K-Nf6DEDH~iJBOn%ZRT?SFvI9KW zMG7e=@fcu0u0la37D!Ia*4U=lnw=-rSp0`olXudP`O^aNK_gy-N-}^0=qlpgP-G0t zpJ=$0{B4uXqYc|HZv=9GP2P7K8)iO=_26<~gA=6+XwLToG#EjIR6?L|GA2~_f$W0q z>AYj4^fZTMdU<*jjsNgLPlnZ?`DD3l5721hPBhS5qPZpoFOCjpk}wwXci1lJaQc$Z;6=k-MZ@%H z{D*v$te)fg6qGnPPkBAD7;-wmmB`#8OqVw&pn*s}-vNolkMoohyKvhie&3IP%TcR` zjgXJPSR7r*{>99rYY@HzG>mdPXd7qD2r*?Ehp`+d0=AEVSCRM+MAB9lAiLb1N)L!; zcoLq6SX{Cdt_@2g^dsN`5trJJSc81I3k4?e`#Oc+I5~=Vu^6%`F7gu08_+_9&#k@A2O#%x7i{0E06lTSEf)^wG)#s-JsHP9%m#>5hMR9QL2 z0ban4Q-(Z@*RvRQ_W+m5bBCX#WChUz9j9j-GQmYufn*p`Rq~IB-?SZ_TrXBlL4*ex z$~XYW8BHo9@Vw_~q%#0$;;Sv;`-j+(42_2+N^1rh1rex6#L}sV1U*7U5UjzA2|e39k8|VHOBrU;#VuAv^qTC{5ibZxa<_`K`?;QXyRCw6p8=9=<){v9txuZ zK3~QLn3xh1MU&Ekf1xUP08+K2jQhc7NE?8OsqPOxpcq05u+*3%?0+IA z7*kN4N71Bz2TiBDjg83CJ!*)WjFv%jVm2i&{=*Sd)T;I?oe2gTWTa52B!h&S7+Flv zq+`qixSN}CtO;ZjAoGUFM5J4HkA?G5`rodN{pow5eO3MWPO6RGN zOlew?Gtha0M(2q_4OvW;GDyh)$P880Z;OlnP~{0O+nrSUVFZ@aa-!Box`@JBLM>5Q zV!)X)@C7Yc5}yrtR25Wx8Dvcm3X(yvfd7z4Jd_>8nL%-7E{}@19dhkVvwx_3`UCqltnHL6jC^aP?3Hhr%N!OkUyY* zw3&$&Dyb5U(_JiuO%Mbln*b1;!`;g{U>E}OiaGF9%t+8R;5@dU=mn(uJYYXkLI=$Z zc~ZC~s{M`|T(%De(c{BW0IE@hi-uQPU*aGC8;LP|%j@q&&X79vB-gz+wMU@uNx|U(yRt%n%|b z1~4EOjXHuf+yHrG=?P{7fJEF_C4XS*8X0L1O_Q{0cr10+^;pfuLzu}J6SMikx}rnQWT9}|-q!>Y+Vpf5$Dc4%M=Zd{X; zj4mu%66~A2;68V}!3=;Xw}U`8{;)#gfyI=E58NqyN8_~#MA8yW%!6T^ukr~88} zkB}6!m?cEmN}FI5;kQ(;ThV2Sf1L`Qxg7KpZ7>17mLAdS6h zzsqNA6rhTtU|?kB0!>;Q16@0@B2u2R!ca+5h40y7r#N)?s;i#c>Pm@F5X(a3V4@l4iu(L#Z~Z7~T{T4F+&Bd%#J4+XoS&)0M@dWnc*9fB_eC1kej1y%-ohQY3WC(cK1;!edd^6JF5(G$Z{l zXn02@P%zkPYD8A6PViXD>H)%#@Ed4Uyuu`GMbYRL7jdM8suLKD(LywsM1~=Fm_`jI zpanM`M{E9Fn%F#xe6MEQHL~q9MZkmqSgFx{wf-Y5yLb@Bl*zctXSBHVS%JhXkC$Ee5mbQ9)g2@0152^ zix0h2Q;Ud520oLjTWE9B$fg1OpwJ$jRuZ#9=Q4_zYQxxnWD>xa^biS);a3vqppu<0 zSPZ=-QZx!i&>5AGjVk%8ok(Z`P4Lue1w5IGR%#~{$b?(1lmKI!LvyuE{8gDKAnP?C zQi%XG^hF5$Kz}JIYd$Sm7z-K7v2cfBTAclY&6VIM2BY_d1`~>lj1wrj z1R}-pxb1X3fkR8+7XI9jpf6~sV2TBTCg%u%5h*J%0=Z=xNdb@bXvd(D)q@22dk7ch zdvIhUXlbE|@sv^0@FYUs2;gUYbO>^Z&yDN2j$}eWyo6=~vj-+bQb1;v4~=(>_Fm>g zq?EW3AW?vI1QAgZJ;ephi7HJbrAEjsGh6U+0OI@9+>UrO1bl@2f5ZcV7;O}aqfvzh zF(uk~#7@vJDX$p5M~~RyhValNIyT%703r~_C^2MIFc`K~((ss^Xov&kSeO85%&=Wb z(M=8Sk>x!`SdO+>IWdYjLXq%61h0Y*V4`qld$RKwOR0n6lfedP)Fp?p0mS-pVsx|! zSBb$?eZ}B>js#AEzlXOlVh)(CaM+LiN5v2DBAS zk&-_KqdrW73AIvhUiduuw?IsI61pV{K%+U(k1L}W3>I}{EYLw0j=W;vli?M{BIOVp zaqt9~Bm-j>KBidwhrv`&!^D<^V!?+}o|ptQnX6)~DXpU#o0!1V#_oWF5F={UGVnC@ zVB_mRTmS^gOQk?UNyG1*$Se{w!EcGB1Ii`ML5r#ki7*yj{TQ2QF;FiN-a|drBtr}! zp3NK=&@dM1gjk>g_Ty-I7DGM3Cr13VjHE%hv}0gLQkxXADf!S9DqSAp#{fUNR_&uw z?bKK)8P#qtY2c$HQO$-@!;oKx9YDOr0Hf^PQICUZCn$}}nlkt(CQ>*GX&vy41Ykd8 zG0IblIGR`oj z@_T4O%&W1*Sq$ur{UE%p{2+R^WuG+OYeTMLF{rDPnFC*rq<`&_N*QVkcmv1?qSg%M){x8Wdedq-dH{!8$Yw_9yBuRX3IV zAQ)u|iopcHV9{{ta?uumI-<#zSG-`rJ4!ltz+Yr6V3g_FVXO?y)jNGQ!AK6J+d|U- zenCjC5WhAKDVDVl`pF&4;Y>K!31j4Gk- z1Sb?KQaXUv4_*@o4=A0|@!RlkBp`>{lrTSAY>W-5n6k=oYvOzh{rUM!jF?yo14ySl zesrc#2xSA4h+DLpA9hK#bg6thmt>j z#)DdEAX7ps)z5v9WI&^gRXyXB8$nlB#1h9g46i^23}{}wf`s)0#V$G~)XqphkT^>F zrGCju@`0A;9OJw)I?MafA5kNSu$%;SYZ5hOy`#qpIzASb1T))11aDmJ;&E2HIxz$4YdBc*`mQ8Fqp{St6QLy-I>0|dtiT_d^` z^~!*cBWDu5pXeQ>iSc@u(q~|h6b7P!Dh@6S-yGFY9B+J}m?MW) zHiDjO%Kn(vXRlOI@-(=&w5!KZl_TkdrQXUXJ}Hm1e|IUT-{0)8r%ap zxfAzKcWqgDZHw2$T|9SQtX=cOcUAS1E&i3=SEN&&e^tEBv5zyG(d5OsNA>zCF`wDf zOpjU3(E2U*-eJA_uR3G9r|%*USCzcl@H^kf_3t$44L>4EWuKcAty!M4X7k3n;H^4U zYfKoobM5j!R^F1z-5)!B6q7wucCz5YQ(mXJPyBsWj4>(YN}RO-1VI_>;X_3e45 zN7B~E>tAo5=A|@=<#Ft)6B5Bq3T<;9&+$6vqPB0-dW)iOw%jgJ_q%Ujsj15Qt+v-k zOu&iL@zS=QNeP-41w|~^9r0hhAzF89&-yLil|sJnQtzj>KU}_*!&vRxk68Vq-5re{ zPMfxR_^#`XU0Zxz?o-eK@6Vsq>Zi-8TkkL1?eJp1qE7Mxra3~>=9q8Jj4g9q$sLvc zYxo?l3W(y9`Y~21N>Sj;o6fIXd9UrnwnagnClu?s2dolYbxmb=BKzMmZU0ZxL6q(7?~Lu!jx?P zoyN#0TF?R>13y1LrBSV`$|Sx0KZQF AvH$=8 diff --git a/Doc/RomWBW System Guide.pdf b/Doc/RomWBW System Guide.pdf index 291ee04cdff3501583eafa3b695b58992cb6fa94..221b426732f48b06557a124000d72a53eaff6baa 100644 GIT binary patch delta 28772 zcmai-4eVxBamKq)(cP+8(JD5D1qur!mHYjH1YuzjDo6s48U zwP}@tyv2e^Rdm}_g*2{^N(z-AN(vP;L_)x&X`xAJ6)47%N`G_Tk9+U)yh;Dz4`g=E zJ?GAunKSduoV#~Dal|*DIO5Y+>{BGy?|4gh#_v6G!fWq-`MuBX|F?(!ZgIiwZ+-fb zUw!<%kL|ea%O~vo?XAzhvi}dRx&Iw|j(Xjnocq$LFTD80EeCva-+LcD;nfenbml$x z+<4Esw|@7)^S}13XYSd3;?}>}`%hQBZqIqo{pdfR`OMy*Tzt)*r`~q#o9}yczn!1G z?(YvyuYK^;hu-~>pFMZef827?zy8A8fBnYY$pw3VdUN-{t9JhEcV4>i;RCMU_4K#j z`NG#W9lqhTTb}u~8?#GK`ry;opMB?v+YWu@vU5Ll=p&bZ?%Ow9wrBTS@BGFAUw`fU zKmV0e-}r{DzyF@6_k7~dFMR0U*BrU?*$@5KyY^nS@BUwZ-$!43==9&b4m|9_m=pT7RV z-B;fH=s`Qb^Zk!+zwO2Ue)7({kGtZsO-FCL{ie&${qSx7{^cLs|699`y7;L_-f{b5 zhyCFTPd$I-?yp{O>)U?#zi;`{=lA@}LGL^L+~;<_=dkN`KKQ9^f4Ti#+kaT!Q+?`l zx1V$SqgQ?5$NzlU10Vd>X$Ri$oew;IXnOE4IhU$>TSE@vLTZ5PQWvzqDI%$p8R5EdrgaDPVN~@`SIu=vqnKKsklri|KJhcbbjYt8$wlF?k z*lAgncKSdz)!w8oYg=Gl`%c$QV|-1Ln*=3oNr##a|?Ku6#w+*cO-Y<(p&wM@EI9YgNJ$ z<(E~X(uHb&n&eq6i%!vnN*0qQb&{>-=;qc8F;x>wi=x$uQ?|X-2Zq&&6w;X&AZjQm=-Hpz1^HIV~^FRWJ#Ko=tnRArE)<`YneDp>df{% z&C^o&F!p@uRF=Er;Qnp?8J>hsW zm!4Mq42zlDA6_|AFO^npV{eC**d%qHh!Q4gy=LF*%IBy%eCDv4eiPHWEsWNrcIc$6 z*~Hou=FHNjY;Dm^UG`&n|3Umso0|Ar+>|UZL(^?b+RTpGG{bet*rd(UF|C(B$AP)b zl$Vo<2_#Zg!mP{-HP4`_UtlTb`w4N{PDPznMN#R*6{h1fUm$9vCYDuAp+|34XIU}V zw{9hVhSL^g` zQMV&w3H8j{24^*0Qckp}=Owg8wJA?3j77&*obo;Gkd-X(q@{)z(CXRuuGn}$S1n{W zV$W+8U7qGmqw5Ug7t_kq%1jU%GLdzr9GgAu^@BWfj+WU)I}n{JKOtSMI>`B)r{bxh z6}ixo4E-G&NiX-j(i0!PdT|;IY6OuJb-H%W`_!ChR%EKv@D&z>Wksd3fUlmO5EID%Ir|gs$4CWv88$Wtf~{yCit3a z@p3~N5pK)gu1?JZqYD;7WOZpNLxyIHwI{d*kplA1>efO7Ot3V`G`XGHSyMEoGfidr zUDgoJ>oyU=m6}FmZ8{2a<}pr2ZfJws!g7@i{Z;MH^ThHYJkd(uR%t}WtEeIoPp%nk z9)mce)c_jvELDOL=dJRWMaIy@kyy*bIT_6wTBU>GBZQucHD}4@0Wo(yt~mV~q}3mz zgFh^qveX9__*s7lcxFO!w#nhQkQWt6wJr*I#dIB18v0+yyrhgQxva3ow*wbUJi(IY32G(E_YA~)!Z zv5l!Yne`-MV}7KId_;AiS>nYcx$ZQ4wPumFWAvlWxa?aWrX8 zT5wu@<8}==)Rt_D<{X@yg$xE0Cv%v-3ADt-&%`Rhz|$4LD6z0rKD#_m0ohAs1glVS z0XREE$s|Q4k_pgWkF5ahHF@e_T-C9b#|$*X4uH)X^$St^Q->6b*5EJ3svZ#)Bt$8_ z|684JX+aHUsvrr7Gp+q5iQa8TRCys#<~FVff~DL9Yn zOp1j$tkzoJ-U zi7(qko+A?z?5LAsEPEn+Ja6Qx=cNmDq0%5dE!lZ-qtGl&g9aEOlaye=Ix%^w=B{bk zWfr)j(+0{0O#_S2ebWVKdgg=q@goaFGQDDk{72$%Y?6jrjcPT-4$PouBA5n=aYlBWp2Ete{aU0uJ{>FquJ_#AU4Gz#E zWV@0eXMV13ISpt@O_3tST&lePAbvtz35FR=xIUdEXv^bs7)u)Ld?`2#H# z>X)I}am-+=vqhOx6Lox#yW18(My;gH%Wj!iuigY{X#m0lE6pgO)oQZDY9vxqX+fjf ztF$yXJOxJ3bEm%l7f}%14+n?mgKV&KSIs| zoHu31Q4v{AX<4McVg%4AhA1D#VnQQ__pu8fInvoEEGxe9F^P$*#oWcwfXTE&scF&E z)uQ~mO_XEJi_*U`LWk!$OFU3dF}#_j4)9Sok^Q7%Y1@QX*369<#5!WKHga~=;1&y0 z?I)U5q=pAt{tC@XIFv=LH;}?++k4TF|1w-;ut!-fVz9-~ujw>Avq}cNTtgdgQ@{Vj zDYTAF2M748HVchVTKQOuPeKrfbbB;-KDHdZ z*`nwhnA3QYIUn^79a~`kvUkWHRaeFY163O3G9PQ@ylDH;a|7BkI~?LaR23{lC-G7V zhzF}NKI@5zJ|YcDppkZu$0C1-q()<6(17=pMslN-DiTX8urM|=O;70sQ48aFiDK5Y zDH*s84eVGJNFb}7LGTe$Dj!FQ)5uole6zcDZ2YB;_Dvne`};6+(zIjnW;WLPU*WTg zFtlQR5{!%xuWwG35)maUnIwnL7hP*!PDXD>Q1pvT(v;o^b5K;9gs{zx))4YfuuBEV(hAWWR-+5*pNqPWH0)5K=Dc|NtP#KMG7P{b`liy_)I0! z1tVRBG6^8BX880?kS8i1?qkhj6w+X)J5EdZmj!?m9mQJ9Ib*5F8%ZD(W$(GN*Vnwm~>U%(n3C$o5%mc#QR)a~WJ znwYABo%WFnt;Ds6^5W)?nj)v?nz45MEc)n1Y0o?fLlY`HQmJGshRNV5hKV$y3C}zs zX^$2QqA|~;)pP}hC!(P?sL3+TdTve)DxH9%%uv1kHkoHcM=qXb`ZIjcn2+*djo6^KIFA ztlJ`)rF&d0hK_?ZG>aE#F0jBGn#B+-dal&G{~&(SbluOkH8hZ7t+kEO&|_Wo(5w;y zEgxzBrhfl%trp!=<*`e1&^-R**ierNpVjE1dr~C`t>{#Q5J9u17D4yaqRuu*3qCW? zShONV@BwQ0^A@S-5dXo*A+3xA0=5{UYNy#f0v63p6n!4zpNwVyIh#t2*PvN93vGwi z>kZAoHr$romE?KeAs4p<6@=%3^smXP$&0oA9*a>doH#bqED@RoAkfG{=5ws#KORUV zpcCWZRD`rxs=MWZ=DuSwT0F+QbnCh#dXuzd#9(UAvKTIl*}elF+17Clce=-HG1{T7 znodu`(Zg*L->0mYCFjJIC@rM(2yafMWTKfMdj{gu2DV z5rnH^H5yhzLD)JNebYUT#KEN1axF#2me&3ao>13k`ryX*iAx{ON5h~@!eVB7DZ+0k zXNP=@TD(;W2xF~ZjH;QHy5R#b)2D++t)XcS!dQ@q7(2EtqIoUmz{qU@n}j1(X<$t% z&*+0u#Q>F`Af3H!0eahJFs+7!gt3+uLbDt-Xo}TCGprt3exyx88>1qLzy`%^!!CBq zqPu`WCe9*!1>vzKUp&GU6Ph_GTJFtB5pc}wRpZ?P%CLzk#%WQqz!L4)B679pf=*OL z9;nL_6pePe-z{!cP3@C6F8vM&G`o}>H1h$(5sIL~hb@jK4yp1YmzaLSrU^TV4Y7m` zChJxjVe0tp`bpY+_LJCY^wij`7|T>ZPr?U^s9ABrt#@-(ASq@>Rn!vWdE=diXu%~B zqfbI)q(KYyA0G?eXp5$VJeFC%(-n=w>c0Rg{EfLvrVpeA!ua6QmMhx-mp7kR`3Pp- z*gZLjcC$8UJ_!{YUyPNl@DW&_Y#obU)J;Zb9%r(h=-l8|*tK^=>K5a!v#1@%mQ|F1 z-lVvT{2|ggtScnT)wAvW<6 zVMl?7`y=>j62*jVT{H67!tI+Frmzrd*6=mQa?O-wSS zyGpfaVradw(Dk6HKLIgbOC}*mo+QHkV!Vf)v0S^gvA$aXP2>{Fn9orb9=^=-c_1Ft z_;4;t;{v0Ky5)FRPe6rt0jP|Oh1Hlv5`$W36sfE~&_1aV#d+H%T9l^}3}fMBwu~Me zM@2~SfX=h&8cR zATk?lch4Bhok!tAe(D|JvrlVv5c}H@ywrGNyU+Mp@~4T}f+E%RtlyAu+L`deE$n%~%5r;Il8FfK3{D zK`oP1Ois37)GO7{+%M3euQiI`(*`wYd^o*?oW=wEN2(QJd&pC2BAz0o5xL3D}wWR2u)47WFJs0!lghazvAp1SZsw74pdkSs}M- zwJV$)%{tE+OLC!OiI;q0>(s#SCY?EMEXy1`btTOX89X@iMdbyW;m0g`dbPZNVGyFZ z1cxvPk7}Qq?6Xo8D_j~nhc~w1fg+39Ai*yi9-eox?dKwX@|-pMWFH@ePnxn~EQM}e zARTtI^fT!8xOO=|-UBC@%+F|A*0k{~@Dw}5Fl?U+z0=)?ZyxH6b(C?iqzgfUct&C+}WntcijX<5k{K5J|Sz)ASdz<8^B zQInkujUCY>jlsFObaD$V*1~6BA%a#d<{jxa25DzWT;)_NrDssnQr?(+PZ!Mx4xC0D zFy=%4RM-qoCCe$ywUA$%?`!yCo1UI@K3Ggb1y&Os=B+dRwiXlH7afR?z~siO?iX#v zJ^1XqG0+x`c}r{V$F6|ZA;bp=w#b<3qq&TRP+Ly`0=TKmU=p%XvnFl`3h;AcFw(Ci zZ^y?a6^=k$Ru5ooIXmkwa3cni!;a?JW9=JH;G*`G1IE%trDLfD+A`_l>s`zFW9f32 z(FDW+WQ*~SP|^NNH-}B!%+k+>t2E=M@5X4{c-0QBxCv~0^gOsrrH{(AnJ--S?>Kgq zbX&Mjr5a`L$S$bR_)L?#)UXA8Z}xi(JNB+J+CfY}{&`GV)`@-OfwY{s=8}2a;o#T+ z8wfrGJr;tEBhQTp;}%J~7|2Q$406 zXA-1MM$ud*mJ~f)B`vgOtK`3msWX@xULt;izcpiBfeF@3Svg&sExModzqpgAi`ie@ z8pdMbN|Y0Ix1#k@w;w)(4Y<&_%F3649Jc2>$hDyUyc!z|Y;FXUmrOw1B(ZnIaP
a`c)-6nV4dSd}uHNE2+kLfXdw*A?fQ#P&?nI3b>nu-;9=LZ(ZvAT!&B&Kc&v5;*E zXoc%BchhWQ+Mvx?a7z{&&?{g^IkzV55Tj?=;*YrNsarx*%@jfkV*$C<+7R70_CW_| zo{-_3C(bXzKlog!apGeq8GQ5@7dQ+4cXTRoW5=aH5Ul&jwL;5VIruC-r6*NkY0!_A zq7QKe6)NpAp}RRV{{?j7ib?CM?J;i2-Wb$o`XWGw3|%wW+F)4q@ENzIZO7$BlORX4 zPi!?t4o0F9g${|nwVRNM?JgOE4cUk0=Gl;Jni6v1aw)A9bjbZ#vuzGsLpV( zs>y-}x?+N*i?q7<LM%qtOYG+UU z1swXu+#7RqA~|zD4}xj07+m@iI%HZqIAF8`22jb&6IHN00zO0a==RbNM3fzY`{Y1C z8YGl}_s606}_0mzyi`*-xB@zobYDO`1dn0fZgUn1nNhE;5odYKBBlva!d zKKdDj4|i=wijLUH58wRg8GSmN2ez|&Z(~iog+14L*ZHt(W_%PkEi#7Bayl-hXptUI zzKBLpgFy*sNw=4z7(Hy-e9t%r%)?Nn)mA(luj2q<921N>)G!zg2;h>8)~s2z$CL2c zArj4MwrCJ@rNPJN)K&a^ZqQVM)4{fhK*7|6zpO{igMLI?3{7o|R)tZ{K=sc+P!!yq z1naX!b5mQlj$84*CERYBn8(%-KfTTqA~be$vQPasfdi;y(D&K(yU}A0&A7NDXMRlO z7)E@HL4^izXz2+BC)+Fl>-ok^^q9{(*v?QhbphGMBEHl|0a7($O@I`CiO)Eond>pY zu?dJ^*(N64R~k;oPf9=uT?|zScX~CSfH&o)AwqSQs=BF30Qb5WP-2TQ`9zDIyo4Hy z^JS#RAY`WS1bSx8=$HklVHc_ke2c-P001;~OUR!H-@Xz^yM}x>2|jM_87e@X!U7sX zOv6jCWh-^jwUp|uMv9NFa8$}Y5eHpUooW1=*kmA%PjaVY*=IR~^DWO)UEs>KImwnS zQ8xlsYHv)5-Xud*C#fQ30$hadXI$sgy~BI0K8n3OdMK^h7so1E8nm&4fR(?CWNMz! z2)~b0qUVp~O?*Vl_&6|UH+*H|wu`pL&5M)jZQIgQ2yeHYbRuBX$<0ZaTaj#Qw`Ip~ nKJNc#dH?3)kKc6F)fer&`kI~FFWtnPq>h^oKYZJnr)>H^H@p!w delta 28935 zcmai-eeCaLS;yxA5B^R>p*Yjb4vzuO_&h%#oZ@jph?1wq79L|*3LP^+3|;QS%%n{$ zQ0$k0BF3R*11O>_=E1RFV4RC!Jj?y_rLM=_dfOBY-4yjH~nsL!@vFS?(1K3{LcS;^7Pl7_Sv@|dDf0o zkA3K@3qE%2))TKh=gK3lI^(I!Px!6<|9taDU;4VI9=zq6Gd_IBC-3;fH=l6SgFp7@ z)Ah&SdgP%$a>StzoN&|&FSy~{zuNmp7ax;c@~Owa{qWOoeaR!;6K^~8`}e-+rhhzd z=kFbQ+1Y>kz{AJC=}+!@+lgO0{_j8dy_4T^eR9~jZ`phQ*LL3a@9*FD4;NnY)f?OW zhky2*PwxH2vmXD+*MH-g=g+?N(?5UUs~>pZcTUKj|Bc)CTzB7fcYppnPd@w~`@Zzw z-R1S(doK8i>%acw%WnP5-QRlE`TIZjg{v?7ZhPG?{pAUFe&RiQZ~fu@&!1ns_?Vrq zJ-OPdU;m-!9=Y+l^wIO*arf&U{GTVDd%^yHI`)R@;qU+4zuxuG-e24IzB`Y*;;A=W z^y~p&e(`tD`Rx;TTy^4(7w{+k`vCqN$e$PTXD5FS;?IljIdR9y5+obcM|{E{p-7T_5UMD>bzB2+GfU=rAe)PS>EQ`ANZNApXyTot6bR2 zx~+?3$yZiwo999+n>5w2O_H?Pl8@!r!;-pbKV^~FV#=~CbZ}WGmC>3~CQgznNoCQ{ z(rPK6j>S}Y=8Q$XWDLG4YjonOZbS<3wYl-tN$a$%Y&!kHx=;}!Ew*fYwV!m|G{)B? zxk<1|n?ZBBQJtE+uybmP*2LOWF6yT7MK^7&$CTzsak&xX-=^8HnsG5@(wMliGPMPk zS*qeMxEIP-RE-^R316~1&VP2P$~v!A3Cp^Gamm+~g=&AA0&A3Tac6n`pL}u4zj>Z% zE_@khtTrX%a+c^vFaN;?Kul|yI7{lx&OOc3QuvZI&j+J2{2sJIHv+9nr(^0?#x%`q zoft;;Ea%Q4wQ3jAB8#0Y^oX;w8<7@eJx#oxw=3L=r$y81jY!MHEMbcF+hWSxuU!dI z7l;85TF8GASJ{-dLd>Ww1_|noNUOY%b5Ag~X42CN1(_DJx_>G6(?nghjqQ$GVv}%< zMG2F%-f-@9<#W_syG?Kt~aZ*tXS#WA*1*q=GFGQ-oEvcPLDO?q-~Q- zWrnV)Se0zDscQQ@&bbs7%i5x-2VXtny39BaCkPb)^eT^QJKxra+{Srvy};6WhdScu}R{Xf!0w zv%J)c0Sz}Q5{%Pa-|#Ue%`;rTUi%E?p5LJUOz@X-ObL^it03&Q;E9M|3@q}`3J!0% zLTH6WXc>1!qyQh5&c?Q8{4#c-+v3`jZ)fL3t`&STQIbxaClVTnxE5)a5E5qQ}d zx9-t1wx@bTtZ8GrjMTx-lbPl0xSr&P%f;kasWG`(rxVb!N+!O@<`q&Wt7yb{As%D57;>ar>{3Bu;pDpqJs zD^ktD8d9Tm8|-(r!G7bf^eX06T~?wW(5gmhH37WSsxoLH|55yPos^>0Iety;0<>1$ zd>+A=*Z^oCEFwXYrMa2!&p-CtuV%iOHf4J=k5yC{L4TLs8S8lXZWe9?{6h298Y3&5#4U&udWb7E-tL63%V zY`RDbYgA}DK{iZOGM^+#pq1(s(HP_JC68Y%0;|`ky$qfPNWHAVT z(4#T_BOH!nv zw=gOZrWg1Py%DIYhI+`qYJ6hP?U*Fjb7yR=`75TeHj4?MV^MI?!-c*5n@n)Yj@8fr z=orp`fm7$i#Ek{0__|rJv5No7HlNVFA^rpS^i>lst6eB_5Xhx|5a8zvoB`>R!jtO= zUrP|Iw2q9;j8BO!=p-%Bn;0L^ix2S#V2 zCR~%CgdfZeG$k6+beq6z!(ui-PA&0A*qM<3D1ORJg_v8Ac6`=Sk)RO|Eom{aN-$7* zMMX+(*gO;N&mX*x%d`B!KB6dG>uJ?g0C4LiL28ndWmGHL3HXk0JJCu2qQGL^YG=W{m?8u3!2&hDh5rl(zhx8 zBYni{$i!4CG`HiJKoo^9LLa>)H43b{!0#IjHcU^{&I~C_&uv(!dJ+|%v*rNN&FW? z&EKJ+*1ABnP-yu4T+K3Gt@|;&1dejk7(et3S7|aMgUJL zqS66Mu@#x5%^5E=YTRZQD4uFgp8{Q(xowFyRMFW7DR}RHCQV0L8eZ{(coSJn3-%&3 z0P#W-4rr7=mSZt`G!B+&XKwU__k0hzc^Cjn!r;)iAyGiujbD}a`0 z#vF^8Np%(f!DwIt-42PJ9htwKaf*>LT>#V;UqVICqNc3qu!Z7G0CKE0$zZ#RWZ+ip zjC#bRTq`}I{swp`M-nxKxY{BAQT!AY)S6{kiLUElq%Wp5qb{J1CdFL#!dIo3B&R8`5oP6Wv6_A{YA%U6JdZW0m zaBj?@MM)6Lw$%6!V!h!9ORew0XL&yT0ETiwBL^2L;5&zaW{m$}1i4YhrZNLkgG;M& zH8@XIR^no_giWT+7g2v~EQBVBv-~|86YNINn6P1D?xJjjHJeg{G1j@ne@tSHP+W)7 zj1-*?CM_m0X|<%xx|lX;$E0S6|8P01##Y^$83n3VAepg1OUtnsGs`33tJHo_f25?N zXV-$h>SCzMXgWod0@AgdIC?wGMH7oEYy)2;v%UWrO>iv6e13}wu*HButIucA7IG08 zXhsx0B~zF_#DA1xe|od-Ci zmZy_|HHk-suk6iy$bS?+SjmPTwB`Z^TdtU=vS!+#nCuvXu z4gaaTLqCiL)~7U*i?Ql4l=#!OvvLbNp?N|l0mP7i5^R$kOZbTX)Z7vg0xl~b_p>+4 z+wVDh>yU247~pIjLl$MUnkuOBv3cXeKRO?&Z9jGjg1~yM!4{g;k)aVhEGNd~8$1}r zBF*H<*`->yecL;?c6OSfN9U!wpJ+MJ6a|{wKPrsNLM!EvCrzzCYWFqSt$y1>=|k?5xC zi&f#PhJZC%LNsEE7Ap<6=$Uoxr}m|o5@V;X$iY9*0H!ymqy5x9BKV@_jy%w^&Iejd z47P=4z3s8+xtHv3SXFZwC17Q+wf#c_SQfEXz~M>*h1Y~8iZ7;HEP6@_*8wYxRwaXG zfD|;^Wn?i_WVFs0l^gSJHSPRr9Xm{gq8|)4%mCv!78yoOr%%M}0^p2Y&zh=*-Uxm# z0^4Q4NUc_|*9mvIVXVDpE-c)dtt?UF1n9&xUjVQt3SYb5$3RKNq55te;m{0A z!%*3COF98SOGGmnOe8O>hNkUF@L4ZREJi^ZB3B9;`g@pmeF*>~?pqo0{kA|Hm)Jwb zE_$59dqXpW9gCSBovs}#O-FuqQH#>EqiI8}V{~+?2Y}{BN0X;Qlto7iyjo{4V?u6` z0*JF66A`KA!qFkBHFRj+!U`=?zlCFku~i$u(@%=#x|nG9QyT6_btVI}*K_CI%;Kb# zV z(P|zOThlJ@S}i*ynzaWwL0iu;#eWbje+}A%+7F_}nb-p9@KPFKtRjja3IGyw$sqq| zo>&HjL5tqcIb$3Xbv6|%ki97|G&5#E8D`A5b9AE0B$P;PVxHw`sj}e4YB~YU@Jp@@ z52bVtV%D{^#`urHR_TFeJ#EnJIdss>R$y1nRzMS5LHx%~Ok26yn%U#)@W;9ny0Fz$ zGsT9nR-EPcNcc7WBPP^}EsTIpGBI{glW71+gNhkz=pKAiC&6fZAXQ z)?kOn9L^3hY3ro2tU}`@uNg!T4c{X#(^kJXyQOT=7`e^MTg7DozA(E4L~aY@WsV6v zJ|(l*NZe8)Lp#<02NsMyU+R;P5f~o{nW_#ST2Op8tP=goa{QPZ#j0^|p0nVMG^dST zA#Ib6La9Z8Ji{4c-07C`4#%!NlW3WN=05Aw?K@~y3cOe_yTq}JJ&gA{B-lQ9c+fvN zQE(Wu*epiNXhftmz=%}oRW>_EH8#ogmeQeW3Kw7ZQH#waW`lT$Y7smQ4`$f`KgU}) zW@$W17SSXHHGHiaL9=cZKx%6qfRECTNP*W)VkDD}Hqq3wX%cqZ37-+Ld^0jj)pUB4 z6!ykZc(WmW$tZ9{DYHN+;0Vv2cK5_pjkr!W9OX=t1K-T&FZ17>VX-YYn;khvFX59f&J()MZ<|) z;}ZQhSb)Ly_LhkODn*3wY1YkHN({osjc}>*lv=Yi23sE{p+u`0S@8K86G_W`XDn7l z787kjGrs=(`N84+#At3AY!5==!-VJ$5@e}lunSs&q7fwZMVFLcSU_=bU7!52lr3sTwEZl7GzJ>z2sa?Fg5ex@z zd;QN$_DvjUjj4MJ=OsU z#;DDSy?m_h9DEwWKr^g|MN>PL--Az)F~&BH7SI_Cj&6hPD{_<}_|}*3MYTgOGkh*B zsw`{1F@hwEq9Pza7>|HdbK=RS?v4_T;sq>FQtFU2Jr_$grsIk)M!2)3HHN(I43X{tB>lLaJQ-f%LOL^Ig>wg?yrd2G=n0YZb%!Y>B9An8KY)GGMQqw#Lj zCr0n|^x>N(ULihZN4eJm3Qk|EGE6+!o0+r%+LztYnP+-TifHP|i3DiY%YSk})PD5b z>Ew42X7&v(T#c2zL4m9j8f*tcGA?=@e#K`G)MNmvYW~JxdL_oeeaj;g+k+$c?CVDX zD$OQdkELDJwVIAtH4k(d4jJoATC7?Y1D{#@c!Q*i=6!6RKZN|pAB0hC3&xOORgZ-7 zh9(;DS#boKHHh&=FEGYw(f#?uXdi?iSi&MsjJ?Z^4^pX{0rb`Up0OL6`KTvP=e`nu zT6P}WlU{0P39F_SB8!1fYuf=?+HK;^n_@!nWh?K^{wML%-lUW8V$l_oQncv@VZ+ib zU}P|v>W=6bSTvk&pZtlfgF3U}d`!~S5~E=1#(TNhX|4_lVd*v~AS(I;Y&)2!Sp-Ay zV~c@N+cwY*H>}ZGW(y3^L=P^oi#d%$D1ivw*wQ)YgYC^SV_gbhh!#kY##?wsCsJk+ z42)W90ZF$e7bYg^p6`T>z^51oG?YR3=w}&JdWvAEk}cFD;#_({Oc(fOv+Fc)fu1`R zHVY&;VNq!!7~Wyo%_bDnayOMAas}B5jg@8_DdYLXJl#=?LQ`#43kJrQaSZ`xV$bA> z>=fx?tkvxq%i}X$G&X8b!T|$guxl`3+)`UP68KCpGeoH3=lPN;HGFD4I_k!Ji%C}4 zkRj^bhEL%s#?HTqyfUoZL_bct0@Z9~ym-+!D~OBl$I4=0v>U;iEqCVBZ6m<2`iKsZ z@*SsPj?>n`5Z=nP8b+-K(5~vvc>BJKBbw!}EF?ln+>-$|n;uj6(?cKuvqJ!8bv=$p zp1b#j0iGO6^cUzPm?aAu;4>dj)Megn`|w}r_ekl=4wCZIpw8=VA=-j~;szP7MNBik z!BL<&=N8!@VF%FD~ML;wGPa^EX@Y07%*xTn_%3& zTpiGlYaiLLEt({EvFP5*`ls)i#6bS|kcZtminkUPXJO$~#RyLq6Nh)_!t0lTQE*ZQ z9gGD~$r+NGK|c=8JR&`hjPT{$+I` z@v`xv%m>?J7y@9-s7>M_Fo=;^Y8rVh{fDp7dN7Nz?;^rQxM33$jVg^iSo!GgH8amk zno$WyFH3R3%pJm-wN9;^7@yNM+Y3->W|0U^o7DK=m34Y|+?(+;fn(4gJaU1=%_s!eI) zlcIWOi#mQz6hll31W$U8d2Q~;#M>ARoiQ_uI3VN?3V{hx zV*%Wzlf>6Ubur+@ZXIi{y~Zb|RWj7lt<#9-2slew4AAnjyuzZ1>MX{M4mVvOIGRb7 zFB+|{_ALHG)eUp!mY7`tR5B@mB$$x`1GRD|oij_Dg8bv(@i2^lP{Sf05FbNNh_|iw zO52lJJz4@5=N`w-DYg1#V06JF74+B4GH{mVp7h6R+h+8md3A*cT5H{!;y?N?%&72s z)pkt#g-M1KNJDoX32Ijn#nUL4Ep&@7gHtY12#?Z%ebhZDy<0!5eWB@493^t{zr0uEr(1C%ygV~EdGNM7 z&w9Yi5y!S`^P7Aowq-nOk}E|j_VT@FUhLMnb7%SQXK%LuI(YcH_TkU-AMUna{W?U@ z-}*$RoZP-8ObZoQCv$v$A6>w~I90i2M&P7FHLdg07YS%i>0YmX-`}NPXtiwp+51vc zTvRxZv9CyZk)qh4_`IT7%Vk=}mRlC{T)O9XHP4#=V)Oc#y|Omk91B|%GWpl3M0kBU z(j{X)uYd7}O4j$CGMAe4SDu_yebYa(#x~D$hT+EJ@>&}6TzFiBCcRw9^w#F=_noR& zYCIOao*q+m$4w!ue!IEQuY93thV=oAew^OtcK2=3`mCgUd1q*(_2c`gqKT_4*KYEN zWy^cBHs{RjknJa4a_n?@b!b!IuZq`q>h`?J;L=k4FeyemI`h_+b%xiDh1~r9<=u_f zw$;anwR;h=;*n|_UT`Tpn+`;Fa!>bY58uOCRAv-0Ym%wmln_u`&C)Sp!JY+bV%Q@a@x zBM^gVW*}w(Vpbq#17h~=W=tHG5!%KEhK7b_#zwjZ7U~8D>Y57rzWFIGi6yBD8ZK5w z21aHEhA<`DXGL**N^~-Iv@~#avotYvbu}`!FfuVWGO)BXHF0t=cQSK!HnUT(F(II2 J`nf$EasVi<{b~RJ delta 593 zcmaF!Q|Zl5r3n-2S5FXG$-cor;C){6vulU8D=cR?n;EF`zg{Etq`wF!&&*98yzS0X z4`l`BS=mHvGG}5;WP19 zB)*ZWJHlgU{pA$nF?;U~-|umy%T!R6FQFu zMpW8;^LZ}0N7cyV>$V*#-Op65RkwZJp{7_gQKv54ahuAT12VF!-e^rY7Mwdj%gNK5 z$=mm|`28rE_kS+EadP_S?=<;y{fx$>63eB&?paeaCr$hivs!2F#`iYe22`Cex1yB% zZ_)R7udWYocPsm!&e?r-8`H+Eq1VdzY+H-Ge_xW;eSGLLi<#}UhRUS#y@!@weDGfL zi04h!?A2edDP9bmqu;PrI`vXpR6XaMW0KitSDWo_>i=d|_Mc&v=(CN@W=!p7OpHJb zqM3o11&CRJm<@>8x0^9>SVm|YnHZWG7#LXU8d#_s7^rJ1==C(9OWq(7?sX!ra)>#nsW(+{Dbnz|zIi$<*A?(9zgV!N!DulIiF6 HaL54w*v|Hw diff --git a/ReadMe.md b/ReadMe.md index 3e44bdb1..86ab133c 100644 --- a/ReadMe.md +++ b/ReadMe.md @@ -7,7 +7,7 @@ **RomWBW Introduction** \ Version 3.6 \ Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \ -24 Jan 2026 +30 Jan 2026 # Overview diff --git a/ReadMe.txt b/ReadMe.txt index 4cc20b89..b14801fb 100644 --- a/ReadMe.txt +++ b/ReadMe.txt @@ -1,6 +1,6 @@ RomWBW Introduction Wayne Warthen (wwarthen@gmail.com) -24 Jan 2026 +30 Jan 2026 diff --git a/Source/Apps/Tune/tune.asm b/Source/Apps/Tune/tune.asm index 1c3da63b..0292dda6 100644 --- a/Source/Apps/Tune/tune.asm +++ b/Source/Apps/Tune/tune.asm @@ -54,6 +54,8 @@ ; 2024-09-17 [WBW] Add support for HEATH H8 with Les Bird's MSX Card ; 2024-12-12 [WBW] Add options to force standard MSX or RC ports ; 2025-05-28 [WBW] Add option to force delay mode +; 2026-01-24 [WBW] Support RC2014 platform id +; 2026-01-31 [WBW] Update MUTE funtion to zero all PSG registers ;_______________________________________________________________________________ ; ; ToDo: @@ -667,6 +669,18 @@ CFGSIZ .EQU $ - CFGTBL ; .DB 22, $41, $40, $40, $FF, $FF, $FF ; NABU .DW HWSTR_NABU +; + .DB 27, $D8, $D0, $D8, $FF, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (EB) + .DW HWSTR_RCEB +; + .DB 27, $A0, $A1, $A2, $FF, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (MSX) + .DW HWSTR_RCMSX +; + .DB 27, $D1, $D0, $D0, $FF, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (MF) + .DW HWSTR_RCMF +; + .DB 27, $33, $32, $32, $FF, $FF, $FF ; RCZ80 W/ LINC SOUND MODULE + .DW HWSTR_LINC ; .DB $FF ; END OF TABLE MARKER ; @@ -710,8 +724,8 @@ OCTAVEADJ .DB 0 ; AMOUNT TO ADJUST OCTAVE UP OR DOWN USEPORTS .DB 0 ; AUDIO CHIP PORT SELECTION MODE -MSGBAN .DB "Tune Player for RomWBW v3.13, 28-May-2025",0 -MSGUSE .DB "Copyright (C) 2025, Wayne Warthen, GNU GPL v3",13,10 +MSGBAN .DB "Tune Player for RomWBW v3.15, 31-Jan-2026",0 +MSGUSE .DB "Copyright (C) 2026, Wayne Warthen, GNU GPL v3",13,10 .DB "PTxPlayer Copyright (C) 2004-2007 S.V.Bulba",13,10 .DB "MYMPlay by Marq/Lieves!Tuore",13,10,13,10 .DB "Usage: TUNE .[PT2|PT3|MYM] [-msx|-rc] [-delay] [--hbios] [+tn|-tn]",0 @@ -891,10 +905,16 @@ MUTE ISHBIOS JR NZ,MUTEVIAHBIOS XOR A - LD H,A - LD L,A - LD (AYREGS+AmplA),A - LD (AYREGS+AmplB),HL + LD B,14 + LD HL,AYREGS +MUTE1 LD (HL),A + INC HL + DJNZ MUTE1 + ;XOR A + ;LD H,A + ;LD L,A + ;LD (AYREGS+AmplA),A + ;LD (AYREGS+AmplB),HL JP ROUT MUTEVIAHBIOS: diff --git a/Source/Apps/rtc/rtc.asm b/Source/Apps/rtc/rtc.asm index f0d95636..d3579986 100644 --- a/Source/Apps/rtc/rtc.asm +++ b/Source/Apps/rtc/rtc.asm @@ -35,6 +35,8 @@ ; ;[2024/09/02] v1.10 Support Genesis STD Z180 ; +;[2026/01/24] v1.11 Support rc2014 +; ; Constants ; mask_data .EQU %10000000 ; RTC data line @@ -54,7 +56,7 @@ PORT_RCZ280 .EQU $C0 ; RTC port for RCZ280 PORT_MBC .EQU $70 ; RTC port for MBC PORT_RPH .EQU $84 ; RTC port for RHYOPHYRE PORT_DUO .EQU $94 ; RTC port for DUODYNE -PORT_STDZ180 .EQU $84 ; RTC Port for STD Bus Z180 board +PORT_STDZ180 .EQU $84 ; RTC Port for STD Bus Z180 board BDOS .EQU 5 ; BDOS invocation vector @@ -1151,6 +1153,11 @@ HINIT: CP 21 ; STD Z180 JP Z,RTC_INIT2 ; + LD C,PORT_STDZ180 + LD DE,PLT_STDZ180 + CP 27 ; RC2014 + JP Z,RTC_INIT2 +; ; Unknown platform LD DE,PLTERR ; BIOS error message @@ -1778,7 +1785,7 @@ PLT_RCZ280 .TEXT ", RCBus Z280 RTC Module Latch Port 0xC0\r\n$" PLT_MBC .TEXT ", MBC RTC Latch Port 0x70\r\n$" PLT_RPH .TEXT ", RHYOPHYRE RTC Latch Port 0x84\r\n$" PLT_DUO .TEXT ", DUODYNE RTC Latch Port 0x70\r\n$" -PLT_STDZ180 .TEXT ", STD Z180 RTC Module latch port 0x84\r\n$" +PLT_STDZ180 .TEXT ", STD Z180 RTC Module latch port 0x84\r\n$" ; ; Generic FOR-NEXT loop algorithm diff --git a/Source/Doc/Hardware.md b/Source/Doc/Hardware.md index cbe0f9f9..7d6c6883 100644 --- a/Source/Doc/Hardware.md +++ b/Source/Doc/Hardware.md @@ -2616,6 +2616,7 @@ Note: | KIO | Zilog Serial/ Parallel Counter/Timer (Z84C90) | | PPP | ParPortProp Host Interface Controller | | PRP | PropIO Host Interface Controller | +| SCTIM | SC737 50Hz System Timer | # UNA Hardware BIOS diff --git a/Source/HBIOS/Config/EPITX_std.asm b/Source/HBIOS/Config/EPITX_std.asm index 892aeafa..54b8eb1f 100644 --- a/Source/HBIOS/Config/EPITX_std.asm +++ b/Source/HBIOS/Config/EPITX_std.asm @@ -76,6 +76,7 @@ IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) ; SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY ; PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/Config/EZZ80_easy_std.asm b/Source/HBIOS/Config/EZZ80_easy_std.asm index f9f87ca2..3a67a458 100644 --- a/Source/HBIOS/Config/EZZ80_easy_std.asm +++ b/Source/HBIOS/Config/EZZ80_easy_std.asm @@ -56,9 +56,6 @@ CPUOSC .SET 10000000 ; CPU OSC FREQ IN MHZ INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280) ; CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT -CTCTIMER .SET TRUE ; ENABLE CTC PERIODIC TIMER -CTCMODE .SET CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] -CTCOSC .SET 921600 ; CTC CLOCK FREQUENCY WDOGMODE .SET WDOG_EZZ80 ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ] ; FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS @@ -68,18 +65,16 @@ CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) -SIO0MODE .SET SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] +SIO0MODE .SET SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R] +SIO0BASE .SET $80 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .SET 1843200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCLK .SET 1843200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1ACLK .SET 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1BCLK .SET 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] diff --git a/Source/HBIOS/Config/EZZ80_tiny_std.asm b/Source/HBIOS/Config/EZZ80_tiny_std.asm index 8208ad82..573edb12 100644 --- a/Source/HBIOS/Config/EZZ80_tiny_std.asm +++ b/Source/HBIOS/Config/EZZ80_tiny_std.asm @@ -57,12 +57,8 @@ INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280) ; CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT CTCBASE .SET $10 ; CTC BASE I/O ADDRESS -CTCTIMER .SET TRUE ; ENABLE CTC PERIODIC TIMER -CTCMODE .SET CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] -CTCOSC .SET 921600 ; CTC CLOCK FREQUENCY EIPCENABLE .SET TRUE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION WDOGMODE .SET WDOG_EZZ80 ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ] -WDOGIO .SET $6F ; WATCHDOG REGISTER ADR ; FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES @@ -73,7 +69,6 @@ CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) @@ -84,8 +79,6 @@ SIO0MODE .SET SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R] SIO0BASE .SET $18 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .SET 1843200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCLK .SET 1843200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1ACLK .SET 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1BCLK .SET 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] diff --git a/Source/HBIOS/Config/GMZ180_std.asm b/Source/HBIOS/Config/GMZ180_std.asm index 3c33fe8a..5cd13389 100644 --- a/Source/HBIOS/Config/GMZ180_std.asm +++ b/Source/HBIOS/Config/GMZ180_std.asm @@ -82,8 +82,6 @@ FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3 IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) -SDMODE .SET SDMODE_GM ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] -SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY ; PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER diff --git a/Source/HBIOS/Config/MK4_std.asm b/Source/HBIOS/Config/MK4_std.asm index 26ecc1a6..b284be78 100644 --- a/Source/HBIOS/Config/MK4_std.asm +++ b/Source/HBIOS/Config/MK4_std.asm @@ -83,6 +83,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] +SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY ; PRPENABLE .SET TRUE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) ; diff --git a/Source/HBIOS/Config/N8_std.asm b/Source/HBIOS/Config/N8_std.asm index b916e3fe..a123b837 100644 --- a/Source/HBIOS/Config/N8_std.asm +++ b/Source/HBIOS/Config/N8_std.asm @@ -47,6 +47,8 @@ ; #INCLUDE "cfg_N8.asm" ; +BATCOND .SET FALSE ; ENABLE LOW BATTERY WARNING MESSAGE +; BOOT_TIMEOUT .SET -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE BOOT_PRETTY .SET FALSE ; BOOT WITH PRETTY PLATFORM NAME AUTOCON .SET TRUE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT @@ -72,15 +74,19 @@ INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) ; +VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) +CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) +TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 +VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) ; FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDCNT .SET 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2) FD0TYPE .SET FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] FD1TYPE .SET FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] ; +IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) -; SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] ; diff --git a/Source/HBIOS/Config/RC2014_std.asm b/Source/HBIOS/Config/RC2014_std.asm index d44683c7..dd99fd00 100644 --- a/Source/HBIOS/Config/RC2014_std.asm +++ b/Source/HBIOS/Config/RC2014_std.asm @@ -55,6 +55,7 @@ CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ ; KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER ; FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES @@ -63,7 +64,6 @@ CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) @@ -87,15 +87,11 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) ; PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) ; -SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY ; CHENABLE .SET TRUE ; CH: ENABLE CH375/376 USB SUPPORT -CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER -CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) -CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) -CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED ; PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) ; @@ -105,6 +101,14 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER ; AY38910ENABLE .SET TRUE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/Config/RCEZ80_std.asm b/Source/HBIOS/Config/RCEZ80_std.asm index f57a0e68..52173c93 100644 --- a/Source/HBIOS/Config/RCEZ80_std.asm +++ b/Source/HBIOS/Config/RCEZ80_std.asm @@ -68,7 +68,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) ; PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) ; -SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY ; diff --git a/Source/HBIOS/Config/RCZ180_ext_std.asm b/Source/HBIOS/Config/RCZ180_ext_std.asm index c5a75c8f..572284da 100644 --- a/Source/HBIOS/Config/RCZ180_ext_std.asm +++ b/Source/HBIOS/Config/RCZ180_ext_std.asm @@ -66,20 +66,20 @@ CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) ; FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] @@ -104,6 +104,14 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/Config/RCZ180_nat_std.asm b/Source/HBIOS/Config/RCZ180_nat_std.asm index d6fcbc82..a2b7b30c 100644 --- a/Source/HBIOS/Config/RCZ180_nat_std.asm +++ b/Source/HBIOS/Config/RCZ180_nat_std.asm @@ -66,20 +66,20 @@ CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) ; FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] @@ -104,7 +104,13 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; -SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] diff --git a/Source/HBIOS/Config/RCZ180_z1rcc_std.asm b/Source/HBIOS/Config/RCZ180_z1rcc_std.asm index c0dfb5da..dafd5a41 100644 --- a/Source/HBIOS/Config/RCZ180_z1rcc_std.asm +++ b/Source/HBIOS/Config/RCZ180_z1rcc_std.asm @@ -70,20 +70,20 @@ CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) ; MDROM .SET FALSE ; MD: ENABLE ROM DISK MDRAM .SET TRUE ; MD: ENABLE RAM DISK @@ -111,7 +111,13 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; -SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] diff --git a/Source/HBIOS/Config/RCZ280_ext_std.asm b/Source/HBIOS/Config/RCZ280_ext_std.asm index 686780f7..d58bef05 100644 --- a/Source/HBIOS/Config/RCZ280_ext_std.asm +++ b/Source/HBIOS/Config/RCZ280_ext_std.asm @@ -63,18 +63,16 @@ Z280_INTWAIT .SET 0 ; Z280: INT ACK WAIT STATUS (0-3) ; FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES -LCDENABLE .SET TRUE ; ENABLE LCD DISPLAY +LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) Z2UENABLE .SET TRUE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM) -ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) @@ -106,6 +104,14 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/Config/RCZ280_nat_std.asm b/Source/HBIOS/Config/RCZ280_nat_std.asm index e7dfa2a0..17395b22 100644 --- a/Source/HBIOS/Config/RCZ280_nat_std.asm +++ b/Source/HBIOS/Config/RCZ280_nat_std.asm @@ -63,18 +63,16 @@ Z280_INTWAIT .SET 0 ; Z280: INT ACK WAIT STATUS (0-3) ; FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES -LCDENABLE .SET TRUE ; ENABLE LCD DISPLAY +LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) Z2UENABLE .SET TRUE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM) -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) @@ -106,6 +104,14 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/Config/RCZ280_zz80mb_std.asm b/Source/HBIOS/Config/RCZ280_zz80mb_std.asm index cb8cce6d..32c7c61a 100644 --- a/Source/HBIOS/Config/RCZ280_zz80mb_std.asm +++ b/Source/HBIOS/Config/RCZ280_zz80mb_std.asm @@ -66,19 +66,17 @@ Z280_INTWAIT .SET 0 ; Z280: INT ACK WAIT STATUS (0-3) ; FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES -LCDENABLE .SET TRUE ; ENABLE LCD DISPLAY +LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) Z2UENABLE .SET TRUE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM) Z2U0HFC .SET TRUE ; Z2U 0: ENABLE HARDWARE FLOW CONTROL -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) @@ -96,7 +94,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) ; PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) ; -SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY ; @@ -110,6 +108,14 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/Config/RCZ280_zzrcc_ram_std.asm b/Source/HBIOS/Config/RCZ280_zzrcc_ram_std.asm index 00adca77..2ef401a7 100644 --- a/Source/HBIOS/Config/RCZ280_zzrcc_ram_std.asm +++ b/Source/HBIOS/Config/RCZ280_zzrcc_ram_std.asm @@ -69,12 +69,11 @@ Z280_INTWAIT .SET 0 ; Z280: INT ACK WAIT STATUS (0-3) ; FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES -LCDENABLE .SET TRUE ; ENABLE LCD DISPLAY +LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) @@ -82,7 +81,6 @@ UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) Z2UENABLE .SET TRUE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM) Z2UOSC .SET (CPUOSC / 16) ; Z2U: OSC FREQUENCY IN MHZ Z2U0HFC .SET TRUE ; Z2U0: ENABLE HARDWARE FLOW CONTROL -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) @@ -103,7 +101,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) ; PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) ; -SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY ; @@ -117,6 +115,14 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/Config/RCZ280_zzrcc_std.asm b/Source/HBIOS/Config/RCZ280_zzrcc_std.asm index e85169d6..48ade3d5 100644 --- a/Source/HBIOS/Config/RCZ280_zzrcc_std.asm +++ b/Source/HBIOS/Config/RCZ280_zzrcc_std.asm @@ -69,12 +69,11 @@ Z280_INTWAIT .SET 0 ; Z280: INT ACK WAIT STATUS (0-3) ; FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES -LCDENABLE .SET TRUE ; ENABLE LCD DISPLAY +LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) @@ -82,7 +81,6 @@ UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) Z2UENABLE .SET TRUE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM) Z2UOSC .SET (CPUOSC / 16) ; Z2U: OSC FREQUENCY IN MHZ Z2U0HFC .SET TRUE ; Z2U0: ENABLE HARDWARE FLOW CONTROL -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) @@ -103,7 +101,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) ; PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) ; -SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY ; @@ -117,6 +115,14 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/Config/RCZ80_coleco_std.asm b/Source/HBIOS/Config/RCZ80_coleco_std.asm index aedcc967..96220e8c 100644 --- a/Source/HBIOS/Config/RCZ80_coleco_std.asm +++ b/Source/HBIOS/Config/RCZ80_coleco_std.asm @@ -67,22 +67,68 @@ ; #INCLUDE "Config/RCZ80_std.asm" ; +BOOT_TIMEOUT .SET -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE +BOOT_PRETTY .SET FALSE ; BOOT WITH PRETTY PLATFORM NAME +AUTOCON .SET TRUE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT +; CPUOSC .SET 3686400 ; CPU OSC FREQ IN MHZ INTMODE .SET 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280) ; +KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT +CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT +; +FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS +FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES +LCDENABLE .SET TRUE ; ENABLE LCD DISPLAY +CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP +VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD +; +DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) +INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) +; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIOCNT .SET 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIO0BCLK .SET 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) ; TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) TMSMODE .SET TMSMODE_COLECO ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) ; -PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) +FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) +FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] +FD0TYPE .SET FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] +FD1TYPE .SET FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] +; +IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) +; +PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) +; +SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] +SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY +; +CHENABLE .SET TRUE ; CH: ENABLE CH375/376 USB SUPPORT +; +PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) +; +LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM) +; +PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) +IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) +SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) +; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT ; SN76489ENABLE .SET TRUE ; SN: ENABLE SN76489 SOUND DRIVER ; diff --git a/Source/HBIOS/Config/RCZ80_ez512_std.asm b/Source/HBIOS/Config/RCZ80_ez512_std.asm index ba786e27..5d22f599 100644 --- a/Source/HBIOS/Config/RCZ80_ez512_std.asm +++ b/Source/HBIOS/Config/RCZ80_ez512_std.asm @@ -42,7 +42,7 @@ ; ".SET" TO OVERRIDE SETTINGS. THE ASSEMBLER WILL ERROR IF YOU ATTEMPT ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU". ; -#DEFINE PLATFORM_NAME "EaZy80-512", " [", CONFIG, "]" +#DEFINE PLATFORM_NAME "EaZy80-512", " [", CONFIG, "]" ; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES #DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED #DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION ; @@ -55,63 +55,46 @@ AUTOCON .SET TRUE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT CPUOSC .SET 22000000 ; CPU OSC FREQ IN MHZ INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280) ; +RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) +ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) +MEMMGR .SET MM_EZ512 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512] +; KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT KIOBASE .SET $00 ; KIO BASE I/O ADDRESS +; CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT CTCBASE .SET KIOBASE+$04 ; CTC BASE I/O ADDRESS CTCOSC .SET 1843200 ; CTC CLOCK FREQUENCY ; -RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) -ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) -MEMMGR .SET MM_EZ512 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512] -; -FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS -FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES -LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; -DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) -; SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIOCNT .SET 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIO0MODE .SET SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R] SIO0BASE .SET KIOBASE+$08 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .SET CTCOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCLK .SET CTCOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) -VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) ; MDROM .SET FALSE ; MD: ENABLE ROM DISK ; -IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -; -PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) -; SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_EZ512 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] -SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY ; -CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) ; -LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM) -; -PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) -IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) -SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) -; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/Config/RCZ80_k80w_std.asm b/Source/HBIOS/Config/RCZ80_k80w_std.asm index 3432e25a..8801d79f 100644 --- a/Source/HBIOS/Config/RCZ80_k80w_std.asm +++ b/Source/HBIOS/Config/RCZ80_k80w_std.asm @@ -42,32 +42,85 @@ ; ".SET" TO OVERRIDE SETTINGS. THE ASSEMBLER WILL ERROR IF YOU ATTEMPT ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU". ; +#DEFINE PLATFORM_NAME "K80W", " [", CONFIG, "]" ; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES #DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED #DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION ; -#INCLUDE "Config/RCZ80_std.asm" +#INCLUDE "cfg_RCZ80.asm" ; -INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280) +BOOT_TIMEOUT .SET -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE +BOOT_PRETTY .SET FALSE ; BOOT WITH PRETTY PLATFORM NAME +AUTOCON .SET TRUE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT ; CPUOSC .SET 22000000 ; CPU OSC FREQ IN MHZ +INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280) ; KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT +; CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT CTCBASE .SET KIOBASE+$04 ; CTC BASE I/O ADDRESS CTCOSC .SET 1843200 ; CTC CLOCK FREQUENCY ; -DSRTCMODE .SET DSRTCMODE_K80W ; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W] +FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS +FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES +LCDENABLE .SET TRUE ; ENABLE LCD DISPLAY +CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP +VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) +DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) +DSRTCMODE .SET DSRTCMODE_K80W ; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W] +INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; +DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) +UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) +SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIOCNT .SET 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIO0MODE .SET SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R] SIO0BASE .SET KIOBASE+$08 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .SET CTCOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCLK .SET CTCOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) ; +TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY] +TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 +TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) +EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) +; +FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) +FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] +FD0TYPE .SET FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] +FD1TYPE .SET FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] +; +IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) +; +PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) ; SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_K80W ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] -SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY +; +CHENABLE .SET TRUE ; CH: ENABLE CH375/376 USB SUPPORT +; +PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) +; +LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM) +; +PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) +IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) +SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) +; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; +SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER +; +AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER +AYMODE .SET AYMODE_RC2014 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] +AY_FORCE .SET FALSE ; AY: BYPASS AUTO-DETECT, FORCED PRESENT diff --git a/Source/HBIOS/Config/RCZ80_kio_std.asm b/Source/HBIOS/Config/RCZ80_kio_std.asm index 42809756..b2d2eba3 100644 --- a/Source/HBIOS/Config/RCZ80_kio_std.asm +++ b/Source/HBIOS/Config/RCZ80_kio_std.asm @@ -45,19 +45,34 @@ #DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED #DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION ; -#INCLUDE "Config/RCZ80_std.asm" +#INCLUDE "cfg_RCZ80.asm" ; +BOOT_TIMEOUT .SET -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE +BOOT_PRETTY .SET FALSE ; BOOT WITH PRETTY PLATFORM NAME +AUTOCON .SET TRUE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT +; +CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280) ; KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT +; CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT CTCBASE .SET KIOBASE+$04 ; CTC BASE I/O ADDRESS CTCTIMER .SET TRUE ; ENABLE CTC PERIODIC TIMER +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER ; -INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) +FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS +FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES +LCDENABLE .SET TRUE ; ENABLE LCD DISPLAY +CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP +VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) +DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) +INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; +DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) +UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) +SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIOCNT .SET 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIO0MODE .SET SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R] SIO0BASE .SET KIOBASE+$08 ; SIO 0: REGISTERS BASE ADR @@ -65,3 +80,49 @@ SIO0ACLK .SET 1843200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372 SIO0ACTCC .SET 0 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO0BCLK .SET 1843200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCTCC .SET 1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE +SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) +; +TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY] +TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 +TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) +VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) +EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) +; +FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) +FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] +FD0TYPE .SET FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] +FD1TYPE .SET FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] +; +IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) +; +PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) +; +SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] +SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY +; +CHENABLE .SET TRUE ; CH: ENABLE CH375/376 USB SUPPORT +; +PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) +; +LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM) +; +PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) +IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) +SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) +; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; +SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER +; +AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER +AYMODE .SET AYMODE_RC2014 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] +AY_FORCE .SET FALSE ; AY: BYPASS AUTO-DETECT, FORCED PRESENT diff --git a/Source/HBIOS/Config/RCZ80_skz_std.asm b/Source/HBIOS/Config/RCZ80_skz_std.asm index a4e1b41d..df1e3577 100644 --- a/Source/HBIOS/Config/RCZ80_skz_std.asm +++ b/Source/HBIOS/Config/RCZ80_skz_std.asm @@ -55,6 +55,7 @@ CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ ; KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER ; SKZENABLE .SET TRUE ; ENABLE SERGEY'S Z80-512K FEATURES SKZDIV .SET DIV_12 ; UART CLK (CLK2) DIVIDER FOR Z80-512K @@ -69,7 +70,6 @@ CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) @@ -78,13 +78,15 @@ ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIO0BCLK .SET CPUOSC / 12 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCFG .SET SER_38400_8N1 ; SIO 0B: SERIAL LINE CONFIG +SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) ; FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] @@ -109,6 +111,14 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/Config/RCZ80_std.asm b/Source/HBIOS/Config/RCZ80_std.asm index 3404bd30..ab2c4477 100644 --- a/Source/HBIOS/Config/RCZ80_std.asm +++ b/Source/HBIOS/Config/RCZ80_std.asm @@ -55,6 +55,7 @@ CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ ; KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER ; FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES @@ -63,7 +64,6 @@ CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) @@ -78,6 +78,7 @@ TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) ; FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] @@ -93,10 +94,6 @@ SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4 SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY ; CHENABLE .SET TRUE ; CH: ENABLE CH375/376 USB SUPPORT -CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER -CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) -CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) -CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED ; PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) ; @@ -106,6 +103,14 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/Config/RCZ80_zrc512_std.asm b/Source/HBIOS/Config/RCZ80_zrc512_std.asm index db5bed0a..a23a4afe 100644 --- a/Source/HBIOS/Config/RCZ80_zrc512_std.asm +++ b/Source/HBIOS/Config/RCZ80_zrc512_std.asm @@ -43,7 +43,6 @@ ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU". ; #DEFINE PLATFORM_NAME "ZRC512", " [", CONFIG, "]" -; #DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED #DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION ; @@ -57,6 +56,7 @@ CPUOSC .SET 22000000 ; CPU OSC FREQ IN MHZ ; KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER ; RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) @@ -69,20 +69,21 @@ CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) ; MDROM .SET FALSE ; MD: ENABLE ROM DISK ; @@ -109,6 +110,14 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/Config/RCZ80_zrc_ram_std.asm b/Source/HBIOS/Config/RCZ80_zrc_ram_std.asm index a80190fe..912c693e 100644 --- a/Source/HBIOS/Config/RCZ80_zrc_ram_std.asm +++ b/Source/HBIOS/Config/RCZ80_zrc_ram_std.asm @@ -43,7 +43,6 @@ ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU". ; #DEFINE PLATFORM_NAME "ZRC", " [", CONFIG, "]" -; #DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED #DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION ; @@ -57,6 +56,7 @@ CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ ; KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER ; RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) @@ -69,13 +69,13 @@ CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] @@ -83,6 +83,7 @@ TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) ; MDROM .SET FALSE ; MD: ENABLE ROM DISK ; @@ -109,6 +110,14 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/Config/RCZ80_zrc_std.asm b/Source/HBIOS/Config/RCZ80_zrc_std.asm index d13669a2..b3fb6286 100644 --- a/Source/HBIOS/Config/RCZ80_zrc_std.asm +++ b/Source/HBIOS/Config/RCZ80_zrc_std.asm @@ -43,7 +43,6 @@ ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU". ; #DEFINE PLATFORM_NAME "ZRC", " [", CONFIG, "]" -; #DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED #DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION ; @@ -57,6 +56,7 @@ CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ ; KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER ; RAMSIZE .SET 1536 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) @@ -69,20 +69,21 @@ CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) ; FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] @@ -107,6 +108,14 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/Config/SCZ180_sc126_std.asm b/Source/HBIOS/Config/SCZ180_sc126_std.asm index 9d831444..2b629490 100644 --- a/Source/HBIOS/Config/SCZ180_sc126_std.asm +++ b/Source/HBIOS/Config/SCZ180_sc126_std.asm @@ -72,14 +72,15 @@ INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) ; FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] @@ -91,6 +92,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) ; SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY ; CHENABLE .SET TRUE ; CH: ENABLE CH375/376 USB SUPPORT @@ -103,7 +105,13 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; -SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] diff --git a/Source/HBIOS/Config/SCZ180_sc130_std.asm b/Source/HBIOS/Config/SCZ180_sc130_std.asm index ae6d8e74..b8d3dfe8 100644 --- a/Source/HBIOS/Config/SCZ180_sc130_std.asm +++ b/Source/HBIOS/Config/SCZ180_sc130_std.asm @@ -72,14 +72,15 @@ INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) ; FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] @@ -91,6 +92,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) ; SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY ; CHENABLE .SET TRUE ; CH: ENABLE CH375/376 USB SUPPORT @@ -103,8 +105,14 @@ PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) ; -SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER -AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] +AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC] AY_FORCE .SET FALSE ; AY: BYPASS AUTO-DETECT, FORCED PRESENT diff --git a/Source/HBIOS/Config/SCZ180_sc131_std.asm b/Source/HBIOS/Config/SCZ180_sc131_std.asm index 6089cac5..7bff9457 100644 --- a/Source/HBIOS/Config/SCZ180_sc131_std.asm +++ b/Source/HBIOS/Config/SCZ180_sc131_std.asm @@ -67,17 +67,8 @@ LEDMODE .SET LEDMODE_SC ; LEDMODE_[STD|SC|RTC|NABU] CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; -DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; -DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) -UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) -SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) ; -IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) -SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY -CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT diff --git a/Source/HBIOS/Config/SCZ180_sc140_std.asm b/Source/HBIOS/Config/SCZ180_sc140_std.asm index feb5193d..84d61e1b 100644 --- a/Source/HBIOS/Config/SCZ180_sc140_std.asm +++ b/Source/HBIOS/Config/SCZ180_sc140_std.asm @@ -49,6 +49,10 @@ ; #INCLUDE "cfg_SCZ180.asm" ; +BOOT_TIMEOUT .SET -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE +BOOT_PRETTY .SET FALSE ; BOOT WITH PRETTY PLATFORM NAME +AUTOCON .SET TRUE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT +; CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ ; Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2 @@ -59,33 +63,16 @@ FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS FPLED_IO .SET $A0 ; FP: PORT ADDRESS FOR FP LEDS FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES FPSW_IO .SET $A0 ; FP: PORT ADDRESS FOR FP SWITCHES -; LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED) ; -LCDENABLE .SET FALSE ; DISABLE LCD DISPLAY -; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; -UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) ; -FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) -FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] -; IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) IDE0BASE .SET $90 ; IDE 0: IO BASE ADDRESS ; -PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) -; SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) -SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY -; -PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) -; -SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER -AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER -AYMODE .SET AYMODE_LINC ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC] -AY_FORCE .SET FALSE ; AY: BYPASS AUTO-DETECT, FORCED PRESENT +SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY diff --git a/Source/HBIOS/Config/SCZ180_sc503_std.asm b/Source/HBIOS/Config/SCZ180_sc503_std.asm index 96b3dd80..e94716c0 100644 --- a/Source/HBIOS/Config/SCZ180_sc503_std.asm +++ b/Source/HBIOS/Config/SCZ180_sc503_std.asm @@ -49,6 +49,10 @@ ; #INCLUDE "cfg_SCZ180.asm" ; +BOOT_TIMEOUT .SET -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE +BOOT_PRETTY .SET FALSE ; BOOT WITH PRETTY PLATFORM NAME +AUTOCON .SET TRUE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT +; CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ ; Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2 @@ -59,34 +63,16 @@ FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS FPLED_IO .SET $A0 ; FP: PORT ADDRESS FOR FP LEDS FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES FPSW_IO .SET $A0 ; FP: PORT ADDRESS FOR FP SWITCHES -; -LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED) -; -LCDENABLE .SET FALSE ; DISABLE LCD DISPLAY +LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED) ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; -UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) ; -FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) -FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] -; -; IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) IDE0BASE .SET $90 ; IDE 0: IO BASE ADDRESS ; -PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) -; SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY -; -PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) -; -SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER -AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER -AYMODE .SET AYMODE_LINC ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU] -AY_FORCE .SET FALSE ; AY: BYPASS AUTO-DETECT, FORCED PRESENT diff --git a/Source/HBIOS/Config/SCZ180_sc700_std.asm b/Source/HBIOS/Config/SCZ180_sc700_std.asm index deff9d47..0d384d66 100644 --- a/Source/HBIOS/Config/SCZ180_sc700_std.asm +++ b/Source/HBIOS/Config/SCZ180_sc700_std.asm @@ -49,6 +49,10 @@ ; #INCLUDE "cfg_SCZ180.asm" ; +BOOT_TIMEOUT .SET -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE +BOOT_PRETTY .SET FALSE ; BOOT WITH PRETTY PLATFORM NAME +AUTOCON .SET TRUE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT +; CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ ; Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2 @@ -56,37 +60,58 @@ Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3) Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3) ; FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS -FPLED_IO .SET $00 ; FP: PORT ADDRESS FOR FP LEDS +LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED) -VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP +VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; +DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) -ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) ; TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] +TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 -TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) +VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) +XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) ; FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) -FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC] +FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] +FD0TYPE .SET FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] +FD1TYPE .SET FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] ; IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) ; PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) ; SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY ; +CHENABLE .SET TRUE ; CH: ENABLE CH375/376 USB SUPPORT +; PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) -SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER +; +LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM) +; +PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) +IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) +SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) +; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU|N8PC] AY_FORCE .SET FALSE ; AY: BYPASS AUTO-DETECT, FORCED PRESENT diff --git a/Source/HBIOS/Config/ZETA2_std.asm b/Source/HBIOS/Config/ZETA2_std.asm index 8d4c5468..b9df004e 100644 --- a/Source/HBIOS/Config/ZETA2_std.asm +++ b/Source/HBIOS/Config/ZETA2_std.asm @@ -52,9 +52,12 @@ BOOT_PRETTY .SET FALSE ; BOOT WITH PRETTY PLATFORM NAME AUTOCON .SET TRUE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT ; CPUOSC .SET 8000000 ; CPU OSC FREQ IN MHZ -INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2 +INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280) +; CRTACT .SET TRUE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP ; +DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) +; FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_ZETA2 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] FD0TYPE .SET FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] diff --git a/Source/HBIOS/Config/ZETA_std.asm b/Source/HBIOS/Config/ZETA_std.asm index 885d02b1..afd63357 100644 --- a/Source/HBIOS/Config/ZETA_std.asm +++ b/Source/HBIOS/Config/ZETA_std.asm @@ -56,6 +56,8 @@ INTMODE .SET 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280) ; CRTACT .SET TRUE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP ; +DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) +; FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_ZETA ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] FD0TYPE .SET FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] diff --git a/Source/HBIOS/cfg_DUO.asm b/Source/HBIOS/cfg_DUO.asm index ebf7acf5..99c9a6f0 100644 --- a/Source/HBIOS/cfg_DUO.asm +++ b/Source/HBIOS/cfg_DUO.asm @@ -97,6 +97,8 @@ CTCPRECH .SET 2 ; PRESCALE CHANNEL (0-3) CTCTIMCH .SET 3 ; TIMER CHANNEL (0-3) CTCOSC .SET (7372800/8) ; CTC CLOCK FREQUENCY ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER PCFBASE .SET $56 ; PCF8584 BASE I/O ADDRESS PCFCLK .SET PCFCLK_12 ; PCF CLOCK BASE: PCFCLK_[3|443|6|8|12] @@ -389,6 +391,8 @@ PIOSBASE .SET $60 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_DYNO.asm b/Source/HBIOS/cfg_DYNO.asm index c5964ed8..a331d983 100644 --- a/Source/HBIOS/cfg_DYNO.asm +++ b/Source/HBIOS/cfg_DYNO.asm @@ -99,6 +99,8 @@ CTCDEBUG .SET FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .SET $88 ; CTC BASE I/O ADDRESS CTCTIMER .SET FALSE ; ENABLE CTC PERIODIC TIMER ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -330,12 +332,6 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER ; SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) -SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] -SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE -SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY -SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE -SDMTSWAP .SET FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 ; CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT ; @@ -370,6 +366,8 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_EPITX.asm b/Source/HBIOS/cfg_EPITX.asm index 82137238..feb67ef3 100644 --- a/Source/HBIOS/cfg_EPITX.asm +++ b/Source/HBIOS/cfg_EPITX.asm @@ -94,6 +94,8 @@ CTCDEBUG .SET FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .SET $88 ; CTC BASE I/O ADDRESS CTCTIMER .SET FALSE ; ENABLE CTC PERIODIC TIMER ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -269,6 +271,8 @@ SCONENABLE .SET FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) TVGAENABLE .SET FALSE ; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM) XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) +XOS_BASE .SET $A0 ; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES) +XOSSIZ .SET V80X30 ; XOSERA: DISPLAY FORMAT [V80X30|V80X60] ; MDENABLE .SET TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDROM .SET TRUE ; MD: ENABLE ROM DISK @@ -396,6 +400,8 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_EZZ80.asm b/Source/HBIOS/cfg_EZZ80.asm index e4f4a297..904f8486 100644 --- a/Source/HBIOS/cfg_EZZ80.asm +++ b/Source/HBIOS/cfg_EZZ80.asm @@ -90,12 +90,15 @@ KIOBASE .SET $80 ; KIO BASE I/O ADDRESS CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT CTCDEBUG .SET FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .SET $88 ; CTC BASE I/O ADDRESS -CTCTIMER .SET FALSE ; ENABLE CTC PERIODIC TIMER -CTCMODE .SET CTCMODE_TIM16 ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] +CTCTIMER .SET TRUE ; ENABLE CTC PERIODIC TIMER +CTCMODE .SET CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] CTCPRE .SET 256 ; PRESCALE CONSTANT (1-256) CTCPRECH .SET 2 ; PRESCALE CHANNEL (0-3) CTCTIMCH .SET 3 ; TIMER CHANNEL (0-3) -CTCOSC .SET CPUOSC ; CTC CLOCK FREQUENCY +CTCOSC .SET 921600 ; CTC CLOCK FREQUENCY +; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +SCTIMIO .SET $0F ; SC737: PORT ADDRESS ; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; @@ -104,7 +107,7 @@ EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION SKZENABLE .SET FALSE ; ENABLE SERGEY'S Z80-512K FEATURES SKZDIV .SET DIV_1 ; UART CLK (CLK2) DIVIDER FOR Z80-512K ; -WDOGMODE .SET WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ] +WDOGMODE .SET WDOG_EZZ80 ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ] WDOGIO .SET $6F ; WATCHDOG REGISTER ADR ; FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS @@ -119,7 +122,7 @@ DIAGLVL .SET DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .SET FALSE ; ENABLES STATUS LED (SINGLE LED) LEDMODE .SET LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU] -LEDPORT .SET $0E ; STATUS LED PORT ADDRESS +LEDPORT .SET $6E ; STATUS LED PORT ADDRESS LEDDISKIO .SET TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; DSKYENABLE .SET FALSE ; ENABLES DSKY FUNCTIONALITY @@ -147,7 +150,7 @@ KBDKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] KBDINTS .SET FALSE ; ENABLE KBD (PS2) KEYBOARD INTERRUPTS ; -DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) +DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .SET DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W] DSRTCCHG .SET FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; @@ -242,14 +245,14 @@ ACIA1CFG .SET DEFSERCFG ; ACIA 1: SERIAL LINE CONFIG (SEE STD.ASM) SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIODEBUG .SET FALSE ; SIO: ENABLE DEBUG OUTPUT SIOBOOT .SET 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED) -SIOCNT .SET 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP +SIOCNT .SET 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIOINTS .SET TRUE ; SIO: INCLUDE SIO INTERRUPT SUPPORT UNDER IM1/2/3 -SIO0MODE .SET SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R] +SIO0MODE .SET SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R] SIO0BASE .SET $80 ; SIO 0: REGISTERS BASE ADR -SIO0ACLK .SET CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SIO0ACLK .SET 1843200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0ACFG .SET DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG SIO0ACTCC .SET -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE -SIO0BCLK .SET CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SIO0BCLK .SET 1843200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCFG .SET DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG SIO0BCTCC .SET -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO1MODE .SET SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R] @@ -262,6 +265,27 @@ SIO1BCFG .SET DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG SIO1BCTCC .SET -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE ; SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) +SCCDEBUG .SET FALSE ; SCC: ENABLE DEBUG OUTPUT +SCCBOOT .SET 0 ; SCC: REBOOT ON RCV CHAR (0=DISABLED) +SCCCNT .SET 1 ; SCC: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP +SCCINTS .SET TRUE ; SCC: INCLUDE SCC INTERRUPT SUPPORT UNDER IM1/2/3 +SCCPCLK .SET TRUE ; SCC: USE PROCESSOR CLOCK AS BAUD CLOCK +SCC0MODE .SET SCCMODE_SZ80 ; SCC 0: CHIP TYPE: SCCMODE_[STD|SZ80] +SCC0BASE .SET $A0 ; SCC 0: REGISTERS BASE ADR +SCC0ACLK .SET CPUOSC ; SCC 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SCC0ACFG .SET DEFSERCFG ; SCC 0A: SERIAL LINE CONFIG +SCC0ACTCC .SET -1 ; SCC 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE +SCC0BCLK .SET CPUOSC ; SCC 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SCC0BCFG .SET DEFSERCFG ; SCC 0B: SERIAL LINE CONFIG +SCC0BCTCC .SET -1 ; SCC 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE +SCC1MODE .SET SCCMODE_SZ80 ; SCC 1: CHIP TYPE: SIOMODE_[STD|SZ80] +SCC1BASE .SET $FF ; SCC 1: REGISTERS BASE ADR +SCC1ACLK .SET CPUOSC ; SCC 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SCC1ACFG .SET DEFSERCFG ; SCC 1A: SERIAL LINE CONFIG +SCC1ACTCC .SET -1 ; SCC 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE +SCC1BCLK .SET CPUOSC ; SCC 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SCC1BCFG .SET DEFSERCFG ; SCC 1B: SERIAL LINE CONFIG +SCC1BCTCC .SET -1 ; SCC 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE ; XIOCFG .SET DEFSERCFG ; XIO: SERIAL LINE CONFIG ; @@ -278,6 +302,8 @@ SCONENABLE .SET FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) TVGAENABLE .SET FALSE ; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM) XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) +XOS_BASE .SET $A0 ; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES) +XOSSIZ .SET V80X30 ; XOSERA: DISPLAY FORMAT [V80X30|V80X60] ; MDENABLE .SET TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDROM .SET TRUE ; MD: ENABLE ROM DISK @@ -337,7 +363,7 @@ PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE -SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY +SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDMTSWAP .SET FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 @@ -355,6 +381,9 @@ CH1USBENABLE .SET TRUE ; CH 1: ENABLE USB DISK CH1SDENABLE .SET FALSE ; CH 1: ENABLE SD DISK ; PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) +PRPSDENABLE .SET TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT +PRPSDTRACE .SET 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +PRPCONENABLE .SET TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT ; PPPENABLE .SET FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM) ; @@ -405,6 +434,15 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE) +CHNATIVEEZ80 .SET FALSE ; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_GMZ180.asm b/Source/HBIOS/cfg_GMZ180.asm index ec279244..dc1a802f 100644 --- a/Source/HBIOS/cfg_GMZ180.asm +++ b/Source/HBIOS/cfg_GMZ180.asm @@ -93,6 +93,8 @@ CTCDEBUG .SET FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .SET $88 ; CTC BASE I/O ADDRESS CTCTIMER .SET FALSE ; ENABLE CTC PERIODIC TIMER ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -395,6 +397,8 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_HEATH.asm b/Source/HBIOS/cfg_HEATH.asm index 91fde7da..cbec333f 100644 --- a/Source/HBIOS/cfg_HEATH.asm +++ b/Source/HBIOS/cfg_HEATH.asm @@ -97,6 +97,8 @@ CTCPRECH .SET 2 ; PRESCALE CHANNEL (0-3) CTCTIMCH .SET 3 ; TIMER CHANNEL (0-3) CTCOSC .SET CPUOSC ; CTC CLOCK FREQUENCY ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -335,12 +337,6 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER ; SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) -SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] -SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE -SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY -SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE -SDMTSWAP .SET FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 ; CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT ; @@ -395,6 +391,8 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_MASTER.asm b/Source/HBIOS/cfg_MASTER.asm index 57043819..cee14cb0 100644 --- a/Source/HBIOS/cfg_MASTER.asm +++ b/Source/HBIOS/cfg_MASTER.asm @@ -130,6 +130,9 @@ CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3) CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3) CTCOSC .EQU 614400 ; CTC CLOCK FREQUENCY ; +SCTIMENABLE .EQU FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +SCTIMIO .EQU $0F ; SC737: PORT ADDRESS +; PCFENABLE .EQU FALSE ; ENABLE PCF8584 I2C CONTROLLER PCFBASE .EQU $F0 ; PCF8584 BASE I/O ADDRESS PCFCLK .EQU PCFCLK_12 ; PCF CLOCK BASE: PCFCLK_[3|443|6|8|12] @@ -360,7 +363,7 @@ SCONENABLE .EQU FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM) EFENABLE .EQU FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) TVGAENABLE .EQU FALSE ; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM) XOSENABLE .EQU FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) -XOS_BASE .EQU $20 ; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES) +XOS_BASE .EQU $A0 ; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES) XOSSIZ .EQU V80X30 ; XOSERA: DISPLAY FORMAT [V80X30|V80X60] ; MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) @@ -520,6 +523,15 @@ PIOSBASE .EQU $60 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .EQU $0C ; UF: REGISTERS BASE ADR ; +CHNATIVEENABLE .EQU FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .EQU FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .EQU FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .EQU FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE) +CHNATIVEEZ80 .EQU FALSE ; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE +_CH376_DATA_PORT .EQU $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .EQU $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .EQU $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .EQU FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .EQU SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER @@ -572,13 +584,3 @@ EZ80_WSMD_TYP .EQU EZ80WSMD_CALC ; BUS WAIT STATE CONFIG: EZ80WSMD_[CALC|CYCLES] EZ80_FLSH_WS .EQU 1 ; WAIT STATES FOR ON CHIP FLASH (0-7) EZ80_FLSH_MIN_NS .EQU 60 ; MINIMUM WAIT STATES TO APPLY TO ON-CHIP FLASH, IF EZ80_WSMD_TYP = EZ80WSMD_CALC EZ80_FWSMD_TYP .EQU EZ80WSMD_CALC ; WAIT STATE TYPE: EZ80RMMD_[CALC|WAIT] (CYCLES NOT ALLOWED) - -CHNATIVEENABLE .EQU FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER -CHSCSIENABLE .EQU FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) -CHUFIENABLE .EQU FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) -CHNATIVEFORCE .EQU FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE) -CHNATIVEEZ80 .EQU FALSE ; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE - -_CH376_DATA_PORT .EQU $FF88 ; CH376: DATA PORT -_CH376_COMMAND_PORT .EQU $FF89 ; CH376: COMMAND PORT -_USB_MODULE_LEDS .EQU $FF8A ; CH376: LED CONTROL PORT diff --git a/Source/HBIOS/cfg_MBC.asm b/Source/HBIOS/cfg_MBC.asm index 303f71db..9ec39a1a 100644 --- a/Source/HBIOS/cfg_MBC.asm +++ b/Source/HBIOS/cfg_MBC.asm @@ -94,6 +94,8 @@ CTCPRECH .SET 2 ; PRESCALE CHANNEL (0-3) CTCTIMCH .SET 3 ; TIMER CHANNEL (0-3) CTCOSC .SET (4915200/8) ; CTC CLOCK FREQUENCY ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -378,6 +380,8 @@ PIOSBASE .SET $60 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .SET $0C ; UF: REGISTERS BASE ADR ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_MK4.asm b/Source/HBIOS/cfg_MK4.asm index 0e6ab5de..69993471 100644 --- a/Source/HBIOS/cfg_MK4.asm +++ b/Source/HBIOS/cfg_MK4.asm @@ -45,7 +45,7 @@ #DEFINE PLATFORM_NAME "Mark IV", " [", CONFIG, "]" ; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES #DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE #DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED -#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION +#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION ; #INCLUDE "cfg_MASTER.asm" ; @@ -92,12 +92,10 @@ MK4_RTC .SET $8A ; MK4: RTC LATCH REGISTER ADR RTCIO .SET MK4_RTC ; RTC LATCH REGISTER ADR ; KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT -KIOBASE .SET $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT -CTCDEBUG .SET FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT -CTCBASE .SET $B0 ; CTC BASE I/O ADDRESS -CTCTIMER .SET FALSE ; ENABLE CTC PERIODIC TIMER +; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER ; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; @@ -108,19 +106,10 @@ SKZENABLE .SET FALSE ; ENABLE SERGEY'S Z80-512K FEATURES WDOGMODE .SET WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ] ; FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS -FPLED_IO .SET $00 ; FP: PORT ADDRESS FOR FP LEDS -FPLED_INV .SET FALSE ; FP: LED BITS ARE INVERTED -FPLED_DSKACT .SET TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS -FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES -FPSW_IO .SET $00 ; FP: PORT ADDRESS FOR FP SWITCHES -FPSW_INV .SET FALSE ; FP: SWITCH BITS ARE INVERTED ; DIAGLVL .SET DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .SET FALSE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .SET LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU] -LEDPORT .SET $0E ; STATUS LED PORT ADDRESS -LEDDISKIO .SET TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; DSKYENABLE .SET FALSE ; ENABLES DSKY FUNCTIONALITY DSKYDSKACT .SET TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY @@ -131,7 +120,6 @@ PKDPPIBASE .SET $60 ; BASE I/O ADDRESS OF PKD PPI PKDOSC .SET 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ) H8PENABLE .SET FALSE ; ENABLES HEATH H8 FRONT PANEL LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY -LCDBASE .SET $DA ; BASE I/O ADDRESS OF LCD CONTROLLER GM7303ENABLE .SET FALSE ; ENABLES THE GM7303 BOARD WITH 16X2 LCD ; BOOTCON .SET 0 ; BOOT CONSOLE DEVICE @@ -147,15 +135,13 @@ KBDKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] KBDINTS .SET FALSE ; ENABLE KBD (PS2) KEYBOARD INTERRUPTS ; -DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) +DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .SET DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W] DSRTCCHG .SET FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; DS1501RTCENABLE .SET FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) -DS1501RTC_BASE .SET $50 ; DS1501RTC: I/O BASE ADDRESS ; BQRTCENABLE .SET FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) -BQRTC_BASE .SET $50 ; BQRTC: I/O BASE ADDRESS ; INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; @@ -193,7 +179,7 @@ TSERCFG .SET SER_9600_8N1 ; TSER: SERIAL LINE CONFIG ; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) ; -UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) +UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) UARTCNT .SET 6 ; UART: NUMBER OF CHIPS TO DETECT (1-8) UARTOSC .SET 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 @@ -216,7 +202,7 @@ UART6CFG .SET DEFSERCFG ; UART 6: SERIAL LINE CONFIG UART7BASE .SET $FF ; UART 7: REGISTERS BASE ADR UART7CFG .SET DEFSERCFG ; UART 7: SERIAL LINE CONFIG ; -ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) +ASCIENABLE .SET FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) ASCIINTS .SET TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 ASCISWAP .SET FALSE ; ASCI: SWAP CHANNELS ASCIBOOT .SET 0 ; ASCI: REBOOT ON RCV CHAR (0=DISABLED) @@ -280,7 +266,7 @@ FD1TYPE .SET FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8] RFENABLE .SET FALSE ; RF: ENABLE RAM FLOPPY DRIVER RFCNT .SET 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4) ; -IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) +IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) IDEDETECTMEDIA .SET FALSE ; IDE: PROBE FOR MEDIA IN MASTER UNIT, IF NOT DETECTED THEN DON'T ENABLE DRIVER IDETRACE .SET 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) IDECNT .SET 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH @@ -319,7 +305,7 @@ PPIDE2BASE .SET $00 ; PPIDE 2: PPI REGISTERS BASE ADR PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER ; -SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY @@ -371,6 +357,8 @@ PIOSBASE .SET $60 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .SET $0C ; UF: REGISTERS BASE ADR ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_MON.asm b/Source/HBIOS/cfg_MON.asm index 5e8d59b4..321eed83 100644 --- a/Source/HBIOS/cfg_MON.asm +++ b/Source/HBIOS/cfg_MON.asm @@ -94,6 +94,8 @@ CTCPRECH .SET 2 ; PRESCALE CHANNEL (0-3) CTCTIMCH .SET 3 ; TIMER CHANNEL (0-3) CTCOSC .SET CPUOSC ; CTC CLOCK FREQUENCY ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -332,12 +334,6 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER ; SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) -SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] -SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE -SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY -SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE -SDMTSWAP .SET FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 ; CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT CHTRACE .SET 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) @@ -402,6 +398,8 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_MSX.asm b/Source/HBIOS/cfg_MSX.asm index 41177da9..51bf3147 100644 --- a/Source/HBIOS/cfg_MSX.asm +++ b/Source/HBIOS/cfg_MSX.asm @@ -97,10 +97,9 @@ CTCPRECH .SET 2 ; PRESCALE CHANNEL (0-3) CTCTIMCH .SET 3 ; TIMER CHANNEL (0-3) CTCOSC .SET CPUOSC ; CTC CLOCK FREQUENCY ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER -PCFBASE .SET $F0 ; PCF8584 BASE I/O ADDRESS -PCFCLK .SET PCFCLK_8 ; PCF CLOCK BASE: PCFCLK_[3|443|6|8|12] -PCFTRNS .SET PCFTRNS_90 ; PCF TRANSFER SPEED: PCFTRNS_[90|45|11|15] ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION ; @@ -338,12 +337,6 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER ; SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) -SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] -SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE -SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY -SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE -SDMTSWAP .SET FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 ; CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT CHTRACE .SET 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) @@ -408,6 +401,8 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_N8.asm b/Source/HBIOS/cfg_N8.asm index 3efa636c..26157ba2 100644 --- a/Source/HBIOS/cfg_N8.asm +++ b/Source/HBIOS/cfg_N8.asm @@ -45,7 +45,7 @@ #DEFINE PLATFORM_NAME "RetroBrew N8", " [", CONFIG, "]" ; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES #DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE #DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED -#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION +#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION ; #INCLUDE "cfg_MASTER.asm" ; @@ -94,12 +94,10 @@ N8_DEFACR .SET $1B ; N8: AUX CTL REGISTER DEFAULT VALUE (QUIESCIENT STATE) RTCIO .SET N8_RTC ; RTC LATCH REGISTER ADR ; KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT -KIOBASE .SET $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT -CTCDEBUG .SET FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT -CTCBASE .SET $B0 ; CTC BASE I/O ADDRESS -CTCTIMER .SET FALSE ; ENABLE CTC PERIODIC TIMER +; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER ; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; @@ -110,19 +108,10 @@ SKZENABLE .SET FALSE ; ENABLE SERGEY'S Z80-512K FEATURES WDOGMODE .SET WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ] ; FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS -FPLED_IO .SET $00 ; FP: PORT ADDRESS FOR FP LEDS -FPLED_INV .SET FALSE ; FP: LED BITS ARE INVERTED -FPLED_DSKACT .SET TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS -FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES -FPSW_IO .SET $00 ; FP: PORT ADDRESS FOR FP SWITCHES -FPSW_INV .SET FALSE ; FP: SWITCH BITS ARE INVERTED ; DIAGLVL .SET DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .SET FALSE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .SET LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU] -LEDPORT .SET RTCIO ; STATUS LED PORT ADDRESS -LEDDISKIO .SET TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; DSKYENABLE .SET FALSE ; ENABLES DSKY FUNCTIONALITY DSKYDSKACT .SET TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY @@ -133,7 +122,6 @@ PKDPPIBASE .SET N8_PPI0 ; BASE I/O ADDRESS OF PKD PPI PKDOSC .SET 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ) H8PENABLE .SET FALSE ; ENABLES HEATH H8 FRONT PANEL LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY -LCDBASE .SET $DA ; BASE I/O ADDRESS OF LCD CONTROLLER GM7303ENABLE .SET FALSE ; ENABLES THE GM7303 BOARD WITH 16X2 LCD ; BOOTCON .SET 0 ; BOOT CONSOLE DEVICE @@ -218,7 +206,7 @@ UART6CFG .SET DEFSERCFG ; UART 6: SERIAL LINE CONFIG UART7BASE .SET $FF ; UART 7: REGISTERS BASE ADR UART7CFG .SET DEFSERCFG ; UART 7: SERIAL LINE CONFIG ; -ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) +ASCIENABLE .SET FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) ASCIINTS .SET TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 ASCISWAP .SET FALSE ; ASCI: SWAP CHANNELS ASCIBOOT .SET 0 ; ASCI: REBOOT ON RCV CHAR (0=DISABLED) @@ -253,7 +241,7 @@ CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) CVDUMODE .SET CVDUMODE_ECB ; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC] CVDUMON .SET CVDUMON_EGA ; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA] GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) -TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) +TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) TMSMODE .SET TMSMODE_N8 ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) @@ -271,7 +259,7 @@ MDRAM .SET TRUE ; MD: ENABLE RAM DISK MDTRACE .SET 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) MDFFENABLE .SET FALSE ; MD: ENABLE FLASH FILE SYSTEM ; -FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) +FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_N8 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] FDCNT .SET 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2) FDTRACE .SET 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL) @@ -321,7 +309,7 @@ PPIDE2BASE .SET $00 ; PPIDE 2: PPI REGISTERS BASE ADR PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER ; -SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] SDPPIBASE .SET N8_PPI0 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY @@ -373,6 +361,8 @@ PIOSBASE .SET N8_PPI0 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .SET $0C ; UF: REGISTERS BASE ADR ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_N8PC.asm b/Source/HBIOS/cfg_N8PC.asm index 416443bf..e2ce29c8 100644 --- a/Source/HBIOS/cfg_N8PC.asm +++ b/Source/HBIOS/cfg_N8PC.asm @@ -99,6 +99,8 @@ CTCDEBUG .SET FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .SET $B0 ; CTC BASE I/O ADDRESS CTCTIMER .SET FALSE ; ENABLE CTC PERIODIC TIMER ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -372,6 +374,8 @@ PIOSBASE .SET N8_PPI0 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .SET $0C ; UF: REGISTERS BASE ADR ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_NABU.asm b/Source/HBIOS/cfg_NABU.asm index ccdebb0d..94a7e30d 100644 --- a/Source/HBIOS/cfg_NABU.asm +++ b/Source/HBIOS/cfg_NABU.asm @@ -97,6 +97,8 @@ CTCPRECH .SET 2 ; PRESCALE CHANNEL (0-3) CTCTIMCH .SET 3 ; TIMER CHANNEL (0-3) CTCOSC .SET CPUOSC ; CTC CLOCK FREQUENCY ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -335,12 +337,6 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER ; SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) -SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] -SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE -SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY -SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE -SDMTSWAP .SET FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 ; CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT CHTRACE .SET 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) @@ -405,6 +401,8 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_RC2014.asm b/Source/HBIOS/cfg_RC2014.asm index ed5348ef..c5dbfed1 100644 --- a/Source/HBIOS/cfg_RC2014.asm +++ b/Source/HBIOS/cfg_RC2014.asm @@ -97,10 +97,10 @@ CTCPRECH .SET 2 ; PRESCALE CHANNEL (0-3) CTCTIMCH .SET 3 ; TIMER CHANNEL (0-3) CTCOSC .SET CPUOSC ; CTC CLOCK FREQUENCY ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +SCTIMIO .SET $0F ; SC737: PORT ADDRESS +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER -PCFBASE .SET $F0 ; PCF8584 BASE I/O ADDRESS -PCFCLK .SET PCFCLK_8 ; PCF CLOCK BASE: PCFCLK_[3|443|6|8|12] -PCFTRNS .SET PCFTRNS_90 ; PCF TRANSFER SPEED: PCFTRNS_[90|45|11|15] ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION ; @@ -340,7 +340,7 @@ PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE -SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY +SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDMTSWAP .SET FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 @@ -358,6 +358,9 @@ CH1USBENABLE .SET TRUE ; CH 1: ENABLE USB DISK CH1SDENABLE .SET FALSE ; CH 1: ENABLE SD DISK ; PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) +PRPSDENABLE .SET TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT +PRPSDTRACE .SET 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +PRPCONENABLE .SET TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT ; PPPENABLE .SET FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM) ; @@ -408,6 +411,15 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE) +CHNATIVEEZ80 .SET FALSE ; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_RCEZ80.asm b/Source/HBIOS/cfg_RCEZ80.asm index e167e179..1a01a265 100644 --- a/Source/HBIOS/cfg_RCEZ80.asm +++ b/Source/HBIOS/cfg_RCEZ80.asm @@ -95,6 +95,8 @@ CTCPRECH .SET 2 ; PRESCALE CHANNEL (0-3) CTCTIMCH .SET 3 ; TIMER CHANNEL (0-3) CTCOSC .SET CPUOSC ; CTC CLOCK FREQUENCY ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -276,6 +278,8 @@ SCONENABLE .SET FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) TVGAENABLE .SET FALSE ; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM) XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) +XOS_BASE .SET $A0 ; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES) +XOSSIZ .SET V80X30 ; XOSERA: DISPLAY FORMAT [V80X30|V80X60] ; MDENABLE .SET TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDROM .SET TRUE ; MD: ENABLE ROM DISK @@ -333,9 +337,9 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER ; SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) -SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] +SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE -SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY +SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDMTSWAP .SET FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 @@ -406,6 +410,15 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE) +CHNATIVEEZ80 .SET TRUE ; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER @@ -454,13 +467,3 @@ EZ80_WSMD_TYP .SET EZ80WSMD_CALC ; BUS WAIT STATE CONFIG: EZ80WSMD_[CALC|CYCLES EZ80_FLSH_WS .SET 1 ; WAIT STATES FOR ON CHIP FLASH (0-7) EZ80_FLSH_MIN_NS .SET 60 ; MINIMUM WAIT STATES TO APPLY TO ON-CHIP FLASH, IF EZ80_WSMD_TYP = EZ80WSMD_CALC EZ80_FWSMD_TYP .SET EZ80WSMD_CALC ; WAIT STATE TYPE: EZ80RMMD_[CALC|WAIT] (CYCLES NOT ALLOWED) -; -CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER -CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) -CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) -CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE) -CHNATIVEEZ80 .SET TRUE ; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE -; -_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT -_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT -_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT diff --git a/Source/HBIOS/cfg_RCZ180.asm b/Source/HBIOS/cfg_RCZ180.asm index a80da548..5e602273 100644 --- a/Source/HBIOS/cfg_RCZ180.asm +++ b/Source/HBIOS/cfg_RCZ180.asm @@ -95,9 +95,8 @@ KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .SET $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT -CTCDEBUG .SET FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT -CTCBASE .SET $88 ; CTC BASE I/O ADDRESS -CTCTIMER .SET FALSE ; ENABLE CTC PERIODIC TIMER +; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER ; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; @@ -200,7 +199,7 @@ DUART1BASE .SET $40 ; DUART 1: BASE ADDRESS OF CHIP DUART1ACFG .SET DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG DUART1BCFG .SET DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG ; -UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) +UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) UARTCNT .SET 4 ; UART: NUMBER OF CHIPS TO DETECT (1-8) UARTOSC .SET 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 @@ -294,6 +293,8 @@ SCONENABLE .SET FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) TVGAENABLE .SET FALSE ; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM) XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) +XOS_BASE .SET $A0 ; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES) +XOSSIZ .SET V80X30 ; XOSERA: DISPLAY FORMAT [V80X30|V80X60] ; MDENABLE .SET TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDROM .SET TRUE ; MD: ENABLE ROM DISK @@ -321,14 +322,14 @@ IDE0DATLO .SET $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O IDE0DATHI .SET $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O IDE0A8BIT .SET TRUE ; IDE 0A (MASTER): 8 BIT XFER IDE0B8BIT .SET TRUE ; IDE 0B (MASTER): 8 BIT XFER -IDE1MODE .SET IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE] -IDE1BASE .SET $00 ; IDE 1: IO BASE ADDRESS +IDE1MODE .SET IDEMODE_RC ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE] +IDE1BASE .SET $18 ; IDE 1: IO BASE ADDRESS IDE1DATLO .SET $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O IDE1DATHI .SET $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O IDE1A8BIT .SET TRUE ; IDE 1A (MASTER): 8 BIT XFER IDE1B8BIT .SET TRUE ; IDE 1B (MASTER): 8 BIT XFER -IDE2MODE .SET IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE] -IDE2BASE .SET $00 ; IDE 2: IO BASE ADDRESS +IDE2MODE .SET IDEMODE_RC ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE] +IDE2BASE .SET $20 ; IDE 2: IO BASE ADDRESS IDE2DATLO .SET $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O IDE2DATHI .SET $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O IDE2A8BIT .SET TRUE ; IDE 2A (MASTER): 8 BIT XFER @@ -353,7 +354,7 @@ PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE -SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY +SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDMTSWAP .SET FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 @@ -390,7 +391,7 @@ LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM) LPTMODE .SET LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014|T35] LPTCNT .SET 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2) LPTTRACE .SET 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -LPT0BASE .SET $0C ; LPT 0: REGISTERS BASE ADR +LPT0BASE .SET $18 ; LPT 0: REGISTERS BASE ADR LPT1BASE .SET $00 ; LPT 1: REGISTERS BASE ADR ; PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) @@ -424,6 +425,15 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE) +CHNATIVEEZ80 .SET FALSE ; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_RCZ280.asm b/Source/HBIOS/cfg_RCZ280.asm index 34e65ccc..855d3726 100644 --- a/Source/HBIOS/cfg_RCZ280.asm +++ b/Source/HBIOS/cfg_RCZ280.asm @@ -92,12 +92,10 @@ Z280_TIMER .SET TRUE ; Z280: ENABLE INTERNAL Z280 SYSTEM PERIODIC TIMER RTCIO .SET $C0 ; RTC LATCH REGISTER ADR ; KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT -KIOBASE .SET $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT -CTCDEBUG .SET FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT -CTCBASE .SET $88 ; CTC BASE I/O ADDRESS -CTCTIMER .SET FALSE ; ENABLE CTC PERIODIC TIMER +; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER ; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; @@ -107,7 +105,7 @@ SKZENABLE .SET FALSE ; ENABLE SERGEY'S Z80-512K FEATURES ; WDOGMODE .SET WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ] ; -FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS +FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS FPLED_IO .SET $00 ; FP: PORT ADDRESS FOR FP LEDS FPLED_INV .SET FALSE ; FP: LED BITS ARE INVERTED FPLED_DSKACT .SET TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS @@ -130,7 +128,7 @@ PKDENABLE .SET FALSE ; ENABLES DSKY NG PKD DRIVER (8259) PKDPPIBASE .SET $60 ; BASE I/O ADDRESS OF PKD PPI PKDOSC .SET 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ) H8PENABLE .SET FALSE ; ENABLES HEATH H8 FRONT PANEL -LCDENABLE .SET TRUE ; ENABLE LCD DISPLAY +LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY LCDBASE .SET $DA ; BASE I/O ADDRESS OF LCD CONTROLLER GM7303ENABLE .SET FALSE ; ENABLES THE GM7303 BOARD WITH 16X2 LCD ; @@ -147,7 +145,7 @@ KBDKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] KBDINTS .SET FALSE ; ENABLE KBD (PS2) KEYBOARD INTERRUPTS ; -DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) +DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .SET DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W] DSRTCCHG .SET FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; @@ -200,7 +198,7 @@ DUART1BASE .SET $40 ; DUART 1: BASE ADDRESS OF CHIP DUART1ACFG .SET DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG DUART1BCFG .SET DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG ; -UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) +UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) UARTCNT .SET 4 ; UART: NUMBER OF CHIPS TO DETECT (1-8) UARTOSC .SET 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 @@ -232,19 +230,9 @@ Z2U0BASE .SET $10 ; Z2U 0: BASE I/O ADDRESS Z2U0CFG .SET DEFSERCFG ; Z2U 0: SERIAL LINE CONFIG Z2U0HFC .SET FALSE ; Z2U 0: ENABLE HARDWARE FLOW CONTROL ; -ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) -ACIADEBUG .SET FALSE ; ACIA: ENABLE DEBUG OUTPUT -ACIACNT .SET 1 ; ACIA: NUMBER OF CHIPS TO DETECT (1-2) -ACIA0BASE .SET $80 ; ACIA 0: REGISTERS BASE ADR -ACIA0CLK .SET 7372800 ; ACIA 0: OSC FREQ IN HZ -ACIA0DIV .SET 1 ; ACIA 0: SERIAL CLOCK DIVIDER -ACIA0CFG .SET DEFSERCFG ; ACIA 0: SERIAL LINE CONFIG (SEE STD.ASM) -ACIA1BASE .SET $40 ; ACIA 1: REGISTERS BASE ADR -ACIA1CLK .SET 7372800 ; ACIA 1: OSC FREQ IN HZ -ACIA1DIV .SET 1 ; ACIA 1: SERIAL CLOCK DIVIDER -ACIA1CFG .SET DEFSERCFG ; ACIA 1: SERIAL LINE CONFIG (SEE STD.ASM) -; -SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) +; +SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIODEBUG .SET FALSE ; SIO: ENABLE DEBUG OUTPUT SIOBOOT .SET 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED) SIOCNT .SET 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP @@ -304,6 +292,8 @@ SCONENABLE .SET FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) TVGAENABLE .SET FALSE ; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM) XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) +XOS_BASE .SET $A0 ; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES) +XOSSIZ .SET V80X30 ; XOSERA: DISPLAY FORMAT [V80X30|V80X60] ; MDENABLE .SET TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDROM .SET TRUE ; MD: ENABLE ROM DISK @@ -331,14 +321,14 @@ IDE0DATLO .SET $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O IDE0DATHI .SET $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O IDE0A8BIT .SET TRUE ; IDE 0A (MASTER): 8 BIT XFER IDE0B8BIT .SET TRUE ; IDE 0B (MASTER): 8 BIT XFER -IDE1MODE .SET IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE] -IDE1BASE .SET $00 ; IDE 1: IO BASE ADDRESS +IDE1MODE .SET IDEMODE_RC ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE] +IDE1BASE .SET $18 ; IDE 1: IO BASE ADDRESS IDE1DATLO .SET $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O IDE1DATHI .SET $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O IDE1A8BIT .SET TRUE ; IDE 1A (MASTER): 8 BIT XFER IDE1B8BIT .SET TRUE ; IDE 1B (MASTER): 8 BIT XFER -IDE2MODE .SET IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE] -IDE2BASE .SET $00 ; IDE 2: IO BASE ADDRESS +IDE2MODE .SET IDEMODE_RC ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE] +IDE2BASE .SET $20 ; IDE 2: IO BASE ADDRESS IDE2DATLO .SET $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O IDE2DATHI .SET $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O IDE2A8BIT .SET TRUE ; IDE 2A (MASTER): 8 BIT XFER @@ -363,12 +353,12 @@ PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE -SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY +SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDMTSWAP .SET FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 ; -CHENABLE .SET TRUE ; CH: ENABLE CH375/376 USB SUPPORT +CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT CHTRACE .SET 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHUSBTRACE .SET 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHSDTRACE .SET 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) @@ -434,6 +424,15 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE) +CHNATIVEEZ80 .SET FALSE ; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_RCZ80.asm b/Source/HBIOS/cfg_RCZ80.asm index b4d468eb..bcdb816d 100644 --- a/Source/HBIOS/cfg_RCZ80.asm +++ b/Source/HBIOS/cfg_RCZ80.asm @@ -97,10 +97,10 @@ CTCPRECH .SET 2 ; PRESCALE CHANNEL (0-3) CTCTIMCH .SET 3 ; TIMER CHANNEL (0-3) CTCOSC .SET CPUOSC ; CTC CLOCK FREQUENCY ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +SCTIMIO .SET $0F ; SC737: PORT ADDRESS +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER -PCFBASE .SET $F0 ; PCF8584 BASE I/O ADDRESS -PCFCLK .SET PCFCLK_8 ; PCF CLOCK BASE: PCFCLK_[3|443|6|8|12] -PCFTRNS .SET PCFTRNS_90 ; PCF TRANSFER SPEED: PCFTRNS_[90|45|11|15] ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION ; @@ -302,6 +302,8 @@ SCONENABLE .SET FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) TVGAENABLE .SET FALSE ; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM) XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) +XOS_BASE .SET $A0 ; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES) +XOSSIZ .SET V80X30 ; XOSERA: DISPLAY FORMAT [V80X30|V80X60] ; MDENABLE .SET TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDROM .SET TRUE ; MD: ENABLE ROM DISK @@ -361,7 +363,7 @@ PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE -SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY +SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDMTSWAP .SET FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 @@ -379,6 +381,9 @@ CH1USBENABLE .SET TRUE ; CH 1: ENABLE USB DISK CH1SDENABLE .SET FALSE ; CH 1: ENABLE SD DISK ; PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) +PRPSDENABLE .SET TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT +PRPSDTRACE .SET 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +PRPCONENABLE .SET TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT ; PPPENABLE .SET FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM) ; @@ -429,6 +434,15 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE) +CHNATIVEEZ80 .SET FALSE ; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_RPH.asm b/Source/HBIOS/cfg_RPH.asm index 7768a86b..5529313d 100644 --- a/Source/HBIOS/cfg_RPH.asm +++ b/Source/HBIOS/cfg_RPH.asm @@ -99,6 +99,8 @@ CTCDEBUG .SET FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .SET $B0 ; CTC BASE I/O ADDRESS CTCTIMER .SET FALSE ; ENABLE CTC PERIODIC TIMER ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -354,6 +356,8 @@ PIOSBASE .SET RPH_PPI0 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .SET $0C ; UF: REGISTERS BASE ADR ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_SBC.asm b/Source/HBIOS/cfg_SBC.asm index e7818f02..a2889231 100644 --- a/Source/HBIOS/cfg_SBC.asm +++ b/Source/HBIOS/cfg_SBC.asm @@ -94,6 +94,8 @@ CTCPRECH .SET 2 ; PRESCALE CHANNEL (0-3) CTCTIMCH .SET 3 ; TIMER CHANNEL (0-3) CTCOSC .SET 614400 ; CTC CLOCK FREQUENCY ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -103,19 +105,10 @@ SKZENABLE .SET FALSE ; ENABLE SERGEY'S Z80-512K FEATURES WDOGMODE .SET WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ] ; FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS -FPLED_IO .SET $00 ; FP: PORT ADDRESS FOR FP LEDS -FPLED_INV .SET FALSE ; FP: LED BITS ARE INVERTED -FPLED_DSKACT .SET TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS -FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES -FPSW_IO .SET $00 ; FP: PORT ADDRESS FOR FP SWITCHES -FPSW_INV .SET FALSE ; FP: SWITCH BITS ARE INVERTED ; DIAGLVL .SET DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .SET FALSE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .SET LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU] -LEDPORT .SET RTCIO ; STATUS LED PORT ADDRESS -LEDDISKIO .SET TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; DSKYENABLE .SET FALSE ; ENABLES DSKY FUNCTIONALITY DSKYDSKACT .SET TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY @@ -126,7 +119,6 @@ PKDPPIBASE .SET $60 ; BASE I/O ADDRESS OF PKD PPI PKDOSC .SET 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ) H8PENABLE .SET FALSE ; ENABLES HEATH H8 FRONT PANEL LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY -LCDBASE .SET $DA ; BASE I/O ADDRESS OF LCD CONTROLLER GM7303ENABLE .SET FALSE ; ENABLES THE GM7303 BOARD WITH 16X2 LCD ; BOOTCON .SET 0 ; BOOT CONSOLE DEVICE @@ -142,15 +134,13 @@ KBDKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] KBDINTS .SET FALSE ; ENABLE KBD (PS2) KEYBOARD INTERRUPTS ; -DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) +DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .SET DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W] DSRTCCHG .SET FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; DS1501RTCENABLE .SET FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) -DS1501RTC_BASE .SET $50 ; DS1501RTC: I/O BASE ADDRESS ; BQRTCENABLE .SET FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) -BQRTC_BASE .SET $50 ; BQRTC: I/O BASE ADDRESS ; INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; @@ -362,6 +352,8 @@ PIOSBASE .SET $60 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .SET $0C ; UF: REGISTERS BASE ADR ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_SCZ180.asm b/Source/HBIOS/cfg_SCZ180.asm index 71c1d413..5f1abe3d 100644 --- a/Source/HBIOS/cfg_SCZ180.asm +++ b/Source/HBIOS/cfg_SCZ180.asm @@ -95,9 +95,8 @@ KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .SET $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT -CTCDEBUG .SET FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT -CTCBASE .SET $88 ; CTC BASE I/O ADDRESS -CTCTIMER .SET FALSE ; ENABLE CTC PERIODIC TIMER +; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER ; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; @@ -107,7 +106,7 @@ SKZENABLE .SET FALSE ; ENABLE SERGEY'S Z80-512K FEATURES ; WDOGMODE .SET WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ] ; -FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS +FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS FPLED_IO .SET $00 ; FP: PORT ADDRESS FOR FP LEDS FPLED_INV .SET FALSE ; FP: LED BITS ARE INVERTED FPLED_DSKACT .SET TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS @@ -130,7 +129,7 @@ PKDENABLE .SET FALSE ; ENABLES DSKY NG PKD DRIVER (8259) PKDPPIBASE .SET $60 ; BASE I/O ADDRESS OF PKD PPI PKDOSC .SET 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ) H8PENABLE .SET FALSE ; ENABLES HEATH H8 FRONT PANEL -LCDENABLE .SET TRUE ; ENABLE LCD DISPLAY +LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY LCDBASE .SET $AA ; BASE I/O ADDRESS OF LCD CONTROLLER GM7303ENABLE .SET FALSE ; ENABLES THE GM7303 BOARD WITH 16X2 LCD ; @@ -147,7 +146,7 @@ KBDKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] KBDINTS .SET FALSE ; ENABLE KBD (PS2) KEYBOARD INTERRUPTS ; -DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) +DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .SET DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W] DSRTCCHG .SET FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; @@ -200,7 +199,7 @@ DUART1BASE .SET $40 ; DUART 1: BASE ADDRESS OF CHIP DUART1ACFG .SET DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG DUART1BCFG .SET DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG ; -UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) +UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) UARTCNT .SET 4 ; UART: NUMBER OF CHIPS TO DETECT (1-8) UARTOSC .SET 1843200 ; UART: OSC FREQUENCY IN MHZ UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 @@ -223,7 +222,7 @@ UART6CFG .SET DEFSERCFG ; UART 6: SERIAL LINE CONFIG UART7BASE .SET $FF ; UART 7: REGISTERS BASE ADR UART7CFG .SET DEFSERCFG ; UART 7: SERIAL LINE CONFIG ; -ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) +ASCIENABLE .SET FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) ASCIINTS .SET TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 ASCISWAP .SET FALSE ; ASCI: SWAP CHANNELS ASCIBOOT .SET 0 ; ASCI: REBOOT ON RCV CHAR (0=DISABLED) @@ -234,7 +233,7 @@ Z2UENABLE .SET FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM) ; ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) ; -SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIODEBUG .SET FALSE ; SIO: ENABLE DEBUG OUTPUT SIOBOOT .SET 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED) SIOCNT .SET 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP @@ -242,21 +241,42 @@ SIOINTS .SET TRUE ; SIO: INCLUDE SIO INTERRUPT SUPPORT UNDER IM1/2/3 SIO0MODE .SET SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R] SIO0BASE .SET $80 ; SIO 0: REGISTERS BASE ADR SIO0ACLK .SET 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0ACFG .SET SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG +SIO0ACFG .SET DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG SIO0ACTCC .SET -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO0BCLK .SET 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO0BCFG .SET SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG +SIO0BCFG .SET DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG SIO0BCTCC .SET -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO1MODE .SET SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R] SIO1BASE .SET $84 ; SIO 1: REGISTERS BASE ADR SIO1ACLK .SET 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1ACFG .SET SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG +SIO1ACFG .SET DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG SIO1ACTCC .SET -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO1BCLK .SET 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 -SIO1BCFG .SET SER_115200_8N1 ; SIO 1B: SERIAL LINE CONFIG +SIO1BCFG .SET DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG SIO1BCTCC .SET -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE ; SCCENABLE .SET FALSE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) +SCCDEBUG .SET FALSE ; SCC: ENABLE DEBUG OUTPUT +SCCBOOT .SET 0 ; SCC: REBOOT ON RCV CHAR (0=DISABLED) +SCCCNT .SET 1 ; SCC: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP +SCCINTS .SET TRUE ; SCC: INCLUDE SCC INTERRUPT SUPPORT UNDER IM1/2/3 +SCCPCLK .SET TRUE ; SCC: USE PROCESSOR CLOCK AS BAUD CLOCK +SCC0MODE .SET SCCMODE_SZ80 ; SCC 0: CHIP TYPE: SCCMODE_[STD|SZ80] +SCC0BASE .SET $A0 ; SCC 0: REGISTERS BASE ADR +SCC0ACLK .SET 7372800 ; SCC 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SCC0ACFG .SET DEFSERCFG ; SCC 0A: SERIAL LINE CONFIG +SCC0ACTCC .SET -1 ; SCC 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE +SCC0BCLK .SET 7372800 ; SCC 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SCC0BCFG .SET DEFSERCFG ; SCC 0B: SERIAL LINE CONFIG +SCC0BCTCC .SET -1 ; SCC 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE +SCC1MODE .SET SCCMODE_SZ80 ; SCC 1: CHIP TYPE: SIOMODE_[STD|SZ80] +SCC1BASE .SET $FF ; SCC 1: REGISTERS BASE ADR +SCC1ACLK .SET 7372800 ; SCC 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SCC1ACFG .SET DEFSERCFG ; SCC 1A: SERIAL LINE CONFIG +SCC1ACTCC .SET -1 ; SCC 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE +SCC1BCLK .SET 7372800 ; SCC 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 +SCC1BCFG .SET DEFSERCFG ; SCC 1B: SERIAL LINE CONFIG +SCC1BCTCC .SET -1 ; SCC 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE ; XIOCFG .SET DEFSERCFG ; XIO: SERIAL LINE CONFIG ; @@ -273,6 +293,8 @@ SCONENABLE .SET FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM) EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) TVGAENABLE .SET FALSE ; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM) XOSENABLE .SET FALSE ; XOSERA: ENABLE XOSERA VIDEO DRIVERS (XOSERA.ASM) +XOS_BASE .SET $A0 ; XOSERA: I/O BASE ADDRESS (REQUIRES 32 BYTES) +XOSSIZ .SET V80X30 ; XOSERA: DISPLAY FORMAT [V80X30|V80X60] ; MDENABLE .SET TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDROM .SET TRUE ; MD: ENABLE ROM DISK @@ -300,14 +322,14 @@ IDE0DATLO .SET $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O IDE0DATHI .SET $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O IDE0A8BIT .SET TRUE ; IDE 0A (MASTER): 8 BIT XFER IDE0B8BIT .SET TRUE ; IDE 0B (MASTER): 8 BIT XFER -IDE1MODE .SET IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE] -IDE1BASE .SET $00 ; IDE 1: IO BASE ADDRESS +IDE1MODE .SET IDEMODE_RC ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE] +IDE1BASE .SET $18 ; IDE 1: IO BASE ADDRESS IDE1DATLO .SET $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O IDE1DATHI .SET $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O IDE1A8BIT .SET TRUE ; IDE 1A (MASTER): 8 BIT XFER IDE1B8BIT .SET TRUE ; IDE 1B (MASTER): 8 BIT XFER -IDE2MODE .SET IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE] -IDE2BASE .SET $00 ; IDE 2: IO BASE ADDRESS +IDE2MODE .SET IDEMODE_RC ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE] +IDE2BASE .SET $20 ; IDE 2: IO BASE ADDRESS IDE2DATLO .SET $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O IDE2DATHI .SET $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O IDE2A8BIT .SET TRUE ; IDE 2A (MASTER): 8 BIT XFER @@ -329,7 +351,7 @@ PPIDE2BASE .SET $00 ; PPIDE 2: PPI REGISTERS BASE ADR PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER ; -SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) +SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|T35|GM|EZ512|K80W] SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY @@ -337,7 +359,7 @@ SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE SDMTSWAP .SET FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 ; -CHENABLE .SET TRUE ; CH: ENABLE CH375/376 USB SUPPORT +CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT CHTRACE .SET 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHUSBTRACE .SET 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) CHSDTRACE .SET 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) @@ -350,6 +372,9 @@ CH1USBENABLE .SET TRUE ; CH 1: ENABLE USB DISK CH1SDENABLE .SET FALSE ; CH 1: ENABLE SD DISK ; PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) +PRPSDENABLE .SET TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT +PRPSDTRACE .SET 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL) +PRPCONENABLE .SET TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT ; PPPENABLE .SET FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM) ; @@ -400,6 +425,15 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE) +CHNATIVEEZ80 .SET FALSE ; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER diff --git a/Source/HBIOS/cfg_SZ180.asm b/Source/HBIOS/cfg_SZ180.asm index 6dfb00af..191ab4a7 100644 --- a/Source/HBIOS/cfg_SZ180.asm +++ b/Source/HBIOS/cfg_SZ180.asm @@ -96,6 +96,8 @@ KIOBASE .SET $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -423,6 +425,8 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/cfg_SZ80.asm b/Source/HBIOS/cfg_SZ80.asm index efa2c96b..9a5f0886 100644 --- a/Source/HBIOS/cfg_SZ80.asm +++ b/Source/HBIOS/cfg_SZ80.asm @@ -89,6 +89,8 @@ KIOBASE .SET $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -412,6 +414,8 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER ; AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER diff --git a/Source/HBIOS/cfg_TEMPLATE.asm b/Source/HBIOS/cfg_TEMPLATE.asm index cef821a1..764458ff 100644 --- a/Source/HBIOS/cfg_TEMPLATE.asm +++ b/Source/HBIOS/cfg_TEMPLATE.asm @@ -130,6 +130,9 @@ CTCPRECH .SET 2 ; PRESCALE CHANNEL (0-3) CTCTIMCH .SET 3 ; TIMER CHANNEL (0-3) CTCOSC .SET 614400 ; CTC CLOCK FREQUENCY ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +SCTIMIO .SET $0F ; SC737: PORT ADDRESS +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER PCFBASE .SET $F0 ; PCF8584 BASE I/O ADDRESS PCFCLK .SET PCFCLK_12 ; PCF CLOCK BASE: PCFCLK_[3|443|6|8|12] @@ -520,6 +523,15 @@ PIOSBASE .SET $60 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .SET $0C ; UF: REGISTERS BASE ADR ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) +CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) +CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE) +CHNATIVEEZ80 .SET FALSE ; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE +_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT +_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT +_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER SN76489CHNOUT .SET SNCHAN_BOTH ; SN: CHANNEL OUTPUTS: SNCHAN_[BOTH|LEFT|RIGHT] AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER @@ -571,13 +583,3 @@ EZ80_WSMD_TYP .SET EZ80WSMD_CALC ; BUS WAIT STATE CONFIG: EZ80WSMD_[CALC|CYCLES EZ80_FLSH_WS .SET 1 ; WAIT STATES FOR ON CHIP FLASH (0-7) EZ80_FLSH_MIN_NS .SET 60 ; MINIMUM WAIT STATES TO APPLY TO ON-CHIP FLASH, IF EZ80_WSMD_TYP = EZ80WSMD_CALC EZ80_FWSMD_TYP .SET EZ80WSMD_CALC ; WAIT STATE TYPE: EZ80RMMD_[CALC|WAIT] (CYCLES NOT ALLOWED) -; -CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER -CHSCSIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE MASS STORAGE DEVICES (REQUIRES CHNATIVEENABLE) -CHUFIENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE UFI FLOPPY DISK DEVICES (REQUIRES CHNATIVEENABLE) -CHNATIVEFORCE .SET FALSE ; CH376: DISABLE AUTO-DETECTION OF MODULE - ASSUME ITS INSTALLED (REQUIRES CHNATIVEENABLE) -CHNATIVEEZ80 .SET FALSE ; CH376: DELEGATE USB DRIVERS TO EZ80'S FIRMWARE -; -_CH376_DATA_PORT .SET $FF88 ; CH376: DATA PORT -_CH376_COMMAND_PORT .SET $FF89 ; CH376: COMMAND PORT -_USB_MODULE_LEDS .SET $FF8A ; CH376: LED CONTROL PORT diff --git a/Source/HBIOS/cfg_Z80RETRO.asm b/Source/HBIOS/cfg_Z80RETRO.asm index 69e27c54..3ff82235 100644 --- a/Source/HBIOS/cfg_Z80RETRO.asm +++ b/Source/HBIOS/cfg_Z80RETRO.asm @@ -97,6 +97,8 @@ CTCPRECH .SET 0 ; PRESCALE CHANNEL (0-3) CTCTIMCH .SET 1 ; TIMER CHANNEL (0-3) CTCOSC .SET 7372800 ; CTC CLOCK FREQUENCY ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -325,6 +327,8 @@ PIOSBASE .SET $60 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER SPKENABLE .SET FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) diff --git a/Source/HBIOS/cfg_ZETA.asm b/Source/HBIOS/cfg_ZETA.asm index 21ab029a..1cacde9e 100644 --- a/Source/HBIOS/cfg_ZETA.asm +++ b/Source/HBIOS/cfg_ZETA.asm @@ -45,7 +45,7 @@ #DEFINE PLATFORM_NAME "Zeta", " [", CONFIG, "]" ; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES #DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE #DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED -#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION +#DEFINE DEFSERCFG SER_115200_8N1 ; DEFAULT SERIAL CONFIGURATION ; #INCLUDE "cfg_MASTER.asm" ; @@ -82,10 +82,11 @@ MPCL_ROM .SET $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY) RTCIO .SET $70 ; RTC LATCH REGISTER ADR ; KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT -KIOBASE .SET $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -95,19 +96,10 @@ SKZENABLE .SET FALSE ; ENABLE SERGEY'S Z80-512K FEATURES WDOGMODE .SET WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ] ; FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS -FPLED_IO .SET $00 ; FP: PORT ADDRESS FOR FP LEDS -FPLED_INV .SET FALSE ; FP: LED BITS ARE INVERTED -FPLED_DSKACT .SET TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS -FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES -FPSW_IO .SET $00 ; FP: PORT ADDRESS FOR FP SWITCHES -FPSW_INV .SET FALSE ; FP: SWITCH BITS ARE INVERTED ; DIAGLVL .SET DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .SET FALSE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .SET LEDMODE_RTC ; LEDMODE_[STD|SC|RTC|NABU] -LEDPORT .SET RTCIO ; STATUS LED PORT ADDRESS -LEDDISKIO .SET TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; DSKYENABLE .SET FALSE ; ENABLES DSKY FUNCTIONALITY DSKYDSKACT .SET TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY @@ -118,7 +110,6 @@ PKDPPIBASE .SET $60 ; BASE I/O ADDRESS OF PKD PPI PKDOSC .SET 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ) H8PENABLE .SET FALSE ; ENABLES HEATH H8 FRONT PANEL LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY -LCDBASE .SET $DA ; BASE I/O ADDRESS OF LCD CONTROLLER GM7303ENABLE .SET FALSE ; ENABLES THE GM7303 BOARD WITH 16X2 LCD ; BOOTCON .SET 0 ; BOOT CONSOLE DEVICE @@ -134,7 +125,7 @@ KBDKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] KBDINTS .SET FALSE ; ENABLE KBD (PS2) KEYBOARD INTERRUPTS ; -DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) +DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .SET DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W] DSRTCCHG .SET FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; @@ -175,6 +166,8 @@ SSEROINV .SET FALSE ; SSER: OUTPUT READY BIT INVERTED ; DLPSERENABLE .SET FALSE ; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM) ; +TSERENABLE .SET FALSE ; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM) +; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) ; UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) @@ -216,9 +209,6 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] -TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 -TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) SCONENABLE .SET FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM) @@ -232,7 +222,7 @@ MDRAM .SET TRUE ; MD: ENABLE RAM DISK MDTRACE .SET 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) MDFFENABLE .SET FALSE ; MD: ENABLE FLASH FILE SYSTEM ; -FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) +FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_ZETA ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] FDCNT .SET 1 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2) FDTRACE .SET 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL) @@ -291,17 +281,15 @@ SCSIENABLE .SET FALSE ; SCSI: ENABLE 3580-BASED SCSI INTERFACE (SCSI.ASM) PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP -PIOSBASE .SET $60 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER SPKENABLE .SET FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; DMAENABLE .SET FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM) -DMABASE .SET $E0 ; DMA: DMA BASE ADDRESS -DMAMODE .SET DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO) ; YM2612ENABLE .SET FALSE ; YM2612: ENABLE YM2612 DRIVER -VGMBASE .SET $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC) diff --git a/Source/HBIOS/cfg_ZETA2.asm b/Source/HBIOS/cfg_ZETA2.asm index eb3e234b..ed808a91 100644 --- a/Source/HBIOS/cfg_ZETA2.asm +++ b/Source/HBIOS/cfg_ZETA2.asm @@ -45,7 +45,7 @@ #DEFINE PLATFORM_NAME "Zeta 2", " [", CONFIG, "]" ; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES #DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE #DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED -#DEFINE DEFSERCFG SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION +#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION ; #INCLUDE "cfg_MASTER.asm" ; @@ -87,6 +87,8 @@ RTCIO .SET $70 ; RTC LATCH REGISTER ADR KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .SET $80 ; KIO BASE I/O ADDRESS ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT CTCDEBUG .SET FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .SET $20 ; CTC BASE I/O ADDRESS @@ -97,6 +99,8 @@ CTCPRECH .SET 0 ; PRESCALE CHANNEL (0-3) CTCTIMCH .SET 1 ; TIMER CHANNEL (0-3) CTCOSC .SET 921600 ; CTC CLOCK FREQUENCY ; +SCTIMENABLE .SET FALSE ; ENABLE SC737 50HZ SYSTEM TIMER +; PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER ; EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION @@ -106,19 +110,10 @@ SKZENABLE .SET FALSE ; ENABLE SERGEY'S Z80-512K FEATURES WDOGMODE .SET WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ] ; FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS -FPLED_IO .SET $00 ; FP: PORT ADDRESS FOR FP LEDS -FPLED_INV .SET FALSE ; FP: LED BITS ARE INVERTED -FPLED_DSKACT .SET TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS -FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES -FPSW_IO .SET $00 ; FP: PORT ADDRESS FOR FP SWITCHES -FPSW_INV .SET FALSE ; FP: SWITCH BITS ARE INVERTED ; DIAGLVL .SET DL_CRITICAL ; ERROR LEVEL REPORTING ; LEDENABLE .SET FALSE ; ENABLES STATUS LED (SINGLE LED) -LEDMODE .SET LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU] -LEDPORT .SET RTCIO ; STATUS LED PORT ADDRESS -LEDDISKIO .SET TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; DSKYENABLE .SET FALSE ; ENABLES DSKY FUNCTIONALITY DSKYDSKACT .SET TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY @@ -129,7 +124,6 @@ PKDPPIBASE .SET $60 ; BASE I/O ADDRESS OF PKD PPI PKDOSC .SET 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ) H8PENABLE .SET FALSE ; ENABLES HEATH H8 FRONT PANEL LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY -LCDBASE .SET $DA ; BASE I/O ADDRESS OF LCD CONTROLLER GM7303ENABLE .SET FALSE ; ENABLES THE GM7303 BOARD WITH 16X2 LCD ; BOOTCON .SET 0 ; BOOT CONSOLE DEVICE @@ -145,7 +139,7 @@ KBDKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] MKYKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] KBDINTS .SET FALSE ; ENABLE KBD (PS2) KEYBOARD INTERRUPTS ; -DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) +DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .SET DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W] DSRTCCHG .SET FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; @@ -186,6 +180,8 @@ SSEROINV .SET FALSE ; SSER: OUTPUT READY BIT INVERTED ; DLPSERENABLE .SET FALSE ; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM) ; +TSERENABLE .SET FALSE ; TSER: ENABLE T35 SERIAL DRIVER (TSER.ASM) +; DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) ; UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) @@ -227,9 +223,6 @@ VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM) TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSMODE .SET TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|N8PC] -TMS80COLS .SET FALSE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9958 -TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) SCONENABLE .SET FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM) @@ -305,13 +298,12 @@ PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; +CHNATIVEENABLE .SET FALSE ; CH376: ENABLE CH376 NATIVE USB DRIVER +; SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER AY38910ENABLE .SET FALSE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER SPKENABLE .SET FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; DMAENABLE .SET FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM) -DMABASE .SET $E0 ; DMA: DMA BASE ADDRESS -DMAMODE .SET DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO) ; YM2612ENABLE .SET FALSE ; YM2612: ENABLE YM2612 DRIVER -VGMBASE .SET $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC) diff --git a/Source/HBIOS/ctc.asm b/Source/HBIOS/ctc.asm index 4ab05eb1..e33a24d9 100644 --- a/Source/HBIOS/ctc.asm +++ b/Source/HBIOS/ctc.asm @@ -2,7 +2,6 @@ ; ; Z80 CTC ; -; DISPLAY CONFIGURATION DETAILS ;______________________________________________________________________________________________________________________ ; CTC_DEFCFG .EQU %01010011 ; CTC DEFAULT CONFIG diff --git a/Source/HBIOS/ef.asm b/Source/HBIOS/ef.asm index 14971a88..3787fc99 100644 --- a/Source/HBIOS/ef.asm +++ b/Source/HBIOS/ef.asm @@ -3,6 +3,8 @@ ; ; PARTS WRITTEN BY: ALAN COX ; REVISED/ENHANCED BY LASZLO SZOLNOKI -- 01/2024 +; +; https://github.com/lgszolnoki/EF9345-VideoCard ;====================================================================== ; TODO: ; - 40X24 IMPLEMENTATION diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index 8cfd2e7b..7872700f 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -8934,6 +8934,10 @@ HB_MODSTART .EQU $ #INCLUDE "ctc.asm" #ENDIF ; +#IF (SCTIMENABLE) + #INCLUDE "sctim.asm" +#ENDIF +; #IF (PCFENABLE) #INCLUDE "pcf.asm" #ENDIF diff --git a/Source/HBIOS/sctim.asm b/Source/HBIOS/sctim.asm new file mode 100644 index 00000000..319ffef6 --- /dev/null +++ b/Source/HBIOS/sctim.asm @@ -0,0 +1,166 @@ +;___SCTIM______________________________________________________________________________________________________________ +; +; Z80 SMALL COMPUTERS SC737 50HZ SYSTEM TIMER +; https://smallcomputercentral.com/rcbus/sc700-series/sc737-rcbus-interrupt-module/ +; +; DOES NOT SUPPORT INTERRUPT VECTORS, ONLY USED FOR Z80 INT MODE 1 +; +;______________________________________________________________________________________________________________________ +; +; +; BIT READ WRITE +; 0 TICK BIT 0 +; 1 TICK BIT 1 +; 2 +; 3 +; 4 +; 5 +; 6 +; 7 INT REQ ACT INT ENABLE +; +#IF (INTMODE == 1) +; + DEVECHO "SCTIM: IO=" + DEVECHO SCTIMIO +; + DEVECHO "\n" +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_SCTIM .EQU $ +; + .DW SIZ_SCTIM ; MODULE SIZE + .DW SCTIM_INITPHASE ; ADR OF INIT PHASE HANDLER +; +SCTIM_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,SCTIM_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,SCTIM_INIT ; DO INIT + RET ; DONE +; +;================================================================================================== +; SCTIM PRE-INITIALIZATION +; +; CHECK TO SEE IF A SCTIM EXISTS. IF IT EXISTS, ALL FOUR SCTIM CHANNELS ARE PROGRAMMED TO: +; INTERRUPTS DISABLED, COUNTER MODE, RISING EDGE TRIGGER, RESET STATE. +; +; IF THE SCTIMTIMER CONFIGURATION IS SET, THEN A PERIOD INTERRUPT TIMER IS SET UP USING SCTIM CHANNELS +; 2 (SCTIMPRECH) & 3 (SCTIMTIMCH). THE TIMER WILL BE SETUP TO 50 OR 60HZ DEPENDING ON CONFIGURATION +; SETTING TICKFREQ. CHANNEL 3 WILL GENERATE THE TICK INTERRUPT.. +;================================================================================================== +; +SCTIM_PREINIT: + ; BLINDLY RESET THE SCTIM ASSUMING IT IS THERE. + XOR A + OUT (SCTIMIO),A +; + CALL SCTIM_DETECT ; DO WE HAVE ONE? + LD (SCTIM_EXIST),A ; SAVE IT + RET NZ ; ABORT IF NONE +; + LD HL,SCTIM_INT + CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST +; + XOR A + RET +; +;================================================================================================== +; DRIVER INITIALIZATION +;================================================================================================== +; +SCTIM_INIT: + ; ANNOUNCE PORT + CALL NEWLINE ; FORMATTING + PRTS("SCTIM:$") ; FORMATTING +; + PRTS(" IO=0x$") ; FORMATTING + LD A,SCTIMIO ; GET BASE PORT + CALL PRTHEXBYTE ; PRINT BASE PORT +; + LD A,(SCTIM_EXIST) ; IS IT THERE? + OR A ; 0 MEANS YES + JR Z,SCTIM_INIT1 ; CONTINUE TO ENABLE IT +; + ; NOTIFY NO SCTIM HARDWARE + PRTS(" NOT PRESENT$") + OR $FF + RET +; +SCTIM_INIT1: + ; ENABLE THE TIMER + OR $FF ; $FF TO ACCUM + OUT (SCTIMIO),A ; ENABLE INTS + XOR ; SIGNAL SUCCESS + RET ; DONE +; +;================================================================================================== +; INTERRUPT HANDLER +;================================================================================================== +; +SCTIM_INT: + IN A,(SCTIMIO) ; READ PORT + RLA ; INT ACT BIT TO CF + JR NC,SCTIM_INT1 ; IF ACTIVE, CONTINUE + XOR A ; SIGNAL INT NOT HANDLED + RET ; AND RETURN +; +SCTIM_INT1: + ; PROCESS THE INTERRUPT + XOR A ; ZERO ACCUM + OUT (SCTIMIO),A ; ENABLE OFF + DEC A ; $FF TO ACCUM + OUT (SCTIMIO),A ; ENABLE BACK ON + JP HB_TIMINT ; CHAIN TO TIMER PROCESSING +; +;================================================================================================== +; DETECT SCTIM BY READING PORT FOR AT LEAST 20MS LOOKING FOR A VALUE +; CHANGE. +;================================================================================================== +; +; WE ASSUME A WORST CASE OF 30MHZ CPU CLOCK +; +; 20MS = 20000US. AT 1 MHZ, 1US = 1TS. AT 30MHZ, 1US = 30TS +; SO, 30TS * 20000US = 600000TS TOTAL +; EACH LOOP IS 46TS, SO 600000TS / 48TS = 12,500 LOOPS +; +SCTIM_DETECT: + LD BC,12500 ; LOOP CONTROL + IN A,(SCTIMIO) ; READ STARTING VALUE + LD E,A ; PUT IN E +SCTIM_DETECT1: + IN A,(SCTIMIO) ; READ VALUE ; 11 + CP E ; CHANGED? ; 4 + JR NZ,SCTIM_DETECT2 ; HANDLE SUCCESS ; 7 + INC BC ; INC LOOP CONTROL ; 6 + LD A,B ; CHECK FOR ; 4 + OR C ; ... LOOP TIMEOUT ; 4 + JR NZ,SCTIM_DETECT1 ; LOOP TILL EXHAUSTED ; 12, TOTAL: 48 + OR $FF ; SIGNAL FAILURE + RET ; AND DONE +SCTIM_DETECT2: + XOR A ; SIGNAL SUCCESS + RET ; DONE +; +; SCTIM DRIVER DATA STORAGE +; +SCTIM_EXIST .DB $FF ; SET TO ZERO IF EXISTS +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_SCTIM .EQU $ +SIZ_SCTIM .EQU END_SCTIM - ORG_SCTIM +; + MEMECHO "SCTIM occupies " + MEMECHO SIZ_SCTIM + MEMECHO " bytes.\n" +; +#ELSE + .ECHO "*** WARNING: SCTIM TIMER DISABLED -- ONLY INTMODE 1 SUPPORTED!!!\n" +#ENDIF + diff --git a/Source/HBIOS/sd.asm b/Source/HBIOS/sd.asm index f7261325..e354bb43 100644 --- a/Source/HBIOS/sd.asm +++ b/Source/HBIOS/sd.asm @@ -317,10 +317,14 @@ SD_INVCS .EQU FALSE ; INVERT CS ; shield attached and are the ones also used in other bitbang setups ; directly attached to a PIO. It also works on a straight digital I/O ; port as the config writes will disappear into oblivion harmlessly -; +; ; The Gluino mapping (ie Arduino pin mapping equivalent) is thus ; D10 SS, D11 CIPO, D12 COPI, D13 SCL. ; +; This config also works for Steve Cousins SD Card Boards such as +; SC611 and SC734. These cards do not require DDR manipulation, +; but the DDR writes are benign at this point. +; ; For speed reasons MISO/MOSI are mapped to the top and bottom bits. ; RomWBW doesn't yet use this fact but the optimized Fuzix routines do. ; diff --git a/Source/HBIOS/sn76489.asm b/Source/HBIOS/sn76489.asm index 4f9abda2..ba3e8276 100644 --- a/Source/HBIOS/sn76489.asm +++ b/Source/HBIOS/sn76489.asm @@ -34,7 +34,7 @@ SN76489_PORT_RIGHT .EQU $FB ; PORTS FOR ACCESSING THE SN76489 CHIP (RIGHT) #IF (SNMODE == SNMODE_DUO) SN76489_PORT_LEFT .EQU $BE ; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT) SN76489_PORT_RIGHT .EQU $BF ; PORTS FOR ACCESSING THE SN76489 CHIP (RIGHT) - DEVECHO "RC" + DEVECHO "DUO" #ENDIF ; DEVECHO ", IO_LEFT=" diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm index c454558c..97cf5cf7 100644 --- a/Source/HBIOS/std.asm +++ b/Source/HBIOS/std.asm @@ -694,13 +694,14 @@ CPUMHZ .EQU CPUKHZ / 1000 ; CPU FREQ IN MHZ ; #IF (BIOS == BIOS_WBW) ; -TM_NONE .EQU 0 -TM_CTC .EQU 1 -TM_TMS .EQU 2 -TM_SIMH .EQU 3 -TM_Z180 .EQU 4 -TM_Z280 .EQU 5 -TM_EZ80 .EQU 6 +TM_NONE .EQU 0 +TM_CTC .EQU 1 +TM_TMS .EQU 2 +TM_SIMH .EQU 3 +TM_Z180 .EQU 4 +TM_Z280 .EQU 5 +TM_EZ80 .EQU 6 +TM_SCTIM .EQU 7 ; SYSECHO "SYSTEM TIMER:" SYSTIM .EQU TM_NONE @@ -711,6 +712,11 @@ SYSTIM .SET TM_CTC SYSECHO " CTC" #ENDIF #ENDIF +; + #IF (SCTIMENABLE & (INTMODE == 1)) +SYSTIM .SET TM_SCTIM + SYSECHO " SCTIM" + #ENDIF ; #IF (TMSENABLE & (INTMODE > 0)) #IF (TMSTIMENABLE)