@ -28,7 +28,7 @@
; NOTES: ; NOTES:
; ;
; - WHEN SETTING REGISTERS, YOU FIRST WRITE THE VALUE FOLLOWED BY ; - WHEN SETTING REGISTERS, YOU FIRST WRITE THE VALUE FOLLOWED BY
; THE ACTUAL VALUE . IF A TMS VDP INTERRUPT OCCURS BETWEEN THESE
; THE REGISTER NUMBER . IF A TMS VDP INTERRUPT OCCURS BETWEEN THESE
; TWO PORT OUTPUTS, IT WILL DISRUPT THE SEQUENCE. IF VDP INTS ; TWO PORT OUTPUTS, IT WILL DISRUPT THE SEQUENCE. IF VDP INTS
; ARE ACTIVE, THEN INTS MUST BE DISABLED WHEN SETTING REGISTERS. ; ARE ACTIVE, THEN INTS MUST BE DISABLED WHEN SETTING REGISTERS.
; ;
@ -38,19 +38,13 @@
; TUNED DEPENDING ON SPEED OF SYSTEM CPU. THE V9958 HAS A /WAIT ; TUNED DEPENDING ON SPEED OF SYSTEM CPU. THE V9958 HAS A /WAIT
; PIN THAN CAN BE CONNECTED TO THE CPU. IF THIS IS USED, THEN ; PIN THAN CAN BE CONNECTED TO THE CPU. IF THIS IS USED, THEN
; THE SOFTWARE WAITS CAN POTENTIALLY BE DISABLED. HOWEVER, I ; THE SOFTWARE WAITS CAN POTENTIALLY BE DISABLED. HOWEVER, I
; HAVE NOT HAD SUCCESS WITH THIS IN PRACTICE.
;
; - THE TMS80COLS EQUATE IS CURRENTLY OVERLOADED. IF IT IS NOT SET
; ON A 9958 CHIP, THEN THE CODE WILL TREAT THE 9958 AS THOUGH IT
; IS A 9918 AND MAY NOT WORK WELL (FOR EXAMPLE, DELAYS WILL BE
; WRONG).
; HAVE NOT HAD SUCCESS WITH THIS IN PRACTICE. SEE THE TMS_IODELAY
; MACRO BELOW TO ADJUST THE DELAY.
; ;
;====================================================================== ;======================================================================
; TMS DRIVER - CONSTANTS ; TMS DRIVER - CONSTANTS
;====================================================================== ;======================================================================
; ;
;
;
; 40 Column Video Memory Map ; 40 Column Video Memory Map
; ----------------------------------- ; -----------------------------------
; Start Length ; Start Length
@ -243,28 +237,39 @@ USBKYBENABLE .SET TRUE ; INCLUDE USB KEYBOARD SUPPORT
# ENDIF # ENDIF
DEVECHO "\n" DEVECHO "\n"
; ;
; TMS_IODELAY IS USED TO ADD RECOVERY TIME TO TMS9918/V9958 ACCESSES
; IF YOU SEE SCREEN CORRUPTION, ADJUST THIS!!!
; TMS_IODELAY IS USED TO ADD REQUIRED RECOVERY TIME TO TMS9918/V9958 I/O.
; THE DELAYS DEFINED BELOW ARE PRETTY CONSERVATIVE AND WILL PROBABLY BE
; OK FOR THE V9958 (SLOWEST VDP).
; IF YOUR VDP IS NOT DETECTED OR YOU SEE SCREEN CORRUPTION, YOU MAY NEED
; TO INCREASE THE DELAY.
; DEPENDING ON YOUR SYSTEM AND YOUR VDP CHIP, YOU MAY BE ABLE TO
; DECREASE THE DELAY.
; ;
# IF ( CPUFAM = = CPU_Z180 )
; BELOW WAS TUNED FOR Z180 AT 18MHZ
;#DEFINE TMS_IODELAY EX (SP),HL \ EX (SP),HL ; 38 T/S
;#DEFINE TMS_IODELAY EX (SP),HL \ EX (SP),HL \ EX (SP),HL \ EX (SP),HL \ EX (SP),HL \ EX (SP),HL ; 76 T/S
# DEFINE TMS_IODELAY CALL DL Y4 ; 100 T/S
;#DEFINE TMS_IODELAY NOP \ NOP \ NOP \ NOP \ NOP ; 20 T/S ### JLC Mod for Clock/2 (9 MHz) ###
# IF ( CPUMHZ > 10 )
# DEFINE TMS_IODELAY CALL DL Y4 ; 100 T/S
# ELSE # ELSE
# IF ( PLATFORM = = PLT_MSX )
# DEFINE TMS_IODELAY EX ( SP ), HL \ EX ( SP ), HL
# ELSE
; BELOW WAS TUNED FOR Z80 AT 8MHZ
# IF ( TMS80COLS )
# DEFINE TMS_IODELAY NOP \ NOP \ NOP \ NOP \ NOP \ NOP \ NOP ; V9958 NEEDS AT WORST CASE, APPROX 4us (28T) DELAY BETWEEN I/O (WHEN IN TEXT MODE)
# ELSE
# DEFINE TMS_IODELAY NOP \ NOP ; 8 T/S
# ENDIF
# ENDIF
# ENDIF
# DEFINE TMS_IODELAY EX ( SP ), HL \ EX ( SP ), HL ; 38 T/S
# ENDIF
;
;;;#IF (CPUFAM == CPU_Z180)
;;; ; BELOW WAS TUNED FOR Z180 AT 18MHZ
;;; ;#DEFINE TMS_IODELAY EX (SP),HL \ EX (SP),HL ; 38 T/S
;;; ;#DEFINE TMS_IODELAY EX (SP),HL \ EX (SP),HL \ EX (SP),HL \ EX (SP),HL \ EX (SP),HL \ EX (SP),HL ; 76 T/S
;;; #DEFINE TMS_IODELAY CALL DLY4 ; 100 T/S
;;;
;;; ;#DEFINE TMS_IODELAY NOP \ NOP \ NOP \ NOP \ NOP ; 20 T/S ### JLC Mod for Clock/2 (9 MHz) ###
;;;#ELSE
;;; #IF (PLATFORM == PLT_MSX)
;;; #DEFINE TMS_IODELAY EX (SP),HL \ EX (SP),HL
;;; #ELSE
;;; ; BELOW WAS TUNED FOR Z80 AT 8MHZ
;;; #IF (TMS80COLS)
;;; #DEFINE TMS_IODELAY NOP \ NOP \ NOP \ NOP \ NOP \ NOP \ NOP ; V9958 NEEDS AT WORST CASE, APPROX 4us (28T) DELAY BETWEEN I/O (WHEN IN TEXT MODE)
;;; #ELSE
;;; #DEFINE TMS_IODELAY NOP \ NOP ; 8 T/S
;;; #ENDIF
;;; #ENDIF
;;;#ENDIF
; ;
;-------------------------------------------------------------------------------------------------- ;--------------------------------------------------------------------------------------------------
; HBIOS MODULE HEADER ; HBIOS MODULE HEADER
@ -724,11 +729,16 @@ TMS_READ:
;---------------------------------------------------------------------- ;----------------------------------------------------------------------
; ;
TMS_SET: TMS_SET:
; NORMALLY, WE WRAP REG CHANGES WITH DI/EI TO AVOID CONFLICTS
# IF TMSTIMENABLE
; IF WE ARE USING THE VDP VB TIMER INTERRUPT, WE NEED TO
; DISABLE INTERRUPTS DURING THE PAIR OF OUTPUS FOR A REGISTER
; WRITE. IF A VDP INTERRUPT OCCURS BETWEEN THE 2 I/O FOR A
; REGISTER WRITE, THEN IT WILL FAIL.
HB_DI HB_DI
CALL TMS_SET_X CALL TMS_SET_X
HB_EI HB_EI
RET RET
# ENDIF
; ;
TMS_SET_X: TMS_SET_X:
; ENTRY POINT W/O INT MGMT NEEDED BY TMS_PREINIT ; ENTRY POINT W/O INT MGMT NEEDED BY TMS_PREINIT
@ -749,20 +759,6 @@ TMS_SET_X:
;---------------------------------------------------------------------- ;----------------------------------------------------------------------
; ;
TMS_WR: TMS_WR:
# IF ( TMS80COLS )
; CLEAR R#14 FOR V9958
HB_DI
XOR A
EZ80_IO
OUT ( TMS_CMDREG ), A
TMS_IODELAY
LD A , $ 80 | 14
EZ80_IO
OUT ( TMS_CMDREG ), A
TMS_IODELAY
HB_EI
# ENDIF
PUSH HL PUSH HL
SET 6 , H ; SET WRITE BIT SET 6 , H ; SET WRITE BIT
CALL TMS_RD CALL TMS_RD
@ -770,7 +766,10 @@ TMS_WR:
RET RET
; ;
TMS_RD: TMS_RD:
# IF TMSTIMENABLE
; SEE COMMENTS FROM TMS_SET ROUTINE
HB_DI HB_DI
# ENDIF
LD A , L LD A , L
EZ80_IO EZ80_IO
OUT ( TMS_CMDREG ), A OUT ( TMS_CMDREG ), A
@ -779,7 +778,9 @@ TMS_RD:
EZ80_IO EZ80_IO
OUT ( TMS_CMDREG ), A OUT ( TMS_CMDREG ), A
TMS_IODELAY TMS_IODELAY
# IF TMSTIMENABLE
HB_EI HB_EI
# ENDIF
RET RET
; ;
;---------------------------------------------------------------------- ;----------------------------------------------------------------------
@ -1083,7 +1084,7 @@ VRAMSIZE_DONE:
OUT ( C ), A ; DISABLE EXANSION MEMORY ACCESS OUT ( C ), A ; DISABLE EXANSION MEMORY ACCESS
CALL DL Y64 ; DELAY CALL DL Y64 ; DELAY
LD A , $ 80 | 45 LD A , $ 80 | 45
OUT ( C ), A ; R#45 = $00 (MXC=0, MXD,MXS,DIY,DIX,EQ,MAJ=0)
OUT ( C ), A ; R#45 = $00 (MXC=0, MXD,MXS,DIY,DIX,EQ,MAJ=0)
CALL DL Y64 ; DELAY CALL DL Y64 ; DELAY
XOR A XOR A
@ -1100,6 +1101,8 @@ VRAMSIZE_DONE:
; TMS9918 DISPLAY CONTROLLER CHIP INITIALIZATION ; TMS9918 DISPLAY CONTROLLER CHIP INITIALIZATION
;---------------------------------------------------------------------- ;----------------------------------------------------------------------
; ;
; THIS ASSUMES THAT THE CHIP DETECTION HAS BEEN DONE
;
TMS_CRTINIT: TMS_CRTINIT:
; SET WRITE ADDRESS TO $0000 Beginning of VRAM ; SET WRITE ADDRESS TO $0000 Beginning of VRAM
LD HL , 0 LD HL , 0
@ -1130,12 +1133,25 @@ TMS_CRTINIT2:
INC C ; POINT TO NEXT REGISTER INC C ; POINT TO NEXT REGISTER
DJNZ TMS_CRTINIT2 ; LOOP DJNZ TMS_CRTINIT2 ; LOOP
; ;
; ENABLE WAIT SIGNAL IF 9938/58
# IF ( TMS80COLS )
; ENABLE WAIT SIGNAL IF V9958
LD A ,( TMS_VDPID ) ; GET VDP ID
CP TMSVDP_V9958 ; V9958?
JR NZ , TMS_CRTINIT3 ; IF NOT, SKIP
LD C , 25 ; REGISTER 25 LD C , 25 ; REGISTER 25
LD A , % 00000100 ; ONLY WTE BIT SET LD A , % 00000100 ; ONLY WTE BIT SET
CALL TMS_SET ; DO IT CALL TMS_SET ; DO IT
# ENDIF
;
TMS_CRTINIT3:
; RESET VRAM BASE ADDRESS FOR ALL CHIPS OTHER
; THAN BASIC TMS9918
LD A ,( TMS_VDPID ) ; GET VDP ID
CP TMSVDP_TMS9918 ; TMS9918?
JR Z , TMS_CRTINIT4 ; IF SO, SKIP
LD C , 14 ; REGISTER 14
XOR A ; VALUE 0
CALL TMS_SET ; DO IT
;
TMS_CRTINIT4:
RET RET
; ;
;---------------------------------------------------------------------- ;----------------------------------------------------------------------
Wayne Warthen
3 days ago