diff --git a/Source/HBIOS/sd.asm b/Source/HBIOS/sd.asm
index 3612b24b..9afe6c81 100644
--- a/Source/HBIOS/sd.asm
+++ b/Source/HBIOS/sd.asm
@@ -1334,10 +1334,11 @@ SD_INITCMD1:
 	INC	HL			; POINT TO NEXT BYTE
 	LD	(HL),A			; CLEAR IT
 	DJNZ	SD_INITCMD1		; LOOP TILL DONE
-	; CRC POSITION SHOULD BE COMPLETELY IGNORED BECAUSE WE DON'T
-	; ENABLE IT AND WE ARE IN SPI MODE.  HOWEVER, AT LEAST ONE SD
-	; CARD IS KNOWN TO FAIL ANY COMMAND WHERE THE CRC POSITION
-	; IS NOT $FF!  SO, BELOW WE STUFF THE CRC POSITION WITH $FF.
+	; THE CRC POSITION IS ACTUALLY 7 BITS OF CRC (HIGH BITS) AND
+	; 1 BIT INDICATING END OF COMMAND.  MOST CARDS DON'T REALLY
+	; CARE ABOUT THE END OF COMMAND BIT, BUT I HAVE WORKED WITH
+	; AT LEAST ONE PERSON THAT HAD A CARD THAT NEEDED THIS.
+	; SO, BELOW WE STUFF THE CRC POSITION WITH $FF.
 	DEC	A			; $FF TO ACCUM
 	LD	(SD_CMDCRC),A		; PUT $FF IN CRC POSITION
 	RET
diff --git a/Source/ZZR/Build.cmd b/Source/ZZR/Build.cmd
index 6b1fe5f6..255b0870 100644
--- a/Source/ZZR/Build.cmd
+++ b/Source/ZZR/Build.cmd
@@ -3,10 +3,12 @@ setlocal
 
 if not exist ..\..\Binary\RCZ280_nat_zzr.rom goto :eof
 
-..\..\Tools\srecord\srec_cat.exe ..\..\Binary\RCZ280_nat_zzr.rom -Binary -Exclude 0x5000 0x7000 zzr_romldr.hex -Intel -Output ..\..\Binary\RCZ280_nat_zzr.hex -Intel
+rem ..\..\Tools\srecord\srec_cat.exe ..\..\Binary\RCZ280_nat_zzr.rom -Binary -Exclude 0x5000 0x7000 zzr_romldr.hex -Intel -Output ..\..\Binary\RCZ280_nat_zzr.hex -Intel
 
-..\..\Tools\srecord\srec_cat.exe ..\..\Binary\RCZ280_nat_zzr.hex -Intel -Output ..\..\Binary\RCZ280_nat_zzr_ldr.rom -Binary
+rem ..\..\Tools\srecord\srec_cat.exe ..\..\Binary\RCZ280_nat_zzr.hex -Intel -Output ..\..\Binary\RCZ280_nat_zzr_ldr.rom -Binary
 
-copy /b zzr_cfldr.bin + zzr_ptbl.bin + zzr_fill_1.bin + zzr_mon.bin + zzr_fill_2.bin + ..\..\Binary\RCZ280_nat_zzr_ldr.rom + zzr_fill_3.bin ..\..\Binary\hd1024_zzr_prefix.dat
+rem copy /b zzr_cfldr.bin + zzr_ptbl.bin + zzr_fill_1.bin + zzr_mon.bin + zzr_fill_2.bin + ..\..\Binary\RCZ280_nat_zzr_ldr.rom + zzr_fill_3.bin ..\..\Binary\hd1024_zzr_prefix.dat
+
+copy /b zzr_cfldr.bin + zzr_ptbl.bin + zzr_fill_1.bin + zzr_mon.bin + zzr_fill_2.bin + ..\..\Binary\RCZ280_nat_zzr.rom + zzr_fill_3.bin ..\..\Binary\hd1024_zzr_prefix.dat
 
 copy /b ..\..\Binary\hd1024_zzr_prefix.dat + ..\..\Binary\hd1024_cpm22.img + ..\..\Binary\hd1024_zsdos.img + ..\..\Binary\hd1024_nzcom.img + ..\..\Binary\hd1024_cpm3.img + ..\..\Binary\hd1024_zpm3.img + ..\..\Binary\hd1024_ws4.img ..\..\Binary\hd1024_zzr_combo.img
\ No newline at end of file
diff --git a/Source/ZZR/Makefile b/Source/ZZR/Makefile
index 7de1e4e0..659a8a49 100644
--- a/Source/ZZR/Makefile
+++ b/Source/ZZR/Makefile
@@ -9,9 +9,9 @@ HD1024IMGS = ../../Binary/hd1024_cpm22.img ../../Binary/hd1024_zsdos.img ../../B
 
 OBJECTS :=
 
-
 ifneq ($(wildcard $(ZZRROM)),)
-	OBJECTS +=  $(ZZRROMHEX)  $(ZZRLDRROM) $(HD1024ZZRPREFIX) $(HD1024ZZZROMBOIMG)
+#	OBJECTS +=  $(ZZRROMHEX) $(ZZRLDRROM) $(HD1024ZZRPREFIX) $(HD1024ZZZROMBOIMG)
+	OBJECTS +=  $(HD1024ZZRPREFIX) $(HD1024ZZZROMBOIMG)
 endif
 
 DEST=../../Binary
@@ -23,7 +23,8 @@ include $(TOOLS)/Makefile.inc
 DIFFPATH = $(DIFFTO)/Binary
 
 $(HD1024ZZRPREFIX):
-	cat zzr_cfldr.bin zzr_ptbl.bin zzr_fill_1.bin zzr_mon.bin zzr_fill_2.bin $(ZZRLDRROM) zzr_fill_3.bin >$@
+#	cat zzr_cfldr.bin zzr_ptbl.bin zzr_fill_1.bin zzr_mon.bin zzr_fill_2.bin $(ZZRLDRROM) zzr_fill_3.bin >$@
+	cat zzr_cfldr.bin zzr_ptbl.bin zzr_fill_1.bin zzr_mon.bin zzr_fill_2.bin $(ZZRROM) zzr_fill_3.bin >$@
 
 $(HD1024ZZZROMBOIMG): $(HD1024ZZRPREFIX) $(HD1024IMGS)
 	cat $^ > $@
diff --git a/Source/ZZR/ZZR Disk Layout.txt b/Source/ZZR/ZZR Disk Layout.txt
index e6e32913..6042edde 100644
--- a/Source/ZZR/ZZR Disk Layout.txt	
+++ b/Source/ZZR/ZZR Disk Layout.txt	
@@ -9,21 +9,15 @@ Start   Length  Sector  Count   Description
 0x64000 0x9C000 0x320   0x4E0   Filler
 0x100000        0x800           Slices
 
-Must insert zzr_romldr.bin at 0x5000-x5FFF of ROM image.  This is also 0x29000-0x29FFF of CF image.
-
 Notes
 -----
 
 - At startup CPLD ROM is mapped to Z80 CPU address space 0x0000-0x003F, CPU begins execution at 0x0000
-- CPLD ROM (CF bootstrap mode) loads CF Boot Loader (256B) at 0xB000 and runs it
-- CF Boot Loader loads ZZRCC Monitor at 0xB400 and runs it
-- Monitor (Boot RomWBW) loads ZZRCC RomWBW Loader hex file at 0x5000, then runs it
-- RomWBW Loader loads RomWBW ROM image to contents of RAM, then runs it
-
-
-;;- ZZRCC Monitor reads 512KB (RomWBW) from sectors 0x120-0x51F of CF into first 512KB of RAM
+- CPLD ROM (CF bootstrap mode) loads CF Boot Loader (256B) to 0xB000 and runs it
+- CF Boot Loader loads ZZRCC Monitor to 0xB000 and runs it starting at address 0xB400
+- Monitor (Boot RomWBW) loads RomWBW ROM image to first 8 banks of RAM, then runs it starting at address 0x000
 
-Possible new layout:
+Possible alternative layout:
 
 Start   Length  Sector  Count   Description
 ------- ------- ------- ------- -----------------------------------------
diff --git a/Source/ZZR/zzr_mon.bin b/Source/ZZR/zzr_mon.bin
index d9bbfcca..e9a04d74 100644
Binary files a/Source/ZZR/zzr_mon.bin and b/Source/ZZR/zzr_mon.bin differ
diff --git a/Source/ZZR/zzr_romldr.hex b/Source/ZZR/zzr_romldr.hex
deleted file mode 100644
index e670752e..00000000
--- a/Source/ZZR/zzr_romldr.hex
+++ /dev/null
@@ -1,99 +0,0 @@
-:06500000C31850C30C525E
-:1050180031005FCD0F53218855CD0653CD3253FE55
-:105028003ACA2E5018F6210000220850CDCD52570A
-:105038004F47CDCD52678047CDCD526F8047CDCDFC
-:1050480052FE00CA9050FE01CA7E50FE04C2F950BA
-:1050580080477AFE02C2F950CDCD523209508047BE
-:10506800CDCD523208508047CDCD52ED44B8C2F56F
-:10507800503E45C3F050CDCD52212356CD0653CDD9
-:105088000851CD1B53C300008047DD210060CDCD02
-:1050980052DD77008047DD2315C29650CDCD52ED05
-:1050A80044B8C2F550CD1553E50600C50E1F21E0E2
-:1050B800F0EDBF0E1CE1EDBF0E1B216F00EDBF0E22
-:1050C8001A2100F0EDBF0E193A085067D16A3E0F59
-:1050D800B5EDBF0E18626B3EF0B4EDBF2180800EB7
-:1050E8001DEDBFCD0F533E2ECD3C5318093E3F1842
-:1050F800F73E55CD3C53CD3253FE3A20F9C33450D8
-:10510800AF320C503E01320D50116855CD1B53AFD4
-:10511800D3153EE0D3160E102147533A0D50D31441
-:105128003A0C50D3133E01D3123E30D317DB17E6A7
-:1051380008CA355106007EED79237ABC20057BBD6F
-:1051480020012B0520F07EED79237ABC20057BBD5C
-:1051580020012B0520F0DB17E680C25E513A0C5087
-:105168003C320C50FE20C22351AF320E50210A00AF
-:10517800CD15533E0AD3F10EF5EDBF3E1AD3F10E0D
-:10518800F5EDBFCD1B53AFD3153EE0D3160E10215E
-:1051980000A03A0D50D3143A0C50D3133E01D31249
-:1051A8003E30D317DB17E608CAAC510600EDB3ED65
-:1051B800B3DB17E680C2B9513A0C503C320C502090
-:1051C800073A0D503C320D503EB0BC20C53A0E5047
-:1051D8003C320E50FAF551260017CB1417CB141792
-:1051E800CB1417CB14E6F0F60A6FC37851CD1553DC
-:1051F80021AA003E0AD3F10EF5EDBF3E1AD3F10EF7
-:10520800F5EDBFC931005FCD0F53210356CD0653CD
-:105218003E20320A503E01320B50AF320E50210A66
-:1052280000CD15533E06D3F10EF5EDBF3E16D3F172
-:105238000EF5EDBFCD1B53AFD3153EE0D3160E10C0
-:105248002100603A0B50D3143A0A50D3133E01D3CD
-:10525800123E20D317DB17E608CA5D520600EDB2EE
-:10526800EDB23A0A503C320A5020073A0B503C3211
-:105278000B503E70BC20CC18083A0A50C608320AB7
-:10528800503A0E503C320E50FAB152FE0528EAFE52
-:105298000628E6260017CB1417CB1417CB1417CB08
-:1052A80014E6F0F60A6FC32952CD1553216A003E61
-:1052B80006D3F10EF5EDBF3E16D3F10EF5EDBFCDD9
-:1052C8001B53C30000D5CD3253CDE2520707070761
-:1052D80057CD3253CDE252B2D1C9D630FA0253FE7D
-:1052E8000AF8D611FA0053C60AFE10F8D62AFAFEB2
-:1052F80052C60AFE10F8C616C611C630BFC97EB718
-:10530800C8CD3C532318F7E52EFEC31E53E52EFFE8
-:10531800C31E53E52E00C50E08ED6EC1E1C9DB14AE
-:10532800E610CA2653DB16D318C9DB14E610CA32B6
-:1053380053DB16C9F5DB121FD23D53F1D318C90050
-:10534800524F4D5742572020494D470100008004D5
-:1053580000050006000700080009000A000B00000D
-:10536800524F4D5742572020494D47030000800CAB
-:10537800000D000E000F00100011001200130000B5
-:10538800524F4D5742572020494D47050000801481
-:1053980000150016001700180019001A001B00005D
-:1053A800524F4D5742572020494D47070000801C57
-:1053B800001D001E001F0020002100220023000005
-:1053C800524F4D5742572020494D4709000080242D
-:1053D80000250026002700280029002A002B0000AD
-:1053E800524F4D5742572020494D470B0000802C03
-:1053F800002D002E002F0030003100320033000055
-:10540800524F4D5742572020494D470D00008034D8
-:1054180000350036003700380039003A003B0000FC
-:10542800524F4D5742572020494D470F0000803CAE
-:10543800003D003E003F00400041004200430000A4
-:10544800524F4D5742572020494D47110000804484
-:1054580000450046004700480049004A004B00004C
-:10546800524F4D5742572020494D47130000804C5A
-:10547800004D004E004F00500051005200530000F4
-:10548800524F4D5742572020494D47150000805430
-:1054980000550056005700580059005A005B00009C
-:1054A800524F4D5742572020494D47170000805C06
-:1054B800005D005E005F0060006100620063000044
-:1054C800524F4D5742572020494D471900008064DC
-:1054D80000650066006700680069006A006B0000EC
-:1054E800524F4D5742572020494D471B0000806CB2
-:1054F800006D006E006F0070007100720073000094
-:10550800524F4D5742572020494D471D0000807487
-:1055180000750076007700780079007A007B00003B
-:10552800524F4D5742572020494D471F0000807C5D
-:10553800007D007E007F00800081008200830000E3
-:10554800524F4D5742572020494D47000001000057
-:10555800000000000000000000000000000000E55E
-:105568000A001A002A003A004A005A006A007A0023
-:105578008A009A00AA00BA00CA00DA00EA00FA0013
-:105588000A0D20524F4D574257204C6F6164657287
-:105598002076302E320D0A20526561647920746FAE
-:1055A8002061636365707420524F4D5742572068DD
-:1055B80065782066696C650D0A205768656E2066F7
-:1055C800696C65206C6F616420636F6D706C6574C5
-:1055D80065642C20636F70792066696C6520746F30
-:1055E80020434620616E64207468656E206A756D7C
-:1055F8007020746F203078300D0A000A0D426F6FEA
-:1056080074696E6720524F4D5742572066726F6D0E
-:0F561800204346206469736B0D0A00580D0A0089
-:00000001FF
diff --git a/Source/ver.inc b/Source/ver.inc
index 628b2e87..e4d09ae7 100644
--- a/Source/ver.inc
+++ b/Source/ver.inc
@@ -2,4 +2,4 @@
 #DEFINE	RMN	1
 #DEFINE	RUP	1
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.1.1-pre.68"
+#DEFINE BIOSVER	"3.1.1-pre.69"
diff --git a/Source/ver.lib b/Source/ver.lib
index 7bdf5117..94ed85c7 100644
--- a/Source/ver.lib
+++ b/Source/ver.lib
@@ -3,5 +3,5 @@ rmn	equ	1
 rup	equ	1
 rtp	equ	0
 biosver	macro
-	db	"3.1.1-pre.68"
+	db	"3.1.1-pre.69"
 	endm