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Merge pull request #247 from b1ackmai1er/dev 

Doc updates and preparation for run time memory resizing
pull/254/head
Wayne Warthen 4 years ago
committed by GitHub
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No known key found for this signature in database GPG Key ID: 4AEE18F83AFDEB23
21 changed files with 211 additions and 86 deletions
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  1. 8
      Source/Doc/Architecture.md
  2. 37
      Source/Doc/GettingStarted.md
  3. 9
      Source/Doc/ROM_Applications.md
  4. 4
      Source/HBIOS/cfg_dyno.asm
  5. 4
      Source/HBIOS/cfg_ezz80.asm
  6. 4
      Source/HBIOS/cfg_master.asm
  7. 4
      Source/HBIOS/cfg_mbc.asm
  8. 4
      Source/HBIOS/cfg_mk4.asm
  9. 4
      Source/HBIOS/cfg_n8.asm
  10. 4
      Source/HBIOS/cfg_rcz180.asm
  11. 4
      Source/HBIOS/cfg_rcz280.asm
  12. 4
      Source/HBIOS/cfg_rcz80.asm
  13. 4
      Source/HBIOS/cfg_sbc.asm
  14. 4
      Source/HBIOS/cfg_scz180.asm
  15. 4
      Source/HBIOS/cfg_una.asm
  16. 4
      Source/HBIOS/cfg_zeta.asm
  17. 4
      Source/HBIOS/cfg_zeta2.asm
  18. 84
      Source/HBIOS/hbios.asm
  19. 49
      Source/HBIOS/md.asm
  20. 9
      Source/HBIOS/spk.asm
  21. 45
      Source/HBIOS/std.asm

8
Source/Doc/Architecture.md
View File

@ -1462,7 +1462,7 @@ to the corresponding octave and note.
| Ab/G# | 40 | 88 | 136 | 184 | 232 | 280 | 328 | 376 |
| A | 44 | 92 | 140 | 188 | 236 | 284 | 332 | 380 |
### Function 0x54 -- Sound Play SNDPLAY)
### Function 0x54 -- Sound Play (SNDPLAY)
| _Entry Parameters_
| B: 0x54
@ -1476,7 +1476,7 @@ This function applies the previously specified volume and period by
programming the sound chip with the appropriate values. The values
are applied to the specified channel of the chip.
For example, to play a specific note on Audio Device UNit 0,
For example, to play a specific note on Audio Device Unit 0,
the following HBIOS calls would need to be made:
```
@ -1509,7 +1509,7 @@ key aspects of the specific Audio Device.
| B: Count of standard tone channels
| C: Count of noise tone channels
#### SNDQUERY Subfunction 0x02 -- Get current volume setting (SNDQ_VOL)
#### SNDQUERY Subfunction 0x02 -- Get current volume setting (SNDQ_VOL)
| _Entry Parameters_
| B: 0x55
@ -1619,7 +1619,7 @@ System (SYS)
| A: Status (0=OK, else error)
This function performs various forms of a system reset depending on
the value of the subfucntion. See subfunctions below.
the value of the subfunction. See subfunctions below.
#### SYSRESET Subfunction 0x00 -- Internal HBIOS Reset (RESINT)

37
Source/Doc/GettingStarted.md
View File

@ -195,7 +195,8 @@ containing some common applications. This provides a simple
environment for learning to use your system. Be aware that files saved
to the RAM disk (A:) will disappear at the next power on (RAM is
generally not persistent). Also note that attempts to save files to
the ROM disk (B:) will fail because ROM is not writable.
the ROM disk (B:) will fail because ROM is not writable under normal
circumstances.
# General Usage
@ -296,6 +297,38 @@ unit summary table. Since only a single RTC/NVRAM device can exist in
one system, unit numbers are not required nor used for this type of
device.
## Changing Console and Console speed
Your system can support a number of devices for the console. They may
be VDU type devices or serial devices. If you want to change which
device is the console, the ***I*** menu option can be used to choose
the unit and it's speed.
The command format is ```I <u> [<c>]```
where ***u*** is unit to select and ***c*** is the optional baud rate code as listed below.
```
Code | Rate | Code | Rate | Code | Rate | Code | Rate |
------|----------|------|----------|------|----------|------|----------|
0 | 75 | 8 | 1800 | 16 | 28880 | 24 | 460800 |
1 | 150 | 9 | 2400 | 17 | 38400 | 25 | 614400 |
2 | 225 | 10 | 3600 | 18 | 57600 | 26 | 921600 |
3 | 300 | 11 | 4800 | 19 | 76800 | 27 | 1228822 |
4 | 450 | 12 | 7200 | 20 | 115200 | 28 | 1843200 |
5 | 600 | 13 | 9600 | 21 | 153600 | 29 | 2457600 |
6 | 900 | 14 | 14400 | 22 | 230400 | 30 | 3686400 |
7 | 1200 | 15 | 19200 | 23 | 307200 | 31 | 7372800 |
------------------------------------------------------------------------
```
Example: To change current console to 9600 baud
```
I 0 13
```
## Drive Letter Assignment
In legacy CP/M-type operating systems, drive letters were generally
@ -1138,6 +1171,8 @@ From the Boot Loader menu select X (Xmodem Flash Updater) and then
U (Begin Update). Then initiate the Xmodem transfer of the .img or
.upd file.
More information can be found in the ROM Applications document.
# Post Update System Image and Application update process
Once you are satisfied that the ROM is working well, you will need to

9
Source/Doc/ROM_Applications.md
View File

@ -371,13 +371,12 @@ A comprehensive instruction manual is available in the Doc\\Contrib directory.
# TastyBASIC
TastyBASIC offers a minimal implementation of BASIC that is only 2304 bytes in size.
It originates from Li-Chen Wangs Palo Alto Tiny BASIC from around 1976. It's small size suited the
tiny memory capacities of the time. This impementation is by Dimitri Theulings and his
original souce can be found here [https://github.com/dimitrit/tastybasic](https://github.com/dimitrit/tastybasic)
It originates from Li-Chen Wang's Palo Alto Tiny BASIC from around 1976. It's small size suited the tiny memory capacities of the time. This implementation is by Dimitri Theulings and his
original source can be found here [https://github.com/dimitrit/tastybasic](https://github.com/dimitrit/tastybasic)
## Features / Limitations
Integer arithmetic, numbers -32787 to 32767
Integer arithmetic, numbers -32767 to 32767
Singles letter variables A-Z
1-dimensional array support
Strings are not supported
@ -400,6 +399,8 @@ original souce can be found here [https://github.com/dimitrit/tastybasic](https:
- Operator precedence is supported.
Type ***BYE*** to return to the monitor.
# Play a Game
## 2048

4
Source/HBIOS/cfg_dyno.asm
View File

@ -28,8 +28,8 @@ INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
PLT_RAM_R .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
PLT_ROM_R .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

4
Source/HBIOS/cfg_ezz80.asm
View File

@ -28,8 +28,8 @@ INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
PLT_RAM_R .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
PLT_ROM_R .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

4
Source/HBIOS/cfg_master.asm
View File

@ -25,8 +25,8 @@ INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
PLT_RAM_R .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
PLT_ROM_R .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_NONE ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

4
Source/HBIOS/cfg_mbc.asm
View File

@ -28,8 +28,8 @@ INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
PLT_RAM_R .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
PLT_ROM_R .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_MBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)

4
Source/HBIOS/cfg_mk4.asm
View File

@ -28,8 +28,8 @@ INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
PLT_RAM_R .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
PLT_ROM_R .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

4
Source/HBIOS/cfg_n8.asm
View File

@ -28,8 +28,8 @@ INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
PLT_RAM_R .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
PLT_ROM_R .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_N8 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
RAMBIAS .EQU 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
RAMLOC .EQU 0 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE

4
Source/HBIOS/cfg_rcz180.asm
View File

@ -28,8 +28,8 @@ INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
PLT_RAM_R .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
PLT_ROM_R .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

4
Source/HBIOS/cfg_rcz280.asm
View File

@ -28,8 +28,8 @@ INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
PLT_RAM_R .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
PLT_ROM_R .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

4
Source/HBIOS/cfg_rcz80.asm
View File

@ -28,8 +28,8 @@ INTMODE .EQU 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
PLT_RAM_R .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
PLT_ROM_R .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

4
Source/HBIOS/cfg_sbc.asm
View File

@ -28,8 +28,8 @@ INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
PLT_RAM_R .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
PLT_ROM_R .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)

4
Source/HBIOS/cfg_scz180.asm
View File

@ -28,8 +28,8 @@ INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
PLT_RAM_R .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
PLT_ROM_R .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

4
Source/HBIOS/cfg_una.asm
View File

@ -22,8 +22,8 @@ CPUOSC .EQU 18432000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
PLT_RAM_R .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
PLT_ROM_R .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
;
RTCIO .EQU $70 ; RTC LATCH REGISTER ADR
;

4
Source/HBIOS/cfg_zeta.asm
View File

@ -28,8 +28,8 @@ INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
PLT_RAM_R .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
PLT_ROM_R .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)

4
Source/HBIOS/cfg_zeta2.asm
View File

@ -28,8 +28,8 @@ INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
PLT_RAM_R .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
PLT_ROM_R .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

84
Source/HBIOS/hbios.asm
View File

@ -273,7 +273,7 @@ CB_DIAGLVL .DB DIAGLVL ; ROMWBW HBIOS DIAGNOSTIC LEVEL
CB_HEAP .DW 0
CB_HEAPTOP .DW 0
;
; STANDARD BANK ID'S START AT $D8
; STANDARD BANK ID'S START AT $D8. DEFAULT VALUES FOR 512KB SYSTEM WITH NO RESERVED BANKS
;
.FILL (HCB + $D8 - $),0
;
@ -514,21 +514,26 @@ HBX_ROM:
OR A ; SET FLAGS
JP P,HBX_ROM ; BIT 7 INDICATES RAM
OUT (MPCL_ROM),A ; ENSURE ROM PAGE OUT OF MEMORY BEFORE SWITCH
;
#IF (RAMSIZE == 256)
XOR %00000100 ; TOP 32K IS ALWAYS IN FIRST CHIP
#ENDIF
#IF (RAMSIZE == 1024)
XOR %00010000 ; TOP 32K IS ALWAYS IN FIRST CHIP
#ENDIF
HBX_MMMSK .EQU $+1 ; FORCE TOP 32K ; MASK POPULATED
XOR %00000000 ; TO BE IN FIRST CHIP ; DURING INITIALIZATION
;
;#IF (RAMSIZE == 256)
; XOR %00000100 ; TOP 32K IS ALWAYS IN FIRST CHIP
;#ENDIF
;
;#IF (RAMSIZE == 1024)
; XOR %00010000 ; TOP 32K IS ALWAYS IN FIRST CHIP
;#ENDIF
;
OUT (MPCL_RAM),A ; SET RAM PAGE SELECTOR
JR HBX_RAMX
HBX_ROM:
OUT (MPCL_RAM),A ; ENSURE RAM PAGE OUT OF MEMORY BEFORE SWITCH
OUT (MPCL_ROM),A ; SET ROM PAGE SELECTOR
;
HBX_RAMX:
;
#IF (INTMODE == 1)
@ -1054,6 +1059,7 @@ HB_IVT0F: JP HB_BADINT \ .DB 0
;==================================================================================================
;
HB_START:
;
#IFDEF APPBOOT
#IF (MEMMGR == MM_Z280)
LD A,%00000001
@ -1070,7 +1076,7 @@ HB_START:
Z280_BOOTERR .TEXT "\r\n\r\n*** Application mode boot not supported under Z280 native memory management!!!\r\n\r\n$"
#ENDIF
#ENDIF
;
DI ; NO INTERRUPTS
IM 1 ; INTERRUPT MODE 1
;
@ -1308,6 +1314,18 @@ Z280_INITZ:
LD BC,HBX_SIZ
LDIR
;
; RUNTIME MEMORY SIZE ADJUSTMENT
;
#IF (MEMMGR == MM_MBC)
LD HL,HCB + HCB_RAMBANKS ; IN NUMBER OF RAMBANKS DETECTED FOR MBC
LD A,%11101011 ; IS 4 (128KB) OR 16 (512KB) THEN
AND (HL) ; ZERO THE LAST BANK MASK OTHERWISE
JR Z,MB128512 ; CALCULATE THE LAST BANK MASK (BANKS/2)
RRA ; 256K = %00000100, 1024K = %00010000
MB128512:
LD (HBX_MMMSK),A
#ENDIF
;
; IF APPBOOT, RESTORE CURRENT BANK ID
;
#IFDEF APPBOOT
@ -1331,6 +1349,37 @@ Z280_INITZ:
LD DE,0
LD BC,$8000
CALL HBX_BNKCPY
#IF (1)
;
; POPULATE THE CRITICAL RAM BANK NUMBERS.
;
; ASSUME THAT CB_RAMBANKS IS THE NUMBER OF 32K RAM BANKS THAT HAS BEEN SET EITHER
; AT ASSEMBLY TIME OR BY PROBING THE ACTUAL AVAILABLE MEMORY (NOT IMPLEMENTED YET).
;
LD A,(CB_RAMBANKS) ; CALCULATE START
DEC A ; RAMBANK AFTER
ADD A,($80 + (PLT_RAM_R / 32)) ; RESERVED BANKS
;
LD HL,CB_BIDCOM
LD B,4
CB_IDS: LD (HL),A ; POPULATE CB_BIDCOM
INC HL ; POPULATE CB_BIDUSR
DEC A ; POPULATE CB_BIDBIOS
DJNZ CB_IDS ; POPULATE CB_BIDAUX
LD A,(CB_BIDUSR)
LD (HB_SRCBNK),A ; POPULATE HB_SRCBNK
LD (HB_DSTBNK),A ; POPULATE HB_DSTBNK
;
LD A,+($80 + (PLT_RAM_R / 32)) ; POPULATE CB_BIDRAMD0 ; START RAMBANK
LD (HL),A
INC HL
;
LD A,(CB_RAMBANKS) ; POPULATE CB_BIDRAMDN ; END RAMBANK
DEC A
SUB TOT_RAM_RB
LD (HL),A
#ENDIF
;
; TRANSITION TO HBIOS IN RAM BANK
;
@ -2041,7 +2090,15 @@ HB_Z280BUS1:
CALL PRTDEC
CALL PRTSTRD
.TEXT "KB ROM, $"
LD HL,RAMSIZE
;
LD HL,(HCB + HCB_RAMBANKS) ; GET NUMBER OF BANKS IN L
LD H,0 ; CALCULATE RAM SIZE
ADD HL,HL
ADD HL,HL ; X4
ADD HL,HL ; X8
ADD HL,HL ; X16
ADD HL,HL ; X32
;
CALL PRTDEC
CALL PRTSTRD
.TEXT "KB RAM$"
@ -2074,7 +2131,7 @@ HB_Z280BUS1:
;
; ROM CHECKSUM VERIFICATION
; EACH OF THE FIRST 4 ROM BANKS HAS A CHECKSUM INJECTED SUCH THAT
; A COMPUTED CHECKSUM ACROSS THE ENTIRE BANK SHOLD ALWAYS BE ZERO
; A COMPUTED CHECKSUM ACROSS THE ENTIRE BANK SHOULD ALWAYS BE ZERO
;
HB_ROMCK:
CALL NEWLINE
@ -3512,7 +3569,8 @@ SYS_GETCPUINFO:
;
SYS_GETMEMINFO:
LD D,ROMSIZE / 32
LD E,RAMSIZE / 32
LD A,(HCB + HCB_RAMBANKS)
LD E,A
XOR A
RET
;

49
Source/HBIOS/md.asm
View File

@ -64,7 +64,7 @@ MD_INIT:
#IF (MDFFENABLE)
CALL MD_FINIT ; PROBE FLASH CAPABILITY
#ENDIF
;
CALL NEWLINE ; FORMATTING
PRTS("MD: UNITS=$")
LD A,MD_DEVCNT
@ -72,14 +72,32 @@ MD_INIT:
;
#IF (MDROM)
PRTS(" ROMDISK=$")
LD HL,ROMSIZE - 128
; LD HL,ROMSIZE - 128
LD A,(HCB + HCB_ROMBANKS) ; GET NUMBER OF BANKS
SUB (TOT_ROM_RB)
LD L,A
LD H,0 ; CALCULATE RAM SIZE
ADD HL,HL ; X2
ADD HL,HL ; X4
ADD HL,HL ; X8
ADD HL,HL ; X16
ADD HL,HL ; X32
CALL PRTDEC
PRTS("KB$")
#ENDIF
;
#IF (MDRAM)
PRTS(" RAMDISK=$")
LD HL,RAMSIZE - 256
; LD HL,RAMSIZE - 256
LD A,(HCB + HCB_RAMBANKS) ; GET NUMBER OF BANKS
SUB (TOT_RAM_RB) ; LESS RESERVED BANKS
LD L,A
LD H,0 ; CALCULATE RAM SIZE
ADD HL,HL ; X2
ADD HL,HL ; X4
ADD HL,HL ; X8
ADD HL,HL ; X16
ADD HL,HL ; X32
CALL PRTDEC
PRTS("KB$")
#ENDIF
@ -170,11 +188,11 @@ MD_CAP: ; ASSUMES THAT UNIT 0 IS RAM, UNIT 1 IS ROM
RET
MD_CAP0:
LD A,(HCB + HCB_RAMBANKS) ; POINT TO RAM BANK COUNT
LD B,4 ; SET # RESERVED ROM BANKS
LD B,TOT_RAM_RB ; SET # RESERVED RAM BANKS
JR MD_CAP2
MD_CAP1:
LD A,(HCB + HCB_ROMBANKS) ; POINT TO ROM BANK COUNT
LD B,8 ; SET # RESERVED RAM BANKS
LD B,TOT_ROM_RB ; SET # RESERVED ROM BANKS
MD_CAP2:
SUB B ; SUBTRACT OUT RESERVED BANKS
LD H,A ; H := # BANKS
@ -756,7 +774,8 @@ MD_TGTDEV .EQU 0B7BFH ; TARGET CHIP FOR R/W FILESYSTEM 39SF040
;======================================================================
;
MD_FINIT:
LD A,+(ROMSIZE/512) ; DISLAY NUMBER
CALL MD_CALCU ; DISPLAY
;
#IF (MD_FVBS==1)
CALL NEWLINE ; OF UNITS
PRTS("MD: FLASH=$")
@ -773,7 +792,8 @@ MD_PROBE:
PUSH BC
#IF (MD_FVBS==1)
CALL PC_SPACE
LD A,+(ROMSIZE/512)+1
CALL MD_CALCU
INC A
SUB B ; PRINT
CALL PRTDECB ; DEVICE
LD A,'=' ; NUMBER
@ -818,6 +838,17 @@ MD_PR1: CALL WRITESTR
XOR A ; INIT SUCCEEDED
RET
;
; CALCULATE NUMBER OF 512KB ROMS FROM NUMBER OF ROM BANKS
;
MD_CALCU:
; LD A,+(ROMSIZE/512) ; DISPLAY NUMBER
LD A,(HCB + HCB_ROMBANKS) ; GET NUMBER OF BANKS
SRL A ; /2 CALCULATE
SRL A ; /4 NUMBER OF 512KB
SRL A ; /8 CHIPS THAT IS
SRL A ; /16
RET
;
;======================================================================
; LOOKUP AND DISPLAY CHIP
;
@ -847,7 +878,7 @@ MD_NXT1:LD A,(HL)
;
INC HL
INC HL
JR FF_NXT2 ; MATCH SO EXIT
JR MD_NXT2 ; MATCH SO EXIT
;
MD_NXT0:PUSH BC ; WE DIDN'T MATCH SO POINT
LD BC,MD_T_SZ ; TO THE NEXT TABLE ENTRY
@ -861,7 +892,7 @@ MD_NXT0:PUSH BC ; WE DIDN'T MATCH SO POINT
;
LD HL,MD_FFMSGUNK ; WE REACHED THE END WITHOUT A MATCH
;
FF_NXT2:
MD_NXT2:
#IF (MD_FVBS==1)
CALL PRTSTR ; AFTER SEARCH DISPLAY THE RESULT
#ENDIF

9
Source/HBIOS/spk.asm
View File

@ -160,14 +160,7 @@ SP_QUERY_DEV:
;======================================================================
;
SP_SETTBL:
LD HL,(CB_CPUKHZ) ; GET CPU SPEED.
LD DE,1000 ; CONVERT TO MHZ
CALL DIV16
;
LD DE,900 ; IF MHZ IS WITHIN 10% OF
SBC HL,DE ; NEXT INTEGER INCREMENT
JP M,SP_SETTBL3 ; THEN BUMP UP. I.E. 9.928MHZ
INC C ; BECOMES 10MHZ
LD BC,(CB_CPUMHZ) ; GET MHZ CPU SPEED (IN C).
;
SP_SETTBL3:
LD B,SP_NOTCNT ; SET NUMBER OF NOTES TO

45
Source/HBIOS/std.asm
View File

@ -488,33 +488,40 @@ SYSTIM .SET TM_Z280
;
; MEMORY BANK CONFIGURATION
;
WBW_ROM_R .EQU 128 ; 128K ; RESERVED ROM REQUIRED FOR ROMWBW
WBW_RAM_R .EQU 256 ; 256K ; RESERVED RAM REQUIRED FOR ROMWBW
TOT_ROM_RB .EQU (PLT_ROM_R + WBW_ROM_R)/32 ; TOTAL ROM BANKS RESERVED
TOT_RAM_RB .EQU (PLT_RAM_R + WBW_RAM_R)/32 ; TOTAL RAM BANKS RESERVED
;
#IF (BIOS == BIOS_UNA)
BID_ROM0 .EQU $0000 + (ROM_RESERVE / 32)
BID_RAM0 .EQU $8000 + (RAM_RESERVE / 32)
BID_ROM0 .EQU $0000 + (PLT_ROM_R / 32)
BID_RAM0 .EQU $8000 + (PLT_RAM_R / 32)
#ENDIF
;
#IF (BIOS == BIOS_WBW)
BID_ROM0 .EQU $00 + (ROM_RESERVE / 32)
BID_RAM0 .EQU $80 + (RAM_RESERVE / 32)
BID_ROM0 .EQU $00 + (PLT_ROM_R / 32)
BID_RAM0 .EQU $80 + (PLT_RAM_R / 32)
#ENDIF
BID_ROMN .EQU (BID_ROM0 + ((ROMSIZE / 32) - 1))
BID_RAMN .EQU (BID_RAM0 + ((RAMSIZE / 32) - 1))
BID_BOOT .EQU BID_ROM0 ; BOOT BANK
BID_IMG0 .EQU BID_ROM0 + 1 ; ROM LOADER AND FIRST IMAGES BANK
BID_IMG1 .EQU BID_ROM0 + 2 ; SECOND IMAGES BANK
;BID_FSFAT .EQU BID_ROM0 + 3 ; FAT FILESYSTEM DRIVER BANK
BID_IMG2 .EQU BID_ROM0 + 3 ; NETWORK BOOT
BID_ROMD0 .EQU BID_ROM0 + 4 ; FIRST ROM DRIVE BANK
BID_ROMDN .EQU BID_ROMN ; LAST ROM DRIVE BANK
BID_RAMD0 .EQU BID_RAM0 ; FIRST RAM DRIVE BANK
BID_RAMDN .EQU BID_RAMN - 4 ; LAST RAM DRIVE BANK
BID_AUX .EQU BID_RAMN - 3 ; AUX BANK (BPBIOS, ETC.)
BID_BIOS .EQU BID_RAMN - 2 ; BIOS BANK
BID_USR .EQU BID_RAMN - 1 ; USER BANK (CP/M TPA, ETC.)
BID_COM .EQU BID_RAMN ; COMMON BANK, UPPER 32K
;
BID_RAMD0 .EQU BID_RAM0 ; FIRST RAM DRIVE BANK ^ RAM
BID_RAMDN .EQU BID_RAMN - 8 ; LAST RAM DRIVE BANK | DRIVE
; ; OS BUFFERS CP/M3? -+ THESE
; ; OS BUFFERS CP/M3? | MAKE
; ; OS BUFFERS CP/M3? | UP
; ; OS BUFFERS CP/M3? | THE
BID_AUX .EQU BID_RAMN - 3 ; AUX BANK (BPBIOS, ETC.) | 256KB
BID_BIOS .EQU BID_RAMN - 2 ; BIOS BANK | RESERVED
BID_USR .EQU BID_RAMN - 1 ; USER BANK (CP/M TPA, ETC.) | RAM
BID_COM .EQU BID_RAMN - 0 ; COMMON BANK, UPPER 32K -+ BANKS
BID_BOOT .EQU BID_ROM0 + 0 ; BOOT BANK -+ THESE MAKE
BID_IMG0 .EQU BID_ROM0 + 1 ; ROM LOADER AND FIRST IMAGES BANK | UP THE 128KB
BID_IMG1 .EQU BID_ROM0 + 2 ; SECOND IMAGES BANK | RESERVED
BID_IMG2 .EQU BID_ROM0 + 3 ; NETWORK BOOT -+ ROM BANKS
BID_ROMD0 .EQU BID_ROM0 + 4 ; FIRST ROM DRIVE BANK | ROM
BID_ROMDN .EQU BID_ROMN ; LAST ROM DRIVE BANK V DRIVE
;
; MEMORY LAYOUT
;

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