remove assembly time memory constraints

Source/HBIOS/cfg_dyno.asm

@@ -28,8 +28,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

Source/HBIOS/cfg_ezz80.asm

@@ -28,8 +28,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_master.asm

@@ -25,8 +25,8 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_NONE		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

Source/HBIOS/cfg_mbc.asm

@@ -28,8 +28,8 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_MBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_mk4.asm

@@ -28,8 +28,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

Source/HBIOS/cfg_n8.asm

@@ -28,8 +28,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_N8		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 RAMBIAS		.EQU	0		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 RAMLOC		.EQU	0		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE

Source/HBIOS/cfg_rcz180.asm

@@ -28,8 +28,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

Source/HBIOS/cfg_rcz280.asm

@@ -28,8 +28,8 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

Source/HBIOS/cfg_rcz80.asm

@@ -28,8 +28,8 @@ INTMODE		.EQU	1		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_sbc.asm

@@ -28,8 +28,8 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_scz180.asm

@@ -28,8 +28,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

Source/HBIOS/cfg_una.asm

@@ -22,8 +22,8 @@ CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 ;
 RTCIO		.EQU	$70		; RTC LATCH REGISTER ADR
 ;

Source/HBIOS/cfg_zeta.asm

@@ -28,8 +28,8 @@ INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_zeta2.asm

@@ -28,8 +28,8 @@ INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
-RAM_RESERVE	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
-ROM_RESERVE	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
+PLT_RAM_R	.EQU	0		; RESERVE FIRST N KB OF RAM (USUALLY 0)
+PLT_ROM_R	.EQU	0		; RESERVE FIRST N KB OR ROM (USUALLY 0)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/md.asm

@@ -774,7 +774,7 @@ MD_TGTDEV	.EQU	0B7BFH		; TARGET CHIP FOR R/W FILESYSTEM 39SF040
 ;======================================================================
 ;
 MD_FINIT:
-	CALL	MD_CALCU			; DISPLAY
+	CALL	MD_CALCU		; DISPLAY
 ;
 #IF (MD_FVBS==1)
 	CALL	NEWLINE			; OF UNITS 

Source/HBIOS/std.asm

@@ -488,15 +488,11 @@ SYSTIM	.SET	TM_Z280
 ;
 ; MEMORY BANK CONFIGURATION
 ;
-; PLT_RAM_R	HOW MUCH RAM NEEDS TO BE RESERVED FOR SPECIFIC PLATFORMS
-; WBW_RAM_R	HOW MUCH RAM NEEDS TO BE RESERVED FOR ROMWBW
-; PLT_ROM_R	HOW MUCH ROM NEEDS TO BE RESERVED FOR SPECIFIC PLATFORMS
-; WBW_ROM_R	HOW MUCH ROM NEEDS TO BE RESERVED FOR ROMWBW
-;
-PLT_RAM_R	.EQU	0	; 0K
-PLT_ROM_R	.EQU	0	; 0K
-WBW_ROM_R	.EQU	128	; 128K			; TOTAL RESERVED ROM
-WBW_RAM_R	.EQU	256	; 256K			; TOTAL RESERVED RAM
+RAMSIZE		.SET	0
+;PLT_RAM_R	.SET	0	; 0K	; RESERVED RAM FOR EACH PLATFORM IS DEFINED IN ITS CONFIG FILE
+;PLT_ROM_R	.SET	0	; 0K	; RESERVED ROM FOR EACH PLATFORM IS DEFINED IN ITS CONFIG FILE
+WBW_ROM_R	.EQU	128	; 128K			; RESERVED ROM REQUIRED FOR ROMWBW
+WBW_RAM_R	.EQU	256	; 256K			; RESERVED RAM REQUIRED FOR ROMWBW
 TOT_ROM_RB	.EQU	(PLT_ROM_R + WBW_ROM_R)/32	; TOTAL ROM BANKS RESERVED
 TOT_RAM_RB	.EQU	(PLT_RAM_R + WBW_RAM_R)/32	; TOTAL RAM BANKS RESERVED
 ;
@@ -512,21 +508,23 @@ BID_RAM0	.EQU	$80 + (PLT_RAM_R / 32)
 
 BID_ROMN	.EQU	(BID_ROM0 + ((ROMSIZE / 32) - 1))
 BID_RAMN	.EQU	(BID_RAM0 + ((RAMSIZE / 32) - 1))
-
-BID_BOOT	.EQU	BID_ROM0	; BOOT BANK
-BID_IMG0	.EQU	BID_ROM0 + 1	; ROM LOADER AND FIRST IMAGES BANK
-BID_IMG1	.EQU	BID_ROM0 + 2	; SECOND IMAGES BANK
-;BID_FSFAT	.EQU	BID_ROM0 + 3	; FAT FILESYSTEM DRIVER BANK
-BID_IMG2	.EQU	BID_ROM0 + 3	; NETWORK BOOT
-BID_ROMD0	.EQU	BID_ROM0 + 4	; FIRST ROM DRIVE BANK
-BID_ROMDN	.EQU	BID_ROMN	; LAST ROM DRIVE BANK
-
-BID_RAMD0	.EQU	BID_RAM0	; FIRST RAM DRIVE BANK
-BID_RAMDN	.EQU	BID_RAMN - 4	; LAST RAM DRIVE BANK
-BID_AUX		.EQU	BID_RAMN - 3	; AUX BANK (BPBIOS, ETC.)
-BID_BIOS	.EQU	BID_RAMN - 2	; BIOS BANK
-BID_USR		.EQU	BID_RAMN - 1	; USER BANK (CP/M TPA, ETC.)
-BID_COM		.EQU	BID_RAMN	; COMMON BANK, UPPER 32K
+;
+BID_RAMD0	.EQU	BID_RAM0	; FIRST RAM DRIVE BANK			 ^  RAM
+BID_RAMDN	.EQU	BID_RAMN - 8	; LAST RAM DRIVE BANK			 |  DRIVE
+;					; OS BUFFERS CP/M3?			-+ THESE
+;					; OS BUFFERS CP/M3?			 | MAKE
+;					; OS BUFFERS CP/M3?			 | UP
+;					; OS BUFFERS CP/M3?			 | THE
+BID_AUX		.EQU	BID_RAMN - 3	; AUX BANK (BPBIOS, ETC.)		 | 256KB
+BID_BIOS	.EQU	BID_RAMN - 2	; BIOS BANK				 | RESERVED
+BID_USR		.EQU	BID_RAMN - 1	; USER BANK (CP/M TPA, ETC.)		 | RAM
+BID_COM		.EQU	BID_RAMN - 0	; COMMON BANK, UPPER 32K		-+ BANKS
+BID_BOOT	.EQU	BID_ROM0 + 0	; BOOT BANK				-+ THESE MAKE
+BID_IMG0	.EQU	BID_ROM0 + 1	; ROM LOADER AND FIRST IMAGES BANK	 | UP THE 128KB
+BID_IMG1	.EQU	BID_ROM0 + 2	; SECOND IMAGES BANK		 	 | RESERVED
+BID_IMG2	.EQU	BID_ROM0 + 3	; NETWORK BOOT				-+ ROM BANKS
+BID_ROMD0	.EQU	BID_ROM0 + 4	; FIRST ROM DRIVE BANK			 |  ROM
+BID_ROMDN	.EQU	BID_ROMN	; LAST ROM DRIVE BANK			 V  DRIVE
 ;
 ; MEMORY LAYOUT
 ;