From 561a7f723183365146ae80766ee5c00e16fe0619 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Mon, 9 Sep 2024 11:41:28 -0700 Subject: [PATCH] Support S100 Z80 FPGA Printer Port --- .../{RCZ80_jbl.asm => RCZ80_jbl_std.asm} | 17 +--- Source/HBIOS/Config/RCZ80_kio_std.asm | 35 +------ Source/HBIOS/Config/SBC_simh.asm | 47 --------- Source/HBIOS/Config/SBC_simh_std.asm | 67 +++++++++++++ Source/HBIOS/cfg_FZ80.asm | 6 +- Source/HBIOS/hbios.asm | 39 ++++---- Source/HBIOS/lpt.asm | 99 +++++++++++++------ Source/HBIOS/std.asm | 1 + Source/ver.inc | 2 +- Source/ver.lib | 2 +- Tools/simh/Sim.cmd | 2 +- 11 files changed, 164 insertions(+), 153 deletions(-) rename Source/HBIOS/Config/{RCZ80_jbl.asm => RCZ80_jbl_std.asm} (84%) delete mode 100644 Source/HBIOS/Config/SBC_simh.asm create mode 100644 Source/HBIOS/Config/SBC_simh_std.asm diff --git a/Source/HBIOS/Config/RCZ80_jbl.asm b/Source/HBIOS/Config/RCZ80_jbl_std.asm similarity index 84% rename from Source/HBIOS/Config/RCZ80_jbl.asm rename to Source/HBIOS/Config/RCZ80_jbl_std.asm index 88053146..d65f0ec6 100644 --- a/Source/HBIOS/Config/RCZ80_jbl.asm +++ b/Source/HBIOS/Config/RCZ80_jbl_std.asm @@ -65,23 +65,14 @@ ; #DEFINE BOOT_DEFAULT "Z" ; DEFAULT BOOT LOADER CMD ON OR AUTO BOOT ; -#include "cfg_RCZ80.asm" +#include "Config/RCZ80_std.asm" ; CPUOSC .SET 3686400 ; CPU OSC FREQ IN MHZ -CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP -;BOOTCON .SET 1 ; BOOT CONSOLE DEVICE -; -DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) ; UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) -SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) ; -SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) -SIODEBUG .SET FALSE ; SIO: ENABLE DEBUG OUTPUT -SIOBOOT .SET 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED) SIOCNT .SET 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIO0MODE .SET SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0BASE .SET $80 ; SIO 0: REGISTERS BASE ADR @@ -95,8 +86,6 @@ SIO0BCTCC .SET -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) TMSMODE .SET TMSMODE_COLECO ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO] -MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER) -EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) VDAEMU_SERKBD .SET 1 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD ; AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER @@ -108,7 +97,3 @@ FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3 ; IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) -SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) -SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY -; -PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) diff --git a/Source/HBIOS/Config/RCZ80_kio_std.asm b/Source/HBIOS/Config/RCZ80_kio_std.asm index e22e1db1..ece831d3 100644 --- a/Source/HBIOS/Config/RCZ80_kio_std.asm +++ b/Source/HBIOS/Config/RCZ80_kio_std.asm @@ -44,28 +44,18 @@ ; #DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON OR AUTO BOOT ; -#include "cfg_RCZ80.asm" +#include "Config/RCZ80_std.asm" ; -CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2 -CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP ; -FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS -FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES -; -DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT ; CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT CTCTIMER .SET TRUE ; ENABLE CTC PERIODIC TIMER CTCBASE .SET KIOBASE+$04 ; CTC BASE I/O ADDRESS ; -UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) -DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) ; -SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) SIOCNT .SET 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIO0MODE .SET SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] SIO0BASE .SET KIOBASE+$08 ; SIO 0: REGISTERS BASE ADR @@ -73,26 +63,3 @@ SIO0ACLK .SET 1843200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372 SIO0ACTCC .SET 0 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE SIO0BCLK .SET 1843200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 SIO0BCTCC .SET 1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE -; -TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) -TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) -TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO] -MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER) -VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) -EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM) -VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD -; -AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER -AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC] -SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER -; -FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) -FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC] -; -IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) -PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) -SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) -SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY -IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM) -; -PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) diff --git a/Source/HBIOS/Config/SBC_simh.asm b/Source/HBIOS/Config/SBC_simh.asm deleted file mode 100644 index 188f6cee..00000000 --- a/Source/HBIOS/Config/SBC_simh.asm +++ /dev/null @@ -1,47 +0,0 @@ -; -;================================================================================================== -; SBC SIMH EMULATOR CONFIGURATION -;================================================================================================== -; -; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE -; CFG_.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS -; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE -; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS. -; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE _XXX.ASM AND SPECIFY -; YOUR FILE IN THE BUILD PROCESS. -; -; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM. -; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO -; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON -; SETTINGS. -; -; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE, -; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING -; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS! -; -; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO -; DIRECTORIES ABOVE THIS ONE). -; -#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON OR AUTO BOOT -; -#include "cfg_SBC.asm" -; -INTMODE .SET 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2 -; -HTIMENABLE .SET TRUE ; ENABLE SIMH TIMER SUPPORT -; -SIMRTCENABLE .SET TRUE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM) -DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) -; -UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) -; -SSERENABLE .SET TRUE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) -SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG -SSERSTATUS .SET $6D ; SSER: STATUS PORT -SSERDATA .SET $68 ; SSER: DATA PORT -SSERIRDY .SET %00000001 ; SSER: INPUT READY BIT MASK -SSERIINV .SET FALSE ; SSER: INPUT READY BIT INVERTED -SSERORDY .SET %00100000 ; SSER: OUTPUT READY BIT MASK -SSEROINV .SET FALSE ; SSER: OUTPUT READY BIT INVERTED -; -HDSKENABLE .SET TRUE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM) diff --git a/Source/HBIOS/Config/SBC_simh_std.asm b/Source/HBIOS/Config/SBC_simh_std.asm new file mode 100644 index 00000000..b39398a2 --- /dev/null +++ b/Source/HBIOS/Config/SBC_simh_std.asm @@ -0,0 +1,67 @@ +; +;================================================================================================== +; ROMWBW DEFAULT BUILD SETTINGS FOR N8VEM SBC W/SIMH SUPPORT +;================================================================================================== +; +; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM +; INDICATED ABOVE. THESE SETTINGS DEFINE THE OFFICIAL BUILD FOR THIS +; PLATFORM AS DISTRIBUTED IN ROMWBW RELEASES. +; +; ROMWBW USES CASCADING CONFIGURATION FILES AS INDICATED BELOW: +; +; cfg_MASTER.asm - MASTER: CONFIGURATION FILE DEFINES ALL POSSIBLE ROMWBW SETTINGS +; | +; +-> cfg_.asm - PLATFORM: DEFAULT SETTINGS FOR SPECIFIC PLATFORM +; | +; +-> Config/_std.asm - BUILD: SETTINGS FOR EACH OFFICIAL DIST BUILD +; | +; +-> Config/_.asm - USER: CUSTOM USER BUILD SETTINGS +; +; THE TOP (MASTER CONFIGURATION) FILE DEFINES ALL POSSIBLE ROMWBW +; CONFIGURATION SETTINGS. EACH FILE BELOW THE MASTER CONFIGURATION FILE +; INHERITS THE CUMULATIVE SETTINGS OF THE FILES ABOVE IT AND MAY +; OVERRIDE THESE SETTINGS AS DESIRED. +; +; OTHER THAN THE TOP MASTER FILE, EACH FILE MUST "#INCLUDE" ITS PARENT +; FILE (SEE #INCLUDE STATEMENT BELOW). THE TOP TWO FILES SHOULD NOT BE +; MODIFIED. +; +; TO CUSTOMIZE YOUR BUILD SETTINGS YOU SHOULD MODIFY THIS FILE, THE +; DEFAULT BUILD SETTINGS (Config/_std.asm) OR PREFERABLY +; CREATE AN OPTIONAL CUSTOM USER SETTINGS FILE THAT INCLUDES THE DEFAULT +; BUILD SETTINGS FILE (SEE EXAMPLE Config/SBC_user.asm). +; +; BY CREATING A CUSTOM USER SETTINGS FILE, YOU ARE LESS LIKELY TO BE +; IMPACTED BY FUTURE CHANGES BECAUSE YOU WILL BE INHERITING MOST +; OF YOUR SETTINGS WHICH WILL BE UPDATED BY AUTHORS AS ROMWBW EVOLVES. +; +; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE +; SOURCE DIRECTORY (TWO DIRECTORIES ABOVE THIS ONE). +; +; *** WARNING: ASIDE FROM THE MASTER CONFIGURATION FILE, YOU MUST USE +; ".SET" TO OVERRIDE SETTINGS. THE ASSEMBLER WILL ERROR IF YOU ATTEMPT +; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU". +; +#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON OR AUTO BOOT +; +#include "cfg_SBC.asm" +; +INTMODE .SET 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2 +; +HTIMENABLE .SET TRUE ; ENABLE SIMH TIMER SUPPORT +; +SIMRTCENABLE .SET TRUE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM) +DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) +; +UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) +; +SSERENABLE .SET TRUE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) +SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG +SSERSTATUS .SET $6D ; SSER: STATUS PORT +SSERDATA .SET $68 ; SSER: DATA PORT +SSERIRDY .SET %00000001 ; SSER: INPUT READY BIT MASK +SSERIINV .SET FALSE ; SSER: INPUT READY BIT INVERTED +SSERORDY .SET %00100000 ; SSER: OUTPUT READY BIT MASK +SSEROINV .SET FALSE ; SSER: OUTPUT READY BIT INVERTED +; +HDSKENABLE .SET TRUE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM) diff --git a/Source/HBIOS/cfg_FZ80.asm b/Source/HBIOS/cfg_FZ80.asm index 88ea9d26..2b897bb6 100644 --- a/Source/HBIOS/cfg_FZ80.asm +++ b/Source/HBIOS/cfg_FZ80.asm @@ -343,11 +343,11 @@ PIOCNT .SET 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP PIO0BASE .SET $B8 ; PIO 0: REGISTERS BASE ADR PIO1BASE .SET $BC ; PIO 1: REGISTERS BASE ADR ; -LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM) -LPTMODE .SET LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014] +LPTENABLE .SET TRUE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM) +LPTMODE .SET LPTMODE_S100 ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014] LPTCNT .SET 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2) LPTTRACE .SET 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) -LPT0BASE .SET $0C ; LPT 0: REGISTERS BASE ADR +LPT0BASE .SET $C7 ; LPT 0: REGISTERS BASE ADR LPT1BASE .SET $00 ; LPT 1: REGISTERS BASE ADR ; PPAENABLE .SET FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM) diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index d7b052d3..bd1a1e77 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -3686,15 +3686,6 @@ HB_PCINITTBL: #IF (ACIAENABLE) .DW ACIA_PREINIT #ENDIF -#IF (PIOENABLE) - .DW PIO_PREINIT -#ENDIF -#IF LPTENABLE) - .DW LPT_PREINIT -#ENDIF -#IF (PIO_4P | PIO_ZP) - .DW PIO_PREINIT -#ENDIF #IF (UFENABLE) .DW UF_PREINIT #ENDIF @@ -3702,6 +3693,12 @@ HB_PCINITTBL: .DW TMS_PREINIT #ENDIF .DW TERM_PREINIT ; ALWAYS DO THIS ONE +#IF (PIOENABLE) + .DW PIO_PREINIT +#ENDIF +#IF (PIO_4P | PIO_ZP) + .DW PIO_PREINIT +#ENDIF ; HB_PCINITTBLLEN .EQU (($ - HB_PCINITTBL) / 2) ; @@ -3773,15 +3770,6 @@ HB_INITTBL: #IF (ACIAENABLE) .DW ACIA_INIT #ENDIF -#IF (PIOENABLE) - .DW PIO_INIT -#ENDIF -#IF (LPTENABLE) - .DW LPT_INIT -#ENDIF -#IF (PIO_4P | PIO_ZP) - .DW PIO_INIT -#ENDIF #IF (UFENABLE) .DW UF_INIT #ENDIF @@ -3833,15 +3821,24 @@ HB_INITTBL: #IF (FVENABLE) .DW FV_INIT #ENDIF +#IF (SCONENABLE) + .DW SCON_INIT +#ENDIF +#IF (LPTENABLE) + .DW LPT_INIT +#ENDIF +#IF (PIOENABLE) + .DW PIO_INIT +#ENDIF +#IF (PIO_4P | PIO_ZP) + .DW PIO_INIT +#ENDIF #IF (PRPENABLE) .DW PRP_INIT #ENDIF #IF (PPPENABLE) .DW PPP_INIT #ENDIF -#IF (SCONENABLE) - .DW SCON_INIT -#ENDIF #IF (DMAENABLE) .DW DMA_INIT #ENDIF diff --git a/Source/HBIOS/lpt.asm b/Source/HBIOS/lpt.asm index 917a5a38..7e680296 100644 --- a/Source/HBIOS/lpt.asm +++ b/Source/HBIOS/lpt.asm @@ -50,7 +50,7 @@ ; ; D7 D6 D5 D4 D3 D2 D1 D0 ; +-------+-------+-------+-------+-------+-------+-------+-------+ -; | | | | /ERR | SEL | POUT | BUSY | /ACK | +; | | | | /ERR | SEL | POUT | BUSY | /ACK | ; +-------+-------+-------+-------+-------+-------+-------+-------+ ; ; PORT 2 (OUTPUT): @@ -62,40 +62,60 @@ ; ;================================================================================================== ; -; PRE-CONSOLE INITIALIZATION - DETECT AND INIT HARDWARE +; S100 STYLE INTERFACE: +; - S100 FPGA Z80 ; -LPT_PREINIT: +; BASE I/O PORT (OUTPUT): ; -; SETUP THE DISPATCH TABLE ENTRIES -; NOTE: INTS WILL BE DISABLED WHEN PREINIT IS CALLED AND THEY MUST -; REMAIN DISABLED. +; D7 D6 D5 D4 D3 D2 D1 D0 +; +-------+-------+-------+-------+-------+-------+-------+-------+ +; | PD7 | PD6 | PD5 | PD4 | PD3 | PD2 | PD1 | PD0 | +; +-------+-------+-------+-------+-------+-------+-------+-------+ +; +; STATUS PORT (INPUT, BASE I/O - 1): +; +; D7 D6 D5 D4 D3 D2 D1 D0 +; +-------+-------+-------+-------+-------+-------+-------+-------+ +; | | | | | | | BUSY | /ACK | +; +-------+-------+-------+-------+-------+-------+-------+-------+ +; +; CONTROL PORT (OUTPUT, BASE I/O - 1): +; +; D7 D6 D5 D4 D3 D2 D1 D0 +; +-------+-------+-------+-------+-------+-------+-------+-------+ +; | | | | | | | | /STB | +; +-------+-------+-------+-------+-------+-------+-------+-------+ +; +;================================================================================================== ; +LPT_INIT: LD B,LPT_CFGCNT ; LOOP CONTROL XOR A ; ZERO TO ACCUM LD (LPT_DEV),A ; CURRENT DEVICE NUMBER LD IY,LPT_CFG ; POINT TO START OF CFG TABLE -LPT_PREINIT0: +LPT_INIT0: PUSH BC ; SAVE LOOP CONTROL CALL LPT_INITUNIT ; HAND OFF TO UNIT INIT CODE POP BC ; RESTORE LOOP CONTROL ; LD A,(IY+1) ; GET THE LPT TYPE DETECTED OR A ; SET FLAGS - JR Z,LPT_PREINIT2 ; SKIP IT IF NOTHING FOUND + JR Z,LPT_INIT2 ; SKIP IT IF NOTHING FOUND ; PUSH BC ; SAVE LOOP CONTROL PUSH IY ; CFG ENTRY ADDRESS POP DE ; ... TO DE LD BC,LPT_FNTBL ; BC := FUNCTION TABLE ADDRESS CALL NZ,CIO_ADDENT ; ADD ENTRY IF LPT FOUND, BC:DE + CALL LPT_PRTCFG ; PRINT IF NOT ZERO POP BC ; RESTORE LOOP CONTROL ; -LPT_PREINIT2: +LPT_INIT2: LD DE,LPT_CFGSIZ ; SIZE OF CFG ENTRY ADD IY,DE ; BUMP IY TO NEXT ENTRY - DJNZ LPT_PREINIT0 ; LOOP UNTIL DONE + DJNZ LPT_INIT0 ; LOOP UNTIL DONE ; -LPT_PREINIT3: +LPT_INIT3: XOR A ; SIGNAL SUCCESS RET ; AND RETURN ; @@ -119,24 +139,6 @@ LPT_INITUNIT: ; THE INITDEV ENTRY POINT THAT DOES NOT ENABLE/DISABLE INTS! JP LPT_INITDEVX ; IMPLEMENT IT AND RETURN ; -; -; -LPT_INIT: - LD B,LPT_CFGCNT ; COUNT OF POSSIBLE LPT UNITS - LD IY,LPT_CFG ; POINT TO START OF CFG TABLE -LPT_INIT1: - PUSH BC ; SAVE LOOP CONTROL - LD A,(IY+1) ; GET LPT TYPE - OR A ; SET FLAGS - CALL NZ,LPT_PRTCFG ; PRINT IF NOT ZERO - POP BC ; RESTORE LOOP CONTROL - LD DE,LPT_CFGSIZ ; SIZE OF CFG ENTRY - ADD IY,DE ; BUMP IY TO NEXT ENTRY - DJNZ LPT_INIT1 ; LOOP TILL DONE -; - XOR A ; SIGNAL SUCCESS - RET ; DONE -; ; DRIVER FUNCTION TABLE ; LPT_FNTBL: @@ -173,8 +175,16 @@ LPT_OUT: #IF (LPTMODE == LPTMODE_MG014) LD A,%00000100 ; SELECT & STROBE, LED OFF #ENDIF +#IF (LPTMODE == LPTMODE_S100) + LD A,%00000000 ; STROBE +#ENDIF +#IF ((LPTMODE == LPTMODE_SPP) | (LPTMODE == LPTMODE_MG014)) INC C ; PUT CONTROL PORT IN C INC C +#ENDIF +#IF (LPTMODE == LPTMODE_S100) + DEC C ; PUT CONTROL PORT IN C +#ENDIF OUT (C),A ; OUTPUT DATA TO PORT CALL DELAY #IF (LPTMODE == LPTMODE_SPP) @@ -182,6 +192,9 @@ LPT_OUT: #ENDIF #IF (LPTMODE == LPTMODE_MG014) LD A,%00000101 ; SELECT, LED OFF +#ENDIF +#IF (LPTMODE == LPTMODE_S100) + LD A,%11111111 ; STROBE #ENDIF OUT (C),A ; OUTPUT DATA TO PORT CALL DELAY @@ -199,7 +212,12 @@ LPT_IST: ; LPT_OST: LD C,(IY+3) ; BASE PORT +#IF ((LPTMODE == LPTMODE_SPP) | (LPTMODE == LPTMODE_MG014)) INC C ; SELECT STATUS PORT +#ENDIF +#IF (LPTMODE == LPTMODE_S100) + DEC C ; SELECT STATUS PORT +#ENDIF IN A,(C) ; GET STATUS INFO #IF (LPTMODE == LPTMODE_SPP) AND %10000000 ; ISOLATE /BUSY @@ -256,6 +274,14 @@ LPT_INITDEVX: RET ; RETURN #ENDIF ; +#IF (LPTMODE == LPTMODE_S100) + LD C,(IY+3) ; BASE PORT + DEC C ; DEC TO CONTROL PORT + LD A,$FF ; INIT VALUE + OUT (C),A ; DO IT + RET ; RETURN +#ENDIF +; ; ; LPT_QUERY: @@ -361,6 +387,13 @@ LPT_DETECT1: RET ; DONE #ENDIF ; +#IF (LPTMODE == LPTMODE_S100) +LPT_DETECT: + ; PORT ALWAYS EXISTS ON FPGA + LD A,LPTMODE_S100 ; RETURN CHIP TYPE + RET ; DONE +#ENDIF +; ; ; LPT_PRTCFG: @@ -400,10 +433,12 @@ LPT_TYPE_MAP: .DW LPT_STR_NONE .DW LPT_STR_SPP .DW LPT_STR_MG014 + .DW LPT_STR_S100 ; LPT_STR_NONE .DB "$" LPT_STR_SPP .DB "SPP$" LPT_STR_MG014 .DB "MG014$" +LPT_STR_S100 .DB "S100$" ; ; WORKING VARIABLES ; @@ -427,6 +462,9 @@ LPT0_CFG: #ENDIF #IF (LPTMODE == LPTMODE_MG014) DEVECHO "MG014" + #ENDIF + #IF (LPTMODE == LPTMODE_S100) + DEVECHO "S100" #ENDIF DEVECHO ", IO=" DEVECHO LPT0BASE @@ -450,6 +488,9 @@ LPT1_CFG: #ENDIF #IF (LPTMODE == LPTMODE_MG014) DEVECHO "MG014" + #ENDIF + #IF (LPTMODE == LPTMODE_S100) + DEVECHO "S100" #ENDIF DEVECHO ", IO=" DEVECHO LPT1BASE diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm index 95bc15bf..729bcf4d 100644 --- a/Source/HBIOS/std.asm +++ b/Source/HBIOS/std.asm @@ -282,6 +282,7 @@ GDCMODE_RPH .EQU 2 ; RPH GDC LPTMODE_NONE .EQU 0 ; NONE LPTMODE_SPP .EQU 1 ; IBM PC STANDARD PAR PORT (SPP) LPTMODE_MG014 .EQU 2 ; RCBUS MG014 STYLE INTERFACE +LPTMODE_S100 .EQU 3 ; S100 Z80 FPGA BUILT-IN PRINTER PORT ; ; PPA DRIVER MODE SELECTIONS ; diff --git a/Source/ver.inc b/Source/ver.inc index 824f5d1f..cb04d462 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,7 +2,7 @@ #DEFINE RMN 5 #DEFINE RUP 0 #DEFINE RTP 0 -#DEFINE BIOSVER "3.5.0-dev.78" +#DEFINE BIOSVER "3.5.0-dev.79" #define rmj RMJ #define rmn RMN #define rup RUP diff --git a/Source/ver.lib b/Source/ver.lib index 57a91307..1d0ae841 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 5 rup equ 0 rtp equ 0 biosver macro - db "3.5.0-dev.78" + db "3.5.0-dev.79" endm diff --git a/Tools/simh/Sim.cmd b/Tools/simh/Sim.cmd index 3e501ab8..7ba86838 100644 --- a/Tools/simh/Sim.cmd +++ b/Tools/simh/Sim.cmd @@ -1,5 +1,5 @@ @echo off -set ROM=..\..\Binary\SBC_simh.rom +set ROM=..\..\Binary\SBC_simh_std.rom if not "%1"=="" set ROM=..\..\Binary\%1.rom if not exist %ROM% goto romerr :: start C:\Users\WWarthen\Bin\putty.exe -load "SIMH Telnet"