Finalize RC2014 floppy updates

RC2014 floppy controller support completed and tested for Scott Baker
SMC and WDC controller modules.  FDU application updated as well.
This commit is contained in:
Wayne Warthen
2018-01-08 16:45:43 -08:00
parent 768e41c933
commit 5fc01b4100
13 changed files with 246 additions and 98 deletions

View File

@@ -38,6 +38,9 @@
; DYNAMIC FDC SELECTION AT STARTUP
; DYNAMIC CPU SPEED ADJUSTMENT
; 2017-12-16: V5.1 IMPROVED POLLING READ/WRITE PERFORMANCE
; 2018-01-08: V5.2 ADDED RC2014 SUPPORT FOR:
; - SCOTT BAKER (SMB) SMC 9266 FDC
; - SCOTT BAKER (SMB) WDC 37C65 FDC
;
;_______________________________________________________________________________
;
@@ -63,6 +66,8 @@ FDC_ZETA .EQU 2
FDC_ZETA2 .EQU 3
FDC_DIDE .EQU 4
FDC_N8 .EQU 5
FDC_RCSMC .EQU 6
FDC_RCWDC .EQU 7
;
_DIO .EQU 1 << FDC_DIO
_DIO3 .EQU 1 << FDC_DIO3
@@ -70,6 +75,8 @@ _ZETA .EQU 1 << FDC_ZETA
_ZETA2 .EQU 1 << FDC_ZETA2
_DIDE .EQU 1 << FDC_DIDE
_N8 .EQU 1 << FDC_N8
_RCSMC .EQU 1 << FDC_RCSMC
_RCWDC .EQU 1 << FDC_RCWDC
;
FALSE .EQU 0
TRUE .EQU ~FALSE
@@ -197,7 +204,7 @@ INIT5:
XOR A
RET
STR_BANNER .DB "Floppy Disk Utility (FDU) v5.1, 16-Dec-2017$"
STR_BANNER .DB "Floppy Disk Utility (FDU) v5.2, 08-Jan-2018$"
STR_BANNER2 .DB "Copyright (C) 2017, Wayne Warthen, GNU GPL v3","$"
STR_HBIOS .DB " [HBIOS]$"
STR_UBIOS .DB " [UBIOS]$"
@@ -276,6 +283,8 @@ FDCTBL: ; LABEL CONFIG DATA
.DW STR_ZETA2, CFG_ZETA2
.DW STR_DIDE, CFG_DIDE
.DW STR_N8, CFG_N8
.DW STR_RCSMC, CFG_RCSMC
.DW STR_RCWDC, CFG_RCWDC
FDCCNT .EQU ($-FDCTBL)/4 ; FD CONTROLLER COUNT
;
; FDC LABEL STRINGS
@@ -284,8 +293,10 @@ STR_DIO .TEXT "DISKIO$"
STR_DIO3 .TEXT "DISKIO3$"
STR_ZETA .TEXT "ZETA$"
STR_ZETA2 .TEXT "ZETA2$"
STR_DIDE .TEXT "DUAL-IDE$"
STR_DIDE .TEXT "D-IDE$"
STR_N8 .TEXT "N8$"
STR_RCSMC .TEXT "RC-SMC$"
STR_RCWDC .TEXT "RC-WDC$"
;
; FDC CONFIGURATION BLOCKS
;
@@ -340,6 +351,26 @@ CFG_N8:
.DB 093H ; TERMINAL COUNT (W/ DACK)
.DB 0FFH ; NOT USED BY N8
;
CFG_RCSMC:
.DB 050H ; FDC MAIN STATUS REGISTER
.DB 051H ; FDC DATA PORT
.DB 0FFH ; DATA INPUT REGISTER
.DB 058H ; DIGITAL OUTPUT REGISTER (LATCH)
.DB 0FFH ; DCR
.DB 0FFH ; DACK
.DB 0FFH ; TERMINAL COUNT (W/ DACK)
.DB 0FFH ; PSEUDO DMA DATA PORT
;
CFG_RCWDC:
.DB 050H ; FDC MAIN STATUS REGISTER
.DB 051H ; FDC DATA PORT
.DB 0FFH ; DATA INPUT REGISTER
.DB 058H ; DIGITAL OUTPUT REGISTER (LATCH)
.DB 048H ; DCR
.DB 0FFH ; DACK
.DB 058H ; TERMINAL COUNT (W/ DACK)
.DB 0FFH ; PSEUDO DMA DATA PORT
;
FDCID .DB 0 ; FDC IDENTIFIER (0 INDEXED)
FDCBM .DB 0 ; FDC ID BITMAP
FDCLBL .DW 0 ; POINTER TO ACTIVE FDC LABEL STRING
@@ -355,6 +386,8 @@ FSS_MENU:
.TEXT " (4) Zeta 2 SBC Onboard FDC\r\n"
.TEXT " (5) Dual IDE ECB Board\r\n"
.TEXT " (6) N8 Onboard FDC\r\n"
.TEXT " (7) RC2014 SMC (SMB)\r\n"
.TEXT " (8) RC2014 WDC (SMB)\r\n"
.TEXT "=== OPTION ===> $\r\n"
;
;===============================================================================
@@ -1424,12 +1457,14 @@ MD_DRQWAIT .EQU 4
; BIT IS SET FOR ALLOWED MODES PER FDC
;
MD_MAP:
.DB %00011111 ; DIO: POLL,INT,INTFAST,INTWAIT,DRQWAIT
.DB %00000111 ; DIO3: POLL,INT,INTFAST
.DB %00000111 ; ZETA: POLL,INT,INTFAST
.DB %00000001 ; ZETA2:POLL
.DB %00000001 ; DIDE: POLL
.DB %00000001 ; N8: POLL
.DB %00011111 ; DIO POLL,INT,INTFAST,INTWAIT,DRQWAIT
.DB %00000111 ; DIO3 POLL,INT,INTFAST
.DB %00000111 ; ZETA POLL,INT,INTFAST
.DB %00000001 ; ZETA2 POLL
.DB %00000001 ; DIDE POLL
.DB %00000001 ; N8 POLL
.DB %00000001 ; RCSMC POLL
.DB %00000001 ; RCWDC POLL
;
; MEDIA DESCRIPTION BLOCK
;
@@ -1451,6 +1486,7 @@ MDB_HLT .DB 000H ; HEAD LOAD TIME, IBM PS/2 CALLS FOR 15ms 08H = 16ms HUT
MDB_DORA .DB 000H ; OPERATIONS REGISTER VALUE FOR MEDIA
MDB_DORB .DB 000H ; OPERATIONS REGISTER VALUE FOR MEDIA
MDB_DORC .DB 000H ; OPERATIONS REGISTER VALUE FOR MEDIA
MDB_DORD .DB 000H ; OPERATIONS REGISTER VALUE FOR MEDIA
MDB_DCR .DB 000H ; CONTROL REGISTER VALUE FOR MEDIA
MDB_LEN .EQU $ - MDB
;
@@ -1549,6 +1585,7 @@ FCB_PC720 .DB 009H ; SECTOR COUNT
.DB DORA_BR250 ; OPERATIONS REGISTER VALUE
.DB DORB_BR250 ; OPERATIONS REGISTER VALUE
.DB DORC_BR250 ; OPERATIONS REGISTER VALUE
.DB DORD_BR250 ; OPERATIONS REGISTER VALUE
.DB DCR_BR250 ; CONTROL REGISTER VALUE
.IF (($ - MDB_PC720) != MDB_LEN)
.ECHO "*** FCB SIZE ERROR!!! ***\n"
@@ -1571,6 +1608,7 @@ FCB_PC144 .DB 012H ; SECTOR COUNT
.DB DORA_BR500 ; OPERATIONS REGISTER VALUE
.DB DORB_BR500 ; OPERATIONS REGISTER VALUE
.DB DORC_BR500 ; OPERATIONS REGISTER VALUE
.DB DORD_BR500 ; OPERATIONS REGISTER VALUE
.DB DCR_BR500 ; CONTROL REGISTER VALUE
.IF (($ - MDB_PC144) != MDB_LEN)
.ECHO "*** FCB SIZE ERROR!!! ***\n"
@@ -1593,6 +1631,7 @@ FCB_PC320 .DB 008H ; SECTOR COUNT
.DB DORA_BR250 ; OPERATIONS REGISTER VALUE
.DB DORB_BR250 ; OPERATIONS REGISTER VALUE
.DB DORC_BR250 ; OPERATIONS REGISTER VALUE
.DB DORD_BR250 ; OPERATIONS REGISTER VALUE
.DB DCR_BR250 ; CONTROL REGISTER VALUE
.IF (($ - MDB_PC320) != MDB_LEN)
.ECHO "*** FCB SIZE ERROR!!! ***\n"
@@ -1615,6 +1654,7 @@ FCB_PC360 .DB 009H ; SECTOR COUNT
.DB DORA_BR250 ; OPERATIONS REGISTER VALUE
.DB DORB_BR250 ; OPERATIONS REGISTER VALUE
.DB DORC_BR250 ; OPERATIONS REGISTER VALUE
.DB DORD_BR250 ; OPERATIONS REGISTER VALUE
.DB DCR_BR250 ; CONTROL REGISTER VALUE
.IF (($ - MDB_PC360) != MDB_LEN)
.ECHO "*** FCB SIZE ERROR!!! ***\n"
@@ -1637,6 +1677,7 @@ FCB_PC120 .DB 00FH ; SECTOR COUNT
.DB DORA_BR500 ; OPERATIONS REGISTER VALUE
.DB DORB_BR500 ; OPERATIONS REGISTER VALUE
.DB DORC_BR500 ; OPERATIONS REGISTER VALUE
.DB DORD_BR500 ; OPERATIONS REGISTER VALUE
.DB DCR_BR500 ; CONTROL REGISTER VALUE
.IF (($ - MDB_PC120) != MDB_LEN)
.ECHO "*** FCB SIZE ERROR!!! ***\n"
@@ -1659,6 +1700,7 @@ FCB_PC111 .DB 00FH ; SECTOR COUNT
.DB DORA_BR500 ; OPERATIONS REGISTER VALUE
.DB DORB_BR500 ; OPERATIONS REGISTER VALUE
.DB DORC_BR500 ; OPERATIONS REGISTER VALUE
.DB DORD_BR500 ; OPERATIONS REGISTER VALUE
.DB DCR_BR500 ; CONTROL REGISTER VALUE
.IF (($ - MDB_PC111) != MDB_LEN)
.ECHO "*** FCB SIZE ERROR!!! ***\n"
@@ -1768,29 +1810,37 @@ FM_DRAW:
AND _ZETA | _DIO3
JR NZ,FM_DRAW0B
LD A,(HL)
AND _DIDE | _N8 | _ZETA2
AND _DIDE | _N8 | _ZETA2 | _RCWDC
JR NZ,FM_DRAW0C
JR FM_DRAW0D
LD A,(HL)
AND _RCSMC
JR NZ,FM_DRAW0D
JR FM_DRAW3
FM_DRAW0A: ; DIO
LD A,(FST_DOR)
AND 00000010B
XOR 00000010B
JR FM_DRAW0D
JR FM_DRAW1
FM_DRAW0B: ; ZETA, DIO3
LD A,(FST_DOR)
AND 00000010B
JR FM_DRAW0D
FM_DRAW0C: ; DIDE, N8, ZETA2
JR FM_DRAW1
FM_DRAW0C: ; DIDE, N8, ZETA2, RCWDC
LD A,(FST_DOR)
AND 11110000B
JR FM_DRAW0D
FM_DRAW0D:
LD DE,STR_ON
JP NZ,FM_DRAW1
LD DE,STR_OFF
JR FM_DRAW1
FM_DRAW0D: ; RCSMC
LD A,(FST_DOR)
AND 00000110B
JR FM_DRAW1
FM_DRAW1:
LD DE,STR_ON
JP NZ,FM_DRAW2
LD DE,STR_OFF
FM_DRAW2:
LD HL,MV_MOT
CALL STRCPY
FM_DRAW3:
; UPDATE MSR VALUE
LD DE,MV_MSR
@@ -1913,23 +1963,30 @@ FM_MOTOR:
AND _ZETA | _DIO3
JR NZ,FM_MOTOR0B
LD A,(HL)
AND _DIDE | _N8 | _ZETA2
AND _DIDE | _N8 | _ZETA2 | _RCWDC
JR NZ,FM_MOTOR0C
JR FM_MOTOR0D
LD A,(HL)
AND _RCSMC
JR NZ,FM_MOTOR0D
RET
FM_MOTOR0A: ; DIO
LD A,(FST_DOR)
AND 00000010B
XOR 00000010B
JR FM_MOTOR0D
JR FM_MOTOR1
FM_MOTOR0B: ; ZETA, DIO3
LD A,(FST_DOR)
AND 00000010B
JR FM_MOTOR0D
FM_MOTOR0C: ; DIDE, N8, ZETA2
JR FM_MOTOR1
FM_MOTOR0C: ; DIDE, N8, ZETA2, RCWDC
LD A,(FST_DOR)
AND 11110000B
JR FM_MOTOR0D
FM_MOTOR0D:
JR FM_MOTOR1
FM_MOTOR0D: ; RCSMC
LD A,(FST_DOR)
AND 00000110B
JR FM_MOTOR1
FM_MOTOR1:
JP Z,FC_MOTORON
JP FC_MOTOROFF
@@ -2130,6 +2187,7 @@ FCD_HLT .DB 000H ; HEAD LOAD TIME, IBM PS/2 CALLS FOR 15ms 08H = 16ms HUT
FCD_DORA .DB 000H ; DEFAULT DOR VALUE FOR MEDIA
FCD_DORB .DB 000H ; DEFAULT DOR VALUE FOR MEDIA
FCD_DORC .DB 000H ; DEFAULT DOR VALUE FOR MEDIA
FCD_DORD .DB 000H ; DEFAULT DOR VALUE FOR MEDIA
FCD_DCR .DB 000H ; DOR VALUE FOR MEDIA
FCD_LEN .EQU $ - FCD
; DYNAMICALLY MANAGED (PUBLIC)
@@ -2645,27 +2703,33 @@ FC_INIT:
AND _ZETA | _DIO3
JR NZ,FC_INIT2
LD A,(HL)
AND _DIDE | _N8 | _ZETA2
AND _DIDE | _N8 | _ZETA2 | _RCWDC
JR NZ,FC_INIT3
JR FC_INIT4
LD A,(HL)
AND _RCSMC
JR NZ,FC_INIT4
RET
FC_INIT1: ; DIO
LD A,(FCD_DORA)
JR FC_INIT4
JR FC_INIT5
FC_INIT2: ; ZETA, DIO3
LD A,(FCD_DORB)
JR FC_INIT4
FC_INIT3: ; DIDE, N8, ZETA2
JR FC_INIT5
FC_INIT3: ; DIDE, N8, ZETA2, RCWDC
LD A,(FCD_DORC)
JR FC_INIT4
JR FC_INIT5
FC_INIT4: ; WDSMC
LD A,(FCD_DORD)
JR FC_INIT5
FC_INIT4:
FC_INIT5:
LD (FST_DOR),A
CALL FC_SETDOR
RET
;
; SET FST_DOR
;
FC_SETDOR
FC_SETDOR:
PUSH AF
LD A,(FST_DOR)
LD C,(IY+CFG_DOR)
@@ -2674,28 +2738,28 @@ FC_SETDOR
RET
;
; RESET FDC BY PULSING BIT 7 OF DOR LOW
; NOTE: DIO HARDWARE HAS NO MECHANISM TO PULSE RESET VIA SOFTWARE
;
FC_RESETFDC:
LD C,(IY+CFG_DOR)
LD HL,FDCBM
LD A,(HL)
AND _ZETA | _DIO3
AND _ZETA | _DIO3 | _RCSMC
JR NZ,FC_RESETFDC1
LD A,(HL)
AND _DIDE | _N8 | _ZETA2
AND _DIDE | _N8 | _ZETA2 | _RCWDC
JR NZ,FC_RESETFDC2
JR FC_RESETFDC3
FC_RESETFDC1: ; ZETA, DIO3
RET
FC_RESETFDC1: ; ZETA, DIO3, RCSMC
LD A,(FST_DOR)
PUSH AF
RES 7,A
OUT (C),A
PUSH AF ; SAVE AF BECAUSE DELAY TRASHES IT
CALL DELAY
POP AF ; RESTORE AF
SET 7,A
POP AF
OUT (C),A
JR FC_RESETFDC3
FC_RESETFDC2: ; DIDE, N8, ZETA2
FC_RESETFDC2: ; DIDE, N8, ZETA2, RCWDC
LD A,0
OUT (C),A
LD A,(FST_DOR)
@@ -2711,7 +2775,7 @@ FC_RESETFDC3:
;
FC_PULSETC:
LD A,(FDCBM)
AND _DIDE | _N8 | _ZETA2
AND _DIDE | _N8 | _ZETA2 | _RCWDC
JR NZ,FC_PULSETC1
; NOT DIDE, N8, ZETA2
LD C,(IY+CFG_DOR)
@@ -2721,7 +2785,7 @@ FC_PULSETC:
RES 0,A
OUT (C),A
JR FC_PULSETC2
FC_PULSETC1: ; DIDE, N8, ZETA2
FC_PULSETC1: ; DIDE, N8, ZETA2, RCWDC
LD C,(IY+CFG_TC)
IN A,(C)
JR FC_PULSETC2
@@ -2739,18 +2803,21 @@ FC_MOTORON:
AND _ZETA | _DIO3
JR NZ,FC_MOTORON2
LD A,(HL)
AND _DIDE | _N8 | _ZETA2
AND _DIDE | _N8 | _ZETA2 | _RCWDC
JR NZ,FC_MOTORON3
JR FC_MOTORON4
LD A,(HL)
AND _RCSMC
JR NZ,FC_MOTORON4
RET
FC_MOTORON1: ; DIO
LD HL,FST_DOR ; POINT TO FDC_DOR
RES 1,(HL) ; SET MOTOR ON
JR FC_MOTORON4
JR FC_MOTORON5
FC_MOTORON2: ; ZETA, DIO3
LD HL,FST_DOR ; POINT TO FDC_DOR
SET 1,(HL)
JR FC_MOTORON4
FC_MOTORON3: ; DIDE, N8, ZETA2
JR FC_MOTORON5
FC_MOTORON3: ; DIDE, N8, ZETA2, RCWDC
LD HL,FST_DOR ; POINT TO FDC_DOR
LD A,(HL) ; START WITH CURRENT DOR
AND 11111100B ; GET RID OF ANY ACTIVE DS BITS
@@ -2766,18 +2833,27 @@ FC_MOTORON3A:
DJNZ FC_MOTORON3A ; DS TIMES
OR C ; COMBINE WITH SAVED
LD (HL),A ; COMMIT THE NEW VALUE TO FST_DOR
JR FC_MOTORON4
FC_MOTORON4:
JR FC_MOTORON5
FC_MOTORON4: ; RCSMC
LD A,(FCD_DS) ; GET CURRENT DS
LD C,00000010B ; ASSUME MOTORA (BIT 1)
OR A ; TEST FOR DS 0
JR Z,FC_MOTORON4A ; IF SO, CONTINUE W/ MOTORA
LD C,00000100B ; OTHERWISE, MOTORB (BIT 2)
FC_MOTORON4A:
LD A,(FST_DOR) ; GET CURRENT DOR VALUE
OR C ; APPLY NEW MOTOR BIT
LD (FST_DOR),A ; COMMIT NEW VALUE
JR FC_MOTORON5
FC_MOTORON5:
CALL FC_SETDOR ; OUTPUT TO CONTROLLER
CALL LDELAY ; WAIT 1/2 SEC ON MOTOR START FOR SPIN-UP
LD A,(FDCBM)
AND _DIDE | _N8 | _ZETA2
JR Z,FC_MOTORON5
AND _DIDE | _N8 | _ZETA2 | _RCWDC
RET Z
LD A,(FCD_DCR)
LD C,(IY+CFG_DCR)
OUT (C),A
FC_MOTORON5:
RET
;
; SET FST_DOR FOR MOTOR CONTROL OFF
@@ -2791,24 +2867,32 @@ FC_MOTOROFF:
AND _ZETA | _DIO3
JR NZ,FC_MOTOROFF2
LD A,(HL)
AND _DIDE | _N8 | _ZETA2
AND _DIDE | _N8 | _ZETA2 | _RCWDC
JR NZ,FC_MOTOROFF3
JR FC_MOTOROFF4
LD A,(HL)
AND _RCSMC
JR NZ,FC_MOTOROFF4
RET
FC_MOTOROFF1: ; DIO
LD HL,FST_DOR ; POINT TO FDC_DOR
SET 1,(HL) ; SET MOTOR OFF
JR FC_MOTOROFF4
JR FC_MOTOROFF5
FC_MOTOROFF2: ; ZETA, DIO3
LD HL,FST_DOR ; POINT TO FDC_DOR
RES 1,(HL)
JR FC_MOTOROFF4
FC_MOTOROFF3: ; DIDE, N8, ZETA2
JR FC_MOTOROFF5
FC_MOTOROFF3: ; DIDE, N8, ZETA2, RCWDC
LD HL,FST_DOR ; POINT TO FDC_DOR
LD A,DORC_INIT
LD (HL),A
JR FC_MOTOROFF4
JR FC_MOTOROFF5
FC_MOTOROFF4: ; RCSMC
LD HL,FST_DOR ; POINT TO FDC_DOR
RES 1,(HL) ; CLEAR MOTORA
RES 2,(HL) ; CLEAR MOTORB
JR FC_MOTOROFF5
FC_MOTOROFF4:
FC_MOTOROFF5:
CALL FC_SETDOR ; OUTPUT TO CONTROLLER
RET
;
@@ -3661,13 +3745,20 @@ DORB_BR500 .EQU 10100000B ; 500KBPS
;
DORB_INIT .EQU DORB_BR250
;
; *** DIDE/N8/ZETA2 ***
; *** DIDE/N8/ZETA2/RCWDC ***
;
DORC_INIT .EQU 00001100B ; SOFT RESET INACTIVE, DMA ENABLED
;
DORC_BR250 .EQU DORC_INIT
DORC_BR500 .EQU DORC_INIT
;
; *** RCSMC ***
;
DORD_BR250 .EQU 10100000B ; 250KBPS
DORD_BR500 .EQU 11100000B ; 500KBPS
;
DORD_INIT .EQU DORB_BR250
;
; DCR (ONLY APPLIES TO DIDE, N8, AND ZETA2)
;
DCR_BR250 .EQU 01H ; 250KBPS

View File

@@ -473,4 +473,11 @@ Added runtime selection of FDC hardware.
Added runtime timing adjustment.
WW 12/16/2017: v5.1
Improved polling version of read/write to fix occasional overrun errors.
WW 1/8/2018: v5.2
Added support for RC2014 hardware:
- Scott Baker SMC 9266 FDC module
- Scott Baker WDC 37C65 FDC module