mirror of https://github.com/wwarthen/RomWBW.git
doug
13 years ago
124 changed files with 0 additions and 56568 deletions
@ -1,692 +0,0 @@ |
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########################################################
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# Makefile for Doug's Unified BIOS 8/07/2011 #
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# The BIOS and associated utilities are generated #
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# using the Small Device C Compiler (SDCC) & tools #
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# With multiplatform enhancements by John Coffman #
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# #
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# sdcc.l00 added because stupid Windoze 'echo' appends #
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# a confusing SPACE to the end of every line. #
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########################################################
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#####################################################
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# SPREFIX tells where the SDCC package in installed #
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# The SDCC package is used to assemble Z80 portions #
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# of the software such as the ROM and perhaps some #
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# .COM files such as FDISK. #
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#####################################################
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#################################################################
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# TPREFIX tells where the host development tools are installed. #
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# The host tools are used to manipulate the Z80 objects after #
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# the basic assemblies and compilations have been completed. #
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#################################################################
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###################################################################
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# SDCC is not available on the DOS host, so something else may be #
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# used at the descretion of the builder. (TASM for instance). #
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###################################################################
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###################################################################
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# The COPY, DEL and RENAME macros are used to customize the build #
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# rules for the host enviroonment. #
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###################################################################
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#-------------------------------------------
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# Choose one only, then Make will work for
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# your platform.
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CFG = $(shell uname) |
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# Mac OS X returns 'Darwin'
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# Linux returns 'Linux'
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#CFG = dos
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#CFG = linux
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#CFG = macosx
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#CFG = windows
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#-------------------------------------------
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ifeq ($(CFG),Darwin) |
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DELIM = / |
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SPREFIX = /Developer/sdcc |
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SDAS = $(SPREFIX)/bin/sdasz80 |
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SDASFLG = -plosff -Iinc |
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SDCC = $(SPREFIX)/bin/sdcc |
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SDCCFLG = -c -mz80 -D__SDCC__=1 -I inc |
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SDCCLIB = $(SPREFIX)/share/sdcc/lib/z80 |
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SDLD = $(SPREFIX)/bin/sdldz80 |
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SDLDFLG = |
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TPREFIX = |
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TCC = gcc |
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TCCFLG = -I inc |
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COPY = cp |
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DEL = rm |
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DELFLG = -f |
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# use native ECHO o Mac OS X
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ECHO = echo |
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REN = mv |
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EXE = |
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endif |
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#-------------------------------------------
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ifeq ($(CFG),windows) |
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DELIM = \
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SDRIVE = C: |
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SPREFIX = $(SDRIVE)\Program Files (x86)\sdcc |
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SDAS = $(SPREFIX)\bin\sdasz80 |
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SDASFLG = -plosff |
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SDCC = $(SPREFIX)\bin\sdcc |
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SDCCFLG = -c -mz80 -D__SDCC__=1 -I inc |
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SDCCLIB = $(SPREFIX)\lib\z80 |
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SDLD = $(SPREFIX)\bin\sdldz80 |
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SDLDFLG = |
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TPREFIX = |
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TCC = gcc |
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TCCOPT = -I inc |
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COPY = copy |
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DEL = erase |
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DELFLG = |
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REN = rename |
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# This is special handling for John Coffman to get around funky windows
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# behavior where echo adds spurious space o end f line
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# ECHO = { lecho | lechocr | lecholf | lechocrlf | lecholfcr }
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#ECHO = $(BIN)$(DELIM)lechocr
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#ECHO = $(BIN)$(DELIM)lecho
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EXE = .exe |
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endif |
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#-------------------------------------------
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ifeq ($(CFG),Linux) |
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DELIM = / |
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SPREFIX = /home/$(USER) |
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SDAS = $(SPREFIX)/bin/sdasz80 |
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SDASFLG = -plosff |
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SDCC = $(SPREFIX)/bin/sdcc |
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SDCCFLG = -c -mz80 -D__SDCC__=1 -I inc |
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SDCCLIB = /usr/local/share/sdcc/lib/z80 |
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SDLD = $(SPREFIX)/bin/sdldz80 |
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SDLDFLG = |
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TPREFIX = |
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TCC = gcc |
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TCCFLG = -I inc |
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COPY = cp |
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DEL = rm |
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DELFLG = -f |
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REN = mv |
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# Use native 'echo' on Linux
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ECHO = echo |
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EXE = |
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endif |
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#-------------------------------------------
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ifeq ($(CFG),dos) |
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DELIM = \
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SPREFIX = |
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SDAS = |
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SDASFLG = |
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SDCC = |
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SDCCFLG = |
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SDCCLIB = |
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SDLD = |
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SDLDFLG = |
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TPREFIX = |
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TCC = wcl |
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TCCOPT = |
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COPY = copy |
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DEL = erase |
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DELFLG = |
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REN = rename |
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EXE = .exe |
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endif |
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############################################################
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# Misc other macros
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BIN = bin$(DELIM) |
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COM = com$(DELIM) |
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INC = inc$(DELIM) |
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LIB = lib$(DELIM) |
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LST = lst$(DELIM) |
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MAP = map$(DELIM) |
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OBJ = obj$(DELIM) |
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REF = ref$(DELIM) |
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ROM = rom$(DELIM) |
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SRC = src$(DELIM) |
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TMP = tmp$(DELIM) |
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# CP/M-80 v2.2 Command files written in SDCC
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COMFILES = $(COM)copyfile.com $(COM)fdisk.com |
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# Components used by CP/M-80 v2.2 Command files
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COMRELS = $(OBJ)cpm0.rel $(OBJ)cpmbdos.rel $(OBJ)cprintf.rel |
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# Components of ROM image containing CP/M for SBC V2
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CPMRELS = $(OBJ)crt0.rel $(OBJ)dbgmon.rel $(OBJ)bdosb01.rel \
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$(OBJ)ccpb03.rel $(OBJ)cbios.rel |
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# Components of ROM image used in test protocols
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ROMRELS = $(OBJ)crt0jplp.rel $(OBJ)crt0scrm.rel |
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# Components that control hardware in SBC V2
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SBCV2HW = |
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# Components that control hardware in the SCSI2IDE
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SCSI2IDEHW = $(OBJ)z53c80.rel |
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FDISK = $(BIN)fdisk$(EXE) |
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DWGH2B = $(BIN)dwgh2b$(EXE) |
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INCFILES = $(INC)cpmbdos.h $(INC)cprintf.h $(INC)portab.h |
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JRCH2B = $(BIN)jrch2b$(EXE) |
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LOAD = $(BIN)load$(EXE) |
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MK = Makefile |
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#QUIET = @
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# ROM images for SBC V2 and N8
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ROMFILES = $(ROM)scsiscrm.rom $(ROM)scsijplp.rom $(ROM)scsi2ide.rom $(ROM)baseline.rom $(ROM)n8.rom |
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SCSI2IDE = $(ROM)scsi2ide.rom |
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SYSGEN = $(BIN)sysgen$(EXE) |
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VERIFY = $(BIN)verify$(EXE) |
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# C programs compiled on host system used in build
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TOOLS = $(FDISK) $(DWGH2B) $(LOAD) $(JRCH2B) $(SYSGEN) |
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# Versions of 'echo' compiled on host system
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ETOOLS = $(BIN)lechocr $(BIN)lecholf $(BIN)lechocrlf $(BIN)lecholfcr |
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# dribdos.rel is not part of the production set yet
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##TEST = dribdos.rel
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############################################################
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#all: $(ETOOLS) $(TOOLS) $(BINFILES) $(COMFILES) $(CPMFILES) $(ROMFILES)
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#all: $(TEST) $(ROMFILES) $(COMFILES)
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roms: $(ROMFILES) |
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scsi2ide: $(SCSI2IDE) |
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############################################################
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# A test assembly of DRI source code for BDOS (from SIMH)
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dribdos.rel: $(SRC)dribdos.s |
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$(QUIET)$(SDAS) $(SDASFLG) dribdos.s |
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$(QUIET)$(COPY) $(COPYFLG) $(SRC)dribdos.lst $(LST) |
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############################################################
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############################################################
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# Build SCSIJPLP ROM image
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$(ROM)scsijplp.rom: $(OBJ)scsijplp.bin $(MK) |
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$(QUIET)$(COPY) $(OBJ)scsijplp.bin $(ROM)scsijplp.rom |
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$(QUIET)$(DEL) $(DELFLG) scsijplp.* |
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$(OBJ)scsijplp.bin: $(OBJ)scsijplp.hex $(DWGH2B) $(MK) |
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$(QUIET)$(DWGH2B) $(OBJ)scsijplp |
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$(OBJ)scsijplp.hex: $(OBJ)scsijplp.ihx $(MK) |
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$(QUIET)$(COPY) $(OBJ)scsijplp.ihx $(OBJ)scsijplp.hex |
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$(OBJ)scsijplp.ihx: $(OBJ)crt0jplp.rel $(TMP)scsijplp.arf $(MK) |
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$(QUIET)$(COPY) $(TMP)scsijplp.arf $(TMP)scsijplp.lk |
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$(QUIET)$(COPY) $(TMP)scsijplp.arf $(TMP)scsijplp.lnk |
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$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)scsijplp.lnk |
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$(QUIET)$(COPY) $(COPYFLG) scsijplp.ihx $(OBJ) |
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$(QUIET)$(COPY) $(COPYFLG) scsijplp.map $(MAP) |
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#########################################################
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# Dynamically generate linker control file for scsi2ide #
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# (now uses the macro controlled ECHO feature #
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#########################################################
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$(TMP)scsijplp.arf: $(MK) |
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$(ECHO) -mjx > $(TMP)scsijplp.arf |
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$(ECHO) -i scsijplp.ihx >> $(TMP)scsijplp.arf |
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$(ECHO) -k $(SDCCLIB) >> $(TMP)scsijplp.arf |
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$(ECHO) -l z80 >> $(TMP)scsijplp.arf |
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$(ECHO) $(OBJ)crt0jplp.rel >> $(TMP)scsijplp.arf |
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$(ECHO) -e >> $(TMP)scsijplp.arf |
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############################################################
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############################################################
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# Build SCSISCRM ROM image
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$(ROM)scsiscrm.rom: $(OBJ)scsiscrm.bin $(MK) |
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$(QUIET)$(COPY) $(OBJ)scsiscrm.bin $(ROM)scsiscrm.rom |
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$(QUIET)$(DEL) $(DELFLG) scsiscrm.* |
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$(OBJ)scsiscrm.bin: $(OBJ)scsiscrm.hex $(DWGH2B) $(MK) |
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$(QUIET)$(DWGH2B) $(OBJ)scsiscrm |
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$(OBJ)scsiscrm.hex: $(OBJ)scsiscrm.ihx $(MK) |
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$(QUIET)$(COPY) $(OBJ)scsiscrm.ihx $(OBJ)scsiscrm.hex |
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$(OBJ)scsiscrm.ihx: $(OBJ)crt0scrm.rel $(TMP)scsiscrm.arf $(MK) |
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$(QUIET)$(COPY) $(TMP)scsiscrm.arf $(TMP)scsiscrm.lk |
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$(QUIET)$(COPY) $(TMP)scsiscrm.arf $(TMP)scsiscrm.lnk |
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$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)scsiscrm.lnk |
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$(QUIET)$(COPY) $(COPYFLG) scsiscrm.ihx $(OBJ) |
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$(QUIET)$(COPY) $(COPYFLG) scsiscrm.map $(MAP) |
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#########################################################
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# Dynamically generate linker control file for scsiscrm #
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# (now uses the macro controlled ECHO feature #
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#########################################################
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$(TMP)scsiscrm.arf: $(MK) |
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$(ECHO) -mjx > $(TMP)scsiscrm.arf |
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$(ECHO) -i scsiscrm.ihx >> $(TMP)scsiscrm.arf |
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$(ECHO) -k $(SDCCLIB) >> $(TMP)scsiscrm.arf |
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$(ECHO) -l z80 >> $(TMP)scsiscrm.arf |
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$(ECHO) $(OBJ)crt0scrm.rel >> $(TMP)scsiscrm.arf |
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$(ECHO) -e >> $(TMP)scsiscrm.arf |
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############################################################
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############################################################
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# Build SCSI2IDE ROM image
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$(ROM)scsi2ide.rom: $(OBJ)scsi2ide.bin $(MK) |
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$(QUIET)$(COPY) $(OBJ)scsi2ide.bin $(ROM)scsi2ide.rom |
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$(QUIET)$(DEL) $(DELFLG) scsi2ide.* |
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$(OBJ)scsi2ide.bin: $(OBJ)scsi2ide.hex $(DWGH2B) $(MK) |
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$(QUIET)$(DWGH2B) $(OBJ)scsi2ide |
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$(OBJ)scsi2ide.hex: $(OBJ)scsi2ide.ihx $(MK) |
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$(QUIET)$(COPY) $(OBJ)scsi2ide.ihx $(OBJ)scsi2ide.hex |
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$(OBJ)scsi2ide.ihx: $(CPMRELS) $(SCSI2IDEHW) $(OBJ)scsi2ide.rel $(TMP)scsi2ide.arf $(MK) |
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$(QUIET)$(COPY) $(TMP)scsi2ide.arf $(TMP)scsi2ide.lk |
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$(QUIET)$(COPY) $(TMP)scsi2ide.arf $(TMP)scsi2ide.lnk |
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$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)scsi2ide.lnk |
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$(QUIET)$(COPY) $(COPYFLG) scsi2ide.ihx $(OBJ) |
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$(QUIET)$(COPY) $(COPYFLG) scsi2ide.map $(MAP) |
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#########################################################
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# Dynamically generate linker control file for scsi2ide #
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# (now uses the macro controlled ECHO feature #
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#########################################################
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$(TMP)scsi2ide.arf: $(MK) |
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$(ECHO) -mjx > $(TMP)scsi2ide.arf |
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$(ECHO) -i scsi2ide.ihx >> $(TMP)scsi2ide.arf |
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$(ECHO) -k $(SDCCLIB) >> $(TMP)scsi2ide.arf |
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$(ECHO) -l z80 >> $(TMP)scsi2ide.arf |
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# $(ECHO) -b _CCPB03 = 0xD000 >> $(TMP)scsi2ide.arf
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# $(ECHO) -b _BDOSB01 = 0xD800 >> $(TMP)scsi2ide.arf
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# $(ECHO) -b _CBIOS = 0xE600 >> $(TMP)scsi2ide.arf
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# $(ECHO) -b _DBGMON = 0x8000 >> $(TMP)scsi2ide.arf
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$(ECHO) $(OBJ)crt0.rel >> $(TMP)scsi2ide.arf |
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$(ECHO) $(OBJ)scsi2ide.rel >> $(TMP)scsi2ide.arf |
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# $(ECHO) $(OBJ)dbgmon.rel >> $(TMP)scsi2ide.arf
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# $(ECHO) $(OBJ)ccpb03.rel >> $(TMP)scsi2ide.arf
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# $(ECHO) $(OBJ)bdosb01.rel >> $(TMP)scsi2ide.arf
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# $(ECHO) $(OBJ)cbios.rel >> $(TMP)scsi2ide.arf
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$(ECHO) -e >> $(TMP)scsi2ide.arf |
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########################################################
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# Compile C portion of the scsi2ide EEPROM Image
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$(OBJ)scsi2ide.rel: $(SRC)scsi2ide.c $(MK) |
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$(QUIET)$(SDCC) $(SDCCFLG) -c $(SRC)scsi2ide.c |
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$(QUIET)$(COPY) $(COPYFLG) scsi2ide.rel $(OBJ) |
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$(QUIET)$(COPY) $(COPYFLG) scsi2ide.lst $(LST) |
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############################################################
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############################################################
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# Build SBC V2 ROM image
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$(ROM)baseline.rom: $(OBJ)baseline.bin $(MK) |
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$(QUIET)$(COPY) $(OBJ)baseline.bin $(ROM)baseline.rom |
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$(QUIET)$(DEL) $(DELFLG) baseline.* |
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$(OBJ)baseline.bin: $(OBJ)baseline.hex $(DWGH2B) $(MK) |
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$(QUIET)$(DWGH2B) $(OBJ)baseline |
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$(OBJ)baseline.hex: $(OBJ)baseline.ihx $(MK) |
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$(QUIET)$(COPY) $(OBJ)baseline.ihx $(OBJ)baseline.hex |
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$(OBJ)baseline.ihx: $(CPMRELS) $(SBCV2HW) $(OBJ)baseline.rel $(TMP)baseline.arf $(MK) |
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$(QUIET)$(COPY) $(TMP)baseline.arf $(TMP)baseline.lk |
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$(QUIET)$(COPY) $(TMP)baseline.arf $(TMP)baseline.lnk |
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$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)baseline.lnk |
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$(QUIET)$(COPY) $(COPYFLG) baseline.ihx $(OBJ) |
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$(QUIET)$(COPY) $(COPYFLG) baseline.map $(MAP) |
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#########################################################
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# Dynamically generate linker control file for baseline #
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# (now uses the macro controlled ECHO feature #
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#########################################################
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$(TMP)baseline.arf: $(MK) |
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$(ECHO) -mjx > $(TMP)baseline.arf |
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$(ECHO) -i baseline.ihx >> $(TMP)baseline.arf |
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$(ECHO) -k $(SDCCLIB) >> $(TMP)baseline.arf |
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$(ECHO) -l z80 >> $(TMP)baseline.arf |
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$(ECHO) -b _CCPB03 = 0xD000 >> $(TMP)baseline.arf |
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$(ECHO) -b _BDOSB01 = 0xD800 >> $(TMP)baseline.arf |
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$(ECHO) -b _CBIOS = 0xE600 >> $(TMP)baseline.arf |
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$(ECHO) -b _DBGMON = 0x8000 >> $(TMP)baseline.arf |
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$(ECHO) $(OBJ)crt0.rel >> $(TMP)baseline.arf |
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$(ECHO) $(OBJ)baseline.rel >> $(TMP)baseline.arf |
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$(ECHO) $(OBJ)dbgmon.rel >> $(TMP)baseline.arf |
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$(ECHO) $(OBJ)ccpb03.rel >> $(TMP)baseline.arf |
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$(ECHO) $(OBJ)bdosb01.rel >> $(TMP)baseline.arf |
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$(ECHO) $(OBJ)cbios.rel >> $(TMP)baseline.arf |
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$(ECHO) -e >> $(TMP)baseline.arf |
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########################################################
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# Compile C portion of the Baseline PROM Image
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$(OBJ)baseline.rel: $(SRC)baseline.c $(MK) |
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$(QUIET)$(SDCC) $(SDCCFLG) -c $(SRC)baseline.c |
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$(QUIET)$(COPY) $(COPYFLG) baseline.rel $(OBJ) |
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$(QUIET)$(COPY) $(COPYFLG) baseline.lst $(LST) |
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############################################################
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# Build N8 ROM image
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#
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# Save the resulting merged image in the Rom folder
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#
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$(ROM)n8.rom: $(OBJ)n8-romim.bin $(MK) |
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$(QUIET)$(COPY) $(OBJ)n8-romim.bin $(ROM)n8.rom |
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$(QUIET)$(DEL) $(DELFLG) n8.* |
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#
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# Convert the Intel hex file into a binary, similar
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# to the results of the "copy /B ..."
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#
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$(OBJ)n8-romim.bin: $(OBJ)sysimage.hex $(REF)n8-romim.ref $(SYSGEN) $(HEX2BIN) $(MK) |
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$(QUIET)$(DWGH2B) $(OBJ)sysimage |
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$(QUIET)$(COPY) $(REF)n8-romim.ref $(OBJ)n8-romim.bin |
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$(QUIET)$(SYSGEN) -i $(OBJ)sysimage.bin $(OBJ)n8-romim.bin |
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#
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# Take the output of the linker and rename to the more
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# recognizable .hex form and the expected name "sysimage.hex"
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#
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$(OBJ)sysimage.hex: $(OBJ)n8.ihx $(MK) |
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$(QUIET)$(COPY) $(OBJ)n8.ihx $(OBJ)sysimage.hex |
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#
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# Combine the independently assembled components into one piece
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# and output Intel hex file (ihx)
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#
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$(OBJ)n8.ihx: $(OBJ)loadern8.rel $(OBJ)dbgmon.rel $(OBJ)ccpb03.rel $(OBJ)bdosb01.rel $(OBJ)cbiosn8.rel $(TMP)n8.arf $(MK) |
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$(QUIET)$(COPY) $(TMP)n8.arf $(TMP)n8.lk |
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$(QUIET)$(COPY) $(TMP)n8.arf $(TMP)n8.lnk |
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$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)n8.lnk |
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$(QUIET)$(COPY) $(COPYFLG) n8.ihx $(OBJ)n8.ihx |
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$(QUIET)$(COPY) $(COPYFLG) n8.map $(MAP) |
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$(OBJ)cbiosn8.rel: $(SRC)cbiosn8.s $(MK) |
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$(QUIET)$(SDAS) $(SDASFLG) $(SRC)cbiosn8.s |
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$(QUIET)$(COPY) $(COPYFLG) $(SRC)cbiosn8.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cbiosn8.lst $(LST) |
|||
|
|||
$(OBJ)loadern8.rel: $(SRC)loadern8.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)loadern8.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)loadern8.rel $(OBJ) |
|||
$(QUIET)$(COPY $(COPYFLG) $(SRC)loadern8.lst $(LST) |
|||
|
|||
########################################################
|
|||
# Dynamically generate the linker control file for N8 #
|
|||
# Now uses the macro controlled ECHO feature #
|
|||
########################################################
|
|||
$(TMP)n8.arf: Makefile |
|||
$(ECHO) -mjx > $(TMP)n8.arf |
|||
$(ECHO) -i n8.ihx >> $(TMP)n8.arf |
|||
$(ECHO) -k /usr/local/share/sdcc/lib/z80 >> $(TMP)n8.arf |
|||
$(ECHO) -l z80 >> $(TMP)n8.arf |
|||
$(ECHO) -b _CCPB03 = 0x0900 >> $(TMP)n8.arf |
|||
$(ECHO) -b _BDOSB01 = 0x1100 >> $(TMP)n8.arf |
|||
$(ECHO) -b _CBIOS = 0x1f00 >> $(TMP)n8.arf |
|||
$(ECHO) $(OBJ)loadern8.rel >> $(TMP)n8.arf |
|||
$(ECHO) $(OBJ)dbgmon.rel >> $(TMP)n8.arf |
|||
$(ECHO) $(OBJ)ccpb03.rel >> $(TMP)n8.arf |
|||
$(ECHO) $(OBJ)bdosb01.rel >> $(TMP)n8.arf |
|||
$(ECHO) $(OBJ)cbiosn8.rel >> $(TMP)n8.arf |
|||
$(ECHO) -e >> $(TMP)n8.arf |
|||
|
|||
############################################################
|
|||
|
|||
# Hardware specific assemblies (most likely used by BIOS's)
|
|||
|
|||
#
|
|||
# Assemble hardware control code for the Zilog Z53C8003V5C
|
|||
#
|
|||
$(OBJ)z53c80.rel: $(SRC)z53c80.c $(MK) |
|||
$(QUIET)$(SDCC) $(SDCCFLG) $(SRC)z53c80.c |
|||
$(QUIET)$(COPY) $(COPYFLG) z53c80.rel $(OBJ) |
|||
$(QUIET)$(DEL) $(DELFLG) z53c80.* |
|||
|
|||
#
|
|||
# Compile ersatz printf routine for use in CP/M-80 command files
|
|||
#
|
|||
$(OBJ)cprintf.rel: $(SRC)cprintf.c $(MK) |
|||
$(QUIET)$(SDCC) $(SDCCFLG) $(SRC)cprintf.c |
|||
$(QUIET)$(COPY) $(COPYFLG) cprintf.rel obj |
|||
$(QUIET)$(DEL) $(DELFLG) cprintf.* |
|||
|
|||
############################################################
|
|||
|
|||
# Build CP/M 2.2 command files (copyfile.com, fdisk.com)
|
|||
|
|||
#-----------------------------------------------------------
|
|||
|
|||
$(COM)copyfile.com: $(OBJ)copyfile.com $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)copyfile.com $(COM)copyfile.com |
|||
$(QUIET)$(DEL) $(DELFLG) copyfile.* |
|||
|
|||
$(OBJ)copyfile.com: $(OBJ)copyfile.hex $(LOAD) $(BINFILES) $(MK) |
|||
$(QUIET)$(LOAD) $(OBJ)copyfile |
|||
|
|||
$(OBJ)copyfile.hex: $(OBJ)copyfile.ihx $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)copyfile.ihx $(OBJ)copyfile.hex |
|||
|
|||
$(OBJ)copyfile.ihx: $(OBJ)copyfile.rel $(COMRELS) $(TMP)copyfile.arf $(MK) |
|||
$(QUIET)$(COPY) $(TMP)copyfile.arf $(TMP)copyfile.lnk |
|||
|
|||
$(QUIET)$(SDLD) $(LOPTS) -nf $(TMP)copyfile.lnk |
|||
$(QUIET)$(COPY) $(COPYFLG) copyfile.ihx obj |
|||
$(QUIET)$(COPY) $(COPYFLG) copyfile.map map |
|||
|
|||
##############################################################
|
|||
# Dynamicaly create linker command file for copyfile utility #
|
|||
# Now uses the macro controlled ECHO feature #
|
|||
##############################################################
|
|||
$(TMP)copyfile.arf: Makefile |
|||
$(ECHO) -mjx > $(TMP)copyfile.arf |
|||
$(ECHO) -i copyfile.ihx >> $(TMP)copyfile.arf |
|||
$(ECHO) -k $(SDCCLIB) >> $(TMP)copyfile.arf |
|||
$(ECHO) -l z80 >> $(TMP)copyfile.arf |
|||
$(ECHO) $(OBJ)cpm0.rel >> $(TMP)copyfile.arf |
|||
$(ECHO) $(OBJ)copyfile.rel >> $(TMP)copyfile.arf |
|||
$(ECHO) $(OBJ)cpmbdos.rel >> $(TMP)copyfile.arf |
|||
$(ECHO) $(OBJ)cprintf.rel >> $(TMP)copyfile.arf |
|||
$(ECHO) -e >> $(TMP)copyfile.arf |
|||
|
|||
$(OBJ)copyfile.rel: $(SRC)copyfile.c $(MK) |
|||
$(QUIET)$(SDCC) $(SDCCFLG) $(SRC)copyfile.c |
|||
$(QUIET)$(COPY) copyfile.rel obj |
|||
$(QUIET)$(DEL) $(DELFLG) copyfile.rel |
|||
ls obj |
|||
|
|||
#-----------------------------------------------------------
|
|||
|
|||
#
|
|||
# Use locally compiled 'load' command to covert Intel
|
|||
# hex formal file to a binary CP/M-80 command file.
|
|||
#
|
|||
$(COM)fdisk.com: $(OBJ)fdisk.hex $(TOOLS) $(MK) |
|||
$(QUIET)$(BIN)load $(OBJ)fdisk |
|||
$(QUIET)$(COPY) $(COPYFLG) $(OBJ)fdisk.com com |
|||
$(QUIET)$(DEL) $(DELFLG) fdisk.* |
|||
|
|||
#
|
|||
# rename 'ihx' output of linker to 'hex'
|
|||
|
|||
$(OBJ)fdisk.hex: $(OBJ)fdisk.ihx $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)fdisk.ihx $(OBJ)fdisk.hex |
|||
|
|||
$(OBJ)fdisk.ihx: $(OBJ)fdisk.rel $(TMP)fdisk.arf $(MK) |
|||
$(QUIET)$(COPY) $(TMP)fdisk.arf $(TMP)fdisk.lnk |
|||
$(QUIET)$(COPY) $(TMP)fdisk.arf $(TMP)fdisk.lk |
|||
$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)fdisk.lnk |
|||
$(QUIET)$(COPY) $(COPYFLG) fdisk.ihx $(OBJ)fdisk.ihx |
|||
$(QUIET)$(COPY) $(COPYFLG) fdisk.map map |
|||
|
|||
$(OBJ)fdisk.rel: $(SRC)fdisk.c $(INCFILES) $(MK) |
|||
$(QUIET)$(SDCC) -I inc $(SDCCFLG) $(SRC)fdisk.c |
|||
$(QUIET)$(COPY) $(COPYFLG) fdisk.rel $(OBJ) |
|||
|
|||
############################################################################
|
|||
# Dynamically created linker command file for fdisk utility (CP/M version) #
|
|||
# Now uses macro controlled ECHO feature #
|
|||
############################################################################
|
|||
$(TMP)fdisk.arf: $(MK) |
|||
$(ECHO) -mjx > $(TMP)fdisk.arf |
|||
$(ECHO) -i fdisk.ihx >> $(TMP)fdisk.arf |
|||
$(ECHO) -k $(SDCCLIB) >> $(TMP)fdisk.arf |
|||
$(ECHO) -l z80 >> $(TMP)fdisk.arf |
|||
$(ECHO) $(OBJ)cpm0.rel >> $(TMP)fdisk.arf |
|||
$(ECHO) $(OBJ)fdisk.rel >> $(TMP)fdisk.arf |
|||
$(ECHO) $(OBJ)cpmbdos.rel >> $(TMP)fdisk.arf |
|||
$(ECHO) $(OBJ)cprintf.rel >> $(TMP)fdisk.arf |
|||
$(ECHO) -e >> $(TMP)fdisk.arf |
|||
|
|||
|
|||
#-----------------------------------------------------------
|
|||
|
|||
# Also build host version of fdisk for testing purposes
|
|||
|
|||
$(BIN)fdisk$(EXE): $(SRC)fdisk.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)fdisk.c -o $(BIN)fdisk |
|||
|
|||
############################################################
|
|||
|
|||
# Build CP/M-80 Command File Structure Files
|
|||
|
|||
$(OBJ)cpm0.rel: $(SRC)cpm0.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)cpm0.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cpm0.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cpm0.lst $(LST) |
|||
|
|||
$(OBJ)cpmbdos.rel: $(SRC)cpmbdos.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)cpmbdos.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cpmbdos.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cpmbdos.lst $(LST) |
|||
|
|||
############################################################
|
|||
|
|||
# Build ROM Image structure files
|
|||
|
|||
$(OBJ)crt0.rel: $(SRC)crt0.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)crt0.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)crt0.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)crt0.lst $(LST) |
|||
|
|||
$(OBJ)crt0jplp.rel: $(SRC)crt0jplp.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)crt0jplp.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)crt0jplp.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)crt0jplp.lst $(LST) |
|||
|
|||
$(OBJ)crt0scrm.rel: $(SRC)crt0scrm.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)crt0scrm.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)crt0scrm.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)crt0scrm.lst $(LST) |
|||
|
|||
$(OBJ)bdosb01.rel: $(SRC)bdosb01.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)bdosb01.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)bdosb01.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)bdosb01.lst $(LST) |
|||
|
|||
$(OBJ)ccpb03.rel: $(SRC)ccpb03.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)ccpb03.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)ccpb03.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)ccpb03.lst $(LST) |
|||
|
|||
#
|
|||
# Assemble hardware control code for SBC V2
|
|||
#
|
|||
$(OBJ)cbios.rel: $(SRC)cbios.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)cbios.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cbios.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cbios.lst $(LST) |
|||
|
|||
#
|
|||
# Assemble a monitor program for the SBC V2
|
|||
#
|
|||
$(OBJ)dbgmon.rel: $(SRC)dbgmon.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)dbgmon.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)dbgmon.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)dbgmon.lst $(LST) |
|||
|
|||
###########################################################
|
|||
|
|||
# Build host based tools ( dwgh2b, jrch2b, load, verify)
|
|||
|
|||
$(DWGH2B): $(SRC)dwgh2b.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)dwgh2b.c -o $(BIN)dwgh2b$(EXE) |
|||
|
|||
#
|
|||
# Compile John Coffman's hex2bin program
|
|||
#
|
|||
$(JRCH2B): $(SRC)jrch2b.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)jrch2b.c -o $(BIN)jrch2b$(EXE) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(BIN)jrch2b $(BIN)jrcb2h |
|||
|
|||
#
|
|||
# Compile Doug's "load" program
|
|||
#
|
|||
$(LOAD): $(SRC)load.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)load.c -o $(BIN)load$(EXE) |
|||
|
|||
$(SYSGEN): $(SRC)sysgen.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)sysgen.c -o $(BIN)sysgen$(EXE) |
|||
|
|||
#
|
|||
# Compile Doug's verif program that compares binary file regions
|
|||
#
|
|||
$(VERIFY): $(SRC)verify.c Makefile $(MK) |
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)verify.c -o $(BIN)verify |
|||
|
|||
$(BIN)lechocr: $(SRC)lechocr.c $(MK) |
|||
# $(QUIET)$(TCC) $(TCCFLG) $(SRC)lechocr.c -o $(BIN)lechocr
|
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)lechocr.c |
|||
$(QUIET)$(COPY) lechocr.exe $(BIN) |
|||
|
|||
$(BIN)lecholf: $(SRC)lecholf.c $(MK) |
|||
# $(QUIET)$(TCC) $(TCCFLG) $(SRC)lecholf.c -o $(BIN)lecholf
|
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)lecholf.c |
|||
$(COPY) lecholf.exe $(BIN) |
|||
|
|||
$(BIN)lechocrlf: $(SRC)lechocrlf.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)lechocrlf.c -o $(BIN)lechocrlf |
|||
|
|||
$(BIN)lecholfcr: $(SRC)lecholfcr.c $(MK) |
|||
# $(QUIET)$(TCC) $(TCCFLG) $(SRC)lecholfcr.c -o $(BIN)lecholfcr
|
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)lecholfcr.c -o $(BIN)lecholfcr |
|||
|
|||
############################################################
|
|||
|
|||
# Builder specific utility rules
|
|||
|
|||
dwginstall: |
|||
$(COPY) $(COMFILES) ~/Documents/devobox/cdrive |
|||
|
|||
############################################################
|
|||
|
|||
#
|
|||
# Delete all dynamically generated files that don't need to be
|
|||
# saved.
|
|||
#
|
|||
clean: |
|||
$(QUIET)$(DEL) $(DELFLG) *.hex *.ihx *.lst *.rel *.rst *.lnk *.lk |
|||
$(QUIET)$(DEL) $(DELFLG) *.sym *.map *.noi *.asm *.com *.ini *.bin |
|||
$(QUIET)$(DEL) $(DELFLG) obj/* bin/* com/* rom/* tmp/* map/* lst/* |
|||
|
|||
##################
|
|||
# eof - Makefile #
|
|||
##################
|
|||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
@ -1,92 +0,0 @@ |
|||
Usage: |
|||
hex2bin <options> [<flags> <filename.hex>]+ |
|||
bin2hex <options> <flags> <filename.bin> |
|||
|
|||
Options: |
|||
-o <output filename> -- default is 'out.bin' or 'out.hex' |
|||
No suffix is added to the filename, so the full |
|||
file name must be specified. |
|||
|
|||
-p <pad byte> -- default is 0xFF, which is the erased |
|||
value for most ROM's. Pad bytes are not explicitly |
|||
written out when 'bin2hex' is used. This reduces |
|||
the size of sparse ROM images. |
|||
|
|||
-R <ROM size> -- may be any value. Normally this will be |
|||
specified as '128k' or 0x10000. The suffixes 'k' |
|||
and 'M' are recognized. The default value is 64k |
|||
for 'hex2bin' and 1M for 'bin2hex'. |
|||
|
|||
-v [<verbosity level>] -- used primarily for debugging. A |
|||
verbosity level of 3 will print each line as it is |
|||
processed. |
|||
|
|||
Options are global, and may be specified anywhere on the command |
|||
line. Only 'flags', below, are position sensitive. Flags must |
|||
be specified immediately before the file name they are to affect. |
|||
They do not affect more that a single file. They reset to their |
|||
default values before the next input file, scanning left to |
|||
right, is processed. |
|||
|
|||
Flags: |
|||
Flag values apply only to the following file, and are reset |
|||
to the default values before the next file is processed. The |
|||
source and destination flags allow code to be relocated |
|||
within the ROM so that code may be loaded at a different |
|||
location than where it will ultimately be run. |
|||
|
|||
-d <destination address in output file> -- default is 0. |
|||
data will only be loaded between the limits of |
|||
the -d <dest> address and the -D <limit> address |
|||
minus 1. |
|||
|
|||
-D <destination limit in output file> -- default is 16M. No data |
|||
will be loaded at or above this address. |
|||
|
|||
-s <source address in input file> -- default is 0. Hex input |
|||
is only processed if it falls at addresses in the |
|||
.hex input file between the -s <srs> address and the |
|||
-S <limit> address minus 1. Likewise, Bin input |
|||
is only processed if it falls between similar limits |
|||
in the input ROM image. |
|||
|
|||
-S <source limit in hex file> -- default is 16M. No input |
|||
data at or above this address will be processed. |
|||
|
|||
Numeric values on the command line may be specified in any C-like |
|||
syntax: 0x0000 is hexadecimal, 1234 is decimal, and 0177 is |
|||
octal. In addition the suffixes 'k' for kilo- and 'M' for mega- |
|||
cause the preceding values to be multiplied by 1024 or 1048576, |
|||
respectively. |
|||
|
|||
Examples: |
|||
hex2bin -p 0xFF -R32k cpm22.hex -o cpmtest.bin |
|||
hex2bin -o cpmtest.bin cpm22.hex -R 0x8000 -p255 |
|||
|
|||
The preceding two lines have identical effects in all |
|||
respects. |
|||
|
|||
hex2bin -R 1M -s 0xd000 -d 0x0800 -D0x2800 image.hex \ |
|||
pagezero.hex -oROMIMAGE.bin |
|||
|
|||
The above line loads the 'pagezero.hex' file at the exact |
|||
addresses specified in the file; however, the 'image.hex' file |
|||
is assembled at 0xD000, must run at 0xD000, but is loaded |
|||
between 0x800 <= addr < 0x2800. It is presumed that the |
|||
code will be relocated to the correct address before it is |
|||
executed. |
|||
|
|||
bin2hex -R128k romimage.bin -o image.hex |
|||
|
|||
Simple conversion from a BIN file to a HEX file. The ROM |
|||
data is limited to 128k. |
|||
|
|||
bin2hex -s 0x1000 -S 0x2000 -d 0x21000 romimage.bin \ |
|||
-o Relocated.hex |
|||
|
|||
Extract from a ROM image file all of the data between 0x1000 |
|||
and 0x1FFF, inclusive, and write to an Intel hex file for |
|||
re-loading two 64k segments higher in a future ROM. |
|||
|
|||
|
|||
(end) |
|||
Binary file not shown.
|
Before Width: | Height: | Size: 40 KiB |
Binary file not shown.
@ -1,558 +0,0 @@ |
|||
# mak/makebody.mfi 8/8/2011 dwg -
|
|||
|
|||
# Misc other macros
|
|||
|
|||
BIN = bin$(DELIM) |
|||
COM = com$(DELIM) |
|||
INC = inc$(DELIM) |
|||
LIB = lib$(DELIM) |
|||
LST = lst$(DELIM) |
|||
MAP = map$(DELIM) |
|||
OBJ = obj$(DELIM) |
|||
REF = ref$(DELIM) |
|||
ROM = rom$(DELIM) |
|||
SRC = src$(DELIM) |
|||
TMP = tmp$(DELIM) |
|||
|
|||
# CP/M-80 v2.2 Command files written in SDCC
|
|||
COMFILES = $(COM)copyfile.com $(COM)fdisk.com |
|||
|
|||
# Components used by CP/M-80 v2.2 Command files
|
|||
COMRELS = $(OBJ)cpm0.rel $(OBJ)cpmbdos.rel $(OBJ)cprintf.rel |
|||
|
|||
# Components of ROM image containing CP/M for SBC V2
|
|||
CPMRELS = $(OBJ)crt0.rel $(OBJ)dbgmon.rel $(OBJ)bdosb01.rel \
|
|||
$(OBJ)ccpb03.rel $(OBJ)cbios.rel |
|||
|
|||
# Components of ROM image used in test protocols
|
|||
ROMRELS = $(OBJ)crt0jplp.rel $(OBJ)crt0scrm.rel |
|||
|
|||
# Components that control hardware in SBC V2
|
|||
SBCV2HW = |
|||
|
|||
# Components that control hardware in the SCSI2IDE
|
|||
SCSI2IDEHW = $(OBJ)z53c80.rel |
|||
|
|||
FDISK = $(BIN)fdisk$(EXE) |
|||
DWGH2B = $(BIN)dwgh2b$(EXE) |
|||
INCFILES = $(INC)cpmbdos.h $(INC)cprintf.h $(INC)portab.h |
|||
JRCH2B = $(BIN)jrch2b$(EXE) |
|||
LOAD = $(BIN)load$(EXE) |
|||
MK = Makefile |
|||
#QUIET = @
|
|||
|
|||
# ROM images for SBC V2 and N8
|
|||
ROMFILES = $(ROM)scsiscrm.rom $(ROM)scsijplp.rom $(ROM)scsi2ide.rom $(ROM)baseline.rom $(ROM)n8.rom |
|||
SCSI2IDE = $(ROM)scsi2ide.rom |
|||
|
|||
SYSGEN = $(BIN)sysgen$(EXE) |
|||
VERIFY = $(BIN)verify$(EXE) |
|||
|
|||
# C programs compiled on host system used in build
|
|||
TOOLS = $(FDISK) $(DWGH2B) $(LOAD) $(JRCH2B) $(SYSGEN) |
|||
|
|||
# Versions of 'echo' compiled on host system
|
|||
ETOOLS = $(BIN)lechocr $(BIN)lecholf $(BIN)lechocrlf $(BIN)lecholfcr |
|||
|
|||
# dribdos.rel is not part of the production set yet
|
|||
##TEST = dribdos.rel
|
|||
|
|||
############################################################
|
|||
|
|||
#all: $(ETOOLS) $(TOOLS) $(BINFILES) $(COMFILES) $(CPMFILES) $(ROMFILES)
|
|||
|
|||
#all: $(TEST) $(ROMFILES) $(COMFILES)
|
|||
|
|||
roms: $(ROMFILES) |
|||
scsi2ide: $(SCSI2IDE) |
|||
|
|||
############################################################
|
|||
|
|||
# A test assembly of DRI source code for BDOS (from SIMH)
|
|||
dribdos.rel: $(SRC)dribdos.s |
|||
$(QUIET)$(SDAS) $(SDASFLG) dribdos.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)dribdos.lst $(LST) |
|||
|
|||
############################################################
|
|||
############################################################
|
|||
|
|||
# Build SCSIJPLP ROM image
|
|||
|
|||
$(ROM)scsijplp.rom: $(OBJ)scsijplp.bin $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)scsijplp.bin $(ROM)scsijplp.rom |
|||
$(QUIET)$(DEL) $(DELFLG) scsijplp.* |
|||
|
|||
$(OBJ)scsijplp.bin: $(OBJ)scsijplp.hex $(DWGH2B) $(MK) |
|||
$(QUIET)$(DWGH2B) $(OBJ)scsijplp |
|||
|
|||
$(OBJ)scsijplp.hex: $(OBJ)scsijplp.ihx $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)scsijplp.ihx $(OBJ)scsijplp.hex |
|||
|
|||
$(OBJ)scsijplp.ihx: $(OBJ)crt0jplp.rel $(TMP)scsijplp.arf $(MK) |
|||
$(QUIET)$(COPY) $(TMP)scsijplp.arf $(TMP)scsijplp.lk |
|||
$(QUIET)$(COPY) $(TMP)scsijplp.arf $(TMP)scsijplp.lnk |
|||
$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)scsijplp.lnk |
|||
$(QUIET)$(COPY) $(COPYFLG) scsijplp.ihx $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) scsijplp.map $(MAP) |
|||
|
|||
#########################################################
|
|||
# Dynamically generate linker control file for scsi2ide #
|
|||
# (now uses the macro controlled ECHO feature #
|
|||
#########################################################
|
|||
$(TMP)scsijplp.arf: $(MK) |
|||
$(ECHO) -mjx > $(TMP)scsijplp.arf |
|||
$(ECHO) -i scsijplp.ihx >> $(TMP)scsijplp.arf |
|||
$(ECHO) -k $(SDCCLIB) >> $(TMP)scsijplp.arf |
|||
$(ECHO) -l z80 >> $(TMP)scsijplp.arf |
|||
$(ECHO) $(OBJ)crt0jplp.rel >> $(TMP)scsijplp.arf |
|||
$(ECHO) -e >> $(TMP)scsijplp.arf |
|||
|
|||
############################################################
|
|||
############################################################
|
|||
|
|||
# Build SCSISCRM ROM image
|
|||
|
|||
$(ROM)scsiscrm.rom: $(OBJ)scsiscrm.bin $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)scsiscrm.bin $(ROM)scsiscrm.rom |
|||
$(QUIET)$(DEL) $(DELFLG) scsiscrm.* |
|||
|
|||
$(OBJ)scsiscrm.bin: $(OBJ)scsiscrm.hex $(DWGH2B) $(MK) |
|||
$(QUIET)$(DWGH2B) $(OBJ)scsiscrm |
|||
|
|||
$(OBJ)scsiscrm.hex: $(OBJ)scsiscrm.ihx $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)scsiscrm.ihx $(OBJ)scsiscrm.hex |
|||
|
|||
$(OBJ)scsiscrm.ihx: $(OBJ)crt0scrm.rel $(TMP)scsiscrm.arf $(MK) |
|||
$(QUIET)$(COPY) $(TMP)scsiscrm.arf $(TMP)scsiscrm.lk |
|||
$(QUIET)$(COPY) $(TMP)scsiscrm.arf $(TMP)scsiscrm.lnk |
|||
$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)scsiscrm.lnk |
|||
$(QUIET)$(COPY) $(COPYFLG) scsiscrm.ihx $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) scsiscrm.map $(MAP) |
|||
|
|||
#########################################################
|
|||
# Dynamically generate linker control file for scsiscrm #
|
|||
# (now uses the macro controlled ECHO feature #
|
|||
#########################################################
|
|||
$(TMP)scsiscrm.arf: $(MK) |
|||
$(ECHO) -mjx > $(TMP)scsiscrm.arf |
|||
$(ECHO) -i scsiscrm.ihx >> $(TMP)scsiscrm.arf |
|||
$(ECHO) -k $(SDCCLIB) >> $(TMP)scsiscrm.arf |
|||
$(ECHO) -l z80 >> $(TMP)scsiscrm.arf |
|||
$(ECHO) $(OBJ)crt0scrm.rel >> $(TMP)scsiscrm.arf |
|||
$(ECHO) -e >> $(TMP)scsiscrm.arf |
|||
|
|||
############################################################
|
|||
############################################################
|
|||
|
|||
# Build SCSI2IDE ROM image
|
|||
|
|||
$(ROM)scsi2ide.rom: $(OBJ)scsi2ide.bin $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)scsi2ide.bin $(ROM)scsi2ide.rom |
|||
$(QUIET)$(DEL) $(DELFLG) scsi2ide.* |
|||
|
|||
$(OBJ)scsi2ide.bin: $(OBJ)scsi2ide.hex $(DWGH2B) $(MK) |
|||
$(QUIET)$(DWGH2B) $(OBJ)scsi2ide |
|||
|
|||
$(OBJ)scsi2ide.hex: $(OBJ)scsi2ide.ihx $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)scsi2ide.ihx $(OBJ)scsi2ide.hex |
|||
|
|||
$(OBJ)scsi2ide.ihx: $(CPMRELS) $(SCSI2IDEHW) $(OBJ)scsi2ide.rel $(TMP)scsi2ide.arf $(MK) |
|||
$(QUIET)$(COPY) $(TMP)scsi2ide.arf $(TMP)scsi2ide.lk |
|||
$(QUIET)$(COPY) $(TMP)scsi2ide.arf $(TMP)scsi2ide.lnk |
|||
$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)scsi2ide.lnk |
|||
$(QUIET)$(COPY) $(COPYFLG) scsi2ide.ihx $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) scsi2ide.map $(MAP) |
|||
|
|||
#########################################################
|
|||
# Dynamically generate linker control file for scsi2ide #
|
|||
# (now uses the macro controlled ECHO feature #
|
|||
#########################################################
|
|||
$(TMP)scsi2ide.arf: $(MK) |
|||
$(ECHO) -mjx > $(TMP)scsi2ide.arf |
|||
$(ECHO) -i scsi2ide.ihx >> $(TMP)scsi2ide.arf |
|||
$(ECHO) -k $(SDCCLIB) >> $(TMP)scsi2ide.arf |
|||
$(ECHO) -l z80 >> $(TMP)scsi2ide.arf |
|||
# $(ECHO) -b _CCPB03 = 0xD000 >> $(TMP)scsi2ide.arf
|
|||
# $(ECHO) -b _BDOSB01 = 0xD800 >> $(TMP)scsi2ide.arf
|
|||
# $(ECHO) -b _CBIOS = 0xE600 >> $(TMP)scsi2ide.arf
|
|||
# $(ECHO) -b _DBGMON = 0x8000 >> $(TMP)scsi2ide.arf
|
|||
$(ECHO) $(OBJ)crt0.rel >> $(TMP)scsi2ide.arf |
|||
$(ECHO) $(OBJ)scsi2ide.rel >> $(TMP)scsi2ide.arf |
|||
# $(ECHO) $(OBJ)dbgmon.rel >> $(TMP)scsi2ide.arf
|
|||
# $(ECHO) $(OBJ)ccpb03.rel >> $(TMP)scsi2ide.arf
|
|||
# $(ECHO) $(OBJ)bdosb01.rel >> $(TMP)scsi2ide.arf
|
|||
# $(ECHO) $(OBJ)cbios.rel >> $(TMP)scsi2ide.arf
|
|||
$(ECHO) -e >> $(TMP)scsi2ide.arf |
|||
|
|||
########################################################
|
|||
# Compile C portion of the scsi2ide EEPROM Image
|
|||
$(OBJ)scsi2ide.rel: $(SRC)scsi2ide.c $(MK) |
|||
$(QUIET)$(SDCC) $(SDCCFLG) -c $(SRC)scsi2ide.c |
|||
$(QUIET)$(COPY) $(COPYFLG) scsi2ide.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) scsi2ide.lst $(LST) |
|||
|
|||
|
|||
############################################################
|
|||
############################################################
|
|||
|
|||
# Build SBC V2 ROM image
|
|||
|
|||
$(ROM)baseline.rom: $(OBJ)baseline.bin $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)baseline.bin $(ROM)baseline.rom |
|||
$(QUIET)$(DEL) $(DELFLG) baseline.* |
|||
|
|||
$(OBJ)baseline.bin: $(OBJ)baseline.hex $(DWGH2B) $(MK) |
|||
$(QUIET)$(DWGH2B) $(OBJ)baseline |
|||
|
|||
$(OBJ)baseline.hex: $(OBJ)baseline.ihx $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)baseline.ihx $(OBJ)baseline.hex |
|||
|
|||
$(OBJ)baseline.ihx: $(CPMRELS) $(SBCV2HW) $(OBJ)baseline.rel $(TMP)baseline.arf $(MK) |
|||
$(QUIET)$(COPY) $(TMP)baseline.arf $(TMP)baseline.lk |
|||
$(QUIET)$(COPY) $(TMP)baseline.arf $(TMP)baseline.lnk |
|||
$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)baseline.lnk |
|||
$(QUIET)$(COPY) $(COPYFLG) baseline.ihx $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) baseline.map $(MAP) |
|||
|
|||
#########################################################
|
|||
# Dynamically generate linker control file for baseline #
|
|||
# (now uses the macro controlled ECHO feature #
|
|||
#########################################################
|
|||
$(TMP)baseline.arf: $(MK) |
|||
$(ECHO) -mjx > $(TMP)baseline.arf |
|||
$(ECHO) -i baseline.ihx >> $(TMP)baseline.arf |
|||
$(ECHO) -k $(SDCCLIB) >> $(TMP)baseline.arf |
|||
$(ECHO) -l z80 >> $(TMP)baseline.arf |
|||
$(ECHO) -b _CCPB03 = 0xD000 >> $(TMP)baseline.arf |
|||
$(ECHO) -b _BDOSB01 = 0xD800 >> $(TMP)baseline.arf |
|||
$(ECHO) -b _CBIOS = 0xE600 >> $(TMP)baseline.arf |
|||
$(ECHO) -b _DBGMON = 0x8000 >> $(TMP)baseline.arf |
|||
$(ECHO) $(OBJ)crt0.rel >> $(TMP)baseline.arf |
|||
$(ECHO) $(OBJ)baseline.rel >> $(TMP)baseline.arf |
|||
$(ECHO) $(OBJ)dbgmon.rel >> $(TMP)baseline.arf |
|||
$(ECHO) $(OBJ)ccpb03.rel >> $(TMP)baseline.arf |
|||
$(ECHO) $(OBJ)bdosb01.rel >> $(TMP)baseline.arf |
|||
$(ECHO) $(OBJ)cbios.rel >> $(TMP)baseline.arf |
|||
$(ECHO) -e >> $(TMP)baseline.arf |
|||
|
|||
########################################################
|
|||
# Compile C portion of the Baseline PROM Image
|
|||
$(OBJ)baseline.rel: $(SRC)baseline.c $(MK) |
|||
$(QUIET)$(SDCC) $(SDCCFLG) -c $(SRC)baseline.c |
|||
$(QUIET)$(COPY) $(COPYFLG) baseline.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) baseline.lst $(LST) |
|||
|
|||
############################################################
|
|||
|
|||
# Build N8 ROM image
|
|||
|
|||
#
|
|||
# Save the resulting merged image in the Rom folder
|
|||
#
|
|||
$(ROM)n8.rom: $(OBJ)n8-romim.bin $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)n8-romim.bin $(ROM)n8.rom |
|||
$(QUIET)$(DEL) $(DELFLG) n8.* |
|||
|
|||
#
|
|||
# Convert the Intel hex file into a binary, similar
|
|||
# to the results of the "copy /B ..."
|
|||
#
|
|||
$(OBJ)n8-romim.bin: $(OBJ)sysimage.hex $(REF)n8-romim.ref $(SYSGEN) $(HEX2BIN) $(MK) |
|||
$(QUIET)$(DWGH2B) $(OBJ)sysimage |
|||
$(QUIET)$(COPY) $(REF)n8-romim.ref $(OBJ)n8-romim.bin |
|||
$(QUIET)$(SYSGEN) -i $(OBJ)sysimage.bin $(OBJ)n8-romim.bin |
|||
|
|||
#
|
|||
# Take the output of the linker and rename to the more
|
|||
# recognizable .hex form and the expected name "sysimage.hex"
|
|||
#
|
|||
$(OBJ)sysimage.hex: $(OBJ)n8.ihx $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)n8.ihx $(OBJ)sysimage.hex |
|||
|
|||
#
|
|||
# Combine the independently assembled components into one piece
|
|||
# and output Intel hex file (ihx)
|
|||
#
|
|||
$(OBJ)n8.ihx: $(OBJ)loadern8.rel $(OBJ)dbgmon.rel $(OBJ)ccpb03.rel $(OBJ)bdosb01.rel $(OBJ)cbiosn8.rel $(TMP)n8.arf $(MK) |
|||
$(QUIET)$(COPY) $(TMP)n8.arf $(TMP)n8.lk |
|||
$(QUIET)$(COPY) $(TMP)n8.arf $(TMP)n8.lnk |
|||
$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)n8.lnk |
|||
$(QUIET)$(COPY) $(COPYFLG) n8.ihx $(OBJ)n8.ihx |
|||
$(QUIET)$(COPY) $(COPYFLG) n8.map $(MAP) |
|||
|
|||
$(OBJ)cbiosn8.rel: $(SRC)cbiosn8.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)cbiosn8.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cbiosn8.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cbiosn8.lst $(LST) |
|||
|
|||
$(OBJ)loadern8.rel: $(SRC)loadern8.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)loadern8.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)loadern8.rel $(OBJ) |
|||
$(QUIET)$(COPY $(COPYFLG) $(SRC)loadern8.lst $(LST) |
|||
|
|||
########################################################
|
|||
# Dynamically generate the linker control file for N8 #
|
|||
# Now uses the macro controlled ECHO feature #
|
|||
########################################################
|
|||
$(TMP)n8.arf: Makefile |
|||
$(ECHO) -mjx > $(TMP)n8.arf |
|||
$(ECHO) -i n8.ihx >> $(TMP)n8.arf |
|||
$(ECHO) -k $(SDCCLIB) >> $(TMP)n8.arf |
|||
$(ECHO) -l z80 >> $(TMP)n8.arf |
|||
$(ECHO) -b _CCPB03 = 0x0900 >> $(TMP)n8.arf |
|||
$(ECHO) -b _BDOSB01 = 0x1100 >> $(TMP)n8.arf |
|||
$(ECHO) -b _CBIOS = 0x1f00 >> $(TMP)n8.arf |
|||
$(ECHO) $(OBJ)loadern8.rel >> $(TMP)n8.arf |
|||
$(ECHO) $(OBJ)dbgmon.rel >> $(TMP)n8.arf |
|||
$(ECHO) $(OBJ)ccpb03.rel >> $(TMP)n8.arf |
|||
$(ECHO) $(OBJ)bdosb01.rel >> $(TMP)n8.arf |
|||
$(ECHO) $(OBJ)cbiosn8.rel >> $(TMP)n8.arf |
|||
$(ECHO) -e >> $(TMP)n8.arf |
|||
|
|||
############################################################
|
|||
|
|||
# Hardware specific assemblies (most likely used by BIOS's)
|
|||
|
|||
#
|
|||
# Assemble hardware control code for the Zilog Z53C8003V5C
|
|||
#
|
|||
$(OBJ)z53c80.rel: $(SRC)z53c80.c $(MK) |
|||
$(QUIET)$(SDCC) $(SDCCFLG) $(SRC)z53c80.c |
|||
$(QUIET)$(COPY) $(COPYFLG) z53c80.rel $(OBJ) |
|||
$(QUIET)$(DEL) $(DELFLG) z53c80.* |
|||
|
|||
#
|
|||
# Compile ersatz printf routine for use in CP/M-80 command files
|
|||
#
|
|||
$(OBJ)cprintf.rel: $(SRC)cprintf.c $(MK) |
|||
$(QUIET)$(SDCC) $(SDCCFLG) $(SRC)cprintf.c |
|||
$(QUIET)$(COPY) $(COPYFLG) cprintf.rel obj |
|||
$(QUIET)$(DEL) $(DELFLG) cprintf.* |
|||
|
|||
############################################################
|
|||
|
|||
# Build CP/M 2.2 command files (copyfile.com, fdisk.com)
|
|||
|
|||
#-----------------------------------------------------------
|
|||
|
|||
$(COM)copyfile.com: $(OBJ)copyfile.com $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)copyfile.com $(COM)copyfile.com |
|||
$(QUIET)$(DEL) $(DELFLG) copyfile.* |
|||
|
|||
$(OBJ)copyfile.com: $(OBJ)copyfile.hex $(LOAD) $(BINFILES) $(MK) |
|||
$(QUIET)$(LOAD) $(OBJ)copyfile |
|||
|
|||
$(OBJ)copyfile.hex: $(OBJ)copyfile.ihx $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)copyfile.ihx $(OBJ)copyfile.hex |
|||
|
|||
$(OBJ)copyfile.ihx: $(OBJ)copyfile.rel $(COMRELS) $(TMP)copyfile.arf $(MK) |
|||
$(QUIET)$(COPY) $(TMP)copyfile.arf $(TMP)copyfile.lnk |
|||
|
|||
$(QUIET)$(SDLD) $(LOPTS) -nf $(TMP)copyfile.lnk |
|||
$(QUIET)$(COPY) $(COPYFLG) copyfile.ihx obj |
|||
$(QUIET)$(COPY) $(COPYFLG) copyfile.map map |
|||
|
|||
##############################################################
|
|||
# Dynamicaly create linker command file for copyfile utility #
|
|||
# Now uses the macro controlled ECHO feature #
|
|||
##############################################################
|
|||
$(TMP)copyfile.arf: Makefile |
|||
$(ECHO) -mjx > $(TMP)copyfile.arf |
|||
$(ECHO) -i copyfile.ihx >> $(TMP)copyfile.arf |
|||
$(ECHO) -k $(SDCCLIB) >> $(TMP)copyfile.arf |
|||
$(ECHO) -l z80 >> $(TMP)copyfile.arf |
|||
$(ECHO) $(OBJ)cpm0.rel >> $(TMP)copyfile.arf |
|||
$(ECHO) $(OBJ)copyfile.rel >> $(TMP)copyfile.arf |
|||
$(ECHO) $(OBJ)cpmbdos.rel >> $(TMP)copyfile.arf |
|||
$(ECHO) $(OBJ)cprintf.rel >> $(TMP)copyfile.arf |
|||
$(ECHO) -e >> $(TMP)copyfile.arf |
|||
|
|||
$(OBJ)copyfile.rel: $(SRC)copyfile.c $(MK) |
|||
$(QUIET)$(SDCC) $(SDCCFLG) $(SRC)copyfile.c |
|||
$(QUIET)$(COPY) copyfile.rel obj |
|||
$(QUIET)$(DEL) $(DELFLG) copyfile.rel |
|||
ls obj |
|||
|
|||
#-----------------------------------------------------------
|
|||
|
|||
#
|
|||
# Use locally compiled 'load' command to covert Intel
|
|||
# hex formal file to a binary CP/M-80 command file.
|
|||
#
|
|||
$(COM)fdisk.com: $(OBJ)fdisk.hex $(TOOLS) $(MK) |
|||
$(QUIET)$(BIN)load $(OBJ)fdisk |
|||
$(QUIET)$(COPY) $(COPYFLG) $(OBJ)fdisk.com com |
|||
$(QUIET)$(DEL) $(DELFLG) fdisk.* |
|||
|
|||
#
|
|||
# rename 'ihx' output of linker to 'hex'
|
|||
|
|||
$(OBJ)fdisk.hex: $(OBJ)fdisk.ihx $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)fdisk.ihx $(OBJ)fdisk.hex |
|||
|
|||
$(OBJ)fdisk.ihx: $(OBJ)fdisk.rel $(TMP)fdisk.arf $(MK) |
|||
$(QUIET)$(COPY) $(TMP)fdisk.arf $(TMP)fdisk.lnk |
|||
$(QUIET)$(COPY) $(TMP)fdisk.arf $(TMP)fdisk.lk |
|||
$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)fdisk.lnk |
|||
$(QUIET)$(COPY) $(COPYFLG) fdisk.ihx $(OBJ)fdisk.ihx |
|||
$(QUIET)$(COPY) $(COPYFLG) fdisk.map map |
|||
|
|||
$(OBJ)fdisk.rel: $(SRC)fdisk.c $(INCFILES) $(MK) |
|||
$(QUIET)$(SDCC) -I inc $(SDCCFLG) $(SRC)fdisk.c |
|||
$(QUIET)$(COPY) $(COPYFLG) fdisk.rel $(OBJ) |
|||
|
|||
############################################################################
|
|||
# Dynamically created linker command file for fdisk utility (CP/M version) #
|
|||
# Now uses macro controlled ECHO feature #
|
|||
############################################################################
|
|||
$(TMP)fdisk.arf: $(MK) |
|||
$(ECHO) -mjx > $(TMP)fdisk.arf |
|||
$(ECHO) -i fdisk.ihx >> $(TMP)fdisk.arf |
|||
$(ECHO) -k $(SDCCLIB) >> $(TMP)fdisk.arf |
|||
$(ECHO) -l z80 >> $(TMP)fdisk.arf |
|||
$(ECHO) $(OBJ)cpm0.rel >> $(TMP)fdisk.arf |
|||
$(ECHO) $(OBJ)fdisk.rel >> $(TMP)fdisk.arf |
|||
$(ECHO) $(OBJ)cpmbdos.rel >> $(TMP)fdisk.arf |
|||
$(ECHO) $(OBJ)cprintf.rel >> $(TMP)fdisk.arf |
|||
$(ECHO) -e >> $(TMP)fdisk.arf |
|||
|
|||
|
|||
#-----------------------------------------------------------
|
|||
|
|||
# Also build host version of fdisk for testing purposes
|
|||
|
|||
$(BIN)fdisk$(EXE): $(SRC)fdisk.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)fdisk.c -o $(BIN)fdisk |
|||
|
|||
############################################################
|
|||
|
|||
# Build CP/M-80 Command File Structure Files
|
|||
|
|||
$(OBJ)cpm0.rel: $(SRC)cpm0.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)cpm0.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cpm0.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cpm0.lst $(LST) |
|||
|
|||
$(OBJ)cpmbdos.rel: $(SRC)cpmbdos.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)cpmbdos.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cpmbdos.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cpmbdos.lst $(LST) |
|||
|
|||
############################################################
|
|||
|
|||
# Build ROM Image structure files
|
|||
|
|||
$(OBJ)crt0.rel: $(SRC)crt0.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)crt0.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)crt0.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)crt0.lst $(LST) |
|||
|
|||
$(OBJ)crt0jplp.rel: $(SRC)crt0jplp.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)crt0jplp.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)crt0jplp.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)crt0jplp.lst $(LST) |
|||
|
|||
$(OBJ)crt0scrm.rel: $(SRC)crt0scrm.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)crt0scrm.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)crt0scrm.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)crt0scrm.lst $(LST) |
|||
|
|||
$(OBJ)bdosb01.rel: $(SRC)bdosb01.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)bdosb01.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)bdosb01.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)bdosb01.lst $(LST) |
|||
|
|||
$(OBJ)ccpb03.rel: $(SRC)ccpb03.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)ccpb03.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)ccpb03.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)ccpb03.lst $(LST) |
|||
|
|||
#
|
|||
# Assemble hardware control code for SBC V2
|
|||
#
|
|||
$(OBJ)cbios.rel: $(SRC)cbios.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)cbios.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cbios.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cbios.lst $(LST) |
|||
|
|||
#
|
|||
# Assemble a monitor program for the SBC V2
|
|||
#
|
|||
$(OBJ)dbgmon.rel: $(SRC)dbgmon.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)dbgmon.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)dbgmon.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)dbgmon.lst $(LST) |
|||
|
|||
###########################################################
|
|||
|
|||
# Build host based tools ( dwgh2b, jrch2b, load, verify)
|
|||
|
|||
$(DWGH2B): $(SRC)dwgh2b.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)dwgh2b.c -o $(BIN)dwgh2b$(EXE) |
|||
|
|||
#
|
|||
# Compile John Coffman's hex2bin program
|
|||
#
|
|||
$(JRCH2B): $(SRC)jrch2b.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)jrch2b.c -o $(BIN)jrch2b$(EXE) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(BIN)jrch2b $(BIN)jrcb2h |
|||
|
|||
#
|
|||
# Compile Doug's "load" program
|
|||
#
|
|||
$(LOAD): $(SRC)load.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)load.c -o $(BIN)load$(EXE) |
|||
|
|||
$(SYSGEN): $(SRC)sysgen.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)sysgen.c -o $(BIN)sysgen$(EXE) |
|||
|
|||
#
|
|||
# Compile Doug's verif program that compares binary file regions
|
|||
#
|
|||
$(VERIFY): $(SRC)verify.c Makefile $(MK) |
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)verify.c -o $(BIN)verify |
|||
|
|||
$(BIN)lechocr: $(SRC)lechocr.c $(MK) |
|||
# $(QUIET)$(TCC) $(TCCFLG) $(SRC)lechocr.c -o $(BIN)lechocr
|
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)lechocr.c |
|||
$(QUIET)$(COPY) lechocr.exe $(BIN) |
|||
|
|||
$(BIN)lecholf: $(SRC)lecholf.c $(MK) |
|||
# $(QUIET)$(TCC) $(TCCFLG) $(SRC)lecholf.c -o $(BIN)lecholf
|
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)lecholf.c |
|||
$(COPY) lecholf.exe $(BIN) |
|||
|
|||
$(BIN)lechocrlf: $(SRC)lechocrlf.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)lechocrlf.c -o $(BIN)lechocrlf |
|||
|
|||
$(BIN)lecholfcr: $(SRC)lecholfcr.c $(MK) |
|||
# $(QUIET)$(TCC) $(TCCFLG) $(SRC)lecholfcr.c -o $(BIN)lecholfcr
|
|||
$(QUIET)$(TCC) $(TCCFLG) $(SRC)lecholfcr.c -o $(BIN)lecholfcr |
|||
|
|||
############################################################
|
|||
|
|||
# Builder specific utility rules
|
|||
|
|||
dwginstall: |
|||
$(COPY) $(COMFILES) ~/Documents/devobox/cdrive |
|||
|
|||
############################################################
|
|||
|
|||
#
|
|||
# Delete all dynamically generated files that don't need to be
|
|||
# saved.
|
|||
#
|
|||
clean: |
|||
$(QUIET)$(DEL) $(DELFLG) *.hex *.ihx *.lst *.rel *.rst *.lnk *.lk |
|||
$(QUIET)$(DEL) $(DELFLG) *.sym *.map *.noi *.asm *.com *.ini *.bin |
|||
$(QUIET)$(DEL) $(DELFLG) obj$(DELIM)*.* |
|||
$(QUIET)$(DEL) $(DELFLG) bin$(DELIM)*.* |
|||
$(QUIET)$(DEL) $(DELFLG) com$(DELIM)*.* |
|||
$(QUIET)$(DEL) $(DELFLG) rom$(DELIM)*.* |
|||
$(QUIET)$(DEL) $(DELFLG) tmp$(DELIM)*.* |
|||
$(QUIET)$(DEL) $(DELFLG) map$(DELIM)*.* |
|||
$(QUIET)$(DEL) $(DELFLG) lst$(DELIM)*.* |
|||
|
|||
##################
|
|||
# eof - Makefile #
|
|||
##################
|
|||
@ -1,26 +0,0 @@ |
|||
# ubios/makefile.mac 8/8/2011 dwg - |
|||
|
|||
DELIM = / |
|||
SPREFIX = /Developer/sdcc |
|||
SDAS = $(SPREFIX)/bin/sdasz80 |
|||
SDASFLG = -plosff -Iinc |
|||
SDCC = $(SPREFIX)/bin/sdcc |
|||
SDCCFLG = -c -mz80 -D__SDCC__=1 -I inc |
|||
SDCCLIB = $(SPREFIX)/share/sdcc/lib/z80 |
|||
SDLD = $(SPREFIX)/bin/sdldz80 |
|||
SDLDFLG = |
|||
TPREFIX = |
|||
TCC = gcc |
|||
TCCFLG = -I inc |
|||
COPY = cp |
|||
DEL = rm |
|||
DELFLG = -f |
|||
# use native ECHO o Mac OS X |
|||
ECHO = echo |
|||
REN = mv |
|||
EXE = |
|||
|
|||
include common.mak |
|||
|
|||
|
|||
|
|||
@ -1,24 +0,0 @@ |
|||
|
|||
DELIM = \ |
|||
SDRIVE = C: |
|||
SPREFIX = $(SDRIVE)\sdcc |
|||
SDAS = $(SPREFIX)\bin\sdasz80 |
|||
SDASFLG = -plosff |
|||
SDCC = $(SPREFIX)\bin\sdcc |
|||
SDCCFLG = -c -mz80 -D__SDCC__=1 -I inc |
|||
SDCCLIB = $(SPREFIX)\lib\z80 |
|||
SDLD = $(SPREFIX)\bin\sdldz80 |
|||
SDLDFLG = |
|||
TPREFIX = |
|||
TCC = gcc |
|||
TCCOPT = -I inc |
|||
COPY = copy |
|||
DEL = erase |
|||
DELFLG = /Q |
|||
REN = rename |
|||
ECHO = $(BIN)lecholf |
|||
EXE = .exe |
|||
|
|||
.include common.mak |
|||
|
|||
|
|||
@ -1,95 +0,0 @@ |
|||
/*
|
|||
* |
|||
* agm1264f.h 5/14/2011 dwg - |
|||
* 8 lines of 21 characters |
|||
* |
|||
*/ |
|||
|
|||
/*
|
|||
|
|||
1 2 |
|||
123456789012345678901 |
|||
--------------------- |
|||
1 |1234 11223344 1234 | |
|||
2 | | |
|||
3 | | |
|||
4 | | |
|||
5 | | |
|||
6 | | |
|||
7 | | |
|||
8 | | |
|||
--------------------- |
|||
|
|||
/* This is a 7x5 character layout showing how much text data can be display on the agm1264f
|
|||
1 1 1 |
|||
1 2 3 4 5 6 7 8 9 0 1 2 |
|||
01234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567 |
|||
--------------------------------------------------------------------------------------------------------------------------------- |
|||
0 | 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
1 | 2 | |
|||
2 | 3 | |
|||
3 | 4 | |
|||
4 | 5 | |
|||
5 | 6 | |
|||
6 | 72345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
7 | | |
|||
8 | 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
9 | 2 | |
|||
10 | 3 | |
|||
1 | 4 | |
|||
2 | 5 | |
|||
3 | 6 | |
|||
4 | 72345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
5 | | |
|||
6 | 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
7 | 2 | |
|||
8 | 3 | |
|||
9 | 4 | |
|||
20 | 5 | |
|||
1 | 6 | |
|||
2 | 72345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
3 | | |
|||
4 | 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
5 | 2 | |
|||
6 | 3 | | |
|||
7 | 4 | |
|||
8 | 5 | |
|||
9 | 6 | |
|||
30 | 72345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
1 | | |
|||
2 | 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
3 | 2 | |
|||
4 | 3 | |
|||
5 | 4 | |
|||
6 | 5 | |
|||
7 | 6 | |
|||
8 | 72345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
9 | | |
|||
40 | 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
1 | 2 | |
|||
2 | 3 | |
|||
3 | 4 | |
|||
4 | 5 | |
|||
5 | 6 | |
|||
6 | 72345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
7 | | |
|||
8 | 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
9 | 2 | |
|||
50 | 3 | |
|||
1 | 4 | |
|||
2 | 5 | |
|||
3 | 6 | |
|||
4 | 72345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
5 | | |
|||
6 | 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
7 | 2 | |
|||
8 | 3 | |
|||
9 | 4 | |
|||
60 | 5 | |
|||
1 | 6 | |
|||
2 | 72345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 12345 | |
|||
3 | | |
|||
--------------------------------------------------------------------------------------------------------------------------------- |
|||
*/ |
|||
|
|||
|
|||
@ -1,89 +0,0 @@ |
|||
/*
|
|||
* CP/M-80 v2.2 BDOS Interfaces |
|||
* Copyright (C) Douglas W. Goodall |
|||
* For Non-Commercial use by N8VEM |
|||
* 5/10/2011 dwg - initial version |
|||
*/ |
|||
#define EXIT_SUCCESS 0 |
|||
#define EXIT_FAILURE 1 |
|||
|
|||
#define C_READ 1 |
|||
#define C_WRITE 2 |
|||
#define A_READ 3 |
|||
#define A_WRITE 4 |
|||
#define L_WRITE 5 |
|||
#define C_RAWIO 6 |
|||
#define GETIOBYTE 7 |
|||
#define SETIOBYTE 8 |
|||
#define C_WRITESTR 9 |
|||
#define C_READSTR 10 |
|||
#define F_OPEN 15 |
|||
#define F_CLOSE 16 |
|||
#define F_DELETE 19 |
|||
#define F_READ 20 |
|||
#define F_WRITE 21 |
|||
#define F_MAKE 22 |
|||
#define F_RENAME 23 |
|||
#define DRV_LOGINVEC 24 |
|||
#define DRV_GET 25 |
|||
#define F_DMAOFF 26 |
|||
#define DRV_ALLOCVEC 27 |
|||
#define DRV_SETRO 28 |
|||
#define DRV_ROVEC 29 |
|||
#define F_ATTRIB 30 |
|||
#define DRV_DPB 31 |
|||
#define F_USERNUM 32 |
|||
#define F_READRAND 33 |
|||
#define F_WRITERAND 34 |
|||
#define F_SIZE 35 |
|||
#define F_RANDREC 36 |
|||
#define DRV_RESET 37 |
|||
#define F_WRITEZF 40 |
|||
|
|||
|
|||
struct BDOSCALL { |
|||
unsigned char func8; |
|||
unsigned int parm16; |
|||
}; |
|||
|
|||
unsigned char cpmbdos(struct BDOSCALL *p); |
|||
|
|||
struct FCB { |
|||
unsigned char drive; |
|||
char filename[8]; |
|||
char filetype[3]; |
|||
unsigned char ex; |
|||
unsigned char s1; |
|||
unsigned char s2; |
|||
unsigned char rc; |
|||
unsigned char al[16]; |
|||
unsigned char cr; |
|||
unsigned char r0; |
|||
unsigned char r1; |
|||
unsigned char r2; |
|||
}; |
|||
|
|||
struct READSTR { |
|||
unsigned char size; |
|||
unsigned char len; |
|||
char bytes[80]; |
|||
} rsbuffer; |
|||
|
|||
struct BDOSCALL readstr = { C_READSTR, { (unsigned int)&rsbuffer } }; |
|||
|
|||
char * mygets(char *p) |
|||
{ |
|||
memset(rsbuffer.bytes,0,sizeof(rsbuffer.bytes)); |
|||
rsbuffer.size = sizeof(rsbuffer.bytes); |
|||
rsbuffer.len = 0; |
|||
cpmbdos(&readstr); |
|||
rsbuffer.bytes[rsbuffer.len] = '\n'; |
|||
strcpy(p,rsbuffer.bytes); |
|||
return p; |
|||
} |
|||
|
|||
#define gets mygets |
|||
|
|||
/*****************/ |
|||
/* eof - cpm80.h */ |
|||
/*****************/ |
|||
@ -1,7 +0,0 @@ |
|||
/* cprintf.h */ |
|||
|
|||
int cprintf(const char * fmt, ...); |
|||
|
|||
#define printf cprintf |
|||
|
|||
|
|||
@ -1,28 +0,0 @@ |
|||
/*
|
|||
* diskio.h |
|||
* |
|||
*/ |
|||
|
|||
__sfr __at (DISKIO_IDE + 0x00) pIDELO; |
|||
__sfr __at (DISKIO_IDE + 0x01) pIDEERR; |
|||
__sfr __at (DISKIO_IDE + 0x02) pIDESECTC; |
|||
__sfr __at (DISKIO_IDE + 0x03) pIDESECTN; |
|||
__sfr __at (DISKIO_IDE + 0x04) pIDECYLLO; |
|||
__sfr __at (DISKIO_IDE + 0x05) pIDECYLHI; |
|||
__sfr __at (DISKIO_IDE + 0x06) pIDEHEAD; |
|||
__sfr __at (DISKIO_IDE + 0x07) pIDESTTS; |
|||
__sfr __at (DISKIO_IDE + 0x08) pIDEHI; |
|||
__sfr __at (DISKIO_IDE + 0x0E) pIDECTRL; |
|||
|
|||
__sfr __at (DISKIO_FLP + 0x06) pFMSR; |
|||
__sfr __at (DISKIO_FLP + 0x07) pFDATA; |
|||
__sfr __at (DISKIO_FLP + 0x0A) pFLATCH; |
|||
__sfr __at (DISKIO_FLP + 0x0C) pFDMA; |
|||
|
|||
/*
|
|||
* |
|||
* eof - diskio.h |
|||
* |
|||
*/ |
|||
|
|||
|
|||
@ -1,7 +0,0 @@ |
|||
/*
|
|||
* |
|||
* ds1302 Dallas Real Time Clock module |
|||
* |
|||
*/ |
|||
|
|||
|
|||
@ -1,15 +0,0 @@ |
|||
/*
|
|||
* i8255.h Intel 8255 |
|||
* |
|||
*/ |
|||
|
|||
|
|||
void uart_init(U8 baud); |
|||
U8 uart_conin(void); |
|||
void uart_conout(U8 data); |
|||
|
|||
/*
|
|||
* |
|||
* eof - i8255.h |
|||
* |
|||
*/ |
|||
@ -1,16 +0,0 @@ |
|||
#ifndef __MYTYPES_H |
|||
#define __MYTYPES_H 1 |
|||
|
|||
typedef unsigned char byte; |
|||
typedef unsigned short word; |
|||
typedef unsigned long dword; |
|||
|
|||
|
|||
#ifdef __SDCC__ |
|||
#define outp(port,byte) port = (byte) |
|||
#define inp(port) (port) |
|||
#endif |
|||
|
|||
#define nelem(x) (sizeof(x)/sizeof(x[0])) |
|||
|
|||
#endif /* __MYTYPES_H */ |
|||
@ -1,15 +0,0 @@ |
|||
/*
|
|||
* n16550.h National 16550 |
|||
* |
|||
*/ |
|||
|
|||
#define UART_DLAB 0x80 |
|||
#define UART_BAUD_9600 12 |
|||
#define UART_RDA 0x01 |
|||
#define UART_TBE 0x20 |
|||
|
|||
/*
|
|||
* |
|||
* eof - n16550.h |
|||
* |
|||
*/ |
|||
@ -1,8 +0,0 @@ |
|||
; ns16550.inc 8/7/2011 dwg - National 16550 |
|||
|
|||
UART_DLAB = 0x80 |
|||
UART_BAUD_9600 = 12 |
|||
UART_RDA = 0x01 |
|||
UART_TBE = 0x20 |
|||
|
|||
; eof - ns16550.inc |
|||
@ -1,12 +0,0 @@ |
|||
/************/ |
|||
/* portab.h */ |
|||
/************/ |
|||
|
|||
#define TRUE 1 |
|||
#define FALSE 0 |
|||
|
|||
#define U8 unsigned char |
|||
|
|||
/******************/ |
|||
/* eof - portab.h */ |
|||
/******************/ |
|||
@ -1,52 +0,0 @@ |
|||
/*
|
|||
* sbcv2.h - Macros describing the N8VEM SBC V2 |
|||
* |
|||
*/ |
|||
|
|||
#define SBCV2 |
|||
|
|||
/* set i/o base to first block of 32 addresses
|
|||
possible are 0x00 0x20 0x40 0x60 0x80 0xA0 0xC0 0xE0 |
|||
depending oon setting of dip switches on board |
|||
*/ |
|||
|
|||
#define SBCV2_IO_BASE 0x00 |
|||
#define UART_IO_BASE ( SBCV2_IO_BASE + 0x68 ) |
|||
|
|||
__sfr __at (UART_IO_BASE+0) rUART_RBR; |
|||
__sfr __at (UART_IO_BASE+0) wUART_THR; |
|||
__sfr __at (UART_IO_BASE+0) wUART_DIV_LO; |
|||
__sfr __at (UART_IO_BASE+1) wUART_DIV_HI; |
|||
|
|||
__sfr __at (UART_IO_BASE+1) wUART_IER; |
|||
__sfr __at (UART_IO_BASE+2) rUART_IIR; |
|||
__sfr __at (UART_IO_BASE+3) wUART_LCR; |
|||
__sfr __at (UART_IO_BASE+4) wUART_MCR; |
|||
__sfr __at (UART_IO_BASE+5) rUART_LSR; |
|||
__sfr __at (UART_IO_BASE+6) rUART_MSR; |
|||
__sfr __at (UART_IO_BASE+7) wUART_FCR; |
|||
|
|||
|
|||
#define DISKIO_IDE 0x20 |
|||
|
|||
#define DISKIO_FLP 0x30 |
|||
|
|||
#define PPORT 0x60 |
|||
|
|||
#define MPCL 0x70 |
|||
__sfr __at (MPCL + 0x08) pMPCL_RAM; |
|||
__sfr __at (MPCL + 0x0c) pMPCL_ROM; |
|||
|
|||
#define RAMTARG_CPM 0x2000 |
|||
#define ROMSTART_CPM 0x0000 |
|||
#define CCPSIZ_CPM 0x2000 |
|||
|
|||
#define LOADER_ORG 0x0000 |
|||
#define CPM_ORG 0x0A00 |
|||
#define MON_ORG 0x3800 |
|||
#define ROM_G 0x5000 |
|||
#define ROM_F 0x8000 |
|||
/*
|
|||
#define VDU_DRV 0xF8100 |
|||
*/ |
|||
|
|||
@ -1,47 +0,0 @@ |
|||
/*
|
|||
* |
|||
* scsi2ide.h - Macros describing the N8VEM SCSI2IDE |
|||
* Friday July 29, 2011 Douglas W. Goodall |
|||
* |
|||
*/ |
|||
|
|||
#define SCSI2IDE |
|||
|
|||
/* set i/o base to first block of 32 addresses
|
|||
possible are 0x00 0x20 0x40 0x60 0x80 0xA0 0xC0 0xE0 |
|||
depending oon setting of dip switches on board |
|||
*/ |
|||
|
|||
#define SCSI2IDE_IO_BASE 0x00 |
|||
|
|||
#define IDE_IO_BASE ( SCSI2IDE_IO_BASE + 0 ) |
|||
#define SCSI_IO_BASE ( SCSI2IDE_IO_BASE + 8 ) |
|||
#define UART_IO_BASE ( SCSI2IDE_IO_BASE + 16 ) |
|||
#define DACK_IO_BASE ( SCSI2IDE_IO_BASE + 24 ) |
|||
|
|||
__sfr __at (UART_IO_BASE+0) rUART_RDR; |
|||
__sfr __at (UART_IO_BASE+0) wUART_TDR; |
|||
__sfr __at (UART_IO_BASE+0) wUART_DIV_LO; |
|||
__sfr __at (UART_IO_BASE+1) wUART_DIV_HI; |
|||
__sfr __at (UART_IO_BASE+1) wUART_IER; |
|||
__sfr __at (UART_IO_BASE+2) rUART_IIR; |
|||
__sfr __at (UART_IO_BASE+3) wUART_LCR; |
|||
__sfr __at (UART_IO_BASE+4) wUART_MCR; |
|||
__sfr __at (UART_IO_BASE+5) rUART_LSR; |
|||
__sfr __at (UART_IO_BASE+6) rUART_MSR; |
|||
__sfr __at (UART_IO_BASE+7) wUART_FCR; |
|||
|
|||
__sfr __at (SCSI_IO_BASE+0) rSCSI_CSCSID; |
|||
__sfr __at (SCSI_IO_BASE+0) wSCSI_OD; |
|||
__sfr __at (SCSI_IO_BASE+1) rwSCSI_IC; |
|||
__sfr __at (SCSI_IO_BASE+2) rwSCSI_M; |
|||
__sfr __at (SCSI_IO_BASE+3) rwSCSI_TC; |
|||
__sfr __at (SCSI_IO_BASE+4) rSCSI_CSCSIBS; |
|||
__sfr __at (SCSI_IO_BASE+4) wSCSI_SE; |
|||
__sfr __at (SCSI_IO_BASE+5) rSCSI_BS; |
|||
__sfr __at (SCSI_IO_BASE+5) wSCSI_SDMAS; |
|||
__sfr __at (SCSI_IO_BASE+6) rSCSI_ID; |
|||
__sfr __at (SCSI_IO_BASE+6) wSCSI_SDMATR; |
|||
__sfr __at (SCSI_IO_BASE+7) rSCSI_RPI; |
|||
__sfr __at (SCSI_IO_BASE+7) wSCSI_SDMAIR; |
|||
|
|||
@ -1,20 +0,0 @@ |
|||
; scsi2ide.inc 8/7/2011 dwg - macros describing the N8VEM SCSI2IDE |
|||
|
|||
SCSI2IDE_IO_BASE = 0 |
|||
|
|||
UART_IO_BASE = SCSI2IDE_IO_BASE+16 |
|||
|
|||
rUART_RDR = UART_IO_BASE + 0 |
|||
wUART_TDR = UART_IO_BASE + 0 |
|||
wUART_DIV_LO = UART_IO_BASE + 0 |
|||
wUART_DIV_HI = UART_IO_BASE + 1 |
|||
wUART_IER = UART_IO_BASE + 1 |
|||
rUART_IIR = UART_IO_BASE + 2 |
|||
wUART_LCR = UART_IO_BASE + 3 |
|||
wUART_MCR = UART_IO_BASE + 4 |
|||
rUART_LSR = UART_IO_BASE + 5 |
|||
rUART_MSR = UART_IO_BASE + 6 |
|||
wUART_FCR = UART_IO_BASE + 7 |
|||
|
|||
; eof - scsi2ide.inc |
|||
|
|||
@ -1,24 +0,0 @@ |
|||
/*
|
|||
* z53c80.h Zilog Z53C8003VSC |
|||
* |
|||
*/ |
|||
|
|||
/*
|
|||
__sfr __at (UART + 0) pPORTA; |
|||
__sfr __at (UART + 1) pPORTB; |
|||
__sfr __at (UART + 2) pPORTC; |
|||
__sfr __at (UART + 3) pCNTRL; |
|||
*/ |
|||
|
|||
void scsi_init(void); |
|||
|
|||
/*
|
|||
U8 uart_conin(void); |
|||
void uart_conout(U8 data); |
|||
*/ |
|||
|
|||
/*
|
|||
* |
|||
* eof - z53c80.h |
|||
* |
|||
*/ |
|||
@ -1,550 +0,0 @@ |
|||
######################################################## |
|||
# Makefile for Doug's Unified BIOS 5/30/2011 # |
|||
# The BIOS and associated utilities are generated # |
|||
# using the Small Device C Compiler (SDCC) & tools # |
|||
# With multiplatform enhancements by John Coffman # |
|||
# # |
|||
# sdcc.l00 added because stupid Windoze 'echo' appends # |
|||
# a confusing SPACE to the end of every line. # |
|||
######################################################## |
|||
|
|||
##################################################### |
|||
# SPREFIX tells where the SDCC package in installed # |
|||
# The SDCC package is used to assemble Z80 portions # |
|||
# of the software such as the ROM and perhaps some # |
|||
# .COM files such as FDISK. # |
|||
##################################################### |
|||
|
|||
################################################################# |
|||
# TPREFIX tells where the host development tools are installed. # |
|||
# The host tools are used to manipulate the Z80 objects after # |
|||
# the basic assemblies and compilations have been completed. # |
|||
################################################################# |
|||
|
|||
################################################################### |
|||
# SDCC is not available on the DOS host, so something else may be # |
|||
# used at the descretion of the builder. (TASM for instance). # |
|||
################################################################### |
|||
|
|||
################################################################### |
|||
# The COPY, DEL and RENAME macros are used to customize the build # |
|||
# rules for the host enviroonment. # |
|||
################################################################### |
|||
|
|||
#------------------------------------------- |
|||
# Choose one only, then Make will work for |
|||
# your platform. |
|||
|
|||
#CFG = $(shell uname) |
|||
# Mac OS X returns 'Darwin' |
|||
# Linux returns 'Linux' |
|||
|
|||
#CFG = dos |
|||
#CFG = linux |
|||
#CFG = macosx |
|||
CFG = windows |
|||
|
|||
#------------------------------------------- |
|||
|
|||
DELIM = \ |
|||
SDRIVE = C: |
|||
SPREFIX = $(SDRIVE)\sdcc |
|||
SDAS = $(SPREFIX)\bin\sdasz80 |
|||
SDASFLG = -plosff |
|||
SDCC = $(SPREFIX)\bin\sdcc |
|||
SDCCFLG = -c -mz80 -D__SDCC__=1 -I inc |
|||
SDCCLIB = $(SPREFIX)\lib\z80 |
|||
SDLD = $(SPREFIX)\bin\sdldz80 |
|||
SDLDFLG = |
|||
TPREFIX = |
|||
TCC = gcc |
|||
TCCOPT = -I inc |
|||
COPY = copy |
|||
DEL = erase |
|||
DELFLG = /Q |
|||
REN = rename |
|||
|
|||
# This is special handling for John Coffman to get around funky windows |
|||
# behavior where echo adds spurious space o end f line |
|||
# ECHO = { lecho | lechocr | lecholf | lechocrlf | lecholfcr } |
|||
|
|||
#ECHO = $(BIN)$(DELIM)lechocr |
|||
ECHO = $(BIN)lecholf |
|||
|
|||
EXE = .exe |
|||
|
|||
|
|||
#------------------------------------------- |
|||
############################################################ |
|||
|
|||
# Misc other macros |
|||
|
|||
BIN = bin$(DELIM) |
|||
COM = com$(DELIM) |
|||
INC = inc$(DELIM) |
|||
LIB = lib$(DELIM) |
|||
LST = lst$(DELIM) |
|||
MAP = map$(DELIM) |
|||
OBJ = obj$(DELIM) |
|||
REF = ref$(DELIM) |
|||
ROM = rom$(DELIM) |
|||
SRC = src$(DELIM) |
|||
TMP = tmp$(DELIM) |
|||
|
|||
# CP/M-80 v2.2 Command files written in SDCC |
|||
COMFILES = $(COM)copyfile.com $(COM)fdisk.com |
|||
|
|||
# Components used by CP/M-80 v2.2 Command files |
|||
COMRELS = $(OBJ)cpm0.rel $(OBJ)cpmbdos.rel $(OBJ)cprintf.rel |
|||
|
|||
# Components of ROM image containing CP/M for SBC V2 |
|||
CPMRELS = $(OBJ)crt0.rel $(OBJ)dbgmon.rel $(OBJ)bdosb01.rel $(OBJ)ccpb03.rel $(OBJ)cbios.rel |
|||
|
|||
# Components that control hardware in SBC V2 |
|||
SBCV2HW = |
|||
|
|||
# Components that control hardware in the SCSI2IDE |
|||
SCSI2IDEHW = $(OBJ)z53c80.rel |
|||
|
|||
FDISK = $(BIN)fdisk$(EXE) |
|||
DWGH2B = $(BIN)dwgh2b$(EXE) |
|||
INCFILES = $(INC)cpmbdos.h $(INC)cprintf.h $(INC)portab.h |
|||
JRCH2B = $(BIN)jrch2b$(EXE) |
|||
LOAD = $(BIN)load$(EXE) |
|||
MK = Makefile |
|||
#QUIET = @ |
|||
|
|||
# ROM images for SBC V2 and N8 |
|||
ROMFILES = $(ROM)scsi2ide.rom $(ROM)baseline.rom $(ROM)n8.rom |
|||
SCSI2IDE = $(ROM)scsi2ide.rom |
|||
|
|||
SYSGEN = $(BIN)sysgen$(EXE) |
|||
VERIFY = $(BIN)verify$(EXE) |
|||
|
|||
# C programs compiled on host system used in build |
|||
TOOLS = $(FDISK) $(DWGH2B) $(LOAD) $(JRCH2B) $(SYSGEN) |
|||
|
|||
# Versions of 'echo' compiled on host system |
|||
ETOOLS = $(BIN)lechocr.exe $(BIN)lecholf.exe $(BIN)lechocrlf.exe $(BIN)lecholfcr.exe |
|||
|
|||
# dribdos.rel is not part of the production set yet |
|||
##TEST = dribdos.rel |
|||
|
|||
############################################################ |
|||
|
|||
all: $(ETOOLS) $(TOOLS) $(BINFILES) $(COMFILES) $(CPMFILES) $(ROMFILES) |
|||
|
|||
#all: $(TEST) $(ROMFILES) $(COMFILES) |
|||
|
|||
etools: $(ETOOLS) |
|||
roms: $(ROMFILES) |
|||
scsi2ide: $(SCSI2IDE) |
|||
|
|||
############################################################ |
|||
|
|||
# A test assembly of DRI source code for BDOS (from SIMH) |
|||
dribdos.rel: $(SRC)dribdos.s |
|||
$(QUIET)$(SDAS) $(SDASFLG) dribdos.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)dribdos.lst $(LST) |
|||
|
|||
############################################################ |
|||
############################################################ |
|||
|
|||
# Build SCSI2IDE ROM image |
|||
|
|||
$(ROM)scsi2ide.rom: $(OBJ)scsi2ide.bin $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)scsi2ide.bin $(ROM)scsi2ide.rom |
|||
$(QUIET)$(DEL) $(DELFLG) scsi2ide.* |
|||
|
|||
$(OBJ)scsi2ide.bin: $(OBJ)scsi2ide.hex $(DWGH2B) $(MK) |
|||
$(QUIET)$(DWGH2B) $(OBJ)scsi2ide |
|||
|
|||
$(OBJ)scsi2ide.hex: $(OBJ)scsi2ide.ihx $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)scsi2ide.ihx $(OBJ)scsi2ide.hex |
|||
|
|||
$(OBJ)scsi2ide.ihx: $(CPMRELS) $(SCSI2IDEHW) $(OBJ)scsi2ide.rel $(TMP)scsi2ide.arf $(MK) |
|||
$(QUIET)$(COPY) $(TMP)scsi2ide.arf $(TMP)scsi2ide.lk |
|||
$(QUIET)$(COPY) $(TMP)scsi2ide.arf $(TMP)scsi2ide.lnk |
|||
$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)scsi2ide.lnk |
|||
$(QUIET)$(COPY) $(COPYFLG) scsi2ide.ihx $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) scsi2ide.map $(MAP) |
|||
|
|||
######################################################### |
|||
# Dynamically generate linker control file for scsi2ide # |
|||
# (now uses the macro controlled ECHO feature # |
|||
######################################################### |
|||
$(TMP)scsi2ide.arf: $(MK) |
|||
$(ECHO) -mjx > $(TMP)scsi2ide.arf |
|||
$(ECHO) -i scsi2ide.ihx >> $(TMP)scsi2ide.arf |
|||
$(ECHO) -k $(SDCCLIB) >> $(TMP)scsi2ide.arf |
|||
$(ECHO) -l z80 >> $(TMP)scsi2ide.arf |
|||
# $(ECHO) -b _CCPB03 = 0xD000 >> $(TMP)scsi2ide.arf |
|||
# $(ECHO) -b _BDOSB01 = 0xD800 >> $(TMP)scsi2ide.arf |
|||
# $(ECHO) -b _CBIOS = 0xE600 >> $(TMP)scsi2ide.arf |
|||
# $(ECHO) -b _DBGMON = 0x8000 >> $(TMP)scsi2ide.arf |
|||
$(ECHO) $(OBJ)crt0.rel >> $(TMP)scsi2ide.arf |
|||
$(ECHO) $(OBJ)scsi2ide.rel >> $(TMP)scsi2ide.arf |
|||
# $(ECHO) $(OBJ)dbgmon.rel >> $(TMP)scsi2ide.arf |
|||
# $(ECHO) $(OBJ)ccpb03.rel >> $(TMP)scsi2ide.arf |
|||
# $(ECHO) $(OBJ)bdosb01.rel >> $(TMP)scsi2ide.arf |
|||
# $(ECHO) $(OBJ)cbios.rel >> $(TMP)scsi2ide.arf |
|||
$(ECHO) -e >> $(TMP)scsi2ide.arf |
|||
|
|||
######################################################## |
|||
# Compile C portion of the scsi2ide EEPROM Image |
|||
$(OBJ)scsi2ide.rel: $(SRC)scsi2ide.c $(MK) |
|||
$(QUIET)$(SDCC) $(SDCCFLG) -c $(SRC)scsi2ide.c |
|||
$(QUIET)$(COPY) $(COPYFLG) scsi2ide.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) scsi2ide.lst $(LST) |
|||
|
|||
|
|||
############################################################ |
|||
############################################################ |
|||
|
|||
# Build SBC V2 ROM image |
|||
|
|||
$(ROM)baseline.rom: $(OBJ)baseline.bin $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)baseline.bin $(ROM)baseline.rom |
|||
$(QUIET)$(DEL) $(DELFLG) baseline.* |
|||
|
|||
$(OBJ)baseline.bin: $(OBJ)baseline.hex $(DWGH2B) $(MK) |
|||
$(QUIET)$(DWGH2B) $(OBJ)baseline |
|||
|
|||
$(OBJ)baseline.hex: $(OBJ)baseline.ihx $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)baseline.ihx $(OBJ)baseline.hex |
|||
|
|||
$(OBJ)baseline.ihx: $(CPMRELS) $(SBCV2HW) $(OBJ)baseline.rel $(TMP)baseline.arf $(MK) |
|||
$(QUIET)$(COPY) $(TMP)baseline.arf $(TMP)baseline.lk |
|||
$(QUIET)$(COPY) $(TMP)baseline.arf $(TMP)baseline.lnk |
|||
$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)baseline.lnk |
|||
$(QUIET)$(COPY) $(COPYFLG) baseline.ihx $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) baseline.map $(MAP) |
|||
|
|||
######################################################### |
|||
# Dynamically generate linker control file for baseline # |
|||
# (now uses the macro controlled ECHO feature # |
|||
######################################################### |
|||
$(TMP)baseline.arf: $(MK) |
|||
$(ECHO) -mjx > $(TMP)baseline.arf |
|||
$(ECHO) -i baseline.ihx >> $(TMP)baseline.arf |
|||
$(ECHO) -k $(SDCCLIB) >> $(TMP)baseline.arf |
|||
$(ECHO) -l z80 >> $(TMP)baseline.arf |
|||
$(ECHO) -b _CCPB03 = 0xD000 >> $(TMP)baseline.arf |
|||
$(ECHO) -b _BDOSB01 = 0xD800 >> $(TMP)baseline.arf |
|||
$(ECHO) -b _CBIOS = 0xE600 >> $(TMP)baseline.arf |
|||
$(ECHO) -b _DBGMON = 0x8000 >> $(TMP)baseline.arf |
|||
$(ECHO) $(OBJ)crt0.rel >> $(TMP)baseline.arf |
|||
$(ECHO) $(OBJ)baseline.rel >> $(TMP)baseline.arf |
|||
$(ECHO) $(OBJ)dbgmon.rel >> $(TMP)baseline.arf |
|||
$(ECHO) $(OBJ)ccpb03.rel >> $(TMP)baseline.arf |
|||
$(ECHO) $(OBJ)bdosb01.rel >> $(TMP)baseline.arf |
|||
$(ECHO) $(OBJ)cbios.rel >> $(TMP)baseline.arf |
|||
$(ECHO) -e >> $(TMP)baseline.arf |
|||
|
|||
######################################################## |
|||
# Compile C portion of the Baseline PROM Image |
|||
$(OBJ)baseline.rel: $(SRC)baseline.c $(MK) |
|||
$(QUIET)$(SDCC) $(SDCCFLG) -c $(SRC)baseline.c |
|||
$(QUIET)$(COPY) $(COPYFLG) baseline.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) baseline.lst $(LST) |
|||
|
|||
############################################################ |
|||
|
|||
# Build N8 ROM image |
|||
|
|||
# |
|||
# Save the resulting merged image in the Rom folder |
|||
# |
|||
$(ROM)n8.rom: $(OBJ)n8-romim.bin $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)n8-romim.bin $(ROM)n8.rom |
|||
$(QUIET)$(DEL) $(DELFLG) n8.* |
|||
|
|||
# |
|||
# Convert the Intel hex file into a binary, similar |
|||
# to the results of the "copy /B ..." |
|||
# |
|||
$(OBJ)n8-romim.bin: $(OBJ)sysimage.hex $(REF)n8-romim.ref $(SYSGEN) $(HEX2BIN) $(MK) |
|||
$(QUIET)$(DWGH2B) $(OBJ)sysimage |
|||
$(QUIET)$(COPY) $(REF)n8-romim.ref $(OBJ)n8-romim.bin |
|||
$(QUIET)$(SYSGEN) -i $(OBJ)sysimage.bin $(OBJ)n8-romim.bin |
|||
|
|||
# |
|||
# Take the output of the linker and rename to the more |
|||
# recognizable .hex form and the expected name "sysimage.hex" |
|||
# |
|||
$(OBJ)sysimage.hex: $(OBJ)n8.ihx $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)n8.ihx $(OBJ)sysimage.hex |
|||
|
|||
# |
|||
# Combine the independently assembled components into one piece |
|||
# and output Intel hex file (ihx) |
|||
# |
|||
$(OBJ)n8.ihx: $(OBJ)loadern8.rel $(OBJ)dbgmon.rel $(OBJ)ccpb03.rel $(OBJ)bdosb01.rel $(OBJ)cbiosn8.rel $(TMP)n8.arf $(MK) |
|||
$(QUIET)$(COPY) $(TMP)n8.arf $(TMP)n8.lk |
|||
$(QUIET)$(COPY) $(TMP)n8.arf $(TMP)n8.lnk |
|||
$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)n8.lnk |
|||
$(QUIET)$(COPY) $(COPYFLG) n8.ihx $(OBJ)n8.ihx |
|||
$(QUIET)$(COPY) $(COPYFLG) n8.map $(MAP) |
|||
|
|||
$(OBJ)cbiosn8.rel: $(SRC)cbiosn8.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)cbiosn8.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cbiosn8.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cbiosn8.lst $(LST) |
|||
|
|||
$(OBJ)loadern8.rel: $(SRC)loadern8.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)loadern8.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)loadern8.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)loadern8.lst $(LST) |
|||
|
|||
######################################################## |
|||
# Dynamically generate the linker control file for N8 # |
|||
# Now uses the macro controlled ECHO feature # |
|||
######################################################## |
|||
$(TMP)n8.arf: Makefile |
|||
$(ECHO) -mjx > $(TMP)n8.arf |
|||
$(ECHO) -i n8.ihx >> $(TMP)n8.arf |
|||
$(ECHO) -k $(SDCCLIB) >> $(TMP)n8.arf |
|||
$(ECHO) -l z80 >> $(TMP)n8.arf |
|||
$(ECHO) -b _CCPB03 = 0x0900 >> $(TMP)n8.arf |
|||
$(ECHO) -b _BDOSB01 = 0x1100 >> $(TMP)n8.arf |
|||
$(ECHO) -b _CBIOS = 0x1f00 >> $(TMP)n8.arf |
|||
$(ECHO) $(OBJ)loadern8.rel >> $(TMP)n8.arf |
|||
$(ECHO) $(OBJ)dbgmon.rel >> $(TMP)n8.arf |
|||
$(ECHO) $(OBJ)ccpb03.rel >> $(TMP)n8.arf |
|||
$(ECHO) $(OBJ)bdosb01.rel >> $(TMP)n8.arf |
|||
$(ECHO) $(OBJ)cbiosn8.rel >> $(TMP)n8.arf |
|||
$(ECHO) -e >> $(TMP)n8.arf |
|||
|
|||
############################################################ |
|||
|
|||
# Hardware specific assemblies (most likely used by BIOS's) |
|||
|
|||
# |
|||
# Assemble hardware control code for the Zilog Z53C8003V5C |
|||
# |
|||
$(OBJ)z53c80.rel: $(SRC)z53c80.c $(MK) |
|||
$(QUIET)$(SDCC) $(SDCCFLG) $(SRC)z53c80.c |
|||
$(QUIET)$(COPY) $(COPYFLG) z53c80.rel $(OBJ) |
|||
$(QUIET)$(DEL) $(DELFLG) z53c80.* |
|||
|
|||
# |
|||
# Compile ersatz printf routine for use in CP/M-80 command files |
|||
# |
|||
$(OBJ)cprintf.rel: $(SRC)cprintf.c $(MK) |
|||
$(QUIET)$(SDCC) $(SDCCFLG) $(SRC)cprintf.c |
|||
$(QUIET)$(COPY) $(COPYFLG) cprintf.rel obj |
|||
$(QUIET)$(DEL) $(DELFLG) cprintf.* |
|||
|
|||
############################################################ |
|||
|
|||
# Build CP/M 2.2 command files (copyfile.com, fdisk.com) |
|||
|
|||
#----------------------------------------------------------- |
|||
|
|||
$(COM)copyfile.com: $(OBJ)copyfile.com $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)copyfile.com $(COM)copyfile.com |
|||
$(QUIET)$(DEL) $(DELFLG) copyfile.* |
|||
|
|||
$(OBJ)copyfile.com: $(OBJ)copyfile.hex $(LOAD) $(BINFILES) $(MK) |
|||
$(QUIET)$(LOAD) $(OBJ)copyfile |
|||
|
|||
$(OBJ)copyfile.hex: $(OBJ)copyfile.ihx $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)copyfile.ihx $(OBJ)copyfile.hex |
|||
|
|||
$(OBJ)copyfile.ihx: $(OBJ)copyfile.rel $(COMRELS) $(TMP)copyfile.arf $(MK) |
|||
$(QUIET)$(COPY) $(TMP)copyfile.arf $(TMP)copyfile.lnk |
|||
|
|||
$(QUIET)$(SDLD) $(LOPTS) -nf $(TMP)copyfile.lnk |
|||
$(QUIET)$(COPY) $(COPYFLG) copyfile.ihx obj |
|||
$(QUIET)$(COPY) $(COPYFLG) copyfile.map map |
|||
|
|||
############################################################## |
|||
# Dynamicaly create linker command file for copyfile utility # |
|||
# Now uses the macro controlled ECHO feature # |
|||
############################################################## |
|||
$(TMP)copyfile.arf: Makefile |
|||
$(ECHO) -mjx > $(TMP)copyfile.arf |
|||
$(ECHO) -i copyfile.ihx >> $(TMP)copyfile.arf |
|||
$(ECHO) -k $(SDCCLIB) >> $(TMP)copyfile.arf |
|||
$(ECHO) -l z80 >> $(TMP)copyfile.arf |
|||
$(ECHO) $(OBJ)cpm0.rel >> $(TMP)copyfile.arf |
|||
$(ECHO) $(OBJ)copyfile.rel >> $(TMP)copyfile.arf |
|||
$(ECHO) $(OBJ)cpmbdos.rel >> $(TMP)copyfile.arf |
|||
$(ECHO) $(OBJ)cprintf.rel >> $(TMP)copyfile.arf |
|||
$(ECHO) -e >> $(TMP)copyfile.arf |
|||
|
|||
$(OBJ)copyfile.rel: $(SRC)copyfile.c $(MK) |
|||
$(QUIET)$(SDCC) $(SDCCFLG) $(SRC)copyfile.c |
|||
$(QUIET)$(COPY) copyfile.rel obj |
|||
$(QUIET)$(DEL) $(DELFLG) copyfile.rel |
|||
# ls obj |
|||
|
|||
#----------------------------------------------------------- |
|||
|
|||
# |
|||
# Use locally compiled 'load' command to covert Intel |
|||
# hex formal file to a binary CP/M-80 command file. |
|||
# |
|||
$(COM)fdisk.com: $(OBJ)fdisk.hex $(TOOLS) $(MK) |
|||
$(QUIET)$(BIN)load $(OBJ)fdisk |
|||
$(QUIET)$(COPY) $(COPYFLG) $(OBJ)fdisk.com com |
|||
$(QUIET)$(DEL) $(DELFLG) fdisk.* |
|||
|
|||
# |
|||
# rename 'ihx' output of linker to 'hex' |
|||
|
|||
$(OBJ)fdisk.hex: $(OBJ)fdisk.ihx $(MK) |
|||
$(QUIET)$(COPY) $(OBJ)fdisk.ihx $(OBJ)fdisk.hex |
|||
|
|||
$(OBJ)fdisk.ihx: $(OBJ)fdisk.rel $(TMP)fdisk.arf $(MK) |
|||
$(QUIET)$(COPY) $(TMP)fdisk.arf $(TMP)fdisk.lnk |
|||
$(QUIET)$(COPY) $(TMP)fdisk.arf $(TMP)fdisk.lk |
|||
$(QUIET)$(SDLD) $(SDLDFLG) -nf $(TMP)fdisk.lnk |
|||
$(QUIET)$(COPY) $(COPYFLG) fdisk.ihx $(OBJ)fdisk.ihx |
|||
$(QUIET)$(COPY) $(COPYFLG) fdisk.map map |
|||
|
|||
$(OBJ)fdisk.rel: $(SRC)fdisk.c $(INCFILES) $(MK) |
|||
$(QUIET)$(SDCC) -I inc $(SDCCFLG) $(SRC)fdisk.c |
|||
$(QUIET)$(COPY) $(COPYFLG) fdisk.rel $(OBJ) |
|||
|
|||
############################################################################ |
|||
# Dynamically created linker command file for fdisk utility (CP/M version) # |
|||
# Now uses macro controlled ECHO feature # |
|||
############################################################################ |
|||
$(TMP)fdisk.arf: $(MK) |
|||
$(ECHO) -mjx > $(TMP)fdisk.arf |
|||
$(ECHO) -i fdisk.ihx >> $(TMP)fdisk.arf |
|||
$(ECHO) -k $(SDCCLIB) >> $(TMP)fdisk.arf |
|||
$(ECHO) -l z80 >> $(TMP)fdisk.arf |
|||
$(ECHO) $(OBJ)cpm0.rel >> $(TMP)fdisk.arf |
|||
$(ECHO) $(OBJ)fdisk.rel >> $(TMP)fdisk.arf |
|||
$(ECHO) $(OBJ)cpmbdos.rel >> $(TMP)fdisk.arf |
|||
$(ECHO) $(OBJ)cprintf.rel >> $(TMP)fdisk.arf |
|||
$(ECHO) -e >> $(TMP)fdisk.arf |
|||
|
|||
|
|||
#----------------------------------------------------------- |
|||
|
|||
# Also build host version of fdisk for testing purposes |
|||
|
|||
$(BIN)fdisk$(EXE): $(SRC)fdisk.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCOPT) $(SRC)fdisk.c -o $(BIN)fdisk |
|||
|
|||
############################################################ |
|||
|
|||
# Build CP/M-80 Command File Structure Files |
|||
|
|||
$(OBJ)cpm0.rel: $(SRC)cpm0.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)cpm0.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cpm0.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cpm0.lst $(LST) |
|||
|
|||
$(OBJ)cpmbdos.rel: $(SRC)cpmbdos.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)cpmbdos.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cpmbdos.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cpmbdos.lst $(LST) |
|||
|
|||
############################################################ |
|||
|
|||
# Build ROM Image structure files |
|||
|
|||
$(OBJ)crt0.rel: $(SRC)crt0.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)crt0.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)crt0.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)crt0.lst $(LST) |
|||
|
|||
$(OBJ)bdosb01.rel: $(SRC)bdosb01.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)bdosb01.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)bdosb01.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)bdosb01.lst $(LST) |
|||
|
|||
$(OBJ)ccpb03.rel: $(SRC)ccpb03.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)ccpb03.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)ccpb03.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)ccpb03.lst $(LST) |
|||
# |
|||
# Assemble hardware control code for SBC V2 |
|||
# |
|||
$(OBJ)cbios.rel: $(SRC)cbios.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)cbios.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cbios.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)cbios.lst $(LST) |
|||
|
|||
# |
|||
# Assemble a monitor program for the SBC V2 |
|||
# |
|||
$(OBJ)dbgmon.rel: $(SRC)dbgmon.s $(MK) |
|||
$(QUIET)$(SDAS) $(SDASFLG) $(SRC)dbgmon.s |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)dbgmon.rel $(OBJ) |
|||
$(QUIET)$(COPY) $(COPYFLG) $(SRC)dbgmon.lst $(LST) |
|||
|
|||
########################################################### |
|||
|
|||
# Build host based tools ( dwgh2b, jrch2b, load, verify) |
|||
|
|||
$(DWGH2B): $(SRC)dwgh2b.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCOPT) $(SRC)dwgh2b.c -o $(BIN)dwgh2b$(EXE) |
|||
|
|||
# |
|||
# Compile John Coffman's hex2bin program |
|||
# |
|||
$(JRCH2B): $(SRC)jrch2b.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCOPT) $(SRC)jrch2b.c -o $(BIN)jrch2b$(EXE) |
|||
# $(QUIET)$(COPY) $(COPYFLG) $(BIN)jrch2b $(BIN)jrcb2h |
|||
|
|||
# |
|||
# Compile Doug's "load" program |
|||
# |
|||
$(LOAD): $(SRC)load.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCOPT) $(SRC)load.c -o $(BIN)load$(EXE) |
|||
|
|||
$(SYSGEN): $(SRC)sysgen.c $(MK) |
|||
$(QUIET)$(TCC) $(TCCOPT) $(SRC)sysgen.c -o $(BIN)sysgen$(EXE) |
|||
|
|||
# |
|||
# Compile Doug's verif program that compares binary file regions |
|||
# |
|||
$(VERIFY): $(SRC)verify.c Makefile $(MK) |
|||
$(QUIET)$(TCC) $(TCCOPT) $(SRC)verify.c -o $(BIN)verify |
|||
|
|||
$(BIN)lechocr.exe: $(SRC)lechocr.c $(MK) |
|||
# $(QUIET)$(TCC) $(TCCOPT) $(SRC)lechocr.c -o $(BIN)lechocr |
|||
$(TCC) $(TCCOPT) $(SRC)lechocr.c -o lechocr.exe |
|||
$(COPY) lechocr.exe $(BIN) |
|||
|
|||
$(BIN)lecholf.exe: $(SRC)lecholf.c $(MK) |
|||
# $(QUIET)$(TCC) $(TCCFLG) $(SRC)lecholf.c -o $(BIN)lecholf |
|||
$(TCC) $(TCCOPT) $(SRC)lecholf.c -o lecholf.exe |
|||
$(COPY) lecholf.exe $(BIN) |
|||
|
|||
$(BIN)lechocrlf.exe: $(SRC)lechocrlf.c $(MK) |
|||
# $(QUIET)$(TCC) $(TCCOPT) $(SRC)lechocrlf.c -o $(BIN)lechocrlf |
|||
$(TCC) $(TCCOPT) $(SRC)lechocrlf.c -o lechocrlf.exe |
|||
$(COPY) lechocrlf.exe $(BIN) |
|||
|
|||
$(BIN)lecholfcr.exe: $(SRC)lecholfcr.c $(MK) |
|||
# $(QUIET)$(TCC) $(TCCFLG) $(SRC)lecholfcr.c -o $(BIN)lecholfcr |
|||
$(TCC) $(TCCOPT) $(SRC)lecholfcr.c -o lecholfcr.exe |
|||
$(COPY) lecholfcr.exe $(BIN) |
|||
|
|||
############################################################ |
|||
|
|||
# Builder specific utility rules |
|||
|
|||
dwginstall: |
|||
$(COPY) $(COMFILES) ~/Documents/devobox/cdrive |
|||
|
|||
############################################################ |
|||
|
|||
# |
|||
# Delete all dynamically generated files that don't need to be |
|||
# saved. |
|||
# |
|||
clean: |
|||
$(QUIET)$(DEL) $(DELFLG) *.hex *.ihx *.lst *.rel *.rst *.lnk *.lk |
|||
$(QUIET)$(DEL) $(DELFLG) *.sym *.map *.noi *.asm *.com *.ini *.bin |
|||
$(QUIET)$(DEL) $(DELFLG) obj$(DELIM)*.* bin$(DELIM)*.* com$(DELIM)*.* rom$(DELIM)*.* tmp$(DELIM)*.* map$(DELIM)*.* lst$(DELIM)*.* |
|||
|
|||
################## |
|||
# eof - Makefile # |
|||
################## |
|||
Binary file not shown.
File diff suppressed because it is too large
Binary file not shown.
File diff suppressed because it is too large
@ -1,17 +0,0 @@ |
|||
-mjx |
|||
-i baseline.ihx |
|||
-k /usr/local/share/sdcc/lib/z80 |
|||
-l z80 |
|||
-b _CCPB03 = 0xD000 |
|||
-b _BDOSB01 = 0xD800 |
|||
-b _CBIOS = 0xE600 |
|||
-b _DBGMON = 0x8000 |
|||
crt0.rel |
|||
baseline.rel |
|||
ns16550.rel |
|||
i8255.rel |
|||
dbgmon.rel |
|||
ccpb03.rel |
|||
bdosb01.rel |
|||
cbios.rel |
|||
-e |
|||
@ -1,68 +0,0 @@ |
|||
/*
|
|||
* baseline.c - Diagnostic EPROM for the N8VEM SBC V2 |
|||
* |
|||
*/ |
|||
|
|||
#include <stdio.h> |
|||
#include <stdlib.h> |
|||
#include <string.h> |
|||
#include "portab.h" |
|||
#include "sbcv2.h" |
|||
#include "ns16550.h" |
|||
|
|||
/* #include "cpmbdos.h" */ |
|||
|
|||
/* THESE ARE USED BY THE LIBRARY ROUTINES */ |
|||
char getchar(void) |
|||
{ |
|||
/*
|
|||
struct BDOSCALL cread = { C_READ, { (unsigned int)0 } }; |
|||
return cpmbdos(&cread); |
|||
*/ |
|||
return 0; |
|||
} |
|||
void outchar(char c) |
|||
{ |
|||
if(c) ; |
|||
/*
|
|||
struct BDOSCALL cwrite = { C_WRITE, { (unsigned int)c } }; |
|||
cpmbdos(&cwrite); |
|||
*/ |
|||
} |
|||
|
|||
|
|||
void xdisable(void) |
|||
{ |
|||
} |
|||
|
|||
void xenable(void) |
|||
{ |
|||
} |
|||
|
|||
void intmode(U8 xmode) |
|||
{ |
|||
if(xmode); |
|||
} |
|||
|
|||
int main(void) |
|||
{ |
|||
pMPCL_ROM = 0x80; |
|||
pMPCL_RAM = 0x81; |
|||
|
|||
memcpy(0,0x0E5,0x2000); |
|||
|
|||
pMPCL_ROM = 0x80; |
|||
pMPCL_RAM = 0x00; |
|||
|
|||
xdisable(); |
|||
intmode(1); |
|||
pMPCL_ROM = 0x00; |
|||
pMPCL_RAM = 0x00; |
|||
|
|||
memcpy(RAMTARG_CPM,ROMSTART_CPM,CCPSIZ_CPM); |
|||
|
|||
pMPCL_ROM = 0x80; |
|||
pMPCL_RAM = 0x00; |
|||
return (0); |
|||
} |
|||
|
|||
@ -1,6 +0,0 @@ |
|||
-mjx |
|||
-i bdosb01.ihx |
|||
-k /usr/local/share/sdcc/lib/z80 |
|||
-l z80 |
|||
bdosb01.rel |
|||
-e |
|||
File diff suppressed because it is too large
@ -1,714 +0,0 @@ |
|||
XL |
|||
H 8 areas 4 global symbols |
|||
M bdosb01 |
|||
O -mz80 |
|||
S .__.ABS. Def0000 |
|||
A _CODE size 0 flags 0 addr 0 |
|||
S _bdos Def0000 |
|||
S _bdos_start Def0000 |
|||
A _DATA size 0 flags 0 addr 0 |
|||
A _OVERLAY size 0 flags 0 addr 0 |
|||
A _HOME size 0 flags 0 addr 0 |
|||
A _GSINIT size 0 flags 0 addr 0 |
|||
A _GSFINAL size 0 flags 0 addr 0 |
|||
A _BDOSB01 size DFC flags 0 addr 0 |
|||
S _bdos_end Def0DFC |
|||
A _CABS size 0 flags 0 addr 0 |
|||
T 00 00 |
|||
R 00 00 00 00 |
|||
T 00 00 |
|||
R 00 00 00 00 |
|||
T 00 00 00 00 00 00 00 00 C3 11 00 99 00 A5 00 |
|||
R 00 00 06 00 00 09 06 00 00 0B 06 00 00 0D 06 00 |
|||
T 0D 00 AB 00 B1 00 EB 22 43 03 EB 7B 32 |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 08 06 00 |
|||
T 18 00 D6 0D 21 00 00 22 45 03 39 22 0F 03 31 |
|||
R 00 00 06 00 00 02 06 00 00 08 06 00 00 0C 06 00 |
|||
T 25 00 41 03 AF 32 E0 0D 32 DE 0D 21 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 09 06 00 |
|||
T 2F 00 74 0D E5 79 FE 29 D0 4B 21 47 00 5F 16 00 |
|||
R 00 00 06 00 00 02 06 00 00 0B 06 00 |
|||
T 3D 00 19 19 5E 23 56 2A 43 03 EB E9 03 E6 C8 02 |
|||
R 00 00 06 00 00 08 06 00 00 0E 06 00 |
|||
T 4B 00 90 01 CE 02 12 E6 0F E6 D4 02 |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 0A 06 00 |
|||
T 55 00 ED 02 F3 02 F8 02 |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 5B 00 E1 01 FE 02 7E 0C |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 61 00 83 0C 45 0C 9C 0C |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 67 00 A5 0C AB 0C C8 0C |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 6D 00 D7 0C E0 0C E6 0C |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 73 00 EC 0C F5 0C FE 0C |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 79 00 04 0D 0A 0D 11 0D |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 7F 00 2C 05 17 0D 1D 0D |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 85 00 26 0D 2D 0D 41 0D |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 8B 00 47 0D 4D 0D 0E 0C |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 91 00 53 0D 04 03 04 03 |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 97 00 9B 0D 21 CA 00 CD E5 00 FE 03 CA 00 00 C9 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T A5 00 21 D5 00 C3 B4 00 21 E1 00 C3 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T AF 00 B4 00 21 DC 00 CD E5 00 C3 00 00 42 44 4F |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T BD 00 53 20 45 52 52 20 4F 4E 20 20 3A 20 24 42 |
|||
R 00 00 06 00 |
|||
T CB 00 41 44 20 53 45 43 54 4F 52 24 53 45 4C 45 |
|||
R 00 00 06 00 |
|||
T D9 00 43 54 24 46 49 4C 45 20 52 2F 4F 24 E5 CD |
|||
R 00 00 06 00 |
|||
T E7 00 C9 01 3A 42 03 C6 41 32 C6 00 01 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T F2 00 BA 00 CD D3 01 C1 CD D3 01 21 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
|||
T FC 00 0E 03 7E 36 00 B7 C0 C3 09 E6 CD FB 00 CD |
|||
R 00 00 06 00 00 02 06 00 00 0D 06 00 |
|||
T 0A 01 14 01 D8 F5 4F CD 90 01 F1 C9 FE 0D C8 FE |
|||
R 00 00 06 00 00 02 06 00 00 08 06 00 |
|||
T 18 01 0A C8 FE 09 C8 FE 08 C8 FE 20 C9 |
|||
R 00 00 06 00 |
|||
T 23 01 |
|||
R 00 00 06 00 |
|||
T 23 01 3A 0E 03 B7 C2 45 01 CD 06 E6 E6 01 C8 CD |
|||
R 00 00 06 00 00 03 06 00 00 07 06 00 |
|||
T 31 01 09 E6 FE 13 C2 42 01 CD 09 E6 FE 03 CA |
|||
R 00 00 06 00 00 07 06 00 |
|||
T 3E 01 00 00 AF C9 32 0E 03 3E 01 C9 3A 0A 03 B7 |
|||
R 00 00 06 00 00 07 06 00 00 0D 06 00 |
|||
T 4C 01 C2 62 01 C5 CD 23 01 C1 C5 CD 0C E6 C1 C5 |
|||
R 00 00 06 00 00 03 06 00 00 07 06 00 |
|||
T 5A 01 3A 0D 03 B7 C4 0F E6 C1 79 21 0C 03 FE 7F |
|||
R 00 00 06 00 00 03 06 00 00 0C 06 00 |
|||
T 68 01 C8 34 FE 20 D0 35 7E B7 C8 79 FE 08 C2 |
|||
R 00 00 06 00 |
|||
T 75 01 79 01 35 C9 FE 0A C0 36 00 C9 79 CD 14 01 |
|||
R 00 00 06 00 00 02 06 00 00 0E 06 00 |
|||
T 83 01 D2 90 01 F5 0E 5E CD 48 01 F1 F6 40 4F 79 |
|||
R 00 00 06 00 00 03 06 00 00 09 06 00 |
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T 91 01 FE 09 C2 48 01 0E 20 CD 48 01 3A 0C 03 E6 |
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R 00 00 06 00 00 05 06 00 00 0A 06 00 00 0D 06 00 |
|||
T 9F 01 07 C2 96 01 C9 CD AC 01 0E 20 CD 0C E6 0E |
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R 00 00 06 00 00 04 06 00 00 08 06 00 |
|||
T AD 01 08 C3 0C E6 0E 23 CD 48 01 CD C9 01 3A |
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R 00 00 06 00 00 09 06 00 00 0C 06 00 |
|||
T BA 01 0C 03 21 0B 03 BE D0 0E 20 CD 48 01 C3 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 0C 06 00 |
|||
T C7 01 B9 01 0E 0D CD 48 01 0E 0A C3 48 01 0A FE |
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R 00 00 06 00 00 02 06 00 00 07 06 00 00 0C 06 00 |
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T D5 01 24 C8 03 C5 4F CD 90 01 C1 C3 D3 01 3A |
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R 00 00 06 00 00 08 06 00 00 0C 06 00 |
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T E2 01 0C 03 32 0B 03 2A 43 03 4E 23 E5 06 00 C5 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
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T F0 01 E5 CD FB 00 E6 7F E1 C1 FE 0D CA C1 02 FE |
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R 00 00 06 00 00 04 06 00 00 0D 06 00 |
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T FE 01 0A CA C1 02 FE 08 C2 16 02 78 B7 CA EF 01 |
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R 00 00 06 00 00 04 06 00 00 09 06 00 00 0E 06 00 |
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T 0C 02 05 3A 0C 03 32 0A 03 C3 70 02 FE 7F C2 |
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R 00 00 06 00 00 04 06 00 00 07 06 00 00 0A 06 00 |
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T 19 02 26 02 78 B7 CA EF 01 7E 05 2B C3 A9 02 FE |
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R 00 00 06 00 00 02 06 00 00 07 06 00 00 0D 06 00 |
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T 27 02 05 C2 37 02 C5 E5 CD C9 01 AF 32 0B 03 C3 |
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R 00 00 06 00 00 04 06 00 00 09 06 00 00 0D 06 00 |
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T 35 02 F1 01 FE 10 C2 48 02 E5 21 0D 03 3E 01 96 |
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R 00 00 06 00 00 02 06 00 00 07 06 00 00 0B 06 00 |
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T 43 02 77 E1 C3 EF 01 FE 18 C2 5F 02 E1 3A 0B 03 |
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R 00 00 06 00 00 05 06 00 00 0A 06 00 00 0E 06 00 |
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T 51 02 21 0C 03 BE D2 E1 01 35 CD A4 01 C3 |
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R 00 00 06 00 00 03 06 00 00 07 06 00 00 0B 06 00 |
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T 5D 02 4E 02 FE 15 C2 6B 02 CD B1 01 E1 C3 |
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R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
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T 69 02 E1 01 FE 12 C2 A6 02 C5 CD B1 01 C1 E1 E5 |
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R 00 00 06 00 00 02 06 00 00 07 06 00 00 0B 06 00 |
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T 77 02 C5 78 B7 CA 8A 02 23 4E 05 C5 E5 CD 7F 01 |
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R 00 00 06 00 00 06 06 00 00 0E 06 00 |
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T 85 02 E1 C1 C3 78 02 E5 3A 0A 03 B7 CA F1 01 21 |
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R 00 00 06 00 00 05 06 00 00 09 06 00 00 0D 06 00 |
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T 93 02 0C 03 96 32 0A 03 CD A4 01 21 |
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R 00 00 06 00 00 02 06 00 00 06 06 00 00 09 06 00 |
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T 9D 02 0A 03 35 C2 99 02 C3 F1 01 23 77 04 C5 E5 |
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R 00 00 06 00 00 02 06 00 00 06 06 00 00 09 06 00 |
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T AB 02 4F CD 7F 01 E1 C1 7E FE 03 78 C2 BD 02 FE |
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R 00 00 06 00 00 04 06 00 00 0D 06 00 |
|||
T B9 02 01 CA 00 00 B9 DA EF 01 E1 70 0E 0D C3 |
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R 00 00 06 00 00 08 06 00 |
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T C6 02 48 01 CD 06 01 C3 01 03 CD 15 E6 C3 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
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T D2 02 01 03 79 3C CA E0 02 3C CA 06 E6 C3 0C E6 |
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R 00 00 06 00 00 02 06 00 00 07 06 00 |
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T E0 02 CD 06 E6 B7 CA 91 0D CD 09 E6 C3 01 03 3A |
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R 00 00 06 00 00 07 06 00 00 0D 06 00 |
|||
T EE 02 03 00 C3 01 03 21 03 00 71 C9 EB 4D 44 C3 |
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R 00 00 06 00 00 05 06 00 |
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T FC 02 D3 01 CD 23 01 32 45 03 C9 3E 01 C3 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 08 03 01 03 00 |
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R 00 00 06 00 00 02 06 00 |
|||
T 0B 03 |
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R 00 00 06 00 |
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T 0B 03 02 00 00 00 |
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R 00 00 06 00 |
|||
T 0F 03 |
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R 00 00 06 00 |
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T 0F 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
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R 00 00 06 00 |
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T 1D 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
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R 00 00 06 00 |
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T 2B 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
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R 00 00 06 00 |
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T 39 03 00 00 00 00 00 00 00 00 |
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R 00 00 06 00 |
|||
T 41 03 |
|||
R 00 00 06 00 |
|||
T 41 03 00 00 00 00 00 00 21 0B 00 5E 23 56 EB E9 |
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R 00 00 06 00 00 09 06 00 |
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T 4F 03 0C 0D C8 1A 77 13 23 C3 50 03 3A 42 03 4F |
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R 00 00 06 00 00 0A 06 00 00 0D 06 00 |
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T 5D 03 CD 1B E6 7C B5 C8 5E 23 56 23 22 B3 0D 23 |
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R 00 00 06 00 00 0D 06 00 |
|||
T 6B 03 23 22 B5 0D 23 23 22 B7 0D 23 23 EB 22 |
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R 00 00 06 00 00 04 06 00 00 09 06 00 |
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T 78 03 D0 0D 21 B9 0D 0E 08 CD 4F 03 2A |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
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T 83 03 BB 0D EB 21 C1 0D 0E 0F CD 4F 03 2A |
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R 00 00 06 00 00 02 06 00 00 06 06 00 00 0B 06 00 |
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T 8F 03 C6 0D 7C 21 DD 0D 36 FF B7 CA 9D 03 36 00 |
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R 00 00 06 00 00 02 06 00 00 06 06 00 00 0C 06 00 |
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T 9D 03 3E FF B7 C9 CD 18 E6 AF 2A B5 0D 77 23 77 |
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R 00 00 06 00 00 0B 06 00 |
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T AB 03 2A B7 0D 77 23 77 C9 CD 27 E6 C3 BB 03 CD |
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R 00 00 06 00 00 03 06 00 00 0D 06 00 |
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T B9 03 2A E6 B7 C8 21 09 00 C3 4A 03 2A EA 0D 0E |
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R 00 00 06 00 00 07 06 00 00 0A 06 00 00 0D 06 00 |
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T C7 03 02 CD EA 04 22 E5 0D 22 EC 0D 21 |
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R 00 00 06 00 00 04 06 00 00 07 06 00 00 0A 06 00 |
|||
T D2 03 E5 0D 4E 23 46 2A B7 0D 5E 23 56 2A B5 0D |
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R 00 00 06 00 00 02 06 00 00 08 06 00 00 0E 06 00 |
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T E0 03 7E 23 66 6F 79 93 78 9A D2 FA 03 E5 2A |
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R 00 00 06 00 00 0B 06 00 |
|||
T ED 03 C1 0D 7B 95 5F 7A 9C 57 E1 2B C3 E4 03 E5 |
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R 00 00 06 00 00 02 06 00 00 0D 06 00 |
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T FB 03 2A C1 0D 19 DA 0F 04 79 95 78 9C DA 0F 04 |
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R 00 00 06 00 00 03 06 00 00 07 06 00 00 0E 06 00 |
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T 09 04 EB E1 23 C3 FA 03 E1 C5 D5 E5 EB 2A CE 0D |
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R 00 00 06 00 00 06 06 00 00 0E 06 00 |
|||
T 17 04 19 44 4D CD 1E E6 D1 2A B5 0D 73 23 72 D1 |
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R 00 00 06 00 00 0A 06 00 |
|||
T 25 04 2A B7 0D 73 23 72 C1 79 93 4F 78 9A 47 2A |
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R 00 00 06 00 00 03 06 00 |
|||
T 33 04 D0 0D EB CD 30 E6 4D 44 C3 21 E6 |
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R 00 00 06 00 00 02 06 00 |
|||
T 3E 04 |
|||
R 00 00 06 00 |
|||
T 3E 04 21 C3 0D 4E 3A E3 0D B7 1F 0D C2 45 04 47 |
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R 00 00 06 00 00 03 06 00 00 07 06 00 00 0D 06 00 |
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T 4C 04 3E 08 96 4F 3A E2 0D 0D CA 5C 04 B7 17 C3 |
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R 00 00 06 00 00 07 06 00 00 0B 06 00 |
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T 5A 04 53 04 80 C9 2A 43 03 11 10 00 19 09 3A |
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R 00 00 06 00 00 02 06 00 00 07 06 00 |
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T 67 04 DD 0D B7 CA 71 04 6E 26 00 C9 09 5E 23 56 |
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R 00 00 06 00 00 02 06 00 00 06 06 00 |
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T 75 04 EB C9 CD 3E 04 4F 06 00 CD 5E 04 22 E5 0D |
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R 00 00 06 00 00 05 06 00 00 0B 06 00 00 0E 06 00 |
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T 83 04 C9 2A E5 0D 7D B4 C9 3A C3 0D 2A E5 0D 29 |
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R 00 00 06 00 00 04 06 00 00 0A 06 00 00 0D 06 00 |
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T 91 04 3D C2 90 04 22 E7 0D 3A C4 0D 4F 3A |
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R 00 00 06 00 00 04 06 00 00 07 06 00 00 0A 06 00 |
|||
T 9D 04 E3 0D A1 B5 6F 22 E5 0D C9 2A 43 03 11 |
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R 00 00 06 00 00 02 06 00 00 08 06 00 00 0C 06 00 |
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T AA 04 0C 00 19 C9 2A 43 03 11 0F 00 19 EB 21 |
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R 00 00 06 00 00 07 06 00 |
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T B7 04 11 00 19 C9 CD AE 04 7E 32 E3 0D EB 7E 32 |
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R 00 00 06 00 00 07 06 00 00 0B 06 00 |
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T C5 04 E1 0D CD A6 04 3A C5 0D A6 32 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
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T CF 04 E2 0D C9 CD AE 04 3A D5 0D FE 02 C2 |
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R 00 00 06 00 00 02 06 00 00 06 06 00 00 09 06 00 |
|||
T DB 04 DE 04 AF 4F 3A E3 0D 81 77 EB 3A E1 0D 77 |
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R 00 00 06 00 00 02 06 00 00 07 06 00 00 0D 06 00 |
|||
T E9 04 C9 0C 0D C8 7C B7 1F 67 7D 1F 6F C3 EB 04 |
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R 00 00 06 00 00 0E 06 00 |
|||
T F7 04 |
|||
R 00 00 06 00 |
|||
T F7 04 0E 80 2A B9 0D AF 86 23 0D C2 FD 04 C9 0C |
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R 00 00 06 00 00 05 06 00 00 0C 06 00 |
|||
T 05 05 0D C8 29 C3 05 05 C5 3A 42 03 4F 21 01 00 |
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R 00 00 06 00 00 06 06 00 00 0A 06 00 |
|||
T 13 05 CD 04 05 C1 79 B5 6F 78 B4 67 C9 2A AD 0D |
|||
R 00 00 06 00 00 03 06 00 00 0E 06 00 |
|||
T 21 05 3A 42 03 4F CD EA 04 7D E6 01 C9 21 AD 0D |
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R 00 00 06 00 00 03 06 00 00 07 06 00 00 0E 06 00 |
|||
T 2F 05 4E 23 46 CD 0B 05 22 AD 0D 2A C8 0D 23 EB |
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R 00 00 06 00 00 06 06 00 00 09 06 00 00 0C 06 00 |
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T 3D 05 2A B3 0D 73 23 72 C9 CD 5E 05 11 09 00 19 |
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R 00 00 06 00 00 03 06 00 00 0A 06 00 |
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T 4B 05 7E 17 D0 21 0F 00 C3 4A 03 CD 1E 05 C8 21 |
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R 00 00 06 00 00 06 06 00 00 09 06 00 00 0C 06 00 |
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T 59 05 0D 00 C3 4A 03 2A B9 0D 3A |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
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T 62 05 E9 0D 85 6F D0 24 C9 2A 43 03 11 0E 00 19 |
|||
R 00 00 06 00 00 02 06 00 00 0A 06 00 |
|||
T 70 05 7E C9 CD 69 05 36 00 C9 CD 69 05 F6 80 77 |
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R 00 00 06 00 00 05 06 00 00 0B 06 00 |
|||
T 7E 05 C9 2A EA 0D EB 2A B3 0D 7B 96 23 7A 9E C9 |
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R 00 00 06 00 00 04 06 00 00 08 06 00 |
|||
T 8C 05 CD 7F 05 D8 13 72 2B 73 C9 7B 95 6F 7A 9C |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 9A 05 67 C9 0E FF |
|||
R 00 00 06 00 |
|||
T 9E 05 |
|||
R 00 00 06 00 |
|||
T 9E 05 2A EC 0D EB 2A CC 0D CD 95 05 D0 C5 CD |
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R 00 00 06 00 00 03 06 00 00 07 06 00 00 0A 06 00 |
|||
T AB 05 F7 04 2A BD 0D EB 2A EC 0D 19 C1 0C CA |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
|||
T B8 05 C4 05 BE C8 CD 7F 05 D0 CD 2C 05 C9 77 C9 |
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R 00 00 06 00 00 02 06 00 00 07 06 00 00 0B 06 00 |
|||
T C6 05 |
|||
R 00 00 06 00 |
|||
T C6 05 CD 9C 05 CD E0 05 0E 01 CD B8 03 C3 |
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R 00 00 06 00 00 03 06 00 00 06 06 00 00 0B 06 00 |
|||
T D2 05 DA 05 CD E0 05 CD B2 03 21 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T DB 05 B1 0D C3 E3 05 21 B9 0D 4E 23 46 C3 24 E6 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T E9 05 2A B9 0D EB 2A B1 0D 0E 80 C3 4F 03 |
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R 00 00 06 00 00 03 06 00 00 07 06 00 00 0C 06 00 |
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T F5 05 |
|||
R 00 00 06 00 |
|||
T F5 05 21 EA 0D 7E 23 BE C0 3C C9 |
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R 00 00 06 00 00 03 06 00 |
|||
T FE 05 |
|||
R 00 00 06 00 |
|||
T FE 05 21 FF FF 22 EA 0D C9 2A C8 0D EB 2A EA 0D |
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R 00 00 06 00 00 06 06 00 00 0A 06 00 00 0E 06 00 |
|||
T 0C 06 23 22 EA 0D CD 95 05 D2 19 06 C3 |
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R 00 00 06 00 00 04 06 00 00 07 06 00 00 0A 06 00 |
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T 17 06 FE 05 3A EA 0D E6 03 06 05 87 05 C2 20 06 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 0E 06 00 |
|||
T 25 06 32 E9 0D B7 C0 C5 CD C3 03 CD D4 05 C1 C3 |
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R 00 00 06 00 00 03 06 00 00 09 06 00 00 0C 06 00 |
|||
T 33 06 9E 05 |
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R 00 00 06 00 00 02 06 00 |
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T 35 06 |
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R 00 00 06 00 |
|||
T 35 06 79 E6 07 3C 5F 57 79 0F 0F 0F E6 1F 4F 78 |
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R 00 00 06 00 |
|||
T 43 06 87 87 87 87 87 B1 4F 78 0F 0F 0F E6 1F 47 |
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R 00 00 06 00 |
|||
T 51 06 2A BF 0D 09 7E 07 1D C2 56 06 C9 |
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R 00 00 06 00 00 03 06 00 00 0A 06 00 |
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T 5C 06 |
|||
R 00 00 06 00 |
|||
T 5C 06 D5 CD 35 06 E6 FE C1 B1 0F 15 C2 64 06 77 |
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R 00 00 06 00 00 04 06 00 00 0D 06 00 |
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T 6A 06 C9 CD 5E 05 11 10 00 19 C5 0E 11 D1 0D C8 |
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R 00 00 06 00 00 04 06 00 |
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T 78 06 D5 3A DD 0D B7 CA 88 06 C5 E5 4E 06 00 C3 |
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R 00 00 06 00 00 04 06 00 00 08 06 00 |
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T 86 06 8E 06 0D C5 4E 23 46 E5 79 B0 CA 9D 06 2A |
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R 00 00 06 00 00 02 06 00 00 0D 06 00 |
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T 94 06 C6 0D 7D 91 7C 98 D4 5C 06 E1 23 C1 C3 |
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R 00 00 06 00 00 02 06 00 00 09 06 00 |
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T A1 06 75 06 2A C6 0D 0E 03 CD EA 04 23 44 4D 2A |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
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T AF 06 BF 0D 36 00 23 0B 78 B1 C2 B1 06 2A CA 0D |
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R 00 00 06 00 00 02 06 00 00 0B 06 00 00 0E 06 00 |
|||
T BD 06 EB 2A BF 0D 73 23 72 CD A1 03 2A B3 0D 36 |
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R 00 00 06 00 00 04 06 00 00 0A 06 00 00 0D 06 00 |
|||
T CB 06 03 23 36 00 CD FE 05 0E FF CD 05 06 CD |
|||
R 00 00 06 00 00 07 06 00 00 0C 06 00 |
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T D8 06 F5 05 C8 CD 5E 05 3E E5 BE CA D2 06 3A |
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R 00 00 06 00 00 02 06 00 00 06 06 00 00 0C 06 00 |
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T E5 06 41 03 BE C2 F6 06 23 7E D6 24 C2 F6 06 3D |
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R 00 00 06 00 00 02 06 00 00 06 06 00 00 0D 06 00 |
|||
T F3 06 32 45 03 0E 01 CD 6B 06 CD 8C 05 C3 |
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R 00 00 06 00 00 03 06 00 00 08 06 00 00 0B 06 00 |
|||
T FF 06 D2 06 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 01 07 |
|||
R 00 00 06 00 |
|||
T 01 07 3A D4 0D C3 01 03 C5 F5 3A C5 0D 2F 47 79 |
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R 00 00 06 00 00 03 06 00 00 06 06 00 00 0B 06 00 |
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T 0F 07 A0 4F F1 A0 91 E6 1F C1 C9 3E FF 32 D4 0D |
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R 00 00 06 00 00 0E 06 00 |
|||
T 1D 07 21 D8 0D 71 2A 43 03 22 D9 0D CD |
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R 00 00 06 00 00 03 06 00 00 07 06 00 00 0A 06 00 |
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T 28 07 FE 05 CD A1 03 0E 00 CD 05 06 CD |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
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T 33 07 F5 05 CA 94 07 2A D9 0D EB 1A FE E5 CA |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 40 07 4A 07 D5 CD 7F 05 D1 D2 94 07 CD |
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R 00 00 06 00 00 02 06 00 00 06 06 00 00 0A 06 00 |
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T 4B 07 5E 05 3A D8 0D 4F 06 00 79 B7 CA 83 07 1A |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 0D 06 00 |
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T 59 07 FE 3F CA 7C 07 78 FE 0D CA 7C 07 FE 0C 1A |
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R 00 00 06 00 00 05 06 00 00 0B 06 00 |
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T 67 07 CA 73 07 96 E6 7F C2 2D 07 C3 7C 07 C5 4E |
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R 00 00 06 00 00 03 06 00 00 09 06 00 00 0C 06 00 |
|||
T 75 07 CD 07 07 C1 C2 2D 07 13 23 04 0D C3 53 07 |
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R 00 00 06 00 00 03 06 00 00 07 06 00 00 0E 06 00 |
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T 83 07 3A EA 0D E6 03 32 45 03 21 D4 0D 7E 17 D0 |
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R 00 00 06 00 00 03 06 00 00 08 06 00 00 0B 06 00 |
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T 91 07 AF 77 C9 CD FE 05 3E FF C3 01 03 CD 54 05 |
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R 00 00 06 00 00 06 06 00 00 0B 06 00 00 0E 06 00 |
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T 9F 07 0E 0C CD 18 07 CD F5 05 C8 CD 44 05 CD |
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R 00 00 06 00 00 05 06 00 00 08 06 00 00 0C 06 00 |
|||
T AC 07 5E 05 36 E5 0E 00 CD 6B 06 CD C6 05 CD |
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R 00 00 06 00 00 02 06 00 00 09 06 00 00 0C 06 00 |
|||
T B9 07 2D 07 C3 A4 07 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T BE 07 |
|||
R 00 00 06 00 |
|||
T BE 07 50 59 79 B0 CA D1 07 0B D5 C5 CD 35 06 1F |
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R 00 00 06 00 00 07 06 00 00 0D 06 00 |
|||
T CC 07 D2 EC 07 C1 D1 2A C6 0D 7B 95 7A 9C D2 |
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R 00 00 06 00 00 03 06 00 00 08 06 00 |
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T D9 07 F4 07 13 C5 D5 42 4B CD 35 06 1F D2 EC 07 |
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R 00 00 06 00 00 02 06 00 00 0A 06 00 00 0E 06 00 |
|||
T E7 07 D1 C1 C3 C0 07 17 3C CD 64 06 E1 D1 C9 79 |
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R 00 00 06 00 00 05 06 00 00 0A 06 00 |
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T F5 07 B0 C2 C0 07 21 00 00 C9 0E 00 1E 20 D5 06 |
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R 00 00 06 00 00 04 06 00 |
|||
T 03 08 00 2A 43 03 09 EB CD 5E 05 C1 CD 4F 03 CD |
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R 00 00 06 00 00 04 06 00 00 09 06 00 00 0D 06 00 |
|||
T 11 08 C3 03 C3 C6 05 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 16 08 |
|||
R 00 00 06 00 |
|||
T 16 08 CD 54 05 0E 0C CD 18 07 2A 43 03 7E 11 |
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R 00 00 06 00 00 03 06 00 00 08 06 00 00 0B 06 00 |
|||
T 23 08 10 00 19 77 CD F5 05 C8 CD 44 05 0E 10 1E |
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R 00 00 06 00 00 07 06 00 00 0B 06 00 |
|||
T 31 08 0C CD 01 08 CD 2D 07 C3 27 08 |
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R 00 00 06 00 00 04 06 00 00 07 06 00 00 0A 06 00 |
|||
T 3B 08 |
|||
R 00 00 06 00 |
|||
T 3B 08 0E 0C CD 18 07 CD F5 05 C8 0E 00 1E 0C CD |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 |
|||
T 49 08 01 08 CD 2D 07 C3 40 08 0E 0F CD |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
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T 54 08 18 07 CD F5 05 C8 CD A6 04 7E F5 E5 CD |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
|||
T 61 08 5E 05 EB 2A 43 03 0E 20 D5 CD 4F 03 CD |
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R 00 00 06 00 00 02 06 00 00 06 06 00 00 0C 06 00 |
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T 6E 08 78 05 D1 21 0C 00 19 4E 21 0F 00 19 46 E1 |
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R 00 00 06 00 00 02 06 00 |
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T 7C 08 F1 77 79 BE 78 CA 8B 08 3E 00 DA 8B 08 3E |
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R 00 00 06 00 00 08 06 00 00 0D 06 00 |
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T 8A 08 80 2A 43 03 11 0F 00 19 77 C9 |
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R 00 00 06 00 00 04 06 00 |
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T 94 08 |
|||
R 00 00 06 00 |
|||
T 94 08 7E 23 B6 2B C0 1A 77 13 23 1A 77 1B 2B C9 |
|||
R 00 00 06 00 |
|||
T A2 08 AF 32 45 03 32 EA 0D 32 EB 0D CD |
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R 00 00 06 00 00 04 06 00 00 07 06 00 00 0A 06 00 |
|||
T AD 08 1E 05 C0 CD 69 05 E6 80 C0 0E 0F CD 18 07 |
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R 00 00 06 00 00 02 06 00 00 06 06 00 00 0E 06 00 |
|||
T BB 08 CD F5 05 C8 01 10 00 CD 5E 05 09 EB 2A |
|||
R 00 00 06 00 00 03 06 00 00 0A 06 00 |
|||
T C8 08 43 03 09 0E 10 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T CD 08 |
|||
R 00 00 06 00 |
|||
T CD 08 3A DD 0D B7 CA E8 08 7E B7 1A C2 DB 08 77 |
|||
R 00 00 06 00 00 03 06 00 00 07 06 00 00 0D 06 00 |
|||
T DB 08 |
|||
R 00 00 06 00 |
|||
T DB 08 B7 C2 E1 08 7E 12 |
|||
R 00 00 06 00 00 04 06 00 |
|||
T E1 08 |
|||
R 00 00 06 00 |
|||
T E1 08 BE C2 1F 09 C3 FD 08 |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 |
|||
T E8 08 |
|||
R 00 00 06 00 |
|||
T E8 08 CD 94 08 EB CD 94 08 EB 1A BE C2 1F 09 13 |
|||
R 00 00 06 00 00 03 06 00 00 07 06 00 00 0D 06 00 |
|||
T F6 08 23 1A BE C2 1F 09 0D |
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R 00 00 06 00 00 06 06 00 |
|||
T FD 08 |
|||
R 00 00 06 00 |
|||
T FD 08 13 23 0D C2 CD 08 01 EC FF 09 EB 09 1A BE |
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R 00 00 06 00 00 06 06 00 |
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T 0B 09 DA 17 09 77 01 03 00 09 EB 09 7E 12 |
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R 00 00 06 00 00 03 06 00 |
|||
T 17 09 |
|||
R 00 00 06 00 |
|||
T 17 09 3E FF 32 D2 0D C3 10 08 |
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R 00 00 06 00 00 05 06 00 00 08 06 00 |
|||
T 1F 09 |
|||
R 00 00 06 00 |
|||
T 1F 09 21 45 03 35 C9 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 24 09 |
|||
R 00 00 06 00 |
|||
T 24 09 CD 54 05 2A 43 03 E5 21 AC 0D 22 |
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R 00 00 06 00 00 03 06 00 00 06 06 00 00 0A 06 00 |
|||
T 2F 09 43 03 0E 01 CD 18 07 CD F5 05 E1 22 |
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R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
|||
T 3B 09 43 03 C8 EB 21 0F 00 19 0E 11 AF 77 23 0D |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 49 09 C2 46 09 21 0D 00 19 77 CD 8C 05 CD FD 07 |
|||
R 00 00 06 00 00 03 06 00 00 0B 06 00 00 0E 06 00 |
|||
T 57 09 C3 78 05 AF 32 D2 0D CD A2 08 CD |
|||
R 00 00 06 00 00 03 06 00 00 07 06 00 00 0A 06 00 |
|||
T 62 09 F5 05 C8 2A 43 03 01 0C 00 09 7E 3C E6 1F |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 |
|||
T 70 09 77 CA 83 09 47 3A C5 0D A0 21 D2 0D A6 CA |
|||
R 00 00 06 00 00 04 06 00 00 08 06 00 00 0C 06 00 |
|||
T 7E 09 8E 09 C3 AC 09 01 02 00 09 34 7E E6 0F CA |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 8C 09 B6 09 0E 0F CD 18 07 CD F5 05 C2 |
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R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
|||
T 97 09 AC 09 3A D3 0D 3C CA B6 09 CD |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
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T A1 09 24 09 CD F5 05 CA B6 09 C3 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T AA 09 AF 09 CD 5A 08 CD BB 04 AF C3 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T B4 09 01 03 CD 05 03 C3 78 05 3E 01 32 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T BF 09 D5 0D 3E FF 32 D3 0D CD BB 04 3A |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
|||
T CA 09 E3 0D 21 E1 0D BE DA E6 09 FE 80 C2 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
|||
T D6 09 FB 09 CD 5A 09 AF 32 E3 0D 3A |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
|||
T E0 09 45 03 B7 C2 FB 09 CD 77 04 CD |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 09 06 00 |
|||
T EA 09 84 04 CA FB 09 CD 8A 04 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T F3 09 D1 03 CD B2 03 C3 D2 04 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T FC 09 05 03 3E 01 32 D5 0D 3E 00 32 D3 0D CD |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0C 06 00 |
|||
T 09 0A 54 05 2A 43 03 CD 47 05 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 12 0A BB 04 3A E3 0D FE 80 D2 05 03 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T 1D 0A 77 04 CD 84 04 0E 00 C2 6E 0A CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T 28 0A 3E 04 32 D7 0D 01 00 00 B7 CA 3B 0A 4F 0B |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0C 06 00 |
|||
T 36 0A CD 5E 04 44 4D CD BE 07 7D B4 C2 48 0A 3E |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 00 0D 06 00 |
|||
T 44 0A 02 C3 01 03 22 E5 0D EB 2A 43 03 01 10 00 |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 00 0B 06 00 |
|||
T 52 0A 09 3A DD 0D B7 3A D7 0D CA 64 0A CD |
|||
R 00 00 06 00 00 04 06 00 00 08 06 00 00 0B 06 00 |
|||
T 5E 0A 64 05 73 C3 6C 0A 4F 06 00 09 09 73 23 72 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 |
|||
T 6C 0A 0E 02 3A 45 03 B7 C0 C5 CD 8A 04 3A D5 0D |
|||
R 00 00 06 00 00 05 06 00 00 0B 06 00 00 0E 06 00 |
|||
T 7A 0A 3D 3D C2 BB 0A C1 C5 79 3D 3D C2 BB 0A E5 |
|||
R 00 00 06 00 00 05 06 00 00 0D 06 00 |
|||
T 88 0A 2A B9 0D 57 77 23 14 F2 8C 0A CD E0 05 2A |
|||
R 00 00 06 00 00 03 06 00 00 0A 06 00 00 0D 06 00 |
|||
T 96 0A E7 0D 0E 02 22 E5 0D C5 CD D1 03 C1 CD |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0B 06 00 |
|||
T A3 0A B8 03 2A E5 0D 0E 00 3A C4 0D 47 A5 B8 23 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T B1 0A C2 9A 0A E1 22 E5 0D CD DA 05 CD |
|||
R 00 00 06 00 00 03 06 00 00 07 06 00 00 0A 06 00 |
|||
T BC 0A D1 03 C1 C5 CD B8 03 C1 3A E3 0D 21 |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0B 06 00 |
|||
T C8 0A E1 0D BE DA D2 0A 77 34 0E 02 00 00 21 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 |
|||
T D5 0A 00 00 F5 CD 69 05 E6 7F 77 F1 FE 7F C2 |
|||
R 00 00 06 00 00 06 06 00 |
|||
T E2 0A 00 0B 3A D5 0D FE 01 C2 00 0B CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T ED 0A D2 04 CD 5A 09 21 45 03 7E B7 C2 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T F8 0A FE 0A 3D 32 E3 0D 36 00 C3 D2 04 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 0B 06 00 |
|||
T 03 0B |
|||
R 00 00 06 00 |
|||
T 03 0B AF 32 D5 0D C5 2A 43 03 EB 21 21 00 19 7E |
|||
R 00 00 06 00 00 04 06 00 00 08 06 00 |
|||
T 11 0B E6 7F F5 7E 17 23 7E 17 E6 1F 4F 7E 1F 1F |
|||
R 00 00 06 00 |
|||
T 1F 0B 1F 1F E6 0F 47 F1 23 6E 2C 2D 2E 06 C2 |
|||
R 00 00 06 00 |
|||
T 2C 0B 8B 0B 21 20 00 19 77 21 0C 00 19 79 96 C2 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 3A 0B 47 0B 21 0E 00 19 78 96 E6 7F CA 7F 0B C5 |
|||
R 00 00 06 00 00 02 06 00 00 0D 06 00 |
|||
T 48 0B D5 CD A2 08 D1 C1 2E 03 3A 45 03 3C CA |
|||
R 00 00 06 00 00 04 06 00 00 0B 06 00 |
|||
T 55 0B 84 0B 21 0C 00 19 71 21 0E 00 19 70 CD |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 62 0B 51 08 3A 45 03 3C C2 7F 0B C1 C5 2E 04 0C |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
|||
T 70 0B CA 84 0B CD 24 09 2E 05 3A 45 03 3C CA |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 0B 06 00 |
|||
T 7D 0B 84 0B C1 AF C3 01 03 E5 CD 69 05 36 C0 E1 |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0B 06 00 |
|||
T 8B 0B C1 7D 32 45 03 C3 78 05 0E FF CD 03 0B CC |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 00 0D 06 00 |
|||
T 99 0B C1 09 C9 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 9C 0B |
|||
R 00 00 06 00 |
|||
T 9C 0B 0E 00 CD 03 0B CC 03 0A C9 |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 |
|||
T A5 0B |
|||
R 00 00 06 00 |
|||
T A5 0B EB 19 4E 06 00 21 0C 00 19 7E 0F E6 80 81 |
|||
R 00 00 06 00 |
|||
T B3 0B 4F 3E 00 88 47 7E 0F E6 0F 80 47 21 0E 00 |
|||
R 00 00 06 00 |
|||
T C1 0B 19 7E 87 87 87 87 F5 80 47 F5 E1 7D E1 B5 |
|||
R 00 00 06 00 |
|||
T CF 0B E6 01 C9 0E 0C CD 18 07 2A 43 03 11 21 00 |
|||
R 00 00 06 00 00 08 06 00 00 0B 06 00 |
|||
T DD 0B 19 E5 72 23 72 23 72 CD F5 05 CA 0C 0C CD |
|||
R 00 00 06 00 00 0A 06 00 00 0D 06 00 |
|||
T EB 0B 5E 05 11 0F 00 CD A5 0B E1 E5 5F 79 96 23 |
|||
R 00 00 06 00 00 02 06 00 00 08 06 00 |
|||
T F9 0B 78 9E 23 7B 9E DA 06 0C 73 2B 70 2B 71 CD |
|||
R 00 00 06 00 00 08 06 00 |
|||
T 07 0C 2D 07 C3 E4 0B E1 C9 2A 43 03 11 20 00 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T 15 0C A5 0B 21 21 00 19 71 23 70 23 77 C9 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 21 0C |
|||
R 00 00 06 00 |
|||
T 21 0C 2A AF 0D 3A 42 03 4F CD EA 04 E5 EB CD |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 0A 06 00 |
|||
T 2E 0C 59 03 E1 CC 47 03 7D 1F D8 2A AF 0D 4D 44 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 0C 06 00 |
|||
T 3C 0C CD 0B 05 22 AF 0D C3 A3 06 3A |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 46 0C D6 0D 21 42 03 BE C8 77 C3 21 0C 3E FF 32 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0B 06 00 |
|||
T 54 0C DE 0D 2A 43 03 7E E6 1F 3D 32 D6 0D FE 1E |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0C 06 00 |
|||
T 62 0C D2 75 0C 3A 42 03 32 DF 0D 7E 32 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 6D 0C E0 0D E6 E0 77 CD 45 0C 3A 41 03 2A |
|||
R 00 00 06 00 00 02 06 00 00 08 06 00 00 0B 06 00 |
|||
T 79 0C 43 03 B6 77 C9 3E 22 C3 01 03 21 00 00 22 |
|||
R 00 00 06 00 00 02 06 00 00 0A 06 00 |
|||
T 87 0C AD 0D 22 AF 0D AF 32 42 03 21 80 00 22 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
|||
T 94 0C B1 0D CD DA 05 C3 21 0C CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 9D 0C 72 05 CD 51 0C C3 51 08 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T A5 0C |
|||
R 00 00 06 00 |
|||
T A5 0C CD 51 0C C3 A2 08 0E 00 EB 7E FE 3F CA |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T B2 0C C2 0C CD A6 04 7E FE 3F C4 72 05 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0B 06 00 |
|||
T BE 0C 51 0C 0E 0F CD 18 07 C3 E9 05 2A |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
|||
T C9 0C D9 0D 22 43 03 CD 51 0C CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T D2 0C 2D 07 C3 E9 05 CD 51 0C CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T DB 0C 9C 07 C3 01 07 CD 51 0C C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T E4 0C BC 09 CD 51 0C C3 FE 09 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T ED 0C 72 05 CD 51 0C C3 24 09 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T F6 0C 51 0C CD 16 08 C3 01 07 2A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T FF 0C AF 0D C3 29 0D 3A 42 03 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 08 0D 01 03 EB 22 B1 0D C3 DA 05 2A |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 09 06 00 |
|||
T 12 0D BF 0D C3 29 0D 2A AD 0D C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 1B 0D 29 0D CD 51 0C CD 3B 08 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 24 0D 01 07 2A BB 0D 22 45 03 C9 3A |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 2E 0D D6 0D FE FF C2 3B 0D 3A 41 03 C3 |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
|||
T 39 0D 01 03 E6 1F 32 41 03 C9 |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 |
|||
T 41 0D |
|||
R 00 00 06 00 |
|||
T 41 0D CD 51 0C C3 93 0B |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T 47 0D |
|||
R 00 00 06 00 |
|||
T 47 0D CD 51 0C C3 9C 0B |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T 4D 0D |
|||
R 00 00 06 00 |
|||
T 4D 0D CD 51 0C C3 D2 0B 2A 43 03 7D 2F 5F 7C 2F |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 5B 0D 2A AF 0D A4 57 7D A3 5F 2A AD 0D EB 22 |
|||
R 00 00 06 00 00 03 06 00 00 0B 06 00 |
|||
T 68 0D AF 0D 7D A3 6F 7C A2 67 22 AD 0D C9 3A |
|||
R 00 00 06 00 00 02 06 00 00 0B 06 00 |
|||
T 75 0D DE 0D B7 CA 91 0D 2A 43 03 36 00 3A |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 09 06 00 |
|||
T 81 0D E0 0D B7 CA 91 0D 77 3A DF 0D 32 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 0A 06 00 |
|||
T 8C 0D D6 0D CD 45 0C 2A 0F 03 F9 2A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 96 0D 45 03 7D 44 C9 CD 51 0C 3E 02 32 D5 0D 0E |
|||
R 00 00 06 00 00 02 06 00 00 08 06 00 00 0D 06 00 |
|||
T A4 0D 00 CD 07 0B CC 03 0A C9 |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 |
|||
T AC 0D |
|||
R 00 00 06 00 |
|||
T AC 0D E5 00 00 00 00 80 00 |
|||
R 00 00 06 00 |
|||
T B3 0D |
|||
R 00 00 06 00 |
|||
T B3 0D 00 00 |
|||
R 00 00 06 00 |
|||
T B5 0D |
|||
R 00 00 06 00 |
|||
T B5 0D 00 00 |
|||
R 00 00 06 00 |
|||
T B7 0D |
|||
R 00 00 06 00 |
|||
T B7 0D 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T BF 0D |
|||
R 00 00 06 00 |
|||
T BF 0D 00 00 00 00 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T CC 0D 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T D2 0D |
|||
R 00 00 06 00 |
|||
T D2 0D 00 |
|||
R 00 00 06 00 |
|||
T D3 0D |
|||
R 00 00 06 00 |
|||
T D3 0D 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T D7 0D |
|||
R 00 00 06 00 |
|||
T D7 0D 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T E0 0D |
|||
R 00 00 06 00 |
|||
T E0 0D 00 00 00 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T EC 0D |
|||
R 00 00 06 00 |
|||
T EC 0D 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T FA 0D 00 00 |
|||
R 00 00 06 00 |
|||
T FC 0D |
|||
R 00 00 06 00 |
|||
File diff suppressed because it is too large
@ -1,136 +0,0 @@ |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 1. |
|||
bdosb01.s derived from bdosb01.asm |
|||
Symbol Table |
|||
|
|||
.__.ABS.= 0000 G | 6 ACTIVE 0342 R | 6 ADDA2HL 0564 R |
|||
6 ALLOC0 0DCA R | 6 ALLOC1 0DCC R | 6 ALOCVECT 0DBF R |
|||
ASCIIA = 0041 | AT = 0040 | 6 AUTO 0DDE R |
|||
6 AUTOFLAG 0DE0 R | 6 AUTOSEL 0C51 R | 6 AUTOSL1 0C75 R |
|||
6 BACKUP 01A4 R | 6 BACKUP1 01AC R | 6 BADSCTR 0009 R |
|||
6 BADSEC 00CA R | 6 BADSEL 00D5 R | 6 BADSLCT 000B R |
|||
BASE = 9C00 | 6 BDOSDRV 00C6 R | 6 BDOSERR 00BA R |
|||
BDOSO = D800 | 6 BIGDISK 0DDD R | BIOS = E600 |
|||
BIOSO = E600 | 6 BITMAP 06A3 R | 6 BITMAP1 06B1 R |
|||
6 BITMAP2 06D2 R | 6 BITMAP3 06F6 R | 6 BLKMASK 0DC4 R |
|||
6 BLKNMBR 0DE5 R | 6 BLKSHFT 0DC3 R | BOOT = E600 |
|||
BS = 0008 | CCPO = D000 | 6 CHARBUF 030E R |
|||
6 CHECKDIR 059E R | 6 CHECKSUM 04F7 R | 6 CHGNAM1 0827 R |
|||
6 CHGNAMES 0816 R | 6 CHKBLK 0484 R | 6 CHKCHAR 0114 R |
|||
6 CHKDIR1 05C4 R | 6 CHKNMBR 058C R | 6 CHKROFL 0544 R |
|||
6 CHKSUM1 04FD R | 6 CHKVECT 0DBD R | 6 CHKWPRT 0554 R |
|||
6 CKBITMAP 0635 R | 6 CKBMAP1 0656 R | 6 CKCON1 0142 R |
|||
6 CKCON2 0145 R | 6 CKCONSOL 0123 R | 6 CKFILPOS 05F5 R |
|||
6 CKROF1 0547 R | 6 CKSUMTBL 0DEC R | 6 CLEARS2 0572 R |
|||
6 CLOSEFIL 0CA5 R | 6 CLOSEFLG 0DD2 R | 6 CLOSEIT 08A2 R |
|||
6 CLOSEIT1 08CD R | 6 CLOSEIT2 08DB R | 6 CLOSEIT3 08E1 R |
|||
6 CLOSEIT4 08E8 R | 6 CLOSEIT5 08FD R | 6 CLOSEIT6 0917 R |
|||
6 CLOSEIT7 091F R | CNTRLC = 0003 | CNTRLE = 0005 |
|||
CNTRLP = 0010 | CNTRLR = 0012 | CNTRLS = 0013 |
|||
CNTRLU = 0015 | CNTRLX = 0018 | CNTRLZ = 001A |
|||
6 COMBLK 0477 R | 6 COMPRAND 0BA5 R | CONIN = E609 |
|||
CONOUT = E60C | CONST = E606 | 6 COUNTER 0DD8 R |
|||
CR = 000D | 6 CURPOS 030C R | 6 DE2HL 034F R |
|||
6 DE2HL1 0350 R | 6 DEFDMA 05DA R | DEL = 007F |
|||
6 DELFILE 0CD7 R | 6 DIRBUF 0DB9 R | 6 DIRC1 02E0 R |
|||
6 DIRCIO 02D4 R | 6 DIRDMA 05E0 R | 6 DIRDMA1 05E3 R |
|||
6 DIRREAD 05D4 R | 6 DIRSIZE 0DC8 R | 6 DIRWRITE 05C6 R |
|||
6 DISKPB 0DBB R | 6 DISKRO 00E1 R | DOLLAR = 0024 |
|||
6 DOREAD 03B2 R | 6 DOWRITE 03B8 R | 6 DSKSIZE 0DC6 R |
|||
6 EMPTYFCB 0DAC R | ENDFIL = 0001 | ENTRY = 0005 |
|||
6 EPARAM 0DD6 R | 6 ERAFIL1 07A4 R | 6 ERAFILE 079C R |
|||
6 ERROR1 0099 R | 6 ERROR2 00A5 R | 6 ERROR3 00AB R |
|||
6 ERROR4 00B1 R | 6 ERROR5 00B4 R | 6 EXTBLK 045E R |
|||
6 EXTBLK1 0471 R | 6 EXTMASK 0DC5 R | 6 FBASE 0006 R |
|||
6 FBASE1 0011 R | 6 FCB2HL 055E R | 6 FCBPOS 0DE9 R |
|||
6 FCBSET 07FD R | 6 FCREATE 0CEC R | FF = 000C |
|||
6 FILEPOS 0DEA R | 6 FILERO 00DC R | 6 FILESIZE 0D4D R |
|||
6 FINDFST 0718 R | 6 FINDNXT 072D R | 6 FNDNXT1 074A R |
|||
6 FNDNXT2 0753 R | 6 FNDNXT3 0773 R | 6 FNDNXT4 077C R |
|||
6 FNDNXT5 0783 R | 6 FNDNXT6 0794 R | 6 FNDSPA1 07C0 R |
|||
6 FNDSPA2 07D1 R | 6 FNDSPA3 07EC R | 6 FNDSPA4 07F4 R |
|||
6 FNDSPACE 07BE R | 6 FNDSTAT 0DD4 R | 6 FUNCTNS 0047 R |
|||
6 GETALOC 0D11 R | 6 GETBLK1 0445 R | 6 GETBLK2 0453 R |
|||
6 GETBLK3 045C R | 6 GETBLOCK 043E R | 6 GETCHAR 00FB R |
|||
6 GETCON 02C8 R | 6 GETCRNT 0D04 R | 6 GETCSTS 02FE R |
|||
6 GETECHO 0106 R | 6 GETEMPTY 0924 R | 6 GETFST 0CAB R |
|||
6 GETFST1 0CC2 R | 6 GETIOB 02ED R | 6 GETLOG 0CFE R |
|||
6 GETMT1 0946 R | 6 GETNEXT 095A R | 6 GETNXT 0CC8 R |
|||
6 GETPARM 0D26 R | 6 GETPRM1 0D29 R | 6 GETRDR 02CE R |
|||
6 GETROV 0D17 R | 6 GETS2 0569 R | 6 GETUSER 0D2D R |
|||
6 GETVER 0C7E R | 6 GETWPRT 051E R | 6 GOBACK 0D74 R |
|||
6 GOBACK1 0D91 R | 6 GTNEXT1 0983 R | 6 GTNEXT2 098E R |
|||
6 GTNEXT3 09AC R | 6 GTNEXT4 09AF R | 6 GTNEXT5 09B6 R |
|||
HOME = E618 | 6 HOMEDRV 03A1 R | IOBYTE = 0003 |
|||
6 IOERR1 0305 R | 6 IORET 03BB R | 6 JUMPHL 034A R |
|||
LF = 000A | LIST = E60F | 6 LOGICAL 048A R |
|||
6 LOGICL1 0490 R | 6 LOGIN 0DAF R | 6 LOGINDRV 0C21 R |
|||
6 LOGOFF 0D53 R | 6 LOGSECT 0DE7 R | 6 MODE 0DD5 R |
|||
6 MOREFLS 057F R | 6 MOVEDIR 05E9 R | 6 MOVEWORD 0894 R |
|||
6 NEWLINE 01B1 R | 6 NEWLN1 01B9 R | NFUNCTS = 0029 |
|||
NK = 003B | 6 NXENT1 0619 R | 6 NXENT2 0620 R |
|||
6 NXENTRY 0605 R | 6 OFFSET 0DCE R | 6 OLDDRV 0DDF R |
|||
6 OPENFIL 0C9C R | 6 OPENIT 0851 R | 6 OPENIT1 085A R |
|||
6 OPENIT2 088B R | 6 OUTCHAR 0148 R | 6 OUTCHR1 0162 R |
|||
6 OUTCHR2 0179 R | 6 OUTCON 0190 R | 6 OUTCON1 0196 R |
|||
6 OUTCRLF 01C9 R | 6 OUTFLAG 030A R | 6 PARAMS 0343 R |
|||
6 POSITION 0B03 R | 6 POSITN1 0B07 R | 6 POSITN2 0B47 R |
|||
6 POSITN3 0B7F R | 6 POSITN4 0B84 R | 6 POSITN5 0B8B R |
|||
POUND = 0023 | 6 PRTERR 00E5 R | 6 PRTFLAG 030D R |
|||
6 PRTMESG 01D3 R | 6 PRTSTR 02F8 R | PUNCH = E612 |
|||
6 PUTDMA 0D0A R | QUESTION= 003F | 6 R.DBUF1 01EF R |
|||
6 R.DBUF10 0270 R | 6 R.DBUF11 0278 R | 6 R.DBUF12 028A R |
|||
6 R.DBUF13 0299 R | 6 R.DBUF14 02A6 R | 6 R.DBUF15 02A9 R |
|||
6 R.DBUF16 02BD R | 6 R.DBUF17 02C1 R | 6 R.DBUF2 01F1 R |
|||
6 R.DBUF3 0216 R | 6 R.DBUF4 0226 R | 6 R.DBUF5 0237 R |
|||
6 R.DBUF6 0248 R | 6 R.DBUF7 024E R | 6 R.DBUF8 025F R |
|||
6 R.DBUF9 026B R | 6 R.DBUFF 01E1 R | 6 R.DWRTFL 0DD3 R |
|||
6 RANSIZ1 0BE4 R | 6 RANSIZ2 0C06 R | 6 RANSIZ3 0C0C R |
|||
6 RANSIZE 0BD2 R | 6 RDRANDOM 0D41 R | 6 RDSEQ 09BC R |
|||
6 RDSEQ1 09C1 R | 6 RDSEQ2 09E6 R | 6 RDSEQ3 09FB R |
|||
READ = E627 | READER = E615 | 6 READRAN 0B93 R |
|||
6 READSEQ 0CE0 R | 6 RELBLOCK 0DD7 R | 6 RENFILE 0CF5 R |
|||
6 RODISK 000D R | 6 ROFILE 000F R | 6 RSTDSK 0C83 R |
|||
6 RTN 0304 R | 6 SAMEXT 0707 R | 6 SAVATR1 0840 R |
|||
6 SAVEATTR 083B R | 6 SAVEFCB 0DD9 R | 6 SAVEXT 0DE2 R |
|||
6 SAVNREC 0DE3 R | 6 SAVNXT 0DE1 R | 6 SCRATCH1 0DB3 R |
|||
6 SCRATCH2 0DB5 R | 6 SCRATCH3 0DB7 R | 6 SECTORS 0DC1 R |
|||
SECTRN = E630 | SELDSK = E61B | 6 SELECT 0359 R |
|||
6 SELECT1 039D R | 6 SETATTR 0D1D R | 6 SETBIT 050B R |
|||
6 SETDIR 059C R | SETDMA = E624 | 6 SETDSK 0C45 R |
|||
6 SETEXT 04A6 R | 6 SETFILE 066B R | 6 SETFL1 0675 R |
|||
6 SETFL2 0688 R | 6 SETFL3 068E R | 6 SETFL4 069D R |
|||
6 SETHLDE 04AE R | 6 SETIOB 02F3 R | 6 SETNREC 04D2 R |
|||
6 SETRAN 0C0E R | 6 SETS2B7 0578 R | SETSEC = E621 |
|||
6 SETSTAT 0301 R | SETTRK = E61E | 6 SETUSER 0D3B R |
|||
6 SHIFTL 0504 R | 6 SHIFTL1 0505 R | 6 SHIFTR 04EA R |
|||
6 SHIFTR1 04EB R | 6 SHOWIT 017F R | 6 SLCTERR 0347 R |
|||
SPACE = 0020 | 6 STARTING 030B R | 6 STATUS 0345 R |
|||
6 STBITMAP 065C R | 6 STBMAP1 0664 R | 6 STFILPOS 05FE R |
|||
6 STKAREA 0341 R | 6 STNREC1 04DE R | 6 STRDATA 04BB R |
|||
6 STSTATUS 0701 R | 6 SUBHL 0595 R | TAB = 0009 |
|||
TBASE = 0100 | TBUFF = 0080 | TDRIVE = 0004 |
|||
TFCB = 005C | 6 TRKSEC 03C3 R | 6 TRKSEC1 03D1 R |
|||
6 TRKSEC2 03E4 R | 6 TRKSEC3 03FA R | 6 TRKSEC4 040F R |
|||
UP = 005E | 6 UPDATE 0801 R | 6 UPDATE1 0810 R |
|||
6 USERDMA 0DB1 R | 6 USERNO 0341 R | 6 USRSTACK 030F R |
|||
WBOOT = E603 | WRITE = E62A | 6 WRITERAN 0B9C R |
|||
6 WRTPRT 0DAD R | 6 WRTPRTD 052C R | 6 WRTSEQ 0CE6 R |
|||
6 WTRANDOM 0D47 R | 6 WTSEQ 09FE R | 6 WTSEQ1 0A03 R |
|||
6 WTSEQ10 0AD2 R | 6 WTSEQ11 0AFE R | 6 WTSEQ12 0B00 R |
|||
6 WTSEQ2 0A3B R | 6 WTSEQ3 0A48 R | 6 WTSEQ4 0A64 R |
|||
6 WTSEQ5 0A6C R | 6 WTSEQ6 0A6E R | 6 WTSEQ7 0A8C R |
|||
6 WTSEQ8 0A9A R | 6 WTSEQ9 0ABB R | 6 WTSEQ99 0ADF R |
|||
6 WTSPECL 0D9B R | 6 XLATE 0DD0 R | 0 _bdos 0000 GR |
|||
6 _bdos_en 0DFC GR | 0 _bdos_st 0000 GR |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 2. |
|||
bdosb01.s derived from bdosb01.asm |
|||
Area Table |
|||
|
|||
0 _CODE size 0 flags 0 |
|||
1 _DATA size 0 flags 0 |
|||
2 _OVERLAY size 0 flags 0 |
|||
3 _HOME size 0 flags 0 |
|||
4 _GSINIT size 0 flags 0 |
|||
5 _GSFINAL size 0 flags 0 |
|||
6 _BDOSB01 size DFC flags 0 |
|||
7 _CABS size 0 flags 0 |
|||
File diff suppressed because it is too large
@ -1,958 +0,0 @@ |
|||
XL |
|||
H 8 areas 4 global symbols |
|||
M cbios |
|||
O -mz80 |
|||
S .__.ABS. Def0000 |
|||
A _CODE size 0 flags 0 addr 0 |
|||
A _DATA size 0 flags 0 addr 0 |
|||
A _OVERLAY size 0 flags 0 addr 0 |
|||
A _HOME size 0 flags 0 addr 0 |
|||
A _GSINIT size 0 flags 0 addr 0 |
|||
A _GSFINAL size 0 flags 0 addr 0 |
|||
A _CBIOS size 11EB flags 0 addr 0 |
|||
S _cbios_end Def11EB |
|||
S _cbios Def0000 |
|||
S _cbios_start Def0000 |
|||
A _CABS size 0 flags 0 addr 0 |
|||
T 00 00 |
|||
R 00 00 06 00 |
|||
T 00 00 |
|||
R 00 00 06 00 |
|||
T 00 00 C3 1B 01 C3 46 01 C3 9C 01 C3 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 0A 00 A6 01 C3 B1 01 C3 BC 01 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 13 00 C0 01 C3 C2 01 C3 DA 01 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 1C 00 C4 01 C3 DD 01 C3 E3 01 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 25 00 EC 01 C3 F2 01 C3 D7 03 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 2E 00 BE 01 C3 E9 01 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 33 00 |
|||
R 00 00 06 00 |
|||
T 33 00 00 00 00 00 00 00 00 00 1D 0B B2 00 4E 0F |
|||
R 00 00 06 00 00 0A 06 00 00 0C 06 00 00 0E 06 00 |
|||
T 41 00 DE 0B 00 00 00 00 00 00 00 00 1D 0B 0C 01 |
|||
R 00 00 06 00 00 02 06 00 00 0C 06 00 00 0E 06 00 |
|||
T 4F 00 CE 0F C2 0E 00 00 00 00 00 00 00 00 1D 0B |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 0E 06 00 |
|||
T 5D 00 C1 00 4E 0F FF 0B 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 6B 00 1D 0B B2 00 4E 0F |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 71 00 DE 0B 00 00 00 00 00 00 00 00 1D 0B DF 00 |
|||
R 00 00 06 00 00 02 06 00 00 0C 06 00 00 0E 06 00 |
|||
T 7F 00 CE 0F FF 0D 00 00 00 00 00 00 00 00 1D 0B |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 0E 06 00 |
|||
T 8D 00 EE 00 CE 0F 40 0E 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 9B 00 1D 0B FD 00 CE 0F |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T A1 00 81 0E |
|||
R 00 00 06 00 00 02 06 00 |
|||
T A3 00 |
|||
R 00 00 06 00 |
|||
T A3 00 24 00 04 0F 00 5E 01 7F 00 C0 00 20 00 |
|||
R 00 00 06 00 |
|||
T B0 00 04 00 |
|||
R 00 00 06 00 |
|||
T B2 00 |
|||
R 00 00 06 00 |
|||
T B2 00 00 01 04 0F 01 E1 00 FF 00 F0 00 00 00 |
|||
R 00 00 06 00 |
|||
T BF 00 01 00 |
|||
R 00 00 06 00 |
|||
T C1 00 |
|||
R 00 00 06 00 |
|||
T C1 00 00 01 05 1F 01 E1 07 FF 01 F0 00 00 00 |
|||
R 00 00 06 00 |
|||
T CE 00 F1 03 |
|||
R 00 00 06 00 |
|||
T D0 00 |
|||
R 00 00 06 00 |
|||
T D0 00 00 01 05 1F 01 E1 07 FF 01 F0 00 00 00 |
|||
R 00 00 06 00 |
|||
T DD 00 01 00 |
|||
R 00 00 06 00 |
|||
T DF 00 |
|||
R 00 00 06 00 |
|||
T DF 00 00 01 04 0F 01 F1 01 FF 00 F0 00 00 00 |
|||
R 00 00 06 00 |
|||
T EC 00 01 00 |
|||
R 00 00 06 00 |
|||
T EE 00 |
|||
R 00 00 06 00 |
|||
T EE 00 00 01 04 0F 00 FF 01 FF 00 F0 00 00 00 |
|||
R 00 00 06 00 |
|||
T FB 00 01 00 |
|||
R 00 00 06 00 |
|||
T FD 00 |
|||
R 00 00 06 00 |
|||
T FD 00 10 00 03 07 01 1F 00 1F 00 80 00 00 00 |
|||
R 00 00 06 00 |
|||
T 0A 01 0A 00 |
|||
R 00 00 06 00 |
|||
T 0C 01 |
|||
R 00 00 06 00 |
|||
T 0C 01 48 00 04 0F 00 C6 02 FF 00 F0 00 20 00 |
|||
R 00 00 06 00 |
|||
T 19 01 02 00 |
|||
R 00 00 06 00 |
|||
T 1B 01 |
|||
R 00 00 06 00 |
|||
T 1B 01 3E 80 D3 7C 3E 81 D3 78 21 00 00 01 FF 1F |
|||
R 00 00 06 00 |
|||
T 29 01 3E E5 5D 54 13 77 ED B0 3E 80 D3 7C 3E 00 |
|||
R 00 00 06 00 |
|||
T 37 01 D3 78 AF 32 03 00 32 04 00 CD C3 05 C3 |
|||
R 00 00 06 00 00 0C 06 00 |
|||
T 44 01 67 01 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 46 01 |
|||
R 00 00 06 00 |
|||
T 46 01 F3 31 80 00 ED 56 AF D3 7C AF D3 78 21 |
|||
R 00 00 06 00 |
|||
T 53 01 00 0A 11 00 D0 01 00 08 ED B0 3E 80 D3 7C |
|||
R 00 00 06 00 |
|||
T 61 01 AF D3 78 CD C3 05 |
|||
R 00 00 06 00 00 06 06 00 |
|||
T 67 01 |
|||
R 00 00 06 00 |
|||
T 67 01 3E C3 32 00 00 21 03 00 22 01 00 3E C3 32 |
|||
R 00 00 06 00 00 08 06 00 |
|||
T 75 01 38 00 21 03 00 22 01 00 32 05 00 21 06 D8 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T 83 01 22 06 00 01 80 00 CD EC 01 CD BF 07 21 |
|||
R 00 00 06 00 00 09 06 00 00 0C 06 00 |
|||
T 90 01 AD 0A CD BC 04 3A 04 00 4F C3 00 D0 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 9C 01 |
|||
R 00 00 06 00 |
|||
T 9C 01 DB 6D E6 01 CA A5 01 3E FF |
|||
R 00 00 06 00 00 07 06 00 |
|||
T A5 01 |
|||
R 00 00 06 00 |
|||
T A5 01 C9 |
|||
R 00 00 06 00 |
|||
T A6 01 |
|||
R 00 00 06 00 |
|||
T A6 01 CD 9C 01 FE 00 CA A6 01 DB 68 C9 |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 |
|||
T B1 01 |
|||
R 00 00 06 00 |
|||
T B1 01 DB 6D E6 20 CA B1 01 79 D3 68 C9 |
|||
R 00 00 06 00 00 07 06 00 |
|||
T BC 01 |
|||
R 00 00 06 00 |
|||
T BC 01 79 C9 |
|||
R 00 00 06 00 |
|||
T BE 01 |
|||
R 00 00 06 00 |
|||
T BE 01 AF C9 |
|||
R 00 00 06 00 |
|||
T C0 01 |
|||
R 00 00 06 00 |
|||
T C0 01 79 C9 |
|||
R 00 00 06 00 |
|||
T C2 01 |
|||
R 00 00 06 00 |
|||
T C2 01 79 C9 21 00 00 79 FE 07 D0 32 12 0B 6F 26 |
|||
R 00 00 06 00 00 0C 06 00 |
|||
T D0 01 00 29 29 29 29 11 33 00 19 C9 |
|||
R 00 00 06 00 00 08 06 00 |
|||
T DA 01 |
|||
R 00 00 06 00 |
|||
T DA 01 01 00 00 |
|||
R 00 00 06 00 |
|||
T DD 01 |
|||
R 00 00 06 00 |
|||
T DD 01 60 69 22 02 0B C9 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T E3 01 |
|||
R 00 00 06 00 |
|||
T E3 01 60 69 22 0A 0B C9 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T E9 01 |
|||
R 00 00 06 00 |
|||
T E9 01 60 69 C9 |
|||
R 00 00 06 00 |
|||
T EC 01 |
|||
R 00 00 06 00 |
|||
T EC 01 69 60 22 10 0B C9 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T F2 01 |
|||
R 00 00 06 00 |
|||
T F2 01 F3 3A 12 0B FE 01 CA FE 02 FE 00 CA 5A 02 |
|||
R 00 00 06 00 00 04 06 00 00 09 06 00 00 0E 06 00 |
|||
T 00 02 FE 02 CA 78 03 FE 03 CA 5A 02 FE 04 CA |
|||
R 00 00 06 00 00 05 06 00 00 0A 06 00 |
|||
T 0D 02 D6 03 FE 05 CA 5A 02 |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 |
|||
T 14 02 |
|||
R 00 00 06 00 |
|||
T 14 02 2A 02 0B 29 29 29 29 44 4D 2A 0A 0B 09 22 |
|||
R 00 00 06 00 00 03 06 00 00 0C 06 00 |
|||
T 22 02 0C 0B 2A 0C 0B 29 29 29 29 29 29 29 22 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 2F 02 0E 0B 3E 00 D3 7C 32 08 0B 21 E2 0F 5D 54 |
|||
R 00 00 06 00 00 02 06 00 00 09 06 00 00 0C 06 00 |
|||
T 3D 02 2A 0E 0B CD 10 05 CD 04 05 2A |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 47 02 10 0B 5D 54 21 E2 0F CD 10 05 3A |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
|||
T 52 02 12 0B 32 DD 0F 3E 00 C9 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 5A 02 |
|||
R 00 00 06 00 |
|||
T 5A 02 CD CB 04 CD D9 04 21 E2 0F 5D 54 2A |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 66 02 0E 0B CD 10 05 CD 04 05 2A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 6F 02 10 0B 5D 54 21 E2 0F CD 10 05 3A |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
|||
T 7A 02 12 0B 32 DD 0F 3E 00 C9 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 82 02 |
|||
R 00 00 06 00 |
|||
T 82 02 3A 02 0B E6 01 32 EB 0A 3A 02 0B CB 3F 32 |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 00 0B 06 00 |
|||
T 90 02 04 0B 3A 0A 0B 32 1C 0B CB 3F CB 3F 32 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 9D 02 0C 0B 3A 1C 0B E6 03 32 1C 0B C9 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T A8 02 |
|||
R 00 00 06 00 |
|||
T A8 02 2A 10 0B 54 5D D5 21 E2 0F 3A 1C 0B 0F 0F |
|||
R 00 00 06 00 00 03 06 00 00 09 06 00 00 0C 06 00 |
|||
T B6 02 16 00 5F 19 19 D1 CD 10 05 C9 |
|||
R 00 00 06 00 00 09 06 00 |
|||
T C0 02 |
|||
R 00 00 06 00 |
|||
T C0 02 21 E2 0F 3A 1C 0B 0F 0F 16 00 5F 19 19 22 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T CE 02 0E 0B 2A 0E 0B 54 5D 2A 10 0B CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T D9 02 10 05 C9 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T DC 02 |
|||
R 00 00 06 00 |
|||
T DC 02 2A 0C 0B 3A DE 0F BD C0 3A DF 0F BC C0 2A |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 0B 06 00 |
|||
T EA 02 04 0B 3A E0 0F BD C0 3A E1 0F BC C0 2A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T F7 02 12 0B 3A DD 0F BD C9 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T FE 02 |
|||
R 00 00 06 00 |
|||
T FE 02 F3 21 00 00 39 22 64 0A 31 63 0A CD 82 02 |
|||
R 00 00 06 00 00 08 06 00 00 0B 06 00 00 0E 06 00 |
|||
T 0C 03 CD 1A 03 CD A8 02 3A F7 0A |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 15 03 |
|||
R 00 00 06 00 |
|||
T 15 03 ED 7B 64 0A C9 |
|||
R 00 00 06 00 00 04 06 00 |
|||
T 1A 03 |
|||
R 00 00 06 00 |
|||
T 1A 03 3E 00 32 F7 0A CD DC 02 CA 65 03 3E 14 32 |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 00 0B 06 00 |
|||
T 28 03 FF 0A 3E 02 32 00 0B |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 |
|||
T 2F 03 |
|||
R 00 00 06 00 |
|||
T 2F 03 CD 1E 08 3A F6 0A E6 F8 47 3A F7 0A B0 CA |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 0C 06 00 |
|||
T 3D 03 65 03 3A FF 0A 3D 32 FF 0A C2 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
|||
T 47 03 2F 03 CD 61 09 3E 14 32 FF 0A 3A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T 52 03 00 0B 3D 32 00 0B C2 2F 03 21 FF FF 22 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 09 06 00 |
|||
T 5F 03 DE 0F 22 E0 0F C9 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 65 03 |
|||
R 00 00 06 00 |
|||
T 65 03 2A 0C 0B 22 DE 0F 2A 04 0B 22 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 6F 03 E0 0F 3A 12 0B 32 DD 0F C9 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 78 03 |
|||
R 00 00 06 00 |
|||
T 78 03 F3 21 00 00 39 22 64 0A 31 63 0A CD 16 05 |
|||
R 00 00 06 00 00 08 06 00 00 0B 06 00 00 0E 06 00 |
|||
T 86 03 CD 6A 05 D2 96 03 CD A8 02 ED 7B |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 91 03 64 0A 3E 00 C9 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 96 03 |
|||
R 00 00 06 00 |
|||
T 96 03 ED 7B 64 0A 3E FF C9 |
|||
R 00 00 06 00 00 04 06 00 |
|||
T 9D 03 |
|||
R 00 00 06 00 |
|||
T 9D 03 3E FF 32 FF 0A |
|||
R 00 00 06 00 00 05 06 00 |
|||
T A2 03 |
|||
R 00 00 06 00 |
|||
T A2 03 3E 10 32 17 0B F3 21 00 00 39 22 64 0A 31 |
|||
R 00 00 06 00 00 05 06 00 00 0D 06 00 |
|||
T B0 03 63 0A CD 16 05 CD DF 06 D2 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T B9 03 C5 03 CD A8 02 ED 7B 64 0A 3E 00 C9 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
|||
T C5 03 |
|||
R 00 00 06 00 |
|||
T C5 03 3A FF 0A 3D 32 FF 0A C2 A2 03 ED 7B |
|||
R 00 00 06 00 00 03 06 00 00 07 06 00 00 0A 06 00 |
|||
T D1 03 64 0A 3E FF C9 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T D6 03 |
|||
R 00 00 06 00 |
|||
T D6 03 C9 |
|||
R 00 00 06 00 |
|||
T D7 03 |
|||
R 00 00 06 00 |
|||
T D7 03 F3 3A 12 0B FE 01 CA 25 04 FE 00 CA FD 03 |
|||
R 00 00 06 00 00 04 06 00 00 09 06 00 00 0E 06 00 |
|||
T E5 03 FE 02 CA 66 04 FE 03 CA FD 03 FE 04 CA |
|||
R 00 00 06 00 00 05 06 00 00 0A 06 00 |
|||
T F2 03 BB 04 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T F4 03 |
|||
R 00 00 06 00 |
|||
T F4 03 21 8C 0A CD BC 04 3E 01 C9 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T FD 03 |
|||
R 00 00 06 00 |
|||
T FD 03 21 E2 0F 5D 54 2A 10 0B CD 10 05 CD |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 00 0B 06 00 |
|||
T 09 04 CB 04 CD D9 04 2A 0E 0B 5D 54 21 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 14 04 E2 0F CD 10 05 CD 04 05 3A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 1D 04 12 0B 32 DD 0F 3E 00 C9 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 25 04 |
|||
R 00 00 06 00 |
|||
T 25 04 F3 21 00 00 39 22 64 0A 31 63 0A CD 82 02 |
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R 00 00 06 00 00 08 06 00 00 0B 06 00 00 0E 06 00 |
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T 33 04 CD 1A 03 3A F7 0A C2 5E 04 |
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R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 3C 04 |
|||
R 00 00 06 00 |
|||
T 3C 04 CD C0 02 3E 14 32 FF 0A |
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R 00 00 06 00 00 03 06 00 00 08 06 00 |
|||
T 44 04 |
|||
R 00 00 06 00 |
|||
T 44 04 CD 26 08 3A F6 0A E6 F8 47 3A F7 0A B0 CA |
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R 00 00 06 00 00 03 06 00 00 06 06 00 00 0C 06 00 |
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T 52 04 5E 04 3A FF 0A 3D 32 FF 0A C2 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
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T 5C 04 44 04 |
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R 00 00 06 00 00 02 06 00 |
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T 5E 04 |
|||
R 00 00 06 00 |
|||
T 5E 04 ED 7B 64 0A 3A F7 0A C9 |
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R 00 00 06 00 00 04 06 00 00 07 06 00 |
|||
T 66 04 |
|||
R 00 00 06 00 |
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T 66 04 F3 21 00 00 39 22 64 0A 31 63 0A CD 16 05 |
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R 00 00 06 00 00 08 06 00 00 0B 06 00 00 0E 06 00 |
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T 74 04 CD 6A 05 D2 87 04 CD C0 02 CD |
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R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
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T 7E 04 9F 05 ED 7B 64 0A 3E 00 C9 |
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R 00 00 06 00 00 02 06 00 00 06 06 00 |
|||
T 87 04 |
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R 00 00 06 00 |
|||
T 87 04 ED 7B 64 0A 3E FF C9 |
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R 00 00 06 00 00 04 06 00 |
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T 8E 04 |
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R 00 00 06 00 |
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T 8E 04 3E 10 32 17 0B F3 21 00 00 39 22 64 0A 31 |
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R 00 00 06 00 00 05 06 00 00 0D 06 00 |
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T 9C 04 63 0A CD 16 05 CD DF 06 D2 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
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T A5 04 B4 04 CD C0 02 CD 3C 07 ED 7B |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
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T AF 04 64 0A 3E 00 C9 |
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R 00 00 06 00 00 02 06 00 |
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T B4 04 |
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R 00 00 06 00 |
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T B4 04 ED 7B 64 0A 3E FF C9 |
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R 00 00 06 00 00 04 06 00 |
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T BB 04 |
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R 00 00 06 00 |
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T BB 04 C9 |
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R 00 00 06 00 |
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T BC 04 |
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R 00 00 06 00 |
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T BC 04 7E FE FF CA CA 04 4F CD B1 01 23 C3 BC 04 |
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R 00 00 06 00 00 06 06 00 00 0A 06 00 00 0E 06 00 |
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T CA 04 |
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R 00 00 06 00 |
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T CA 04 C9 |
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R 00 00 06 00 |
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T CB 04 |
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R 00 00 06 00 |
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T CB 04 2A 0A 0B 29 29 29 29 29 29 29 22 0E 0B C9 |
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R 00 00 06 00 00 03 06 00 00 0D 06 00 |
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T D9 04 |
|||
R 00 00 06 00 |
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T D9 04 2A 02 0B 3A 12 0B FE 05 CA F3 04 FE 06 CA |
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R 00 00 06 00 00 03 06 00 00 06 06 00 00 0B 06 00 |
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T E7 04 F3 04 E6 01 0F B5 D3 78 32 08 0B C9 |
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R 00 00 06 00 00 02 06 00 00 0B 06 00 |
|||
T F3 04 |
|||
R 00 00 06 00 |
|||
T F3 04 3E 05 E6 01 0F B5 E6 7F D3 7C 32 08 0B 32 |
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R 00 00 06 00 00 0D 06 00 |
|||
T 01 05 09 0B C9 |
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R 00 00 06 00 00 02 06 00 |
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T 04 05 |
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R 00 00 06 00 |
|||
T 04 05 3E 80 D3 7C 3E 00 D3 78 32 08 0B C9 |
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R 00 00 06 00 00 0B 06 00 |
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T 10 05 |
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R 00 00 06 00 |
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T 10 05 01 80 00 ED B0 C9 |
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R 00 00 06 00 |
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T 16 05 |
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R 00 00 06 00 |
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T 16 05 3A 02 0B 67 3A 0A 0B 6F CD 61 05 CD |
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R 00 00 06 00 00 03 06 00 00 07 06 00 00 0B 06 00 |
|||
T 22 05 61 05 3A 03 0B CB 27 CB 27 CB 27 CB 27 CB |
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R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 30 05 27 CB 27 B4 67 3A 03 0B CB 3F CB 3F 32 |
|||
R 00 00 06 00 00 08 06 00 |
|||
T 3D 05 15 0B 7D 32 13 0B 7C 32 14 0B 3E 00 32 |
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R 00 00 06 00 00 02 06 00 00 06 06 00 00 0A 06 00 |
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T 4A 05 16 0B 2A 13 0B 22 0C 0B 2A |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
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T 53 05 15 0B 22 04 0B 3A 0A 0B E6 03 32 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 5E 05 1C 0B C9 |
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R 00 00 06 00 00 02 06 00 |
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T 61 05 |
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R 00 00 06 00 |
|||
T 61 05 37 3F 7C 1F 67 7D 1F 6F C9 |
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R 00 00 06 00 |
|||
T 6A 05 |
|||
R 00 00 06 00 |
|||
T 6A 05 CD DC 02 CA 8B 05 CD F3 05 D0 CD |
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R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 75 05 66 06 3E 20 D3 27 |
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R 00 00 06 00 00 02 06 00 |
|||
T 7B 05 |
|||
R 00 00 06 00 |
|||
T 7B 05 CD F3 05 D0 CD 0F 06 D0 CD 22 06 D0 CD |
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R 00 00 06 00 00 03 06 00 00 07 06 00 00 0B 06 00 |
|||
T 88 05 3C 06 37 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 8B 05 |
|||
R 00 00 06 00 |
|||
T 8B 05 2A 0C 0B 22 DE 0F 2A 04 0B 22 |
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R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 95 05 E0 0F 3A 12 0B 32 DD 0F 37 C9 |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 9F 05 |
|||
R 00 00 06 00 |
|||
T 9F 05 CD F3 05 D0 CD 66 06 3E 30 D3 27 CD F3 05 |
|||
R 00 00 06 00 00 03 06 00 00 07 06 00 00 0E 06 00 |
|||
T AD 05 D0 CD 0F 06 D0 CD 22 06 D0 CD 50 06 CD |
|||
R 00 00 06 00 00 04 06 00 00 08 06 00 00 0C 06 00 |
|||
T BA 05 F3 05 D0 CD 0F 06 D0 37 C9 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 |
|||
T C3 05 |
|||
R 00 00 06 00 |
|||
T C3 05 3E 06 D3 2E 3E 02 D3 2E CD F3 05 C9 |
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R 00 00 06 00 00 0B 06 00 |
|||
T CF 05 |
|||
R 00 00 06 00 |
|||
T CF 05 11 00 00 |
|||
R 00 00 06 00 |
|||
T D2 05 |
|||
R 00 00 06 00 |
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T D2 05 06 F0 |
|||
R 00 00 06 00 |
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T D4 05 |
|||
R 00 00 06 00 |
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T D4 05 10 FE 13 7A B3 28 08 DB 27 E6 80 20 F1 37 |
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R 00 00 06 00 |
|||
T E2 05 C9 |
|||
R 00 00 06 00 |
|||
T E3 05 |
|||
R 00 00 06 00 |
|||
T E3 05 AF C9 |
|||
R 00 00 06 00 |
|||
T E5 05 |
|||
R 00 00 06 00 |
|||
T E5 05 DB 27 E6 08 28 FA C9 |
|||
R 00 00 06 00 |
|||
T EC 05 |
|||
R 00 00 06 00 |
|||
T EC 05 DB 27 E6 08 20 FA C9 |
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R 00 00 06 00 |
|||
T F3 05 |
|||
R 00 00 06 00 |
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T F3 05 11 00 00 |
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R 00 00 06 00 |
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T F6 05 |
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R 00 00 06 00 |
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T F6 05 06 05 |
|||
R 00 00 06 00 |
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T F8 05 |
|||
R 00 00 06 00 |
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T F8 05 05 C2 F8 05 13 7A B3 CA 0D 06 DB 27 E6 C0 |
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R 00 00 06 00 00 04 06 00 00 0A 06 00 |
|||
T 06 06 EE 40 C2 F6 05 37 C9 |
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R 00 00 06 00 00 05 06 00 |
|||
T 0D 06 |
|||
R 00 00 06 00 |
|||
T 0D 06 AF C9 |
|||
R 00 00 06 00 |
|||
T 0F 06 |
|||
R 00 00 06 00 |
|||
T 0F 06 37 DB 27 47 E6 01 37 C8 78 E6 20 37 C2 |
|||
R 00 00 06 00 |
|||
T 1C 06 20 06 DB 21 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 20 06 |
|||
R 00 00 06 00 |
|||
T 20 06 B7 C9 |
|||
R 00 00 06 00 |
|||
T 22 06 |
|||
R 00 00 06 00 |
|||
T 22 06 11 00 00 |
|||
R 00 00 06 00 |
|||
T 25 06 |
|||
R 00 00 06 00 |
|||
T 25 06 06 05 |
|||
R 00 00 06 00 |
|||
T 27 06 |
|||
R 00 00 06 00 |
|||
T 27 06 05 C2 27 06 13 7A B3 CA 3A 06 DB 27 E6 08 |
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R 00 00 06 00 00 04 06 00 00 0A 06 00 |
|||
T 35 06 CA 25 06 37 C9 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 3A 06 |
|||
R 00 00 06 00 |
|||
T 3A 06 AF C9 |
|||
R 00 00 06 00 |
|||
T 3C 06 |
|||
R 00 00 06 00 |
|||
T 3C 06 E5 21 E2 0F 06 00 |
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R 00 00 06 00 00 04 06 00 |
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T 42 06 |
|||
R 00 00 06 00 |
|||
T 42 06 DB 20 77 DB 28 23 77 23 05 C2 42 06 E1 C9 |
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R 00 00 06 00 00 0C 06 00 |
|||
T 50 06 |
|||
R 00 00 06 00 |
|||
T 50 06 E5 21 E2 0F 06 00 |
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R 00 00 06 00 00 04 06 00 |
|||
T 56 06 |
|||
R 00 00 06 00 |
|||
T 56 06 23 7E 2B D3 28 7E D3 20 23 23 05 C2 56 06 |
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R 00 00 06 00 00 0E 06 00 |
|||
T 64 06 E1 C9 |
|||
R 00 00 06 00 |
|||
T 66 06 |
|||
R 00 00 06 00 |
|||
T 66 06 3A 13 0B 32 18 0B 3A 14 0B 32 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 70 06 19 0B 3A 15 0B 32 1A 0B 3A |
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R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 79 06 16 0B E6 0F C6 E0 32 1B 0B 3E 01 D3 22 3A |
|||
R 00 00 06 00 00 02 06 00 00 09 06 00 |
|||
T 87 06 18 0B D3 23 3A 19 0B D3 24 3A 1A 0B D3 25 |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0C 06 00 |
|||
T 95 06 3A 1B 0B E6 0F F6 E0 D3 26 C9 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 9F 06 |
|||
R 00 00 06 00 |
|||
T 9F 06 3E 0E D3 2E CD D7 09 3E 0A D3 2E CD CF 05 |
|||
R 00 00 06 00 00 07 06 00 00 0E 06 00 |
|||
T AD 06 D0 CD D7 06 CD D7 09 CD B8 06 C9 |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 00 0A 06 00 |
|||
T B8 06 |
|||
R 00 00 06 00 |
|||
T B8 06 21 80 0A CD 7D 07 CD CF 05 D0 06 00 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T C4 06 |
|||
R 00 00 06 00 |
|||
T C4 06 DB 20 DD 23 DB 28 DD 23 10 F6 ED 67 DB 27 |
|||
R 00 00 06 00 |
|||
T D2 06 E6 01 20 E2 C9 |
|||
R 00 00 06 00 |
|||
T D7 06 |
|||
R 00 00 06 00 |
|||
T D7 06 3A 17 0B F6 A0 D3 26 C9 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T DF 06 |
|||
R 00 00 06 00 |
|||
T DF 06 CD DC 02 CA 28 07 3A 13 0B 32 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T E9 06 6D 0A 3A 14 0B 32 6C 0A 3A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T F2 06 15 0B 32 6B 0A 3A 16 0B 32 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T FB 06 6A 0A CD B8 06 21 68 0A CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 04 07 7D 07 CD CF 05 D0 06 00 DD 21 E2 0F DB 27 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0C 06 00 |
|||
T 12 07 E6 08 FE 08 20 10 |
|||
R 00 00 06 00 |
|||
T 18 07 |
|||
R 00 00 06 00 |
|||
T 18 07 DB 20 DD 77 00 DD 23 DB 28 DD 77 00 DD 23 |
|||
R 00 00 06 00 |
|||
T 26 07 10 F0 |
|||
R 00 00 06 00 |
|||
T 28 07 |
|||
R 00 00 06 00 |
|||
T 28 07 2A 0C 0B 22 DE 0F 2A 04 0B 22 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 32 07 E0 0F 3A 12 0B 32 DD 0F 37 C9 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 3C 07 |
|||
R 00 00 06 00 |
|||
T 3C 07 3A 13 0B 32 79 0A 3A 14 0B 32 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 46 07 78 0A 3A 15 0B 32 77 0A 3A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 4F 07 16 0B 32 76 0A CD B8 06 21 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 58 07 74 0A CD 7D 07 CD CF 05 D0 06 00 DD 21 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 65 07 E2 0F |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 67 07 |
|||
R 00 00 06 00 |
|||
T 67 07 DB 27 DD 7E 00 F5 DD 23 DD 7E 00 D3 28 F1 |
|||
R 00 00 06 00 |
|||
T 75 07 D3 20 DD 23 10 EC 37 C9 |
|||
R 00 00 06 00 |
|||
T 7D 07 |
|||
R 00 00 06 00 |
|||
T 7D 07 CD CF 05 D0 CD EC 05 3E 0A D3 2E 3E 00 D3 |
|||
R 00 00 06 00 00 03 06 00 00 07 06 00 |
|||
T 8B 07 21 3E 00 D3 22 3E 00 D3 23 3E 00 D3 24 3E |
|||
R 00 00 06 00 |
|||
T 99 07 60 D3 25 3A 17 0B D3 26 3E A0 D3 27 CD |
|||
R 00 00 06 00 00 06 06 00 |
|||
T A6 07 E5 05 06 06 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T AA 07 |
|||
R 00 00 06 00 |
|||
T AA 07 7E 57 23 7E D3 28 7A D3 20 23 DB 2E 10 F2 |
|||
R 00 00 06 00 |
|||
T B8 07 CD CF 05 D0 DB 2E C9 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T BF 07 |
|||
R 00 00 06 00 |
|||
T BF 07 3E 02 F6 20 F6 40 F6 80 32 01 0B 3E 01 32 |
|||
R 00 00 06 00 00 0B 06 00 |
|||
T CD 07 EA 0A 3E 02 32 EC 0A 3E 09 87 32 ED 0A 3E |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0D 06 00 |
|||
T DB 07 7F 32 F2 0A 3E 05 32 F3 0A 3E 0D 32 EE 0A |
|||
R 00 00 06 00 00 04 06 00 00 09 06 00 00 0E 06 00 |
|||
T E9 07 CD E4 09 CD E4 09 CD E4 09 CD |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T F3 07 E4 09 CD E4 09 CD E4 09 21 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T FC 07 01 0B CB 8E CD 18 08 00 00 3E 00 32 04 0B |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0E 06 00 |
|||
T 0A 08 CD 24 09 00 00 21 01 0B CB CE CD 18 08 C9 |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 00 0D 06 00 |
|||
T 18 08 |
|||
R 00 00 06 00 |
|||
T 18 08 3A 01 0B D3 3A C9 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 1E 08 |
|||
R 00 00 06 00 |
|||
T 1E 08 3E 46 32 E9 0A C3 2E 08 |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 |
|||
T 26 08 |
|||
R 00 00 06 00 |
|||
T 26 08 3E 45 32 E9 0A C3 2E 08 |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 |
|||
T 2E 08 |
|||
R 00 00 06 00 |
|||
T 2E 08 21 01 0B CB CE CD 18 08 CD E4 09 FE FF CA |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 00 0B 06 00 |
|||
T 3C 08 75 08 3A EA 0A E6 03 47 3A EB 0A E6 01 17 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0B 06 00 |
|||
T 4A 08 17 B0 32 EA 0A 21 01 0B CB 8E CD 18 08 3E |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 00 0D 06 00 |
|||
T 58 08 03 CD C2 09 3A F2 0A CD C2 09 3A |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 00 0A 06 00 |
|||
T 63 08 F3 0A CD C2 09 CD 24 09 C2 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 6C 08 75 08 3A E9 0A B7 C3 A4 08 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
|||
T 75 08 |
|||
R 00 00 06 00 |
|||
T 75 08 21 01 0B CB CE CD 18 08 F6 FF C9 |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 |
|||
T 80 08 |
|||
R 00 00 06 00 |
|||
T 80 08 0E 07 21 F6 0A |
|||
R 00 00 06 00 00 05 06 00 |
|||
T 85 08 |
|||
R 00 00 06 00 |
|||
T 85 08 CD 30 0A 77 23 0D C2 85 08 3A F6 0A E6 F8 |
|||
R 00 00 06 00 00 03 06 00 00 09 06 00 00 0C 06 00 |
|||
T 93 08 47 3A F7 0A B0 |
|||
R 00 00 06 00 00 04 06 00 |
|||
T 98 08 |
|||
R 00 00 06 00 |
|||
T 98 08 CD E4 09 21 01 0B CB CE CD 18 08 C9 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 0B 06 00 |
|||
T A4 08 |
|||
R 00 00 06 00 |
|||
T A4 08 11 38 00 21 1E 09 01 03 00 3A E9 0A E6 01 |
|||
R 00 00 06 00 00 06 06 00 00 0C 06 00 |
|||
T B2 08 CA B6 08 09 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T B6 08 |
|||
R 00 00 06 00 |
|||
T B6 08 ED B0 21 E2 0F ED 5B EF 0A 43 0E 37 3A |
|||
R 00 00 06 00 00 05 06 00 00 09 06 00 |
|||
T C3 08 E9 0A CD C2 09 3A EA 0A CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T CC 08 C2 09 3A 04 0B CD C2 09 3A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T D5 08 EB 0A CD C2 09 3A 0C 0B 3C CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T DF 08 C2 09 3A EC 0A CD C2 09 3A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T E8 08 ED 0A CD C2 09 3A EE 0A CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T F1 08 C2 09 3A F1 0A CD AF 09 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T F9 08 |
|||
R 00 00 06 00 |
|||
T F9 08 |
|||
R 00 00 06 00 |
|||
T F9 08 FB 76 C2 F9 08 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T FE 08 |
|||
R 00 00 06 00 |
|||
T FE 08 FB 76 C2 FE 08 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T 03 09 |
|||
R 00 00 06 00 |
|||
T 03 09 21 01 0B CB C6 CD 18 08 00 00 CB 86 CD |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 |
|||
T 10 09 18 08 00 00 00 00 CB CE CD 18 08 C3 80 08 |
|||
R 00 00 06 00 00 02 06 00 00 0B 06 00 00 0E 06 00 |
|||
T 1E 09 ED A2 C9 |
|||
R 00 00 06 00 |
|||
T 21 09 |
|||
R 00 00 06 00 |
|||
T 21 09 ED A3 C9 |
|||
R 00 00 06 00 |
|||
T 24 09 |
|||
R 00 00 06 00 |
|||
T 24 09 |
|||
R 00 00 06 00 |
|||
T 24 09 3A 06 0B 4F 3A 04 0B B7 CA 4A 09 B9 CA |
|||
R 00 00 06 00 00 03 06 00 00 07 06 00 00 0B 06 00 |
|||
T 31 09 5A 09 32 06 0B 3E 0F CD C2 09 3A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T 3C 09 EA 0A CD C2 09 3A 04 0B CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 45 09 C2 09 C3 5A 09 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 4A 09 |
|||
R 00 00 06 00 |
|||
T 4A 09 3E 00 32 06 0B 3E 07 CD C2 09 3A EA 0A CD |
|||
R 00 00 06 00 00 05 06 00 00 0A 06 00 00 0D 06 00 |
|||
T 58 09 C2 09 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 5A 09 |
|||
R 00 00 06 00 |
|||
T 5A 09 CD F6 09 CD E4 09 C9 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T 61 09 |
|||
R 00 00 06 00 |
|||
T 61 09 F5 E5 CD E4 09 CD E4 09 CD E4 09 CD |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 00 0B 06 00 |
|||
T 6D 09 E4 09 CD E4 09 CD E4 09 21 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 76 09 01 0B CB 8E CD 18 08 00 00 CD 4A 09 CD |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0C 06 00 |
|||
T 83 09 F6 09 CD F6 09 CD F6 09 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 8C 09 F6 09 CD 4A 09 CD F6 09 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 95 09 F6 09 CD F6 09 CD F6 09 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 9E 09 24 09 CD F6 09 CD F6 09 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T A7 09 F6 09 CD F6 09 E1 F1 C9 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T AF 09 |
|||
R 00 00 06 00 |
|||
T AF 09 F5 |
|||
R 00 00 06 00 |
|||
T B0 09 |
|||
R 00 00 06 00 |
|||
T B0 09 DB 36 E6 80 CA B0 09 DB 36 E6 40 C4 06 0A |
|||
R 00 00 06 00 00 07 06 00 00 0E 06 00 |
|||
T BE 09 F1 D3 37 C9 |
|||
R 00 00 06 00 |
|||
T C2 09 |
|||
R 00 00 06 00 |
|||
T C2 09 F5 |
|||
R 00 00 06 00 |
|||
T C3 09 |
|||
R 00 00 06 00 |
|||
T C3 09 DB 36 E6 80 CA C3 09 DB 36 E6 40 C4 06 0A |
|||
R 00 00 06 00 00 07 06 00 00 0E 06 00 |
|||
T D1 09 F1 D3 37 C3 D7 09 |
|||
R 00 00 06 00 00 06 06 00 |
|||
T D7 09 |
|||
R 00 00 06 00 |
|||
T D7 09 DD E5 DD E1 DD E5 DD E1 |
|||
R 00 00 06 00 |
|||
T DF 09 |
|||
R 00 00 06 00 |
|||
T DF 09 DD E5 DD E1 C9 |
|||
R 00 00 06 00 |
|||
T E4 09 |
|||
R 00 00 06 00 |
|||
T E4 09 DB 36 E6 80 CA E4 09 DB 36 E6 40 C2 F5 09 |
|||
R 00 00 06 00 00 07 06 00 00 0E 06 00 |
|||
T F2 09 CD 12 0A |
|||
R 00 00 06 00 00 03 06 00 |
|||
T F5 09 |
|||
R 00 00 06 00 |
|||
T F5 09 C9 |
|||
R 00 00 06 00 |
|||
T F6 09 |
|||
R 00 00 06 00 |
|||
T F6 09 21 00 00 |
|||
R 00 00 06 00 |
|||
T F9 09 |
|||
R 00 00 06 00 |
|||
T F9 09 00 00 00 00 2D C2 F9 09 25 C2 F9 09 C9 |
|||
R 00 00 06 00 00 08 06 00 00 0C 06 00 |
|||
T 06 0A |
|||
R 00 00 06 00 |
|||
T 06 0A DB 37 DB 36 E6 80 CA 06 0A 3E FF C9 |
|||
R 00 00 06 00 00 09 06 00 |
|||
T 12 0A |
|||
R 00 00 06 00 |
|||
T 12 0A 3E 08 CD C2 09 CD 30 0A 32 FD 0A E6 C0 FE |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 00 0B 06 00 |
|||
T 20 0A 80 CA 2F 0A CD 30 0A 32 FE 0A 3A |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 00 0A 06 00 |
|||
T 2B 0A FD 0A E6 C0 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 2F 0A |
|||
R 00 00 06 00 |
|||
T 2F 0A C9 |
|||
R 00 00 06 00 |
|||
T 30 0A |
|||
R 00 00 06 00 |
|||
T 30 0A DB 36 E6 80 CA 30 0A DB 36 E6 40 CC 06 0A |
|||
R 00 00 06 00 00 07 06 00 00 0E 06 00 |
|||
T 3E 0A DB 37 C3 D7 09 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T 4C 0A 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T 5A 0A 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T 68 0A |
|||
R 00 00 06 00 |
|||
T 68 0A A8 00 00 00 00 01 00 00 00 01 00 00 |
|||
R 00 00 06 00 |
|||
T 74 0A |
|||
R 00 00 06 00 |
|||
T 74 0A 2A 00 00 00 00 11 00 00 01 00 00 00 |
|||
R 00 00 06 00 |
|||
T 80 0A |
|||
R 00 00 06 00 |
|||
T 80 0A 03 00 00 00 11 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T 8C 0A |
|||
R 00 00 06 00 |
|||
T 8C 0A 0D 0A 45 52 52 4F 52 3A 20 57 52 49 54 45 |
|||
R 00 00 06 00 |
|||
T 9A 0A 20 54 4F 20 52 45 41 44 20 4F 4E 4C 59 20 |
|||
R 00 00 06 00 |
|||
T A8 0A 44 49 53 4B FF |
|||
R 00 00 06 00 |
|||
T AD 0A |
|||
R 00 00 06 00 |
|||
T AD 0A 0D 0A 43 50 2F 4D 2D 38 30 20 32 2E 32 43 |
|||
R 00 00 06 00 |
|||
T BB 0A 20 28 4A 43 30 37 30 35 2D 31 29 20 66 6F |
|||
R 00 00 06 00 |
|||
T C9 0A 72 20 4E 38 56 45 4D 20 2D 20 57 2F 49 44 |
|||
R 00 00 06 00 |
|||
T D7 0A 45 20 46 4C 4F 50 50 59 20 31 2E 34 34 4D |
|||
R 00 00 06 00 |
|||
T E5 0A 20 0D 0A FF 00 00 00 02 09 1B 00 02 FF 7F |
|||
R 00 00 06 00 |
|||
T F3 0A 05 04 20 00 00 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T 01 0B 00 00 00 00 00 00 00 01 FF 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T 0E 0B 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T 1C 0B 01 |
|||
R 00 00 06 00 |
|||
T 1D 0B |
|||
R 00 00 06 00 |
|||
T 1D 0B |
|||
R 00 00 06 00 |
|||
T 9D 0B |
|||
R 00 00 06 00 |
|||
T DE 0B |
|||
R 00 00 06 00 |
|||
T FF 0B |
|||
R 00 00 06 00 |
|||
T FF 0C |
|||
R 00 00 06 00 |
|||
T FF 0D |
|||
R 00 00 06 00 |
|||
T 40 0E |
|||
R 00 00 06 00 |
|||
T 81 0E |
|||
R 00 00 06 00 |
|||
T C2 0E |
|||
R 00 00 06 00 |
|||
T 49 0F |
|||
R 00 00 06 00 |
|||
T 4E 0F |
|||
R 00 00 06 00 |
|||
T 4E 0F |
|||
R 00 00 06 00 |
|||
T 4E 0F |
|||
R 00 00 06 00 |
|||
T CE 0F |
|||
R 00 00 06 00 |
|||
T CE 0F |
|||
R 00 00 06 00 |
|||
T CE 0F |
|||
R 00 00 06 00 |
|||
T CE 0F |
|||
R 00 00 06 00 |
|||
T DD 0F |
|||
R 00 00 06 00 |
|||
T DE 0F 01 00 02 00 |
|||
R 00 00 06 00 |
|||
T E2 0F |
|||
R 00 00 06 00 |
|||
T EA 11 |
|||
R 00 00 06 00 |
|||
T EA 11 |
|||
R 00 00 06 00 |
|||
T EA 11 00 |
|||
R 00 00 06 00 |
|||
T EB 11 |
|||
R 00 00 06 00 |
|||
File diff suppressed because it is too large
@ -1,137 +0,0 @@ |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 1. |
|||
cbios.s derived from cbios.asm |
|||
Symbol Table |
|||
|
|||
.__.ABS.= 0000 G | 6 AL0_0 00AC R | 6 AL0_1 00BB R |
|||
6 AL0_2 00CA R | 6 AL0_3 00D9 R | 6 AL0_4 00E8 R |
|||
6 AL0_5 00F7 R | 6 AL0_6 0106 R | 6 AL0_7 0115 R |
|||
6 AL1_0 00AD R | 6 AL1_1 00BC R | 6 AL1_2 00CB R |
|||
6 AL1_3 00DA R | 6 AL1_4 00E9 R | 6 AL1_5 00F8 R |
|||
6 AL1_6 0107 R | 6 AL1_7 0116 R | 6 ALL00 0B9D R |
|||
6 ALL01 0BDE R | 6 ALL02 0BFF R | 6 ALL03 0CFF R |
|||
6 ALL04 0DFF R | 6 ALL05 0E40 R | 6 ALL06 0E81 R |
|||
6 ALL07 0EC2 R | 6 ATAPI_DE 06D7 R | 6 ATAPI_DL 05D4 R |
|||
6 ATAPI_RE 0728 R | 6 ATAPI_RE 0718 R | 6 ATAPI_RE 06DF R |
|||
6 ATAPI_RE 0A80 R | 6 ATAPI_SE 077D R | 6 ATAPI_SE 07AA R |
|||
6 ATAPI_SO 069F R | 6 ATAPI_TO 05E3 R | 6 ATAPI_WA 05CF R |
|||
6 ATAPI_WB 05D2 R | 6 ATAPI_WR 0767 R | 6 ATAPI_WR 073C R |
|||
BDOS = D806 | 6 BEGDAT 0B1D R | BIAS = 9C00 |
|||
BIOS = E600 | 6 BLKSEC 02C0 R | 6 BLM_0 00A6 R |
|||
6 BLM_1 00B5 R | 6 BLM_2 00C4 R | 6 BLM_3 00D3 R |
|||
6 BLM_4 00E2 R | 6 BLM_5 00F1 R | 6 BLM_6 0100 R |
|||
6 BLM_7 010F R | 6 BOOT 011B R | 6 BSH_0 00A5 R |
|||
6 BSH_1 00B4 R | 6 BSH_2 00C3 R | 6 BSH_3 00D2 R |
|||
6 BSH_4 00E1 R | 6 BSH_5 00F0 R | 6 BSH_6 00FF R |
|||
6 BSH_7 010E R | CCP = D000 | CCPSIZ_C= 0800 |
|||
CDISK = 0004 | CHARIN = 011B | 6 CHECKINT 09E4 R |
|||
6 CHECKINT 09F5 R | 6 CHK00 0F49 R | 6 CHK01 0F4E R |
|||
6 CHK02 0F4E R | 6 CHK03 0F4E R | 6 CHK04 0FCE R |
|||
6 CHK05 0FCE R | 6 CHK06 0FCE R | 6 CHK07 0FCE R |
|||
6 CKS_0 00AE R | 6 CKS_1 00BD R | 6 CKS_2 00CC R |
|||
6 CKS_3 00DB R | 6 CKS_4 00EA R | 6 CKS_5 00F9 R |
|||
6 CKS_6 0108 R | 6 CKS_7 0117 R | 6 CMD 0AE9 R |
|||
COND144F= 0001 | CONDABON= 0001 | CONDIDES= 0001 |
|||
CONDSHOR= 0001 | CONDSUPE= 0001 | CONDUSEA= 0000 |
|||
CONDUSED= 0000 | CONDUSEF= 0001 | CONDUSEV= 0000 |
|||
6 CONIN 01A6 R | 6 CONOUT 01B1 R | 6 CONST 019C R |
|||
6 CONVERT_ 0516 R | 6 COPY_CPM 0510 R | CR = 000D |
|||
6 CUDISK 0FDD R | 6 CUSECTOR 0FDE R | 6 CUTRACK 0FE0 R |
|||
6 CYCLEFLO 0961 R | DATSIZ = 06CD | 6 DB_PAGER 0B09 R |
|||
6 DEBSEC 02A8 R | 6 DELAY12 09DF R | 6 DELAY24 09D7 R |
|||
6 DELAYHSE 09F6 R | 6 DELDM 09F9 R | 6 DENS 0AEC R |
|||
6 DIRBF 0B1D R | 6 DISKNO 0B12 R | 6 DMAAD 0B10 R |
|||
6 DOSO4 08A4 R | 6 DPBASE 0033 R | 6 DPBLK0 00A3 R |
|||
6 DPBLK1 00B2 R | 6 DPBLK2 00C1 R | 6 DPBLK3 00D0 R |
|||
6 DPBLK4 00DF R | 6 DPBLK5 00EE R | 6 DPBLK6 00FD R |
|||
6 DPBLK7 010C R | 6 DRM_0 00AA R | 6 DRM_1 00B9 R |
|||
6 DRM_2 00C8 R | 6 DRM_3 00D7 R | 6 DRM_4 00E6 R |
|||
6 DRM_5 00F5 R | 6 DRM_6 0104 R | 6 DRM_7 0113 R |
|||
6 DSKEXIT 0875 R | 6 DSKOP 082E R | 6 DSKOPEND 0903 R |
|||
6 DSM_0 00A8 R | 6 DSM_1 00B7 R | 6 DSM_2 00C6 R |
|||
6 DSM_3 00D5 R | 6 DSM_4 00E4 R | 6 DSM_5 00F3 R |
|||
6 DSM_6 0102 R | 6 DSM_7 0111 R | 6 DSTEMP 11EA R |
|||
6 DTL 0AF1 R | END = 00FF | 6 ENDDAT 11EA R |
|||
6 ENDSENDI 0A2F R | 6 EOTSEC 0AED R | 6 ERRORT 0A06 R |
|||
6 EXM_0 00A7 R | 6 EXM_1 00B6 R | 6 EXM_2 00C5 R |
|||
6 EXM_3 00D4 R | 6 EXM_4 00E3 R | 6 EXM_5 00F2 R |
|||
6 EXM_6 0101 R | 6 EXM_7 0110 R | FALSE = 0000 |
|||
FDATA = 0037 | 6 FDC_RW_P 08F9 R | 6 FDC_RW_P 08FE R |
|||
FDDENSIT= 0040 | FDMA = 003C | FDREADY = 0080 |
|||
FLATCH = 003A | 6 FLATCH_S 0B01 R | 6 FLOPPYRE 081E R |
|||
6 FLOPPYST 0A63 R | 6 FLOPPYWR 0826 R | FMSR = 0036 |
|||
6 FSECSIZ 0AEF R | 6 FTRACK 0B06 R | 6 GAP 0AEE R |
|||
GET_KEY = 039C | 6 GFDATA 0A30 R | 6 GOCPM 0167 R |
|||
6 HEAD 0AEB R | 6 HLT 0AF3 R | 6 HOME 01DA R |
|||
IDEADDR = 002F | 6 IDEBUFRD 0642 R | 6 IDEBUFWT 0656 R |
|||
IDECTRL = 002E | IDECYLHI= 0025 | IDECYLLO= 0024 |
|||
6 IDEDEVIC 0B17 R | IDEERR = 0021 | IDEHEAD = 0026 |
|||
IDEHI = 0028 | IDELO = 0020 | IDESECTC= 0022 |
|||
IDESECTN= 0023 | IDESTTS = 0027 | 6 IDE_BLP 0627 R |
|||
6 IDE_DLP 05F8 R | 6 IDE_ERR 0620 R | 6 IDE_LBA0 0B18 R |
|||
6 IDE_LBA1 0B19 R | 6 IDE_LBA2 0B1A R | 6 IDE_LBA3 0B1B R |
|||
6 IDE_READ 063C R | 6 IDE_READ 056A R | 6 IDE_READ 058B R |
|||
6 IDE_SETU 0666 R | 6 IDE_SOFT 05C3 R | 6 IDE_SREX 057B R |
|||
6 IDE_TEST 060F R | 6 IDE_TO 060D R | 6 IDE_TO2 063A R |
|||
6 IDE_WAIT 0622 R | 6 IDE_WAIT 05F3 R | 6 IDE_WAIT 05E5 R |
|||
6 IDE_WAIT 05EC R | 6 IDE_WBSY 05F6 R | 6 IDE_WDRQ 0625 R |
|||
6 IDE_WRIT 0650 R | 6 IDE_WRIT 059F R | INT_LOC = 0038 |
|||
6 INT_RD 091E R | 6 INT_WR 0921 R | IOBYTE = 0003 |
|||
6 IRTEMP 0921 R | 6 ISCUR 02DC R | IS_KBHIT= 0395 |
|||
6 IS_READ 08B6 R | 6 IWTEMP 0924 R | 6 LASTBYTE 11EA R |
|||
6 LBA_TARG 0B15 R | 6 LBA_TARG 0B13 R | LF = 000A |
|||
6 LIST 01BC R | 6 LISTST 01BE R | L_INT_RD= 0003 |
|||
L_INT_WR= 0003 | 6 MIN 0AF4 R | MINI = 0004 |
|||
MOTOR = 0000 | MOVSIZ_C= 2BFF | MPCL_RAM= 0078 |
|||
MPCL_ROM= 007C | MSIZE = 003B | 6 NOT_READ 01A5 R |
|||
6 OFF_0 00B0 R | 6 OFF_1 00BF R | 6 OFF_2 00CE R |
|||
6 OFF_3 00DD R | 6 OFF_4 00EC R | 6 OFF_5 00FB R |
|||
6 OFF_6 010A R | 6 OFF_7 0119 R | 6 OUTFLATC 0818 R |
|||
6 PAGER 0B08 R | 6 PAGERB 04D9 R | 6 PARKSTAC 0A64 R |
|||
6 PFD1 09C3 R | 6 PFDATA 09C2 R | 6 PFDATAS 09AF R |
|||
6 PFDS1 09B0 R | PIOCONT = 0063 | PORTA = 0060 |
|||
PORTB = 0061 | PORTC = 0062 | 6 PRE 0AF5 R |
|||
PRECOMP = 0020 | 6 PRTMSG 04BC R | 6 PRTMSG1 04CA R |
|||
PR_OUTCH= 0CD6 | 6 PSECTOR 0B0C R | 6 PTRACK 0B04 R |
|||
6 PUNCH 01C0 R | RAMTARG_= D000 | 6 RDD_POLL 08F9 R |
|||
6 RDONLY 03F4 R | 6 READ 01F2 R | 6 READER 01C2 R |
|||
6 READ_ATA 039D R | 6 READ_ATA 03C5 R | 6 READ_ATA 03A2 R |
|||
6 READ_DIS 0A68 R | 6 READ_EEP 0214 R | 6 READ_FLP 02FE R |
|||
6 READ_FLP 0315 R | 6 READ_FLP 031A R | 6 READ_FLP 0365 R |
|||
6 READ_FLP 032F R | 6 READ_HDP 03D6 R | 6 READ_IDE 0378 R |
|||
6 READ_IDE 0396 R | 6 READ_RAM 025A R | 6 RECAL 094A R |
|||
6 REQUEST_ 06B8 R | 6 REQUEST_ 06C4 R | RESETL = 0002 |
|||
6 RESULT 0880 R | 6 RETRY 0AFF R | 6 RETRY1 0B00 R |
|||
6 ROMD 04F3 R | ROMSTART= 0A00 | 6 RPAGE 0504 R |
|||
6 RRA16 0561 R | 6 RS3 0885 R | 6 RSTEXIT 0898 R |
|||
6 SCYL 0AF9 R | 6 SECPAGE 04CB R | 6 SECST 0B0E R |
|||
6 SECTOR 0B0A R | 6 SECTOR_B 0FE2 R | 6 SECTOR_I 0B1C R |
|||
6 SECTRN 01E9 R | 6 SELDSK 01C4 R | 6 SENDINT 0A12 R |
|||
6 SETDMA 01EC R | 6 SETSEC 01E3 R | 6 SETTRACK 0924 R |
|||
6 SETTRK 01DD R | 6 SETUPDRI 07BF R | 6 SHEAD 0AFA R |
|||
6 SNBIT 0AFC R | 6 SPT_0 00A3 R | 6 SPT_1 00B2 R |
|||
6 SPT_2 00C1 R | 6 SPT_3 00D0 R | 6 SPT_4 00DF R |
|||
6 SPT_5 00EE R | 6 SPT_6 00FD R | 6 SPT_7 010C R |
|||
6 SREC 0AFB R | 6 SRTHUT 0AF2 R | 6 ST0 0AF6 R |
|||
6 ST0A 0AFD R | 6 ST1 0AF7 R | 6 ST1A 0AFE R |
|||
6 ST2 0AF8 R | TERMCN = 0001 | 6 TRACK 0B02 R |
|||
6 TRFLSEC 0282 R | TRUE = 0001 | 6 TXT_RO_E 0A8C R |
|||
6 TXT_STAR 0AAD R | UART = 0068 | 6 UNIT 0AEA R |
|||
VDU_INIT= 0100 | 6 WAINT 095A R | 6 WBOOT 0146 R |
|||
6 WBOOTE 0003 R | 6 WRITE 03D7 R | 6 WRITE_AT 048E R |
|||
6 WRITE_AT 04B4 R | 6 WRITE_DI 0A74 R | 6 WRITE_FL 0425 R |
|||
6 WRITE_FL 045E R | 6 WRITE_FL 0444 R | 6 WRITE_HD 04BB R |
|||
6 WRITE_ID 0466 R | 6 WRITE_ID 0487 R | 6 WRITE_RA 03FD R |
|||
6 WRITE_RE 043C R | 6 _cbios 0000 GR | 6 _cbios_e 11EB GR |
|||
6 _cbios_s 0000 GR |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 2. |
|||
cbios.s derived from cbios.asm |
|||
Area Table |
|||
|
|||
0 _CODE size 0 flags 0 |
|||
1 _DATA size 0 flags 0 |
|||
2 _OVERLAY size 0 flags 0 |
|||
3 _HOME size 0 flags 0 |
|||
4 _GSINIT size 0 flags 0 |
|||
5 _GSFINAL size 0 flags 0 |
|||
6 _CBIOS size 11EB flags 0 |
|||
7 _CABS size 0 flags 0 |
|||
@ -1,6 +0,0 @@ |
|||
-mjx |
|||
-i cbioshc.ihx |
|||
-k /usr/local/share/sdcc/lib/z80 |
|||
-l z80 |
|||
cbioshc.rel |
|||
-e |
|||
File diff suppressed because it is too large
@ -1,526 +0,0 @@ |
|||
XL |
|||
H 8 areas 4 global symbols |
|||
M cbioshc |
|||
O -mz80 |
|||
S .__.ABS. Def0000 |
|||
A _CODE size 0 flags 0 addr 0 |
|||
A _DATA size 0 flags 0 addr 0 |
|||
A _OVERLAY size 0 flags 0 addr 0 |
|||
A _HOME size 0 flags 0 addr 0 |
|||
A _GSINIT size 0 flags 0 addr 0 |
|||
A _GSFINAL size 0 flags 0 addr 0 |
|||
A _CBIOS size CF5 flags 0 addr 0 |
|||
S _cbioshc_start Def0000 |
|||
S _cbioshc_end Def0CF5 |
|||
S _cbioshc Def0000 |
|||
A _CABS size 0 flags 0 addr 0 |
|||
T 00 00 |
|||
R 00 00 06 00 |
|||
T 00 00 |
|||
R 00 00 06 00 |
|||
T 00 00 C3 DD 00 C3 F5 00 C3 2F 01 C3 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 0A 00 41 01 C3 53 01 C3 65 01 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 13 00 6B 01 C3 6E 01 C3 C6 01 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 1C 00 AF 01 C3 C9 01 C3 CF 01 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 25 00 D8 01 C3 DE 01 C3 02 02 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 2E 00 68 01 C3 D5 01 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 33 00 |
|||
R 00 00 06 00 |
|||
T 33 00 00 00 00 00 00 00 00 00 7C 07 83 00 9E 0A |
|||
R 00 00 06 00 00 0A 06 00 00 0C 06 00 00 0E 06 00 |
|||
T 41 00 FC 07 00 00 00 00 00 00 00 00 7C 07 CE 00 |
|||
R 00 00 06 00 00 02 06 00 00 0C 06 00 00 0E 06 00 |
|||
T 4F 00 9E 0A 5E 0A 00 00 00 00 00 00 00 00 7C 07 |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 0E 06 00 |
|||
T 5D 00 A1 00 9E 0A 20 08 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 6B 00 7C 07 B0 00 9E 0A |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 71 00 1F 09 00 00 00 00 00 00 00 00 7C 07 BF 00 |
|||
R 00 00 06 00 00 02 06 00 00 0C 06 00 00 0E 06 00 |
|||
T 7F 00 9E 0A 1E 0A |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 |
|||
T 83 00 |
|||
R 00 00 06 00 |
|||
T 83 00 00 01 04 0F 01 DF 00 FF 00 F0 00 00 00 |
|||
R 00 00 06 00 |
|||
T 90 00 02 00 |
|||
R 00 00 06 00 |
|||
T 92 00 |
|||
R 00 00 06 00 |
|||
T 92 00 10 00 03 07 00 1F 00 1F 00 80 00 00 00 |
|||
R 00 00 06 00 |
|||
T 9F 00 05 00 |
|||
R 00 00 06 00 |
|||
T A1 00 |
|||
R 00 00 06 00 |
|||
T A1 00 00 01 05 1F 01 F7 07 FF 01 F0 00 00 00 |
|||
R 00 00 06 00 |
|||
T AE 00 01 00 |
|||
R 00 00 06 00 |
|||
T B0 00 |
|||
R 00 00 06 00 |
|||
T B0 00 00 01 05 1F 01 F7 07 FF 01 F0 00 00 00 |
|||
R 00 00 06 00 |
|||
T BD 00 01 00 |
|||
R 00 00 06 00 |
|||
T BF 00 |
|||
R 00 00 06 00 |
|||
T BF 00 00 01 04 0F 00 F1 01 FF 00 F0 00 00 00 |
|||
R 00 00 06 00 |
|||
T CC 00 01 00 |
|||
R 00 00 06 00 |
|||
T CE 00 |
|||
R 00 00 06 00 |
|||
T CE 00 00 01 04 0F 00 EF 01 FF 00 F0 00 00 00 |
|||
R 00 00 06 00 |
|||
T DB 00 01 00 |
|||
R 00 00 06 00 |
|||
T DD 00 |
|||
R 00 00 06 00 |
|||
T DD 00 F3 3E 80 D3 94 3E 01 32 04 00 3E 94 32 |
|||
R 00 00 06 00 |
|||
T EA 00 03 00 21 30 05 CD 89 03 C3 0E 01 |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 00 0B 06 00 |
|||
T F5 00 |
|||
R 00 00 06 00 |
|||
T F5 00 F3 31 80 00 AF D3 94 AF D3 96 21 00 09 11 |
|||
R 00 00 06 00 |
|||
T 03 01 00 D4 01 FF 15 ED B0 3E 80 D3 94 |
|||
R 00 00 06 00 |
|||
T 0E 01 |
|||
R 00 00 06 00 |
|||
T 0E 01 3E C3 32 00 00 21 03 00 22 01 00 32 05 00 |
|||
R 00 00 06 00 00 08 06 00 |
|||
T 1C 01 21 06 DC 22 06 00 01 80 00 CD D8 01 3A |
|||
R 00 00 06 00 00 0C 06 00 |
|||
T 29 01 04 00 4F C3 00 D4 |
|||
R 00 00 06 00 |
|||
T 2F 01 |
|||
R 00 00 06 00 |
|||
T 2F 01 3A 03 00 E6 03 FE 00 CA 91 01 FE 01 CA |
|||
R 00 00 06 00 00 0A 06 00 |
|||
T 3C 01 A9 01 C3 76 01 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 41 01 |
|||
R 00 00 06 00 |
|||
T 41 01 3A 03 00 E6 03 FE 00 CA 79 01 FE 01 CA |
|||
R 00 00 06 00 00 0A 06 00 |
|||
T 4E 01 A3 01 C3 71 01 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 53 01 |
|||
R 00 00 06 00 |
|||
T 53 01 3A 03 00 E6 03 FE 00 CA 85 01 FE 01 CA |
|||
R 00 00 06 00 00 0A 06 00 |
|||
T 60 01 A6 01 C3 74 01 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 65 01 |
|||
R 00 00 06 00 |
|||
T 65 01 C3 74 01 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 68 01 |
|||
R 00 00 06 00 |
|||
T 68 01 C3 76 01 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 6B 01 |
|||
R 00 00 06 00 |
|||
T 6B 01 C3 74 01 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 6E 01 |
|||
R 00 00 06 00 |
|||
T 6E 01 C3 71 01 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 71 01 |
|||
R 00 00 06 00 |
|||
T 71 01 3E 1A C9 |
|||
R 00 00 06 00 |
|||
T 74 01 |
|||
R 00 00 06 00 |
|||
T 74 01 79 C9 |
|||
R 00 00 06 00 |
|||
T 76 01 |
|||
R 00 00 06 00 |
|||
T 76 01 3E 01 C9 |
|||
R 00 00 06 00 |
|||
T 79 01 |
|||
R 00 00 06 00 |
|||
T 79 01 CD 91 01 FE 00 CA 79 01 ED 38 48 C9 |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 |
|||
T 85 01 |
|||
R 00 00 06 00 |
|||
T 85 01 CD 9A 01 A7 CA 85 01 79 ED 39 46 C9 |
|||
R 00 00 06 00 00 03 06 00 00 07 06 00 |
|||
T 91 01 |
|||
R 00 00 06 00 |
|||
T 91 01 ED 38 44 E6 80 C8 3E FF C9 |
|||
R 00 00 06 00 |
|||
T 9A 01 |
|||
R 00 00 06 00 |
|||
T 9A 01 ED 38 44 E6 02 C8 3E FF C9 |
|||
R 00 00 06 00 |
|||
T A3 01 |
|||
R 00 00 06 00 |
|||
T A3 01 C3 71 01 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T A6 01 |
|||
R 00 00 06 00 |
|||
T A6 01 C3 74 01 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T A9 01 |
|||
R 00 00 06 00 |
|||
T A9 01 C3 76 01 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T AC 01 |
|||
R 00 00 06 00 |
|||
T AC 01 C3 76 01 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T AF 01 |
|||
R 00 00 06 00 |
|||
T AF 01 21 00 00 79 FE 04 D0 79 32 68 05 6F 26 00 |
|||
R 00 00 06 00 00 0B 06 00 |
|||
T BD 01 29 29 29 29 11 33 00 19 C9 |
|||
R 00 00 06 00 00 07 06 00 |
|||
T C6 01 |
|||
R 00 00 06 00 |
|||
T C6 01 01 00 00 |
|||
R 00 00 06 00 |
|||
T C9 01 |
|||
R 00 00 06 00 |
|||
T C9 01 60 69 22 62 05 C9 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T CF 01 |
|||
R 00 00 06 00 |
|||
T CF 01 60 69 22 64 05 C9 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T D5 01 |
|||
R 00 00 06 00 |
|||
T D5 01 60 69 C9 |
|||
R 00 00 06 00 |
|||
T D8 01 |
|||
R 00 00 06 00 |
|||
T D8 01 69 60 22 66 05 C9 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T DE 01 |
|||
R 00 00 06 00 |
|||
T DE 01 3A 68 05 FE 00 CA 2F 02 FE 01 CA 5F 02 FE |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 00 0D 06 00 |
|||
T EC 01 02 CA B6 02 FE 03 CA C5 02 FE 04 CA D4 02 |
|||
R 00 00 06 00 00 04 06 00 00 09 06 00 00 0E 06 00 |
|||
T FA 01 FE 05 CA D4 02 3E 01 C9 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T 02 02 |
|||
R 00 00 06 00 |
|||
T 02 02 3A 68 05 FE 00 CA 86 02 FE 01 CA 26 02 FE |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 00 0D 06 00 |
|||
T 10 02 02 CA 1C 03 FE 03 CA 2B 03 FE 04 CA 3A 03 |
|||
R 00 00 06 00 00 04 06 00 00 09 06 00 00 0E 06 00 |
|||
T 1E 02 FE 05 CA 3A 03 3E 01 C9 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T 26 02 |
|||
R 00 00 06 00 |
|||
T 26 02 21 0F 05 CD 89 03 3E 01 C9 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T 2F 02 |
|||
R 00 00 06 00 |
|||
T 2F 02 F3 CD 98 03 2A 62 05 29 29 29 7D ED 39 79 |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 |
|||
T 3D 02 21 7C 05 54 5D 2A 6D 05 01 80 00 ED B0 3E |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 |
|||
T 4B 02 00 ED 39 79 2A 66 05 5D 54 21 7C 05 01 |
|||
R 00 00 06 00 00 07 06 00 00 0C 06 00 |
|||
T 58 02 80 00 ED B0 3E 00 C9 |
|||
R 00 00 06 00 |
|||
T 5F 02 |
|||
R 00 00 06 00 |
|||
T 5F 02 F3 CD 98 03 CD A6 03 21 7C 05 54 5D 2A |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 00 0A 06 00 |
|||
T 6C 02 6D 05 01 80 00 ED B0 CD B9 03 2A 66 05 5D |
|||
R 00 00 06 00 00 02 06 00 00 0A 06 00 00 0D 06 00 |
|||
T 7A 02 54 21 7C 05 01 80 00 ED B0 3E 00 C9 |
|||
R 00 00 06 00 00 04 06 00 |
|||
T 86 02 |
|||
R 00 00 06 00 |
|||
T 86 02 21 7C 05 54 5D 2A 66 05 01 80 00 ED B0 F3 |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 |
|||
T 94 02 CD 98 03 2A 62 05 29 29 29 7D ED 39 79 2A |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T A2 02 6D 05 54 5D 21 7C 05 01 80 00 ED B0 3E 00 |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 |
|||
T B0 02 ED 39 79 3E 00 C9 |
|||
R 00 00 06 00 |
|||
T B6 02 |
|||
R 00 00 06 00 |
|||
T B6 02 21 01 00 22 6F 05 21 00 00 22 71 05 C3 |
|||
R 00 00 06 00 00 06 06 00 00 0C 06 00 |
|||
T C3 02 D5 02 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T C5 02 |
|||
R 00 00 06 00 |
|||
T C5 02 21 01 40 22 6F 05 21 00 00 22 71 05 C3 |
|||
R 00 00 06 00 00 06 06 00 00 0C 06 00 |
|||
T D2 02 D5 02 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T D4 02 |
|||
R 00 00 06 00 |
|||
T D4 02 |
|||
R 00 00 06 00 |
|||
T D4 02 C9 |
|||
R 00 00 06 00 |
|||
T D5 02 |
|||
R 00 00 06 00 |
|||
T D5 02 2A 62 05 45 2A 64 05 60 CD C4 03 3A |
|||
R 00 00 06 00 00 03 06 00 00 07 06 00 00 0B 06 00 |
|||
T E1 02 73 05 32 77 05 3A 74 05 32 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T EA 02 78 05 3A 75 05 32 79 05 3A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T F3 02 76 05 E6 0F C6 E0 32 7A 05 CD FC 03 21 |
|||
R 00 00 06 00 00 02 06 00 00 09 06 00 00 0C 06 00 |
|||
T 00 03 7C 05 3A 7B 05 CB 0F CB 0F 16 00 5F 19 19 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 0E 03 54 5D 2A 66 05 EB 01 80 00 ED B0 3E 00 C9 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T 1C 03 |
|||
R 00 00 06 00 |
|||
T 1C 03 21 01 00 22 6F 05 21 00 00 22 71 05 C3 |
|||
R 00 00 06 00 00 06 06 00 00 0C 06 00 |
|||
T 29 03 3B 03 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 2B 03 |
|||
R 00 00 06 00 |
|||
T 2B 03 21 01 40 22 6F 05 21 00 00 22 71 05 C3 |
|||
R 00 00 06 00 00 06 06 00 00 0C 06 00 |
|||
T 38 03 3B 03 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 3A 03 |
|||
R 00 00 06 00 |
|||
T 3A 03 |
|||
R 00 00 06 00 |
|||
T 3A 03 C9 |
|||
R 00 00 06 00 |
|||
T 3B 03 |
|||
R 00 00 06 00 |
|||
T 3B 03 2A 62 05 45 2A 64 05 60 CD C4 03 3A |
|||
R 00 00 06 00 00 03 06 00 00 07 06 00 00 0B 06 00 |
|||
T 47 03 73 05 32 77 05 3A 74 05 32 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 50 03 78 05 3A 75 05 32 79 05 3A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 59 03 76 05 E6 0F C6 E0 32 7A 05 CD FC 03 21 |
|||
R 00 00 06 00 00 02 06 00 00 09 06 00 00 0C 06 00 |
|||
T 66 03 7C 05 3A 7B 05 CB 0F CB 0F 16 00 5F 19 19 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 74 03 22 6D 05 2A 6D 05 EB 2A 66 05 01 80 00 ED |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 0A 06 00 |
|||
T 82 03 B0 CD 15 04 3E 00 C9 |
|||
R 00 00 06 00 00 04 06 00 |
|||
T 89 03 |
|||
R 00 00 06 00 |
|||
T 89 03 7E FE FF CA 97 03 4F CD 53 01 23 C3 89 03 |
|||
R 00 00 06 00 00 06 06 00 00 0A 06 00 00 0E 06 00 |
|||
T 97 03 |
|||
R 00 00 06 00 |
|||
T 97 03 C9 |
|||
R 00 00 06 00 |
|||
T 98 03 |
|||
R 00 00 06 00 |
|||
T 98 03 2A 64 05 29 29 29 29 29 29 29 22 6D 05 C9 |
|||
R 00 00 06 00 00 03 06 00 00 0D 06 00 |
|||
T A6 03 |
|||
R 00 00 06 00 |
|||
T A6 03 2A 62 05 7D ED 39 96 3E 00 ED 39 94 32 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T B3 03 69 05 32 6A 05 C9 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T B9 03 |
|||
R 00 00 06 00 |
|||
T B9 03 3E 80 ED 39 94 3E 00 32 69 05 C9 |
|||
R 00 00 06 00 00 0A 06 00 |
|||
T C4 03 |
|||
R 00 00 06 00 |
|||
T C4 03 AF 7D E6 03 47 32 7B 05 37 3F 7C 1F 67 7D |
|||
R 00 00 06 00 00 08 06 00 |
|||
T D2 03 1F 6F 37 3F 7C 1F 67 7D 1F 6F 3A 6F 05 85 |
|||
R 00 00 06 00 00 0D 06 00 |
|||
T E0 03 32 73 05 3A 70 05 8C 32 74 05 21 00 00 3A |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 0A 06 00 |
|||
T EE 03 71 05 8D 32 75 05 3A 72 05 8C 32 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 09 06 00 |
|||
T F9 03 76 05 C9 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T FC 03 |
|||
R 00 00 06 00 |
|||
T FC 03 CD 4F 04 CD 9F 04 3E 0F 0E 20 CD EB 04 CD |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 0D 06 00 |
|||
T 0A 04 69 04 21 7C 05 CD 77 04 3E 00 C9 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 15 04 |
|||
R 00 00 06 00 |
|||
T 15 04 CD 4F 04 CD 9F 04 3E 0F 0E 30 CD EB 04 CD |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 0D 06 00 |
|||
T 23 04 69 04 21 7C 05 CD 8B 04 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 2C 04 4F 04 C9 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 2F 04 |
|||
R 00 00 06 00 |
|||
T 2F 04 CD 05 05 3E 80 D3 82 01 00 00 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 39 04 |
|||
R 00 00 06 00 |
|||
T 39 04 05 C2 39 04 3E 00 D3 82 C9 |
|||
R 00 00 06 00 00 04 06 00 |
|||
T 42 04 |
|||
R 00 00 06 00 |
|||
T 42 04 3E 09 CD CF 04 79 CA 4C 04 C9 |
|||
R 00 00 06 00 00 05 06 00 00 09 06 00 |
|||
T 4C 04 |
|||
R 00 00 06 00 |
|||
T 4C 04 3E FF C9 |
|||
R 00 00 06 00 |
|||
T 4F 04 |
|||
R 00 00 06 00 |
|||
T 4F 04 3E 0F CD CF 04 79 E6 80 C2 4F 04 C9 |
|||
R 00 00 06 00 00 05 06 00 00 0B 06 00 |
|||
T 5B 04 |
|||
R 00 00 06 00 |
|||
T 5B 04 3E 0F CD CF 04 79 E6 C0 EE 40 C2 5B 04 C9 |
|||
R 00 00 06 00 00 05 06 00 00 0D 06 00 |
|||
T 69 04 |
|||
R 00 00 06 00 |
|||
T 69 04 3E 0F CD CF 04 79 E6 88 EE 08 C2 69 04 C9 |
|||
R 00 00 06 00 00 05 06 00 00 0D 06 00 |
|||
T 77 04 |
|||
R 00 00 06 00 |
|||
T 77 04 06 00 |
|||
R 00 00 06 00 |
|||
T 79 04 |
|||
R 00 00 06 00 |
|||
T 79 04 C5 E5 3E 08 CD CF 04 E1 71 23 70 23 C1 05 |
|||
R 00 00 06 00 00 07 06 00 |
|||
T 87 04 C2 79 04 C9 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 8B 04 |
|||
R 00 00 06 00 |
|||
T 8B 04 06 00 |
|||
R 00 00 06 00 |
|||
T 8D 04 |
|||
R 00 00 06 00 |
|||
T 8D 04 C5 4E 23 46 23 E5 3E 08 CD EB 04 E1 C1 05 |
|||
R 00 00 06 00 00 0B 06 00 |
|||
T 9B 04 C2 8D 04 C9 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 9F 04 |
|||
R 00 00 06 00 |
|||
T 9F 04 3A 7A 05 E6 0F F6 E0 4F 3E 0E CD EB 04 3A |
|||
R 00 00 06 00 00 03 06 00 00 0D 06 00 |
|||
T AD 04 79 05 4F 3E 0D CD EB 04 3A 78 05 4F 3E 0C |
|||
R 00 00 06 00 00 02 06 00 00 08 06 00 00 0B 06 00 |
|||
T BB 04 CD EB 04 3A 77 05 4F 3E 0B CD EB 04 0E 01 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 0C 06 00 |
|||
T C9 04 3E 0A CD EB 04 C9 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T CF 04 |
|||
R 00 00 06 00 |
|||
T CF 04 F5 CD 05 05 F1 D3 82 F6 40 D3 82 F5 DB 80 |
|||
R 00 00 06 00 00 04 06 00 |
|||
T DD 04 4F DB 81 47 F1 EE 40 D3 82 3E 00 D3 82 C9 |
|||
R 00 00 06 00 |
|||
T EB 04 |
|||
R 00 00 06 00 |
|||
T EB 04 F5 CD 0A 05 79 D3 80 78 D3 81 F1 D3 82 F6 |
|||
R 00 00 06 00 00 04 06 00 |
|||
T F9 04 20 D3 82 EE 20 D3 82 3E 00 D3 82 C9 |
|||
R 00 00 06 00 |
|||
T 05 05 |
|||
R 00 00 06 00 |
|||
T 05 05 3E 92 D3 83 C9 |
|||
R 00 00 06 00 |
|||
T 0A 05 |
|||
R 00 00 06 00 |
|||
T 0A 05 3E 80 D3 83 C9 |
|||
R 00 00 06 00 |
|||
T 0F 05 |
|||
R 00 00 06 00 |
|||
T 0F 05 0D 0A 45 52 52 4F 52 3A 20 57 52 49 54 45 |
|||
R 00 00 06 00 |
|||
T 1D 05 20 54 4F 20 52 45 41 44 20 4F 4E 4C 59 20 |
|||
R 00 00 06 00 |
|||
T 2B 05 44 49 53 4B FF |
|||
R 00 00 06 00 |
|||
T 30 05 |
|||
R 00 00 06 00 |
|||
T 30 05 0D 0A 43 50 2F 4D 2D 38 30 20 56 45 52 53 |
|||
R 00 00 06 00 |
|||
T 3E 05 49 4F 4E 20 32 2E 32 43 20 46 4F 52 20 54 |
|||
R 00 00 06 00 |
|||
T 4C 05 48 45 20 4E 38 56 45 4D 20 4E 38 20 28 50 |
|||
R 00 00 06 00 |
|||
T 5A 05 50 49 44 45 29 0D 0A FF |
|||
R 00 00 06 00 |
|||
T 62 05 |
|||
R 00 00 06 00 |
|||
T 64 05 |
|||
R 00 00 06 00 |
|||
T 66 05 |
|||
R 00 00 06 00 |
|||
T 68 05 |
|||
R 00 00 06 00 |
|||
T 69 05 01 FF |
|||
R 00 00 06 00 |
|||
T 6B 05 |
|||
R 00 00 06 00 |
|||
T 6D 05 |
|||
R 00 00 06 00 |
|||
T 6F 05 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T 77 05 |
|||
R 00 00 06 00 |
|||
T 78 05 |
|||
R 00 00 06 00 |
|||
T 79 05 |
|||
R 00 00 06 00 |
|||
T 7A 05 |
|||
R 00 00 06 00 |
|||
T 7B 05 00 |
|||
R 00 00 06 00 |
|||
T 7C 05 |
|||
R 00 00 06 00 |
|||
T 7C 07 |
|||
R 00 00 06 00 |
|||
T FC 07 |
|||
R 00 00 06 00 |
|||
T 00 08 |
|||
R 00 00 06 00 |
|||
T 20 08 |
|||
R 00 00 06 00 |
|||
T 1F 09 |
|||
R 00 00 06 00 |
|||
T 1E 0A |
|||
R 00 00 06 00 |
|||
T 5E 0A |
|||
R 00 00 06 00 |
|||
T 9E 0A |
|||
R 00 00 06 00 |
|||
T 9E 0A |
|||
R 00 00 06 00 |
|||
T 9E 0A |
|||
R 00 00 06 00 |
|||
T 9E 0A |
|||
R 00 00 06 00 |
|||
T 9E 0A |
|||
R 00 00 06 00 |
|||
T 9E 0A |
|||
R 00 00 06 00 |
|||
T 9E 0A |
|||
R 00 00 06 00 |
|||
T F4 0C E5 |
|||
R 00 00 06 00 |
|||
T F5 0C |
|||
R 00 00 06 00 |
|||
File diff suppressed because it is too large
@ -1,96 +0,0 @@ |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 1. |
|||
|
|||
Symbol Table |
|||
|
|||
.__.ABS.= 0000 G | ACR = 0094 | 6 AL0_0 009B R |
|||
6 AL0_1 008C R | 6 AL0_2 00AA R | 6 AL0_3 00B9 R |
|||
6 AL0_4 00C8 R | 6 AL0_5 00D7 R | 6 AL1_0 009C R |
|||
6 AL1_1 008D R | 6 AL1_2 00AB R | 6 AL1_3 00BA R |
|||
6 AL1_4 00C9 R | 6 AL1_5 00D8 R | 6 ALL00 07FC R |
|||
6 ALL01 0800 R | 6 ALL02 0820 R | 6 ALL03 091F R |
|||
6 ALL04 0A1E R | 6 ALL05 0A5E R | ASEXT0 = 0052 |
|||
BBR = 0079 | BDOS = DC06 | BIAS = A000 |
|||
BIOS = EA00 | 6 BLM_0 0095 R | 6 BLM_1 0086 R |
|||
6 BLM_2 00A4 R | 6 BLM_3 00B3 R | 6 BLM_4 00C2 R |
|||
6 BLM_5 00D1 R | 6 BOOT 00DD R | 6 BSH_0 0094 R |
|||
6 BSH_1 0085 R | 6 BSH_2 00A3 R | 6 BSH_3 00B2 R |
|||
6 BSH_4 00C1 R | 6 BSH_5 00D0 R | CBAR = 007A |
|||
CBR = 0078 | CCP = D400 | CDISK = 0004 |
|||
6 CHK00 0A9E R | 6 CHK01 0A9E R | 6 CHK02 0A9E R |
|||
6 CHK03 0A9E R | 6 CHK04 0A9E R | 6 CHK05 0A9E R |
|||
6 CKS_0 009D R | 6 CKS_1 008E R | 6 CKS_2 00AC R |
|||
6 CKS_3 00BB R | 6 CKS_4 00CA R | 6 CKS_5 00D9 R |
|||
CNTLA0 = 0040 | CNTLB0 = 0042 | 6 CONIN 0141 R |
|||
6 CONOUT 0153 R | 6 CONST 012F R | 6 CONVERT_ 03C4 R |
|||
CR = 000D | 6 CRTIN 01A3 R | 6 CRTISTS 01A9 R |
|||
6 CRTOSTS 01AC R | 6 CRTOUT 01A6 R | 6 DB_PAGER 056A R |
|||
DEFIOB = 0094 | 6 DIRBF 077C R | 6 DISKNO 0568 R |
|||
6 DMAAD 0566 R | 6 DPBASE 0033 R | 6 DPBLK0 0083 R |
|||
6 DPBLK1 0092 R | 6 DPBLK2 00A1 R | 6 DPBLK3 00B0 R |
|||
6 DPBLK4 00BF R | 6 DPBLK5 00CE R | 6 DRM_0 0099 R |
|||
6 DRM_1 008A R | 6 DRM_2 00A8 R | 6 DRM_3 00B7 R |
|||
6 DRM_4 00C6 R | 6 DRM_5 00D5 R | 6 DSM_0 0097 R |
|||
6 DSM_1 0088 R | 6 DSM_2 00A6 R | 6 DSM_3 00B5 R |
|||
6 DSM_4 00C4 R | 6 DSM_5 00D3 R | END = 00FF |
|||
6 EXM_0 0096 R | 6 EXM_1 0087 R | 6 EXM_2 00A5 R |
|||
6 EXM_3 00B4 R | 6 EXM_4 00C3 R | 6 EXM_5 00D2 R |
|||
6 GOCPM 010E R | HC_REG_B= 0080 | 6 HOME 01C6 R |
|||
IDECTL = 0082 | IDELSB = 0080 | IDEMSB = 0081 |
|||
6 IDE_LBA0 0577 R | 6 IDE_LBA1 0578 R | 6 IDE_LBA2 0579 R |
|||
6 IDE_LBA3 057A R | 6 IDE_READ 03FC R | 6 IDE_WRIT 0415 R |
|||
IOBYTE = 0003 | IO_REG_B= 0040 | 6 LASTBYTE 0CF4 R |
|||
6 LBA_OFFS 0571 R | 6 LBA_OFFS 056F R | 6 LBA_TARG 0575 R |
|||
6 LBA_TARG 0573 R | LF = 000A | 6 LIST 0165 R |
|||
6 LISTST 0168 R | MEM = 003C | MOVSIZ_C= 15FF |
|||
MOVSIZ_M= 0800 | MSIZE = 003C | 6 NULLIN 0171 R |
|||
6 NULLOUT 0174 R | 6 NULLSTS 0176 R | 6 OFF_0 009F R |
|||
6 OFF_1 0090 R | 6 OFF_2 00AE R | 6 OFF_3 00BD R |
|||
6 OFF_4 00CC R | 6 OFF_5 00DB R | 6 PAGER 0569 R |
|||
6 PAGERB 03A6 R | PIO1CONT= 0083 | PPI1 = 0080 |
|||
6 PRTMSG 0389 R | 6 PRTMSG1 0397 R | 6 PUNCH 016B R |
|||
RAMTARG_= D400 | RAMTARG_= F800 | 6 RDONLY 0226 R |
|||
RDR0 = 0048 | 6 READ 01DE R | 6 READER 016E R |
|||
6 READ_HDP 02B6 R | 6 READ_HDP 02C5 R | 6 READ_HDP 02D4 R |
|||
6 READ_HDP 02D4 R | 6 READ_HDP 02D5 R | 6 READ_RAM 022F R |
|||
6 READ_ROM 025F R | RMAP = 0096 | ROMSTART= 0900 |
|||
ROMSTART= 0100 | 6 RPAGE 03B9 R | 6 SECPAGE 0398 R |
|||
6 SECST 056D R | 6 SECTOR 0564 R | 6 SECTOR_B 057C R |
|||
6 SECTOR_I 057B R | 6 SECTRN 01D5 R | 6 SELDSK 01AF R |
|||
6 SETDMA 01D8 R | 6 SETSEC 01CF R | 6 SETTRK 01C9 R |
|||
6 SPT_0 0092 R | 6 SPT_1 0083 R | 6 SPT_2 00A1 R |
|||
6 SPT_3 00B0 R | 6 SPT_4 00BF R | 6 SPT_5 00CE R |
|||
STAT0 = 0044 | TDR0 = 0046 | 6 TMPBUF = 057C R |
|||
6 TRACK 0562 R | 6 TTYIN 0179 R | 6 TTYISTS 0191 R |
|||
6 TTYOSTS 019A R | 6 TTYOUT 0185 R | 6 TXT_RO_E 050F R |
|||
6 TXT_STAR 0530 R | 6 V_SECTOR 056B R | 6 WBOOT 00F5 R |
|||
6 WBOOTE 0003 R | 6 WRITE 0202 R | 6 WRITE_HD 031C R |
|||
6 WRITE_HD 032B R | 6 WRITE_HD 033A R | 6 WRITE_HD 033A R |
|||
6 WRITE_HD 033B R | 6 WRITE_RA 0286 R | 6 _cbioshc 0000 GR |
|||
6 _cbioshc 0CF5 GR | 6 _cbioshc 0000 GR | 6 gerr2 044C R |
|||
6 get_err 0442 R | ide_a0_l= 0001 | ide_a1_l= 0002 |
|||
ide_a2_l= 0004 | ide_asta= 0017 | ide_cmd_= 00EC |
|||
ide_cmd_= 0091 | ide_cmd_= 0020 | ide_cmd_= 0010 |
|||
ide_cmd_= 00E0 | ide_cmd_= 00E1 | ide_cmd_= 0030 |
|||
ide_comm= 000F | ide_cont= 0016 | ide_cs0_= 0008 |
|||
ide_cs1_= 0010 | ide_cyl_= 000C | ide_cyl_= 000D |
|||
ide_data= 0008 | ide_err = 0009 | 6 ide_hard 042F R |
|||
ide_head= 000E | ide_rd_l= 0040 | 6 ide_read 04CF R |
|||
ide_rst_= 0080 | ide_sec_= 000A | ide_sect= 000B |
|||
ide_stat= 000F | 6 ide_wait 0469 R | 6 ide_wait 044F R |
|||
6 ide_wait 045B R | ide_wr_l= 0020 | 6 ide_writ 04EB R |
|||
rd_ide_8= 0092 | 6 rdblk2 0479 R | 6 read_dat 0477 R |
|||
6 rst_dly 0439 R | 6 set_ppi_ 0505 R | 6 set_ppi_ 050A R |
|||
wr_ide_8= 0080 | 6 wr_lba 049F R | 6 wrblk2 048D R |
|||
6 write_da 048B R |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 2. |
|||
|
|||
Area Table |
|||
|
|||
0 _CODE size 0 flags 0 |
|||
1 _DATA size 0 flags 0 |
|||
2 _OVERLAY size 0 flags 0 |
|||
3 _HOME size 0 flags 0 |
|||
4 _GSINIT size 0 flags 0 |
|||
5 _GSFINAL size 0 flags 0 |
|||
6 _CBIOS size CF5 flags 0 |
|||
7 _CABS size 0 flags 0 |
|||
@ -1,6 +0,0 @@ |
|||
-mjx |
|||
-i ccpb03.ihx |
|||
-k /usr/local/share/sdcc/lib/z80 |
|||
-l z80 |
|||
ccpb03.rel |
|||
-e |
|||
File diff suppressed because it is too large
@ -1,368 +0,0 @@ |
|||
XL |
|||
H 8 areas 4 global symbols |
|||
M ccpb03 |
|||
O -mz80 |
|||
S .__.ABS. Def0000 |
|||
A _CODE size 0 flags 0 addr 0 |
|||
A _DATA size 0 flags 0 addr 0 |
|||
A _OVERLAY size 0 flags 0 addr 0 |
|||
A _HOME size 0 flags 0 addr 0 |
|||
A _GSINIT size 0 flags 0 addr 0 |
|||
A _GSFINAL size 0 flags 0 addr 0 |
|||
A _CCPB03 size 7FF flags 0 addr 0 |
|||
S _ccp Def0000 |
|||
S _ccp_start Def0000 |
|||
S _ccp_end Def07FF |
|||
A _CABS size 0 flags 0 addr 0 |
|||
T 00 00 |
|||
R 00 00 06 00 |
|||
T 00 00 |
|||
R 00 00 06 00 |
|||
T 00 00 C3 54 03 C3 50 03 7F 00 43 4F 50 59 52 49 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T 0E 00 47 48 54 20 31 39 37 39 20 28 43 29 20 42 |
|||
R 00 00 06 00 |
|||
T 1C 00 59 20 44 49 47 49 54 41 4C 20 52 45 53 45 |
|||
R 00 00 06 00 |
|||
T 2A 00 41 52 43 48 20 20 20 20 20 20 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T 46 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T 54 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T 62 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T 7E 00 00 00 00 00 00 00 00 00 08 00 00 00 5F 0E |
|||
R 00 00 06 00 00 0A 06 00 |
|||
T 8C 00 02 C3 05 00 C5 CD 8A 00 C1 C9 3E 0D CD |
|||
R 00 00 06 00 00 08 06 00 |
|||
T 99 00 90 00 3E 0A C3 90 00 3E 20 C3 90 00 C5 CD |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0C 06 00 |
|||
T A7 00 96 00 E1 7E B7 C8 23 E5 CD 8A 00 E1 C3 |
|||
R 00 00 06 00 00 02 06 00 00 0B 06 00 |
|||
T B4 00 AA 00 0E 0D C3 05 00 5F 0E 0E C3 05 00 CD |
|||
R 00 00 06 00 00 02 06 00 |
|||
T C2 00 05 00 32 FA 07 3C C9 0E 0F C3 C1 00 AF 32 |
|||
R 00 00 06 00 00 05 06 00 00 0C 06 00 |
|||
T D0 00 F9 07 11 D9 07 C3 C9 00 0E 10 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T DB 00 C1 00 0E 11 C3 C1 00 0E 12 C3 C1 00 11 |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0C 06 00 |
|||
T E8 00 D9 07 C3 DD 00 0E 13 C3 05 00 CD 05 00 B7 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T F6 00 C9 0E 14 C3 F2 00 11 D9 07 C3 F7 00 0E 15 |
|||
R 00 00 06 00 00 06 06 00 00 09 06 00 00 0C 06 00 |
|||
T 04 01 C3 F2 00 0E 16 C3 C1 00 0E 17 C3 05 00 1E |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 |
|||
T 12 01 FF |
|||
R 00 00 06 00 |
|||
T 13 01 |
|||
R 00 00 06 00 |
|||
T 13 01 0E 20 C3 05 00 CD 11 01 87 87 87 87 21 |
|||
R 00 00 06 00 00 08 06 00 |
|||
T 20 01 FB 07 B6 32 04 00 C9 3A FB 07 32 04 00 C9 |
|||
R 00 00 06 00 00 02 06 00 00 0A 06 00 |
|||
T 2E 01 FE 41 D8 FE 7B D0 E6 5F C9 3A B7 07 B7 CA |
|||
R 00 00 06 00 00 0C 06 00 |
|||
T 3C 01 94 01 3A FB 07 B7 3E 00 C4 BB 00 11 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0B 06 00 |
|||
T 48 01 B8 07 CD C9 00 CA 94 01 3A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 51 01 C7 07 3D 32 D8 07 11 B8 07 CD |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 09 06 00 |
|||
T 5B 01 F7 00 C2 94 01 11 07 00 21 80 00 06 80 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 69 01 38 04 21 C6 07 36 00 23 35 11 B8 07 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0C 06 00 |
|||
T 76 01 D8 00 CA 94 01 3A FB 07 B7 C4 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 80 01 BB 00 21 08 00 CD AA 00 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 89 01 C0 01 CA A5 01 CD DB 01 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 92 01 7A 03 CD DB 01 CD 18 01 0E 0A 11 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 9D 01 06 00 CD 05 00 CD 27 01 21 07 00 46 23 78 |
|||
R 00 00 06 00 00 02 06 00 00 08 06 00 00 0B 06 00 |
|||
T AB 01 B7 CA B8 01 7E CD 2E 01 77 05 C3 A9 01 77 |
|||
R 00 00 06 00 00 04 06 00 00 08 06 00 00 0D 06 00 |
|||
T B9 01 21 08 00 22 86 00 C9 0E 0B CD 05 00 B7 C8 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T C7 01 0E 01 CD 05 00 B7 C9 0E 19 C3 05 00 11 |
|||
R 00 00 06 00 |
|||
T D4 01 80 00 0E 1A C3 05 00 |
|||
R 00 00 06 00 |
|||
T DB 01 |
|||
R 00 00 06 00 |
|||
T DB 01 21 B7 07 7E B7 C8 36 00 AF CD BB 00 11 |
|||
R 00 00 06 00 00 03 06 00 00 0C 06 00 |
|||
T E8 01 B8 07 CD ED 00 3A FB 07 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T F1 01 BB 00 CD 96 00 2A 88 00 7E FE 20 CA |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T FD 01 0C 02 B7 CA 0C 02 E5 CD 8A 00 E1 23 C3 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 0A 06 00 |
|||
T 0A 02 F9 01 3E 3F CD 8A 00 CD 96 00 CD |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
|||
T 15 02 DB 01 C3 7A 03 1A B7 C8 FE 20 DA F3 01 C8 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0D 06 00 |
|||
T 23 02 FE 3D C8 FE 5F C8 FE 2E C8 FE 3A C8 FE 3B |
|||
R 00 00 06 00 |
|||
T 31 02 C8 FE 3C C8 FE 3E C8 C9 |
|||
R 00 00 06 00 |
|||
T 39 02 |
|||
R 00 00 06 00 |
|||
T 39 02 1A B7 C8 FE 20 C0 13 C3 39 02 85 6F D0 24 |
|||
R 00 00 06 00 00 0A 06 00 |
|||
T 47 02 C9 3E 00 21 D9 07 CD 43 02 E5 E5 AF 32 |
|||
R 00 00 06 00 00 06 06 00 00 09 06 00 |
|||
T 54 02 FC 07 2A 86 00 EB CD 39 02 EB 22 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
|||
T 5F 02 88 00 EB E1 1A B7 CA 73 02 DE 40 47 13 1A |
|||
R 00 00 06 00 00 02 06 00 00 09 06 00 |
|||
T 6D 02 FE 3A CA 7A 02 1B 3A FB 07 77 C3 80 02 78 |
|||
R 00 00 06 00 00 05 06 00 00 09 06 00 00 0D 06 00 |
|||
T 7B 02 32 FC 07 70 13 06 08 CD 1A 02 CA A3 02 23 |
|||
R 00 00 06 00 00 03 06 00 00 0A 06 00 00 0D 06 00 |
|||
T 89 02 FE 2A C2 93 02 36 3F C3 95 02 77 13 05 C2 |
|||
R 00 00 06 00 00 05 06 00 00 0A 06 00 |
|||
T 97 02 82 02 CD 1A 02 CA AA 02 13 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T A1 02 99 02 23 36 20 05 C2 A3 02 06 03 FE 2E C2 |
|||
R 00 00 06 00 00 02 06 00 00 09 06 00 |
|||
T AF 02 D3 02 13 CD 1A 02 CA D3 02 23 FE 2A C2 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 09 06 00 |
|||
T BC 02 C3 02 36 3F C3 C5 02 77 13 05 C2 B2 02 CD |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0D 06 00 |
|||
T CA 02 1A 02 CA DA 02 13 C3 C9 02 23 36 20 05 C2 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
|||
T D8 02 D3 02 06 03 23 36 00 05 C2 DC 02 EB 22 |
|||
R 00 00 06 00 00 02 06 00 00 0B 06 00 |
|||
T E5 02 86 00 E1 01 0B 00 23 7E FE 3F C2 F3 02 04 |
|||
R 00 00 06 00 00 02 06 00 00 0D 06 00 |
|||
T F3 02 0D C2 EB 02 78 B7 C9 44 49 52 20 45 52 41 |
|||
R 00 00 06 00 00 04 06 00 |
|||
T 01 03 20 54 59 50 45 53 41 56 45 52 45 4E 20 55 |
|||
R 00 00 06 00 |
|||
T 0F 03 53 45 52 4D 4F 4E 20 70 04 18 05 56 05 |
|||
R 00 00 06 00 00 09 06 00 00 0B 06 00 00 0D 06 00 |
|||
T 1C 03 A6 05 09 06 87 06 |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 06 06 00 |
|||
T 22 03 6D 04 9E 06 21 FA 02 0E 00 79 FE 07 D0 11 |
|||
R 00 00 06 00 00 02 06 00 00 04 06 00 00 07 06 00 |
|||
T 30 03 DA 07 06 04 1A BE C2 47 03 13 23 05 C2 |
|||
R 00 00 06 00 00 02 06 00 00 09 06 00 |
|||
T 3D 03 34 03 1A FE 20 C2 4C 03 79 C9 23 05 C2 |
|||
R 00 00 06 00 00 02 06 00 00 08 06 00 |
|||
T 4A 03 47 03 0C C3 2B 03 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 |
|||
T 50 03 |
|||
R 00 00 06 00 |
|||
T 50 03 AF 32 07 00 31 B7 07 C5 79 1F 1F 1F 1F E6 |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 |
|||
T 5E 03 0F 5F CD 13 01 CD B6 00 32 B7 07 C1 79 E6 |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 00 0B 06 00 |
|||
T 6C 03 0F 32 FB 07 CD BB 00 3A 07 00 B7 C2 |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 00 0A 06 00 |
|||
T 78 03 A6 03 31 B7 07 CD 96 00 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 81 03 CE 01 C6 41 CD 8A 00 CD 11 01 FE 0A 38 0A |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
|||
T 8F 03 3E 31 CD 8A 00 CD 11 01 D6 0A C6 30 CD |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 |
|||
T 9C 03 8A 00 3E 3E CD 8A 00 CD 37 01 11 80 00 CD |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
|||
T AA 03 D6 01 CD CE 01 32 FB 07 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T B3 03 48 02 C4 F3 01 3A FC 07 B7 C2 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T BD 03 9E 06 CD 26 03 21 16 03 5F 16 00 19 19 7E |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T CB 03 23 66 6F E9 01 D5 03 C3 A5 00 52 65 61 64 |
|||
R 00 00 06 00 00 07 06 00 00 0A 06 00 |
|||
T D9 03 20 45 72 72 6F 72 00 01 E6 03 C3 A5 00 4E |
|||
R 00 00 06 00 00 0A 06 00 00 0D 06 00 |
|||
T E7 03 6F 20 46 69 6C 65 00 CD 48 02 3A FC 07 B7 |
|||
R 00 00 06 00 00 0A 06 00 00 0D 06 00 |
|||
T F5 03 C2 F3 01 21 DA 07 01 0B 00 7E FE 20 CA |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T 02 04 29 04 23 D6 30 FE 0A D2 F3 01 57 78 E6 E0 |
|||
R 00 00 06 00 00 02 06 00 00 0A 06 00 |
|||
T 10 04 C2 F3 01 78 07 07 07 80 DA F3 01 80 DA |
|||
R 00 00 06 00 00 03 06 00 00 0B 06 00 |
|||
T 1D 04 F3 01 82 DA F3 01 47 0D C2 FE 03 C9 7E FE |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 0B 06 00 |
|||
T 2B 04 20 C2 F3 01 23 0D C2 29 04 78 C9 06 03 7E |
|||
R 00 00 06 00 00 04 06 00 00 09 06 00 |
|||
T 39 04 12 23 13 05 C2 38 04 C9 21 80 00 81 CD |
|||
R 00 00 06 00 00 07 06 00 |
|||
T 46 04 43 02 7E C9 AF 32 D9 07 3A FC 07 B7 C8 3D |
|||
R 00 00 06 00 00 02 06 00 00 08 06 00 00 0B 06 00 |
|||
T 54 04 21 FB 07 BE C8 C3 BB 00 3A FC 07 B7 C8 3D |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 00 0B 06 00 |
|||
T 62 04 21 FB 07 BE C8 3A FB 07 C3 BB 00 C3 00 FC |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 00 0B 06 00 |
|||
T 70 04 CD 48 02 CD 4A 04 21 DA 07 7E FE 20 C2 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 7D 04 88 04 06 0B 36 3F 23 05 C2 81 04 1E 00 D5 |
|||
R 00 00 06 00 00 02 06 00 00 0B 06 00 |
|||
T 8B 04 CD E7 00 CC E0 03 CA 14 05 3A |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 95 04 FA 07 0F 0F 0F E6 60 4F 3E 0A CD 41 04 17 |
|||
R 00 00 06 00 00 02 06 00 00 0D 06 00 |
|||
T A3 04 DA 08 05 D1 7B 1C D5 E6 03 F5 C2 C5 04 CD |
|||
R 00 00 06 00 00 03 06 00 00 0D 06 00 |
|||
T B1 04 96 00 C5 CD CE 01 C1 C6 41 CD 90 00 3E 3A |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 0C 06 00 |
|||
T BF 04 CD 90 00 C3 CD 04 CD A0 00 3E 3A CD |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T CB 04 90 00 CD A0 00 06 01 78 CD 41 04 E6 7F FE |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0B 06 00 |
|||
T D9 04 20 C2 F2 04 F1 F5 FE 03 C2 F0 04 3E 09 CD |
|||
R 00 00 06 00 00 04 06 00 00 0B 06 00 |
|||
T E7 04 41 04 E6 7F FE 20 CA 07 05 3E 20 CD 90 00 |
|||
R 00 00 06 00 00 02 06 00 00 09 06 00 00 0E 06 00 |
|||
T F5 04 04 78 FE 0C D2 07 05 FE 09 C2 D2 04 CD |
|||
R 00 00 06 00 00 07 06 00 00 0C 06 00 |
|||
T 02 05 A0 00 C3 D2 04 F1 CD C0 01 C2 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
|||
T 0C 05 14 05 CD E2 00 C3 91 04 D1 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 16 05 92 07 CD 48 02 FE 0B C2 3B 05 01 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T 21 05 4B 05 CD A5 00 CD 37 01 21 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 2A 05 07 00 35 C2 7A 03 23 7E FE 59 C2 7A 03 23 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 0D 06 00 |
|||
T 38 05 22 86 00 CD 4A 04 11 D9 07 CD |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 42 05 ED 00 3C CC E0 03 C3 92 07 41 6C 6C 20 28 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 09 06 00 |
|||
T 50 05 59 2F 4E 29 3F 00 CD 48 02 C2 F3 01 CD |
|||
R 00 00 06 00 00 09 06 00 00 0C 06 00 |
|||
T 5D 05 4A 04 CD CE 00 CA A0 05 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 66 05 96 00 21 FD 07 36 FF 21 FD 07 7E FE 80 DA |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T 74 05 80 05 E5 CD FC 00 E1 C2 99 05 AF 77 34 21 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 0A 06 00 |
|||
T 82 05 80 00 CD 43 02 7E FE 1A CA 92 07 CD 8A 00 |
|||
R 00 00 06 00 00 05 06 00 00 0B 06 00 00 0E 06 00 |
|||
T 90 05 CD C0 01 C2 92 07 C3 6D 05 3D CA |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 9B 05 92 07 CD CF 03 CD 5C 04 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T A4 05 F3 01 CD EE 03 F5 CD 48 02 C2 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
|||
T AE 05 F3 01 CD 4A 04 11 D9 07 D5 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T B8 05 ED 00 D1 CD 07 01 CA F4 05 AF 32 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 09 06 00 |
|||
T C3 05 F9 07 F1 6F 26 00 29 11 00 01 7C B5 CA |
|||
R 00 00 06 00 00 02 06 00 |
|||
T D0 05 EA 05 2B E5 21 80 00 19 E5 CD D6 01 11 |
|||
R 00 00 06 00 00 02 06 00 00 0C 06 00 |
|||
T DD 05 D9 07 CD 02 01 D1 E1 C2 F4 05 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T E8 05 CD 05 11 D9 07 CD D8 00 3C C2 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T F2 05 FA 05 01 00 06 CD A5 00 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T FB 05 D3 01 C3 92 07 4E 6F 20 53 70 61 63 65 00 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 09 06 CD 48 02 C2 F3 01 3A FC 07 F5 CD |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 14 06 4A 04 CD E7 00 C2 72 06 21 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 1D 06 D9 07 11 E9 07 06 10 CD 38 04 2A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T 28 06 86 00 EB CD 39 02 FE 3D CA 38 06 FE 20 C2 |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 0B 06 00 |
|||
T 36 06 6C 06 EB 23 22 86 00 CD 48 02 C2 |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
|||
T 41 06 6C 06 F1 47 21 FC 07 7E B7 CA 52 06 B8 70 |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0C 06 00 |
|||
T 4F 06 C2 6C 06 70 AF 32 D9 07 CD E7 00 CA |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 00 0B 06 00 |
|||
T 5B 06 66 06 11 D9 07 CD 0C 01 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 64 06 92 07 CD E0 03 C3 92 07 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 6D 06 5C 04 C3 F3 01 01 7B 06 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 76 06 A5 00 C3 92 07 46 69 6C 65 20 45 78 69 73 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 84 06 74 73 00 CD EE 03 FE 10 D2 F3 01 5F 3A |
|||
R 00 00 06 00 00 06 06 00 00 0B 06 00 |
|||
T 91 06 DA 07 FE 20 CA F3 01 CD 13 01 C3 |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
|||
T 9C 06 95 07 3A DA 07 FE 20 C2 BA 06 3A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T A7 06 FC 07 B7 CA 95 07 3D 32 FB 07 CD |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 0A 06 00 |
|||
T B2 06 27 01 CD BB 00 C3 95 07 11 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T BB 06 E2 07 1A FE 20 C2 F3 01 D5 CD 4A 04 D1 21 |
|||
R 00 00 06 00 00 02 06 00 00 08 06 00 00 0C 06 00 |
|||
T C9 06 8F 07 CD 36 04 CD CE 00 C2 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T D2 06 EA 06 1E 00 CD 13 01 CD CE 00 C2 |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
|||
T DD 06 EA 06 21 D9 07 36 02 CD CE 00 CA |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T E8 06 77 07 21 00 01 E5 EB CD D6 01 11 D9 07 CD |
|||
R 00 00 06 00 00 02 06 00 00 0A 06 00 00 0D 06 00 |
|||
T F6 06 F7 00 C2 0D 07 E1 11 80 00 19 11 00 00 7D |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0D 06 00 |
|||
T 04 07 93 7C 9A D2 7D 07 C3 ED 06 E1 3D C2 7D 07 |
|||
R 00 00 06 00 00 06 06 00 00 09 06 00 00 0E 06 00 |
|||
T 12 07 CD 5C 04 CD 48 02 21 FC 07 E5 7E 32 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 1E 07 D9 07 3E 10 CD 4A 02 E1 7E 32 E9 07 AF 32 |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0C 06 00 |
|||
T 2C 07 F9 07 11 5C 00 21 D9 07 06 21 CD 38 04 21 |
|||
R 00 00 06 00 00 02 06 00 00 08 06 00 00 0D 06 00 |
|||
T 3A 07 08 00 7E B7 CA 4A 07 FE 20 CA 4A 07 23 C3 |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0C 06 00 |
|||
T 48 07 3C 07 06 00 11 81 00 7E 12 B7 CA 5B 07 04 |
|||
R 00 00 06 00 00 02 06 00 00 0D 06 00 |
|||
T 56 07 23 13 C3 4F 07 78 32 80 00 CD 96 00 CD |
|||
R 00 00 06 00 00 05 06 00 00 0C 06 00 |
|||
T 63 07 D3 01 CD 18 01 CD 00 01 31 B7 07 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0B 06 00 |
|||
T 6F 07 27 01 CD BB 00 C3 7A 03 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 78 07 5C 04 C3 F3 01 01 86 07 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 81 07 A5 00 C3 92 07 42 61 64 20 4C 6F 61 64 00 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 8F 07 43 4F 4D CD 5C 04 |
|||
R 00 00 06 00 00 06 06 00 |
|||
T 95 07 |
|||
R 00 00 06 00 |
|||
T 95 07 CD 48 02 3A DA 07 D6 20 21 FC 07 B6 C2 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 0B 06 00 |
|||
T A2 07 F3 01 C3 7A 03 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T B0 07 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T B7 07 |
|||
R 00 00 06 00 |
|||
T B7 07 00 00 24 24 24 20 20 20 20 20 53 55 42 00 |
|||
R 00 00 06 00 |
|||
T C5 07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T D3 07 00 00 00 00 00 00 00 20 20 20 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T E1 07 20 20 20 20 00 00 00 00 00 20 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T EF 07 20 20 20 20 20 20 00 00 00 00 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T FD 07 00 00 |
|||
R 00 00 06 00 |
|||
T FF 07 |
|||
R 00 00 06 00 |
|||
File diff suppressed because it is too large
@ -1,83 +0,0 @@ |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 1. |
|||
ccpb03.s derived from ccpb03.asm |
|||
Symbol Table |
|||
|
|||
.__.ABS.= 0000 G | 6 ADDHL 0243 R | ASCSPACE= 0020 |
|||
ASTERICK= 002A | 6 BADLOAD 0786 R | BASE = 9C00 |
|||
6 BATCH 07B7 R | 6 BATCHFCB 07B8 R | BDOSO = D800 |
|||
BIOSO = E600 | BS = 0008 | 6 CBASE 0000 R |
|||
CCPO = D000 | 6 CCPSTACK 07B7 R | 6 CDRIVE 07FB R |
|||
6 CHECK 021A R | 6 CHGDRV 07FC R | 6 CHKCON 01C0 R |
|||
CHKU0B = 0001 | 6 CLEARBUF 0350 R | 6 CLOSE 00D8 R |
|||
6 CMDADR 0316 R | 6 CMDTBL 02FA R | 6 CMMND1 037A R |
|||
6 CMMND2 03A6 R | 6 CMMND3 0399 R | CNTRLC = 0003 |
|||
CNTRLE = 0005 | CNTRLP = 0010 | CNTRLR = 0012 |
|||
CNTRLS = 0013 | CNTRLU = 0015 | CNTRLX = 0018 |
|||
CNTRLZ = 001A | COLON = 003A | 6 COMFILE 078F R |
|||
6 COMMAND 0354 R | 6 CONVERT 024A R | 6 CONVFST 0248 R |
|||
6 CONVRT1 0273 R | 6 CONVRT2 027A R | 6 CONVRT3 0280 R |
|||
6 CONVRT4 0282 R | 6 CONVRT5 0293 R | 6 CONVRT6 0295 R |
|||
6 CONVRT7 0299 R | 6 CONVRT8 02A3 R | CR = 000D |
|||
6 CREATE 0107 R | 6 CRLF 0096 R | 6 DECODE 03EE R |
|||
6 DECODE1 03FE R | 6 DECODE2 0420 R | 6 DECODE3 0429 R |
|||
6 DECODE4 0430 R | DEL = 007F | 6 DELBATCH 01DB R |
|||
6 DELETE 00ED R | 6 DIRECT 0470 R | 6 DIRECT1 0481 R |
|||
6 DIRECT2 0488 R | 6 DIRECT3 0491 R | 6 DIRECT4 04C5 R |
|||
6 DIRECT5 04CD R | 6 DIRECT6 04D2 R | 6 DIRECT7 0507 R |
|||
6 DIRECT8 0508 R | 6 DIRECT9 0514 R | 6 DMASET 01D6 R |
|||
6 DRECT63 04F0 R | 6 DRECT65 04F2 R | 6 DSELECT 044A R |
|||
6 DSKSEL 00BB R | ENDFIL = 0001 | ENTRY = 0005 |
|||
6 ENTRY1 00C1 R | 6 ENTRY2 00F2 R | EQUAL = 003D |
|||
6 ERASE 0518 R | 6 ERASE1 053B R | 6 EXISTS 067B R |
|||
6 EXTRACT 0441 R | 6 FCB 07D9 R | FF = 000C |
|||
6 GETBACK 0792 R | 6 GETBACK1 0795 R | 6 GETDSK 01CE R |
|||
6 GETEXT 02AA R | 6 GETEXT1 02B2 R | 6 GETEXT2 02C3 R |
|||
6 GETEXT3 02C5 R | 6 GETEXT4 02C9 R | 6 GETEXT5 02D3 R |
|||
6 GETEXT6 02DA R | 6 GETEXT7 02DC R | 6 GETEXT8 02EB R |
|||
6 GETEXT9 02F3 R | 6 GETINP 0137 R | 6 GETINP1 0194 R |
|||
6 GETINP2 01A5 R | 6 GETINP3 01A9 R | 6 GETINP4 01B8 R |
|||
6 GETSETUC 0113 R | 6 GETUSR 0111 R | GREATERT= 003E |
|||
6 HL2DE 0438 R | 6 INBUFF 0006 R | 6 INPOINT 0086 R |
|||
IOBYTE = 0003 | LCURLY = 007B | LESSTHAN= 003C |
|||
LF = 000A | MON = 0001 | MONADR = FC00 |
|||
6 MONITOR 046D R | 6 MOVE3 0436 R | 6 MOVECD 0127 R |
|||
6 NAMEPNT 0088 R | 6 NBYTES 07FD R | NK = 003B |
|||
6 NOFILE 03E6 R | 6 NONBLANK 0239 R | 6 NONE 03E0 R |
|||
6 NOSPACE 0600 R | NUMCMDS = 0007 | 6 OPEN 00C9 R |
|||
6 OPENFCB 00CE R | PERIOD = 002E | 6 PLINE 00A5 R |
|||
6 PLINE2 00AA R | 6 PRINT 008A R | 6 PRINTB 0090 R |
|||
QUESTION= 003F | 6 RDERR 03D5 R | 6 RDERROR 03CF R |
|||
6 RDREC 00F7 R | 6 READFCB 00FC R | 6 RENAM 010C R |
|||
6 RENAME 0609 R | 6 RENAME1 0638 R | 6 RENAME2 0652 R |
|||
6 RENAME3 0657 R | 6 RENAME4 0666 R | 6 RENAME5 066C R |
|||
6 RENAME6 0672 R | 6 RESDSK 00B6 R | 6 RESETDR 045C R |
|||
6 RTNCODE 07FA R | 6 SAVE 05A6 R | 6 SAVE1 05CD R |
|||
6 SAVE2 05EA R | 6 SAVE3 05F4 R | 6 SAVE4 05FA R |
|||
6 SEARCH 0326 R | 6 SEARCH1 032B R | 6 SEARCH2 0334 R |
|||
6 SEARCH3 0347 R | 6 SEARCH4 034C R | 6 SETCDRV 0118 R |
|||
6 SPACE 00A0 R | 6 SRCHFCB 00E7 R | 6 SRCHFST 00DD R |
|||
6 SRCHNXT 00E2 R | 6 STDDMA 01D3 R | 6 SYNERR 01F3 R |
|||
6 SYNERR1 01F9 R | 6 SYNERR2 020C R | TAB = 0009 |
|||
TBASE = 0100 | TBUFF = 0080 | TDRIVE = 0004 |
|||
TFCB = 005C | 6 TYPE 0556 R | 6 TYPE1 056D R |
|||
6 TYPE2 0570 R | 6 TYPE3 0580 R | 6 TYPE4 0599 R |
|||
6 TYPE5 05A0 R | UNDERSCO= 005F | 6 UNKNOWN 069E R |
|||
6 UNKWN0 077D R | 6 UNKWN1 06BA R | 6 UNKWN2 06C3 R |
|||
6 UNKWN3 06ED R | 6 UNKWN4 070D R | 6 UNKWN5 073C R |
|||
6 UNKWN6 074A R | 6 UNKWN7 074F R | 6 UNKWN8 075B R |
|||
6 UNKWN9 0777 R | 6 UNKWNA 06EA R | 6 UPPER 012E R |
|||
6 USER 0687 R | USRDSP = 0001 | 6 WRTREC 0102 R |
|||
6 YESNO 054B R | 6 _ccp 0000 GR | 6 _ccp_end 07FF GR |
|||
6 _ccp_sta 0000 GR |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 2. |
|||
ccpb03.s derived from ccpb03.asm |
|||
Area Table |
|||
|
|||
0 _CODE size 0 flags 0 |
|||
1 _DATA size 0 flags 0 |
|||
2 _OVERLAY size 0 flags 0 |
|||
3 _HOME size 0 flags 0 |
|||
4 _GSINIT size 0 flags 0 |
|||
5 _GSFINAL size 0 flags 0 |
|||
6 _CCPB03 size 7FF flags 0 |
|||
7 _CABS size 0 flags 0 |
|||
@ -1,9 +0,0 @@ |
|||
-mjx |
|||
-i copyfile.ihx |
|||
-k /usr/local/share/sdcc/lib/z80 |
|||
-l z80 |
|||
cpm0.rel |
|||
copyfile.rel |
|||
cpmbdos.rel |
|||
cprintf.rel |
|||
-e |
|||
@ -1,79 +0,0 @@ |
|||
/*
|
|||
* copyfile.c 5/11/2011 dwg - |
|||
* Main C module uses cpmbdos.h bindings to access system services |
|||
* Copyright (C) Douglas Goodall All Rights Reserved |
|||
* For non-commercial use by N8VEM Community |
|||
*/ |
|||
|
|||
#include <stdio.h> |
|||
#include <stdlib.h> |
|||
#include <string.h> |
|||
#include "stdlib.h" |
|||
#include "cpmbdos.h" |
|||
#include "cprintf.h" |
|||
|
|||
char sine[] = "copyfile.c(com) 5/11/2011 dwg - $"; |
|||
|
|||
struct FCB * prifcb = (struct FCB *)0x5c; |
|||
struct FCB * secfcb = (struct FCB *)0x6c; |
|||
|
|||
struct FCB srcfcb; |
|||
struct FCB dstfcb; |
|||
|
|||
struct BDOSCALL writestr = { C_WRITESTR, { (unsigned int)&sine } }; |
|||
struct BDOSCALL makedst = { F_MAKE, { (unsigned int)&dstfcb } }; |
|||
struct BDOSCALL opensrc = { F_OPEN, { (unsigned int)&srcfcb } }; |
|||
struct BDOSCALL readsrc = { F_READ, { (unsigned int)&srcfcb } }; |
|||
struct BDOSCALL writedst = { F_WRITE, { (unsigned int)&dstfcb } }; |
|||
struct BDOSCALL closesrc = { F_CLOSE, { (unsigned int)&srcfcb } }; |
|||
struct BDOSCALL closedst = { F_CLOSE, { (unsigned int)&dstfcb } }; |
|||
|
|||
struct BDOSCALL cwrite = { C_WRITE, { (unsigned int)'?' } }; |
|||
struct BDOSCALL cread = { C_READ, { (unsigned int)0 } }; |
|||
|
|||
/* THESE ARE USED BY THE LIBRARY ROUTINES */ |
|||
char getchar(void) |
|||
{ |
|||
struct BDOSCALL cread = { C_READ, { (unsigned int)0 } }; |
|||
return cpmbdos(&cread); |
|||
} |
|||
void outchar(char c) |
|||
{ |
|||
struct BDOSCALL cwrite = { C_WRITE, { (unsigned int)c } }; |
|||
cpmbdos(&cwrite); |
|||
} |
|||
|
|||
int main(void) |
|||
{ |
|||
int rc; |
|||
|
|||
cpmbdos(&writestr); |
|||
|
|||
strncpy(srcfcb.filename,prifcb->filename,8+3); |
|||
srcfcb.ex = srcfcb.rc = srcfcb.cr = 0; |
|||
rc = cpmbdos(&opensrc); printf("\nrc from opensrc was %2d, ",rc); |
|||
if(rc != 0) { |
|||
printf("\nSorry, cannot open source file\n"); |
|||
return(EXIT_FAILURE); |
|||
} |
|||
|
|||
strncpy(dstfcb.filename,secfcb->filename,8+3); |
|||
dstfcb.ex = dstfcb.rc = dstfcb.cr = 0; |
|||
rc = cpmbdos(&makedst); printf("rc from makedst was %2d",rc); |
|||
if(rc != 0) { |
|||
printf("\nSorry, cannot open destination file\n"); |
|||
cpmbdos(&closesrc); |
|||
return(EXIT_FAILURE); |
|||
} |
|||
|
|||
rc = cpmbdos(&readsrc); printf("\nrc from read was %2d, ",rc); |
|||
while(0 == rc) { |
|||
rc = cpmbdos(&writedst); printf( "rc from write was %2d", rc); |
|||
rc = cpmbdos(&readsrc); printf("\nrc from read was %2d, ",rc); |
|||
} |
|||
rc = cpmbdos(&closesrc); printf("\nrc from closesrc was %2d, ",rc); |
|||
rc = cpmbdos(&closedst); printf( "rc from closedst was %2d", rc); |
|||
|
|||
return EXIT_SUCCESS; |
|||
} |
|||
|
|||
@ -1,9 +0,0 @@ |
|||
-mjx |
|||
-i copyfile.ihx |
|||
-k /usr/local/share/sdcc/lib/z80 |
|||
-l z80 |
|||
cpm0.rel |
|||
copyfile.rel |
|||
cpmbdos.rel |
|||
cprintf.rel |
|||
-e |
|||
@ -1,9 +0,0 @@ |
|||
-mjx |
|||
-i copyfile.ihx |
|||
-k /usr/local/share/sdcc/lib/z80 |
|||
-l z80 |
|||
cpm0.rel |
|||
copyfile.rel |
|||
cpmbdos.rel |
|||
cprintf.rel |
|||
-e |
|||
@ -1,46 +0,0 @@ |
|||
1 ;-------------------------------------------------------------------------- |
|||
2 ; cpm0.s - Generic cpm0.s for a Z80 CP/M-80 v2.2 Application |
|||
3 ; Copyright (C) 2011, Douglas Goodall All Rights Reserved. |
|||
4 ;-------------------------------------------------------------------------- |
|||
5 |
|||
6 .globl _main |
|||
7 .area _CODE |
|||
8 |
|||
0000 9 .ds 0x0100 |
|||
0100 10 init: |
|||
11 ;; Define an adequate stack |
|||
0100 31r00s01 12 ld sp,#stktop |
|||
13 |
|||
14 ;; Initialise global variables |
|||
0103 CDr00s00 15 call gsinit |
|||
16 |
|||
17 ;; Call the C main routine |
|||
0106 CDr00s00 18 call _main |
|||
19 |
|||
0109 0E 00 20 ld c,#0 |
|||
010B CD 05 00 21 call 5 |
|||
22 |
|||
23 ;; Ordering of segments for the linker. |
|||
24 .area _TPA |
|||
25 |
|||
26 .area _HOME |
|||
27 .area _CODE |
|||
28 .area _GSINIT |
|||
29 .area _GSFINAL |
|||
30 .area _DATA |
|||
31 |
|||
32 .area _STACK |
|||
0000 33 .ds 256 |
|||
0100 34 stktop: |
|||
35 |
|||
36 .area _GSINIT |
|||
0000 37 gsinit:: |
|||
38 |
|||
39 .area _GSFINAL |
|||
0000 C9 40 ret |
|||
0001 E5 41 .db 0xe5 |
|||
42 |
|||
43 ;;;;;;;;;;;;;;;; |
|||
44 ; eof - cpm0.s ; |
|||
45 ;;;;;;;;;;;;;;;; |
|||
46 |
|||
@ -1,26 +0,0 @@ |
|||
XL |
|||
H 7 areas 3 global symbols |
|||
S _main Ref0000 |
|||
S .__.ABS. Def0000 |
|||
A _CODE size 10E flags 0 addr 0 |
|||
A _TPA size 0 flags 0 addr 0 |
|||
A _HOME size 0 flags 0 addr 0 |
|||
A _GSINIT size 0 flags 0 addr 0 |
|||
S gsinit Def0000 |
|||
A _GSFINAL size 2 flags 0 addr 0 |
|||
A _DATA size 0 flags 0 addr 0 |
|||
A _STACK size 100 flags 0 addr 0 |
|||
T 00 00 |
|||
R 00 00 00 00 |
|||
T 00 01 |
|||
R 00 00 00 00 |
|||
T 00 01 31 00 01 CD 00 00 CD 00 00 0E 00 CD 05 00 |
|||
R 00 00 00 00 00 03 06 00 00 06 03 00 02 09 00 00 |
|||
T 00 00 |
|||
R 00 00 06 00 |
|||
T 00 01 |
|||
R 00 00 06 00 |
|||
T 00 00 |
|||
R 00 00 03 00 |
|||
T 00 00 C9 E5 |
|||
R 00 00 04 00 |
|||
@ -1,46 +0,0 @@ |
|||
;-------------------------------------------------------------------------- |
|||
; cpm0.s - Generic cpm0.s for a Z80 CP/M-80 v2.2 Application |
|||
; Copyright (C) 2011, Douglas Goodall All Rights Reserved. |
|||
;-------------------------------------------------------------------------- |
|||
|
|||
.globl _main |
|||
.area _CODE |
|||
|
|||
.ds 0x0100 |
|||
init: |
|||
;; Define an adequate stack |
|||
ld sp,#stktop |
|||
|
|||
;; Initialise global variables |
|||
call gsinit |
|||
|
|||
;; Call the C main routine |
|||
call _main |
|||
|
|||
ld c,#0 |
|||
call 5 |
|||
|
|||
;; Ordering of segments for the linker. |
|||
.area _TPA |
|||
|
|||
.area _HOME |
|||
.area _CODE |
|||
.area _GSINIT |
|||
.area _GSFINAL |
|||
.area _DATA |
|||
|
|||
.area _STACK |
|||
.ds 256 |
|||
stktop: |
|||
|
|||
.area _GSINIT |
|||
gsinit:: |
|||
|
|||
.area _GSFINAL |
|||
ret |
|||
.db 0xe5 |
|||
|
|||
;;;;;;;;;;;;;;;; |
|||
; eof - cpm0.s ; |
|||
;;;;;;;;;;;;;;;; |
|||
|
|||
@ -1,17 +0,0 @@ |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 1. |
|||
|
|||
Symbol Table |
|||
|
|||
.__.ABS.= 0000 G | _main **** GX | 3 gsinit 0000 GR |
|||
0 init 0100 R | 6 stktop 0100 R |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 2. |
|||
|
|||
Area Table |
|||
|
|||
0 _CODE size 10E flags 0 |
|||
1 _TPA size 0 flags 0 |
|||
2 _HOME size 0 flags 0 |
|||
3 _GSINIT size 0 flags 0 |
|||
4 _GSFINAL size 2 flags 0 |
|||
5 _DATA size 0 flags 0 |
|||
6 _STACK size 100 flags 0 |
|||
File diff suppressed because it is too large
@ -1,65 +0,0 @@ |
|||
1 ;-------------------------------------------------------- |
|||
2 ; File Created by SDCC : free open source ANSI-C Compiler |
|||
3 ; Version 3.0.2 #6489 (May 10 2011) (Mac OS X x86_64) |
|||
4 ; This file was generated Wed May 11 05:28:20 2011 |
|||
5 ;-------------------------------------------------------- |
|||
6 .module cpmbdos |
|||
7 .optsdcc -mz80 |
|||
8 |
|||
9 ;-------------------------------------------------------- |
|||
10 ; Public variables in this module |
|||
11 ;-------------------------------------------------------- |
|||
12 .globl _cpmbdos |
|||
13 ;-------------------------------------------------------- |
|||
14 ; special function registers |
|||
15 ;-------------------------------------------------------- |
|||
16 ;-------------------------------------------------------- |
|||
17 ; ram data |
|||
18 ;-------------------------------------------------------- |
|||
19 .area _DATA |
|||
20 ;-------------------------------------------------------- |
|||
21 ; overlayable items in ram |
|||
22 ;-------------------------------------------------------- |
|||
23 .area _OVERLAY |
|||
24 ;-------------------------------------------------------- |
|||
25 ; external initialized ram data |
|||
26 ;-------------------------------------------------------- |
|||
27 ;-------------------------------------------------------- |
|||
28 ; global & static initialisations |
|||
29 ;-------------------------------------------------------- |
|||
30 .area _HOME |
|||
31 .area _GSINIT |
|||
32 .area _GSFINAL |
|||
33 .area _GSINIT |
|||
34 ;-------------------------------------------------------- |
|||
35 ; Home |
|||
36 ;-------------------------------------------------------- |
|||
37 .area _HOME |
|||
38 .area _HOME |
|||
39 ;-------------------------------------------------------- |
|||
40 ; code |
|||
41 ;-------------------------------------------------------- |
|||
42 .area _CODE |
|||
43 ;cpmbdos.c:1: unsigned char cpmbdos(void * p) |
|||
44 ; --------------------------------- |
|||
45 ; Function cpmbdos |
|||
46 ; --------------------------------- |
|||
0000 47 _cpmbdos_start:: |
|||
0000 48 _cpmbdos: |
|||
0000 DD E5 49 push ix |
|||
0002 DD 21 00 00 50 ld ix,#0 |
|||
0006 DD 39 51 add ix,sp |
|||
52 ;cpmbdos.c:3: return 2; |
|||
0008 DD 6E 04 53 ld l,4(ix) |
|||
000B DD 66 05 54 ld h,5(ix) |
|||
000E 4E 55 ld c,(hl) |
|||
000F 23 56 inc hl |
|||
0010 5E 57 ld e,(hl) |
|||
0011 23 58 inc hl |
|||
0012 56 59 ld d,(hl) |
|||
0013 CD 05 00 60 call 5 |
|||
0016 DD E1 61 pop ix |
|||
0018 C9 62 ret |
|||
0019 63 _cpmbdos_end:: |
|||
64 .area _CODE |
|||
65 .area _CABS |
|||
@ -1,25 +0,0 @@ |
|||
XL |
|||
H 7 areas 4 global symbols |
|||
M cpmbdos |
|||
O -mz80 |
|||
S .__.ABS. Def0000 |
|||
A _CODE size 19 flags 0 addr 0 |
|||
S _cpmbdos Def0000 |
|||
S _cpmbdos_start Def0000 |
|||
S _cpmbdos_end Def0019 |
|||
A _DATA size 0 flags 0 addr 0 |
|||
A _OVERLAY size 0 flags 0 addr 0 |
|||
A _HOME size 0 flags 0 addr 0 |
|||
A _GSINIT size 0 flags 0 addr 0 |
|||
A _GSFINAL size 0 flags 0 addr 0 |
|||
A _CABS size 0 flags 0 addr 0 |
|||
T 00 00 |
|||
R 00 00 00 00 |
|||
T 00 00 |
|||
R 00 00 00 00 |
|||
T 00 00 DD E5 DD 21 00 00 DD 39 DD 6E 04 DD 66 05 |
|||
R 00 00 00 00 |
|||
T 0E 00 4E 23 5E 23 56 CD 05 00 DD E1 C9 |
|||
R 00 00 00 00 |
|||
T 19 00 |
|||
R 00 00 00 00 |
|||
@ -1,65 +0,0 @@ |
|||
;-------------------------------------------------------- |
|||
; File Created by SDCC : free open source ANSI-C Compiler |
|||
; Version 3.0.2 #6489 (May 10 2011) (Mac OS X x86_64) |
|||
; This file was generated Wed May 11 05:28:20 2011 |
|||
;-------------------------------------------------------- |
|||
.module cpmbdos |
|||
.optsdcc -mz80 |
|||
|
|||
;-------------------------------------------------------- |
|||
; Public variables in this module |
|||
;-------------------------------------------------------- |
|||
.globl _cpmbdos |
|||
;-------------------------------------------------------- |
|||
; special function registers |
|||
;-------------------------------------------------------- |
|||
;-------------------------------------------------------- |
|||
; ram data |
|||
;-------------------------------------------------------- |
|||
.area _DATA |
|||
;-------------------------------------------------------- |
|||
; overlayable items in ram |
|||
;-------------------------------------------------------- |
|||
.area _OVERLAY |
|||
;-------------------------------------------------------- |
|||
; external initialized ram data |
|||
;-------------------------------------------------------- |
|||
;-------------------------------------------------------- |
|||
; global & static initialisations |
|||
;-------------------------------------------------------- |
|||
.area _HOME |
|||
.area _GSINIT |
|||
.area _GSFINAL |
|||
.area _GSINIT |
|||
;-------------------------------------------------------- |
|||
; Home |
|||
;-------------------------------------------------------- |
|||
.area _HOME |
|||
.area _HOME |
|||
;-------------------------------------------------------- |
|||
; code |
|||
;-------------------------------------------------------- |
|||
.area _CODE |
|||
;cpmbdos.c:1: unsigned char cpmbdos(void * p) |
|||
; --------------------------------- |
|||
; Function cpmbdos |
|||
; --------------------------------- |
|||
_cpmbdos_start:: |
|||
_cpmbdos: |
|||
push ix |
|||
ld ix,#0 |
|||
add ix,sp |
|||
;cpmbdos.c:3: return 2; |
|||
ld l,4(ix) |
|||
ld h,5(ix) |
|||
ld c,(hl) |
|||
inc hl |
|||
ld e,(hl) |
|||
inc hl |
|||
ld d,(hl) |
|||
call 5 |
|||
pop ix |
|||
ret |
|||
_cpmbdos_end:: |
|||
.area _CODE |
|||
.area _CABS |
|||
@ -1,17 +0,0 @@ |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 1. |
|||
|
|||
Symbol Table |
|||
|
|||
.__.ABS.= 0000 G | 0 _cpmbdos 0000 GR | 0 _cpmbdos 0019 GR |
|||
0 _cpmbdos 0000 GR |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 2. |
|||
|
|||
Area Table |
|||
|
|||
0 _CODE size 19 flags 0 |
|||
1 _DATA size 0 flags 0 |
|||
2 _OVERLAY size 0 flags 0 |
|||
3 _HOME size 0 flags 0 |
|||
4 _GSINIT size 0 flags 0 |
|||
5 _GSFINAL size 0 flags 0 |
|||
6 _CABS size 0 flags 0 |
|||
@ -1,267 +0,0 @@ |
|||
/* Copyright (C) 1996 Robert de Bath <robert@mayday.compulink.co.uk>
|
|||
* This file is part of the Linux-8086 C library and is distributed |
|||
* under the GNU Library General Public License. |
|||
*/ |
|||
|
|||
/* Modified 14-Jan-2002 by John Coffman <johninsd@san.rr.com> for inclusion
|
|||
* in the set of LILO diagnostics. This code is the property of Robert |
|||
* de Bath, and is used with his permission. |
|||
*/ |
|||
|
|||
/* Modified 14-Sep-2010 by John Coffman <johninsd@gmail.com> for use with
|
|||
* the N8VEM SBC-188 BIOS project. |
|||
*/ |
|||
#include <stdlib.h> |
|||
#include <stdarg.h> |
|||
|
|||
#undef printf |
|||
#define ASM_CVT 0 |
|||
#ifndef strlen |
|||
int strlen(char *s); |
|||
#endif |
|||
|
|||
void outchar(char ch); |
|||
#define putch(ch) outchar((char)ch) |
|||
|
|||
|
|||
#ifndef NULL |
|||
# define NULL ((void*)0L) |
|||
#endif |
|||
|
|||
#define __fastcall |
|||
#define NUMLTH 11 |
|||
static unsigned char * __fastcall __numout(long i, int base, unsigned char out[]); |
|||
|
|||
int cprintf(const char * fmt, ...) |
|||
{ |
|||
register int c; |
|||
int count = 0; |
|||
int type, base; |
|||
long val; |
|||
char * cp; |
|||
char padch=' '; |
|||
int minsize, maxsize; |
|||
unsigned char out[NUMLTH+1]; |
|||
va_list ap; |
|||
|
|||
va_start(ap, fmt); |
|||
|
|||
while(c=*fmt++) |
|||
{ |
|||
count++; |
|||
if(c!='%') |
|||
{ |
|||
if (c=='\n') putch('\r'); |
|||
putch(c); |
|||
} |
|||
else |
|||
{ |
|||
type=1; |
|||
padch = *fmt; |
|||
maxsize=minsize=0; |
|||
if(padch == '-') fmt++; |
|||
|
|||
for(;;) |
|||
{ |
|||
c=*fmt++; |
|||
if( c<'0' || c>'9' ) break; |
|||
minsize*=10; minsize+=c-'0'; |
|||
} |
|||
|
|||
if( c == '.' ) |
|||
for(;;) |
|||
{ |
|||
c=*fmt++; |
|||
if( c<'0' || c>'9' ) break; |
|||
maxsize*=10; maxsize+=c-'0'; |
|||
} |
|||
|
|||
if( padch == '-' ) minsize = -minsize; |
|||
else |
|||
if( padch != '0' ) padch=' '; |
|||
|
|||
if( c == 0 ) break; |
|||
if(c=='h') |
|||
{ |
|||
c=*fmt++; |
|||
type = 0; |
|||
} |
|||
else if(c=='l') |
|||
{ |
|||
c=*fmt++; |
|||
type = 2; |
|||
} |
|||
|
|||
switch(c) |
|||
{ |
|||
case 'X': |
|||
case 'x': base=16; type |= 4; if(0) { |
|||
case 'o': base= 8; type |= 4; } if(0) { |
|||
case 'u': base=10; type |= 4; } if(0) { |
|||
case 'd': base=-10; } |
|||
switch(type) |
|||
{ |
|||
case 0: val=va_arg(ap, short); break; |
|||
case 1: val=va_arg(ap, int); break; |
|||
case 2: val=va_arg(ap, long); break; |
|||
case 4: val=va_arg(ap, unsigned short); break; |
|||
case 5: val=va_arg(ap, unsigned int); break; |
|||
case 6: val=va_arg(ap, unsigned long); break; |
|||
default:val=0; break; |
|||
} |
|||
cp = __numout(val,base,out); |
|||
if(0) { |
|||
case 's': |
|||
cp=va_arg(ap, char *); |
|||
} |
|||
count--; |
|||
c = strlen(cp); |
|||
if( !maxsize ) maxsize = c; |
|||
if( minsize > 0 ) |
|||
{ |
|||
minsize -= c; |
|||
while(minsize>0) { putch(padch); count++; minsize--; } |
|||
minsize=0; |
|||
} |
|||
if( minsize < 0 ) minsize= -minsize-c; |
|||
while(*cp && maxsize-->0 ) |
|||
{ |
|||
putch(*cp++); |
|||
count++; |
|||
} |
|||
while(minsize>0) { putch(' '); count++; minsize--; } |
|||
break; |
|||
case 'c': |
|||
putch(va_arg(ap, int)); |
|||
break; |
|||
default: |
|||
putch(c); |
|||
break; |
|||
} |
|||
} |
|||
} |
|||
va_end(ap); |
|||
return count; |
|||
} |
|||
|
|||
const char nstring[]="0123456789ABCDEF"; |
|||
|
|||
#if ASM_CVT==0 |
|||
|
|||
static unsigned char * |
|||
__fastcall |
|||
__numout(long i, int base, unsigned char *out) |
|||
{ |
|||
int n; |
|||
int flg = 0; |
|||
unsigned long val; |
|||
|
|||
if (base<0) |
|||
{ |
|||
base = -base; |
|||
if (i<0) |
|||
{ |
|||
flg = 1; |
|||
i = -i; |
|||
} |
|||
} |
|||
val = i; |
|||
|
|||
out[NUMLTH] = '\0'; |
|||
n = NUMLTH-1; |
|||
do |
|||
{ |
|||
#if 1 |
|||
out[n] = nstring[val % base]; |
|||
val /= base; |
|||
--n; |
|||
#else |
|||
out[n--] = nstring[remLS(val,base)]; |
|||
val = divLS(val,base); |
|||
#endif |
|||
} |
|||
while(val); |
|||
if(flg) out[n--] = '-'; |
|||
|
|||
return &out[n+1]; |
|||
} |
|||
#else |
|||
|
|||
#asm |
|||
! numout.s |
|||
! |
|||
#if 0 |
|||
.data |
|||
_nstring: |
|||
.ascii "0123456789ABCDEF" |
|||
.byte 0 |
|||
#endif |
|||
|
|||
.bss |
|||
___out lcomm $C |
|||
|
|||
.text |
|||
___numout: |
|||
push bp |
|||
mov bp,sp |
|||
push di |
|||
push si |
|||
add sp,*-4 |
|||
mov byte ptr -8[bp],*$0 ! flg = 0 |
|||
mov si,4[bp] ; i or val.lo |
|||
mov di,6[bp] ; i or val.hi |
|||
mov cx,8[bp] ; base |
|||
test cx,cx ! base < 0 ? |
|||
jge .3num |
|||
neg cx ! base = -base |
|||
or di,di ! i < 0 ? |
|||
jns .5num |
|||
mov byte ptr -8[bp],*1 ! flg = 1 |
|||
neg di ! i = -i |
|||
neg si |
|||
sbb di,*0 |
|||
.5num: |
|||
.3num: |
|||
mov byte ptr [___out+$B],*$0 ! out[11] = nul |
|||
mov -6[bp],*$A ! n = 10 |
|||
|
|||
.9num: |
|||
!!! out[n--] = nstring[val % base]; |
|||
xor dx,dx |
|||
xchg ax,di |
|||
div cx |
|||
xchg ax,di |
|||
xchg ax,si |
|||
div cx |
|||
xchg ax,si ! val(new) = val / base |
|||
|
|||
mov bx,dx ! dx = val % base |
|||
|
|||
mov al,_nstring[bx] |
|||
mov bx,-6[bp] |
|||
dec word ptr -6[bp] |
|||
mov ___out[bx],al |
|||
|
|||
mov ax,si |
|||
or ax,di ! while (val) |
|||
jne .9num |
|||
|
|||
cmp byte ptr -8[bp],*$0 ! flg == 0 ? |
|||
je .Dnum |
|||
|
|||
mov bx,-6[bp] |
|||
dec word ptr -6[bp] |
|||
mov byte ptr ___out[bx],*$2D ! out[n--] = minus |
|||
|
|||
.Dnum: |
|||
mov ax,-6[bp] |
|||
add ax,#___out+1 |
|||
|
|||
add sp,*4 |
|||
pop si |
|||
pop di |
|||
pop bp |
|||
ret |
|||
#endasm |
|||
|
|||
#endif |
|||
@ -1,97 +0,0 @@ |
|||
1 ; modified 4/22/2011 for the N8VEM Home Computer Z180 -- John Coffman |
|||
2 ; |
|||
3 ;-------------------------------------------------------------------------- |
|||
4 ; crt0.s - Generic crt0.s for a Z80 |
|||
5 ; |
|||
6 ; Copyright (C) 2000, Michael Hope |
|||
7 ; |
|||
8 ; This library is free software; you can redistribute it and/or modify it |
|||
9 ; under the terms of the GNU General Public License as published by the |
|||
10 ; Free Software Foundation; either version 2.1, or (at your option) any |
|||
11 ; later version. |
|||
12 ; |
|||
13 ; This library is distributed in the hope that it will be useful, |
|||
14 ; but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
15 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
16 ; GNU General Public License for more details. |
|||
17 ; |
|||
18 ; You should have received a copy of the GNU General Public License |
|||
19 ; along with this library; see the file COPYING. If not, write to the |
|||
20 ; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, |
|||
21 ; MA 02110-1301, USA. |
|||
22 ; |
|||
23 ; As a special exception, if you link this library with other files, |
|||
24 ; some of which are compiled with SDCC, to produce an executable, |
|||
25 ; this library does not by itself cause the resulting executable to |
|||
26 ; be covered by the GNU General Public License. This exception does |
|||
27 ; not however invalidate any other reasons why the executable file |
|||
28 ; might be covered by the GNU General Public License. |
|||
29 ;-------------------------------------------------------------------------- |
|||
30 |
|||
31 ;;; .module crt0 |
|||
32 .globl _main |
|||
33 |
|||
34 .area _HEADER (ABS) |
|||
35 ;; Reset vector |
|||
0000 36 .org 0 |
|||
0000 C3r00s01 37 jp init |
|||
38 |
|||
0008 39 .org 0x08 |
|||
0008 C9 40 ret |
|||
0010 41 .org 0x10 |
|||
0010 C9 42 ret |
|||
0018 43 .org 0x18 |
|||
0018 C9 44 ret |
|||
0020 45 .org 0x20 |
|||
0020 C9 46 ret |
|||
0028 47 .org 0x28 |
|||
0028 C9 48 ret |
|||
0030 49 .org 0x30 |
|||
0030 C9 50 ret |
|||
0038 51 .org 0x38 |
|||
0038 C9 52 ret |
|||
0066 53 .org 0x66 ; NMI interrupt |
|||
0066 ED 45 54 retn |
|||
55 |
|||
0100 56 .org 0x100 |
|||
0100 57 init: |
|||
58 ;; Stack at the top of memory. |
|||
0100 31 FF FF 59 ld sp,#0xffff |
|||
60 |
|||
61 ;; Initialise global variables |
|||
0103 CDr00s00 62 call gsinit |
|||
0106 CDr00s00 63 call _main |
|||
0109 C3r00s00 64 jp _exit |
|||
65 |
|||
66 ;; Ordering of segments for the linker. |
|||
67 .area _HOME |
|||
68 .area _CODE |
|||
69 .area _GSINIT |
|||
70 .area _GSFINAL |
|||
71 |
|||
72 .area _DATA |
|||
73 .area _BSEG |
|||
74 .area _BSS |
|||
75 .area _HEAP |
|||
76 |
|||
77 .area _CODE |
|||
0000 78 .if 0 |
|||
79 __clock:: |
|||
80 ld a,#2 |
|||
81 rst 0x08 |
|||
82 ret |
|||
83 .endif |
|||
84 |
|||
0000 85 _exit:: |
|||
86 ;; Exit - special code to the emulator |
|||
0000 3E 00 87 ld a,#0 |
|||
0002 CF 88 rst 0x08 |
|||
0003 89 1$: |
|||
0003 76 90 halt |
|||
0004 18 FD 91 jr 1$ |
|||
92 |
|||
93 .area _GSINIT |
|||
0000 94 gsinit:: |
|||
95 |
|||
96 .area _GSFINAL |
|||
0000 C9 97 ret |
|||
@ -1,79 +0,0 @@ |
|||
XL |
|||
H 13 areas 4 global symbols |
|||
S _main Ref0000 |
|||
S .__.ABS. Def0000 |
|||
A _CODE size 6 flags 0 addr 0 |
|||
S _exit Def0000 |
|||
A _HEADER size 0 flags 8 addr 0 |
|||
A _HEADER0 size 3 flags 8 addr 0 |
|||
A _HEADER1 size 1 flags 8 addr 8 |
|||
A _HEADER2 size 1 flags 8 addr 10 |
|||
A _HEADER3 size 1 flags 8 addr 18 |
|||
A _HEADER4 size 1 flags 8 addr 20 |
|||
A _HEADER5 size 1 flags 8 addr 28 |
|||
A _HEADER6 size 1 flags 8 addr 30 |
|||
A _HEADER7 size 1 flags 8 addr 38 |
|||
A _HEADER8 size 2 flags 8 addr 66 |
|||
A _HEADER9 size C flags 8 addr 100 |
|||
A _HOME size 0 flags 0 addr 0 |
|||
A _GSINIT size 0 flags 0 addr 0 |
|||
S gsinit Def0000 |
|||
A _GSFINAL size 1 flags 0 addr 0 |
|||
A _DATA size 0 flags 0 addr 0 |
|||
A _BSEG size 0 flags 0 addr 0 |
|||
A _BSS size 0 flags 0 addr 0 |
|||
A _HEAP size 0 flags 0 addr 0 |
|||
T 00 00 |
|||
R 00 00 02 00 |
|||
T 00 00 C3 00 01 |
|||
R 00 00 02 00 00 03 0B 00 |
|||
T 08 00 |
|||
R 00 00 03 00 |
|||
T 08 00 C9 |
|||
R 00 00 03 00 |
|||
T 10 00 |
|||
R 00 00 04 00 |
|||
T 10 00 C9 |
|||
R 00 00 04 00 |
|||
T 18 00 |
|||
R 00 00 05 00 |
|||
T 18 00 C9 |
|||
R 00 00 05 00 |
|||
T 20 00 |
|||
R 00 00 06 00 |
|||
T 20 00 C9 |
|||
R 00 00 06 00 |
|||
T 28 00 |
|||
R 00 00 07 00 |
|||
T 28 00 C9 |
|||
R 00 00 07 00 |
|||
T 30 00 |
|||
R 00 00 08 00 |
|||
T 30 00 C9 |
|||
R 00 00 08 00 |
|||
T 38 00 |
|||
R 00 00 09 00 |
|||
T 38 00 C9 |
|||
R 00 00 09 00 |
|||
T 66 00 |
|||
R 00 00 0A 00 |
|||
T 66 00 ED 45 |
|||
R 00 00 0A 00 |
|||
T 00 01 |
|||
R 00 00 0B 00 |
|||
T 00 01 |
|||
R 00 00 0B 00 |
|||
T 00 01 31 FF FF CD 00 00 CD 00 00 C3 00 00 |
|||
R 00 00 0B 00 00 06 0D 00 02 09 00 00 00 0C 00 00 |
|||
T 00 00 |
|||
R 00 00 00 00 |
|||
T 00 00 3E 00 CF |
|||
R 00 00 00 00 |
|||
T 03 00 |
|||
R 00 00 00 00 |
|||
T 03 00 76 18 FD |
|||
R 00 00 00 00 |
|||
T 00 00 |
|||
R 00 00 0D 00 |
|||
T 00 00 C9 |
|||
R 00 00 0E 00 |
|||
@ -1,97 +0,0 @@ |
|||
; modified 4/22/2011 for the N8VEM Home Computer Z180 -- John Coffman |
|||
; |
|||
;-------------------------------------------------------------------------- |
|||
; crt0.s - Generic crt0.s for a Z80 |
|||
; |
|||
; Copyright (C) 2000, Michael Hope |
|||
; |
|||
; This library is free software; you can redistribute it and/or modify it |
|||
; under the terms of the GNU General Public License as published by the |
|||
; Free Software Foundation; either version 2.1, or (at your option) any |
|||
; later version. |
|||
; |
|||
; This library is distributed in the hope that it will be useful, |
|||
; but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
; GNU General Public License for more details. |
|||
; |
|||
; You should have received a copy of the GNU General Public License |
|||
; along with this library; see the file COPYING. If not, write to the |
|||
; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, |
|||
; MA 02110-1301, USA. |
|||
; |
|||
; As a special exception, if you link this library with other files, |
|||
; some of which are compiled with SDCC, to produce an executable, |
|||
; this library does not by itself cause the resulting executable to |
|||
; be covered by the GNU General Public License. This exception does |
|||
; not however invalidate any other reasons why the executable file |
|||
; might be covered by the GNU General Public License. |
|||
;-------------------------------------------------------------------------- |
|||
|
|||
;;; .module crt0 |
|||
.globl _main |
|||
|
|||
.area _HEADER (ABS) |
|||
;; Reset vector |
|||
.org 0 |
|||
jp init |
|||
|
|||
.org 0x08 |
|||
ret |
|||
.org 0x10 |
|||
ret |
|||
.org 0x18 |
|||
ret |
|||
.org 0x20 |
|||
ret |
|||
.org 0x28 |
|||
ret |
|||
.org 0x30 |
|||
ret |
|||
.org 0x38 |
|||
ret |
|||
.org 0x66 ; NMI interrupt |
|||
retn |
|||
|
|||
.org 0x100 |
|||
init: |
|||
;; Stack at the top of memory. |
|||
ld sp,#0xffff |
|||
|
|||
;; Initialise global variables |
|||
call gsinit |
|||
call _main |
|||
jp _exit |
|||
|
|||
;; Ordering of segments for the linker. |
|||
.area _HOME |
|||
.area _CODE |
|||
.area _GSINIT |
|||
.area _GSFINAL |
|||
|
|||
.area _DATA |
|||
.area _BSEG |
|||
.area _BSS |
|||
.area _HEAP |
|||
|
|||
.area _CODE |
|||
.if 0 |
|||
__clock:: |
|||
ld a,#2 |
|||
rst 0x08 |
|||
ret |
|||
.endif |
|||
|
|||
_exit:: |
|||
;; Exit - special code to the emulator |
|||
ld a,#0 |
|||
rst 0x08 |
|||
1$: |
|||
halt |
|||
jr 1$ |
|||
|
|||
.area _GSINIT |
|||
gsinit:: |
|||
|
|||
.area _GSFINAL |
|||
ret |
|||
@ -1,29 +0,0 @@ |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 1. |
|||
|
|||
Symbol Table |
|||
|
|||
.__.ABS.= 0000 G | 0 _exit 0000 GR | _main **** GX |
|||
D gsinit 0000 GR | B init 0100 R |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 2. |
|||
|
|||
Area Table |
|||
|
|||
0 _CODE size 6 flags 0 |
|||
1 _HEADER size 0 flags 8 |
|||
2 _HEADER0 size 3 flags 8 |
|||
3 _HEADER1 size 1 flags 8 |
|||
4 _HEADER2 size 1 flags 8 |
|||
5 _HEADER3 size 1 flags 8 |
|||
6 _HEADER4 size 1 flags 8 |
|||
7 _HEADER5 size 1 flags 8 |
|||
8 _HEADER6 size 1 flags 8 |
|||
9 _HEADER7 size 1 flags 8 |
|||
A _HEADER8 size 2 flags 8 |
|||
B _HEADER9 size C flags 8 |
|||
C _HOME size 0 flags 0 |
|||
D _GSINIT size 0 flags 0 |
|||
E _GSFINAL size 1 flags 0 |
|||
F _DATA size 0 flags 0 |
|||
10 _BSEG size 0 flags 0 |
|||
11 _BSS size 0 flags 0 |
|||
12 _HEAP size 0 flags 0 |
|||
@ -1,9 +0,0 @@ |
|||
1 ;-------------------------------------------------------------------------- |
|||
2 ; crt0jplp.s 8/7/2011 dwg - - Generic crt0.s for a Z80 with jump loop |
|||
3 ;-------------------------------------------------------------------------- |
|||
4 |
|||
5 .area _HEADER (ABS) |
|||
0000 6 .org 0 |
|||
0000 C3r00s00 7 jploop: jp jploop |
|||
8 |
|||
9 |
|||
@ -1,10 +0,0 @@ |
|||
XL |
|||
H 3 areas 1 global symbols |
|||
S .__.ABS. Def0000 |
|||
A _CODE size 0 flags 0 addr 0 |
|||
A _HEADER size 0 flags 8 addr 0 |
|||
A _HEADER0 size 3 flags 8 addr 0 |
|||
T 00 00 |
|||
R 00 00 02 00 |
|||
T 00 00 C3 00 00 |
|||
R 00 00 02 00 00 03 02 00 |
|||
@ -1,9 +0,0 @@ |
|||
;-------------------------------------------------------------------------- |
|||
; crt0jplp.s 8/7/2011 dwg - - Generic crt0.s for a Z80 with jump loop |
|||
;-------------------------------------------------------------------------- |
|||
|
|||
.area _HEADER (ABS) |
|||
.org 0 |
|||
jploop: jp jploop |
|||
|
|||
|
|||
@ -1,12 +0,0 @@ |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 1. |
|||
|
|||
Symbol Table |
|||
|
|||
.__.ABS.= 0000 G | 2 jploop 0000 R |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 2. |
|||
|
|||
Area Table |
|||
|
|||
0 _CODE size 0 flags 0 |
|||
1 _HEADER size 0 flags 8 |
|||
2 _HEADER0 size 3 flags 8 |
|||
@ -1,72 +0,0 @@ |
|||
1 ;-------------------------------------------------------------------------- |
|||
2 ; crt0scrm.s 8/7/2011 dwg - - Generic crt0.s for a Z80 with jump loop |
|||
3 ;-------------------------------------------------------------------------- |
|||
4 |
|||
5 |
|||
6 .area _HEADER (ABS) |
|||
0000 7 .org 0 |
|||
8 |
|||
9 .include "scsi2ide.inc" |
|||
1 ; scsi2ide.inc 8/7/2011 dwg - macros describing the N8VEM SCSI2IDE |
|||
2 |
|||
0000 3 SCSI2IDE_IO_BASE = 0 |
|||
4 |
|||
0010 5 UART_IO_BASE = SCSI2IDE_IO_BASE+16 |
|||
6 |
|||
0010 7 rUART_RDR = UART_IO_BASE + 0 |
|||
0010 8 wUART_TDR = UART_IO_BASE + 0 |
|||
0010 9 wUART_DIV_LO = UART_IO_BASE + 0 |
|||
0011 10 wUART_DIV_HI = UART_IO_BASE + 1 |
|||
0011 11 wUART_IER = UART_IO_BASE + 1 |
|||
0012 12 rUART_IIR = UART_IO_BASE + 2 |
|||
0013 13 wUART_LCR = UART_IO_BASE + 3 |
|||
0014 14 wUART_MCR = UART_IO_BASE + 4 |
|||
0015 15 rUART_LSR = UART_IO_BASE + 5 |
|||
0016 16 rUART_MSR = UART_IO_BASE + 6 |
|||
0017 17 wUART_FCR = UART_IO_BASE + 7 |
|||
18 |
|||
19 ; eof - scsi2ide.inc |
|||
20 |
|||
10 .include "ns16550.inc" |
|||
1 ; ns16550.inc 8/7/2011 dwg - National 16550 |
|||
2 |
|||
0080 3 UART_DLAB = 0x80 |
|||
000C 4 UART_BAUD_9600 = 12 |
|||
0001 5 UART_RDA = 0x01 |
|||
0020 6 UART_TBE = 0x20 |
|||
7 |
|||
8 ; eof - ns16550.inc |
|||
11 |
|||
0000 12 scream: |
|||
13 |
|||
0000 3E 80 14 ld a,#UART_DLAB |
|||
0002 D3 13 15 out (wUART_LCR),a |
|||
16 |
|||
0004 3E 00 17 ld a,#0x00 |
|||
0006 D3 11 18 out (wUART_DIV_HI),a |
|||
19 |
|||
0008 3E 0C 20 ld a,#UART_BAUD_9600 |
|||
000A D3 10 21 out (wUART_DIV_LO),a |
|||
22 |
|||
000C 3E 00 23 ld a,#0 |
|||
000E D3 13 24 out (wUART_LCR),a |
|||
25 |
|||
0010 3E 03 26 ld a,#0x03 |
|||
0012 D3 13 27 out (wUART_LCR),a |
|||
28 |
|||
0014 3E 03 29 ld a,#0x03 |
|||
0016 D3 14 30 out (wUART_MCR),a |
|||
31 |
|||
0018 32 scrmlp: |
|||
0018 DB 15 33 in a,(rUART_LSR) |
|||
001A E6 20 34 and a,#UART_TBE |
|||
001C CAr18s00 35 jp z,scrmlp |
|||
36 |
|||
001F 3E 30 37 ld a,#0x30 ; ascii 0 (zero) |
|||
0021 D3 10 38 out (wUART_TDR),a |
|||
39 |
|||
0023 C3r18s00 40 jp scrmlp |
|||
41 |
|||
42 |
|||
43 |
|||
44 |
|||
@ -1,18 +0,0 @@ |
|||
XL |
|||
H 3 areas 1 global symbols |
|||
S .__.ABS. Def0000 |
|||
A _CODE size 0 flags 0 addr 0 |
|||
A _HEADER size 0 flags 8 addr 0 |
|||
A _HEADER0 size 26 flags 8 addr 0 |
|||
T 00 00 |
|||
R 00 00 02 00 |
|||
T 00 00 |
|||
R 00 00 02 00 |
|||
T 00 00 3E 80 D3 13 3E 00 D3 11 3E 0C D3 10 3E 00 |
|||
R 00 00 02 00 |
|||
T 0E 00 D3 13 3E 03 D3 13 3E 03 D3 14 |
|||
R 00 00 02 00 |
|||
T 18 00 |
|||
R 00 00 02 00 |
|||
T 18 00 DB 15 E6 20 CA 18 00 3E 30 D3 10 C3 18 00 |
|||
R 00 00 02 00 00 07 02 00 00 0E 02 00 |
|||
@ -1,44 +0,0 @@ |
|||
;-------------------------------------------------------------------------- |
|||
; crt0scrm.s 8/7/2011 dwg - - Generic crt0.s for a Z80 with jump loop |
|||
;-------------------------------------------------------------------------- |
|||
|
|||
|
|||
.area _HEADER (ABS) |
|||
.org 0 |
|||
|
|||
.include "scsi2ide.inc" |
|||
.include "ns16550.inc" |
|||
|
|||
scream: |
|||
|
|||
ld a,#UART_DLAB |
|||
out (wUART_LCR),a |
|||
|
|||
ld a,#0x00 |
|||
out (wUART_DIV_HI),a |
|||
|
|||
ld a,#UART_BAUD_9600 |
|||
out (wUART_DIV_LO),a |
|||
|
|||
ld a,#0 |
|||
out (wUART_LCR),a |
|||
|
|||
ld a,#0x03 |
|||
out (wUART_LCR),a |
|||
|
|||
ld a,#0x03 |
|||
out (wUART_MCR),a |
|||
|
|||
scrmlp: |
|||
in a,(rUART_LSR) |
|||
and a,#UART_TBE |
|||
jp z,scrmlp |
|||
|
|||
ld a,#0x30 ; ascii 0 (zero) |
|||
out (wUART_TDR),a |
|||
|
|||
jp scrmlp |
|||
|
|||
|
|||
|
|||
|
|||
@ -1,18 +0,0 @@ |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 1. |
|||
|
|||
Symbol Table |
|||
|
|||
.__.ABS.= 0000 G | SCSI2IDE= 0000 | UART_BAU= 000C |
|||
UART_DLA= 0080 | UART_IO_= 0010 | UART_RDA= 0001 |
|||
UART_TBE= 0020 | rUART_II= 0012 | rUART_LS= 0015 |
|||
rUART_MS= 0016 | rUART_RD= 0010 | 2 scream 0000 R |
|||
2 scrmlp 0018 R | wUART_DI= 0011 | wUART_DI= 0010 |
|||
wUART_FC= 0017 | wUART_IE= 0011 | wUART_LC= 0013 |
|||
wUART_MC= 0014 | wUART_TD= 0010 |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 2. |
|||
|
|||
Area Table |
|||
|
|||
0 _CODE size 0 flags 0 |
|||
1 _HEADER size 0 flags 8 |
|||
2 _HEADER0 size 26 flags 8 |
|||
@ -1,6 +0,0 @@ |
|||
-mjx |
|||
-i dbgmon.ihx |
|||
-k /usr/local/share/sdcc/lib/z80 |
|||
-l z80 |
|||
dbgmon.rel |
|||
-e |
|||
File diff suppressed because it is too large
@ -1,838 +0,0 @@ |
|||
XL |
|||
H 8 areas 4 global symbols |
|||
M dbgmon |
|||
O -mz80 |
|||
S .__.ABS. Def0000 |
|||
A _CODE size 0 flags 0 addr 0 |
|||
A _DATA size 0 flags 0 addr 0 |
|||
A _OVERLAY size 0 flags 0 addr 0 |
|||
A _HOME size 0 flags 0 addr 0 |
|||
A _GSINIT size 0 flags 0 addr 0 |
|||
A _GSFINAL size 0 flags 0 addr 0 |
|||
A _DBGMON size D14 flags 0 addr 0 |
|||
S _dbgmon Def0000 |
|||
S _dbgmon_start Def0000 |
|||
S _dbgmon_end Def0D14 |
|||
A _CABS size 0 flags 0 addr 0 |
|||
T 00 00 |
|||
R 00 00 06 00 |
|||
T 00 00 |
|||
R 00 00 06 00 |
|||
T 00 00 31 FF CF CD 32 06 CD 3B 06 21 C7 0C CD |
|||
R 00 00 06 00 00 06 06 00 00 09 06 00 00 0C 06 00 |
|||
T 0D 00 05 07 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 0F 00 |
|||
R 00 00 06 00 |
|||
T 0F 00 CD 40 06 FE 10 CA 3C 00 FE 11 CA 94 00 FE |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 00 0D 06 00 |
|||
T 1D 00 14 CA D0 00 FE 15 CA 24 01 FE 16 CA CC 00 |
|||
R 00 00 06 00 00 04 06 00 00 09 06 00 00 0E 06 00 |
|||
T 2B 00 FE 17 CA 33 00 18 DD |
|||
R 00 00 06 00 00 05 06 00 |
|||
T 32 00 |
|||
R 00 00 06 00 |
|||
T 32 00 C9 |
|||
R 00 00 06 00 |
|||
T 33 00 |
|||
R 00 00 06 00 |
|||
T 33 00 3E 00 D3 7C D3 78 C3 00 00 |
|||
R 00 00 06 00 |
|||
T 3C 00 |
|||
R 00 00 06 00 |
|||
T 3C 00 CD 6C 02 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 3F 00 |
|||
R 00 00 06 00 |
|||
T 3F 00 4F CB 3F CB 3F CB 3F CB 3F 32 90 07 79 E6 |
|||
R 00 00 06 00 00 0C 06 00 |
|||
T 4D 00 0F 32 8F 07 ED 78 4F CB 3F CB 3F CB 3F CB |
|||
R 00 00 06 00 00 04 06 00 |
|||
T 5B 00 3F 32 8C 07 79 E6 0F 32 8B 07 3E 10 32 |
|||
R 00 00 06 00 00 04 06 00 00 0A 06 00 |
|||
T 68 00 8D 07 32 8E 07 3E 13 32 92 07 3E 14 32 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T 75 00 91 07 21 8B 07 CD BE 06 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 7D 00 |
|||
R 00 00 06 00 |
|||
T 7D 00 CD 40 06 FE 12 CA 8B 00 FE 10 28 B3 18 F2 |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 |
|||
T 8B 00 |
|||
R 00 00 06 00 |
|||
T 8B 00 21 C7 0C CD 05 07 C3 0F 00 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 94 00 |
|||
R 00 00 06 00 |
|||
T 94 00 CD 6C 02 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 97 00 |
|||
R 00 00 06 00 |
|||
T 97 00 4F CB 3F CB 3F CB 3F CB 3F 32 90 07 79 E6 |
|||
R 00 00 06 00 00 0C 06 00 |
|||
T A5 00 0F 32 8F 07 3E 10 32 8D 07 32 8E 07 3E 13 |
|||
R 00 00 06 00 00 04 06 00 00 09 06 00 00 0C 06 00 |
|||
T B3 00 32 92 07 3E 14 32 91 07 21 8B 07 CD |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 00 0B 06 00 |
|||
T BF 00 CF 02 ED 79 21 C7 0C CD 05 07 C3 |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
|||
T CA 00 0F 00 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T CC 00 |
|||
R 00 00 06 00 |
|||
T CC 00 CD 89 01 E9 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T D0 00 |
|||
R 00 00 06 00 |
|||
T D0 00 CD 89 01 E5 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T D4 00 |
|||
R 00 00 06 00 |
|||
T D4 00 7C CB 3F CB 3F CB 3F CB 3F 32 92 07 7C E6 |
|||
R 00 00 06 00 00 0C 06 00 |
|||
T E2 00 0F 32 91 07 7D CB 3F CB 3F CB 3F CB 3F 32 |
|||
R 00 00 06 00 00 04 06 00 |
|||
T F0 00 90 07 7D E6 0F 32 8F 07 3E 10 32 8E 07 21 |
|||
R 00 00 06 00 00 02 06 00 00 08 06 00 00 0D 06 00 |
|||
T FE 00 8B 07 CD CF 02 E1 77 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 05 01 |
|||
R 00 00 06 00 |
|||
T 05 01 CD 40 06 FE 12 CA 1B 01 FE 13 28 06 FE 14 |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 |
|||
T 13 01 28 BB 18 EE |
|||
R 00 00 06 00 |
|||
T 17 01 |
|||
R 00 00 06 00 |
|||
T 17 01 23 E5 18 B9 |
|||
R 00 00 06 00 |
|||
T 1B 01 |
|||
R 00 00 06 00 |
|||
T 1B 01 21 C7 0C CD 05 07 C3 0F 00 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 24 01 |
|||
R 00 00 06 00 |
|||
T 24 01 CD 89 01 E5 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 28 01 |
|||
R 00 00 06 00 |
|||
T 28 01 7C CB 3F CB 3F CB 3F CB 3F 32 92 07 7C E6 |
|||
R 00 00 06 00 00 0C 06 00 |
|||
T 36 01 0F 32 91 07 7D CB 3F CB 3F CB 3F CB 3F 32 |
|||
R 00 00 06 00 00 04 06 00 |
|||
T 44 01 90 07 7D E6 0F 32 8F 07 3E 10 32 8E 07 7E |
|||
R 00 00 06 00 00 02 06 00 00 08 06 00 00 0D 06 00 |
|||
T 52 01 CB 3F CB 3F CB 3F CB 3F 32 8C 07 7E E6 0F |
|||
R 00 00 06 00 00 0B 06 00 |
|||
T 60 01 32 8B 07 21 8B 07 CD BE 06 E1 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 6A 01 |
|||
R 00 00 06 00 |
|||
T 6A 01 CD 40 06 FE 12 CA 80 01 FE 13 28 06 FE 15 |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 |
|||
T 78 01 28 AA 18 EE |
|||
R 00 00 06 00 |
|||
T 7C 01 |
|||
R 00 00 06 00 |
|||
T 7C 01 23 E5 18 A8 |
|||
R 00 00 06 00 |
|||
T 80 01 |
|||
R 00 00 06 00 |
|||
T 80 01 21 C7 0C CD 05 07 C3 0F 00 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 89 01 |
|||
R 00 00 06 00 |
|||
T 89 01 C5 18 6A |
|||
R 00 00 06 00 |
|||
T 8C 01 |
|||
R 00 00 06 00 |
|||
T 8C 01 21 CF 0C CD 05 07 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T 92 01 |
|||
R 00 00 06 00 |
|||
T 92 01 CD 40 06 FE 10 FA DD 01 FE 13 28 06 FE 12 |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 |
|||
T A0 01 28 54 18 EE |
|||
R 00 00 06 00 |
|||
T A4 01 |
|||
R 00 00 06 00 |
|||
T A4 01 21 00 00 3A 8C 07 CB 27 CB 27 CB 27 CB 27 |
|||
R 00 00 06 00 00 06 06 00 |
|||
T B2 01 4F 3A 8B 07 E6 0F B1 6F 3A 8E 07 CB 27 CB |
|||
R 00 00 06 00 00 04 06 00 00 0B 06 00 |
|||
T C0 01 27 CB 27 CB 27 4F 3A 8D 07 E6 0F B1 67 3E |
|||
R 00 00 06 00 00 09 06 00 |
|||
T CE 01 10 32 8B 07 32 8C 07 32 8D 07 32 |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 00 0A 06 00 |
|||
T D9 01 8E 07 C1 C9 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T DD 01 |
|||
R 00 00 06 00 |
|||
T DD 01 4F 3A 8D 07 32 8E 07 3A 8C 07 32 |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 00 0A 06 00 |
|||
T E8 01 8D 07 3A 8B 07 32 8C 07 79 32 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T F2 01 8B 07 18 0E |
|||
R 00 00 06 00 00 02 06 00 |
|||
T F6 01 |
|||
R 00 00 06 00 |
|||
T F6 01 3E 12 32 8B 07 32 8C 07 32 8D 07 32 |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 00 0B 06 00 |
|||
T 02 02 8E 07 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 04 02 |
|||
R 00 00 06 00 |
|||
T 04 02 3A 8B 07 CD F8 06 32 CF 0C 3A |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 0E 02 8C 07 CD F8 06 32 D0 0C 3A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 17 02 8D 07 CD F8 06 32 D1 0C 3A |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 20 02 8E 07 CD F8 06 32 D2 0C C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 29 02 8C 01 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 2B 02 |
|||
R 00 00 06 00 |
|||
T 2B 02 C5 E5 7C CB 3F CB 3F CB 3F CB 3F E6 0F CD |
|||
R 00 00 06 00 |
|||
T 39 02 F8 06 32 E2 0C 7C E6 0F CD F8 06 32 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0B 06 00 |
|||
T 45 02 E1 0C 7D E6 F0 CB 3F CB 3F CB 3F CB 3F E6 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 53 02 0F CD F8 06 32 E0 0C 7D E6 0F CD F8 06 32 |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 00 0D 06 00 |
|||
T 61 02 DF 0C 21 DF 0C CD 05 07 E1 C1 C9 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T 6C 02 |
|||
R 00 00 06 00 |
|||
T 6C 02 C5 18 43 |
|||
R 00 00 06 00 |
|||
T 6F 02 |
|||
R 00 00 06 00 |
|||
T 6F 02 21 D7 0C CD 05 07 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T 75 02 |
|||
R 00 00 06 00 |
|||
T 75 02 CD 40 06 FE 10 FA A5 02 FE 13 28 06 FE 12 |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 |
|||
T 83 02 28 2D 18 EE |
|||
R 00 00 06 00 |
|||
T 87 02 |
|||
R 00 00 06 00 |
|||
T 87 02 3A 8C 07 CB 27 CB 27 CB 27 CB 27 4F 3A |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 94 02 8B 07 E6 0F B1 4F 3E 10 32 8B 07 32 8C 07 |
|||
R 00 00 06 00 00 02 06 00 00 0B 06 00 00 0E 06 00 |
|||
T A2 02 79 C1 C9 |
|||
R 00 00 06 00 |
|||
T A5 02 |
|||
R 00 00 06 00 |
|||
T A5 02 4F 3A 8B 07 32 8C 07 79 32 8B 07 18 08 |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 00 0B 06 00 |
|||
T B2 02 |
|||
R 00 00 06 00 |
|||
T B2 02 3E 12 32 8B 07 32 8C 07 |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 |
|||
T BA 02 |
|||
R 00 00 06 00 |
|||
T BA 02 3A 8B 07 CD F8 06 32 D7 0C 3A |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T C4 02 8C 07 CD F8 06 32 D8 0C C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 08 06 00 |
|||
T CD 02 6F 02 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T CF 02 |
|||
R 00 00 06 00 |
|||
T CF 02 C5 18 40 |
|||
R 00 00 06 00 |
|||
T D2 02 |
|||
R 00 00 06 00 |
|||
T D2 02 CD BE 06 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T D5 02 |
|||
R 00 00 06 00 |
|||
T D5 02 CD 40 06 FE 10 FA 05 03 FE 13 28 06 FE 12 |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 |
|||
T E3 02 28 2D 18 EE |
|||
R 00 00 06 00 |
|||
T E7 02 |
|||
R 00 00 06 00 |
|||
T E7 02 3A 8C 07 CB 27 CB 27 CB 27 CB 27 4F 3A |
|||
R 00 00 06 00 00 03 06 00 |
|||
T F4 02 8B 07 E6 0F B1 4F 3E 10 32 8B 07 32 8C 07 |
|||
R 00 00 06 00 00 02 06 00 00 0B 06 00 00 0E 06 00 |
|||
T 02 03 79 C1 C9 |
|||
R 00 00 06 00 |
|||
T 05 03 |
|||
R 00 00 06 00 |
|||
T 05 03 4F 3A 8B 07 32 8C 07 79 32 8B 07 18 C0 |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 00 0B 06 00 |
|||
T 12 03 |
|||
R 00 00 06 00 |
|||
T 12 03 3E 12 32 8B 07 32 8C 07 C3 D2 02 |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 00 0B 06 00 |
|||
T 1D 03 |
|||
R 00 00 06 00 |
|||
T 1D 03 31 FF CF CD 32 06 AF E5 21 9B 09 CD 8A 04 |
|||
R 00 00 06 00 00 06 06 00 00 0B 06 00 00 0E 06 00 |
|||
T 2B 03 E1 |
|||
R 00 00 06 00 |
|||
T 2C 03 |
|||
R 00 00 06 00 |
|||
T 2C 03 CD 81 04 21 3B 07 CD 81 03 21 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 36 03 3B 07 7E 23 FE 42 CA 33 00 FE 52 CA 98 04 |
|||
R 00 00 06 00 00 02 06 00 00 09 06 00 00 0E 06 00 |
|||
T 44 03 FE 50 CA 9D 04 FE 4F CA 63 04 FE 48 CA |
|||
R 00 00 06 00 00 05 06 00 00 0A 06 00 |
|||
T 51 03 30 05 FE 49 CA 71 04 FE 44 CA D4 04 FE 4B |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0C 06 00 |
|||
T 5F 03 CA 74 03 FE 4D CA 9C 05 FE 46 CA DD 05 21 |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 00 0D 06 00 |
|||
T 6D 03 A2 0C CD 8A 04 18 B8 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 |
|||
T 74 03 |
|||
R 00 00 06 00 |
|||
T 74 03 CD B4 03 CD C8 03 FE 1B 20 F6 C3 2C 03 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 0D 06 00 |
|||
T 81 03 |
|||
R 00 00 06 00 |
|||
T 81 03 0E 00 D5 |
|||
R 00 00 06 00 |
|||
T 84 03 |
|||
R 00 00 06 00 |
|||
T 84 03 CD B4 03 CD C8 03 FE 0D 28 22 FE 08 20 16 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T 92 03 79 FE 00 28 ED 2B 0D 3E 00 77 3E 20 CD |
|||
R 00 00 06 00 |
|||
T 9F 03 C8 03 3E 08 CD C8 03 18 DC |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 |
|||
T A8 03 |
|||
R 00 00 06 00 |
|||
T A8 03 77 23 0C 79 FE 4D 20 D4 |
|||
R 00 00 06 00 |
|||
T B0 03 |
|||
R 00 00 06 00 |
|||
T B0 03 36 00 D1 C9 |
|||
R 00 00 06 00 |
|||
T B4 03 |
|||
R 00 00 06 00 |
|||
T B4 03 DB 6D CB 47 CA B4 03 DB 68 E6 7F FE 41 D8 |
|||
R 00 00 06 00 00 07 06 00 |
|||
T C2 03 FE 7B D0 E6 5F C9 |
|||
R 00 00 06 00 |
|||
T C8 03 |
|||
R 00 00 06 00 |
|||
T C8 03 F5 |
|||
R 00 00 06 00 |
|||
T C9 03 |
|||
R 00 00 06 00 |
|||
T C9 03 DB 6D CB 6F CA C9 03 F1 D3 68 C9 |
|||
R 00 00 06 00 00 07 06 00 |
|||
T D4 03 |
|||
R 00 00 06 00 |
|||
T D4 03 E5 21 94 09 CD 8A 04 E1 C9 |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 |
|||
T DD 03 |
|||
R 00 00 06 00 |
|||
T DD 03 D5 CD E9 03 57 CD E9 03 6F 62 D1 C9 |
|||
R 00 00 06 00 00 04 06 00 00 08 06 00 |
|||
T E9 03 |
|||
R 00 00 06 00 |
|||
T E9 03 C5 CD FC 03 CB 07 CB 07 CB 07 CB 07 47 CD |
|||
R 00 00 06 00 00 04 06 00 |
|||
T F7 03 FC 03 80 C1 C9 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T FC 03 |
|||
R 00 00 06 00 |
|||
T FC 03 7E 23 FE 40 30 03 E6 0F C9 |
|||
R 00 00 06 00 |
|||
T 05 04 |
|||
R 00 00 06 00 |
|||
T 05 04 E6 0F C6 09 C9 |
|||
R 00 00 06 00 |
|||
T 0A 04 |
|||
R 00 00 06 00 |
|||
T 0A 04 C5 CD 1D 04 CB 07 CB 07 CB 07 CB 07 47 CD |
|||
R 00 00 06 00 00 04 06 00 |
|||
T 18 04 1D 04 80 C1 C9 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 1D 04 |
|||
R 00 00 06 00 |
|||
T 1D 04 CD B4 03 23 FE 40 30 E0 E6 0F C9 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 28 04 |
|||
R 00 00 06 00 |
|||
T 28 04 C5 47 CB 07 CB 07 CB 07 CB 07 E6 0F C6 30 |
|||
R 00 00 06 00 |
|||
T 36 04 FE 3A 38 02 C6 07 |
|||
R 00 00 06 00 |
|||
T 3C 04 |
|||
R 00 00 06 00 |
|||
T 3C 04 CD C8 03 78 E6 0F C6 30 FE 3A 38 02 C6 07 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 4A 04 |
|||
R 00 00 06 00 |
|||
T 4A 04 CD C8 03 C1 C9 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 4F 04 |
|||
R 00 00 06 00 |
|||
T 4F 04 F5 3E 20 CD C8 03 F1 C9 |
|||
R 00 00 06 00 00 06 06 00 |
|||
T 57 04 |
|||
R 00 00 06 00 |
|||
T 57 04 7C CD 28 04 7D CD 28 04 CD 4F 04 C9 |
|||
R 00 00 06 00 00 04 06 00 00 08 06 00 00 0B 06 00 |
|||
T 63 04 |
|||
R 00 00 06 00 |
|||
T 63 04 |
|||
R 00 00 06 00 |
|||
T 63 04 23 CD E9 03 4F 23 CD E9 03 |
|||
R 00 00 06 00 00 04 06 00 00 09 06 00 |
|||
T 6C 04 |
|||
R 00 00 06 00 |
|||
T 6C 04 ED 79 C3 2C 03 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T 71 04 |
|||
R 00 00 06 00 |
|||
T 71 04 23 CD E9 03 4F CD D4 03 ED 78 CD 28 04 C3 |
|||
R 00 00 06 00 00 04 06 00 00 08 06 00 00 0D 06 00 |
|||
T 7F 04 2C 03 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 81 04 |
|||
R 00 00 06 00 |
|||
T 81 04 E5 21 97 09 CD 8A 04 E1 C9 |
|||
R 00 00 06 00 00 04 06 00 00 07 06 00 |
|||
T 8A 04 |
|||
R 00 00 06 00 |
|||
T 8A 04 |
|||
R 00 00 06 00 |
|||
T 8A 04 7E FE FF CA 97 04 CD C8 03 23 C3 8A 04 |
|||
R 00 00 06 00 00 06 06 00 00 09 06 00 00 0D 06 00 |
|||
T 97 04 |
|||
R 00 00 06 00 |
|||
T 97 04 C9 |
|||
R 00 00 06 00 |
|||
T 98 04 |
|||
R 00 00 06 00 |
|||
T 98 04 23 CD DD 03 E9 |
|||
R 00 00 06 00 00 04 06 00 |
|||
T 9D 04 |
|||
R 00 00 06 00 |
|||
T 9D 04 23 E5 CD DD 03 54 5D E1 23 23 23 23 23 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T AA 04 |
|||
R 00 00 06 00 |
|||
T AA 04 CD E9 03 12 13 CD 81 04 3E 50 CD C8 03 CD |
|||
R 00 00 06 00 00 03 06 00 00 08 06 00 00 0D 06 00 |
|||
T B8 04 4F 04 62 6B CD 57 04 21 3B 07 CD |
|||
R 00 00 06 00 00 02 06 00 00 07 06 00 00 0A 06 00 |
|||
T C3 04 81 03 21 3B 07 7E FE 00 CA D1 04 C3 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0B 06 00 |
|||
T CF 04 AA 04 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T D1 04 |
|||
R 00 00 06 00 |
|||
T D1 04 C3 2C 03 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T D4 04 |
|||
R 00 00 06 00 |
|||
T D4 04 23 E5 CD DD 03 54 5D E1 D5 23 23 23 23 23 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T E2 04 CD DD 03 23 EB E1 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T E8 04 |
|||
R 00 00 06 00 |
|||
T E8 04 CD D4 03 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T EB 04 |
|||
R 00 00 06 00 |
|||
T EB 04 CD 57 04 0E 10 E5 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T F1 04 |
|||
R 00 00 06 00 |
|||
T F1 04 D9 4B ED 78 D9 E6 7F FE 1B CA 2C 03 FE 13 |
|||
R 00 00 06 00 00 0C 06 00 |
|||
T FF 04 28 F0 7E CD 28 04 CD 4F 04 |
|||
R 00 00 06 00 00 06 06 00 00 09 06 00 |
|||
T 08 05 |
|||
R 00 00 06 00 |
|||
T 08 05 23 0D 20 E5 |
|||
R 00 00 06 00 |
|||
T 0C 05 |
|||
R 00 00 06 00 |
|||
T 0C 05 CD 4F 04 0E 10 E1 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 12 05 |
|||
R 00 00 06 00 |
|||
T 12 05 7E E6 60 7E 20 02 |
|||
R 00 00 06 00 |
|||
T 18 05 |
|||
R 00 00 06 00 |
|||
T 18 05 3E 2E |
|||
R 00 00 06 00 |
|||
T 1A 05 |
|||
R 00 00 06 00 |
|||
T 1A 05 CD C8 03 23 7A BC 20 05 7B BD CA 2C 03 |
|||
R 00 00 06 00 00 03 06 00 00 0D 06 00 |
|||
T 27 05 |
|||
R 00 00 06 00 |
|||
T 27 05 0D 20 E8 |
|||
R 00 00 06 00 |
|||
T 2A 05 |
|||
R 00 00 06 00 |
|||
T 2A 05 CD D4 03 C3 EB 04 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T 30 05 |
|||
R 00 00 06 00 |
|||
T 30 05 CD D4 03 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 33 05 |
|||
R 00 00 06 00 |
|||
T 33 05 CD B4 03 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 36 05 |
|||
R 00 00 06 00 |
|||
T 36 05 FE 3A 20 47 1E 00 CD 0A 04 CD 8A 05 57 CD |
|||
R 00 00 06 00 00 09 06 00 00 0C 06 00 |
|||
T 44 05 0A 04 CD 8A 05 67 CD 0A 04 CD |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 09 06 00 |
|||
T 4E 05 8A 05 6F CD 0A 04 CD 8A 05 FE 01 20 0D CD |
|||
R 00 00 06 00 00 02 06 00 00 06 06 00 00 09 06 00 |
|||
T 5C 05 0A 04 CD 8A 05 7B A7 CA 96 05 18 19 |
|||
R 00 00 06 00 00 02 06 00 00 05 06 00 00 0A 06 00 |
|||
T 68 05 |
|||
R 00 00 06 00 |
|||
T 68 05 7A A7 28 0B CD 0A 04 CD 8A 05 77 23 15 18 |
|||
R 00 00 06 00 00 07 06 00 00 0A 06 00 |
|||
T 76 05 F1 |
|||
R 00 00 06 00 |
|||
T 77 05 |
|||
R 00 00 06 00 |
|||
T 77 05 CD 0A 04 CD 8A 05 7B A7 28 0F |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T 81 05 |
|||
R 00 00 06 00 |
|||
T 81 05 21 B5 0C CD 8A 04 C3 96 05 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 00 09 06 00 |
|||
T 8A 05 |
|||
R 00 00 06 00 |
|||
T 8A 05 4F 7B 91 5F 79 C9 |
|||
R 00 00 06 00 |
|||
T 90 05 |
|||
R 00 00 06 00 |
|||
T 90 05 CD B4 03 C3 33 05 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T 96 05 |
|||
R 00 00 06 00 |
|||
T 96 05 CD B4 03 C3 2C 03 |
|||
R 00 00 06 00 00 03 06 00 00 06 06 00 |
|||
T 9C 05 |
|||
R 00 00 06 00 |
|||
T 9C 05 0E 03 23 E5 CD DD 03 54 5D E1 D5 23 23 23 |
|||
R 00 00 06 00 00 07 06 00 |
|||
T AA 05 23 23 E5 CD DD 03 54 5D E1 D5 23 23 23 23 |
|||
R 00 00 06 00 00 06 06 00 |
|||
T B8 05 23 CD DD 03 E5 D1 C1 E1 E5 7D 2F 6F 7C 2F |
|||
R 00 00 06 00 00 04 06 00 |
|||
T C6 05 67 23 09 4D 44 E1 CD D2 05 C3 2C 03 |
|||
R 00 00 06 00 00 09 06 00 00 0C 06 00 |
|||
T D2 05 |
|||
R 00 00 06 00 |
|||
T D2 05 7E 12 23 13 0B 79 B0 C2 D2 05 C9 |
|||
R 00 00 06 00 00 0A 06 00 |
|||
T DD 05 |
|||
R 00 00 06 00 |
|||
T DD 05 0E 03 23 E5 CD DD 03 54 5D E1 D5 23 23 23 |
|||
R 00 00 06 00 00 07 06 00 |
|||
T EB 05 23 23 E5 CD DD 03 54 5D E1 D5 23 23 23 23 |
|||
R 00 00 06 00 00 06 06 00 |
|||
T F9 05 23 CD E9 03 4F C5 C1 D1 E1 71 |
|||
R 00 00 06 00 00 04 06 00 |
|||
T 03 06 |
|||
R 00 00 06 00 |
|||
T 03 06 71 23 7B 95 47 7A 94 B0 C2 03 06 C3 2C 03 |
|||
R 00 00 06 00 00 0B 06 00 00 0E 06 00 |
|||
T 11 06 |
|||
R 00 00 06 00 |
|||
T 11 06 C3 00 EA |
|||
R 00 00 06 00 |
|||
T 14 06 |
|||
R 00 00 06 00 |
|||
T 14 06 3E 80 D3 6B 3A 3A 07 D3 68 3E 00 D3 69 3E |
|||
R 00 00 06 00 00 07 06 00 |
|||
T 22 06 03 D3 6B 3E 03 D3 6C C9 |
|||
R 00 00 06 00 |
|||
T 2A 06 |
|||
R 00 00 06 00 |
|||
T 2A 06 5D 54 13 77 0B ED B0 C9 |
|||
R 00 00 06 00 |
|||
T 32 06 |
|||
R 00 00 06 00 |
|||
T 32 06 3E 0C 32 3A 07 CD 14 06 C9 |
|||
R 00 00 06 00 00 05 06 00 00 08 06 00 |
|||
T 3B 06 |
|||
R 00 00 06 00 |
|||
T 3B 06 3E 82 D3 63 C9 |
|||
R 00 00 06 00 |
|||
T 40 06 |
|||
R 00 00 06 00 |
|||
T 40 06 E5 |
|||
R 00 00 06 00 |
|||
T 41 06 |
|||
R 00 00 06 00 |
|||
T 41 06 CD 67 06 FE 00 28 F9 57 3E 4F D3 62 CD |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 4E 06 B4 06 |
|||
R 00 00 06 00 00 02 06 00 |
|||
T 50 06 |
|||
R 00 00 06 00 |
|||
T 50 06 DB 61 FE 00 20 FA 7A 16 00 21 E7 0C |
|||
R 00 00 06 00 00 0C 06 00 |
|||
T 5C 06 |
|||
R 00 00 06 00 |
|||
T 5C 06 BE 28 05 23 14 C2 5C 06 |
|||
R 00 00 06 00 00 08 06 00 |
|||
T 64 06 |
|||
R 00 00 06 00 |
|||
T 64 06 7A E1 C9 |
|||
R 00 00 06 00 |
|||
T 67 06 |
|||
R 00 00 06 00 |
|||
T 67 06 0E 00 3E 41 D3 62 CD B4 06 DB 61 FE 00 20 |
|||
R 00 00 06 00 00 09 06 00 |
|||
T 75 06 34 0E 40 3E 42 D3 62 CD B4 06 DB 61 FE 00 |
|||
R 00 00 06 00 00 0A 06 00 |
|||
T 83 06 20 25 0E 80 3E 44 D3 62 CD B4 06 DB 61 FE |
|||
R 00 00 06 00 00 0B 06 00 |
|||
T 91 06 00 20 16 0E C0 3E 48 D3 62 CD B4 06 DB 61 |
|||
R 00 00 06 00 00 0C 06 00 |
|||
T 9F 06 FE 00 20 07 3E 40 D3 62 3E 00 C9 |
|||
R 00 00 06 00 |
|||
T AA 06 |
|||
R 00 00 06 00 |
|||
T AA 06 E6 3F B1 4F 3E 00 D3 62 79 C9 |
|||
R 00 00 06 00 |
|||
T B4 06 |
|||
R 00 00 06 00 |
|||
T B4 06 |
|||
R 00 00 06 00 |
|||
T B4 06 00 00 00 00 00 00 00 00 00 C9 |
|||
R 00 00 06 00 |
|||
T BE 06 |
|||
R 00 00 06 00 |
|||
T BE 06 E5 F5 C5 01 07 00 09 06 08 3E 40 D3 62 CD |
|||
R 00 00 06 00 |
|||
T CC 06 B4 06 3E F0 D3 60 3E 80 D3 62 CD B4 06 3E |
|||
R 00 00 06 00 00 02 06 00 00 0D 06 00 |
|||
T DA 06 40 D3 62 |
|||
R 00 00 06 00 |
|||
T DD 06 |
|||
R 00 00 06 00 |
|||
T DD 06 7E CD F8 06 D3 60 3E 00 D3 62 CD B4 06 3E |
|||
R 00 00 06 00 00 04 06 00 00 0D 06 00 |
|||
T EB 06 40 D3 62 CD B4 06 2B 10 E9 C1 F1 E1 C9 |
|||
R 00 00 06 00 00 06 06 00 |
|||
T F8 06 |
|||
R 00 00 06 00 |
|||
T F8 06 C5 E5 21 FF 0C 06 00 4F 09 7E E1 C1 C9 |
|||
R 00 00 06 00 00 05 06 00 |
|||
T 05 07 |
|||
R 00 00 06 00 |
|||
T 05 07 F5 C5 01 07 00 09 06 08 3E 40 D3 62 CD |
|||
R 00 00 06 00 |
|||
T 12 07 B4 06 3E F0 D3 60 3E 80 D3 62 CD B4 06 3E |
|||
R 00 00 06 00 00 02 06 00 00 0D 06 00 |
|||
T 20 07 40 D3 62 |
|||
R 00 00 06 00 |
|||
T 23 07 |
|||
R 00 00 06 00 |
|||
T 23 07 7E D3 60 3E 00 D3 62 CD B4 06 3E 40 D3 62 |
|||
R 00 00 06 00 00 0A 06 00 |
|||
T 31 07 CD B4 06 2B 10 EC C1 F1 C9 |
|||
R 00 00 06 00 00 03 06 00 |
|||
T 3A 07 |
|||
R 00 00 06 00 |
|||
T 3B 07 20 20 20 20 20 20 20 20 20 20 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 49 07 20 20 20 20 20 20 20 20 20 20 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 57 07 20 20 20 20 20 20 20 20 20 20 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 65 07 20 20 20 20 20 20 20 20 20 20 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 73 07 20 20 20 20 20 20 20 20 20 20 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 81 07 20 20 20 20 20 20 20 20 20 20 00 00 00 00 |
|||
R 00 00 06 00 |
|||
T 8F 07 00 00 00 00 01 |
|||
R 00 00 06 00 |
|||
T 94 07 |
|||
R 00 00 06 00 |
|||
T 94 07 |
|||
R 00 00 06 00 |
|||
T 94 09 |
|||
R 00 00 06 00 |
|||
T 94 09 0D 0A FF |
|||
R 00 00 06 00 |
|||
T 97 09 |
|||
R 00 00 06 00 |
|||
T 97 09 0D 0A 3E FF |
|||
R 00 00 06 00 |
|||
T 9B 09 |
|||
R 00 00 06 00 |
|||
T 9B 09 0D 0A 20 20 20 20 20 20 20 20 20 4E 4E 20 |
|||
R 00 00 06 00 |
|||
T A9 09 20 20 20 20 20 4E 4E 20 20 20 20 20 20 38 |
|||
R 00 00 06 00 |
|||
T B7 09 38 38 38 20 20 20 20 20 20 56 56 20 20 20 |
|||
R 00 00 06 00 |
|||
T C5 09 20 20 20 56 56 20 20 20 20 45 45 45 45 45 |
|||
R 00 00 06 00 |
|||
T D3 09 45 45 45 45 45 20 20 20 4D 4D 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T E1 09 20 20 20 20 20 20 4D 4D 0D 0A 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T EF 09 20 20 20 20 4E 4E 4E 4E 20 20 20 20 4E 4E |
|||
R 00 00 06 00 |
|||
T FD 09 20 20 20 20 38 38 20 20 20 20 38 38 20 20 |
|||
R 00 00 06 00 |
|||
T 0B 0A 20 20 56 56 20 20 20 20 20 20 56 56 20 20 |
|||
R 00 00 06 00 |
|||
T 19 0A 20 20 45 45 20 20 20 20 20 20 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 27 0A 20 4D 4D 4D 4D 20 20 20 20 20 20 4D 4D 4D |
|||
R 00 00 06 00 |
|||
T 35 0A 4D 0D 0A 20 20 20 20 20 20 20 4E 4E 20 20 |
|||
R 00 00 06 00 |
|||
T 43 0A 4E 4E 20 20 4E 4E 20 20 20 20 38 38 20 20 |
|||
R 00 00 06 00 |
|||
T 51 0A 20 20 38 38 20 20 20 20 56 56 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 5F 0A 20 20 56 56 20 20 20 20 45 45 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 6D 0A 20 20 20 20 20 20 20 4D 4D 20 20 4D 4D 20 |
|||
R 00 00 06 00 |
|||
T 7B 0A 20 4D 4D 20 20 4D 4D 0D 0A 20 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 89 0A 20 4E 4E 20 20 20 20 4E 4E 4E 4E 20 20 20 |
|||
R 00 00 06 00 |
|||
T 97 0A 20 38 38 20 20 20 20 38 38 20 20 20 20 56 |
|||
R 00 00 06 00 |
|||
T A5 0A 56 20 20 20 20 20 20 56 56 20 20 20 20 45 |
|||
R 00 00 06 00 |
|||
T B3 0A 45 20 20 20 20 20 20 20 20 20 20 20 4D 4D |
|||
R 00 00 06 00 |
|||
T C1 0A 20 20 20 20 4D 4D 20 20 20 20 4D 4D 0D 0A |
|||
R 00 00 06 00 |
|||
T CF 0A 20 20 20 20 20 4E 4E 20 20 20 20 20 20 4E |
|||
R 00 00 06 00 |
|||
T DD 0A 4E 20 20 20 20 20 20 38 38 38 38 20 20 20 |
|||
R 00 00 06 00 |
|||
T EB 0A 20 20 20 56 56 20 20 20 20 20 20 56 56 20 |
|||
R 00 00 06 00 |
|||
T F9 0A 20 20 20 45 45 45 45 45 45 45 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 07 0B 20 20 4D 4D 20 20 20 20 20 20 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 15 0B 4D 4D 0D 0A 20 20 20 20 4E 4E 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 23 0B 20 20 4E 4E 20 20 20 20 38 38 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 31 0B 38 38 20 20 20 20 20 56 56 20 20 20 20 56 |
|||
R 00 00 06 00 |
|||
T 3F 0B 56 20 20 20 20 20 45 45 20 20 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 4D 0B 20 20 20 20 20 4D 4D 20 20 20 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 5B 0B 20 20 20 4D 4D 0D 0A 20 20 20 4E 4E 20 20 |
|||
R 00 00 06 00 |
|||
T 69 0B 20 20 20 20 4E 4E 20 20 20 20 38 38 20 20 |
|||
R 00 00 06 00 |
|||
T 77 0B 20 20 38 38 20 20 20 20 20 20 56 56 20 20 |
|||
R 00 00 06 00 |
|||
T 85 0B 56 56 20 20 20 20 20 20 45 45 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 93 0B 20 20 20 20 20 20 20 4D 4D 20 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T A1 0B 20 20 20 20 20 4D 4D 0D 0A 20 20 4E 4E 20 |
|||
R 00 00 06 00 |
|||
T AF 0B 20 20 20 20 20 4E 4E 20 20 20 20 38 38 20 |
|||
R 00 00 06 00 |
|||
T BD 0B 20 20 20 38 38 20 20 20 20 20 20 20 20 56 |
|||
R 00 00 06 00 |
|||
T CB 0B 56 56 20 20 20 20 20 20 20 45 45 20 20 20 |
|||
R 00 00 06 00 |
|||
T D9 0B 20 20 20 20 20 20 20 20 4D 4D 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T E7 0B 20 20 20 20 20 20 4D 4D 0D 0A 20 4E 4E 20 |
|||
R 00 00 06 00 |
|||
T F5 0B 20 20 20 20 20 4E 4E 20 20 20 20 20 20 38 |
|||
R 00 00 06 00 |
|||
T 03 0C 38 38 38 20 20 20 20 20 20 20 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 11 0C 56 20 20 20 20 20 20 20 20 45 45 45 45 45 |
|||
R 00 00 06 00 |
|||
T 1F 0C 45 45 45 45 45 20 20 20 4D 4D 20 20 20 20 |
|||
R 00 00 06 00 |
|||
T 2D 0C 20 20 20 20 20 20 4D 4D 20 20 20 20 53 20 |
|||
R 00 00 06 00 |
|||
T 3B 0C 42 20 43 0D 0A 0D 0A 20 2A 2A 2A 2A 2A 2A |
|||
R 00 00 06 00 |
|||
T 49 0C 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A |
|||
R 00 00 06 00 |
|||
T 57 0C 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A |
|||
R 00 00 06 00 |
|||
T 65 0C 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A |
|||
R 00 00 06 00 |
|||
T 73 0C 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A |
|||
R 00 00 06 00 |
|||
T 81 0C 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A 2A |
|||
R 00 00 06 00 |
|||
T 8F 0C 0D 0A 4D 4F 4E 49 54 4F 52 20 52 45 41 44 |
|||
R 00 00 06 00 |
|||
T 9D 0C 59 20 0D 0A FF |
|||
R 00 00 06 00 |
|||
T A2 0C |
|||
R 00 00 06 00 |
|||
T A2 0C 0D 0A 55 4E 4B 4E 4F 57 4E 20 43 4F 4D 4D |
|||
R 00 00 06 00 |
|||
T B0 0C 41 4E 44 2E FF |
|||
R 00 00 06 00 |
|||
T B5 0C |
|||
R 00 00 06 00 |
|||
T B5 0C 0D 0A 43 48 45 43 4B 53 55 4D 20 45 52 52 |
|||
R 00 00 06 00 |
|||
T C3 0C 4F 52 2E FF |
|||
R 00 00 06 00 |
|||
T C7 0C |
|||
R 00 00 06 00 |
|||
T C7 0C 84 EE BB 80 BB EE CB 84 |
|||
R 00 00 06 00 |
|||
T CF 0C |
|||
R 00 00 06 00 |
|||
T CF 0C 00 00 00 00 8C BD BD FE |
|||
R 00 00 06 00 |
|||
T D7 0C |
|||
R 00 00 06 00 |
|||
T D7 0C 00 00 80 80 94 8C 9D EE |
|||
R 00 00 06 00 |
|||
T DF 0C |
|||
R 00 00 06 00 |
|||
T DF 0C 80 80 80 80 80 CB CF D7 |
|||
R 00 00 06 00 |
|||
T E7 0C |
|||
R 00 00 06 00 |
|||
T E7 0C 41 02 42 82 04 44 84 08 48 88 10 50 90 20 |
|||
R 00 00 06 00 |
|||
T F5 0C 60 A0 01 81 C1 C2 C4 C8 D0 E0 |
|||
R 00 00 06 00 |
|||
T FF 0C |
|||
R 00 00 06 00 |
|||
T FF 0C FB B0 ED F5 B6 D7 DF F0 FF F7 FE 9F CB BD |
|||
R 00 00 06 00 |
|||
T 0D 0D CF CE 80 84 00 EE 9D |
|||
R 00 00 06 00 |
|||
T 14 0D |
|||
R 00 00 06 00 |
|||
File diff suppressed because it is too large
@ -1,83 +0,0 @@ |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 1. |
|||
dbgmon.s derived from dbgmon.asm |
|||
Symbol Table |
|||
|
|||
.__.ABS.= 0000 G | 6 ADDR 0CCF R | 6 ALPH 0405 R |
|||
ASCIIA = 0041 | ASCIIB = 0042 | ASCIIC = 0043 |
|||
ASCIID = 0044 | ASCIIE = 0045 | ASCIIF = 0046 |
|||
ASCIIG = 0047 | ASCIIH = 0048 | ASCIII = 0049 |
|||
ASCIIJ = 004A | ASCIIK = 004B | ASCIIL = 004C |
|||
ASCIIM = 004D | ASCIIN = 004E | ASCIIO = 004F |
|||
ASCIIP = 0050 | ASCIIQ = 0051 | ASCIIR = 0052 |
|||
ASCIIS = 0053 | ASCIIT = 0054 | ASCIIU = 0055 |
|||
ASCIIV = 0056 | ASCIIW = 0057 | ASCIIX = 0058 |
|||
ASCIIY = 0059 | ASCIIZ = 005A | 6 BLKRD 04EB R |
|||
BS = 0008 | 6 CONTD 052A R | 6 COUT 03C8 R |
|||
6 CPUUP 0CC7 R | CR = 000D | 6 CRLF 03D4 R |
|||
6 CRLFA 0481 R | 6 DECODEDI 06F8 R | 6 DEPOSITE 011B R |
|||
6 DEPOSITF 0117 R | 6 DEPOSITG 0105 R | 6 DEPOSITL 00D4 R |
|||
6 DISPLAYB 078B R | 6 DOBOOT 0033 R | 6 DODEPOSI 00D0 R |
|||
6 DOEXAMIN 0124 R | 6 DOGO 00CC R | 6 DOPORTRE 003C R |
|||
6 DOPORTWR 0094 R | 6 DOT 0518 R | 6 DSPSECTO 022B R |
|||
6 DUMP 04D4 R | ENDT = 00FF | ESC = 001B |
|||
6 EXAMINEE 0180 R | 6 EXAMINEF 017C R | 6 EXAMINEG 016A R |
|||
6 EXAMINEL 0128 R | 6 EXIT 0032 R | 6 FILL 05DD R |
|||
6 FILL_LOO 0603 R | 6 FILL_MEM 062A R | 6 FRONTPAN 000F R |
|||
6 GDATA 04E8 R | 6 GETADDR 0189 R | 6 GETADDR1 018C R |
|||
6 GETADDRC 01F6 R | 6 GETADDRD 0204 R | 6 GETADDRD 01A4 R |
|||
6 GETADDRL 0192 R | 6 GETADDRN 01DD R | 6 GETLN 0381 R |
|||
6 GETLNDON 03B0 R | 6 GETLNLOP 0384 R | 6 GETLNSTO 03A8 R |
|||
6 GETPORT 026C R | 6 GETPORT1 026F R | 6 GETPORTC 02B2 R |
|||
6 GETPORTD 02BA R | 6 GETPORTD 0287 R | 6 GETPORTL 0275 R |
|||
6 GETPORTN 02A5 R | 6 GETVALUE 02CF R | 6 GETVALUE 02D2 R |
|||
6 GETVALUE 0312 R | 6 GETVALUE 02E7 R | 6 GETVALUE 02D5 R |
|||
6 GETVALUE 0305 R | 6 GOCPM 0611 R | 6 HEXDISPL 06BE R |
|||
6 HEXDISPL 06DD R | 6 HEXIN 03E9 R | 6 HEXINS 040A R |
|||
6 HXCHKSUM 058A R | 6 HXLOAD 0530 R | 6 HXLOAD0 0533 R |
|||
6 HXLOAD1 0536 R | 6 HXLOAD2 0568 R | 6 HXLOAD3 0577 R |
|||
6 HXLOADAG 0590 R | 6 HXLOADER 0581 R | 6 HXLOADEX 0596 R |
|||
6 HXOUT 0428 R | IDEADDR = 002F | IDECTRL = 002E |
|||
IDECYLHI= 0025 | IDECYLLO= 0024 | 6 IDEDEVIC 0793 R |
|||
IDEERR = 0021 | IDEHEAD = 0026 | IDEHI = 0028 |
|||
IDELO = 0020 | IDESECTC= 0022 | IDESECTN= 0023 |
|||
IDESTTS = 0027 | 6 IDE_SECT 0794 R | 6 INITIALI 0632 R |
|||
6 INIT_UAR 0614 R | 6 KB_CLEAR 0650 R | 6 KB_DECOD 0CE7 R |
|||
6 KB_GET 0640 R | 6 KB_GET_D 0664 R | 6 KB_GET_L 065C R |
|||
6 KB_GET_L 0641 R | 6 KB_SCAN 0667 R | 6 KB_SCAN_ 06B4 R |
|||
6 KB_SCAN_ 06AA R | 6 KEYBUF 073B R | 6 KIN 03B4 R |
|||
6 KLOP 0374 R | 6 LDHL 03DD R | LF = 000A |
|||
MONSTART= 8000 | 6 MONSTART 031D R | 6 MOVE 059C R |
|||
6 MOVE_LOO 05D2 R | MPCL = 0078 | MPCL_RAM= 0078 |
|||
MPCL_ROM= 007C | 6 MSG 048A R | 6 MTERM_IN 063B R |
|||
6 NIBL 03FC R | 6 NIBLS 041D R | 6 NXTONE 04F1 R |
|||
6 OUT1 043C R | 6 OUT2 044A R | 6 OUTIT 046C R |
|||
6 PAUSE 06B4 R | 6 PCRLF 050C R | 6 PCRLF0 0512 R |
|||
6 PDOT 051A R | 6 PHL 0457 R | 6 PIN 0471 R |
|||
PIOCONT = 0063 | 6 PORT 0CD7 R | PORTA = 0060 |
|||
PORTB = 0061 | PORTC = 0062 | 6 PORTREAD 008B R |
|||
6 PORTREAD 007D R | 6 PORTREAD 003F R | 6 PORTWRIT 0097 R |
|||
6 POUT 0463 R | 6 POUT1 0463 R | 6 PROGRM 049D R |
|||
6 PROGRMEX 04D1 R | 6 PROGRMLP 04AA R | 6 PROMPT 0997 R |
|||
RAMBOTTO= 8000 | RAMTOP = FFFF | 6 RUN 0498 R |
|||
6 SEC 0CDF R | 6 SEGDECOD 0CFF R | 6 SEGDISPL 0705 R |
|||
6 SEGDISPL 0723 R | 6 SERIALCM 032C R | 6 SER_BAUD 073A R |
|||
6 SPACE 044F R | STACKSTA= CFFF | 6 TCRLF 0994 R |
|||
6 TXT_CKSU 0CB5 R | 6 TXT_COMM 0CA2 R | 6 TXT_READ 099B R |
|||
6 TX_BUSYL 03C9 R | 6 TX_END 0497 R | 6 TX_SERLP 048A R |
|||
UART0 = 0068 | UART1 = 0069 | UART2 = 006A |
|||
UART3 = 006B | UART4 = 006C | UART5 = 006D |
|||
UART6 = 006E | UART7 = 006F | 6 UPDH 0508 R |
|||
6 UPDH1 0527 R | 6 _dbgmon 0000 GR | 6 _dbgmon_ 0D14 GR |
|||
6 _dbgmon_ 0000 GR |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 2. |
|||
dbgmon.s derived from dbgmon.asm |
|||
Area Table |
|||
|
|||
0 _CODE size 0 flags 0 |
|||
1 _DATA size 0 flags 0 |
|||
2 _OVERLAY size 0 flags 0 |
|||
3 _HOME size 0 flags 0 |
|||
4 _GSINIT size 0 flags 0 |
|||
5 _GSFINAL size 0 flags 0 |
|||
6 _DBGMON size D14 flags 0 |
|||
7 _CABS size 0 flags 0 |
|||
File diff suppressed because it is too large
File diff suppressed because it is too large
File diff suppressed because it is too large
@ -1,139 +0,0 @@ |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 1. |
|||
'Bdos Interface, Bdos, Version 2.2 Feb, 1980' |
|||
Symbol Table |
|||
|
|||
.__.ABS.= 0000 G | 6 _bdos 0000 GR | 6 _bdos_en 0AC6 GR |
|||
6 _bdos_st 0000 GR | 6 addh 03D1 R | addlist **** X |
|||
6 alloca 0AC6 R | 6 allocate 030F R | 6 allocwd 0801 R |
|||
6 arecord 0AC6 R | 6 arecord1 0AC6 R | 6 aret 01FC R |
|||
6 atran 0315 R | 6 atran0 031B R | 6 backsp 0199 R |
|||
6 backup 00D6 R | 6 backx 0158 R | 6 badseek 08E7 R |
|||
6 bdose 0011 R | 6 blkmsk 0AC6 R | 6 blkshf 0AC6 R |
|||
6 blockok 07E8 R | 6 buffa 0AC6 R | 6 buffnzer 06BE R |
|||
6 cdrmaxa 0AC6 R | 6 check$ro 03BA R | 6 check$ro 03BD R |
|||
6 check$wr 03C4 R | 6 checka 0AC6 R | 6 checksum 0402 R |
|||
6 chksiz 0AC6 R | 6 close 0688 R | 6 clrmodnu 03DC R |
|||
6 column 01FC R | 6 compcdr 03E5 R | 6 compcol 01FC R |
|||
6 compext 0538 R | 6 compout 00AB R | 6 compute$ 0377 R |
|||
6 compute$ 0902 R | 6 computec 037B R | 6 conb0 008D R |
|||
6 conb1 0090 R | 6 conbrk 0074 R | 6 conech 0061 R |
|||
6 conin 005B R | coninf **** X | 6 conout 0091 R |
|||
conoutf **** X | constf **** X | 6 copy$dir 0609 R |
|||
6 copy$dir 0532 R | 6 copy$fcb 0609 R | cr **** X |
|||
6 crlf 00F0 R | 6 crlfp 00DF R | 6 crlfp0 00E5 R |
|||
ctl **** X | ctlc **** X | ctle **** X |
|||
ctlh **** X | 6 ctlout 00BB R | ctlp **** X |
|||
ctlr **** X | ctls **** X | ctlu **** X |
|||
ctlx **** X | 6 curdsk 01FC R | 6 curreca 0AC6 R |
|||
6 curselec 0984 R | 6 curtrka 0AC6 R | 6 dcnt 0AC6 R |
|||
6 delete 05B1 R | 6 delete0 05B7 R | 6 diocomp 025A R |
|||
6 dir$to$u 0445 R | 6 dirblk 0AC6 R | 6 dirinp 01D7 R |
|||
6 dirloc 0AC6 R | 6 dirmax 0AC6 R | 6 diskeof 07A8 R |
|||
6 diskread 0775 R | 6 diskwr0 07C3 R | 6 diskwr1 0807 R |
|||
6 diskwr11 0850 R | 6 diskwr2 0862 R | 6 diskwr3 0885 R |
|||
6 diskwrit 07AE R | 6 diskwru 0807 R | 6 dlog 0AC6 R |
|||
6 dm$posit 02D5 R | 6 dmaad 0AC6 R | 6 dminx 0AC6 R |
|||
6 dmpos0 02D9 R | 6 dmpos1 02E5 R | 6 dmpos2 02EE R |
|||
6 dmset 06DA R | 6 dpbaddr 0AC6 R | dpblist **** X |
|||
6 dptr 0AC6 R | 6 drec 0AC6 R | 6 dskerr 004A R |
|||
dskmap **** X | 6 dskmsg 004A R | dskmsk **** X |
|||
dskshf **** X | dvers **** X | 6 echoc 006F R |
|||
6 efcb 0AC6 R | empty **** X | 6 end$of$d 044F R |
|||
enddir **** X | 6 endmerge 06EE R | 6 endsearc 059F R |
|||
6 entsp 01FC R | 6 errflg 004A R | 6 extmsk 0AC6 R |
|||
extnum **** X | 6 extval 0AC6 R | false **** X |
|||
6 fcb$copi 0AC6 R | 6 fcbdsk 0AC6 R | fcblen **** X |
|||
6 fcbnzero 06B8 R | fcbshf **** X | 6 fill0 0825 R |
|||
6 fill1 0831 R | 6 func$ret 01F8 R | 6 func1 01BF R |
|||
6 func11 01F2 R | 6 func12 09B2 R | 6 func13 09B5 R |
|||
6 func15 09C8 R | 6 func16 09D1 R | 6 func17 09D7 R |
|||
6 func18 09EC R | 6 func19 09FB R | 6 func20 0A04 R |
|||
6 func21 0A0A R | 6 func22 0A10 R | 6 func23 0A19 R |
|||
6 func24 0A22 R | 6 func25 0A28 R | 6 func26 0A2E R |
|||
6 func27 0A35 R | 6 func29 0A3B R | 6 func3 01C5 R |
|||
6 func30 0A41 R | 6 func31 0A4A R | 6 func32 0A51 R |
|||
6 func33 0A61 R | 6 func34 0A67 R | 6 func35 0A6D R |
|||
6 func37 0A73 R | 6 func40 0AB9 R | 6 func6 01CB R |
|||
6 func7 01E4 R | 6 func8 01EA R | 6 func9 01EC R |
|||
6 functab 0037 R | fwfmsk **** X | 6 get$bloc 05CD R |
|||
6 getalloc 0485 R | 6 getdm 02F0 R | 6 getdmd 02FE R |
|||
6 getdptra 03CB R | 6 getexta 0331 R | 6 getfcb 033D R |
|||
6 getfcba 0336 R | 6 getfiles 091F R | 6 getmodnu 03D6 R |
|||
6 getnexts 094B R | 6 getsize 092C R | 6 goback 0A94 R |
|||
6 goerr 01FC R | 6 hlrotl 0382 R | 6 hlrotl0 0383 R |
|||
6 hlrotr 036A R | 6 hlrotr0 036B R | 6 home 0240 R |
|||
homef **** X | 6 index 0304 R | 6 indic0 063B R |
|||
6 indicato 0638 R | 6 info 01FC R | 6 initial$ 0428 R |
|||
6 initial0 04F0 R | 6 initial2 050B R | 6 initiali 04E4 R |
|||
ioloc **** X | 6 kbchar 01FC R | 6 lefttst 05CF R |
|||
lf **** X | 6 linelen 0173 R | 6 linfo 0AC6 R |
|||
6 listcp 01FC R | listf **** X | lret **** X |
|||
6 lstack 01FC R | lstrec **** X | 6 make 06F6 R |
|||
6 make0 070E R | 6 maxall 0AC6 R | maxext **** X |
|||
maxmod **** X | 6 merge0 06AA R | 6 merged 06C5 R |
|||
6 mergerr 06F4 R | 6 mergezer 067A R | modnum **** X |
|||
6 move 0201 R | 6 move0 0202 R | namlen **** X |
|||
6 newcheck 0402 R | nfuncs **** X | 6 nopblock 07DD R |
|||
6 noselect 09A9 R | 6 nospace 0885 R | not **** X |
|||
6 notbacks 00B9 R | 6 notc 01B6 R | 6 note 014A R |
|||
6 noth 012D R | 6 notp 0154 R | 6 notr 01A3 R |
|||
6 notrub 013B R | 6 notu 0170 R | 6 notx 0166 R |
|||
6 noupdate 086D R | 6 nowrite 0399 R | nxtrec **** X |
|||
6 offset 0AC6 R | 6 olddsk 0AC6 R | 6 open 0648 R |
|||
6 open$cop 064F R | 6 open$mod 0740 R | 6 open$r$e 076C R |
|||
6 open$rcn 0674 R | 6 open$ree 071F R | 6 open$ree 0746 R |
|||
6 open$ree 0762 R | 6 open$ree 0765 R | 6 pctlh 00DC R |
|||
6 pdollar 0529 R | 6 pererr 0009 R | 6 permsg 004A R |
|||
6 persub 0037 R | 6 print 00F6 R | 6 qselect 09E6 R |
|||
6 ranclose 08B6 R | 6 randiskr 08F4 R | 6 randiskw 08FB R |
|||
ranrec **** X | 6 rcount 0AC6 R | 6 rd$dir 0436 R |
|||
6 rdbuff 0251 R | 6 rdech1 01A6 R | 6 rdecho 01A3 R |
|||
6 read 0102 R | 6 read$dir 0459 R | 6 read$dir 046D R |
|||
6 read$dir 0470 R | 6 readen 01BA R | readerf **** X |
|||
readf **** X | 6 readn0 0110 R | 6 readnx 010E R |
|||
reboot **** X | reccnt **** X | 6 recordok 0793 R |
|||
recsiz **** X | 6 rename 061C R | 6 rename0 0628 R |
|||
6 rep0 017B R | 6 rep1 018D R | 6 resel 0AC6 R |
|||
6 reselect 098D R | 6 retblock 05FB R | 6 retblock 0603 R |
|||
6 retmon 0AAF R | 6 retselec 023E R | 6 righttst 05E0 R |
|||
6 rmf 0AC6 R | 6 roderr 000D R | 6 rodmsg 004A R |
|||
6 rodsk 0AC6 R | 6 rodsub 0041 R | 6 roferr 000F R |
|||
rofile **** X | 6 rofmsg 004A R | 6 rofsub 0044 R |
|||
6 rotl 04A0 R | 6 rotr 04AC R | 6 rseek 0888 R |
|||
6 rseek1 088C R | rubout **** X | 6 scandm 04B3 R |
|||
6 scandm0 04B8 R | 6 scandm1 04C9 R | 6 scandm2 04CF R |
|||
6 scanm3 04DE R | 6 search 0547 R | 6 search$f 05AB R |
|||
6 searcha 0AC6 R | 6 searchex 058F R | 6 searchl 0AC6 R |
|||
6 searchlo 0577 R | 6 searchn 0557 R | 6 searchne 0570 R |
|||
6 searchok 0598 R | 6 sectpt 0AC6 R | sectran **** X |
|||
6 seek 026B R | 6 seek$cop 0616 R | 6 seek$dir 025F R |
|||
6 seek0 027B R | 6 seek1 0291 R | 6 seek2 02A6 R |
|||
6 seekerr 08EC R | 6 seekok 08E2 R | 6 sel$erro 01FC R |
|||
seldskf **** X | 6 select 0960 R | 6 selectdi 020B R |
|||
6 selerr 000B R | 6 selmsg 004A R | 6 selsub 003E R |
|||
6 seqdiskr 0772 R | 6 seqdiskw 07AB R | 6 seqio 0AC6 R |
|||
6 set$allo 04A6 R | 6 set$cdis 0389 R | 6 set$end$ 0455 R |
|||
6 set$ro 03A5 R | 6 setcdr 03F2 R | 6 setdata 043C R |
|||
6 setdir 043F R | 6 setdma 043F R | setdmaf **** X |
|||
6 setfcb 0354 R | 6 setfcb1 035E R | 6 setfwf 03E0 R |
|||
6 setlret1 01F9 R | 6 setrando 0953 R | setsecf **** X |
|||
6 setsize 0951 R | settrkf **** X | 6 setusrco 0A5D R |
|||
6 single 0AC6 R | 6 sta$ret 01F5 R | 6 sthl$ret 0A4D R |
|||
6 strtcol 01FC R | 6 subdh 03FB R | tab **** X |
|||
6 tab0 00CC R | 6 tabout 00C8 R | tbuff **** X |
|||
6 tinfo 0AC6 R | 6 tranv 0AC6 R | true **** X |
|||
ubytes **** X | 6 usrcode 01FC R | 6 vrecord 0AC6 R |
|||
6 wait$err 0044 R | 6 wrbuff 0257 R | 6 wrdir 042A R |
|||
writef **** X |
|||
ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Zilog Z80 / Hitachi HD64180), page 2. |
|||
'Bdos Interface, Bdos, Version 2.2 Feb, 1980' |
|||
Area Table |
|||
|
|||
0 _CODE size 0 flags 0 |
|||
1 _DATA size 0 flags 0 |
|||
2 _OVERLAY size 0 flags 0 |
|||
3 _HOME size 0 flags 0 |
|||
4 _GSINIT size 0 flags 0 |
|||
5 _GSFINAL size 0 flags 0 |
|||
6 _BDOS size AC6 flags 0 |
|||
7 _CABS size 0 flags 0 |
|||
File diff suppressed because it is too large
File diff suppressed because it is too large
@ -1,128 +0,0 @@ |
|||
// ---------------------------------------------------
|
|||
// hex2bin.c 21-May-11 Running on Mac OS X 10.6.6
|
|||
// S/n 2011-1042-654321 Written by Douglas W. Goodall
|
|||
// Copyright(c)2011 Douglas W. Goodall, United States.
|
|||
// ---------------------------------------------------
|
|||
// This file is part of Vintage Modern Assembler Plus Tools.
|
|||
//
|
|||
// VMAPT is free software: you can redistribute it and/or modify
|
|||
// it under the terms of the GNU General Public License as published by
|
|||
// the Free Software Foundation, either version 3 of the License, or
|
|||
// (at your option) any later version.
|
|||
//
|
|||
// VMAPT is distributed in the hope that it will be useful,
|
|||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|||
// GNU General Public License for more details.
|
|||
//
|
|||
// You should have received a copy of the GNU General Public License
|
|||
// along with VMAPT. If not, see <http://www.gnu.org/licenses/>.
|
|||
//
|
|||
|
|||
#include <stdio.h> |
|||
#include <stdlib.h> |
|||
#include <string.h> |
|||
|
|||
#define DATA_RECORD 0x00 |
|||
#define EOF_RECORD 0x01 |
|||
|
|||
int main(int argc,char **argv) |
|||
{ |
|||
char g_szBuffer2[128]; |
|||
char szByteBuffer[2+1]; |
|||
char *p; |
|||
int i; |
|||
int iTemp; |
|||
|
|||
char cColon; |
|||
|
|||
char szLength[2+1]; |
|||
int iLength; |
|||
|
|||
char szAddress[4+1]; |
|||
unsigned int uiAddress; |
|||
|
|||
char szRecordType[2+1]; |
|||
unsigned char ucRecordType; |
|||
|
|||
char szData[80]; |
|||
unsigned char ucBinBuffer[32+1]; |
|||
|
|||
char szChecksum[2+1]; |
|||
unsigned char ucChecksum; |
|||
|
|||
unsigned int uiLastByte = 0; |
|||
|
|||
if(1 == argc) { |
|||
printf("usage - hex2bin <hexfilespec>\n"); |
|||
exit(EXIT_FAILURE); |
|||
} |
|||
|
|||
char szBinFile[255]; |
|||
char szHexFile[255]; |
|||
|
|||
strcpy(szHexFile,argv[1]); |
|||
strcpy(szBinFile,argv[1]); |
|||
|
|||
strcat(szBinFile,".bin"); |
|||
strcat(szHexFile,".hex"); |
|||
|
|||
unsigned char memory[0xfff0]; |
|||
memset(memory,0,sizeof(memory)); |
|||
|
|||
FILE * fhex = fopen(szHexFile,"r"); |
|||
if(NULL == fhex) { |
|||
printf("Sorry, cannot open %s for input\n",szHexFile); |
|||
exit(EXIT_FAILURE); |
|||
} |
|||
p = fgets(g_szBuffer2,sizeof(g_szBuffer2),fhex); |
|||
while(NULL != p) { |
|||
g_szBuffer2[strlen(g_szBuffer2)-1] = 0; |
|||
cColon = g_szBuffer2[0]; |
|||
|
|||
memset(szLength,0,sizeof(szLength)); |
|||
memcpy(szLength,&g_szBuffer2[1],2); |
|||
sscanf(szLength,"%02X",&iLength); |
|||
|
|||
memset(szAddress,0,sizeof(szAddress)); |
|||
memcpy(szAddress,&g_szBuffer2[3],4); |
|||
sscanf(szAddress,"%04X",&uiAddress); |
|||
|
|||
memset(szRecordType,0,sizeof(szRecordType)); |
|||
memcpy(szRecordType,&g_szBuffer2[7],2); |
|||
|
|||
sscanf(szRecordType,"%02X",&iTemp); |
|||
ucRecordType = (unsigned char)iTemp; |
|||
|
|||
if(0 == ucRecordType) { |
|||
memset(szData,0,sizeof(szData)); |
|||
memcpy(szData,&g_szBuffer2[9],iLength*2); |
|||
for(i=0;i<iLength;i++) { |
|||
memset(szByteBuffer,0,sizeof(szByteBuffer)); |
|||
memcpy(szByteBuffer,&g_szBuffer2[1+2+4+2+(i*2)],2); |
|||
sscanf(szByteBuffer,"%02X",&iTemp); |
|||
ucBinBuffer[i] = iTemp; |
|||
memory[uiAddress+i] = (unsigned char)iTemp; |
|||
} |
|||
} |
|||
|
|||
memset(szChecksum,0,sizeof(szChecksum)); |
|||
memcpy(szChecksum,&g_szBuffer2[1+2+4+2+(iLength*2)],2); |
|||
|
|||
sscanf(szChecksum,"%02X",&iTemp); |
|||
ucChecksum = (unsigned char)iTemp; |
|||
|
|||
if(uiLastByte < uiAddress + iLength) { |
|||
uiLastByte = uiAddress + iLength; |
|||
} |
|||
|
|||
p = fgets(g_szBuffer2,sizeof(g_szBuffer2),fhex); |
|||
} |
|||
fclose(fhex); |
|||
|
|||
FILE * fbin = fopen(szBinFile,"w"); |
|||
|
|||
fwrite(&memory,1,uiLastByte,fbin); |
|||
fclose(fbin); |
|||
|
|||
} |
|||
@ -1,9 +0,0 @@ |
|||
-mjx |
|||
-i fdisk.ihx |
|||
-k /usr/local/share/sdcc/lib/z80 |
|||
-l z80 |
|||
cpm0.rel |
|||
fdisk.rel |
|||
cpmbdos.rel |
|||
cprintf.rel |
|||
-e |
|||
@ -1,281 +0,0 @@ |
|||
/***********************************************************/ |
|||
/* fdisk.c 5/12/2011 dwg - fdisk in sdcc for cp/m-80 v2.2c */ |
|||
/* written by douglas w goodall for N8VEM community use */ |
|||
/***********************************************************/ |
|||
|
|||
/*
|
|||
* This is a first cut at a partition editor for CP/M-80 v2.2c |
|||
* and perhaps CP/M-80 v3, for the SBC V1 and V2 and perhaps |
|||
* the N8VEM Home Computer. |
|||
* |
|||
* There were two approaches to this program. Dealing with sector |
|||
* numbers or dealing with track numbers. Because of the eight bit |
|||
* nature of the processor, dealing with track numbers was much |
|||
* better for the code generation. The track numbers can be changed |
|||
* back into LBA sector numbers later on if desired. |
|||
* |
|||
* The only problem I forsee would be if we encountered a partition |
|||
* table that already had LBA offsets that were no on track boundaries. |
|||
* When I worked at DRI, we adjusted the partitions to start and stop |
|||
* on track boundaries. Compatibility with existing drive partitions |
|||
* sounds nice but is not my highest priority. /s douglas goodall |
|||
* |
|||
*/ |
|||
|
|||
#include <stdio.h> |
|||
#include <stdlib.h> |
|||
#include <string.h> |
|||
|
|||
#include "portab.h" |
|||
#ifndef __GNUC__ |
|||
#include "cpmbdos.h" |
|||
#include "cprintf.h" |
|||
#endif |
|||
|
|||
/*
|
|||
* 1MB = 1,048,576 bytes |
|||
* 32MB = 1,048,576 * 32 = 33,554,432 |
|||
* |
|||
* physical sector is 512 bytes |
|||
* physical track is 256 sectors = 131,072 |
|||
* physical drive is 33,554,432 |
|||
* physical tracks are 33,554,432 / 131,072 = 256 |
|||
* physical tracks per physical drive are 256 |
|||
* |
|||
* logical sector is 128 bytes |
|||
* logical track is 256 sectors (aka ) |
|||
* logical drive is 8192KB (aka 8192KB/32KB = 256 logical tracks) |
|||
* |
|||
* |
|||
* 8,388,608 bytes is a logical drive |
|||
* 131,072 bytes is a physical track |
|||
* 8,388,608 / 131,072 = 64 physical tracks per logical drive |
|||
* |
|||
* One byte (0-255) will just hold the number of physical tracks needing |
|||
* to be shared amoung up to four logical drives. |
|||
* |
|||
* physical track 0 - partition sector and second-stage loader if needed |
|||
* physical tracks 1 - 64 = 8.0MB partition ( 64 * 131,072 = 8,388,608 ) |
|||
* physical tracks 65 - 128 = 8.0MB partition ( 64 * 131,072 = 8,388,608 ) |
|||
* physical tracks 129 - 192 = 8.0MB partition ( 64 * 131,072 = 8,388,608 ) |
|||
* physical tracks 193 - 255 = 7.9MB partition ( 63 * 131,072 = 8,257,536 ) |
|||
* |
|||
*/ |
|||
|
|||
#define MAX_PARTS 4 |
|||
#define TRKS_PER_PHY_DRV 256 |
|||
#define TRKS_PER_LOG_DRV 64 /* 256 sectors * 512 = 128k */ |
|||
|
|||
#define SAFESTRING 80 /* make large enough to avoid accidental overrun */ |
|||
|
|||
#define U8 unsigned char |
|||
|
|||
struct PART_TABLE { /* in-memory instance of partition table */ |
|||
U8 start; /* starting track of a partition */ |
|||
U8 end; /* ending track of a partition */ |
|||
} pt[MAX_PARTS] = { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 } }; |
|||
|
|||
U8 bRunning; /* scratchpad used used by the main loop */ |
|||
U8 end; /* scratchpad used to hold ending track of a part */ |
|||
U8 Index; /* scratchpad used as index for for loops */ |
|||
U8 NumParts; /* scratchpad to hold the current number of parts */ |
|||
U8 LastEnd; /* scratchpad to hold the last track allocated */ |
|||
U8 NewEnd; /* scratchpad to hold the proposed ending track */ |
|||
U8 NewMax; /* scratchpad to hold the proposed max part size */ |
|||
U8 NewSize; /* scratchpad to hold the decided new part size */ |
|||
U8 NewStart; /* scratchpad to hold the decided starting track */ |
|||
U8 start; /* scratchpad to hold the starting track of a part */ |
|||
U8 Avail; /* scratchpad to hold the remaining avialable tracks */ |
|||
|
|||
char szChoice[SAFESTRING]; /* string used to receive keystrokes */ |
|||
char szTemp[SAFESTRING]; /* string used for general purposes */ |
|||
|
|||
/* THESE ARE USED BY THE LIBRARY ROUTINES */ |
|||
#ifndef __GNUC__ |
|||
char getchar(void) |
|||
{ |
|||
struct BDOSCALL cread = { C_READ, { (unsigned int)0 } }; |
|||
return cpmbdos(&cread); |
|||
} |
|||
void outchar(char c) |
|||
{ |
|||
struct BDOSCALL cwrite = { C_WRITE, { (unsigned int)c } }; |
|||
cpmbdos(&cwrite); |
|||
} |
|||
#endif |
|||
|
|||
void display_menu(void) |
|||
{ |
|||
if(NumParts < MAX_PARTS) { |
|||
if(0 < Avail) { |
|||
printf("a - add partition #%d\n",NumParts+1); |
|||
} |
|||
} |
|||
if(0 < NumParts) { |
|||
printf("d - delete partition #%d\n",NumParts); |
|||
} |
|||
if(1 < NumParts) { |
|||
printf("D - delete all partitions, 1 - %d\n",NumParts); |
|||
} |
|||
if(0 == NumParts) { |
|||
printf("A - create all 8MB partitions\n"); |
|||
} |
|||
printf("q - quit fdisk\n\n"); |
|||
} |
|||
|
|||
char query(char *str) |
|||
{ |
|||
printf("%s",str); |
|||
gets(szTemp); |
|||
if('Y' == szTemp[0]) { |
|||
return TRUE; |
|||
} else { |
|||
return FALSE; |
|||
} |
|||
} |
|||
|
|||
void delete(void) |
|||
{ |
|||
if(0 < NumParts) { |
|||
if(TRUE == query("Delete partition(Y/n)?")) { |
|||
pt[NumParts-1].start = 0; |
|||
pt[NumParts-1].end = 0; |
|||
} |
|||
} |
|||
} |
|||
|
|||
void deleteall(void) |
|||
{ |
|||
if(0 < NumParts) { |
|||
if(TRUE == query("Delete all partitions(Y/n)?")) { |
|||
for(Index=0;Index<MAX_PARTS;Index++) { |
|||
pt[Index].start = 0; |
|||
pt[Index].end = 0; |
|||
} |
|||
} |
|||
} |
|||
} |
|||
|
|||
U8 request(char *szPrompt) |
|||
{ |
|||
printf("%s",szPrompt); |
|||
gets(szTemp); |
|||
return(atoi(szTemp)); |
|||
} |
|||
|
|||
U8 request2(char *szPrompt,U8 Default) |
|||
{ |
|||
printf(szPrompt,Default); |
|||
gets(szTemp); |
|||
#ifdef __GNUC__ |
|||
if(0 == strlen(szTemp)) return(Default); |
|||
#else |
|||
if(1 == strlen(szTemp)) return(Default); |
|||
#endif |
|||
|
|||
return(atoi(szTemp)); |
|||
} |
|||
|
|||
U8 smaller(U8 a,U8 b) |
|||
{ |
|||
if(a<b) return a; |
|||
else return b; |
|||
} |
|||
|
|||
void all(void) |
|||
{ |
|||
Avail = TRKS_PER_PHY_DRV-1; |
|||
LastEnd = 0; |
|||
|
|||
for(Index=0;Index<MAX_PARTS;Index++) { |
|||
if(0 < Avail) { |
|||
NewStart = LastEnd + 1; |
|||
NewSize = smaller(Avail,TRKS_PER_LOG_DRV); |
|||
NewEnd = NewStart + NewSize - 1; |
|||
pt[Index].start = NewStart; |
|||
pt[Index].end = NewEnd; |
|||
LastEnd = NewEnd; |
|||
Avail -= NewSize; |
|||
} |
|||
} |
|||
} |
|||
|
|||
void add(void) |
|||
{ |
|||
NewStart = LastEnd + 1; |
|||
NewMax = smaller(TRKS_PER_LOG_DRV,Avail); |
|||
NewSize = request2("Number of Tracks (Max %d)? ",NewMax); |
|||
pt[NumParts].start = LastEnd+1; |
|||
pt[NumParts].end = NewStart + NewSize - 1; |
|||
} |
|||
|
|||
void view(void) |
|||
{ |
|||
NumParts = 0; |
|||
LastEnd = 0; |
|||
|
|||
for(Index=0;Index<MAX_PARTS;Index++) { |
|||
start = pt[Index].start; |
|||
end = pt[Index].end; |
|||
|
|||
if(0 < (start) ) { |
|||
NumParts++; |
|||
LastEnd = end; |
|||
} |
|||
} |
|||
Avail = TRKS_PER_PHY_DRV - LastEnd - 1; |
|||
|
|||
printf("N8VEM Partition Editor by Douglas Goodall\n\n"); |
|||
printf(" Available tracks are %d\n\n",Avail); |
|||
NumParts = 0; |
|||
for(Index=0;Index<MAX_PARTS;Index++) { |
|||
start = pt[Index].start; |
|||
end = pt[Index].end; |
|||
|
|||
if(0 != end) { |
|||
printf("Part#%d ",Index+1); |
|||
printf("Start %6d (0x%05X), ",start,start); |
|||
printf("End %6d (0X%05X) ",end,end); |
|||
printf("Size %6d (0x%05X) ", end-start+1,end-start+1); |
|||
printf("\n"); |
|||
NumParts++; |
|||
} |
|||
} |
|||
printf("\n"); |
|||
} |
|||
|
|||
int main() |
|||
{ |
|||
|
|||
/* FILE * fd = fopen("parttabl.bin","r");
|
|||
if(NULL != fd) { |
|||
fread(&pt,1,sizeof(pt),fd); |
|||
fclose(fd); |
|||
} else { |
|||
memset(&pt,0,(int)sizeof(pt)); |
|||
} |
|||
*/ |
|||
|
|||
bRunning = 1; |
|||
while(1 == bRunning) { |
|||
view(); |
|||
display_menu(); |
|||
gets(szChoice); |
|||
switch(szChoice[0]) { |
|||
case 'a': add(); break; |
|||
case 'd': delete(); break; |
|||
case 'D': deleteall(); break; |
|||
case 'q': bRunning = 0; break; |
|||
case 'A': all(); break; |
|||
} |
|||
} |
|||
|
|||
/*
|
|||
FILE * fd2 = fopen("parttabl.bin","w"); |
|||
fwrite(&pt,1,sizeof(pt),fd2); |
|||
fclose(fd2); |
|||
*/ |
|||
|
|||
return (EXIT_SUCCESS); |
|||
} |
|||
|
|||
@ -1,9 +0,0 @@ |
|||
-mjx |
|||
-i fdisk.ihx |
|||
-k /usr/local/share/sdcc/lib/z80 |
|||
-l z80 |
|||
cpm0.rel |
|||
fdisk.rel |
|||
cpmbdos.rel |
|||
cprintf.rel |
|||
-e |
|||
@ -1,9 +0,0 @@ |
|||
-mjx |
|||
-i fdisk.ihx |
|||
-k /usr/local/share/sdcc/lib/z80 |
|||
-l z80 |
|||
cpm0.rel |
|||
fdisk.rel |
|||
cpmbdos.rel |
|||
cprintf.rel |
|||
-e |
|||
File diff suppressed because it is too large
@ -1,13 +0,0 @@ |
|||
-mjx |
|||
-i homecomp.ihx |
|||
-k /usr/local/share/sdcc/lib/z80 |
|||
-l z80 |
|||
-b _CCPB03 = 0x0900 |
|||
-b _BDOSB01 = 0xD800 |
|||
-b _CBIOS = 0xE600 |
|||
-b _DBGMON = 0x0200 |
|||
loaderhc.rel |
|||
dbgmon.rel |
|||
ccpb03.rel |
|||
bdosb01.rel |
|||
cbios.rel |
|||
@ -1,528 +0,0 @@ |
|||
/* hex2bin.c -- yet another reader and writer of Intel hex files
|
|||
Copyright (C) 2011 John R Coffman <johninsd@gmail.com>. |
|||
*********************************************************************** |
|||
When invoked as 'hex2bin' read a sequence of Intel hex files |
|||
and create an overlaid binary file. |
|||
|
|||
When invoked as 'bin2hex' read a binary file and create an |
|||
Intel hex file. |
|||
|
|||
All command line numeric constants may be specified in any |
|||
radix. |
|||
*********************************************************************** |
|||
|
|||
This program is free software: you can redistribute it and/or modify |
|||
it under the terms of the GNU General Public License as published by |
|||
the Free Software Foundation, either version 3 of the License, or |
|||
(at your option) any later version. |
|||
|
|||
This program is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
GNU General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU General Public License |
|||
in the file COPYING in the distribution directory along with this |
|||
program. If not, see <http://www.gnu.org/licenses/>.
|
|||
|
|||
**********************************************************************/ |
|||
#include <stdlib.h> |
|||
#include <stdio.h> |
|||
#include <string.h> |
|||
#include "jrctypes.h" |
|||
|
|||
#define true 1 |
|||
#define false 0 |
|||
#define SEG_MASK 0x00FFFFu |
|||
#define LBA_MASK 0x00FF0000ul |
|||
#define MAX_MASK (LBA_MASK|SEG_MASK) |
|||
#define ONE_MEG 0x100000ul |
|||
|
|||
dword upper_lba = 0; /* upper address */ |
|||
dword address_mask = SEG_MASK; /* address mask */ |
|||
byte pad = 0xFF; |
|||
byte *buffer; |
|||
dword rom_size = 0; |
|||
dword overwrite; /* count of possible overwrites */ |
|||
byte h2b, verbose; |
|||
char *outfilename = NULL; |
|||
char *binfilename = NULL; |
|||
dword source_address, source_limit; |
|||
dword dest_address, dest_limit; |
|||
FILE *infile; |
|||
FILE *outfile; |
|||
byte checksum; |
|||
char line[1024]; |
|||
char *lp; |
|||
long int lineno; |
|||
|
|||
|
|||
|
|||
dword convert_constant(char *str) |
|||
{ |
|||
char *final; |
|||
dword value = strtoul(str, &final, 0); |
|||
|
|||
if (*final == 'k' || *final == 'K') value *= 1024ul; |
|||
else if (*final == 'M' || *final == 'm') value *= ONE_MEG; |
|||
|
|||
return value; |
|||
} |
|||
|
|||
void error(byte level, char *msg) |
|||
{ |
|||
printf("%s(%d): %s\n", |
|||
level>1 ? "Error" : "Warning", (int)level, msg); |
|||
if (level>1) exit(level); |
|||
else if (level==0) printf("line %ld %s", lineno, line); |
|||
} |
|||
|
|||
|
|||
int getnibble(void) |
|||
{ |
|||
char ch; |
|||
|
|||
if (lp) { |
|||
ch = *lp++; |
|||
if (ch>='0' && ch<='9') ch -= '0'; |
|||
else if (ch>='A' && ch<='F') ch -= 'A'-10; |
|||
else if (ch>='a' && ch<='f') ch -= 'a'-10; |
|||
else { |
|||
error(0,"Illegal hex digit"); |
|||
ch = -1; |
|||
} |
|||
} |
|||
else error(0,"Line is too short"); |
|||
return (int)ch; |
|||
} |
|||
|
|||
int getbyte(void) |
|||
{ |
|||
int b = getnibble(); |
|||
b <<= 4; |
|||
b += getnibble(); |
|||
checksum += b; |
|||
return b; |
|||
} |
|||
|
|||
int getword(void) |
|||
{ |
|||
int w = getbyte(); |
|||
w <<= 8; |
|||
w += getbyte(); |
|||
return w; |
|||
} |
|||
|
|||
dword getdword(void) |
|||
{ |
|||
dword d = getword(); |
|||
d <<= 16; |
|||
d += getword(); |
|||
return d; |
|||
} |
|||
|
|||
|
|||
void putbyte(dword address, byte data) |
|||
{ |
|||
if (address < source_address || address > source_limit) return; |
|||
address -= source_address; |
|||
address += dest_address; |
|||
if (address > dest_limit) return; |
|||
if (address >= rom_size) { |
|||
printf("Line %ld ",lineno); error(2,"Data beyond end of ROM"); |
|||
} |
|||
if (buffer[address] != pad) { |
|||
overwrite++; |
|||
if (verbose || overwrite<=100) printf("Warning(1): Overwrite at ROM address 0x%lX\n", address); |
|||
} |
|||
buffer[address] = data; |
|||
} |
|||
|
|||
|
|||
void usage(void) |
|||
{ |
|||
printf("hex2bin.c (bin2hex) -- " __DATE__ " " __TIME__ ".\n" |
|||
"Copyright (c) 2011 John R Coffman. All rights reserved.\n" |
|||
"Distributed under the GNU General Public License, a copy of which\n" |
|||
"is contained in the file COPYING in the distribution directory.\n\n"); |
|||
if (h2b) printf( |
|||
"Usage:\n" |
|||
" hex2bin <options> [<flags> <filename>]+\n\n" |
|||
" Options:\n" |
|||
" -o <output filename>\n" |
|||
" -p <pad byte>\n" |
|||
" -R <ROM size> default 64K\n" |
|||
" -v [<verbosity level>]\n" |
|||
" Flags:\n" |
|||
" -d <destination address in BIN file>\n" |
|||
" -D <destination limit in BIN file>\n" |
|||
" -s <source address in HEX file>\n" |
|||
" -S <source limit in HEX file>\n" |
|||
); |
|||
else printf( |
|||
"Usage:\n" |
|||
" bin2hex <options> [<flags> <filename>]+\n\n" |
|||
" Options:\n" |
|||
" -o <output filename>\n" |
|||
" -p <pad byte>\n" |
|||
" -R <ROM size> default 1024K\n" |
|||
" -v [<verbosity level>]\n" |
|||
" Flags:\n" |
|||
" -d <destination address in HEX file>\n" |
|||
" -D <destination limit in HEX file>\n" |
|||
" -s <source address in BIN file>\n" |
|||
" -S <source limit in BIN file>\n" |
|||
); |
|||
} |
|||
|
|||
|
|||
void hout_byte(byte data) |
|||
{ |
|||
checksum -= data; |
|||
fprintf(outfile, "%02X", (int)data); |
|||
} |
|||
void hout_word(word data) |
|||
{ |
|||
hout_byte(data>>8); |
|||
hout_byte(data); |
|||
} |
|||
void begin_record(byte length) |
|||
{ |
|||
checksum = 0; |
|||
fputc(':', outfile); |
|||
hout_byte(length); |
|||
} |
|||
void end_record(void) |
|||
{ |
|||
hout_byte(checksum); |
|||
fputc('\n', outfile); |
|||
} |
|||
|
|||
void write_lba(dword address) |
|||
{ |
|||
if (verbose==5) printf("Address: %06lX\n", address); |
|||
|
|||
if ((address & LBA_MASK) != upper_lba) { |
|||
upper_lba = address & LBA_MASK; |
|||
begin_record(2); |
|||
hout_word(0); |
|||
if (rom_size > ONE_MEG) { |
|||
hout_byte(4); /* linear address */ |
|||
hout_word(upper_lba>>16); |
|||
} |
|||
else { /* handle ROMs 1meg and smaller */ |
|||
hout_byte(2); /* segment address */ |
|||
hout_word(upper_lba>>4); |
|||
} |
|||
end_record(); |
|||
} |
|||
} |
|||
|
|||
void write_data(word nbytes, byte *buf, dword address) |
|||
{ |
|||
/* compress from the high end */ |
|||
while (nbytes && buf[nbytes-1]==pad) --nbytes; |
|||
/* compress from the low end */ |
|||
while (nbytes && *buf==pad) { |
|||
++buf; |
|||
++address; |
|||
--nbytes; |
|||
} |
|||
if (nbytes) { |
|||
write_lba(address); |
|||
begin_record(nbytes); |
|||
hout_word(address & 0xFFFFu); |
|||
hout_byte(0); /* data record */ |
|||
while(nbytes--) hout_byte(*buf++); |
|||
end_record(); |
|||
} |
|||
} |
|||
|
|||
#define min(a,b) ((a)<(b)?(a):(b)) |
|||
#define NREC 16 |
|||
|
|||
void write_hex_file(FILE *outfile) |
|||
{ |
|||
dword nbytes; |
|||
dword vaddr; |
|||
dword n; |
|||
byte *buf; |
|||
|
|||
buf = buffer; |
|||
vaddr = 0; |
|||
nbytes = rom_size; |
|||
n = min(nbytes, NREC); |
|||
do { |
|||
write_data(n, buf, vaddr); |
|||
buf += n; |
|||
vaddr += n; |
|||
nbytes -= n; |
|||
n = min(nbytes, NREC); |
|||
} while (n); |
|||
/* write the end-of-file record */ |
|||
fprintf(outfile,":00000001FF\n"); |
|||
} |
|||
|
|||
|
|||
void scan_bin_file(char *filename) |
|||
{ |
|||
dword length; |
|||
dword nbytes; |
|||
int data; |
|||
dword inaddr; |
|||
|
|||
infile = fopen(filename, "rb"); |
|||
if (!infile) { |
|||
strcpy(line,"Cannot find file: "); |
|||
error(5, strcat(line, filename)); |
|||
} |
|||
|
|||
fseek(infile,0L,SEEK_END); |
|||
length = ftell(infile); |
|||
|
|||
// length = filelength(fileno(infile));
|
|||
|
|||
nbytes = 0; |
|||
inaddr = dest_address; |
|||
if (source_address < length) { |
|||
fseek(infile, source_address, SEEK_SET); |
|||
while (inaddr<rom_size && inaddr<=dest_limit) { |
|||
data = fgetc(infile); |
|||
if (data == EOF) break; |
|||
buffer[inaddr++] = data; |
|||
} |
|||
} |
|||
|
|||
fclose(infile); |
|||
} |
|||
|
|||
void scan_hex_file(char *filename) |
|||
{ |
|||
byte ldata; |
|||
dword laddr; |
|||
byte rectype; |
|||
dword value; |
|||
dword index; |
|||
byte data; |
|||
byte EndOfFile = 0; |
|||
|
|||
infile = fopen(filename, "rt"); |
|||
if (!infile) { |
|||
strcpy(line,"Cannot find file: "); |
|||
error(5, strcat(line, filename)); |
|||
} |
|||
lineno = 0; |
|||
do { |
|||
lineno++; |
|||
lp = fgets(line, nelem(line)-1, infile); |
|||
if (lp == NULL) break; |
|||
if (*lp++ != ':') { |
|||
printf("Comment: %s",--lp); |
|||
continue; |
|||
} |
|||
if (verbose>=3) printf("%s", lp-1); |
|||
checksum = 0; |
|||
ldata = getbyte(); |
|||
laddr = getword(); |
|||
rectype = getbyte(); |
|||
switch (rectype) { |
|||
case 0: /* data record */ |
|||
index = 0; |
|||
while (ldata--) { |
|||
data = getbyte(); |
|||
putbyte(upper_lba + ((laddr + index)&address_mask), data); |
|||
index++; |
|||
} |
|||
break; |
|||
case 1: /* end of file record */ |
|||
EndOfFile = 1; |
|||
break; |
|||
case 2: /* segment address */ |
|||
address_mask = SEG_MASK; |
|||
value = getword(); |
|||
upper_lba = value<<4; /* start of segment */ |
|||
ldata -= 2; |
|||
break; |
|||
case 4: /* linear upper address */ |
|||
address_mask = MAX_MASK; |
|||
value = getword(); |
|||
upper_lba = value<<16; /* full 32-bit address range */ |
|||
ldata -= 2; |
|||
break; |
|||
case 3: /* start CS:IP */ |
|||
case 5: /* linear start address */ |
|||
value = getdword(); |
|||
ldata -= 4; |
|||
default: |
|||
error(0,"Unknown record type:"); |
|||
} |
|||
getbyte(); /* get final checksum */ |
|||
if (checksum) { |
|||
error(0,"Checksum failure"); |
|||
} |
|||
} while (lp && !EndOfFile); |
|||
fclose(infile); |
|||
} |
|||
|
|||
|
|||
void global_options(int argc, char *argv[]) |
|||
{ |
|||
int iarg; |
|||
char *cp; |
|||
char *tp; |
|||
char ch; |
|||
|
|||
h2b = false; |
|||
rom_size = ONE_MEG; /* bin2hex default value */ |
|||
/* decide which conversion to do */ |
|||
if (strstr(argv[0],"hex2bin") |
|||
#ifdef MSDOS |
|||
|| strstr(argv[0],"HEX2BIN") |
|||
#endif |
|||
) { |
|||
h2b = true; |
|||
rom_size = 64 * 1024ul; /* default value */ |
|||
} /* assume 'bin2hex' otherwise */ |
|||
|
|||
if (argc<2) { usage(); exit(0); } |
|||
|
|||
/* scan the global command line options */ |
|||
for (iarg = 0; iarg<argc; iarg++) { |
|||
cp = argv[iarg]; |
|||
if (*cp == '-' |
|||
#ifdef MSDOS |
|||
|| *cp == '/' |
|||
#endif |
|||
) { |
|||
ch = cp[1]; |
|||
tp = cp + 2; |
|||
switch (ch) { |
|||
case 'h': |
|||
usage(); |
|||
exit(0); |
|||
case 'o': /* outfile name specification */ |
|||
if (!*tp) tp = argv[++iarg]; |
|||
outfilename = strdup(tp); |
|||
*cp = *tp = 0; |
|||
break; |
|||
case 'p': /* specify the pad byte */ |
|||
if (!*tp) tp = argv[++iarg]; |
|||
pad = (byte)convert_constant(tp); |
|||
*cp = *tp = 0; |
|||
break; |
|||
case 'R': /* ROM file size specification */ |
|||
if (!*tp) tp = argv[++iarg]; |
|||
rom_size = convert_constant(tp); |
|||
if (rom_size > MAX_MASK+1) error(5, "ROM size too big"); |
|||
if (rom_size < 256) error(5, "ROM size too small"); |
|||
*cp = *tp = 0; |
|||
break; |
|||
case 'v': /* print verbose statistics */ |
|||
verbose++; |
|||
if (!*tp) tp = argv[++iarg]; |
|||
if (*tp>='1' && *tp<='5' && tp[1]==0) verbose += (*tp - '1'); |
|||
else tp = cp; |
|||
*cp = *tp = 0; |
|||
break; |
|||
case 'Y': { |
|||
int i; |
|||
for (i=0; i<argc; i++) |
|||
printf(" %s", argv[i]); |
|||
printf("\n"); |
|||
exit(0); |
|||
} |
|||
default: |
|||
break; |
|||
} |
|||
} // if '-'
|
|||
} // for (iarg ...
|
|||
} |
|||
|
|||
|
|||
void process_cmd_input(int argc, char *argv[]) |
|||
{ |
|||
int iarg; |
|||
char *cp; |
|||
char *tp; |
|||
|
|||
source_address = dest_address = 0; |
|||
source_limit = dest_limit = MAX_MASK; |
|||
|
|||
for (iarg=1; iarg<argc; iarg++) { |
|||
cp = argv[iarg]; |
|||
if (*cp == '-' |
|||
#ifdef MSDOS |
|||
|| *cp == '/' |
|||
#endif |
|||
) { |
|||
++cp; |
|||
tp = cp + 1; |
|||
switch (*cp) { |
|||
case 's': /* source */ |
|||
if (!*tp) tp = argv[++iarg]; |
|||
source_address = convert_constant(tp); |
|||
break; |
|||
case 'S': /* source limit */ |
|||
if (!*tp) tp = argv[++iarg]; |
|||
source_limit = convert_constant(tp); |
|||
break; |
|||
case 'd': /* destination */ |
|||
if (!*tp) tp = argv[++iarg]; |
|||
dest_address = convert_constant(tp); |
|||
break; |
|||
case 'D': /* destination limit */ |
|||
if (!*tp) tp = argv[++iarg]; |
|||
dest_limit = convert_constant(tp) - 1; |
|||
break; |
|||
} // switch
|
|||
} // if (*cp == '-' ...
|
|||
else if (*cp) { /* this must be a filename */ |
|||
if (h2b) scan_hex_file(cp); |
|||
else scan_bin_file(cp); |
|||
|
|||
/* reset the local relocation options */ |
|||
source_address = 0; |
|||
dest_address = 0; |
|||
source_limit = MAX_MASK; |
|||
dest_limit = MAX_MASK; |
|||
} |
|||
} // for (iarg
|
|||
} |
|||
|
|||
|
|||
|
|||
int main(int argc, char *argv[]) |
|||
{ |
|||
dword index; |
|||
byte *ptr; |
|||
|
|||
verbose = 0; |
|||
global_options(argc, argv); |
|||
|
|||
buffer = malloc(rom_size); |
|||
if (!buffer) error(5,"Cannot allocate ROM buffer"); |
|||
for (ptr=buffer, index=rom_size; index; index--) *ptr++ = pad; |
|||
|
|||
process_cmd_input(argc, argv); |
|||
|
|||
if (!outfilename) { |
|||
if (h2b) { |
|||
outfilename = "out.bin"; |
|||
} |
|||
else { |
|||
outfilename = "out.hex"; |
|||
} |
|||
error(1,"No output file specified"); |
|||
printf("Using file named '%s' for output\n", outfilename); |
|||
} |
|||
outfile = fopen(outfilename, h2b ? "wb" : "wt"); |
|||
if (!outfile) error(5,"Cannot create output file"); |
|||
|
|||
if (h2b) while (rom_size--) fputc(*buffer++, outfile); |
|||
else write_hex_file(outfile); |
|||
|
|||
fclose(outfile); |
|||
|
|||
return EXIT_SUCCESS; |
|||
} |
|||
|
|||
@ -1,528 +0,0 @@ |
|||
/* hex2bin.c -- yet another reader and writer of Intel hex files
|
|||
Copyright (C) 2011 John R Coffman <johninsd@gmail.com>. |
|||
*********************************************************************** |
|||
When invoked as 'hex2bin' read a sequence of Intel hex files |
|||
and create an overlaid binary file. |
|||
|
|||
When invoked as 'bin2hex' read a binary file and create an |
|||
Intel hex file. |
|||
|
|||
All command line numeric constants may be specified in any |
|||
radix. |
|||
*********************************************************************** |
|||
|
|||
This program is free software: you can redistribute it and/or modify |
|||
it under the terms of the GNU General Public License as published by |
|||
the Free Software Foundation, either version 3 of the License, or |
|||
(at your option) any later version. |
|||
|
|||
This program is distributed in the hope that it will be useful, |
|||
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
GNU General Public License for more details. |
|||
|
|||
You should have received a copy of the GNU General Public License |
|||
in the file COPYING in the distribution directory along with this |
|||
program. If not, see <http://www.gnu.org/licenses/>.
|
|||
|
|||
**********************************************************************/ |
|||
#include <stdlib.h> |
|||
#include <stdio.h> |
|||
#include <string.h> |
|||
#include "jrctypes.h" |
|||
|
|||
#define true 1 |
|||
#define false 0 |
|||
#define SEG_MASK 0x00FFFFu |
|||
#define LBA_MASK 0x00FF0000ul |
|||
#define MAX_MASK (LBA_MASK|SEG_MASK) |
|||
#define ONE_MEG 0x100000ul |
|||
|
|||
dword upper_lba = 0; /* upper address */ |
|||
dword address_mask = SEG_MASK; /* address mask */ |
|||
byte pad = 0xFF; |
|||
byte *buffer; |
|||
dword rom_size = 0; |
|||
dword overwrite; /* count of possible overwrites */ |
|||
byte h2b, verbose; |
|||
char *outfilename = NULL; |
|||
char *binfilename = NULL; |
|||
dword source_address, source_limit; |
|||
dword dest_address, dest_limit; |
|||
FILE *infile; |
|||
FILE *outfile; |
|||
byte checksum; |
|||
char line[1024]; |
|||
char *lp; |
|||
long int lineno; |
|||
|
|||
|
|||
|
|||
dword convert_constant(char *str) |
|||
{ |
|||
char *final; |
|||
dword value = strtoul(str, &final, 0); |
|||
|
|||
if (*final == 'k' || *final == 'K') value *= 1024ul; |
|||
else if (*final == 'M' || *final == 'm') value *= ONE_MEG; |
|||
|
|||
return value; |
|||
} |
|||
|
|||
void error(byte level, char *msg) |
|||
{ |
|||
printf("%s(%d): %s\n", |
|||
level>1 ? "Error" : "Warning", (int)level, msg); |
|||
if (level>1) exit(level); |
|||
else if (level==0) printf("line %ld %s", lineno, line); |
|||
} |
|||
|
|||
|
|||
int getnibble(void) |
|||
{ |
|||
char ch; |
|||
|
|||
if (lp) { |
|||
ch = *lp++; |
|||
if (ch>='0' && ch<='9') ch -= '0'; |
|||
else if (ch>='A' && ch<='F') ch -= 'A'-10; |
|||
else if (ch>='a' && ch<='f') ch -= 'a'-10; |
|||
else { |
|||
error(0,"Illegal hex digit"); |
|||
ch = -1; |
|||
} |
|||
} |
|||
else error(0,"Line is too short"); |
|||
return (int)ch; |
|||
} |
|||
|
|||
int getbyte(void) |
|||
{ |
|||
int b = getnibble(); |
|||
b <<= 4; |
|||
b += getnibble(); |
|||
checksum += b; |
|||
return b; |
|||
} |
|||
|
|||
int getword(void) |
|||
{ |
|||
int w = getbyte(); |
|||
w <<= 8; |
|||
w += getbyte(); |
|||
return w; |
|||
} |
|||
|
|||
dword getdword(void) |
|||
{ |
|||
dword d = getword(); |
|||
d <<= 16; |
|||
d += getword(); |
|||
return d; |
|||
} |
|||
|
|||
|
|||
void putbyte(dword address, byte data) |
|||
{ |
|||
if (address < source_address || address > source_limit) return; |
|||
address -= source_address; |
|||
address += dest_address; |
|||
if (address > dest_limit) return; |
|||
if (address >= rom_size) { |
|||
printf("Line %ld ",lineno); error(2,"Data beyond end of ROM"); |
|||
} |
|||
if (buffer[address] != pad) { |
|||
overwrite++; |
|||
if (verbose || overwrite<=100) printf("Warning(1): Overwrite at ROM address 0x%lX\n", address); |
|||
} |
|||
buffer[address] = data; |
|||
} |
|||
|
|||
|
|||
void usage(void) |
|||
{ |
|||
printf("hex2bin.c (bin2hex) -- " __DATE__ " " __TIME__ ".\n" |
|||
"Copyright (c) 2011 John R Coffman. All rights reserved.\n" |
|||
"Distributed under the GNU General Public License, a copy of which\n" |
|||
"is contained in the file COPYING in the distribution directory.\n\n"); |
|||
if (h2b) printf( |
|||
"Usage:\n" |
|||
" hex2bin <options> [<flags> <filename>]+\n\n" |
|||
" Options:\n" |
|||
" -o <output filename>\n" |
|||
" -p <pad byte>\n" |
|||
" -R <ROM size> default 64K\n" |
|||
" -v [<verbosity level>]\n" |
|||
" Flags:\n" |
|||
" -d <destination address in BIN file>\n" |
|||
" -D <destination limit in BIN file>\n" |
|||
" -s <source address in HEX file>\n" |
|||
" -S <source limit in HEX file>\n" |
|||
); |
|||
else printf( |
|||
"Usage:\n" |
|||
" bin2hex <options> [<flags> <filename>]+\n\n" |
|||
" Options:\n" |
|||
" -o <output filename>\n" |
|||
" -p <pad byte>\n" |
|||
" -R <ROM size> default 1024K\n" |
|||
" -v [<verbosity level>]\n" |
|||
" Flags:\n" |
|||
" -d <destination address in HEX file>\n" |
|||
" -D <destination limit in HEX file>\n" |
|||
" -s <source address in BIN file>\n" |
|||
" -S <source limit in BIN file>\n" |
|||
); |
|||
} |
|||
|
|||
|
|||
void hout_byte(byte data) |
|||
{ |
|||
checksum -= data; |
|||
fprintf(outfile, "%02X", (int)data); |
|||
} |
|||
void hout_word(word data) |
|||
{ |
|||
hout_byte(data>>8); |
|||
hout_byte(data); |
|||
} |
|||
void begin_record(byte length) |
|||
{ |
|||
checksum = 0; |
|||
fputc(':', outfile); |
|||
hout_byte(length); |
|||
} |
|||
void end_record(void) |
|||
{ |
|||
hout_byte(checksum); |
|||
fputc('\n', outfile); |
|||
} |
|||
|
|||
void write_lba(dword address) |
|||
{ |
|||
if (verbose==5) printf("Address: %06lX\n", address); |
|||
|
|||
if ((address & LBA_MASK) != upper_lba) { |
|||
upper_lba = address & LBA_MASK; |
|||
begin_record(2); |
|||
hout_word(0); |
|||
if (rom_size > ONE_MEG) { |
|||
hout_byte(4); /* linear address */ |
|||
hout_word(upper_lba>>16); |
|||
} |
|||
else { /* handle ROMs 1meg and smaller */ |
|||
hout_byte(2); /* segment address */ |
|||
hout_word(upper_lba>>4); |
|||
} |
|||
end_record(); |
|||
} |
|||
} |
|||
|
|||
void write_data(word nbytes, byte *buf, dword address) |
|||
{ |
|||
/* compress from the high end */ |
|||
while (nbytes && buf[nbytes-1]==pad) --nbytes; |
|||
/* compress from the low end */ |
|||
while (nbytes && *buf==pad) { |
|||
++buf; |
|||
++address; |
|||
--nbytes; |
|||
} |
|||
if (nbytes) { |
|||
write_lba(address); |
|||
begin_record(nbytes); |
|||
hout_word(address & 0xFFFFu); |
|||
hout_byte(0); /* data record */ |
|||
while(nbytes--) hout_byte(*buf++); |
|||
end_record(); |
|||
} |
|||
} |
|||
|
|||
#define min(a,b) ((a)<(b)?(a):(b)) |
|||
#define NREC 16 |
|||
|
|||
void write_hex_file(FILE *outfile) |
|||
{ |
|||
dword nbytes; |
|||
dword vaddr; |
|||
dword n; |
|||
byte *buf; |
|||
|
|||
buf = buffer; |
|||
vaddr = 0; |
|||
nbytes = rom_size; |
|||
n = min(nbytes, NREC); |
|||
do { |
|||
write_data(n, buf, vaddr); |
|||
buf += n; |
|||
vaddr += n; |
|||
nbytes -= n; |
|||
n = min(nbytes, NREC); |
|||
} while (n); |
|||
/* write the end-of-file record */ |
|||
fprintf(outfile,":00000001FF\n"); |
|||
} |
|||
|
|||
|
|||
void scan_bin_file(char *filename) |
|||
{ |
|||
dword length; |
|||
dword nbytes; |
|||
int data; |
|||
dword inaddr; |
|||
|
|||
infile = fopen(filename, "rb"); |
|||
if (!infile) { |
|||
strcpy(line,"Cannot find file: "); |
|||
error(5, strcat(line, filename)); |
|||
} |
|||
|
|||
fseek(infile,0L,SEEK_END); |
|||
length = ftell(infile); |
|||
|
|||
// length = filelength(fileno(infile));
|
|||
|
|||
nbytes = 0; |
|||
inaddr = dest_address; |
|||
if (source_address < length) { |
|||
fseek(infile, source_address, SEEK_SET); |
|||
while (inaddr<rom_size && inaddr<=dest_limit) { |
|||
data = fgetc(infile); |
|||
if (data == EOF) break; |
|||
buffer[inaddr++] = data; |
|||
} |
|||
} |
|||
|
|||
fclose(infile); |
|||
} |
|||
|
|||
void scan_hex_file(char *filename) |
|||
{ |
|||
byte ldata; |
|||
dword laddr; |
|||
byte rectype; |
|||
dword value; |
|||
dword index; |
|||
byte data; |
|||
byte EndOfFile = 0; |
|||
|
|||
infile = fopen(filename, "rt"); |
|||
if (!infile) { |
|||
strcpy(line,"Cannot find file: "); |
|||
error(5, strcat(line, filename)); |
|||
} |
|||
lineno = 0; |
|||
do { |
|||
lineno++; |
|||
lp = fgets(line, nelem(line)-1, infile); |
|||
if (lp == NULL) break; |
|||
if (*lp++ != ':') { |
|||
printf("Comment: %s",--lp); |
|||
continue; |
|||
} |
|||
if (verbose>=3) printf("%s", lp-1); |
|||
checksum = 0; |
|||
ldata = getbyte(); |
|||
laddr = getword(); |
|||
rectype = getbyte(); |
|||
switch (rectype) { |
|||
case 0: /* data record */ |
|||
index = 0; |
|||
while (ldata--) { |
|||
data = getbyte(); |
|||
putbyte(upper_lba + ((laddr + index)&address_mask), data); |
|||
index++; |
|||
} |
|||
break; |
|||
case 1: /* end of file record */ |
|||
EndOfFile = 1; |
|||
break; |
|||
case 2: /* segment address */ |
|||
address_mask = SEG_MASK; |
|||
value = getword(); |
|||
upper_lba = value<<4; /* start of segment */ |
|||
ldata -= 2; |
|||
break; |
|||
case 4: /* linear upper address */ |
|||
address_mask = MAX_MASK; |
|||
value = getword(); |
|||
upper_lba = value<<16; /* full 32-bit address range */ |
|||
ldata -= 2; |
|||
break; |
|||
case 3: /* start CS:IP */ |
|||
case 5: /* linear start address */ |
|||
value = getdword(); |
|||
ldata -= 4; |
|||
default: |
|||
error(0,"Unknown record type:"); |
|||
} |
|||
getbyte(); /* get final checksum */ |
|||
if (checksum) { |
|||
error(0,"Checksum failure"); |
|||
} |
|||
} while (lp && !EndOfFile); |
|||
fclose(infile); |
|||
} |
|||
|
|||
|
|||
void global_options(int argc, char *argv[]) |
|||
{ |
|||
int iarg; |
|||
char *cp; |
|||
char *tp; |
|||
char ch; |
|||
|
|||
h2b = false; |
|||
rom_size = ONE_MEG; /* bin2hex default value */ |
|||
/* decide which conversion to do */ |
|||
if (strstr(argv[0],"hex2bin") |
|||
#ifdef MSDOS |
|||
|| strstr(argv[0],"HEX2BIN") |
|||
#endif |
|||
) { |
|||
h2b = true; |
|||
rom_size = 64 * 1024ul; /* default value */ |
|||
} /* assume 'bin2hex' otherwise */ |
|||
|
|||
if (argc<2) { usage(); exit(0); } |
|||
|
|||
/* scan the global command line options */ |
|||
for (iarg = 0; iarg<argc; iarg++) { |
|||
cp = argv[iarg]; |
|||
if (*cp == '-' |
|||
#ifdef MSDOS |
|||
|| *cp == '/' |
|||
#endif |
|||
) { |
|||
ch = cp[1]; |
|||
tp = cp + 2; |
|||
switch (ch) { |
|||
case 'h': |
|||
usage(); |
|||
exit(0); |
|||
case 'o': /* outfile name specification */ |
|||
if (!*tp) tp = argv[++iarg]; |
|||
outfilename = strdup(tp); |
|||
*cp = *tp = 0; |
|||
break; |
|||
case 'p': /* specify the pad byte */ |
|||
if (!*tp) tp = argv[++iarg]; |
|||
pad = (byte)convert_constant(tp); |
|||
*cp = *tp = 0; |
|||
break; |
|||
case 'R': /* ROM file size specification */ |
|||
if (!*tp) tp = argv[++iarg]; |
|||
rom_size = convert_constant(tp); |
|||
if (rom_size > MAX_MASK+1) error(5, "ROM size too big"); |
|||
if (rom_size < 256) error(5, "ROM size too small"); |
|||
*cp = *tp = 0; |
|||
break; |
|||
case 'v': /* print verbose statistics */ |
|||
verbose++; |
|||
if (!*tp) tp = argv[++iarg]; |
|||
if (*tp>='1' && *tp<='5' && tp[1]==0) verbose += (*tp - '1'); |
|||
else tp = cp; |
|||
*cp = *tp = 0; |
|||
break; |
|||
case 'Y': { |
|||
int i; |
|||
for (i=0; i<argc; i++) |
|||
printf(" %s", argv[i]); |
|||
printf("\n"); |
|||
exit(0); |
|||
} |
|||
default: |
|||
break; |
|||
} |
|||
} // if '-'
|
|||
} // for (iarg ...
|
|||
} |
|||
|
|||
|
|||
void process_cmd_input(int argc, char *argv[]) |
|||
{ |
|||
int iarg; |
|||
char *cp; |
|||
char *tp; |
|||
|
|||
source_address = dest_address = 0; |
|||
source_limit = dest_limit = MAX_MASK; |
|||
|
|||
for (iarg=1; iarg<argc; iarg++) { |
|||
cp = argv[iarg]; |
|||
if (*cp == '-' |
|||
#ifdef MSDOS |
|||
|| *cp == '/' |
|||
#endif |
|||
) { |
|||
++cp; |
|||
tp = cp + 1; |
|||
switch (*cp) { |
|||
case 's': /* source */ |
|||
if (!*tp) tp = argv[++iarg]; |
|||
source_address = convert_constant(tp); |
|||
break; |
|||
case 'S': /* source limit */ |
|||
if (!*tp) tp = argv[++iarg]; |
|||
source_limit = convert_constant(tp); |
|||
break; |
|||
case 'd': /* destination */ |
|||
if (!*tp) tp = argv[++iarg]; |
|||
dest_address = convert_constant(tp); |
|||
break; |
|||
case 'D': /* destination limit */ |
|||
if (!*tp) tp = argv[++iarg]; |
|||
dest_limit = convert_constant(tp) - 1; |
|||
break; |
|||
} // switch
|
|||
} // if (*cp == '-' ...
|
|||
else if (*cp) { /* this must be a filename */ |
|||
if (h2b) scan_hex_file(cp); |
|||
else scan_bin_file(cp); |
|||
|
|||
/* reset the local relocation options */ |
|||
source_address = 0; |
|||
dest_address = 0; |
|||
source_limit = MAX_MASK; |
|||
dest_limit = MAX_MASK; |
|||
} |
|||
} // for (iarg
|
|||
} |
|||
|
|||
|
|||
|
|||
int main(int argc, char *argv[]) |
|||
{ |
|||
dword index; |
|||
byte *ptr; |
|||
|
|||
verbose = 0; |
|||
global_options(argc, argv); |
|||
|
|||
buffer = malloc(rom_size); |
|||
if (!buffer) error(5,"Cannot allocate ROM buffer"); |
|||
for (ptr=buffer, index=rom_size; index; index--) *ptr++ = pad; |
|||
|
|||
process_cmd_input(argc, argv); |
|||
|
|||
if (!outfilename) { |
|||
if (h2b) { |
|||
outfilename = "out.bin"; |
|||
} |
|||
else { |
|||
outfilename = "out.hex"; |
|||
} |
|||
error(1,"No output file specified"); |
|||
printf("Using file named '%s' for output\n", outfilename); |
|||
} |
|||
outfile = fopen(outfilename, h2b ? "wb" : "wt"); |
|||
if (!outfile) error(5,"Cannot create output file"); |
|||
|
|||
if (h2b) while (rom_size--) fputc(*buffer++, outfile); |
|||
else write_hex_file(outfile); |
|||
|
|||
fclose(outfile); |
|||
|
|||
return EXIT_SUCCESS; |
|||
} |
|||
|
|||
@ -1,16 +0,0 @@ |
|||
#include <stdio.h> |
|||
#include <stdlib.h> |
|||
#include <string.h> |
|||
|
|||
int main(int argc,char **argv) |
|||
{ |
|||
char szTemp[128]; |
|||
int index; |
|||
|
|||
strcpy(szTemp,argv[1]); |
|||
for(index=0;index<strlen(szTemp);index++) { |
|||
printf("%c",szTemp[index]); |
|||
} |
|||
return EXIT_SUCCESS; |
|||
} |
|||
|
|||
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