Browse Source

Revised disk API

pull/3/head
Wayne Warthen 10 years ago
parent
commit
6354bd300d
  1. 8
      Source/CBIOS/cbios.asm
  2. 1
      Source/HBIOS/Config/mk4_cvdu.asm
  3. 1
      Source/HBIOS/Config/mk4_diskio3.asm
  4. 1
      Source/HBIOS/Config/mk4_dsd.asm
  5. 1
      Source/HBIOS/Config/mk4_propio.asm
  6. 1
      Source/HBIOS/Config/mk4_std.asm
  7. 1
      Source/HBIOS/Config/n8_2312.asm
  8. 1
      Source/HBIOS/Config/n8_2511.asm
  9. 1
      Source/HBIOS/Config/sbc_ci.asm
  10. 1
      Source/HBIOS/Config/sbc_cvdu.asm
  11. 1
      Source/HBIOS/Config/sbc_dide.asm
  12. 1
      Source/HBIOS/Config/sbc_diskio.asm
  13. 1
      Source/HBIOS/Config/sbc_diskio3+cvdu.asm
  14. 1
      Source/HBIOS/Config/sbc_diskio3.asm
  15. 1
      Source/HBIOS/Config/sbc_dsd.asm
  16. 9
      Source/HBIOS/Config/sbc_mfpic.asm
  17. 1
      Source/HBIOS/Config/sbc_ppide.asm
  18. 1
      Source/HBIOS/Config/sbc_ppisd.asm
  19. 1
      Source/HBIOS/Config/sbc_propio.asm
  20. 1
      Source/HBIOS/Config/sbc_rf.asm
  21. 1
      Source/HBIOS/Config/sbc_simh.asm
  22. 1
      Source/HBIOS/Config/sbc_std.asm
  23. 1
      Source/HBIOS/Config/sbc_vdu.asm
  24. 1
      Source/HBIOS/Config/zeta2_ppide.asm
  25. 1
      Source/HBIOS/Config/zeta2_ppisd.asm
  26. 1
      Source/HBIOS/Config/zeta2_ppp.asm
  27. 1
      Source/HBIOS/Config/zeta2_std.asm
  28. 1
      Source/HBIOS/Config/zeta_ppide.asm
  29. 1
      Source/HBIOS/Config/zeta_ppisd.asm
  30. 1
      Source/HBIOS/Config/zeta_ppp.asm
  31. 1
      Source/HBIOS/Config/zeta_std.asm
  32. 143
      Source/HBIOS/dsrtc.asm
  33. 46
      Source/HBIOS/fd.asm
  34. 12
      Source/HBIOS/hbios.asm
  35. 9
      Source/HBIOS/hbios.inc
  36. 45
      Source/HBIOS/hdsk.asm
  37. 69
      Source/HBIOS/ide.asm
  38. 8
      Source/HBIOS/loader.asm
  39. 32
      Source/HBIOS/md.asm
  40. 155
      Source/HBIOS/ppide.asm
  41. 30
      Source/HBIOS/ppp.asm
  42. 16
      Source/HBIOS/prp.asm
  43. 46
      Source/HBIOS/rf.asm
  44. 6
      Source/HBIOS/romldr.asm
  45. 129
      Source/HBIOS/sd.asm
  46. 6
      Source/HBIOS/std.asm
  47. 0
      Source/RomDsk/sbc_mfpic/1200.COM
  48. 0
      Source/RomDsk/sbc_mfpic/38400.COM
  49. 0
      Source/RomDsk/sbc_mfpic/9600.COM
  50. BIN
      Source/RomDsk/sbc_mfpic/PPIDETST.COM
  51. 0
      Source/RomDsk/sbc_mfpic/RTC.COM
  52. 0
      Source/RomDsk/sbc_mfpic/T5.COM
  53. 0
      Source/RomDsk/sbc_mfpic/VT3.COM
  54. 0
      Source/RomDsk/sbc_mfpic/XM.COM
  55. 0
      Source/RomDsk/sbc_mfpic/XM5.COM

8
Source/CBIOS/cbios.asm

@ -1972,7 +1972,7 @@ DEV_INIT:
; ;
DEV_INIT1: DEV_INIT1:
; PATCH IN COM0: DEVICE ENTRIES ; PATCH IN COM0: DEVICE ENTRIES
LD A,(HCB + HCB_CDL + 1) ; COM0:
LD A,(HCB + HCB_CDL + 0) ; COM0:
CP $FF ; $FF MEANS NO ENTRY CP $FF ; $FF MEANS NO ENTRY
JR Z,DEV_INIT2 ; IF SO, LEAVE IT ALONE JR Z,DEV_INIT2 ; IF SO, LEAVE IT ALONE
LD (DEVMAP + 0),A ; CONSOLE TTY LD (DEVMAP + 0),A ; CONSOLE TTY
@ -1982,7 +1982,7 @@ DEV_INIT1:
; ;
DEV_INIT2: DEV_INIT2:
; PATCH IN COM1: DEVICE ENTRIES ; PATCH IN COM1: DEVICE ENTRIES
LD A,(HCB + HCB_CDL + 2) ; COM1:
LD A,(HCB + HCB_CDL + 1) ; COM1:
CP $FF ; $FF MEANS NO ENTRY CP $FF ; $FF MEANS NO ENTRY
JR Z,DEV_INIT3 ; IF SO, LEAVE IT ALONE JR Z,DEV_INIT3 ; IF SO, LEAVE IT ALONE
LD (DEVMAP + 3),A ; CONSOLE UC1 LD (DEVMAP + 3),A ; CONSOLE UC1
@ -1991,7 +1991,7 @@ DEV_INIT2:
; ;
DEV_INIT3: DEV_INIT3:
; PATCH IN COM2: DEVICE ENTRIES ; PATCH IN COM2: DEVICE ENTRIES
LD A,(HCB + HCB_CDL + 3) ; COM2:
LD A,(HCB + HCB_CDL + 2) ; COM2:
CP $FF ; $FF MEANS NO ENTRY CP $FF ; $FF MEANS NO ENTRY
JR Z,DEV_INIT4 ; IF SO, LEAVE IT ALONE JR Z,DEV_INIT4 ; IF SO, LEAVE IT ALONE
LD (DEVMAP + 6),A ; READER UR1 LD (DEVMAP + 6),A ; READER UR1
@ -1999,7 +1999,7 @@ DEV_INIT3:
; ;
DEV_INIT4: DEV_INIT4:
; PATCH IN COM3: DEVICE ENTRIES ; PATCH IN COM3: DEVICE ENTRIES
LD A,(HCB + HCB_CDL + 4) ; COM3:
LD A,(HCB + HCB_CDL + 3) ; COM3:
CP $FF ; $FF MEANS NO ENTRY CP $FF ; $FF MEANS NO ENTRY
JR Z,DEV_INIT5 ; IF SO, LEAVE IT ALONE JR Z,DEV_INIT5 ; IF SO, LEAVE IT ALONE
LD (DEVMAP + 7),A ; READER UR2 LD (DEVMAP + 7),A ; READER UR2

1
Source/HBIOS/Config/mk4_cvdu.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER) UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS UARTCNT .EQU 0 ; NUMBER OF UARTS

1
Source/HBIOS/Config/mk4_diskio3.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER) UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS UARTCNT .EQU 0 ; NUMBER OF UARTS

1
Source/HBIOS/Config/mk4_dsd.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER) UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS UARTCNT .EQU 0 ; NUMBER OF UARTS

1
Source/HBIOS/Config/mk4_propio.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER) UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS UARTCNT .EQU 0 ; NUMBER OF UARTS

1
Source/HBIOS/Config/mk4_std.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER) UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS UARTCNT .EQU 0 ; NUMBER OF UARTS

1
Source/HBIOS/Config/n8_2312.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER) UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS UARTCNT .EQU 0 ; NUMBER OF UARTS

1
Source/HBIOS/Config/n8_2511.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER) UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER)
UARTCNT .EQU 0 ; NUMBER OF UARTS UARTCNT .EQU 0 ; NUMBER OF UARTS

1
Source/HBIOS/Config/sbc_ci.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 2 ; NUMBER OF UARTS UARTCNT .EQU 2 ; NUMBER OF UARTS

1
Source/HBIOS/Config/sbc_cvdu.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/sbc_dide.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/sbc_diskio.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/sbc_diskio3+cvdu.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/sbc_diskio3.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/sbc_dsd.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

9
Source/HBIOS/Config/sbc_mfp.asm → Source/HBIOS/Config/sbc_mfpic.asm

@ -1,6 +1,6 @@
; ;
;================================================================================================== ;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8VEM SBC W/ MULTIFUNCTION PIC
; ROMWBW 2.X CONFIGURATION FOR N8VEM SBC W/ MF/PIC
;================================================================================================== ;==================================================================================================
; ;
; BUILD CONFIGURATION OPTIONS ; BUILD CONFIGURATION OPTIONS
@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_MFPIC ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 2 ; NUMBER OF UARTS UARTCNT .EQU 2 ; NUMBER OF UARTS
@ -27,7 +28,7 @@ UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY
UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE
UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!)
UART1IOB .EQU $88 ; UART1 IOBASE AT $88 FOR MFPIC
UART1IOB .EQU $48 ; UART1 IOBASE AT $48 FOR MFPIC
UART1OSC .EQU 1843200 ; UART1 OSC FREQUENCY UART1OSC .EQU 1843200 ; UART1 OSC FREQUENCY
UART1BAUD .EQU CONBAUD ; UART1 BAUDRATE UART1BAUD .EQU CONBAUD ; UART1 BAUDRATE
UART1FIFO .EQU TRUE ; UART1 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART1FIFO .EQU TRUE ; UART1 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY)
@ -63,7 +64,7 @@ IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!
IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
; ;
PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
PPIDEIOB .EQU $84 ; PPIDE IOBASE IS $84 FOR MFPIC (PRELIMINARY ADDRESS)
PPIDEIOB .EQU $44 ; PPIDE IOBASE
PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
@ -71,7 +72,7 @@ PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE) PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE)
; ;
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT
SDMODE .EQU SDMODE_JUHA ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDMODE .EQU SDMODE_NONE ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE)
SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB)
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER

1
Source/HBIOS/Config/sbc_ppide.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/sbc_ppisd.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/sbc_propio.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/sbc_rf.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/sbc_simh.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU TRUE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU TRUE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU FALSE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU FALSE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/sbc_std.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/sbc_vdu.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/zeta2_ppide.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/zeta2_ppisd.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/zeta2_ppp.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/zeta2_std.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/zeta_ppide.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/zeta_ppisd.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/zeta_ppp.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

1
Source/HBIOS/Config/zeta_std.asm

@ -19,6 +19,7 @@ DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE)
; ;
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER
DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC
; ;
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTCNT .EQU 1 ; NUMBER OF UARTS UARTCNT .EQU 1 ; NUMBER OF UARTS

143
Source/HBIOS/dsrtc.asm

@ -63,6 +63,8 @@
; ;
; CONSTANTS ; CONSTANTS
; ;
#IF (DSRTCMODE == DSRTCMODE_STD)
;
DSRTC_BASE .EQU RTC ; RTC PORT ON ALL SBC SERIES Z80 PLATFORMS DSRTC_BASE .EQU RTC ; RTC PORT ON ALL SBC SERIES Z80 PLATFORMS
; ;
DSRTC_DATA .EQU %10000000 ; BIT 7 CONTROLS RTC DATA (I/O) LINE DSRTC_DATA .EQU %10000000 ; BIT 7 CONTROLS RTC DATA (I/O) LINE
@ -70,17 +72,41 @@ DSRTC_CLK .EQU %01000000 ; BIT 6 CONTROLS RTC CLOCK LINE, 1 = HIGH
DSRTC_RD .EQU %00100000 ; BIT 5 CONTROLS DATA DIRECTION, 1 = READ DSRTC_RD .EQU %00100000 ; BIT 5 CONTROLS DATA DIRECTION, 1 = READ
DSRTC_CE .EQU %00010000 ; BIT 4 CONTROLS RTC CE LINE, 1 = HIGH (ENABLED) DSRTC_CE .EQU %00010000 ; BIT 4 CONTROLS RTC CE LINE, 1 = HIGH (ENABLED)
; ;
DSRTC_RESET .EQU %00000000 ; ALL LOW
;
#ENDIF
;
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
;
DSRTC_BASE .EQU $43 ; RTC PORT ON MF/PIC
;
DSRTC_DATA .EQU %00000001 ; BIT 0 CONTROLS RTC DATA (I/O) LINE
DSRTC_CLK .EQU %00000100 ; BIT 2 CONTROLS RTC CLOCK LINE, 1 = HIGH
DSRTC_WR .EQU %00000010 ; BIT 1 CONTROLS DATA DIRECTION, 1 = WRITE
DSRTC_CE .EQU %00001000 ; BIT 3 CONTROLS RTC CE LINE, 0 = ENABLED
;
DSRTC_RESET .EQU %00001000 ; ALL LOW, BUT CE = 1
;
#ENDIF
;
DSRTC_BUFSIZ .EQU 7 ; 7 BYTE BUFFER (YYMMDDHHMMSSWW) DSRTC_BUFSIZ .EQU 7 ; 7 BYTE BUFFER (YYMMDDHHMMSSWW)
; ;
; RTC DEVICE INITIALIZATION ENTRY ; RTC DEVICE INITIALIZATION ENTRY
; ;
DSRTC_INIT: DSRTC_INIT:
PRTS("DSRTC: $")
PRTS("DSRTC: MODE=$")
;
#IF (DSRTCMODE == DSRTCMODE_STD)
PRTS("STD$")
#ENDIF
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
PRTS("MFPIC$")
#ENDIF
; ;
; CHECK FOR CLOCK HALTED ; CHECK FOR CLOCK HALTED
CALL DSRTC_TSTCLK CALL DSRTC_TSTCLK
JR Z,DSRTC_INIT1 JR Z,DSRTC_INIT1
PRTS("INIT CLOCK $")
PRTS(" INIT CLOCK $")
LD HL,DSRTC_TIMDEF LD HL,DSRTC_TIMDEF
CALL DSRTC_TIM2CLK CALL DSRTC_TIM2CLK
LD HL,DSRTC_BUF LD HL,DSRTC_BUF
@ -88,6 +114,7 @@ DSRTC_INIT:
; ;
DSRTC_INIT1: DSRTC_INIT1:
; DISPLAY CURRENT TIME ; DISPLAY CURRENT TIME
CALL PC_SPACE
LD HL,DSRTC_BUF LD HL,DSRTC_BUF
CALL DSRTC_RDCLK CALL DSRTC_RDCLK
LD HL,DSRTC_TIMBUF LD HL,DSRTC_TIMBUF
@ -291,6 +318,8 @@ DSRTC_WRCLK1:
CALL DSRTC_PUT ; WRITE REQUIRED 8TH BYTE CALL DSRTC_PUT ; WRITE REQUIRED 8TH BYTE
JP DSRTC_END ; FINISH IT JP DSRTC_END ; FINISH IT
; ;
#IF (DSRTCMODE == DSRTCMODE_STD)
;
; SEND COMMAND IN C TO RTC ; SEND COMMAND IN C TO RTC
; ALL RTC SEQUENCES MUST CALL THIS FIRST TO SEND THE RTC COMMAND. ; ALL RTC SEQUENCES MUST CALL THIS FIRST TO SEND THE RTC COMMAND.
; THE COMMAND IS SENT VIA A PUT. CE AND CLK ARE LEFT HIGH! THIS ; THE COMMAND IS SENT VIA A PUT. CE AND CLK ARE LEFT HIGH! THIS
@ -394,6 +423,116 @@ DSRTC_END:
POP AF ; RESTORE AF POP AF ; RESTORE AF
RET RET
; ;
#ENDIF
;
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
;
;
; SEND COMMAND IN C TO RTC
; ALL RTC SEQUENCES MUST CALL THIS FIRST TO SEND THE RTC COMMAND.
; THE COMMAND IS SENT VIA A PUT. CE AND CLK ARE LEFT ACTIVE! THIS
; IS INTENTIONAL BECAUSE WHEN THE CLOCK IS LOWERED, THE FIRST BIT
; WILL BE PRESENTED TO READ (IN THE CASE OF A READ CMD).
;
; 0) ASSUME ALL LINES UNDEFINED AT ENTRY
; 1) DEASSERT ALL LINES (CE, RD, CLOCK, & DATA)
; 2) WAIT 1US
; 3) SET CE HI
; 4) WAIT 1US
; 5) PUT COMMAND
;
DSRTC_CMD:
;XOR A ; ALL LINES LOW TO RESET
LD A,DSRTC_RESET ; QUIESCENT STATE
OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
CALL DLY2 ; DELAY 2 * 27 T-STATES
XOR DSRTC_CE ; NOW ASSERT CE
OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
CALL DLY2 ; DELAY 2 * 27 T-STATES
LD A,C ; LOAD COMMAND
CALL DSRTC_PUT ; WRITE IT
RET
;
; WRITE BYTE IN A TO THE RTC
; WRITE BYTE IN A TO THE RTC. CE IS IMPLICITY ASSERTED AT
; THE START. CE AND CLK ARE LEFT ASSERTED AT THE END IN CASE
; NEXT ACTION IS A READ.
;
; 0) ASSUME ENTRY WITH CE ASSERTED, OTHERS UNDEFINED
; 1) CLOCK -> LOW
; 2) WAIT 250NS
; 3) SET DATA ACCORDING TO BIT VALUE
; 4) CLOCK -> HIGH
; 5) WAIT 250NS (CLOCK READS DATA BIT FROM BUS)
; 6) LOOP FOR 8 DATA BITS
; 7) EXIT WITH CE AND CLOCK ASSERTED
;
DSRTC_PUT:
LD B,8 ; LOOP FOR 8 BITS
LD C,A ; SAVE THE WORKING VALUE
LD A,DSRTC_WR | DSRTC_CLK ; MODE=WRITE, CLOCK ON, CE ACTIVE (0)
DSRTC_PUT1:
XOR DSRTC_CLK ; FLIP CLOCK OFF
OUT (DSRTC_BASE),A ; DO IT
CALL DLY1 ; DELAY 27 T-STATES
RRA ; PREP ACCUM TO GET DATA BIT IN CARRY
RR C ; ROTATE NEXT BIT TO SEND INTO CARRY
RLA ; ROTATE BITS BACK TO CORRECT POSTIIONS
OUT (DSRTC_BASE),A ; ASSERT DATA BIT ON BUS
XOR DSRTC_CLK ; FLIP CLOCK ON
OUT (DSRTC_BASE),A ; DO IT, DATA BIT SENT ON RISING EDGE
CALL DLY1 ; DELAY 27 T-STATES
DJNZ DSRTC_PUT1 ; LOOP IF NOT DONE
RET
;
; READ BYTE FROM RTC, RETURN VALUE IN A
; READ THE NEXT BYTE FROM THE RTC INTO A. CE IS IMPLICITLY
; ASSERTED AT THE START. CE AND CLK ARE LEFT HIGH AT
; THE END. CLOCK *MUST* BE LEFT HIGH FROM DSRTC_CMD!
;
; 0) ASSUME ENTRY WITH CE HI, OTHERS UNDEFINED
; 1) SET RD HI AND CLOCK LOW
; 3) WAIT 250NS (CLOCK PUTS DATA BIT ON BUS)
; 4) READ DATA BIT
; 5) SET CLOCK HI
; 6) WAIT 250NS
; 7) LOOP FOR 8 DATA BITS
; 8) EXIT WITH CE,CLK,RD HI
;
DSRTC_GET:
LD C,0 ; INITIALIZE WORKING VALUE TO 0
LD B,8 ; LOOP FOR 8 BITS
LD A,DSRTC_CLK ; MODE=READ, CLOCK ON, CE ACTIVE (0)
DSRTC_GET1:
XOR DSRTC_CLK ; FLIP CLOCK OFF
OUT (DSRTC_BASE),A ; DO IT
CALL DLY2 ; DELAY 2 * 27 T-STATES
IN A,(DSRTC_BASE) ; READ THE RTC PORT
RRA ; DATA BIT TO CARRY
RR C ; SHIFT INTO WORKING VALUE
LD A,DSRTC_CLK ; CLOCK ON
OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
CALL DLY1 ; DELAY 27 T-STATES
DJNZ DSRTC_GET1 ; LOOP IF NOT DONE
LD A,C ; GET RESULT INTO A
RET
;
; COMPLETE A COMMAND SEQUENCE
; FINISHES UP A COMMAND SEQUENCE.
; DOES NOT DESTROY ANY REGISTERS.
;
; 1) BACK TO QUIESCENT STATE
;
DSRTC_END:
PUSH AF ; SAVE AF
;XOR A ; ALL LINES OFF TO CLEAN UP
LD A,DSRTC_RESET ; QUIESCENT STATE
OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
POP AF ; RESTORE AF
RET
;
#ENDIF
;
; WORKING VARIABLES ; WORKING VARIABLES
; ;
; DSRTC_BUF IS USED FOR BURST READ/WRITE OF CLOCK DATA TO DS-1302 ; DSRTC_BUF IS USED FOR BURST READ/WRITE OF CLOCK DATA TO DS-1302

46
Source/HBIOS/fd.asm

@ -390,41 +390,25 @@ FD_DISPATCH:
DEC A DEC A
JP Z,FD_FORMAT ; SUB-FUNC 6: FORMAT TRACK JP Z,FD_FORMAT ; SUB-FUNC 6: FORMAT TRACK
DEC A DEC A
JP Z,FD_SENSE ; SUB-FUNC 7: SENSE MEDIA
JP Z,FD_MEDIA ; SUB-FUNC 7: MEDIA REPORT
DEC A DEC A
JP Z,FD_CAP ; SUB-FUNC 8: GET DISK CAPACITY
JP Z,FD_DEFMED ; SUB-FUNC 8: DEFINE MEDIA
DEC A DEC A
JP Z,FD_GEOM ; SUB-FUNC 9: GET DISK GEOMETRY
JP Z,FD_CAP ; SUB-FUNC 9: REPORT CAPACITY
DEC A DEC A
JP Z,FD_GETPAR ; SUB-FUNC 10: GET DISK PARAMETERS
DEC A
JP Z,FD_SETPAR ; SUB-FUNC 11: SET DISK PARAMETERS
JP Z,FD_GEOM ; SUB-FUNC 10: REPORT GEOMETRY
; ;
FD_VERIFY: FD_VERIFY:
FD_FORMAT: FD_FORMAT:
FD_GETPAR:
FD_SETPAR:
FD_DEFMED:
CALL PANIC ; INVALID SUB-FUNCTION CALL PANIC ; INVALID SUB-FUNCTION
;;
; LD A,B ; GET REQUESTED FUNCTION
; AND $0F
; JP Z,FD_READ
; DEC A
; JP Z,FD_WRITE
; DEC A
; JP Z,FD_STATUS
; DEC A
; JP Z,FD_MEDIA
; DEC A
; JP Z,FD_CAP
; DEC A
; JP Z,FD_GEOM
; CALL PANIC
;
; FD_SENSE
;
FD_SENSE:
;CALL FD_SELECTUNIT
;
; FD_MEDIA
;
FD_MEDIA:
LD A,E ; GET FLAGS
OR A ; SET FLAGS
JR Z,FD_MEDIA4 ; JUST REPORT CURRENT STATUS AND MEDIA
#IF (FDMAUTO) #IF (FDMAUTO)
; SETUP TO READ TRK 0, HD 0, SEC 0 ; SETUP TO READ TRK 0, HD 0, SEC 0
@ -460,7 +444,9 @@ FD_MEDIARETRY:
DJNZ FD_MEDIARETRY DJNZ FD_MEDIARETRY
; NO JOY, RETURN WITH A=0 (NO MEDIA)
; NO JOY, RETURN WITH E=0 (NO MEDIA)
LD HL,(FDDS_MEDIAADR)
LD (HL),0 ; SET TO NO MEDIA
LD E,0 LD E,0
OR $FF ; SIGNAL ERROR OR $FF ; SIGNAL ERROR
RET RET
@ -482,6 +468,8 @@ FD_MEDIA3:
#ENDIF #ENDIF
#ENDIF #ENDIF
FD_MEDIA4:
#IF (FDTRACE >= 3) #IF (FDTRACE >= 3)
LD DE,FDSTR_SELECT LD DE,FDSTR_SELECT
CALL WRITESTR CALL WRITESTR

12
Source/HBIOS/hbios.asm

@ -892,11 +892,13 @@ DIO_STAT:
; DISK: SHIM FOR OLD STYLE MEDIA CALL ; DISK: SHIM FOR OLD STYLE MEDIA CALL
; ;
DIO_MEDIA: DIO_MEDIA:
LD B,BF_NDIOSENSE
CALL NDIO_DISPATCH
LD A,E
OR A
RET
;
LD B,BF_NDIOMEDIA ; FORWARD TO MEDIA REPORT
LD E,%00000011 ; ENABLE MEDIA CHECK AND MEDIA DISCOVERY
CALL NDIO_DISPATCH ; CALL NEW VERSION
LD A,E ; MOVE RESULTANT MEDIA ID TO A
OR A ; SET FLAGS
RET ; DONE
; ;
; DISK: GET BUFFER ADDRESS ; DISK: GET BUFFER ADDRESS
; ;

9
Source/HBIOS/hbios.inc

@ -30,11 +30,10 @@ BF_NDIOREAD .EQU BF_DIO + 3 ; DISK READ SECTORS
BF_NDIOWRITE .EQU BF_DIO + 4 ; DISK WRITE SECTORS BF_NDIOWRITE .EQU BF_DIO + 4 ; DISK WRITE SECTORS
BF_NDIOVERIFY .EQU BF_DIO + 5 ; DISK VERIFY SECTORS BF_NDIOVERIFY .EQU BF_DIO + 5 ; DISK VERIFY SECTORS
BF_NDIOFORMAT .EQU BF_DIO + 6 ; DISK FORMAT TRACK BF_NDIOFORMAT .EQU BF_DIO + 6 ; DISK FORMAT TRACK
BF_NDIOSENSE .EQU BF_DIO + 7 ; DISK SENSE MEDIA
BF_NDIOCAP .EQU BF_DIO + 8 ; GET DISK CAPACITY
BF_NDIOGEOM .EQU BF_DIO + 9 ; GET DISK GEOMETRY
BF_NDIOGETPAR .EQU BF_DIO + 10 ; GET DISK PARAMS
BF_NDIOSETPAR .EQU BF_DIO + 11 ; SET DISK PARAMS
BF_NDIOMEDIA .EQU BF_DIO + 7 ; DISK MEDIA REPORT
BF_NDIODEFMED .EQU BF_DIO + 8 ; DEFINE DISK MEDIA
BF_NDIOCAP .EQU BF_DIO + 9 ; DISK CAPACITY REPORT
BF_NDIOGEOM .EQU BF_DIO + 10 ; DISK GEOMETRY REPORT
; ;
BF_RTC .EQU $20 BF_RTC .EQU $20
BF_RTCGETTIM .EQU BF_RTC + 0 ; GET TIME BF_RTCGETTIM .EQU BF_RTC + 0 ; GET TIME

45
Source/HBIOS/hdsk.asm

@ -58,20 +58,17 @@ HDSK_DISPATCH:
DEC A DEC A
JP Z,HDSK_FORMAT ; SUB-FUNC 6: FORMAT TRACK JP Z,HDSK_FORMAT ; SUB-FUNC 6: FORMAT TRACK
DEC A DEC A
JP Z,HDSK_SENSE ; SUB-FUNC 7: SENSE MEDIA
JP Z,HDSK_MEDIA ; SUB-FUNC 7: MEDIA REPORT
DEC A DEC A
JP Z,HDSK_CAP ; SUB-FUNC 8: GET DISK CAPACITY
JP Z,HDSK_DEFMED ; SUB-FUNC 9: DEFINE MEDIA
DEC A DEC A
JP Z,HDSK_GEOM ; SUB-FUNC 9: GET DISK GEOMETRY
JP Z,HDSK_CAP ; SUB-FUNC 10: REPORT CAPACITY
DEC A DEC A
JP Z,HDSK_GETPAR ; SUB-FUNC 10: GET DISK PARAMETERS
DEC A
JP Z,HDSK_SETPAR ; SUB-FUNC 11: SET DISK PARAMETERS
JP Z,HDSK_GEOM ; SUB-FUNC 11: REPORT GEOMETRY
; ;
HDSK_VERIFY: HDSK_VERIFY:
HDSK_FORMAT: HDSK_FORMAT:
HDSK_GETPAR:
HDSK_SETPAR:
HDSK_DEFMED:
CALL PANIC ; INVALID SUB-FUNCTION CALL PANIC ; INVALID SUB-FUNCTION
; ;
; ;
@ -87,14 +84,6 @@ HDSK_RESET:
XOR A ; ALWAYS OK XOR A ; ALWAYS OK
RET RET
; ;
;
;
HDSK_SENSE:
LD A,MID_HD ; HARD DISK MEDIA
LD E,A ; VALUE TO E
XOR A ; SIGNAL SUCCESS
RET
;
; GET DISK CAPACITY ; GET DISK CAPACITY
; RETURN DE:HL=BLOCK COUNT, BC=BLOCK SIZE ; RETURN DE:HL=BLOCK COUNT, BC=BLOCK SIZE
; SLICE C/H/S = 65/16/16 OR 16,640 TOTAL SECTORS ; SLICE C/H/S = 65/16/16 OR 16,640 TOTAL SECTORS
@ -122,14 +111,22 @@ HDSK_GEOM:
; ;
; ;
; ;
HDSK_MEDIA:
LD E,MID_HD ; HARD DISK MEDIA
LD D,0 ; D:0=0 MEANS NO MEDIA CHANGE
XOR A ; SIGNAL SUCCESS
RET
;
;
;
HDSK_SEEK: HDSK_SEEK:
BIT 7,D ; CHECK FOR LBA FLAG
CALL Z,HB_CHS2LBA ; CLEAR MEANS CHS, CONVERT TO LBA
RES 7,D ; CLEAR FLAG REGARDLESS (DOES NO HARM IF ALREADY LBA)
LD BC,HSTLBA ; POINT TO LBA STORAGE
CALL ST32 ; SAVE LBA ADDRESS
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
BIT 7,D ; CHECK FOR LBA FLAG
CALL Z,HB_CHS2LBA ; CLEAR MEANS CHS, CONVERT TO LBA
RES 7,D ; CLEAR FLAG REGARDLESS (DOES NO HARM IF ALREADY LBA)
LD BC,HSTLBA ; POINT TO LBA STORAGE
CALL ST32 ; SAVE LBA ADDRESS
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
; ;
; ;
; ;
@ -141,7 +138,7 @@ HDSK_READ:
; ;
; ;
HDSK_WRITE: HDSK_WRITE:
LD (HDSK_DSKBUF),HL ; SAVE DISK BUFFER ADDRESS
LD (HDSK_DSKBUF),HL ; SAVE DISK BUFFER ADDRESS
LD A,HDSK_CMDWRITE LD A,HDSK_CMDWRITE
JR HDSK_RW JR HDSK_RW
; ;

69
Source/HBIOS/ide.asm

@ -332,20 +332,17 @@ IDE_DISPATCH:
DEC A DEC A
JP Z,IDE_FORMAT ; SUB-FUNC 6: FORMAT TRACK JP Z,IDE_FORMAT ; SUB-FUNC 6: FORMAT TRACK
DEC A DEC A
JP Z,IDE_SENSE ; SUB-FUNC 7: SENSE MEDIA
JP Z,IDE_MEDIA ; SUB-FUNC 7: MEDIA REPORT
DEC A DEC A
JP Z,IDE_CAP ; SUB-FUNC 8: GET DISK CAPACITY
JP Z,IDE_DEFMED ; SUB-FUNC 8: DEFINE MEDIA
DEC A DEC A
JP Z,IDE_GEOM ; SUB-FUNC 9: GET DISK GEOMETRY
JP Z,IDE_CAP ; SUB-FUNC 9: REPORT CAPACITY
DEC A DEC A
JP Z,IDE_GETPAR ; SUB-FUNC 10: GET DISK PARAMETERS
DEC A
JP Z,IDE_SETPAR ; SUB-FUNC 11: SET DISK PARAMETERS
JP Z,IDE_GEOM ; SUB-FUNC 10: REPORT GEOMETRY
; ;
IDE_VERIFY: IDE_VERIFY:
IDE_FORMAT: IDE_FORMAT:
IDE_GETPAR:
IDE_SETPAR:
IDE_DEFMED:
CALL PANIC ; INVALID SUB-FUNCTION CALL PANIC ; INVALID SUB-FUNCTION
; ;
; ;
@ -379,36 +376,50 @@ IDE_STATUS:
OR A ; SET FLAGS OR A ; SET FLAGS
RET ; AND RETURN RET ; AND RETURN
; ;
; IDE_SENSE
; IDE_GETMED
; ;
IDE_SENSE:
; THE ONLY WAY TO RESET AN IDE DEVICE IS TO RESET
; THE ENTIRE INTERFACE. SO, TO HANDLE POSSIBLE HOT
; SWAP WE DO THAT, THEN RESELECT THE DESIRED UNIT AND
; CONTINUE.
CALL IDE_RESET ; RESET ALL DEVICES ON BUS
IDE_MEDIA:
LD A,E ; GET FLAGS
OR A ; SET FLAGS
JR Z,IDE_MEDIA2 ; JUST REPORT CURRENT STATUS AND MEDIA
; ;
; GET CURRENT STATUS
IDE_DPTR(IDE_STAT) ; POINT TO UNIT STATUS IDE_DPTR(IDE_STAT) ; POINT TO UNIT STATUS
LD A,(HL) ; GET STATUS LD A,(HL) ; GET STATUS
OR A ; SET FLAGS OR A ; SET FLAGS
#IF (IDETRACE == 1)
CALL IDE_PRTERR ; PRINT ANY ERRORS
#ENDIF
JR NZ,IDE_MEDIA1 ; ERROR ACTIVE, TO RIGHT TO RESET
;
; USE IDENTIFY COMMAND TO CHECK DEVICE
LD HL,IDE_TIMEOUT ; POINT TO TIMEOUT
LD (HL),IDE_TOFAST ; USE FAST TIMEOUT DURING IDENTIFY COMMAND
CALL IDE_IDENTIFY ; EXECUTE IDENTIFY COMMAND
LD HL,IDE_TIMEOUT ; POINT TO TIMEOUT
LD (HL),IDE_TONORM ; BACK TO NORMAL TIMEOUT
JR Z,IDE_MEDIA2 ; IF SUCCESS, BYPASS RESET
;
IDE_MEDIA1:
CALL IDE_RESET ; RESET IDE INTERFACE
;
IDE_MEDIA2:
IDE_DPTR(IDE_STAT) ; POINT TO UNIT STATUS
LD A,(HL) ; GET STATUS
OR A ; SET FLAGS
LD D,0 ; NO MEDIA CHANGE DETECTED
LD E,MID_HD ; ASSUME WE ARE OK LD E,MID_HD ; ASSUME WE ARE OK
RET Z ; RETURN IF GOOD INIT RET Z ; RETURN IF GOOD INIT
LD E,MID_NONE ; SIGNAL NO MEDA
LD E,MID_NONE ; SIGNAL NO MEDIA
RET ; AND RETURN RET ; AND RETURN
; ;
; ;
; ;
IDE_SEEK: IDE_SEEK:
BIT 7,D ; CHECK FOR LBA FLAG
CALL Z,HB_CHS2LBA ; CLEAR MEANS CHS, CONVERT TO LBA
RES 7,D ; CLEAR FLAG REGARDLESS (DOES NO HARM IF ALREADY LBA)
LD BC,HSTLBA ; POINT TO LBA STORAGE
CALL ST32 ; SAVE LBA ADDRESS
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
BIT 7,D ; CHECK FOR LBA FLAG
CALL Z,HB_CHS2LBA ; CLEAR MEANS CHS, CONVERT TO LBA
RES 7,D ; CLEAR FLAG REGARDLESS (DOES NO HARM IF ALREADY LBA)
LD BC,HSTLBA ; POINT TO LBA STORAGE
CALL ST32 ; SAVE LBA ADDRESS
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
; ;
; ;
; ;
@ -738,11 +749,9 @@ IDE_INITUNIT:
LD HL,IDE_TIMEOUT ; POINT TO TIMEOUT LD HL,IDE_TIMEOUT ; POINT TO TIMEOUT
LD (HL),IDE_TOFAST ; USE FAST TIMEOUT DURING INIT LD (HL),IDE_TOFAST ; USE FAST TIMEOUT DURING INIT
CALL IDE_PROBE ; DO PROBE CALL IDE_PROBE ; DO PROBE
RET NZ ; ABORT IF ERROR
CALL IDE_INITDEV ; ATTEMPT TO INIT DEVICE
CALL Z,IDE_INITDEV ; IF FOUND, ATTEMPT TO INIT DEVICE
LD HL,IDE_TIMEOUT ; POINT TO TIMEOUT LD HL,IDE_TIMEOUT ; POINT TO TIMEOUT
LD (HL),IDE_TONORM ; BACK TO NORMAL TIMEOUT LD (HL),IDE_TONORM ; BACK TO NORMAL TIMEOUT

8
Source/HBIOS/loader.asm

@ -87,7 +87,7 @@ CB_CDL: ; START OF LIST
#ENDIF #ENDIF
; ;
CB_CDLEND: CB_CDLEND:
.FILL (CB_CDL + 7 - $),0 ; PAD REMAINDER OF CDL
.FILL (CB_CDL + 7 - $),$FF ; PAD REMAINDER OF CDL
; ;
; PRINT DEVICE LIST AT $E8 (3 ENTRY MAX) ; PRINT DEVICE LIST AT $E8 (3 ENTRY MAX)
; ;
@ -96,7 +96,7 @@ CB_CDLEND:
CB_PDL: ; START OF LIST CB_PDL: ; START OF LIST
; ;
CB_PDLEND: CB_PDLEND:
.FILL (CB_PDL + 3 - $),0 ; PAD REMAINDER OF PDL
.FILL (CB_PDL + 3 - $),$FF ; PAD REMAINDER OF PDL
; ;
; VIDEO DISPLAY DEVICE LIST AT $EC (3 ENTRY MAX) ; VIDEO DISPLAY DEVICE LIST AT $EC (3 ENTRY MAX)
; ;
@ -105,7 +105,7 @@ CB_PDLEND:
CB_VDL: ; START OF LIST CB_VDL: ; START OF LIST
; ;
CB_VDLEND: CB_VDLEND:
.FILL (CB_VDL + 3 - $),0 ; PAD REMAINDER OF VDL
.FILL (CB_VDL + 3 - $),$FF ; PAD REMAINDER OF VDL
; ;
; DISK DEVICE LIST AT $F0 (7 ENTRY MAX) ; DISK DEVICE LIST AT $F0 (7 ENTRY MAX)
; ;
@ -187,7 +187,7 @@ CB_DDL: ; START OF LIST
#ENDIF #ENDIF
; ;
CB_DDLEND: CB_DDLEND:
.FILL (CB_DDL + 15 - $),0 ; PAD REMAINDER OF DDL
.FILL (CB_DDL + 15 - $),$FF ; PAD REMAINDER OF DDL
; ;
.FILL (CB + HCB_SIZ - $),0 ; PAD REMAINDER OF HCB .FILL (CB + HCB_SIZ - $),0 ; PAD REMAINDER OF HCB
; ;

32
Source/HBIOS/md.asm

@ -46,20 +46,17 @@ MD_DISPATCH:
DEC A DEC A
JP Z,MD_FORMAT ; SUB-FUNC 6: FORMAT TRACK JP Z,MD_FORMAT ; SUB-FUNC 6: FORMAT TRACK
DEC A DEC A
JP Z,MD_SENSE ; SUB-FUNC 7: SENSE MEDIA
JP Z,MD_MEDIA ; SUB-FUNC 7: MEDIA REPORT
DEC A DEC A
JP Z,MD_CAP ; SUB-FUNC 8: GET DISK CAPACITY
JP Z,MD_DEFMED ; SUB-FUNC 8: DEFINE MEDIA
DEC A DEC A
JP Z,MD_GEOM ; SUB-FUNC 9: GET DISK GEOMETRY
JP Z,MD_CAP ; SUB-FUNC 9: REPORT CAPACITY
DEC A DEC A
JP Z,MD_GETPAR ; SUB-FUNC 10: GET DISK PARAMETERS
DEC A
JP Z,MD_SETPAR ; SUB-FUNC 11: SET DISK PARAMETERS
JP Z,MD_GEOM ; SUB-FUNC 10: REPORT GEOMETRY
; ;
MD_VERIFY: MD_VERIFY:
MD_FORMAT: MD_FORMAT:
MD_GETPAR:
MD_SETPAR:
MD_DEFMED:
CALL PANIC ; INVALID SUB-FUNCTION CALL PANIC ; INVALID SUB-FUNCTION
; ;
; ;
@ -76,15 +73,6 @@ MD_RESET:
; ;
; ;
; ;
MD_SENSE:
LD A,C ; DEVICE/UNIT IS IN C
ADD A,MID_MDROM ; SET CORRECT MEDIA VALUE
LD E,A ; VALUE TO E
XOR A ; SIGNAL SUCCESS
RET
;
;
;
MD_CAP: MD_CAP:
LD A,C ; DEVICE/UNIT IS IN C LD A,C ; DEVICE/UNIT IS IN C
AND $0F ; ISOLATE UNIT NUM AND $0F ; ISOLATE UNIT NUM
@ -124,6 +112,16 @@ MD_GEOM1:
; ;
; ;
; ;
MD_MEDIA:
LD A,MID_MDROM ; SET MEDIA TYPE TO ROM
ADD A,C ; ADJUST BASED ON DEVICE
LD E,A ; RESULTANT MEDIA IT TO E
LD D,0 ; D:0=0 MEANS NO MEDIA CHANGE
XOR A ; SIGNAL SUCCESS
RET
;
;
;
MD_SEEK: MD_SEEK:
BIT 7,D ; CHECK FOR LBA FLAG BIT 7,D ; CHECK FOR LBA FLAG
CALL Z,HB_CHS2LBA ; CLEAR MEANS CHS, CONVERT TO LBA CALL Z,HB_CHS2LBA ; CLEAR MEANS CHS, CONVERT TO LBA

155
Source/HBIOS/ppide.asm

@ -219,18 +219,20 @@ PPIDE_TOFAST .EQU 10 ; FAST TIMEOUT IS 0.5 SECS
;============================================================================= ;=============================================================================
; ;
PPIDE_INIT: PPIDE_INIT:
PRTS("PPIDE: IO=0x$") ; LABEL FOR IO ADDRESS
PRTS("PPIDE:$") ; LABEL FOR IO ADDRESS
; ;
; COMPUTE CPU SPEED COMPENSATED TIMEOUT SCALER ; COMPUTE CPU SPEED COMPENSATED TIMEOUT SCALER
; AT 1MHZ, THE SCALER IS 961 (50000US / 52TS = 961)
; SCALER IS THEREFORE 961 * CPU SPEED IN MHZ
LD DE,961 ; LOAD SCALER FOR 1MHZ
; AT 1MHZ, THE SCALER IS 218 (50000US / 229TS = 218)
; SCALER IS THEREFORE 218 * CPU SPEED IN MHZ
LD DE,218 ; LOAD SCALER FOR 1MHZ
LD A,(HCB + HCB_CPUMHZ) ; LOAD CPU SPEED IN MHZ LD A,(HCB + HCB_CPUMHZ) ; LOAD CPU SPEED IN MHZ
CALL MULT8X16 ; HL := DE * A CALL MULT8X16 ; HL := DE * A
LD (PPIDE_TOSCALER),HL ; SAVE IT LD (PPIDE_TOSCALER),HL ; SAVE IT
; ;
PRTS(" IO=0x$") ; LABEL FOR IO ADDRESS
LD A,PPIDEIOB LD A,PPIDEIOB
CALL PRTHEXBYTE CALL PRTHEXBYTE
;
#IF (PPIDE8BIT) #IF (PPIDE8BIT)
PRTS(" 8BIT$") PRTS(" 8BIT$")
#ENDIF #ENDIF
@ -325,20 +327,17 @@ PPIDE_DISPATCH:
DEC A DEC A
JP Z,PPIDE_FORMAT ; SUB-FUNC 6: FORMAT TRACK JP Z,PPIDE_FORMAT ; SUB-FUNC 6: FORMAT TRACK
DEC A DEC A
JP Z,PPIDE_SENSE ; SUB-FUNC 7: SENSE MEDIA
DEC A
JP Z,PPIDE_CAP ; SUB-FUNC 8: GET DISK CAPACITY
JP Z,PPIDE_MEDIA ; SUB-FUNC 7: MEDIA REPORT
DEC A DEC A
JP Z,PPIDE_GEOM ; SUB-FUNC 9: GET DISK GEOMETRY
JP Z,PPIDE_DEFMED ; SUB-FUNC 8: DEFINE MEDIA
DEC A DEC A
JP Z,PPIDE_GETPAR ; SUB-FUNC 10: GET DISK PARAMETERS
JP Z,PPIDE_CAP ; SUB-FUNC 9: REPORT CAPACITY
DEC A DEC A
JP Z,PPIDE_SETPAR ; SUB-FUNC 11: SET DISK PARAMETERS
JP Z,PPIDE_GEOM ; SUB-FUNC 10: REPORT GEOMETRY
; ;
PPIDE_VERIFY: PPIDE_VERIFY:
PPIDE_FORMAT: PPIDE_FORMAT:
PPIDE_GETPAR:
PPIDE_SETPAR:
PPIDE_DEFMED:
CALL PANIC ; INVALID SUB-FUNCTION CALL PANIC ; INVALID SUB-FUNCTION
; ;
; ;
@ -392,6 +391,40 @@ PPIDE_SENSE:
LD E,MID_NONE ; SIGNAL NO MEDA LD E,MID_NONE ; SIGNAL NO MEDA
RET ; AND RETURN RET ; AND RETURN
; ;
; IDE_GETMED
;
PPIDE_MEDIA:
LD A,E ; GET FLAGS
OR A ; SET FLAGS
JR Z,PPIDE_MEDIA2 ; JUST REPORT CURRENT STATUS AND MEDIA
;
; GET CURRENT STATUS
PPIDE_DPTR(PPIDE_STAT) ; POINT TO UNIT STATUS
LD A,(HL) ; GET STATUS
OR A ; SET FLAGS
JR NZ,PPIDE_MEDIA1 ; ERROR ACTIVE, TO RIGHT TO RESET
;
; USE IDENTIFY COMMAND TO CHECK DEVICE
LD HL,PPIDE_TIMEOUT ; POINT TO TIMEOUT
LD (HL),PPIDE_TOFAST ; USE FAST TIMEOUT DURING IDENTIFY COMMAND
CALL PPIDE_IDENTIFY ; EXECUTE IDENTIFY COMMAND
LD HL,PPIDE_TIMEOUT ; POINT TO TIMEOUT
LD (HL),PPIDE_TONORM ; BACK TO NORMAL TIMEOUT
JR Z,PPIDE_MEDIA2 ; IF SUCCESS, BYPASS RESET
;
PPIDE_MEDIA1:
CALL PPIDE_RESET ; RESET IDE INTERFACE
;
PPIDE_MEDIA2:
PPIDE_DPTR(PPIDE_STAT) ; POINT TO UNIT STATUS
LD A,(HL) ; GET STATUS
OR A ; SET FLAGS
LD D,0 ; NO MEDIA CHANGE DETECTED
LD E,MID_HD ; ASSUME WE ARE OK
RET Z ; RETURN IF GOOD INIT
LD E,MID_NONE ; SIGNAL NO MEDIA
RET ; AND RETURN
;
; ;
; ;
PPIDE_SEEK: PPIDE_SEEK:
@ -787,18 +820,16 @@ PPIDE_INITUNIT:
CALL PPIDE_SELUNIT ; SELECT UNIT CALL PPIDE_SELUNIT ; SELECT UNIT
RET NZ ; ABORT IF ERROR RET NZ ; ABORT IF ERROR
LD HL,PPIDE_TIMEOUT ; POINT TO TIMEOUT LD HL,PPIDE_TIMEOUT ; POINT TO TIMEOUT
LD (HL),PPIDE_TOFAST ; USE FAST TIMEOUT DURING INIT LD (HL),PPIDE_TOFAST ; USE FAST TIMEOUT DURING INIT
CALL PPIDE_PROBE ; DO PROBE CALL PPIDE_PROBE ; DO PROBE
RET NZ ; ABORT IF ERROR
CALL PPIDE_INITDEV ; INIT DEVICE AND RETURN
;
CALL Z,PPIDE_INITDEV ; IF FOUND, ATTEMPT TO INIT DEVICE
LD HL,PPIDE_TIMEOUT ; POINT TO TIMEOUT LD HL,PPIDE_TIMEOUT ; POINT TO TIMEOUT
LD (HL),PPIDE_TONORM ; BACK TO NORMAL TIMEOUT LD (HL),PPIDE_TONORM ; BACK TO NORMAL TIMEOUT
;
RET RET
; ;
; TAKE ANY ACTIONS REQUIRED TO SELECT DESIRED PHYSICAL UNIT ; TAKE ANY ACTIONS REQUIRED TO SELECT DESIRED PHYSICAL UNIT
@ -962,24 +993,24 @@ PPIDE_CHKDEVICE:
; ;
; ;
PPIDE_WAITRDY: PPIDE_WAITRDY:
LD A,(PPIDE_TIMEOUT) ; GET TIMEOUT IN 0.05 SECS
LD A,(PPIDE_TIMEOUT) ; GET TIMEOUT IN 0.05 SECS
LD B,A ; PUT IN OUTER LOOP VAR LD B,A ; PUT IN OUTER LOOP VAR
PPIDE_WAITRDY1: PPIDE_WAITRDY1:
LD DE,(PPIDE_TOSCALER) ; CPU SPPED SCALER TO INNER LOOP VAR LD DE,(PPIDE_TOSCALER) ; CPU SPPED SCALER TO INNER LOOP VAR
PPIDE_WAITRDY2: PPIDE_WAITRDY2:
;IN A,(PPIDE_REG_STAT) ; READ STATUS ;IN A,(PPIDE_REG_STAT) ; READ STATUS
CALL PPIDE_IN
.DB PPIDE_REG_STAT
LD C,A ; SAVE IT
AND %11000000 ; ISOLATE BUSY AND RDY BITS
CALL PPIDE_IN
.DB PPIDE_REG_STAT
LD C,A ; SAVE IT
AND %11000000 ; ISOLATE BUSY AND RDY BITS
XOR %01000000 ; WE WANT BUSY(7) TO BE 0 AND RDY(6) TO BE 1 XOR %01000000 ; WE WANT BUSY(7) TO BE 0 AND RDY(6) TO BE 1
RET Z ; ALL SET, RETURN WITH Z SET
DEC DE
LD A,D
OR E
JR NZ,PPIDE_WAITRDY2 ; INNER LOOP RETURN
DJNZ PPIDE_WAITRDY1 ; OUTER LOOP RETURN
JP PPIDE_RDYTO ; EXIT WITH RDYTO ERR
RET Z ; ALL SET, RETURN WITH Z SET
DEC DE
LD A,D
OR E
JR NZ,PPIDE_WAITRDY2 ; INNER LOOP RETURN
DJNZ PPIDE_WAITRDY1 ; OUTER LOOP RETURN
JP PPIDE_RDYTO ; EXIT WITH RDYTO ERR
; ;
; ;
; ;
@ -1012,39 +1043,39 @@ PPIDE_WAITBSY1:
LD DE,(PPIDE_TOSCALER) ; CPU SPPED SCALER TO INNER LOOP VAR LD DE,(PPIDE_TOSCALER) ; CPU SPPED SCALER TO INNER LOOP VAR
PPIDE_WAITBSY2: PPIDE_WAITBSY2:
;IN A,(PPIDE_REG_STAT) ; READ STATUS ;IN A,(PPIDE_REG_STAT) ; READ STATUS
CALL PPIDE_IN
.DB PPIDE_REG_STAT
LD C,A ; SAVE IT
AND %10000000 ; TO FILL (OR READY TO FILL)
RET Z
DEC DE
LD A,D
OR E
JR NZ,PPIDE_WAITBSY2
DJNZ PPIDE_WAITBSY1
JP PPIDE_BSYTO ; EXIT WITH BSYTO ERR
;
CALL PPIDE_IN ; 17TS + 170TS
.DB PPIDE_REG_STAT ; 0TS
LD C,A ; SAVE IT ; 4TS
AND %10000000 ; TO FILL (OR READY TO FILL) ; 7TS
RET Z ; 5TS
DEC DE ; 6TS
LD A,D ; 4TS
OR E ; 4TS
JR NZ,PPIDE_WAITBSY2 ; 12TS
DJNZ PPIDE_WAITBSY1 ; -----
JP PPIDE_BSYTO ; EXIT WITH BSYTO ERR ; 229TS
;
; ;
; ;
PPIDE_IN: PPIDE_IN:
LD A,PPIDE_DIR_READ ; SET DATA BUS DIRECTION TO READ
OUT (PPIDE_IO_PPI),A ; DO IT
EX (SP),HL ; GET PARM POINTER
PUSH BC ; SAVE INCOMING BC
LD B,(HL) ; GET CTL PORT VALUE
LD C,PPIDE_IO_CTL ; SETUP PORT TO WRITE
OUT (C),B ; SET ADDRESS LINES
SET 6,B ; TURN ON WRITE BIT
OUT (C),B ; ASSERT WRITE LINE
IN A,(PPIDE_IO_DATALO) ; GET DATA VALUE FROM DEVICE
RES 6,B ; CLEAR WRITE BIT
OUT (C),B ; DEASSERT WRITE LINE
POP BC ; RECOVER INCOMING BC
INC HL ; POINT PAST PARM
EX (SP),HL ; RESTORE STACK
RET
;
;
LD A,PPIDE_DIR_READ ; SET DATA BUS DIRECTION TO READ ; 7TS
OUT (PPIDE_IO_PPI),A ; DO IT ; 11TS
EX (SP),HL ; GET PARM POINTER ; 19TS
PUSH BC ; SAVE INCOMING BC ; 11TS
LD B,(HL) ; GET CTL PORT VALUE ; 7TS
LD C,PPIDE_IO_CTL ; SETUP PORT TO WRITE ; 7TS
OUT (C),B ; SET ADDRESS LINES ; 12TS
SET 6,B ; TURN ON WRITE BIT ; 8TS
OUT (C),B ; ASSERT WRITE LINE ; 12TS
IN A,(PPIDE_IO_DATALO) ; GET DATA VALUE FROM DEVICE ; 11TS
RES 6,B ; CLEAR WRITE BIT ; 8TS
OUT (C),B ; DEASSERT WRITE LINE ; 12TS
POP BC ; RECOVER INCOMING BC ; 10TS
INC HL ; POINT PAST PARM ; 6TS
EX (SP),HL ; RESTORE STACK ; 19TS
RET ; 10TS
; ; -----
; ; 170TS
; ;
PPIDE_OUT: PPIDE_OUT:
PUSH AF ; PRESERVE INCOMING VALUE PUSH AF ; PRESERVE INCOMING VALUE
@ -1250,7 +1281,7 @@ PPIDE_STR_NO .TEXT "NO$"
;============================================================================= ;=============================================================================
; ;
PPIDE_TIMEOUT .DB PPIDE_TONORM ; WAIT FUNCS TIMEOUT IN TENTHS OF SEC PPIDE_TIMEOUT .DB PPIDE_TONORM ; WAIT FUNCS TIMEOUT IN TENTHS OF SEC
PPIDE_TOSCALER .DW CPUMHZ * 961 ; WAIT FUNCS SCALER FOR CPU SPEED
PPIDE_TOSCALER .DW CPUMHZ * 218 ; WAIT FUNCS SCALER FOR CPU SPEED
; ;
PPIDE_CMD .DB 0 ; PENDING COMMAND TO PROCESS PPIDE_CMD .DB 0 ; PENDING COMMAND TO PROCESS
PPIDE_DRVHD .DB 0 ; CURRENT DRIVE/HEAD MASK PPIDE_DRVHD .DB 0 ; CURRENT DRIVE/HEAD MASK

30
Source/HBIOS/ppp.asm

@ -379,34 +379,30 @@ PPPSD_DISPATCH:
; DISPATCH ACCORDING TO DISK SUB-FUNCTION ; DISPATCH ACCORDING TO DISK SUB-FUNCTION
LD A,B ; GET REQUESTED FUNCTION LD A,B ; GET REQUESTED FUNCTION
AND $0F ; ISOLATE SUB-FUNCTION AND $0F ; ISOLATE SUB-FUNCTION
JP Z,PPPSD_STATUS ; SUB-FUNC 0: STATUS
JP Z,MD_STATUS ; SUB-FUNC 0: STATUS
DEC A DEC A
JP Z,PPPSD_RESET ; SUB-FUNC 1: RESET
JP Z,MD_RESET ; SUB-FUNC 1: RESET
DEC A DEC A
JP Z,PPPSD_SEEK ; SUB-FUNC 2: SEEK
JP Z,MD_SEEK ; SUB-FUNC 2: SEEK
DEC A DEC A
JP Z,PPPSD_READ ; SUB-FUNC 3: READ SECTORS
JP Z,MD_READ ; SUB-FUNC 3: READ SECTORS
DEC A DEC A
JP Z,PPPSD_WRITE ; SUB-FUNC 4: WRITE SECTORS
JP Z,MD_WRITE ; SUB-FUNC 4: WRITE SECTORS
DEC A DEC A
JP Z,PPPSD_VERIFY ; SUB-FUNC 5: VERIFY SECTORS
JP Z,MD_VERIFY ; SUB-FUNC 5: VERIFY SECTORS
DEC A DEC A
JP Z,PPPSD_FORMAT ; SUB-FUNC 6: FORMAT TRACK
JP Z,MD_FORMAT ; SUB-FUNC 6: FORMAT TRACK
DEC A DEC A
JP Z,PPPSD_SENSE ; SUB-FUNC 7: SENSE MEDIA
JP Z,MD_MEDIA ; SUB-FUNC 7: MEDIA REPORT
DEC A DEC A
JP Z,PPPSD_CAP ; SUB-FUNC 8: GET DISK CAPACITY
JP Z,MD_DEFMED ; SUB-FUNC 8: DEFINE MEDIA
DEC A DEC A
JP Z,PPPSD_GEOM ; SUB-FUNC 9: GET DISK GEOMETRY
JP Z,MD_CAP ; SUB-FUNC 9: REPORT CAPACITY
DEC A DEC A
JP Z,PPPSD_GETPAR ; SUB-FUNC 10: GET DISK PARAMETERS
DEC A
JP Z,PPPSD_SETPAR ; SUB-FUNC 11: SET DISK PARAMETERS
;
JP Z,MD_GEOM ; SUB-FUNC 10: REPORT GEOMETRY
PPPSD_VERIFY: PPPSD_VERIFY:
PPPSD_FORMAT: PPPSD_FORMAT:
PPPSD_GETPAR:
PPPSD_SETPAR:
PPPSD_DEFMED:
CALL PANIC ; INVALID SUB-FUNCTION CALL PANIC ; INVALID SUB-FUNCTION
; ;
; READ AN LBA BLOCK FROM THE SD CARD ; READ AN LBA BLOCK FROM THE SD CARD
@ -546,7 +542,7 @@ PPPSD_RESET:
; SETUP FOR SUBSEQUENT ACCESS ; SETUP FOR SUBSEQUENT ACCESS
; INIT CARD IF NOT READY OR ON DRIVE LOG IN ; INIT CARD IF NOT READY OR ON DRIVE LOG IN
; ;
PPPSD_SENSE:
PPPSD_MEDIA:
; REINITIALIZE THE CARD HERE TO DETERMINE PRESENCE ; REINITIALIZE THE CARD HERE TO DETERMINE PRESENCE
CALL PPPSD_INITCARD CALL PPPSD_INITCARD
#IF (PPPSDTRACE == 1) #IF (PPPSDTRACE == 1)

16
Source/HBIOS/prp.asm

@ -273,7 +273,6 @@ PRPSD_DISPATCH:
CP PRPSD_UNITCNT CP PRPSD_UNITCNT
CALL NC,PANIC ; PANIC IF TOO HIGH CALL NC,PANIC ; PANIC IF TOO HIGH
LD (PRPSD_UNIT),A ; SAVE IT LD (PRPSD_UNIT),A ; SAVE IT
;
; ;
; DISPATCH ACCORDING TO DISK SUB-FUNCTION ; DISPATCH ACCORDING TO DISK SUB-FUNCTION
LD A,B ; GET REQUESTED FUNCTION LD A,B ; GET REQUESTED FUNCTION
@ -292,20 +291,17 @@ PRPSD_DISPATCH:
DEC A DEC A
JP Z,PRPSD_FORMAT ; SUB-FUNC 6: FORMAT TRACK JP Z,PRPSD_FORMAT ; SUB-FUNC 6: FORMAT TRACK
DEC A DEC A
JP Z,PRPSD_SENSE ; SUB-FUNC 7: SENSE MEDIA
DEC A
JP Z,PRPSD_CAP ; SUB-FUNC 8: GET DISK CAPACITY
JP Z,PRPSD_MEDIA ; SUB-FUNC 7: MEDIA REPORT
DEC A DEC A
JP Z,PRPSD_GEOM ; SUB-FUNC 9: GET DISK GEOMETRY
JP Z,PRPSD_DEFMED ; SUB-FUNC 8: DEFINE MEDIA
DEC A DEC A
JP Z,PRPSD_GETPAR ; SUB-FUNC 10: GET DISK PARAMETERS
JP Z,PRPSD_CAP ; SUB-FUNC 9: REPORT CAPACITY
DEC A DEC A
JP Z,PRPSD_SETPAR ; SUB-FUNC 11: SET DISK PARAMETERS
JP Z,PRPSD_GEOM ; SUB-FUNC 10: REPORT GEOMETRY
; ;
PRPSD_VERIFY: PRPSD_VERIFY:
PRPSD_FORMAT: PRPSD_FORMAT:
PRPSD_GETPAR:
PRPSD_SETPAR:
PRPSD_DEFMED:
CALL PANIC ; INVALID SUB-FUNCTION CALL PANIC ; INVALID SUB-FUNCTION
; ;
; ;
@ -408,7 +404,7 @@ PRPSD_RESET:
; ;
; PRPSD_SENSE ; PRPSD_SENSE
; ;
PRPSD_SENSE:
PRPSD_MEDIA:
; REINITIALIZE THE CARD HERE ; REINITIALIZE THE CARD HERE
CALL PRPSD_INITCARD CALL PRPSD_INITCARD
#IF (PRPSDTRACE == 1) #IF (PRPSDTRACE == 1)

46
Source/HBIOS/rf.asm

@ -52,33 +52,21 @@ RF_DISPATCH:
DEC A DEC A
JP Z,RF_FORMAT ; SUB-FUNC 6: FORMAT TRACK JP Z,RF_FORMAT ; SUB-FUNC 6: FORMAT TRACK
DEC A DEC A
JP Z,RF_SENSE ; SUB-FUNC 7: SENSE MEDIA
JP Z,RF_MEDIA ; SUB-FUNC 7: MEDIA REPORT
DEC A DEC A
JP Z,RF_CAP ; SUB-FUNC 8: GET DISK CAPACITY
JP Z,RF_DEFMED ; SUB-FUNC 8: DEFINE MEDIA
DEC A DEC A
JP Z,RF_GEOM ; SUB-FUNC 9: GET DISK GEOMETRY
JP Z,RF_CAP ; SUB-FUNC 9: REPORT CAPACITY
DEC A DEC A
JP Z,RF_GETPAR ; SUB-FUNC 10: GET DISK PARAMETERS
DEC A
JP Z,RF_SETPAR ; SUB-FUNC 11: SET DISK PARAMETERS
JP Z,RF_GEOM ; SUB-FUNC 10: REPORT GEOMETRY
; ;
RF_VERIFY: RF_VERIFY:
RF_FORMAT: RF_FORMAT:
RF_GETPAR:
RF_SETPAR:
RF_DEFMED:
CALL PANIC ; INVALID SUB-FUNCTION CALL PANIC ; INVALID SUB-FUNCTION
; ;
; ;
; ;
RF_SENSE:
LD A,C ; DEVICE/UNIT IS IN C
ADD A,MID_RF ; SET CORRECT MEDIA VALUE
LD E,A ; VALUE TO E
XOR A ; SIGNAL SUCCESS
RET
;
;
;
RF_STATUS: RF_STATUS:
XOR A ; STATUS ALWAYS OK XOR A ; STATUS ALWAYS OK
RET RET
@ -117,14 +105,22 @@ RF_GEOM:
; ;
; ;
; ;
RF_SEEK:
BIT 7,D ; CHECK FOR LBA FLAG
CALL Z,HB_CHS2LBA ; CLEAR MEANS CHS, CONVERT TO LBA
RES 7,D ; CLEAR FLAG REGARDLESS (DOES NO HARM IF ALREADY LBA)
LD BC,HSTLBA ; POINT TO LBA STORAGE
CALL ST32 ; SAVE LBA ADDRESS
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
RF_MEDIA:
LD E,MID_RF ; RAM FLOPPY MEDIA
LD D,0 ; D:0=0 MEANS NO MEDIA CHANGE
XOR A ; SIGNAL SUCCESS
RET
;
;
;
RF_SEEK:
BIT 7,D ; CHECK FOR LBA FLAG
CALL Z,HB_CHS2LBA ; CLEAR MEANS CHS, CONVERT TO LBA
RES 7,D ; CLEAR FLAG REGARDLESS (DOES NO HARM IF ALREADY LBA)
LD BC,HSTLBA ; POINT TO LBA STORAGE
CALL ST32 ; SAVE LBA ADDRESS
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
; ;
; ;
; ;

6
Source/HBIOS/romldr.asm

@ -614,7 +614,7 @@ DB_READSEC:
#ENDIF #ENDIF
LD B,BF_DIOSETBUF ; HBIOS FUNC: SET BUF LD B,BF_DIOSETBUF ; HBIOS FUNC: SET BUF
RST 08 ; CALL HBIOS RST 08 ; CALL HBIOS
LD A,(BL_DEVICE) ; GET ACTIVE DEVICE/UNIT BYTE LD A,(BL_DEVICE) ; GET ACTIVE DEVICE/UNIT BYTE
AND $F0 ; ISOLATE DEVICE PORTION AND $F0 ; ISOLATE DEVICE PORTION
CP DIODEV_FD ; FLOPPY? CP DIODEV_FD ; FLOPPY?
@ -636,7 +636,7 @@ DB_READSEC:
DB_READSEC1: DB_READSEC1:
; ;
; LBA STYLE ACCESS ; LBA STYLE ACCESS
LD DE,(BL_CURTRK) ; GET TRACK INTO HL
LD DE,(BL_CURTRK) ; GET TRACK INTO DE
LD B,4 ; PREPARE TO LEFT SHIFT BY 4 BITS LD B,4 ; PREPARE TO LEFT SHIFT BY 4 BITS
DB_READSEC2: DB_READSEC2:
SLA E ; SHIFT DE LEFT BY 4 BITS SLA E ; SHIFT DE LEFT BY 4 BITS
@ -654,6 +654,8 @@ DB_READSEC2:
LD D,A ; PUT IT BACK IN D LD D,A ; PUT IT BACK IN D
LD A,(BL_LUTRK+1) ; MSB OF LU TRACK TO A LD A,(BL_LUTRK+1) ; MSB OF LU TRACK TO A
CALL ADDHLA ; ADD LU OFFSET CALL ADDHLA ; ADD LU OFFSET
; FINAL LBA IN HL:DE
SET 7,H ; SET HI BIT TO INDICATE LBA
LD B,BF_DIORD ; FUNCTION IN B LD B,BF_DIORD ; FUNCTION IN B
LD A,(BL_DEVICE) ; GET THE DEVICE/UNIT VALUE LD A,(BL_DEVICE) ; GET THE DEVICE/UNIT VALUE
LD C,A ; PUT IT IN C LD C,A ; PUT IT IN C

129
Source/HBIOS/sd.asm

@ -160,21 +160,21 @@ SD_TRDR .EQU Z180_TRDR
; ;
; SD CARD COMMANDS ; SD CARD COMMANDS
; ;
SD_CSD_GO_IDLE_STATE .EQU $40 + 0 ; $40, CMD0 -> R1
SD_CSD_SEND_OP_COND .EQU $40 + 1 ; $41, CMD1 -> R1
SD_CSD_SEND_IF_COND .EQU $40 + 8 ; $48, CMD8 -> R7
SD_CSD_SEND_CSD .EQU $40 + 9 ; $49, CMD9 -> R1
SD_CSD_SEND_CID .EQU $40 + 10 ; $4A, CMD10 -> R1
SD_CSD_SET_BLOCKLEN .EQU $40 + 16 ; $50, CMD16 -> R1
SD_CSD_READ_SNGL_BLK .EQU $40 + 17 ; $51, CMD17 -> R1
SD_CSD_WRITE_BLOCK .EQU $40 + 24 ; $58, CMD24 -> R1
SD_CSD_APP_CMD .EQU $40 + 55 ; $77, CMD55 -> R1
SD_CSD_READ_OCR .EQU $40 + 58 ; $7A, CMD58 -> R3
SD_CMD_GO_IDLE_STATE .EQU $40 + 0 ; $40, CMD0 -> R1
SD_CMD_SEND_OP_COND .EQU $40 + 1 ; $41, CMD1 -> R1
SD_CMD_SEND_IF_COND .EQU $40 + 8 ; $48, CMD8 -> R7
SD_CMD_SEND_CSD .EQU $40 + 9 ; $49, CMD9 -> R1
SD_CMD_SEND_CID .EQU $40 + 10 ; $4A, CMD10 -> R1
SD_CMD_SET_BLOCKLEN .EQU $40 + 16 ; $50, CMD16 -> R1
SD_CMD_READ_SNGL_BLK .EQU $40 + 17 ; $51, CMD17 -> R1
SD_CMD_WRITE_BLOCK .EQU $40 + 24 ; $58, CMD24 -> R1
SD_CMD_APP_CMD .EQU $40 + 55 ; $77, CMD55 -> R1
SD_CMD_READ_OCR .EQU $40 + 58 ; $7A, CMD58 -> R3
; ;
; SD CARD APPLICATION COMMANDS (PRECEDED BY APP_CMD COMMAND) ; SD CARD APPLICATION COMMANDS (PRECEDED BY APP_CMD COMMAND)
; ;
SD_ACSD_SEND_OP_COND .EQU $40 + 41 ; $69, ACMD41 -> R1
SD_ACSD_SEND_SCR .EQU $40 + 51 ; $73, ACMD51 -> R1
SD_ACMD_SEND_OP_COND .EQU $40 + 41 ; $69, ACMD41 -> R1
SD_ACMD_SEND_SCR .EQU $40 + 51 ; $73, ACMD51 -> R1
; ;
; SD CARD TYPE ; SD CARD TYPE
; ;
@ -353,7 +353,7 @@ SD_INITUNIT1:
CALL WRITESTR CALL WRITESTR
; GET CID (WHICH CONTAINS PRODUCT NAME) ; GET CID (WHICH CONTAINS PRODUCT NAME)
LD A,SD_CSD_SEND_CID ; SEND_CID
LD A,SD_CMD_SEND_CID ; SEND_CID
CALL SD_INITCMD ; SETUP COMMAND BUFFER CALL SD_INITCMD ; SETUP COMMAND BUFFER
CALL SD_EXECCMD ; RUN COMMAND CALL SD_EXECCMD ; RUN COMMAND
RET NZ ; ABORT ON ERROR RET NZ ; ABORT ON ERROR
@ -412,7 +412,6 @@ SD_DISPATCH:
CP SD_UNITCNT CP SD_UNITCNT
CALL NC,PANIC ; PANIC IF TOO HIGH CALL NC,PANIC ; PANIC IF TOO HIGH
LD (SD_UNIT),A ; SAVE IT LD (SD_UNIT),A ; SAVE IT
;CALL SD_SELUNIT ; SELECT DESIRED UNIT
; ;
; DISPATCH ACCORDING TO DISK SUB-FUNCTION ; DISPATCH ACCORDING TO DISK SUB-FUNCTION
LD A,B ; GET REQUESTED FUNCTION LD A,B ; GET REQUESTED FUNCTION
@ -431,20 +430,17 @@ SD_DISPATCH:
DEC A DEC A
JP Z,SD_FORMAT ; SUB-FUNC 6: FORMAT TRACK JP Z,SD_FORMAT ; SUB-FUNC 6: FORMAT TRACK
DEC A DEC A
JP Z,SD_SENSE ; SUB-FUNC 7: SENSE MEDIA
JP Z,SD_MEDIA ; SUB-FUNC 7: MEDIA REPORT
DEC A DEC A
JP Z,SD_CAP ; SUB-FUNC 8: GET DISK CAPACITY
JP Z,SD_DEFMED ; SUB-FUNC 8: DEFINE MEDIA
DEC A DEC A
JP Z,SD_GEOM ; SUB-FUNC 9: GET DISK GEOMETRY
JP Z,SD_CAP ; SUB-FUNC 9: REPORT CAPACITY
DEC A DEC A
JP Z,SD_GETPAR ; SUB-FUNC 10: GET DISK PARAMETERS
DEC A
JP Z,SD_SETPAR ; SUB-FUNC 11: SET DISK PARAMETERS
JP Z,SD_GEOM ; SUB-FUNC 10: REPORT GEOMETRY
; ;
SD_VERIFY: SD_VERIFY:
SD_FORMAT: SD_FORMAT:
SD_GETPAR:
SD_SETPAR:
SD_DEFMED:
CALL PANIC ; INVALID SUB-FUNCTION CALL PANIC ; INVALID SUB-FUNCTION
; ;
; ;
@ -457,7 +453,7 @@ SD_READ:
#ENDIF #ENDIF
CALL SD_SELUNIT CALL SD_SELUNIT
; READ A SECTOR ; READ A SECTOR
LD C,SD_CSD_READ_SNGL_BLK ; SET READ_SINGLE_BLOCK COMMAND
LD C,SD_CMD_READ_SNGL_BLK ; SET READ_SINGLE_BLOCK COMMAND
JP SD_SECTIO ; DO SECTOR I/O JP SD_SECTIO ; DO SECTOR I/O
; ;
; ;
@ -472,7 +468,7 @@ SD_WRITE:
CALL SD_CHKWP ; CHECK FOR WRITE PROTECT CALL SD_CHKWP ; CHECK FOR WRITE PROTECT
JP NZ,SD_WRTPROT ; HANDLE IT IF SO JP NZ,SD_WRTPROT ; HANDLE IT IF SO
; WRITE A SECTOR ; WRITE A SECTOR
LD C,SD_CSD_WRITE_BLOCK ; SET WRITE_BLOCK COMMAND
LD C,SD_CMD_WRITE_BLOCK ; SET WRITE_BLOCK COMMAND
JP SD_SECTIO ; DO SECTOR I/O JP SD_SECTIO ; DO SECTOR I/O
; ;
SD_STATUS: SD_STATUS:
@ -485,33 +481,62 @@ SD_STATUS:
; ;
; ;
SD_RESET: SD_RESET:
XOR A ; ALWAYS OK
RET
;
;
;
SD_SENSE:
CALL SD_SELUNIT ; SET CUR UNIT CALL SD_SELUNIT ; SET CUR UNIT
; RE-INITIALIZE THE SD CARD TO ACCOMMODATE HOT SWAPPING ; RE-INITIALIZE THE SD CARD TO ACCOMMODATE HOT SWAPPING
CALL SD_INITCARD ; RE-INIT SELECTED UNIT CALL SD_INITCARD ; RE-INIT SELECTED UNIT
#IF (SDTRACE == 1) #IF (SDTRACE == 1)
CALL SD_PRTERR ; PRINT ANY ERRORS CALL SD_PRTERR ; PRINT ANY ERRORS
#ENDIF #ENDIF
OR A ; SET RESULT FLAGS
RET
;
;
;
SD_MEDIA:
LD A,E ; GET FLAGS
OR A ; SET FLAGS
JR Z,SD_MEDIA2 ; JUST REPORT CURRENT STATUS AND MEDIA
;
IDE_DPTR(SD_STAT) ; POINT TO UNIT STATUS
LD A,(HL) ; GET STATUS
OR A ; SET FLAGS
JR NZ,SD_MEDIA1 ; ERROR ACTIVE, TO RIGHT TO RESET
;
; USE SEND_CSD TO CHECK CARD
CALL SD_SELUNIT ; SET CUR UNIT
LD A,SD_CMD_SEND_CSD ; SEND_CSD
CALL SD_EXECCMD ; EXECUTE COMMAND
JR NZ,SD_MEDIA1 ; ERROR, NEED RESET
LD BC,16 ; 16 BYTES OF CSD
LD HL,SD_BUF ; PUT IN OUR PRIVATE BUFFER
CALL SD_GETDATA ; GET THE DATA
CALL SD_DONE ; CLOSE THE TRANSACTION
JR Z,SD_MEDIA2 ; IF SUCCESS, BYPASS RESET
;
SD_MEDIA1:
CALL SD_RESET ; RESET CARD
;
SD_MEDIA2:
SD_DPTR(SD_STAT) ; HL := ADR OF STATUS, AF TRASHED
LD A,(HL) ; GET STATUS OF SELECTED UNIT
OR A ; SET FLAGS
LD D,0 ; NO MEDIA CHANGE DETECTED
LD E,MID_HD ; ASSUME WE ARE OK LD E,MID_HD ; ASSUME WE ARE OK
RET Z ; RETURN IF GOOD INIT RET Z ; RETURN IF GOOD INIT
LD E,MID_NONE ; SIGNAL NO MEDA
LD E,MID_NONE ; SIGNAL NO MEDIA
RET ; AND RETURN RET ; AND RETURN
; ;
; ;
; ;
;
SD_SEEK: SD_SEEK:
BIT 7,D ; CHECK FOR LBA FLAG
CALL Z,HB_CHS2LBA ; CLEAR MEANS CHS, CONVERT TO LBA
RES 7,D ; CLEAR FLAG REGARDLESS (DOES NO HARM IF ALREADY LBA)
LD BC,HSTLBA ; POINT TO LBA STORAGE
CALL ST32 ; SAVE LBA ADDRESS
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
BIT 7,D ; CHECK FOR LBA FLAG
CALL Z,HB_CHS2LBA ; CLEAR MEANS CHS, CONVERT TO LBA
RES 7,D ; CLEAR FLAG REGARDLESS (DOES NO HARM IF ALREADY LBA)
LD BC,HSTLBA ; POINT TO LBA STORAGE
CALL ST32 ; SAVE LBA ADDRESS
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
; ;
; ;
; ;
@ -572,7 +597,7 @@ SD_INITCARD2:
; ;
; CMD8 IS REQUIRED FOR V2 CARDS. FAILURE HERE IS OK AND ; CMD8 IS REQUIRED FOR V2 CARDS. FAILURE HERE IS OK AND
; JUST MEANS THAT IT IS A V1 CARD ; JUST MEANS THAT IT IS A V1 CARD
LD A,SD_CSD_SEND_IF_COND ; SEND_IF_COND
LD A,SD_CMD_SEND_IF_COND ; SEND_IF_COND
CALL SD_INITCMD ; SETUP COMMAND BUFFER CALL SD_INITCMD ; SETUP COMMAND BUFFER
LD HL,SD_CMDP2 ; POINT TO 3RD PARM BYTE LD HL,SD_CMDP2 ; POINT TO 3RD PARM BYTE
LD (HL),1 ; VHS=1, 2.7-3.6V LD (HL),1 ; VHS=1, 2.7-3.6V
@ -597,7 +622,7 @@ SD_INITCARD3:
OR A ; SET FLAGS OR A ; SET FLAGS
RET NZ ; ABORT IF ANY OTHER ERROR RET NZ ; ABORT IF ANY OTHER ERROR
; SEND APP_OP_COND ; SEND APP_OP_COND
LD A,SD_ACSD_SEND_OP_COND ; SD_APP_OP_COND
LD A,SD_ACMD_SEND_OP_COND ; SD_APP_OP_COND
CALL SD_INITCMD ; SETUP COMMAND BUFFER CALL SD_INITCMD ; SETUP COMMAND BUFFER
LD A,$40 ; P0 = $40 INDICATES WE SUPPORT V2 CARDS LD A,$40 ; P0 = $40 INDICATES WE SUPPORT V2 CARDS
LD (SD_CMDP0),A ; SET COMMAND PARM 0 LD (SD_CMDP0),A ; SET COMMAND PARM 0
@ -623,7 +648,7 @@ SD_INITCARD3B:
LD DE,300 ; 16US * 300 = ~5MS LD DE,300 ; 16US * 300 = ~5MS
CALL VDELAY ; CPU SPEED NORMALIZED DELAY CALL VDELAY ; CPU SPEED NORMALIZED DELAY
; SEND OP_COND COMMAND ; SEND OP_COND COMMAND
LD A,SD_CSD_SEND_OP_COND ; SD_OP_COND
LD A,SD_CMD_SEND_OP_COND ; SD_OP_COND
CALL SD_INITCMD ; SETUP COMMAND BUFFER CALL SD_INITCMD ; SETUP COMMAND BUFFER
CALL SD_EXECCMDND ; EXEC COMMAND WITH NO DATA CALL SD_EXECCMDND ; EXEC COMMAND WITH NO DATA
RET NZ ; ABORT ON ERROR RET NZ ; ABORT ON ERROR
@ -645,7 +670,7 @@ SD_INITCARD3C:
SD_INITCARD4: SD_INITCARD4:
; CMD58 RETURNS THE 32 BIT OCR REGISTER (R3), WE WANT TO CHECK ; CMD58 RETURNS THE 32 BIT OCR REGISTER (R3), WE WANT TO CHECK
; BIT 30, IF SET THIS IS SDHC/XC CARD ; BIT 30, IF SET THIS IS SDHC/XC CARD
LD A,SD_CSD_READ_OCR ; READ_OCR
LD A,SD_CMD_READ_OCR ; READ_OCR
CALL SD_INITCMD ; SETUP COMMAND BUFFER CALL SD_INITCMD ; SETUP COMMAND BUFFER
CALL SD_EXECCMD ; EXECUTE COMMAND CALL SD_EXECCMD ; EXECUTE COMMAND
RET NZ ; ABORT ON ERROR RET NZ ; ABORT ON ERROR
@ -661,7 +686,7 @@ SD_INITCARD4A:
; SD_SPEC3 (BIT 47) IS SET IF CARD IS SDXC OR GREATER ; SD_SPEC3 (BIT 47) IS SET IF CARD IS SDXC OR GREATER
CALL SD_EXECACMD ; SEND APP COMMAND INTRODUCER CALL SD_EXECACMD ; SEND APP COMMAND INTRODUCER
RET NZ ; ABORT ON ERROR (THIS SHOULD ALWAYS WORK) RET NZ ; ABORT ON ERROR (THIS SHOULD ALWAYS WORK)
LD A,SD_ACSD_SEND_SCR ; APP CMD SEND_SCR
LD A,SD_ACMD_SEND_SCR ; APP CMD SEND_SCR
CALL SD_INITCMD ; SETUP COMMAND BUFFER CALL SD_INITCMD ; SETUP COMMAND BUFFER
CALL SD_EXECCMD ; EXECUTE COMMAND CALL SD_EXECCMD ; EXECUTE COMMAND
RET NZ ; ABORT ON ERROR (THIS SHOULD ALWAYS WORK) RET NZ ; ABORT ON ERROR (THIS SHOULD ALWAYS WORK)
@ -703,7 +728,7 @@ SD_INITCARD5:
#ENDIF #ENDIF
; SET OUR DESIRED BLOCK LENGTH (512 BYTES) ; SET OUR DESIRED BLOCK LENGTH (512 BYTES)
LD A,SD_CSD_SET_BLOCKLEN ; SET_BLOCKLEN
LD A,SD_CMD_SET_BLOCKLEN ; SET_BLOCKLEN
CALL SD_INITCMD ; SETUP COMMAND BUFFER CALL SD_INITCMD ; SETUP COMMAND BUFFER
LD DE,512 ; 512 BYTE BLOCK LENGTH LD DE,512 ; 512 BYTE BLOCK LENGTH
LD HL,SD_CMDP2 ; PUT VALUE INTO PARMS LD HL,SD_CMDP2 ; PUT VALUE INTO PARMS
@ -722,7 +747,7 @@ SD_INITCARD5:
#ENDIF #ENDIF
; ;
; ISSUE SEND_CSD (TO DERIVE CARD CAPACITY) ; ISSUE SEND_CSD (TO DERIVE CARD CAPACITY)
LD A,SD_CSD_SEND_CSD ; SEND_CSD
LD A,SD_CMD_SEND_CSD ; SEND_CSD
CALL SD_INITCMD ; SETUP COMMAND BUFFER CALL SD_INITCMD ; SETUP COMMAND BUFFER
CALL SD_EXECCMD ; EXECUTE COMMAND CALL SD_EXECCMD ; EXECUTE COMMAND
RET NZ ; ABORT ON ERROR RET NZ ; ABORT ON ERROR
@ -852,9 +877,9 @@ SD_SECTIO:
LD HL,(SD_DSKBUF) LD HL,(SD_DSKBUF)
LD BC,512 ; LENGTH TO READ LD BC,512 ; LENGTH TO READ
LD A,(SD_CMD) ; GET THE COMMAND LD A,(SD_CMD) ; GET THE COMMAND
CP SD_CSD_READ_SNGL_BLK ; READ_SINGLE_BLOCK?
CP SD_CMD_READ_SNGL_BLK ; READ_SINGLE_BLOCK?
JR Z,SD_SECTIO1 ; HANDLE READ JR Z,SD_SECTIO1 ; HANDLE READ
CP SD_CSD_WRITE_BLOCK ; WRITE_BLOCK?
CP SD_CMD_WRITE_BLOCK ; WRITE_BLOCK?
JR Z,SD_SECTIO2 ; HANDLE WRITE JR Z,SD_SECTIO2 ; HANDLE WRITE
CALL PANIC ; PANIC ON ANYTHING ELSE CALL PANIC ; PANIC ON ANYTHING ELSE
SD_SECTIO1: SD_SECTIO1:
@ -941,7 +966,7 @@ SD_GOIDLE1:
;CALL VDELAY ; CPU SPEED NORMALIZED DELAY ;CALL VDELAY ; CPU SPEED NORMALIZED DELAY
; PUT CARD IN IDLE STATE ; PUT CARD IN IDLE STATE
LD A,SD_CSD_GO_IDLE_STATE ; CMD0 = ENTER IDLE STATE
LD A,SD_CMD_GO_IDLE_STATE ; CMD0 = ENTER IDLE STATE
CALL SD_INITCMD ; INIT COMMAND BUFFER CALL SD_INITCMD ; INIT COMMAND BUFFER
LD A,$95 ; CRC FOR GO_IDLE_STATE COMMAND IS $95 LD A,$95 ; CRC FOR GO_IDLE_STATE COMMAND IS $95
LD (SD_CMDCRC),A ; SET CRC LD (SD_CMDCRC),A ; SET CRC
@ -971,7 +996,7 @@ SD_INITCMD1:
; EXECUTE APP COMMAND ; EXECUTE APP COMMAND
; ;
SD_EXECACMD: SD_EXECACMD:
LD A,SD_CSD_APP_CMD ; APP_CMD, AN APP CMD IS NEXT
LD A,SD_CMD_APP_CMD ; APP_CMD, AN APP CMD IS NEXT
CALL SD_INITCMD ; SETUP COMMAND BUFFER CALL SD_INITCMD ; SETUP COMMAND BUFFER
JR SD_EXECCMDND ; EXEC COMMAND W/ NO DATA RETURNED JR SD_EXECCMDND ; EXEC COMMAND W/ NO DATA RETURNED
; ;
@ -1203,15 +1228,11 @@ SD_OPRMSK .EQU (SD_CS | SD_CLK | SD_DI)
; UNIT IS SPECIFIED IN A ; UNIT IS SPECIFIED IN A
; ;
SD_SELUNIT: SD_SELUNIT:
LD HL,SD_UNIT ; POINT TO PREVIOUSLY SELECTED UNIT
CP (HL) ; SAME?
RET Z ; IF SO, NOTHING MORE TO DO
LD A,(SD_UNIT)
; ;
CP SD_UNITCNT ; CHECK VALIDITY (EXCEED UNIT COUNT?) CP SD_UNITCNT ; CHECK VALIDITY (EXCEED UNIT COUNT?)
JP NC,SD_INVUNIT ; HANDLE INVALID UNIT JP NC,SD_INVUNIT ; HANDLE INVALID UNIT
; ;
; NEW UNIT SELECTED, IMPLEMENT IT
;LD (SD_UNIT),A ; SAVE CURRENT UNIT NUMBER
#IF (SDMODE == SDMODE_DSD) #IF (SDMODE == SDMODE_DSD)
; SELECT REQUESTED UNIT ; SELECT REQUESTED UNIT
OUT (SD_SELREG),A ; ACTUALLY SELECT THE CARD OUT (SD_SELREG),A ; ACTUALLY SELECT THE CARD

6
Source/HBIOS/std.asm

@ -63,6 +63,12 @@ MID_FD360 .EQU 7
MID_FD120 .EQU 8 MID_FD120 .EQU 8
MID_FD111 .EQU 9 MID_FD111 .EQU 9
; ;
; DS RTC MODE SELECTIONS
;
DSRTCMODE_NONE .EQU 0 ; NO DSRTC
DSRTCMODE_STD .EQU 1 ; ORIGINAL DSRTC CIRCUIT (SBC, ZETA, MK4)
DSRTCMODE_MFPIC .EQU 2 ; MF/PIC VARIANT
;
; FD MODE SELECTIONS ; FD MODE SELECTIONS
; ;
FDMODE_NONE .EQU 0 FDMODE_NONE .EQU 0

0
Source/RomDsk/sbc_mfp/1200.COM → Source/RomDsk/sbc_mfpic/1200.COM

0
Source/RomDsk/sbc_mfp/38400.COM → Source/RomDsk/sbc_mfpic/38400.COM

0
Source/RomDsk/sbc_mfp/9600.COM → Source/RomDsk/sbc_mfpic/9600.COM

BIN
Source/RomDsk/sbc_mfpic/PPIDETST.COM

Binary file not shown.

0
Source/RomDsk/sbc_mfp/RTC.COM → Source/RomDsk/sbc_mfpic/RTC.COM

0
Source/RomDsk/sbc_mfp/T5.COM → Source/RomDsk/sbc_mfpic/T5.COM

0
Source/RomDsk/sbc_mfp/VT3.COM → Source/RomDsk/sbc_mfpic/VT3.COM

0
Source/RomDsk/sbc_mfp/XM.COM → Source/RomDsk/sbc_mfpic/XM.COM

0
Source/RomDsk/sbc_mfp/XM5.COM → Source/RomDsk/sbc_mfpic/XM5.COM

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