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z80: Changes to configuration for setting memory & I/O timings

Removed ability from boot up (see ez80cpudrv.adm) to allow for setting of
external memory and io timing using eZ80's W/S config.  All timings
must now be specified in terms of eZ80's Bus Cycle setting.

This is to increase compatibility with various external RCBus/RC2014
modules.

Due to eZ80 firmware changes, the configuration was always setting
the I/O Bus Cycle to the maximum setting of 7 - typically most system
will work fine at a setting of 4 B/C

current ez80 firmware version: 0.5.0.234 2025-06-21
pull/573/head
Dean Netherton 7 months ago
parent
commit
643e59e204
  1. 3
      .gitignore
  2. 2
      Dockerfile
  3. 24
      Source/HBIOS/cfg_MASTER.asm
  4. 17
      Source/HBIOS/cfg_RCEZ80.asm
  5. 53
      Source/HBIOS/ez80cpudrv.asm

3
.gitignore

@ -169,6 +169,9 @@ Source/Fonts/font8x16u.asm
Source/Fonts/font8x8c.asm
Source/Fonts/font8x8c.bin
Source/Fonts/font8x8u.asm
Source/Fonts/font6x8c.asm
Source/Fonts/font6x8c.bin
Source/Fonts/font6x8u.asm
Source/Fonts/fontcgac.asm
Source/Fonts/fontcgac.bin
Source/Fonts/fontcgau.asm

2
Dockerfile

@ -10,7 +10,7 @@ FROM ubuntu:jammy-20240111 as basebuilder
# After you have built the above image (called romwbw-chain), you can use it to compile and build the RomWBW images
# as per the standard make scripts within RomWBW.
# Start a new terminal, cd to where you have clone RomWBW, and then run this command:
# docker run -v ${PWD}:/src/ --privileged=true -u $(id -u ${USER}):$(id -g ${USER}) -it romwbw-chain:latest
# docker run --rm -v ${PWD}:/src/ --privileged=true -u $(id -u ${USER}):$(id -g ${USER}) -it romwbw-chain:latest
# you can now compile and build the required images:

24
Source/HBIOS/cfg_MASTER.asm

@ -482,22 +482,20 @@ EZ80TIMER .EQU EZ80TMR_FIRM ; EZ80: TIMER TICK MODEL: EZ80TMR_[INT|FIRM]
EZ80IOBASE .EQU $FF ; EZ80 I/O BASE ADDRESS FOR EXTERNAL IO
;
; BUS TIMING FOR PAGED MEMORY ACCESS (CS3)
EZ80_MEM_CYCLES .EQU 3 ; MEMORY BUS CYCLES (1-15) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CYCLES
EZ80_MEM_MIN_NS .EQU 100 ; CALCULATE AT BOOT TIME THE REQUIRED W/S OR B/C, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
EZ80_MEM_WS .EQU 5 ; MEMORY WAIT STATES (0-7) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_WAIT
EZ80_MEM_MIN_WS .EQU 0 ; MINIMUM WAIT STATES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
EZ80_MEM_CYCLES .SET 3 ; MEMORY BUS CYCLES (1-15) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CYCLES
EZ80_MEM_MIN_NS .SET 100 ; CALCULATE AT BOOT TIME THE REQUIRED W/S OR B/C, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
EZ80_MEM_MIN_BC .SET 1 ; MINIMUM BUS CYCLES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
;
; BUS TIMING FOR EXTERNAL I/O ACCESS (CS2)
EZ80_IO_CYCLES .EQU 4 ; IO BUS CYCLES (1-15) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CYCLES
EZ80_IO_WS .EQU 5 ; IO WAIT STATES (0-7) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_WAIT
EZ80_IO_MIN_NS .EQU 320 ; CALCULATE AT BOOT TIME THE REQUIRED W/S OR B/C, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
EZ80_IO_MIN_WS .EQU 6 ; MINIMUM WAIT STATES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
EZ80_IO_CYCLES .SET 4 ; IO BUS CYCLES (1-15) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CYCLES
EZ80_IO_MIN_NS .SET 250 ; CALCULATE AT BOOT TIME THE REQUIRED B/C, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
EZ80_IO_MIN_BC .SET 4 ; MINIMUM BUS CYCLES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
;
; APPLY CYCLES, W/S OR CALCULATE CYCLES BASED ON DESIRED PERIOD
EZ80_WSMD_TYP .EQU EZ80WSMD_CALC ; BUS WAIT STATE CONFIG: EZ80WSMD_[CALC|CYCLES|WAIT]
; APPLY BUS CYCLES OR CALCULATE CYCLES BASED ON DESIRED PERIOD
EZ80_WSMD_TYP .SET EZ80WSMD_CALC ; BUS WAIT STATE CONFIG: EZ80WSMD_[CALC|CYCLES]
;
; BUS TIMING FOR ON CHIP ROM
;
EZ80_FLSH_WS .EQU 1 ; WAIT STATES FOR ON CHIP FLASH (0-7)
EZ80_FLSH_MIN_NS .EQU 60 ; MINIMUM WAIT STATES TO APPLY TO ON-CHIP FLASH, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
EZ80_FWSMD_TYP .EQU EZ80WSMD_CALC ; WAIT STATE TYPE: EZ80RMMD_[CALC|WAIT] (CYCLES NOT ALLOWED)
EZ80_FLSH_WS .SET 1 ; WAIT STATES FOR ON CHIP FLASH (0-7)
EZ80_FLSH_MIN_NS .SET 60 ; MINIMUM WAIT STATES TO APPLY TO ON-CHIP FLASH, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
EZ80_FWSMD_TYP .SET EZ80WSMD_CALC ; WAIT STATE TYPE: EZ80RMMD_[CALC|WAIT] (CYCLES NOT ALLOWED)

17
Source/HBIOS/cfg_RCEZ80.asm

@ -413,20 +413,15 @@ EZ80IOBASE .SET $FF ; EZ80 I/O BASE ADDRESS FOR EXTERNAL IO
; BUS TIMING FOR PAGED MEMORY ACCESS (CS3)
EZ80_MEM_CYCLES .SET 3 ; MEMORY BUS CYCLES (1-15) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CYCLES
EZ80_MEM_MIN_NS .SET 100 ; CALCULATE AT BOOT TIME THE REQUIRED W/S OR B/C, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
EZ80_MEM_WS .SET 5 ; MEMORY WAIT STATES (0-7) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_WAIT
EZ80_MEM_MIN_WS .SET 0 ; MINIMUM WAIT STATES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
EZ80_MEM_MIN_BC .SET 1 ; MINIMUM BUS CYCLES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
;
; BUS TIMING FOR EXTERNAL I/O ACCESS (CS2)
EZ80_IO_CYCLES .SET 4 ; IO BUS CYCLES (1-15) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CYCLES
EZ80_IO_WS .SET 7 ; IO WAIT STATES (0-7) TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_WAIT
EZ80_IO_MIN_NS .SET 250 ; CALCULATE AT BOOT TIME THE REQUIRED W/S OR B/C, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
; THE MINMUM W/S SHOULD BE AT LEAST 1 GREATER THAN THE HOLD TRIGGER COUNT PROGRAMMED WITHIN THE PLD OF THE
; EZ80 INTERFACE MODULE. SEE THE EZ80-CPU.PLD FILE WITHIN THE EZ80 FIRMWARE CODE BASE
EZ80_IO_MIN_WS .SET 7 ; MINIMUM WAIT STATES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
;
; APPLY CYCLES, W/S OR CALCULATE CYCLES BASED ON DESIRED PERIOD
EZ80_WSMD_TYP .SET EZ80WSMD_CALC ; BUS WAIT STATE CONFIG: EZ80WSMD_[CALC|CYCLES|WAIT]
EZ80_IO_MIN_NS .SET 250 ; CALCULATE AT BOOT TIME THE REQUIRED B/C, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
EZ80_IO_MIN_BC .SET 4 ; MINIMUM BUS CYCLES TO APPLY, IF EZ80_WSMD_TYP = EZ80WSMD_CALC
;
; APPLY BUS CYCLES OR CALCULATE CYCLES BASED ON DESIRED PERIOD
EZ80_WSMD_TYP .SET EZ80WSMD_CALC ; BUS WAIT STATE CONFIG: EZ80WSMD_[CALC|CYCLES]
;
; BUS TIMING FOR ON CHIP ROM
;

53
Source/HBIOS/ez80cpudrv.asm

@ -82,12 +82,12 @@ EZ80_PREINIT:
LD L, EZ80_MEM_CYCLES | $80
EZ80_UTIL_MEMTM_SET()
LD A, L
LD (EZ80_PLT_MEMWS), A
LD (EZ80_PLT_MEMBC), A
LD L, EZ80_IO_CYCLES | $80
EZ80_UTIL_IOTM_SET()
LD A, L
LD (EZ80_PLT_IOWS), A
LD (EZ80_PLT_IOBC), A
RET
#ENDIF
@ -96,30 +96,19 @@ EZ80_PREINIT:
LD HL, EZ80_MEM_MIN_NS
LD E, 0
EZ80_CPY_EHL_TO_UHL
LD E, EZ80_MEM_MIN_WS
LD E, EZ80_MEM_MIN_BC | $80
EZ80_UTIL_MEMTMFQ_SET
LD A, L
LD (EZ80_PLT_MEMWS), A
LD (EZ80_PLT_MEMBC), A
LD HL, EZ80_IO_MIN_NS
LD E, 0
EZ80_CPY_EHL_TO_UHL
LD E, EZ80_IO_MIN_WS
LD E, EZ80_IO_MIN_BC
EZ80_UTIL_IOTMFQ_SET
LD A, L
LD (EZ80_PLT_IOWS), A
#ENDIF
#IF (EZ80_WSMD_TYP == EZ80WSMD_WAIT)
LD L, EZ80_MEM_WS
EZ80_UTIL_MEMTM_SET()
LD A, L
LD (EZ80_PLT_MEMWS), A
LD L, EZ80_IO_WS
EZ80_UTIL_IOTM_SET()
LD A, L
LD (EZ80_PLT_IOWS), A
LD (EZ80_PLT_IOBC), A
#ENDIF
LD C, TICKFREQ
@ -131,32 +120,14 @@ EZ80_PREINIT:
; eZ80 CPU DRIVER REPORT TIMINGS
; --------------------------------
EZ80_RPT_TIMINGS:
LD A, (EZ80_PLT_MEMWS)
BIT 7, A
JR NZ, EZ80_RPT_MCYC
CALL PRTDECB
CALL PRTSTRD
.TEXT " MEM W/S, $"
JR EZ80_RPT_IOTIMING
EZ80_RPT_MCYC:
LD A, (EZ80_PLT_MEMBC)
AND $7F
CALL PRTDECB
CALL PRTSTRD
.TEXT " MEM B/C, $"
EZ80_RPT_IOTIMING:
LD A, (EZ80_PLT_IOWS)
BIT 7, A
JR NZ, EZ80_RPT_ICYC
CALL PRTDECB
CALL PRTSTRD
.TEXT " I/O W/S, $"
JR EZ80_RPT_FSH_TIMINGS
EZ80_RPT_ICYC:
LD A, (EZ80_PLT_IOBC)
AND $7F
CALL PRTDECB
CALL PRTSTRD
@ -292,10 +263,10 @@ PC_DASH:
LD A, '-'
JP PC_PRTCHR
EZ80_PLT_MEMWS:
.DB EZ80_MEM_WS
EZ80_PLT_IOWS:
.DB EZ80_IO_WS
EZ80_PLT_MEMBC:
.DB EZ80_MEM_CYCLES
EZ80_PLT_IOBC:
.DB EZ80_IO_CYCLES
EZ80_PLT_FLSHWS:
.DB EZ80_FLSH_WS

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