From f0def03d0ebd46ee5ef0bdff1c09f79f5311908c Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Sun, 24 Jul 2022 15:10:28 -0700 Subject: [PATCH 1/3] ZCPR-D&J Fixes Lars Nelson found a couple issues with ZCPR-D&J and provided an update: - Buffer overflow - Failure of default drive/user --- Doc/ChangeLog.txt | 1 + Makefile | 3 +- Source/HBIOS/Build.sh | 7 +- Source/HBIOS/Makefile | 47 +-- Source/HBIOS/cfg_una.asm | 1 + Source/HBIOS/hbios_env.asm | 47 ++- Source/ZCPR-DJ/Build.cmd | 5 +- Source/ZCPR-DJ/Clean.cmd | 1 + Source/ZCPR-DJ/zcpr.mac | 15 +- Source/ZCPR-DJ/zcprdemo.com | Bin 2176 -> 0 bytes Source/ZCPR-DJ/{zcpr.mac.bak => zcprdemo.mac} | 268 ++++++++++-------- Source/ver.inc | 2 +- Source/ver.lib | 2 +- Tools/Makefile.inc | 2 +- 14 files changed, 238 insertions(+), 163 deletions(-) delete mode 100644 Source/ZCPR-DJ/zcprdemo.com rename Source/ZCPR-DJ/{zcpr.mac.bak => zcprdemo.mac} (88%) diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt index 2afffb6e..76cd3d01 100644 --- a/Doc/ChangeLog.txt +++ b/Doc/ChangeLog.txt @@ -62,6 +62,7 @@ Version 3.1.1 - WBW: ZPMLDR and ZPM3 fixes, credit to Lars Nelson for finding ZPM3 source! - DDW: Add support for MBC sound card - WBW: Add support for "romless" booting +- L?N: Fixes for ZCPR-D&J (buffer overflow, default drive/user) Version 3.1 ----------- diff --git a/Makefile b/Makefile index 487cb9a7..0f5dc20d 100644 --- a/Makefile +++ b/Makefile @@ -6,6 +6,7 @@ clean: $(MAKE) --directory Tools clean $(MAKE) --directory Source clean $(MAKE) --directory Binary clean + rm -f make.log clobber: clean @@ -13,6 +14,6 @@ diff: $(MAKE) --directory Source diff dist: - $(MAKE) ROM_PLATFORM=dist + $(MAKE) ROM_PLATFORM=dist 2>&1 | tee make.log $(MAKE) --directory Source clean $(MAKE) --directory Tools clean diff --git a/Source/HBIOS/Build.sh b/Source/HBIOS/Build.sh index 9669d92f..64b62889 100755 --- a/Source/HBIOS/Build.sh +++ b/Source/HBIOS/Build.sh @@ -6,6 +6,7 @@ set -e export ROM_PLATFORM export ROM_CONFIG export ROMSIZE +export CPUFAM if [ "${ROM_PLATFORM}" == "dist" ] ; then echo "!!!DISTRIBUTION BUILD!!!" @@ -63,6 +64,8 @@ if [ -z "${ROMNAME}" ] ; then ROMNAME=${ROM_PLATFORM}_${ROM_CONFIG} fi +echo -e "\n\nBuilding $ROM_PLATFORM $ROM_CONFIG\n\n" + TIMESTAMP=$(date +%Y-%m-%d) if [ "$1" = "-d" ] ; then @@ -77,8 +80,6 @@ fi CONFIGFILE=Config/${ROM_PLATFORM}_${ROM_CONFIG}.asm -echo Building $ROMNAME for $ROM_PLATFORM $ROM_CONFIG $ROMSIZE - cat <<- EOF > build.inc ; RomWBW Configured for ${ROM_PLATFORM} ${ROM_CONFIG} ${TIMESTAMP} ; @@ -92,6 +93,8 @@ EOF make hbios_env.sh source hbios_env.sh +echo Creating ${ROMSIZE}K ROM named ${ROMNAME}.rom + export OBJECTS OBJECTS="${ROMNAME}.rom" if [ "${ROM_PLATFORM}" != "UNA" ] ; then diff --git a/Source/HBIOS/Makefile b/Source/HBIOS/Makefile index abf6854c..f002e93b 100644 --- a/Source/HBIOS/Makefile +++ b/Source/HBIOS/Makefile @@ -7,25 +7,30 @@ SUBDIRS = DEST = ../../Binary TOOLS =../../Tools OTHERS = *.img *.rom *.com *.upd *.bin *.z80 cpm.sys zsys.sys Build.inc font*.asm *.dat hbios_env.sh -include $(TOOLS)/Makefile.inc -FONTS := font8x11c.asm font8x11u.asm font8x16c.asm font8x16u.asm font8x8c.asm font8x8u.asm fontcgac.asm fontcgau.asm +# DIFFMAKE = 1 -ifneq ($(findstring $(ROM_PLATFORM), N8 MK4 RCZ180 SCZ180 DYNO RPH),) - TASM=$(BINDIR)/uz80as -t hd64180 +# DIFFPATH = $(DIFFTO)/Binary + +ifeq ($(DIFFMAKE),1) + DIFFBUILD := -d $(DIFFTO)/Source/HBIOS endif -ifneq ($(findstring $(ROM_PLATFORM), RCZ280),) - TASM=$(BINDIR)/uz80as -t z280 +ifeq ($(OBJECTS),) +start: + chmod +x Build.sh + bash Build.sh $(DIFFBUILD) endif -# DIFFMAKE = 1 +include $(TOOLS)/Makefile.inc -ifeq ($(DIFFMAKE),1) - DIFFBUILD := -d $(DIFFTO)/Source/HBIOS -endif +FONTS := font8x11c.asm font8x11u.asm font8x16c.asm font8x16u.asm font8x8c.asm font8x8u.asm fontcgac.asm fontcgau.asm -# DIFFPATH = $(DIFFTO)/Binary +ifeq ($(CPUFAM),2) + TASM=$(BINDIR)/uz80as -t hd64180 +else ifeq ($(CPUFAM),3) + TASM=$(BINDIR)/uz80as -t z280 +endif DEPS=prereq dbgmon.bin romldr.bin nascom.bin tastybasic.bin game.bin eastaegg.bin updater.bin usrrom.bin imgpad2.bin @@ -39,19 +44,15 @@ endif ROMNAME=${ROM_PLATFORM}_${ROM_CONFIG} -$(info DEPS=$(DEPS)) -$(info ROM_PLATFORM=$(ROM_PLATFORM)) -$(info ROM_CONFIG=$(ROM_CONFIG)) -$(info ROMSIZE=$(ROMSIZE)) -$(info ROMNAME=$(ROMNAME)) - -all:: - if [ -z "$(OBJECTS)" ] ; then \ - chmod +x Build.sh ; \ - bash Build.sh $(DIFFBUILD) ; \ - fi +# $(info DEPS=$(DEPS)) +# $(info ROM_PLATFORM=$(ROM_PLATFORM)) +# $(info ROM_CONFIG=$(ROM_CONFIG)) +# $(info ROMSIZE=$(ROMSIZE)) +# $(info ROMNAME=$(ROMNAME)) +# $(info CPUFAM=$(CPUFAM)) +# $(info TASM=$(TASM)) -$(ROMNAME).rom $(ROMNAME).com $(ROMNAME).img : $(ROMDEPS) +$(OBJECTS) : $(ROMDEPS) cat romldr.bin dbgmon.bin ../ZSDOS/zsys_$(BIOS).bin ../CPM22/cpm_$(BIOS).bin >osimg.bin cat romldr.bin dbgmon.bin ../ZSDOS/zsys_$(BIOS).bin >osimg_small.bin if [ $(ROM_PLATFORM) != UNA ] ; then \ diff --git a/Source/HBIOS/cfg_una.asm b/Source/HBIOS/cfg_una.asm index 4dd506ea..387acc1a 100644 --- a/Source/HBIOS/cfg_una.asm +++ b/Source/HBIOS/cfg_una.asm @@ -16,6 +16,7 @@ #INCLUDE "../UBIOS/ubios.inc" ; ;PLATFORM .EQU PLT_UNA ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH] +CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280] BIOS .EQU BIOS_UNA ; HARDWARE BIOS: BIOS_[WBW|UNA] ; BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE diff --git a/Source/HBIOS/hbios_env.asm b/Source/HBIOS/hbios_env.asm index 16356176..92b81ca3 100644 --- a/Source/HBIOS/hbios_env.asm +++ b/Source/HBIOS/hbios_env.asm @@ -1,31 +1,52 @@ ; ;================================================================================================== -; HBIOS ENVIRONMENT EXPORT +; HBIOS ENVIRONMENT CONFIG VALUE EXPORT TOOL ;================================================================================================== ; ; Do we need a private stack??? -; Use a macro do dump each variable? ; #include "std.asm" +; +; Macro to make it simple to print a config value +; +#define prtval(tag,val) \ +#defcont \ call PREFIX +#defcont \ call PRTSTRD +#defcont \ .text tag +#defcont \ call PRTEQ +#defcont \ ld hl,val +#defcont \ call PRTDEC +#defcont \ call EOL +; +; Program starts here ; .org $100 ; Normal CP/M start address ; - ; Dump ROMSIZE - call PRTSTRD +; Print all desired config values... +; + prtval("ROMSIZE$", ROMSIZE) + prtval("CPUFAM$", CPUFAM) +; + ret +; +; Output correct prefix for command/shell +; +PREFIX: #ifdef CMD - .text "set ROMSize=$" -#endif -#ifdef BASH - .text "ROMSIZE=$" + call PRTSTRD + .text "set $" #endif - ld hl,ROMSIZE - call PRTDEC - call EOL + ret ; - ret ; Return +; Output an equal sign +; +PRTEQ: + ld a,'=' + call COUT + ret ; ; Output end-of-line. Handles differences between -; Windows CMD file and Bash. +; DOS/Windows and Unix. ; EOL: #ifdef CMD diff --git a/Source/ZCPR-DJ/Build.cmd b/Source/ZCPR-DJ/Build.cmd index 16de441d..ae7fdaa5 100644 --- a/Source/ZCPR-DJ/Build.cmd +++ b/Source/ZCPR-DJ/Build.cmd @@ -10,4 +10,7 @@ set TASMTABS=%TOOLS%\tasm32 set CPMDIR80=%TOOLS%/cpm/ zxcc M80 -=zcpr/l || exit /b -zxcc L80 -zcpr,zcpr.bin/n/e || exit /b \ No newline at end of file +zxcc L80 -zcpr,zcpr.bin/n/e || exit /b + +zxcc M80 -=zcprdemo/l || exit /b +zxcc L80 -zcprdemo,zcprdemo/n/e || exit /b \ No newline at end of file diff --git a/Source/ZCPR-DJ/Clean.cmd b/Source/ZCPR-DJ/Clean.cmd index 9a57c248..cf21950d 100644 --- a/Source/ZCPR-DJ/Clean.cmd +++ b/Source/ZCPR-DJ/Clean.cmd @@ -5,3 +5,4 @@ if exist *.bin del *.bin if exist *.lst del *.lst if exist *.rel del *.rel if exist *.prn del *.prn +if exist *.com del *.com diff --git a/Source/ZCPR-DJ/zcpr.mac b/Source/ZCPR-DJ/zcpr.mac index 04b54040..19f66588 100644 --- a/Source/ZCPR-DJ/zcpr.mac +++ b/Source/ZCPR-DJ/zcpr.mac @@ -1,4 +1,4 @@ -; DATE 05/17/21 08:34:00 +; DATE 06/02/21 08:08:00 ; ; TITLE ZCPR Console Command Processor - Version D&J ; SUBTTL Last Modified: 10 August 1997 @@ -396,12 +396,15 @@ CIBUFF: DB ' ' ;DEFAULT (COLD BOOT) COMMAND 13 db 0,0,0,0,0,0,0,0 ;77 db 0,0,0,0,0,0,0,0 ;85 db 0,0,0,0,0,0,0,0 ;93 - db 0,0,0,0,0,0,0,0 ;101 - db 0,0,0,0,0,0,0,0 ;109 + db 0,0,0 ;96 +; DEFB 0,0,0,0,0,0,0,0 ;101 +; DEFB 0,0,0 ;104 +; DEFB 0,0,0,0,0,0,0,0 ;109 +; DEFB 0,0,0,0,0,0,0,0 ;118 BUFEND EQU $ ; DEFW 0 ;SENTINEL FOR STACK END db 0,0 -; DEFS 24 ;STACK AREA + DEFS 24,0 ;STACK AREA STACK EQU $ ;TOP OF STACK ; ; SUBMIT FILE CONTROL BLOCK @@ -427,7 +430,7 @@ FCBS2: db 0 ;S2 FCBRC: db 0 ;RECORD COUNT FCBDM: db 0,0,0,0,0,0,0,0 ;DISK GROUP MAP db 0,0,0,0,0,0,0,0 -FCBCR: DEFS 1 ;CURRENT RECORD NUMBER +FCBCR: db 0 ;CURRENT RECORD NUMBER ; ; Type and List Variables ; @@ -466,7 +469,7 @@ CMDTBL: DEFW RING DC 'CLS' DEFW CLS - DC 'WAIT' ; was 'SAK' ("strike any key") + DC 'SAK' ; "Strike Any Key" DEFW SAK DC 'GO' DEFW GO diff --git a/Source/ZCPR-DJ/zcprdemo.com b/Source/ZCPR-DJ/zcprdemo.com deleted file mode 100644 index 83cc9798930aa91a6be53f6f52e91aff22bc5cfd..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 2176 zcmcgte@q+K9Y2FPJ0zU%FzK#NM&9LUbAcu!UgOaVn37=JAE6*9UD|9#XiAq!R3vnh zNfVs+Y;0>xks`JIvl68=PMbEaS|w4dD1;azJLaX3K}vsUs)Ot;OX)}xU|F`uzQ;0Y ze@>dTC*9NC_r3RhpU?OE`F>9+Hc1>dan`vH=bkomaSq4VlekQpIrN_czFyeX+_I(q z;ipj7OK3Z4?CAc*ezfhe#~ww9`(KBttgLM1w$`?t|D`W0wqj$ess72Um3_OPY@K>J z^z8G^iSAHatLN%h;rfQ@Ot`tuo2Ury^z0trA8M^jH-@~Q?TL6=Msj_gmbyt3*q%%5 z2)B5ygu`CX)Ekkf+8QUSBh4O9dOqCT^mJl#q;=Q$pTawvnx_61i8(EJ+bj6c1{gV; z^F4eB=2KWGq6M7O61#x@0UKC6FBD2V1^|i$`=i>By72_|`srZ6r;2|)Ft_&vcAQHxbkQy^v5pybcp}%H zTCsfT3MSdsB-@*0KTk6E1k-1RQ=zVjvJ|92`5oq0`zzQJ+BSwzo_I&$IEi2fL%m5l zAE;cE8ywdvSz+x=Q?F&lG82M_%yijT&i;F=_Io)0nX#?PdQD<{W${>{eKU+RUGg{d za-f}wGZ3-zli1IcseYnXEO2~7n2Dg788!*>=*O2Ie_SvQ2BZTv$W6RWH8 zV(Wfs-^u};DiNmM^gozb#XFdOIURP`nXXv?^xWQ)xPJBkZ;e^$g&;i_jHy0#NepU<|Ue7k^DdMcpttQ?tz+I5FmEy}l6TkSsak6=&Q<-0n;3;`ZMf*u4=^Tc0s zCuih20z)~4&pORq>MSZ#VwkrZ!8#p5f*nXf)KH;ceW~k4+OKN&R8`Ex>mm?k+7^Ul z`(fF_uXfd{;ys|qFS9zWh{vo|v#^~#Jcsxd>G%A!$N3J9dB^f|e{Y{IN%V{_68Z@l znMAf8GqWA8G{3N3yB>{;p&Fab*5odvyMxn%B^s~1gD;>BhjaPk2Z?5d2qSa^4NR_| zEtMm%i^ zU8*90Kjx(!eNZ#;>*PM6WfP!6MUPyhKJrW#YWP)WHr4qM+En&Pb_Ez@+>PKyx+jFB z7~G~~?7K;?lgyTV@@NKdph=^UWF8#Ub$$zgYX=O$-vd#z=TmM=yq_rN3*>y|^}LOP zIOZI}aP_5h*k~0+-!-FEEAgsv4q^aE<3uY2cl0FD8fubpDWnf#aaDSl9o6z{G)sZF zA$=5;>2Kq-w{(rW8i@j5x(ubSEztquE-5WE{77NZbU=R#S2J9B#`zYAfHU-&JIWkM zWeB%lvwD$fyEs&eV5>i8L5uPvUBt$x8{wv;B1_L0h4LVL($nN- zMw^Y#MU>-ECmlgl4M$lGw91=CLjdQfTz?bOJ;6zOo@f$;wtipdzF%jJEc_6H?*K2w z!VlvTCXldkD&Ng;@)0M|JLGJD!T&bttOwy;y^I(!4%5RNQ0LZRg zs;fzLH7cBm4n$zimY={`OgomLgWJviV)dM6eitni_c$?EVbBFc z@E5sF{sr>IU CP ' ' JR NZ,CMS4 - LD A,(HL) ;FOUND COMMAND, + LD E,(HL) ;FOUND COMMAND, INC HL ;LOAD ADDRESS, - LD H,(HL) ;AND - LD L,A ;JUMP TO IT - JP (HL) ;COMMAND IS CPR-RESIDENT + LD D,(HL) ;AND + JR CMS6 ;UPDATE SYSTEM DATA AND EXECUTE CMS3: BIT 7,(HL) ;END OF TABLE ENTRY? INC HL @@ -1138,7 +1156,10 @@ CMS4: INC HL DJNZ CMS1 ;NOT TO END OF TABLE YET CMS5: - JP COM ;COMMAND MAY BE DISK-RESIDENT + LD DE,COM ;LOAD DESTINATION AND UPDATE +CMS6: + PUSH DE ;PLACE ROUTINE ADDRESS ON STACK + JP UPDATE ;UPDATE SYSTEM DATA AND EXECUTE ; ;**** Section 5 **** ; CPR-Resident Commands @@ -1410,6 +1431,21 @@ REPL2: RET ; ;Section 5E +;Command: CLS +;Function: To clear screen. +;Forms: +; CLS +; +CLS: +; LD A,CLSCHR ; Load clear screen character +; DEFB 21H ; and skip next instruction + ; If a multi-character string is + ; required to clear screen use: + CALL PRINT + DB ESC,'[2','J'+128 + RET +; +;Section 5F ;Command: BELL ;Function: To ring terminal bell. ;Forms: @@ -1419,7 +1455,7 @@ RING: LD A,BELL ; load bell into A JP CONOUT ; and output it ; -;Section 5F +;Section 5G ;Command: LIST ;Function: To print specified file on list device. ;Forms: @@ -1436,7 +1472,7 @@ LIST: ; JR TYPE1 ; -;Section 5G +;Section 5H ;Command: TYPE ;Function: To display specified file on console. ;Forms: @@ -1559,8 +1595,8 @@ PAGER: PAGE2: JP BDOSJP ; return via bdos ; -;Section 5H -;Command: PAGE +;Section 5I +;Command: FF (was PAGE) ;Function: To eject a page on list device via a form feed. ;Forms: ; PAGE @@ -1578,7 +1614,7 @@ EJECT: LD C,05H ; list output JP BDOS ; output character and return via bdos ; -;Section 5I +;Section 5J ;Command: SAVE ;Function: To save the contents of TPA onto disk as a file. Number of ; pages or records is in decimal. Saved area begins at 100H. @@ -1627,7 +1663,7 @@ SAVE3: SAVE4: JP PRNLE ;PRINT 'NO SPACE' ERROR ; -;Section 5J +;Section 5K ;Command: REN ;Function: To change the name of an existing file. ;Forms: @@ -1669,7 +1705,7 @@ NAMERR: REN2: JP ABORT ; -;Section 5K +;Section 5L ;Command: USER ;Function: To change current user number; new user number is in decimal. ;Forms: @@ -1679,7 +1715,7 @@ USER: CALL USRNUM ;EXTRACT USER NUMBER FROM COMMAND LINE JP NEWUSR ;SET NEW USER NUMBER ; -;Section 5L +;Section 5M ;Command: DFU ;Function: To set the Default User Number for the command/file scanner; new ; default user number is in decimal. @@ -1691,7 +1727,7 @@ DFU: LD (DFUSR),A ;PUT IT AWAY RET ; -;Section 5M +;Section 5N ;Command: SCL ;Function: To force ZCPR to parse only a single command per line; reset ; to multiple command format at the next ^C. @@ -1708,7 +1744,7 @@ SINGLE: ENDIF ; ; -;Section 5N +;Section 5O ;Command: PEEK ;Function: To display hex values beginning at a specified address. ;Forms: @@ -1755,7 +1791,7 @@ PRHEX: JP CONOUT ; go display value ; ; -;Section 5O +;Section 5P ;Command: POKE ;Function: To poke a string of hex values into a set of consecutive addresses. ;Forms: @@ -1776,7 +1812,7 @@ POKE1: JR POKE1 ; go for more ; ; -;Section 5P +;Section 5Q ;Command: JUMP ;Function: To call the program (subroutine) at the specified address ; without loading from disk. @@ -1787,7 +1823,7 @@ JUMP: CALL HEXNUM ;GET LOAD ADDRESS IN HL JR CLLPRG ;PERFORM CALL ; -;Section 5Q +;Section 5R ;Command: COM file processing ;Function: To load the specified COM file from disk and execute it. ;Forms: @@ -1807,7 +1843,7 @@ COM: CALL MEMLD ;LOAD MEMORY WITH FILE SPECIFIED ;(NO RETURN IF ERROR OR TOO BIG) ; -;Section 5R +;Section 5S ;Command: GO ;Function: To call the program in the TPA without loading from disk. ; Same as JUMP 100H, but more convenient, especially when @@ -1868,14 +1904,24 @@ COM3: ; RUN LOADED TRANSIENT PROGRAM ; CALL CRLF ;NEW LINE - CALL DEFDMA ;SET DMA TO 0080 - CALL RSTUSR ;RESET TO PROPER USER NUMBER +UPDATE: + CALL DEFDMA ;SET DMA TO DEFAULT VALUE + CALL DLOGIN ;ASSURE PROPER DRIVE + CALL RSTUSR ;ASSURE PROPER USER NUMBER + LD A,E ;GET CURRENT USER NUMBER + ADD A,A ;PLACE IT IN HIGH NIBBLE + ADD A,A + ADD A,A + ADD A,A + LD HL,TDRIVE ;ADD DEFAULT DRIVE NUMBER (LOW NIBBLE) + OR (HL) + LD (UDFLAG),A ;UPDATE USER/DRIVE BYTE ; -; EXECUTION (CALL) OF PROGRAM (SUBROUTINE) OCCURS HERE +; EXECUTION (CALL) OF PROGRAM/SUBROUTINE/COMMAND OCCURS HERE ; RET ;CALL TRANSIENT ; -;Section 5S +;Section 5T ;Command: GET ;Function: To load the specified file from disk to the specified address ;Forms: @@ -1896,9 +1942,9 @@ MEMLD: LD (LDADR),HL ;SET LOAD ADDRESS ; ; MLA is a reentry point for a non-standard CP/M Modification -; This is the return point when the .COM (or GET) file is not found the -; first time, the Default User is selected for the second attempt -; and Drive A is selected for the final attempt. +; This is the return point when the .COM (or GET) file was not found +; so the Default Drive & User are selected for the final attempt +; to find the file. ; MLA: CALL ULOGIN ;LOG ANY USER @@ -1906,29 +1952,22 @@ MLA: CALL OPENF ;OPEN COMMAND.COM FILE JR NZ,MLA1 ;FILE FOUND - LOAD IT ; -; FILE NOT FOUND - SELECT DEFAULT USER +; FILE NOT FOUND - SELECT DEFAULT COM USER ; - LD A,L ;GET FCB USER - AND A ;DEFAULT USER? - JR NZ,MLA0 ;NO - LD HL,TMPUSR ;CURRENT USER SAME AS DEFAULT? LD A,(DFUSR) ;GET DEFAULT USER - CP (HL) SET 7,A ;MAKE INTO VALID USER NUMBER LD (FCBS1),A ;PUT USER INTO FCB - JR NZ,MLA ;AND TRY AGAIN ; -; FILE NOT FOUND - SELECT DRIVE A IF DEFAULT WAS SOME OTHER DRIVE +; AND SELECT DEFAULT COM DRIVE. IF DEFAULT COM DRIVE ALREADY +; SELECTED, GIVE UP AND PRINT ERROR MESSAGE ; MLA0: - LD A,(TDRIVE) ;DRIVE A DEFAULT? - AND A + LD A,DEFDRV-'@' ;A<= DEFAULT COM DRIVE + LD HL,FCBDN ;POINT TO DRIVE IN FCB + CP (HL) ;THE SAME? JR Z,MLA3 ;YES, ERROR - XOR A - LD HL,FCBDN ;POINT AT DRIVE IN FCB - OR (HL) ;DRIVE ALREADY SPECIFIED? - LD (HL),1 ;SELECT DRIVE A - JR Z,MLA ;NO, GO GIVE IT A TRY + LD (HL),A ;PUT DEFAULT COM DRIVE IN FCB + JR MLA ;GO GIVE IT A TRY MLA3: CALL PRNNF ;CAN'T FIND FILE JR PRNLE1 @@ -1961,6 +2000,7 @@ PRNLE1: IF (($-ENTRY) GT ZCPRSZ) *ZCPR too large!!* ENDIF + .DEPHASE ; IF TEST LISTST: @@ -1977,4 +2017,4 @@ ENDLD EQU $ END - PUSH HL ;SAVE POI \ No newline at end of file + \ No newline at end of file diff --git a/Source/ver.inc b/Source/ver.inc index 413d9e41..f43b3219 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,4 +2,4 @@ #DEFINE RMN 1 #DEFINE RUP 1 #DEFINE RTP 0 -#DEFINE BIOSVER "3.1.1-pre.181" +#DEFINE BIOSVER "3.1.1-pre.182" diff --git a/Source/ver.lib b/Source/ver.lib index f8b73c62..9ab293f0 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 1 rup equ 1 rtp equ 0 biosver macro - db "3.1.1-pre.181" + db "3.1.1-pre.182" endm diff --git a/Tools/Makefile.inc b/Tools/Makefile.inc index c6813efa..35258860 100644 --- a/Tools/Makefile.inc +++ b/Tools/Makefile.inc @@ -134,7 +134,7 @@ endif # all:: $(OBJECTS) @for dir in $(SUBDIRS) ; do \ - $(MAKE) --directory $$dir all ; \ + $(MAKE) --directory $$dir ; \ done @if [ "$(DEST)" ] && [ "$(OBJECTS)" ] ; then for file in $(filter-out $(NOCOPY),$(OBJECTS)) ; do \ mkdir -p $(DEST) ; \ From d4ca3de40f7d1e1691aef6184c482dc0dbfcb38e Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Sun, 24 Jul 2022 15:32:05 -0700 Subject: [PATCH 2/3] Update Makefile When making ZCPR-D&J, also make the "demo" version. --- Source/ZCPR-DJ/Makefile | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Source/ZCPR-DJ/Makefile b/Source/ZCPR-DJ/Makefile index aff0ac20..c9b94041 100644 --- a/Source/ZCPR-DJ/Makefile +++ b/Source/ZCPR-DJ/Makefile @@ -1,10 +1,13 @@ -OBJECTS= zcpr.bin +OBJECTS= zcpr.bin zcprdemo.com -OTHERS = zcpr.rel +OTHERS = *.rel TOOLS = ../../Tools include $(TOOLS)/Makefile.inc zcpr.bin: zcpr.rel $(ZXCC) L80 -zcpr,zcpr.bin/n/e + +zcprdemo.com: zcprdemo.rel + $(ZXCC) L80 -zcprdemo,zcprdemo/n/e From aceef154811660bd4534b6e3517ab4273c0f0be0 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Sun, 24 Jul 2022 16:46:59 -0700 Subject: [PATCH 3/3] Support DS1501 RTC jpelletier provided a DS1501 RTC driver. This commit integrates the driver into HBIOS. --- Doc/ChangeLog.txt | 1 + Source/HBIOS/cfg_dyno.asm | 3 + Source/HBIOS/cfg_ezz80.asm | 3 + Source/HBIOS/cfg_master.asm | 3 + Source/HBIOS/cfg_mbc.asm | 3 + Source/HBIOS/cfg_mk4.asm | 3 + Source/HBIOS/cfg_n8.asm | 3 + Source/HBIOS/cfg_rcz180.asm | 3 + Source/HBIOS/cfg_rcz280.asm | 3 + Source/HBIOS/cfg_rcz80.asm | 3 + Source/HBIOS/cfg_rph.asm | 3 + Source/HBIOS/cfg_sbc.asm | 3 + Source/HBIOS/cfg_scz180.asm | 3 + Source/HBIOS/cfg_zeta.asm | 3 + Source/HBIOS/cfg_zeta2.asm | 3 + Source/HBIOS/ds1501rtc.asm | 397 ++++++++++++++++++++++++++++++++++++ Source/HBIOS/hbios.asm | 12 ++ Source/ver.inc | 2 +- Source/ver.lib | 2 +- 19 files changed, 454 insertions(+), 2 deletions(-) create mode 100644 Source/HBIOS/ds1501rtc.asm diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt index 76cd3d01..fc23271c 100644 --- a/Doc/ChangeLog.txt +++ b/Doc/ChangeLog.txt @@ -63,6 +63,7 @@ Version 3.1.1 - DDW: Add support for MBC sound card - WBW: Add support for "romless" booting - L?N: Fixes for ZCPR-D&J (buffer overflow, default drive/user) +- J?P: Add support for DS1501 RTC Version 3.1 ----------- diff --git a/Source/HBIOS/cfg_dyno.asm b/Source/HBIOS/cfg_dyno.asm index 697cf7dd..d6cdfae9 100644 --- a/Source/HBIOS/cfg_dyno.asm +++ b/Source/HBIOS/cfg_dyno.asm @@ -84,6 +84,9 @@ DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; +DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS +; BQRTCENABLE .EQU TRUE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS ; diff --git a/Source/HBIOS/cfg_ezz80.asm b/Source/HBIOS/cfg_ezz80.asm index b52f073d..ce22c8e0 100644 --- a/Source/HBIOS/cfg_ezz80.asm +++ b/Source/HBIOS/cfg_ezz80.asm @@ -90,6 +90,9 @@ DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; +DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS +; BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS ; diff --git a/Source/HBIOS/cfg_master.asm b/Source/HBIOS/cfg_master.asm index 33129261..80bb7ebc 100644 --- a/Source/HBIOS/cfg_master.asm +++ b/Source/HBIOS/cfg_master.asm @@ -124,6 +124,9 @@ DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; +DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS +; BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS ; diff --git a/Source/HBIOS/cfg_mbc.asm b/Source/HBIOS/cfg_mbc.asm index d2dac2c0..f47e25a4 100644 --- a/Source/HBIOS/cfg_mbc.asm +++ b/Source/HBIOS/cfg_mbc.asm @@ -89,6 +89,9 @@ DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; +DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS +; BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS ; diff --git a/Source/HBIOS/cfg_mk4.asm b/Source/HBIOS/cfg_mk4.asm index 0c96e8a6..f8008e11 100644 --- a/Source/HBIOS/cfg_mk4.asm +++ b/Source/HBIOS/cfg_mk4.asm @@ -95,6 +95,9 @@ DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; +DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS +; BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS ; diff --git a/Source/HBIOS/cfg_n8.asm b/Source/HBIOS/cfg_n8.asm index fc84b8cb..c98e3631 100644 --- a/Source/HBIOS/cfg_n8.asm +++ b/Source/HBIOS/cfg_n8.asm @@ -97,6 +97,9 @@ DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; +DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS +; BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS ; diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm index 4e0be811..acf26916 100644 --- a/Source/HBIOS/cfg_rcz180.asm +++ b/Source/HBIOS/cfg_rcz180.asm @@ -92,6 +92,9 @@ DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; +DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS +; BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS ; diff --git a/Source/HBIOS/cfg_rcz280.asm b/Source/HBIOS/cfg_rcz280.asm index e58ecbf6..3f4f3d6d 100644 --- a/Source/HBIOS/cfg_rcz280.asm +++ b/Source/HBIOS/cfg_rcz280.asm @@ -97,6 +97,9 @@ DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; +DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS +; BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS ; diff --git a/Source/HBIOS/cfg_rcz80.asm b/Source/HBIOS/cfg_rcz80.asm index 63705e8e..ae2053f9 100644 --- a/Source/HBIOS/cfg_rcz80.asm +++ b/Source/HBIOS/cfg_rcz80.asm @@ -91,6 +91,9 @@ DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; +DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS +; BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS ; diff --git a/Source/HBIOS/cfg_rph.asm b/Source/HBIOS/cfg_rph.asm index 2c46fd1b..caff799a 100644 --- a/Source/HBIOS/cfg_rph.asm +++ b/Source/HBIOS/cfg_rph.asm @@ -95,6 +95,9 @@ DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; +DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS +; BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS ; diff --git a/Source/HBIOS/cfg_sbc.asm b/Source/HBIOS/cfg_sbc.asm index 8ce50f96..81445686 100644 --- a/Source/HBIOS/cfg_sbc.asm +++ b/Source/HBIOS/cfg_sbc.asm @@ -89,6 +89,9 @@ DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; +DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS +; BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS ; diff --git a/Source/HBIOS/cfg_scz180.asm b/Source/HBIOS/cfg_scz180.asm index d13aefa5..ea499d24 100644 --- a/Source/HBIOS/cfg_scz180.asm +++ b/Source/HBIOS/cfg_scz180.asm @@ -87,6 +87,9 @@ DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; +DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS +; BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS ; diff --git a/Source/HBIOS/cfg_zeta.asm b/Source/HBIOS/cfg_zeta.asm index 55a6a01c..64330ef7 100644 --- a/Source/HBIOS/cfg_zeta.asm +++ b/Source/HBIOS/cfg_zeta.asm @@ -76,6 +76,9 @@ DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; +DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS +; BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS ; diff --git a/Source/HBIOS/cfg_zeta2.asm b/Source/HBIOS/cfg_zeta2.asm index ec3c3e0f..0a209b64 100644 --- a/Source/HBIOS/cfg_zeta2.asm +++ b/Source/HBIOS/cfg_zeta2.asm @@ -87,6 +87,9 @@ DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; +DS1501RTCENABLE .EQU FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM) +DS1501RTC_BASE .EQU $50 ; DS1501RTC: I/O BASE ADDRESS +; BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS ; diff --git a/Source/HBIOS/ds1501rtc.asm b/Source/HBIOS/ds1501rtc.asm new file mode 100644 index 00000000..4121ebad --- /dev/null +++ b/Source/HBIOS/ds1501rtc.asm @@ -0,0 +1,397 @@ + +; +;================================================================================================== +; Maxim DS1501/DS1511 Y2K-Compliant Watchdog RTC Driver +;================================================================================================== +; +; THIS DRIVER CODE WAS CONTRIBUTED TO ROMWBW BY JPELLETIER 3:59 PM 7/24/2022 +; +; Register Addresses (HEX / BCD): +; +; +---+-----+---------------+-------------------+------------------+----------------+ +; |ADR| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | RANGE | REGISTER | +; +---+-----+---------------+-------------------+------------------+----------------+ +; | 0 | 0 | 10-Second | 1-Second | 00-59 | Seconds | +; +---+-----+-----+---------+-------------------+------------------+----------------+ +; | 1 | 0 | 10-Minute | 1-Minute | 00-59 | Minutes | +; +---+-----+-----+---------+-------------------+------------------+----------------+ +; | 2 | 0 | 0 | 10-Hour | 1-Hour | 00-23 | Hours | +; +---+-----+-----+----+----+-------------------+------------------+----------------+ +; | 3 | 0 | 0 | 0 | 0 | 0 | Day Of Week | 01-07 | Day Of Week | +; +---+-----+-----+----+----+----+--------------+------------------+----------------+ +; | 4 | 0 | 0 | 10-Date | 1-Date | 01-31 | Date | +; +---+-----+-----+----+----+-------------------+------------------+----------------+ +; | 5 |/EOSC|/E32K|BB32|10Mo| 1-Month | 01-12 | Month | +; +---+-----+-----+----+----+-------------------+------------------+----------------+ +; | 6 | 10-Year | 1-Year | 00-99 | Year | +; +---+-----+-----+----+----+----+----+----+----+------------------+----------------+ +; | 7 | 10-Century | 1-Century | 00-39 | Century | +; +---+-----+-----+----+----+----+----+----+----+------------------+----------------+ +; | 8 | AM1| 10-Second | 1-Second | 00-59 | Seconds Alarm | +; +---+-----+---------------+-------------------+------------------+----------------+ +; | 9 | AM2| 10-Minute | 1-Minute | 00-59 | Minutes Alarm | +; +---+-----+-----+---------+-------------------+------------------+----------------+ +; | A | AM3| 0 | 10-Hour | 1-Hour | 00-23 | Hours Alarm | +; +---+-----+-----+----+----+-------------------+------------------+----------------+ +; | B | AM4|DY/DT| 10-date | Day/Date | 1-7/01-31 | Day/Date Alarm | +; +---+-----+-----+----+----+----+--------------+------------------+----------------+ +; | C | 0.1-Second | 0.01-Second | 00-99 | Watchdog | +; +---+-----+-----+---------+-------------------+------------------+----------------+ +; | D | 10-Second | 1-Second | 00-99 | Watchdog | +; +---+-----+-----+---------+-------------------+------------------+----------------+ +; | E | BLF1| BLF2| PRS| PAB| TDF| KSF| WDF|IRQF| | ControlA | +; +---+-----+-----+----+----+----+----+----+----+------------------+----------------+ +; | F | TE| CS| BME| TPE| TIE| KIE| WDE| WDS| | ControlB | +; +---+-----+-----+----+----+----+----+----+----+------------------+----------------+ +; |10 | Extended RAM Address | 00-FF | RAM Address | +; +---+-----+-----+----+----+----+----+----+----+------------------+----------------+ +; |11 | Reserved | | | +; +---+-----+-----+----+----+----+----+----+----+------------------+----------------+ +; |12 | Reserved | | | +; +---+--+--+-----+----+----+----+----+----+----+------------------+----------------+ +; |13 | Extended RAM Data | 00-FF | RAM Data | +; +---+--+--+-----+----+----+----+----+----+----+------------------+----------------+ +; |14-1F | Reserved | | | +; +------+--+-----+----+----+----+----+----+----+------------------+----------------+ + +; * = Unused bits; unwritable and read as 0. +; 0 = should be set to 0 for valid time/calendar range. +; Clock calendar data is BCD. Automatic leap year adjustment. +; Day-Of-Week coded as Sunday = 1 through Saturday = 7. + +; Constants + +;By defining 2 bases, this allows some flexibility for address decoding +DS1501NVM_BASE .EQU DS1501RTC_BASE + $10 + +DS1501RTC_SEC .EQU DS1501RTC_BASE + $00 +DS1501RTC_MIN .EQU DS1501RTC_BASE + $01 +DS1501RTC_HOUR .EQU DS1501RTC_BASE + $02 +DS1501RTC_WEEK_DAY .EQU DS1501RTC_BASE + $03 +DS1501RTC_DAY .EQU DS1501RTC_BASE + $04 +DS1501RTC_MONTH .EQU DS1501RTC_BASE + $05 +DS1501RTC_YEAR .EQU DS1501RTC_BASE + $06 +DS1501RTC_CENT .EQU DS1501RTC_BASE + $07 +DS1501RTC_SEC_ALM .EQU DS1501RTC_BASE + $08 +DS1501RTC_MIN_ALM .EQU DS1501RTC_BASE + $09 +DS1501RTC_HOUR_ALM .EQU DS1501RTC_BASE + $0A +DS1501RTC_DAY_ALM .EQU DS1501RTC_BASE + $0B +DS1501RTC_WDOG1 .EQU DS1501RTC_BASE + $0C +DS1501RTC_WDOG2 .EQU DS1501RTC_BASE + $0D +DS1501RTC_CONTROLA .EQU DS1501RTC_BASE + $0E +DS1501RTC_CONTROLB .EQU DS1501RTC_BASE + $0F + +DS1501RTC_RAMADDR .EQU DS1501NVM_BASE + $00 +DS1501RTC_RAMDATA .EQU DS1501NVM_BASE + $03 + +DS1501RTC_HIGH .EQU %11110000 +DS1501RTC_LOW .EQU %00001111 + +;ControlA bit masks +;BLF1| BLF2| PRS| PAB| TDF| KSF| WDF|IRQF +DS1501RTC_IRQF .EQU %00000001 +DS1501RTC_WDF .EQU %00000010 +DS1501RTC_KSF .EQU %00000100 +DS1501RTC_TDF .EQU %00001000 +DS1501RTC_PAB .EQU %00010000 +DS1501RTC_PRS .EQU %00100000 +DS1501RTC_BLF2 .EQU %01000000 +DS1501RTC_BLF1 .EQU %10000000 + +;ControlB bit masks +;TE| CS| BME| TPE| TIE| KIE| WDE| WDS| +DS1501RTC_WDS .EQU %00000001 +DS1501RTC_WDE .EQU %00000010 +DS1501RTC_KIE .EQU %00000100 +DS1501RTC_TIE .EQU %00001000 +DS1501RTC_TPE .EQU %00010000 +DS1501RTC_BME .EQU %00100000 +DS1501RTC_CS .EQU %01000000 +DS1501RTC_TE .EQU %10000000 + +DS1501RTC_BUFSIZE .EQU 6 ; 6 BYTE BUFFER (YYMMDDHHMMSS) + +; RTC Device Initialization Entry + +DS1501RTC_INIT: + CALL NEWLINE ; Formatting + PRTS("DS1501RTC: IO=0x$") + LD A, DS1501RTC_BASE + CALL PRTHEXBYTE + + CALL NEWLINE ; Formatting + PRTS("DS1501NVM: IO=0x$") + LD A, DS1501NVM_BASE + CALL PRTHEXBYTE + + IN A,(DS1501RTC_CONTROLB) ;clear any pending interrupt flags + + XOR A ; Zero A + OR DS1501RTC_TE ;enable time updates + OUT (DS1501RTC_CONTROLB), A + + CALL DS1501RTC_LOAD + ; DISPLAY CURRENT TIME + PRTS(" $") + LD A, (DS1501RTC_BUF_MON) + CALL PRTHEXBYTE + PRTS("/$") + LD A, (DS1501RTC_BUF_DAY) + CALL PRTHEXBYTE + PRTS("/$") + LD A, (DS1501RTC_BUF_YEAR) + CALL PRTHEXBYTE + PRTS(" $") + LD A, (DS1501RTC_BUF_HOUR) + CALL PRTHEXBYTE + PRTS(":$") + LD A, (DS1501RTC_BUF_MIN) + CALL PRTHEXBYTE + PRTS(":$") + LD A, (DS1501RTC_BUF_SEC) + CALL PRTHEXBYTE + + LD BC,DS1501RTC_DISPATCH + CALL RTC_SETDISP + + XOR A ; Signal success + RET + +; RTC Device Function Dispatch Entry +; A: Result (OUT), 0=OK, Z=OK, NZ=Error +; B: Function (IN) + +DS1501RTC_DISPATCH: + LD A, B ; Get requested function + AND $0F ; Isolate Sub-Function + JP Z, DS1501RTC_GETTIM ; Get Time + DEC A + JP Z, DS1501RTC_SETTIM ; Set Time + DEC A + JP Z, DS1501RTC_GETBYT ; Get NVRAM Byte Value + DEC A + JP Z, DS1501RTC_SETBYT ; Set NVRAM Byte Value + DEC A + JP Z, DS1501RTC_GETBLK ; Get NVRAM Data Block Value + DEC A + JP Z, DS1501RTC_SETBLK ; Set NVRAM Data Block Value + DEC A + JP Z, DS1501RTC_GETALM ; Get Alarm + DEC A + JP Z, DS1501RTC_SETALM ; Set Alarm +; +; NVRAM FUNCTIONS ARE NOT IMPLEMENTED YET +; +DS1501RTC_GETBYT: +DS1501RTC_SETBYT: +DS1501RTC_GETBLK: +DS1501RTC_SETBLK: + CALL PANIC + +; RTC Get Time +; A: Result (OUT), 0=OK, Z=OK, NZ=Error +; HL: Date/Time Buffer (OUT) +; Buffer format is BCD: YYMMDDHHMMSS +; 24 hour time format is assumed +; +DS1501RTC_GETTIM: + EX DE, HL + CALL DS1501RTC_LOAD + ; Now copy to read destination (Interbank Save) + LD A, BID_BIOS ; Copy from BIOS bank + LD (HB_SRCBNK), A ; Set it + LD A, (HB_INVBNK) ; Copy to current user bank + LD (HB_DSTBNK), A ; Set it + LD BC, DS1501RTC_BUFSIZE ; Length is 6 bytes +#IF (INTMODE == 1) + DI +#ENDIF + CALL HB_BNKCPY ; Copy the clock data +#IF (INTMODE == 1) + EI +#ENDIF +; + ; CLEAN UP AND RETURN + XOR A ; SIGNAL SUCCESS + RET ; AND RETURN +; +; RTC Set Time +; A: Result (OUT), 0=OK, Z=OK, NZ=Error +; HL: Date/Time Buffer (IN) +; Buffer Format is BCD: YYMMDDHHMMSS +; 24 hour time format is assumed +; +DS1501RTC_SETTIM: +; + ; Copy incoming time data to our time buffer + LD A, (HB_INVBNK) ; Copy from current user bank + LD (HB_SRCBNK), A ; Set it + LD A, BID_BIOS ; Copy to BIOS bank + LD (HB_DSTBNK), A ; Set it + LD DE, DS1501RTC_BUF ; Destination Address + LD BC, DS1501RTC_BUFSIZE ; Length is 6 bytes +#IF (INTMODE == 1) + DI +#ENDIF + CALL HB_BNKCPY ; Copy the clock data +#IF (INTMODE == 1) + EI +#ENDIF + ; Write to clock + LD HL, DS1501RTC_BUF + CALL DS1501RTC_SUSPEND + LD A, (HL) + OUT (DS1501RTC_YEAR), A ; Write Year + INC HL + LD A, (HL) + OUT (DS1501RTC_MONTH), A ; Write Month + INC HL + LD A, (HL) + OUT (DS1501RTC_DAY), A ; Write Day + INC HL + LD A, (HL) + OUT (DS1501RTC_HOUR), A ; Write Hour + INC HL + LD A, (HL) + OUT (DS1501RTC_MIN), A ; Write Minute + INC HL + LD A, (HL) + OUT (DS1501RTC_SEC), A ; Write Second + CALL DS1501RTC_RESUME + ; clean up and return + XOR A ; Signal success + RET ; And return + +; RTC Get Alarm +; A: Result (OUT), 0=OK, Z=OK, NZ=Error +; HL: Date/Time Buffer (OUT) +; Buffer format is BCD: YYMMDDHHMMSS +; 24 hour time format is assumed +; +DS1501RTC_GETALM: + EX DE, HL + LD HL, DS1501RTC_BUF + PUSH HL ; Save address of source buffer + CALL DS1501RTC_SUSPEND + XOR A + LD (HL), A ; Read Year + INC HL + LD (HL), A ; Read Month + INC HL + IN A, (DS1501RTC_DAY_ALM) ; Read Day + LD (HL), A + INC HL + IN A, (DS1501RTC_HOUR_ALM) ; Read Hour + LD (HL), A + INC HL + IN A, (DS1501RTC_MIN_ALM) ; Read Minute + LD (HL), A + INC HL + IN A, (DS1501RTC_SEC_ALM) ; Read Second + LD (HL), A + CALL DS1501RTC_RESUME + POP HL ; Restore address of source buffer + ; Now copy to read destination (Interbank Save) + LD A, BID_BIOS ; Copy from BIOS bank + LD (HB_SRCBNK), A ; Set it + LD A, (HB_INVBNK) ; Copy to current user bank + LD (HB_DSTBNK), A ; Set it + LD BC, DS1501RTC_BUFSIZE ; Length is 6 bytes +#IF (INTMODE == 1) + DI +#ENDIF + CALL HB_BNKCPY ; Copy the clock data +#IF (INTMODE == 1) + EI +#ENDIF +; + ; CLEAN UP AND RETURN + XOR A ; SIGNAL SUCCESS + RET ; AND RETURN +; +; RTC Set Alarm +; A: Result (OUT), 0=OK, Z=OK, NZ=Error +; HL: Date/Time Buffer (IN) +; Buffer Format is BCD: YYMMDDHHMMSS +; 24 hour time format is assumed +; +DS1501RTC_SETALM: + ; Copy incoming time data to our time buffer + LD A, (HB_INVBNK) ; Copy from current user bank + LD (HB_SRCBNK), A ; Set it + LD A, BID_BIOS ; Copy to BIOS bank + LD (HB_DSTBNK), A ; Set it + LD DE, DS1501RTC_BUF ; Destination Address + LD BC, DS1501RTC_BUFSIZE ; Length is 6 bytes +#IF (INTMODE == 1) + DI +#ENDIF + CALL HB_BNKCPY ; Copy the clock data +#IF (INTMODE == 1) + EI +#ENDIF + ; Write to clock + LD HL, DS1501RTC_BUF_DAY + CALL DS1501RTC_SUSPEND + LD A, (HL) + OUT (DS1501RTC_DAY_ALM), A ; Write Day + INC HL + LD A, (HL) + OUT (DS1501RTC_HOUR_ALM), A ; Write Hour + INC HL + LD A, (HL) + OUT (DS1501RTC_MIN_ALM), A ; Write Minute + INC HL + LD A, (HL) + OUT (DS1501RTC_SEC_ALM), A ; Write Second + CALL DS1501RTC_RESUME + ; clean up and return + XOR A ; Signal success + RET ; And return + +DS1501RTC_SUSPEND: + IN A, (DS1501RTC_CONTROLB) ; Suspend Clock + AND ~DS1501RTC_TE + OUT (DS1501RTC_CONTROLB), A + RET + +DS1501RTC_RESUME: + IN A, (DS1501RTC_CONTROLB) ; Resume Clock + OR DS1501RTC_TE + OUT (DS1501RTC_CONTROLB), A + RET + +DS1501RTC_LOAD: + LD HL, DS1501RTC_BUF + PUSH HL ; Save address of source buffer + CALL DS1501RTC_SUSPEND + IN A, (DS1501RTC_YEAR) ; Read Year + LD (HL), A + INC HL + IN A, (DS1501RTC_MONTH) ; Read Month + LD (HL), A + INC HL + IN A, (DS1501RTC_DAY) ; Read Day + LD (HL), A + INC HL + IN A, (DS1501RTC_HOUR) ; Read Hour + LD (HL), A + INC HL + IN A, (DS1501RTC_MIN) ; Read Minute + LD (HL), A + INC HL + IN A, (DS1501RTC_SEC) ; Read Second + LD (HL), A + CALL DS1501RTC_RESUME + POP HL ; Restore address of source buffer + RET + +; Working Variables + +DS1501RTC_BUF: +DS1501RTC_BUF_YEAR: .DB 0 ; Year +DS1501RTC_BUF_MON: .DB 0 ; Month +DS1501RTC_BUF_DAY: .DB 0 ; Day +DS1501RTC_BUF_HOUR: .DB 0 ; Hour +DS1501RTC_BUF_MIN: .DB 0 ; Minute +DS1501RTC_BUF_SEC: .DB 0 ; Second diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index cfb04eec..7582ed68 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -3006,6 +3006,9 @@ HB_INITTBL: #IF (DSRTCENABLE) .DW DSRTC_INIT #ENDIF +#IF (DS1501RTCENABLE) + .DW DS1501RTC_INIT +#ENDIF #IF (BQRTCENABLE) .DW BQRTC_INIT #ENDIF @@ -5773,6 +5776,15 @@ SIZ_DSRTC .EQU $ - ORG_DSRTC .ECHO " bytes.\n" #ENDIF ; +#IF (DS1501RTCENABLE) +ORG_DS1501RTC .EQU $ + #INCLUDE "ds1501rtc.asm" +SIZ_DS1501RTC .EQU $ - ORG_DS1501RTC + .ECHO "DS1501RTC occupies " + .ECHO SIZ_DS1501RTC + .ECHO " bytes.\n" +#ENDIF +; #IF (BQRTCENABLE) ORG_BQRTC .EQU $ #INCLUDE "bqrtc.asm" diff --git a/Source/ver.inc b/Source/ver.inc index f43b3219..b66c684d 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,4 +2,4 @@ #DEFINE RMN 1 #DEFINE RUP 1 #DEFINE RTP 0 -#DEFINE BIOSVER "3.1.1-pre.182" +#DEFINE BIOSVER "3.1.1-pre.183" diff --git a/Source/ver.lib b/Source/ver.lib index 9ab293f0..291b4eda 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 1 rup equ 1 rtp equ 0 biosver macro - db "3.1.1-pre.182" + db "3.1.1-pre.183" endm