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@ -1,5 +1,4 @@ |
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; |
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; |
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;======================================================================= |
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; HDIAG Diagmostic ROM |
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;======================================================================= |
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@ -27,9 +26,12 @@ |
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; - APPBOOT: Boot as a CP/M style application file |
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; |
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; When APPBOOT is defined, the file is assembled as a CP/M application |
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; assuming that it will be loaded at 100h by the cp/m (or compatible) |
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; assuming that it will be loaded at 100h by the CP/M (or compatible) |
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; OS. |
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; |
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.module MAIN |
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; |
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#include "hdiag.inc" |
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#include "z180.inc" |
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; |
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;======================================================================= |
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@ -42,7 +44,7 @@ |
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; |
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.org $0000 |
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; |
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jp hd_start ; rst $00: jump to boot code |
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jp _start ; rst $00: jump to boot code |
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.fill ($08-$) |
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ret ; rst $08 |
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.fill ($10-$) |
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@ -75,46 +77,41 @@ |
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; to the upper 32K of CPU address space until the memory manager |
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; is initialized. |
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; |
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hd_start: |
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_start: |
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; |
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; Discover CPU Type and Memory Manager |
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; |
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; Some of this code is derived from UNA by John Coffman |
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; |
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; CPU Type: |
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; 0: Z80 |
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; 1: Z80180 - ORIGINAL Z180 (EQUIVALENT TO HD64180) |
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; 2: Z8S180 - ORIGINAL S-CLASS, REV. K, AKA SL1960, NO ASCI BRG |
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; 3: Z8S180 - REVISED S-CLASS, REV. N, W/ ASCI BRG |
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; 4: Z8280 |
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; |
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; Memory Manager: |
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; 0: SBC/MBC/Zeta 1 |
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; 1: Zeta 2/RC2014 |
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; 2: Z180 |
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; 3: N8? |
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; 4: Z280 |
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; |
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; CPU and memory manager constants are defined in hdiag.inc. |
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; |
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di ; no interrupts allowed |
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; |
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ld a,$80 |
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out ($0D),a |
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; |
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; Use H for memory manager, and L for CPU Type |
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ld hl,0 ; assume Z80 and SBC |
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; Use D for memory manager, and E for CPU Type |
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ld de,0 ; assume unknown for both |
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; |
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; Start with CPU type detection |
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; |
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; Check for Z80 |
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inc e ; not sure how to do it, just assume it |
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; |
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; Test for Z180 using mlt |
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ex de,hl ; save DE to HL for test |
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ld de,$0506 ; 5 x 6 |
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mlt de ; de = 30 if Z180 |
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ld a,e ; check if multiply happened |
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ex de,hl ; restore DE now |
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cp 30 |
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jr nz,hd_tryZ280 ; if != 30, not a Z180, try Z280 |
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inc l ; Z80180 or better |
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jr nz,_tryZ280 ; if != 30, not a Z180, try Z280 |
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inc e ; Z80180 or better |
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; |
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#ifdef APPBOOT |
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; |
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; Reset Z180 internal register base to zero |
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; Reset Z180 internal register base to zero no matter where |
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; it might have previously been mapped. |
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xor a |
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out0 ($7F),a |
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out0 ($BF),a |
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@ -125,8 +122,8 @@ hd_start: |
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; Test for older S-class (rev K) |
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in0 a,(z180_ccr) ; supposedly only on s-class |
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inc a ; FF -> 0 |
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jr z,hd_z180res ; if zero, pre-S, HD61480 or equiv |
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inc l ; Z8S180 rev K (SL1960) or better |
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jr z,_z180res ; if zero, pre-S, HD61480 or equiv |
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inc e ; Z8S180 rev K (SL1960) or better |
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; |
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; Test for newer S-class (rev N) |
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; On older S-class, asci time constant reg does not exist |
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@ -134,30 +131,30 @@ hd_start: |
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out0 (z180_astc1l),d ; d = 0 at this point |
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in0 a,(z180_astc1l) ; asci time constant reg |
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inc a ; FF -> 0 |
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jr z,hd_z180res ; if zero, rev-K |
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inc l ; otherwise Z8S180 rev N w/ asci brg |
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jr hd_z180res ; go to Z180 reset |
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jr z,_z180res ; if zero, rev-K |
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inc e ; otherwise Z8S180 rev N w/ asci brg |
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jr _z180res ; go to Z180 reset |
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; |
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hd_tryZ280: |
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_tryZ280: |
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; Test for Z280 per Zilog doc |
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ld a,$40 ; initialize the operand |
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.db $cb,$37 ; this instruction will set the s flag |
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; on the Z80 cpu and clear the s flag |
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; on the Z280 mpu. |
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jp m,hd_z80res ; if not Z280, we are Z80 |
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ld l,4 ; we are Z280 |
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jr hd_z280res ; handle Z280 initialization |
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jp m,_z80res ; if not Z280, we are Z80 |
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ld l,hd_cpu_z280 ; we are Z280 |
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jr _z280res ; handle Z280 initialization |
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; |
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hd_z80res: |
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_z80res: |
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ld a,$01 |
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out (0),a |
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; Reset Z80 here (is there anything?) |
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jr hd_cpu1 |
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jr _cpu1 |
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; |
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hd_z180res: |
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_z180res: |
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; |
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; Reset z180 registers here |
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; Set CPU speed to oscillator X 1 |
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; Set CPU speed to oscillator x 1 |
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xor a |
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out0 (z180_cmr),a |
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ld a,$80 |
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@ -179,14 +176,19 @@ hd_z180res: |
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out0 (z180_cbr),a ; ... for Common Base |
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#endif |
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; |
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jr hd_cpu1 |
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jr _cpu1 |
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; |
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hd_z280res: |
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_z280res: |
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; Reset Z280 registers here |
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; Make sure memmgr is reset to defaults! |
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jr hd_cpu1 |
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jr _cpu1 |
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; |
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hd_cpu1: |
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; At this point, we should have the cpu type in the L register. |
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; Now determine the memory manager. In general, we just attempt to |
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; enable the different memory managers and keep testing to see if |
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; a RAM bank has appeared in the common area. |
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; |
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_cpu1: |
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ld a,$02 |
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out ($0D),a |
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; |
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@ -210,19 +212,24 @@ hd_cpu1: |
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ld a,$03 |
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out ($0D),a |
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; |
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; If SBC memmgr, RAM is already in himem, otherwise ROM |
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; There is no way to disable the common (himem) RAM bank |
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; under the SBC memory manager. Here, we just see if there |
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; is RAM in himem and, if so, assume the SBC memory manager. |
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; If not, we continue on to test the other possible memory |
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; managers. |
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inc d ; assume SBC memory manager |
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ld ix,$FFFF ; point to himem |
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ld a,$A5 ; an unlikely bit pattern |
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ld (ix),a ; write the value |
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cp (ix+0) ; check value written |
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jr z,hd_cpu2 ; SBC memory manager, we are done! |
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jr z,_cpu2 ; SBC memory manager, we are done! |
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; |
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ld a,$04 |
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out ($0D),a |
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; |
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; Now test for Zeta 2 memory manager |
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; Start by initializing and enabling the page registers |
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inc h ; assume Zeta 2 memory manager |
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inc d ; assume Zeta 2 memory manager |
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#ifdef ROMBOOT |
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xor a ; ROM page 0 |
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out ($78),a |
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@ -244,56 +251,54 @@ hd_cpu1: |
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ld a,$A5 ; an unlikely bit pattern |
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ld (ix),a ; write the value |
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cp (ix+0) ; check value written |
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jr z,hd_cpu2 ; Zeta 2 memory manager, we are done! |
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jr z,_cpu2 ; Zeta 2 memory manager, we are done! |
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; |
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ld a,$06 |
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out ($0D),a |
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; |
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; If neither SBC nor Zeta 2, then we assume the memory |
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; manager is the native memory manager onboard the CPU |
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ld a,l ; get cpu type |
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cp 4 ; Z280? |
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jr z,hd_z280init ; handle it |
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ld a,e ; get cpu type |
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cp hd_cpu_z280 ; Z280? |
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jr z,_z280init ; handle it |
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or a ; Z80? |
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jr nz,hd_z180init ; if no, do handle Z180 |
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jr nz,_z180init ; if no, go handle Z180 |
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; |
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; If we get here, we are stuck. We believe we are a Z80 |
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; but both of the Z80 memory manager tests failed. |
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hd_halt: |
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_halt: |
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ld a,$07 |
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out ($0D),a |
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ld hl,str_halt |
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; |
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ld hl,_str_halt |
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call prtstr |
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halt ; give up |
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; |
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hd_z180init: |
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_z180init: |
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; Initialize Z180 memory manager |
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; Put first RAM page into himem (commmon) |
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ld a,$80 |
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out0 (z180_cbr),a |
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; |
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ld h,2 |
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jr hd_cpu2 |
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ld d,hd_mm_z180 |
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jr _cpu2 |
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hd_N8init: |
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_N8init: |
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; Initialize N8 memory manager |
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ld h,3 |
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jr hd_cpu2 |
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ld d,hd_mm_n8 |
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jr _cpu2 |
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hd_z280init: |
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_z280init: |
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; Initialize Z280 memory manager |
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ld h,4 |
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jr hd_cpu2 |
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ld d,hd_mm_z280 |
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jr _cpu2 |
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; |
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hd_cpu2: |
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_cpu2: |
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ld a,$08 |
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out ($0D),a |
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; |
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ld ($8000),hl ; stash cpu/memmgr at $8000 |
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ex de,hl ; cpu/memmgr values to HL |
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ld sp,hl ; and stash SP reg |
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; |
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; Transition to upper memory (omit page zero) |
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; |
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@ -301,7 +306,7 @@ hd_cpu2: |
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ld de,$8000+$100 |
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ld bc,$8000-$100 |
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ldir |
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jp hd_start2 |
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jp _start2 |
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; |
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.org $ + $8000 |
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; |
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@ -310,27 +315,28 @@ hd_cpu2: |
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; Post-relocation Startup |
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;======================================================================= |
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; |
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hd_start2: |
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_start2: |
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; |
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ld a,$09 |
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out ($0D),a |
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; |
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ld sp,$FF00 ; Stack just below FF page |
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; |
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; Copy FF page image to real location. Use a decrementing copy |
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; just in case page image is within $100 bytes of $FF00. Very |
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; unlikely, but just to be safe. |
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; |
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ld hl,ffpgimg+$FF ; Start at end of image |
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ld hl,_ffimg+$FF ; Start at end of image |
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ld de,$FFFF ; To top of RAM |
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ld bc,$100 ; Copy 1 page |
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lddr ; Execute |
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; |
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; Recover cpu/memmgr codes stashed at $8000 and |
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; save them in FFpg |
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; Recover cpu/memmgr codes stashed in SP and |
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; save them in FF page |
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; |
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ld hl,($8000) |
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ld (hd_cpu),hl |
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ld (_cpu),sp |
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; |
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; Now we establish a real stack (finally!) |
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; |
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ld sp,$FF00 ; Stack just below FF page |
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; |
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; Probe and initialize serial port console driver. We just go |
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; through the options stopping at the first one that works. The |
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@ -340,27 +346,30 @@ hd_start2: |
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; |
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ld a,$0A |
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out ($0D),a |
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; |
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; |
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; This should be table driven!!! |
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; |
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; Z280 UART |
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ld ix,z2u_jptbl |
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ld ix,ser_z2u |
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call jpix |
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jr z,hd_start3 |
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jr z,_start3 |
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; ASCI |
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ld ix,asci_jptbl |
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ld ix,ser_asci |
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call jpix |
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jr z,hd_start3 |
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jr z,_start3 |
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; UART |
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ld ix,uart_jptbl |
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ld ix,ser_uart |
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call jpix |
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jr z,hd_start3 |
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jr z,_start3 |
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; ACIA |
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ld ix,acia_jptbl |
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ld ix,ser_acia |
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call jpix |
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jr z,hd_start3 |
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jr z,_start3 |
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; SIO |
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ld ix,sio_jptbl |
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ld ix,ser_sio |
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call jpix |
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jr z,hd_start3 |
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jr z,_start3 |
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; |
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; Ugh, nothing worked |
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ld a,$0C |
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@ -369,7 +378,7 @@ hd_start2: |
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; |
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; |
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; |
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hd_start3: |
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_start3: |
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; |
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ld a,$0D |
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out ($0D),a |
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@ -378,185 +387,115 @@ hd_start3: |
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; |
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push ix |
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pop hl |
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ld de,hd_serjptbl |
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ld de,_jptbl |
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ld bc,5*3 |
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ldir |
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; |
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; |
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; |
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; Map a RAM page to lower 32K |
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; Setup memory manager |
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; |
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; Map RAM page 0 to lower 32K |
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; |
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; Setup zero page in lower 32K |
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; |
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; |
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; |
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hd_start4: |
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_restart: |
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; |
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ld hl,str_banner |
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ld hl,_str_banner |
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call prtstr |
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; |
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ld hl,str_cputag |
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call prtstr |
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ld a,($8000) ; cpu type |
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;call prthex8 |
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rlca |
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ld hl,str_cpu |
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call addhla |
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ld a,(hl) |
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inc hl |
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ld h,(hl) |
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ld l,a |
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call prtstr |
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; Print CPU model |
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ld de,_str_cputag |
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ld hl,_str_cpu |
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ld a,(hd_cpu) |
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call prtstrtbl |
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; |
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; |
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ld hl,str_mmtag |
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call prtstr |
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ld a,($8001) ; memory manager |
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;call prthex8 |
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rlca |
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ld hl,str_mm |
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call addhla |
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ld a,(hl) |
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inc hl |
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ld h,(hl) |
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ld l,a |
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call prtstr |
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|
; Print memory manager |
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ld de,_str_mmtag |
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ld hl,_str_mm |
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ld a,(hd_mmgr) |
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call prtstrtbl |
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; |
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call cin |
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jp hd_start4 |
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jp _restart |
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; |
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; |
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; |
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jp hd_halt |
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jp _halt |
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; |
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;======================================================================= |
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; Helper functions |
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;======================================================================= |
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; |
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; |
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;======================================================================= |
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; Include various utility code modules |
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;======================================================================= |
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; |
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#include "util.asm" |
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; |
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;======================================================================= |
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; Console I/O |
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; Console I/O modules |
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;======================================================================= |
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; |
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; Internal serial driver routing jump table. The console serial |
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; port is detected at startup and the following table is populated |
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; dynamically at that time. |
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; |
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hd_serjptbl: |
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jp 0 ; Console port initialization |
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jp 0 ; Console read byte |
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jp 0 ; Console write byte |
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jp 0 ; Console input status |
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jp 0 ; Console output status |
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; |
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; Wrapper functions for console I/O handles routing abstraction and |
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; ensures that no registers are modified other than AF for input |
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; functions. |
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; |
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hd_cinit: |
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push af |
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push bc |
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push de |
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push hl |
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call hd_serjptbl + 0 |
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pop hl |
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pop de |
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pop bc |
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pop af |
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ret |
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; |
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hd_cin: |
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push bc |
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push de |
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push hl |
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call hd_serjptbl + 3 |
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pop hl |
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pop de |
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pop bc |
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ret |
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; |
|
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hd_cout: |
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push af |
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push bc |
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push de |
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push hl |
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call hd_serjptbl + 6 |
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pop hl |
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pop de |
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pop bc |
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|
pop af |
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|
ret |
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; |
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hd_cist: |
|
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push bc |
|
|
|
push de |
|
|
|
push hl |
|
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|
call hd_serjptbl + 9 |
|
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|
pop hl |
|
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|
pop de |
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|
pop bc |
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|
ret |
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|
; |
|
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|
hd_cost: |
|
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|
push af |
|
|
|
push bc |
|
|
|
push de |
|
|
|
push hl |
|
|
|
call hd_serjptbl + 12 |
|
|
|
pop hl |
|
|
|
pop de |
|
|
|
pop bc |
|
|
|
pop af |
|
|
|
ret |
|
|
|
; |
|
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|
; Include all serial drivers |
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|
; |
|
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|
.module UART |
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|
ser_uart .equ $ |
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|
#include "uart.asm" |
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|
; |
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|
.module ASCI |
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|
ser_asci .equ $ |
|
|
|
#include "asci.asm" |
|
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|
; |
|
|
|
.module ACIA |
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|
ser_acia .equ $ |
|
|
|
#include "acia.asm" |
|
|
|
; |
|
|
|
.module SIO |
|
|
|
ser_sio .equ $ |
|
|
|
#include "sio.asm" |
|
|
|
; |
|
|
|
.module Z2U |
|
|
|
ser_z2u .equ $ |
|
|
|
#include "z2u.asm" |
|
|
|
; |
|
|
|
.module MAIN |
|
|
|
; |
|
|
|
;======================================================================= |
|
|
|
; Working literals and internal variables |
|
|
|
; Internal variables and literals |
|
|
|
;======================================================================= |
|
|
|
; |
|
|
|
str_banner .db "\r\n\r\nHDIAG v0.90",0 |
|
|
|
str_cputag .db "\r\nCPU Model: ",0 |
|
|
|
str_mmtag .db "\r\nMemory Manager: ",0 |
|
|
|
str_halt .db "\r\n\r\n*** System HALTed ***",0 |
|
|
|
; |
|
|
|
str_cpu: |
|
|
|
.dw str_cpuz80 |
|
|
|
.dw str_cpuz180 |
|
|
|
.dw str_cpuz180K |
|
|
|
.dw str_cpuz180N |
|
|
|
.dw str_cpuz280 |
|
|
|
; |
|
|
|
str_cpuz80 .db "Z80",0 |
|
|
|
str_cpuz180 .db "Z80180",0 |
|
|
|
str_cpuz180K .db "Z8S180-K",0 |
|
|
|
str_cpuz180N .db "Z8S180-N",0 |
|
|
|
str_cpuz280 .db "Z80280",0 |
|
|
|
; |
|
|
|
str_mm: |
|
|
|
.dw str_mmsbc |
|
|
|
.dw str_mmz2 |
|
|
|
.dw str_mmz180 |
|
|
|
.dw str_mmn8 |
|
|
|
.dw str_mmz280 |
|
|
|
; |
|
|
|
str_mmsbc .db "SBC/MBC",0 |
|
|
|
str_mmz2 .db "Zeta2/RC2014",0 |
|
|
|
str_mmz180 .db "Z180 Native",0 |
|
|
|
str_mmn8 .db "Z180 Native (N8)",0 |
|
|
|
str_mmz280 .db "Z280 Native",0 |
|
|
|
_str_banner .db "\r\n\r\nHDIAG v0.90",0 |
|
|
|
_str_cputag .db "\r\nCPU Model: ",0 |
|
|
|
_str_mmtag .db "\r\nMemory Manager: ",0 |
|
|
|
_str_halt .db "\r\n\r\n*** System HALTed ***",0 |
|
|
|
; |
|
|
|
_str_cpu: |
|
|
|
.dw _str_unknown |
|
|
|
.dw _str_cpuz80 |
|
|
|
.dw _str_cpuz180 |
|
|
|
.dw _str_cpuz180K |
|
|
|
.dw _str_cpuz180N |
|
|
|
.dw _str_cpuz280 |
|
|
|
; |
|
|
|
_str_unknown .db "Unknown",0 |
|
|
|
_str_cpuz80 .db "Z80",0 |
|
|
|
_str_cpuz180 .db "Z80180",0 |
|
|
|
_str_cpuz180K .db "Z8S180-K",0 |
|
|
|
_str_cpuz180N .db "Z8S180-N",0 |
|
|
|
_str_cpuz280 .db "Z80280",0 |
|
|
|
; |
|
|
|
_str_mm: |
|
|
|
.dw _str_unknown |
|
|
|
.dw _str_mmsbc |
|
|
|
.dw _str_mmz2 |
|
|
|
.dw _str_mmz180 |
|
|
|
.dw _str_mmn8 |
|
|
|
.dw _str_mmz280 |
|
|
|
; |
|
|
|
_str_mmsbc .db "SBC/MBC",0 |
|
|
|
_str_mmz2 .db "Zeta2/RC2014",0 |
|
|
|
_str_mmz180 .db "Z180 Native",0 |
|
|
|
_str_mmn8 .db "Z180 Native (N8)",0 |
|
|
|
_str_mmz280 .db "Z280 Native",0 |
|
|
|
; |
|
|
|
;======================================================================= |
|
|
|
; Top page of CPU RAM, global variables and function jump table |
|
|
|
@ -570,19 +509,25 @@ str_mmz280 .db "Z280 Native",0 |
|
|
|
; It also contains some global variables at fixed locations for use |
|
|
|
; by diagnostic modules. |
|
|
|
; |
|
|
|
ffpgimg .equ $ |
|
|
|
; The console function addresses are set dynamically based on the |
|
|
|
; console driver that is installed at boot. |
|
|
|
; |
|
|
|
_ffimg .equ $ |
|
|
|
; |
|
|
|
.org $FF00 ; Set code org |
|
|
|
; |
|
|
|
hd_jptbl: |
|
|
|
cinit jp hd_cinit ; Console port initialization |
|
|
|
cin jp hd_cin ; Console read byte |
|
|
|
cout jp hd_cout ; Console write byte |
|
|
|
cist jp hd_cist ; Console input status |
|
|
|
cost jp hd_cost ; Console output status |
|
|
|
_jptbl: |
|
|
|
cinit jp 0 ; Console port initialization |
|
|
|
cin jp 0 ; Console read byte |
|
|
|
cout jp 0 ; Console write byte |
|
|
|
cist jp 0 ; Console input status |
|
|
|
cost jp 0 ; Console output status |
|
|
|
; |
|
|
|
.fill $FF80-$ |
|
|
|
hd_cpu .db 0 ; CPU type |
|
|
|
hd_mmgr .db 0 ; Memory manager type |
|
|
|
_cpu .db 0 ; CPU type |
|
|
|
_mmgr .db 0 ; Memory manager type |
|
|
|
; |
|
|
|
.fill $10000-$ |
|
|
|
.end |
|
|
|
|
|
|
|
|
|
|
|
|
b1ackmai1er
4 years ago
GitHub