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Add Z1RCC Support

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- Added build support for Bill Chen's Z1RCC.
- Thanks and credit to Bill for supplying the bulk of the build changes.
This commit is contained in:
Wayne Warthen
2023-10-30 14:14:11 -07:00
parent 003481410f
commit 6bcad122cd
23 changed files with 215 additions and 5 deletions
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1
Source/Build.cmd
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@@ -8,6 +8,7 @@ call BuildShared || exit /b
call BuildImages || exit /b
call BuildROM %* || exit /b
call BuildZRC || exit /b
call BuildZ1RCC || exit /b
call BuildZZRCC || exit /b
if "%1" == "dist" (

4
Source/BuildZ1RCC.cmd Normal file
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@@ -0,0 +1,4 @@
@echo off
setlocal
pushd Z1RCC && call Build || exit /b & popd

1
Source/Clean.cmd
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@@ -22,4 +22,5 @@ pushd Prop && call Clean & popd
pushd RomDsk && call Clean & popd
pushd Doc && call Clean & popd
pushd ZRC && call Clean & popd
pushd Z1RCC && call Clean & popd
pushd ZZRCC && call Clean & popd

23
Source/Doc/UserGuide.md
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@@ -201,6 +201,7 @@ below, **carefully** pick the appropriate ROM image for your hardware.
| [Nhyodyne Z80 MBC]^1^ | MBC | MBC_std.rom | 38400 |
| [Rhyophyre Z180 SBC]^1^ | - | RPH_std.rom | 38400 |
| [Z80 ZRC CPU Module]^7^ | RCBus | RCZ80_zrc.rom | 115200 |
| [Z180 Z1RCC CPU Module]^7^ | RCBus | RCZ180_z1rcc.rom | 115200 |
| [Z280 ZZRCC CPU Module]^7^ | RCBus | RCZ280_zzrc.rom | 115200 |
| [Z280 ZZ80MB SBC]^7^ | RCBus | RCZ280_zz80mb.rom | 115200 |
| [Z80-Retro SBC]^8^ | - | Z80RETRO_std.rom | 38400 |
@@ -4255,7 +4256,29 @@ the RomWBW HBIOS configuration.
- VGARC Video & Keyboard Module
- Serial baud rate is usually determined by hardware for ACIA and
SIO interfaces
### Z180 Z1RCC CPU Module
| | |
|-------------------|--------------------|
| ROM Image Files | RCZ180_z1rcc.rom |
| Console Baud Rate | 115200 |
| Interrupts | Mode 2 |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 18.432 MHz assumed
- System timer is generated by Z180 CPU
- Hardware auto-detected:
- DS1302 RTC
- Z180 ASCI Serial Ports
- SIO Serial Interface Module
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- Use of Interrupt Mode 2 requires proper IEI/IEO configuration
for all peripherals generating interrupts
`\clearpage`{=latex}
### Z280 ZZRCC CPU Module

1
Source/HBIOS/Build.cmd
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@@ -216,6 +216,7 @@ call Build RCZ80 zrc || exit /b
call Build RCZ80 zrc_ram || exit /b
call Build RCZ180 ext || exit /b
call Build RCZ180 nat || exit /b
call Build RCZ180 z1rcc || exit /b
call Build RCZ280 ext || exit /b
call Build RCZ280 nat || exit /b
call Build RCZ280 zz80mb || exit /b

1
Source/HBIOS/Build.sh
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@@ -15,6 +15,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
ROM_PLATFORM="N8"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="ext"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="nat"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="z1rcc"; bash Build.sh
ROM_PLATFORM="RCZ280"; ROM_CONFIG="ext"; bash Build.sh
ROM_PLATFORM="RCZ280"; ROM_CONFIG="nat"; bash Build.sh
ROM_PLATFORM="RCZ280"; ROM_CONFIG="zz80mb"; bash Build.sh

76
Source/HBIOS/Config/RCZ180_z1rcc.asm Normal file
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@@ -0,0 +1,76 @@
;
;==================================================================================================
; RCBUS Z180 Z1RCC CONFIGURATION (ROMLESS)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "Z1RCC", " [", CONFIG, "]"
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz180.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
MDROM .SET FALSE ; MD: ENABLE ROM DISK
MDRAM .SET TRUE ; MD: ENABLE RAM DISK
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

5
Source/Makefile
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@@ -2,7 +2,7 @@
# order is actually important, because of build dependencies
#
.PHONY: doc prop shared bp images rom zrc zzrcc
.PHONY: doc prop shared bp images rom zrc z1rcc zzrcc
.ONESHELL:
.SHELLFLAGS = -cex
@@ -44,6 +44,9 @@ rom:
zrc:
$(MAKE) --directory ZRC $(ACTION)
z1rcc:
$(MAKE) --directory Z1RCC $(ACTION)
zzrcc:
$(MAKE) --directory ZZRCC $(ACTION)

20
Source/Z1RCC/Bank Layout.txt Normal file
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@@ -0,0 +1,20 @@
Z1RCC has no real ROM. It has a single 512K RAM chip. The RomWBW
ROMless startup mode is used.
The ROMless startup mode treats the entire 512KB as RAM. The entire
512KB of RAM (less the top 32KB) must be preloaded by the Z1RCC CF
Loader. There will be no ROM disk available under RomWBW. There will
be a RAM Disk and it's initial contents will be seeded by the image
loaded by the CF Loader.
Bank Contents Description
-------- -------- -----------
0x0 BIOS HBIOS Bank (operating)
0x1 IMG0 ROM Loader, Monitor, ROM OSes
0x2 IMG1 ROM Applications
0x3 IMG2 Reserved
0x4-0xB RAMD RAM Disk Banks
0xC BUF OS Buffers (CP/M3)
0xD AUX Aux Bank (CP/M 3, BPBIOS, etc.)
0xE USR User Bank (CP/M TPA, etc.)
0xF COM Common Bank, Upper 32KB

23
Source/Z1RCC/Build.cmd Normal file
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@@ -0,0 +1,23 @@
@echo on
setlocal
set TOOLS=../../Tools
set PATH=%TOOLS%\srecord;%PATH%
if exist ..\..\Binary\RCZ180_z1rcc.rom call :build_z1rcc
goto :eof
:build_z1rcc
srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x0 0x200 z1rcc_cfldr.bin -binary -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1B8 0x200 z1rcc_ptbl.bin -binary -offset 0x1B8 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1F000 0x20000 z1rcc_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x24000 0xA4000 ..\..\Binary\RCZ180_z1rcc.rom -binary -offset 0x24000 -o temp.dat -binary
move temp.dat ..\..\Binary\hd1k_z1rcc_prefix.dat
copy /b ..\..\Binary\hd1k_z1rcc_prefix.dat + ..\..\Binary\hd1k_cpm22.img + ..\..\Binary\hd1k_zsdos.img + ..\..\Binary\hd1k_nzcom.img + ..\..\Binary\hd1k_cpm3.img + ..\..\Binary\hd1k_zpm3.img + ..\..\Binary\hd1k_ws4.img ..\..\Binary\hd1k_z1rcc_combo.img || exit /b
goto :eof

3
Source/Z1RCC/Clean.cmd Normal file
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@@ -0,0 +1,3 @@
@echo off
setlocal

30
Source/Z1RCC/Makefile Normal file
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@@ -0,0 +1,30 @@
HD1KZ1RCCPREFIX = hd1k_z1rcc_prefix.dat
HD1KZ1RCCCOMBOIMG = hd1k_z1rcc_combo.img
Z1RCCROM = ../../Binary/RCZ180_z1rcc.rom
HD1KIMGS = ../../Binary/hd1k_cpm22.img ../../Binary/hd1k_zsdos.img ../../Binary/hd1k_nzcom.img \
../../Binary/hd1k_cpm3.img ../../Binary/hd1k_zpm3.img ../../Binary/hd1k_ws4.img
OBJECTS :=
ifneq ($(wildcard $(Z1RCCROM)),)
OBJECTS += $(HD1KZ1RCCPREFIX) $(HD1KZ1RCCCOMBOIMG)
endif
DEST=../../Binary
TOOLS = ../../Tools
include $(TOOLS)/Makefile.inc
DIFFPATH = $(DIFFTO)/Binary
$(HD1KZ1RCCPREFIX):
srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x0 0x200 z1rcc_cfldr.bin -binary -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1B8 0x200 z1rcc_ptbl.bin -binary -offset 0x1B8 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1F000 0x20000 z1rcc_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x24000 0xA4000 $(Z1RCCROM) -binary -offset 0x24000 -o temp.dat -binary
mv temp.dat $@
$(HD1KZ1RCCCOMBOIMG): $(HD1KZ1RCCPREFIX) $(HD1KIMGS)
cat $^ > $@

24
Source/Z1RCC/Z1RCC Disk Layout.txt Normal file
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@@ -0,0 +1,24 @@
Z1RCC Disk Prefix Layout
======================
---- Bytes ---- --- Sectors ---
Start Length Start Length Description
------- ------- ------- ------- ---------------------------
0x00000 0x001BE 0 1 CF Boot Loader
0x001B8 0x00048 RomWBW Partition Table
0x00200 0x1EE00 1 247 Unused
0x1F000 0x01000 248 8 Z1RCC Monitor v0.2a
0x20000 0x04000 256 32 Unused
0x24000 0x80000 288 1024 RomWBW
0xA4000 0x5C000 1312 736 Unused
0x100000 2048 Start of slices (partition 0x1E)
Notes
-----
- At startup CPLD ROM is mapped to Z80 CPU address space 0x0000-0x003F, CPU begins execution at 0x0000
- CPLD ROM (CF bootstrap mode) reads CF Boot Loader (512B) from start of CF (MBR) to 0xA000 and runs it
- CF Boot Loader reads Z1RCC Monitor (4KB) from sectors 0xF8-0xFF of CF to 0xB000 and runs from 0xB400
- Z1RCC Monitor reads 480KB (RomWBW) from sectors 0x120-0x4DF of CF into 480KB of physical RAM

2
Source/ver.inc
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@@ -2,7 +2,7 @@
#DEFINE RMN 4
#DEFINE RUP 0
#DEFINE RTP 0
#DEFINE BIOSVER "3.4.0-dev.14"
#DEFINE BIOSVER "3.4.0-dev.15"
#define rmj RMJ
#define rmn RMN
#define rup RUP

2
Source/ver.lib
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@@ -3,5 +3,5 @@ rmn equ 4
rup equ 0
rtp equ 0
biosver macro
db "3.4.0-dev.14"
db "3.4.0-dev.15"
endm