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Add Z1RCC Support

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- Added build support for Bill Chen's Z1RCC.
- Thanks and credit to Bill for supplying the bulk of the build changes.
This commit is contained in:
Wayne Warthen
2023-10-30 14:14:11 -07:00
parent 003481410f
commit 6bcad122cd
23 changed files with 215 additions and 5 deletions
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23
Source/Doc/UserGuide.md
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@@ -201,6 +201,7 @@ below, **carefully** pick the appropriate ROM image for your hardware.
| [Nhyodyne Z80 MBC]^1^ | MBC | MBC_std.rom | 38400 |
| [Rhyophyre Z180 SBC]^1^ | - | RPH_std.rom | 38400 |
| [Z80 ZRC CPU Module]^7^ | RCBus | RCZ80_zrc.rom | 115200 |
| [Z180 Z1RCC CPU Module]^7^ | RCBus | RCZ180_z1rcc.rom | 115200 |
| [Z280 ZZRCC CPU Module]^7^ | RCBus | RCZ280_zzrc.rom | 115200 |
| [Z280 ZZ80MB SBC]^7^ | RCBus | RCZ280_zz80mb.rom | 115200 |
| [Z80-Retro SBC]^8^ | - | Z80RETRO_std.rom | 38400 |
@@ -4255,7 +4256,29 @@ the RomWBW HBIOS configuration.
- VGARC Video & Keyboard Module
- Serial baud rate is usually determined by hardware for ACIA and
SIO interfaces
### Z180 Z1RCC CPU Module
| | |
|-------------------|--------------------|
| ROM Image Files | RCZ180_z1rcc.rom |
| Console Baud Rate | 115200 |
| Interrupts | Mode 2 |
- CPU speed is detected at startup if DS1302 RTC is active
- Otherwise 18.432 MHz assumed
- System timer is generated by Z180 CPU
- Hardware auto-detected:
- DS1302 RTC
- Z180 ASCI Serial Ports
- SIO Serial Interface Module
- EP Dual UART Serial Interface Module
- WDC Floppy Disk Controller w/ 3.5" HD Drives
- IDE Hard Disk Interface Module
- PPIDE Hard Disk Interface Module
- Use of Interrupt Mode 2 requires proper IEI/IEO configuration
for all peripherals generating interrupts
`\clearpage`{=latex}
### Z280 ZZRCC CPU Module