MirrorRepos/RomWBW
1
0
Fork 1
mirror of https://github.com/wwarthen/RomWBW.git synced 2026-02-06 14:11:48 -06:00
Code Issues Projects Releases Wiki Activity

ecb-sbc-v2 / ecb-zp ctc timer configuration

Browse Source 
Correct instructions on jumpering.
This commit is contained in:
b1ackmai1er
2019-11-24 21:18:08 +08:00
parent e2f066492f
commit 6d22708b66
1 changed files with 4 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
Source/HBIOS/hbios.asm
View File

@@ -1086,13 +1086,15 @@ HB_CPU2:
;
; CTC USES 4 CONSECUTIVE VECTOR POSITIONS, ONE FOR
; EACH CHANNEL. BELOW WE SET THE BASE VECTOR TO THE
; START OF THE IVT, SO THE FIRST FOUR ENTIRES OF THE
; START OF THE IVT, SO THE FIRST FOUR ENTRIES OF THE
; IVT CORRESPOND TO CTC CHANNELS A-D
LD A,0
OUT (CTCA),A ; SETUP CTC BASE INT VECTOR
;
; ASSUMING ECB-ZP WITH 4.9125MHz XTAL AND / 8 DIVIDER
; JUMPER X5 15-16, 9-11, X5 PIN 3 (PHI_X) TO X4 PIN 7 (CTC_TG2)
; JUMPER X5 15-16, 9-11
; JUMPER X5 PIN 3 (PHI_X) TO X4 PIN 7 (CTC_TG2)
; JUMPER X4 PIN 8 (CTC_ZC2) TO X4 PIN 9 (CTC_TG3)
; CONFIGURE CHANNEL D FOR 50HZ PERIODIC INTERRUPTS
; CTC CLK = 614,400Hz
; CTCD TIME CONSTANT = 48